From bdee6397ebf87ba83043fec15ca03e3542deb7a3 Mon Sep 17 00:00:00 2001 From: Yakovenko Andrey Date: Wed, 23 Dec 2020 12:52:51 +0200 Subject: Added MSC read10 and write10 function --- src/class/msc/msc_host.c | 93 ++++++++++++++++++++++++------------------------ src/class/msc/msc_host.h | 22 ++++-------- 2 files changed, 53 insertions(+), 62 deletions(-) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 02ca81e77..9ba41d944 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -192,60 +192,59 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb); } -#if 0 - -tusb_error_t tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count) +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msch = &msch_data[dev_addr-1]; - - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&p_msch->cbw, lun); - - p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes - p_msch->cbw.dir = TUSB_DIR_IN_MASK; - p_msch->cbw.cmd_len = sizeof(scsi_read10_t); + msch_interface_t* p_msc = get_itf(dev_addr); + if ( !p_msc->mounted ){ return false;}; - //------------- SCSI command -------------// - scsi_read10_t cmd_read10 =msch_sem_hdl + msc_cbw_t cbw = { 0 }; + + //------------- Command Block Wrapper -------------// + msc_cbw_add_signature(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_read10_t); + + //------------- SCSI command -------------// + scsi_read10_t cmd_read10 = { - .cmd_code = SCSI_CMD_READ_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) + .cmd_code = SCSI_CMD_READ_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) }; - - memcpy(p_msch->cbw.command, &cmd_read10, p_msch->cbw.cmd_len); - - TU_ASSERT_ERR ( send_cbw(dev_addr, p_msch, p_buffer)); - - return TUSB_ERROR_NONE; + + memcpy(cbw.command, &cmd_read10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); } - -tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count) + +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msch = &msch_data[dev_addr-1]; - - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&p_msch->cbw, lun); - - p_msch->cbw.total_bytes = p_msch->block_size*block_count; // Number of bytes - p_msch->cbw.dir = TUSB_DIR_OUT; - p_msch->cbw.cmd_len = sizeof(scsi_write10_t); - - //------------- SCSI command -------------// - scsi_write10_t cmd_write10 = - { - .cmd_code = SCSI_CMD_WRITE_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) - }; - - memcpy(p_msch->cbw.command, &cmd_write10, p_msch->cbw.cmd_len); - - TU_ASSERT_ERR ( send_cbw(dev_addr, p_msch, (void*) p_buffer)); - - return TUSB_ERROR_NONE; + msch_interface_t* p_msc = get_itf(dev_addr); + if ( !p_msc->mounted ){ return false;}; + + msc_cbw_t cbw = { 0 }; + + //------------- Command Block Wrapper -------------// + msc_cbw_add_signature(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); + + //------------- SCSI command -------------// + scsi_write10_t cmd_write10 = + { + .cmd_code = SCSI_CMD_WRITE_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) + }; + + memcpy(cbw.command, &cmd_write10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); } -#endif #if 0 // MSC interface Reset (not used now) diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5913350b8..016e4e21e 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -81,20 +81,16 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms // Carry out SCSI READ CAPACITY (10) command in non-blocking manner. bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); -#if 0 /** \brief Perform SCSI READ 10 command to read data from MassStorage device * \param[in] dev_addr device address * \param[in] lun Targeted Logical Unit - * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) + * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) * \param[in] lba Starting Logical Block Address to be read * \param[in] block_count Number of Block to be read - * \retval TUSB_ERROR_NONE on success - * \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device - * \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request) - * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function + * \retval true on success + * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function */ -tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count); +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); /** \brief Perform SCSI WRITE 10 command to write data to MassStorage device * \param[in] dev_addr device address @@ -102,14 +98,10 @@ tusb_error_t tuh_msc_read10 (uint8_t dev_addr, uint8_t lun, void * p_buffer, uin * \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) * \param[in] lba Starting Logical Block Address to be written * \param[in] block_count Number of Block to be written - * \retval TUSB_ERROR_NONE on success - * \retval TUSB_ERROR_INTERFACE_IS_BUSY if the interface is already transferring data with device - * \retval TUSB_ERROR_DEVICE_NOT_READY if device is not yet configured (by SET CONFIGURED request) - * \retval TUSB_ERROR_INVALID_PARA if input parameters are not correct - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by the interface's callback function + * \retval true on success + * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function */ -tusb_error_t tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * p_buffer, uint32_t lba, uint16_t block_count); -#endif +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); //------------- Application Callback -------------// -- cgit v1.3.1 From f8fbc0930bd17b263ca702c0beb9f83af4429d0a Mon Sep 17 00:00:00 2001 From: Jeremiah McCarthy Date: Tue, 16 Feb 2021 10:40:06 -0500 Subject: Add alternate bitfield padding option Adds configuration option CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT, which substitutes bitfield variable " : 0" padding syntax with an unused variable of size equal to the remaining number of bits. This change resolves aligned access issues for some platforms. Default behavior is original if the option is not explicitly enabled. --- src/class/cdc/cdc.h | 22 +++++++++++++++++++++- src/common/tusb_types.h | 6 +++++- src/host/ehci/ehci.h | 13 ++++++++++--- src/host/hub.h | 8 ++++++-- src/host/ohci/ohci.h | 12 ++++++++++-- src/tusb_option.h | 4 ++++ 6 files changed, 56 insertions(+), 9 deletions(-) diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index 2c044ac7f..ec31ee4cf 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -277,7 +277,11 @@ typedef struct TU_ATTR_PACKED struct { uint8_t handle_call : 1; ///< 0 - Device sends/receives call management information only over the Communications Class interface. 1 - Device can send/receive call management information over a Data Class interface. uint8_t send_recv_call : 1; ///< 0 - Device does not handle call management itself. 1 - Device handles call management itself. +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint8_t unused : 6; +#else uint8_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ } bmCapabilities; uint8_t bDataInterface; @@ -290,7 +294,11 @@ typedef struct TU_ATTR_PACKED uint8_t support_line_request : 1; ///< Device supports the request combination of Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State. uint8_t support_send_break : 1; ///< Device supports the request Send_Break uint8_t support_notification_network_connection : 1; ///< Device supports the notification Network_Connection. +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint8_t unused : 4; +#else uint8_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }cdc_acm_capability_t; TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler"); @@ -316,7 +324,11 @@ typedef struct TU_ATTR_PACKED uint8_t require_pulse_setup : 1; ///< Device requires extra Pulse_Setup request during pulse dialing sequence to disengage holding circuit. uint8_t support_aux_request : 1; ///< Device supports the request combination of Set_Aux_Line_State, Ring_Aux_Jack, and notification Aux_Jack_Hook_State. uint8_t support_pulse_request : 1; ///< Device supports the request combination of Pulse_Setup, Send_Pulse, and Set_Pulse_Time. +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint8_t unused : 5; +#else uint8_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ } bmCapabilities; }cdc_desc_func_direct_line_management_t; @@ -344,7 +356,11 @@ typedef struct TU_ATTR_PACKED uint8_t simple_mode : 1; uint8_t standalone_mode : 1; uint8_t computer_centric_mode : 1; +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint8_t unused : 5; +#else uint8_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ } bmCapabilities; }cdc_desc_func_telephone_operational_modes_t; @@ -363,7 +379,11 @@ typedef struct TU_ATTR_PACKED uint32_t incoming_distinctive : 1; ///< 0 : Reports only incoming ringing. 1 : Reports incoming distinctive ringing patterns. uint32_t dual_tone_multi_freq : 1; ///< 0 : Cannot report dual tone multi-frequency (DTMF) digits input remotely over the telephone line. 1 : Can report DTMF digits input remotely over the telephone line. uint32_t line_state_change : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint32_t unused : 26; +#else uint32_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ } bmCapabilities; }cdc_desc_func_telephone_call_state_reporting_capabilities_t; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index 2b4ceb69c..e57dc26f5 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -342,7 +342,11 @@ typedef struct TU_ATTR_PACKED struct TU_ATTR_PACKED { uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero. uint16_t hs_period_mult : 2; +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint16_t unused : 3; +#else uint16_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }wMaxPacketSize; uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index a6342b2d2..acaf545c1 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -231,7 +231,11 @@ typedef struct TU_ATTR_ALIGNED(32) uint32_t : 1; ///< reserved uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. - uint32_t : 0; // padding to the end of current storage unit +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + ///< All 32 bits are used +#else + uint32_t : 0; // padding to the end of current storage unit +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ // Word 2: Micro-frame Schedule Control uint8_t int_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions @@ -423,7 +427,11 @@ typedef volatile struct uint32_t nxp_port_force_fullspeed : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device. uint32_t : 1; uint32_t nxp_port_speed : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint32_t unused : 4; ///< padding +#else uint32_t : 0; // padding to the boundary of storage unit +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }portsc_bm; }; }ehci_registers_t; @@ -461,4 +469,3 @@ typedef struct /** @} */ /** @} */ - diff --git a/src/host/hub.h b/src/host/hub.h index 35d8ad629..0e3292274 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -163,7 +163,11 @@ typedef struct { uint16_t high_speed : 1; uint16_t port_test_mode : 1; uint16_t port_indicator_control : 1; - uint16_t : 0; +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint16_t unused : 3; +#else + uint16_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }; uint16_t value; diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index bfcdaf9a3..76d6fff61 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -1,4 +1,4 @@ -/* +/* * The MIT License (MIT) * * Copyright (c) 2019 Ha Thach (tinyusb.org) @@ -208,7 +208,11 @@ typedef volatile struct uint32_t interrupt_routing : 1; uint32_t remote_wakeup_connected : 1; uint32_t remote_wakeup_enale : 1; - uint32_t : 0; +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint32_t unused : 21; +#else + uint32_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }control_bit; }; @@ -276,7 +280,11 @@ typedef volatile struct uint32_t port_suspend_status_change : 1; uint32_t port_over_current_indicator_change : 1; uint32_t port_reset_status_change : 1; +#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + uint32_t unused : 11; +#else uint32_t : 0; +#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ }rhport_status_bit[2]; }; }ohci_registers_t; diff --git a/src/tusb_option.h b/src/tusb_option.h index 6cbdefbf1..b5504d29c 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -197,6 +197,10 @@ #define CFG_TUSB_OS OPT_OS_NONE #endif +#ifndef CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT + #define CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT 0 +#endif + //-------------------------------------------------------------------- // DEVICE OPTIONS //-------------------------------------------------------------------- -- cgit v1.3.1 From 79b360f0a6b980cb8b4826bbad0d2d6a4c9dae4b Mon Sep 17 00:00:00 2001 From: Nicholas R Dinsmore Date: Wed, 17 Feb 2021 13:22:34 -0500 Subject: Enable iso buffers per rp2040 spec --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 5c536e314..036b52196 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -154,6 +154,14 @@ void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t t ep->total_len = total_len; ep->len = 0; // FIXME: What if low speed + if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) + { + ep->transfer_size = total_len; //There is an assumption that the max buffer size of 1023 or 1024 was checked before this + } + else + { + ep->transfer_size = total_len > 64 ? 64 : total_len; + } ep->transfer_size = total_len > 64 ? 64 : total_len; ep->active = true; ep->user_buf = buffer; -- cgit v1.3.1 From 27f4b6f5a4e122ba0413315472ff663e5b8417be Mon Sep 17 00:00:00 2001 From: Nicholas R Dinsmore Date: Wed, 17 Feb 2021 18:22:24 -0500 Subject: Included size check for ISO buffers --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 036b52196..d3cbb2a21 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -156,13 +156,12 @@ void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t t // FIXME: What if low speed if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) { - ep->transfer_size = total_len; //There is an assumption that the max buffer size of 1023 or 1024 was checked before this + ep->transfer_size = total_len > ep->wMaxPacketSize ? ep->wMaxPacketSize : total_len; } else { ep->transfer_size = total_len > 64 ? 64 : total_len; } - ep->transfer_size = total_len > 64 ? 64 : total_len; ep->active = true; ep->user_buf = buffer; // Recalculate if this is the last buffer @@ -240,7 +239,16 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep) // Now we have synced our state with the hardware. Is there more data to transfer? uint remaining_bytes = ep->total_len - ep->len; - ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes; + // ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes; + + if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) + { + ep->transfer_size = remaining_bytes > ep->wMaxPacketSize ? ep->wMaxPacketSize : remaining_bytes; + } + else + { + ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes; + } _hw_endpoint_update_last_buf(ep); // Can happen because of programmer error so check for it -- cgit v1.3.1 From 2145ab7664bc35c4e5ea24b28d6c4f4fa61fe375 Mon Sep 17 00:00:00 2001 From: Andrew Scheller Date: Thu, 18 Feb 2021 11:53:18 +0000 Subject: rp2040/family.c: allow LED_PIN to be undefined --- hw/bsp/rp2040/family.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c index 452e4771a..e42941483 100644 --- a/hw/bsp/rp2040/family.c +++ b/hw/bsp/rp2040/family.c @@ -110,8 +110,10 @@ void stdio_rtt_init(void) void board_init(void) { +#ifdef LED_PIN gpio_init(LED_PIN); gpio_set_dir(LED_PIN, GPIO_OUT); +#endif // Button #ifndef BUTTON_BOOTSEL @@ -141,7 +143,9 @@ void board_init(void) void board_led_write(bool state) { +#ifdef LED_PIN gpio_put(LED_PIN, state ? LED_STATE_ON : (1-LED_STATE_ON)); +#endif } uint32_t board_button_read(void) -- cgit v1.3.1 From ac87a4547d520fd41815ccb5155ed6680de46ce0 Mon Sep 17 00:00:00 2001 From: ndinsmore <45537276+ndinsmore@users.noreply.github.com> Date: Thu, 18 Feb 2021 08:25:04 -0500 Subject: Change to using tu_min32 This was a github edit, not tested --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index d3cbb2a21..9bf359525 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -156,11 +156,11 @@ void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t t // FIXME: What if low speed if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) { - ep->transfer_size = total_len > ep->wMaxPacketSize ? ep->wMaxPacketSize : total_len; + ep->transfer_size = tu_min32(total_len, ep->wMaxPacketSize); } else { - ep->transfer_size = total_len > 64 ? 64 : total_len; + ep->transfer_size = tu_min32(total_len, 64); } ep->active = true; ep->user_buf = buffer; @@ -243,11 +243,11 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep) if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) { - ep->transfer_size = remaining_bytes > ep->wMaxPacketSize ? ep->wMaxPacketSize : remaining_bytes; + ep->transfer_size = tu_min32(remaining_bytes,ep->wMaxPacketSize); } else { - ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes; + ep->transfer_size = tu_min32(remaining_bytes, 64); } _hw_endpoint_update_last_buf(ep); -- cgit v1.3.1 From 21f1cd4ec7e2104ac88b26be5c06e81e385cd660 Mon Sep 17 00:00:00 2001 From: Jeremiah McCarthy Date: Thu, 18 Feb 2021 13:26:03 -0500 Subject: Implement requested PR changes Removes CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT, and makes the manual padding behavior standard. Replaced unused variable name with TU_RESERVED. --- src/class/cdc/cdc.h | 30 +++++------------------------- src/common/tusb_types.h | 6 +----- src/host/ehci/ehci.h | 11 +---------- src/host/hub.h | 6 +----- src/host/ohci/ohci.h | 12 ++---------- src/tusb_option.h | 4 ---- 6 files changed, 10 insertions(+), 59 deletions(-) diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h index ec31ee4cf..f59bf0f1a 100644 --- a/src/class/cdc/cdc.h +++ b/src/class/cdc/cdc.h @@ -277,11 +277,7 @@ typedef struct TU_ATTR_PACKED struct { uint8_t handle_call : 1; ///< 0 - Device sends/receives call management information only over the Communications Class interface. 1 - Device can send/receive call management information over a Data Class interface. uint8_t send_recv_call : 1; ///< 0 - Device does not handle call management itself. 1 - Device handles call management itself. -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint8_t unused : 6; -#else - uint8_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint8_t TU_RESERVED : 6; } bmCapabilities; uint8_t bDataInterface; @@ -294,11 +290,7 @@ typedef struct TU_ATTR_PACKED uint8_t support_line_request : 1; ///< Device supports the request combination of Set_Line_Coding, Set_Control_Line_State, Get_Line_Coding, and the notification Serial_State. uint8_t support_send_break : 1; ///< Device supports the request Send_Break uint8_t support_notification_network_connection : 1; ///< Device supports the notification Network_Connection. -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint8_t unused : 4; -#else - uint8_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint8_t TU_RESERVED : 4; }cdc_acm_capability_t; TU_VERIFY_STATIC(sizeof(cdc_acm_capability_t) == 1, "mostly problem with compiler"); @@ -324,11 +316,7 @@ typedef struct TU_ATTR_PACKED uint8_t require_pulse_setup : 1; ///< Device requires extra Pulse_Setup request during pulse dialing sequence to disengage holding circuit. uint8_t support_aux_request : 1; ///< Device supports the request combination of Set_Aux_Line_State, Ring_Aux_Jack, and notification Aux_Jack_Hook_State. uint8_t support_pulse_request : 1; ///< Device supports the request combination of Pulse_Setup, Send_Pulse, and Set_Pulse_Time. -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint8_t unused : 5; -#else - uint8_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint8_t TU_RESERVED : 5; } bmCapabilities; }cdc_desc_func_direct_line_management_t; @@ -356,11 +344,7 @@ typedef struct TU_ATTR_PACKED uint8_t simple_mode : 1; uint8_t standalone_mode : 1; uint8_t computer_centric_mode : 1; -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint8_t unused : 5; -#else - uint8_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint8_t TU_RESERVED : 5; } bmCapabilities; }cdc_desc_func_telephone_operational_modes_t; @@ -379,11 +363,7 @@ typedef struct TU_ATTR_PACKED uint32_t incoming_distinctive : 1; ///< 0 : Reports only incoming ringing. 1 : Reports incoming distinctive ringing patterns. uint32_t dual_tone_multi_freq : 1; ///< 0 : Cannot report dual tone multi-frequency (DTMF) digits input remotely over the telephone line. 1 : Can report DTMF digits input remotely over the telephone line. uint32_t line_state_change : 1; ///< 0 : Does not support line state change notification. 1 : Does support line state change notification -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint32_t unused : 26; -#else - uint32_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint32_t TU_RESERVED : 26; } bmCapabilities; }cdc_desc_func_telephone_call_state_reporting_capabilities_t; diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h index e57dc26f5..ba3fe2c41 100644 --- a/src/common/tusb_types.h +++ b/src/common/tusb_types.h @@ -342,11 +342,7 @@ typedef struct TU_ATTR_PACKED struct TU_ATTR_PACKED { uint16_t size : 11; ///< Maximum packet size this endpoint is capable of sending or receiving when this configuration is selected. \n For isochronous endpoints, this value is used to reserve the bus time in the schedule, required for the per-(micro)frame data payloads. The pipe may, on an ongoing basis, actually use less bandwidth than that reserved. The device reports, if necessary, the actual bandwidth used via its normal, non-USB defined mechanisms. \n For all endpoints, bits 10..0 specify the maximum packet size (in bytes). \n For high-speed isochronous and interrupt endpoints: \n Bits 12..11 specify the number of additional transaction opportunities per microframe: \n- 00 = None (1 transaction per microframe) \n- 01 = 1 additional (2 per microframe) \n- 10 = 2 additional (3 per microframe) \n- 11 = Reserved \n Bits 15..13 are reserved and must be set to zero. uint16_t hs_period_mult : 2; -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint16_t unused : 3; -#else - uint16_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint16_t TU_RESERVED : 3; }wMaxPacketSize; uint8_t bInterval ; ///< Interval for polling endpoint for data transfers. Expressed in frames or microframes depending on the device operating speed (i.e., either 1 millisecond or 125 us units). \n- For full-/high-speed isochronous endpoints, this value must be in the range from 1 to 16. The bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$). \n- For full-/low-speed interrupt endpoints, the value of this field may be from 1 to 255. \n- For high-speed interrupt endpoints, the bInterval value is used as the exponent for a \f$ 2^(bInterval-1) \f$ value; e.g., a bInterval of 4 means a period of 8 (\f$ 2^(4-1) \f$) . This value must be from 1 to 16. \n- For high-speed bulk/control OUT endpoints, the bInterval must specify the maximum NAK rate of the endpoint. A value of 0 indicates the endpoint never NAKs. Other values indicate at most 1 NAK each bInterval number of microframes. This value must be in the range from 0 to 255. \n Refer to Chapter 5 of USB 2.0 specification for more information. diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h index acaf545c1..d8218a5fd 100644 --- a/src/host/ehci/ehci.h +++ b/src/host/ehci/ehci.h @@ -231,11 +231,6 @@ typedef struct TU_ATTR_ALIGNED(32) uint32_t : 1; ///< reserved uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - ///< All 32 bits are used -#else - uint32_t : 0; // padding to the end of current storage unit -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ // Word 2: Micro-frame Schedule Control uint8_t int_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions @@ -427,11 +422,7 @@ typedef volatile struct uint32_t nxp_port_force_fullspeed : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device. uint32_t : 1; uint32_t nxp_port_speed : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint32_t unused : 4; ///< padding -#else - uint32_t : 0; // padding to the boundary of storage unit -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint32_t TU_RESERVED : 4; }portsc_bm; }; }ehci_registers_t; diff --git a/src/host/hub.h b/src/host/hub.h index 0e3292274..851bb8e66 100644 --- a/src/host/hub.h +++ b/src/host/hub.h @@ -163,11 +163,7 @@ typedef struct { uint16_t high_speed : 1; uint16_t port_test_mode : 1; uint16_t port_indicator_control : 1; -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint16_t unused : 3; -#else - uint16_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint16_t TU_RESERVED : 3; }; uint16_t value; diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h index 76d6fff61..2915f8b00 100644 --- a/src/host/ohci/ohci.h +++ b/src/host/ohci/ohci.h @@ -208,11 +208,7 @@ typedef volatile struct uint32_t interrupt_routing : 1; uint32_t remote_wakeup_connected : 1; uint32_t remote_wakeup_enale : 1; -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint32_t unused : 21; -#else - uint32_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint32_t TU_RESERVED : 21; }control_bit; }; @@ -280,11 +276,7 @@ typedef volatile struct uint32_t port_suspend_status_change : 1; uint32_t port_over_current_indicator_change : 1; uint32_t port_reset_status_change : 1; -#if CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - uint32_t unused : 11; -#else - uint32_t : 0; -#endif /* CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT */ + uint32_t TU_RESERVED : 11; }rhport_status_bit[2]; }; }ohci_registers_t; diff --git a/src/tusb_option.h b/src/tusb_option.h index b5504d29c..6cbdefbf1 100644 --- a/src/tusb_option.h +++ b/src/tusb_option.h @@ -197,10 +197,6 @@ #define CFG_TUSB_OS OPT_OS_NONE #endif -#ifndef CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT - #define CFG_TUSB_ALT_BIT_PACKING_ALIGNMENT 0 -#endif - //-------------------------------------------------------------------- // DEVICE OPTIONS //-------------------------------------------------------------------- -- cgit v1.3.1 From c245305f72d6a0e21a1ad4a3557b4a8485f77942 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 19 Feb 2021 10:50:50 +0700 Subject: update adafruit rp2040 board define --- hw/bsp/rp2040/boards/adafruit_feather_rp2040/board.h | 6 +++++- hw/bsp/rp2040/boards/adafruit_itsybitsy_rp2040/board.h | 4 ++++ hw/bsp/rp2040/boards/adafruit_qt_rp2040/board.h | 4 ++++ 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/hw/bsp/rp2040/boards/adafruit_feather_rp2040/board.h b/hw/bsp/rp2040/boards/adafruit_feather_rp2040/board.h index 417db3d5d..281b215d3 100644 --- a/hw/bsp/rp2040/boards/adafruit_feather_rp2040/board.h +++ b/hw/bsp/rp2040/boards/adafruit_feather_rp2040/board.h @@ -31,9 +31,13 @@ extern "C" { #endif -#define LED_PIN 14 +#define LED_PIN 13 #define LED_STATE_ON 1 +#define NEOPIXEL_PIN 16 +#define NEOPIXEL_POWER_PIN 17 +#define NEOPIXEL_POWER_STATE 1 + // Button pin is BOOTSEL which is flash CS pin #define BUTTON_BOOTSEL #define BUTTON_STATE_ACTIVE 0 diff --git a/hw/bsp/rp2040/boards/adafruit_itsybitsy_rp2040/board.h b/hw/bsp/rp2040/boards/adafruit_itsybitsy_rp2040/board.h index b45008fcc..72265176c 100644 --- a/hw/bsp/rp2040/boards/adafruit_itsybitsy_rp2040/board.h +++ b/hw/bsp/rp2040/boards/adafruit_itsybitsy_rp2040/board.h @@ -34,6 +34,10 @@ #define LED_PIN 11 #define LED_STATE_ON 1 +#define NEOPIXEL_PIN 17 +#define NEOPIXEL_POWER_PIN 16 +#define NEOPIXEL_POWER_STATE 1 + // Button pin is BOOTSEL which is flash CS pin #define BUTTON_BOOTSEL #define BUTTON_STATE_ACTIVE 0 diff --git a/hw/bsp/rp2040/boards/adafruit_qt_rp2040/board.h b/hw/bsp/rp2040/boards/adafruit_qt_rp2040/board.h index d3850a19e..c0915f704 100644 --- a/hw/bsp/rp2040/boards/adafruit_qt_rp2040/board.h +++ b/hw/bsp/rp2040/boards/adafruit_qt_rp2040/board.h @@ -35,6 +35,10 @@ #define LED_PIN 11 #define LED_STATE_ON 1 +#define NEOPIXEL_PIN 12 +#define NEOPIXEL_POWER_PIN 11 +#define NEOPIXEL_POWER_STATE 1 + // Button pin is BOOTSEL which is flash CS pin #define BUTTON_BOOTSEL #define BUTTON_STATE_ACTIVE 0 -- cgit v1.3.1 From aa850991715e2a6dcaa33a370b0ae702a33c1d54 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 19 Feb 2021 10:51:47 +0700 Subject: fix tud_midi_write24 typo rename jack_id to cable_num in function argument --- src/class/midi/midi_device.c | 18 +++++++++--------- src/class/midi/midi_device.h | 26 +++++++++++++------------- 2 files changed, 22 insertions(+), 22 deletions(-) diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c index b9d6b2efc..325fc4669 100644 --- a/src/class/midi/midi_device.c +++ b/src/class/midi/midi_device.c @@ -114,15 +114,15 @@ static void _prep_out_transaction (midid_interface_t* p_midi) //--------------------------------------------------------------------+ // READ API //--------------------------------------------------------------------+ -uint32_t tud_midi_n_available(uint8_t itf, uint8_t jack_id) +uint32_t tud_midi_n_available(uint8_t itf, uint8_t cable_num) { - (void) jack_id; + (void) cable_num; return tu_fifo_count(&_midid_itf[itf].rx_ff); } -uint32_t tud_midi_n_read(uint8_t itf, uint8_t jack_id, void* buffer, uint32_t bufsize) +uint32_t tud_midi_n_read(uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize) { - (void) jack_id; + (void) cable_num; midid_interface_t* midi = &_midid_itf[itf]; // Fill empty buffer @@ -158,9 +158,9 @@ uint32_t tud_midi_n_read(uint8_t itf, uint8_t jack_id, void* buffer, uint32_t bu return n; } -void tud_midi_n_read_flush (uint8_t itf, uint8_t jack_id) +void tud_midi_n_read_flush (uint8_t itf, uint8_t cable_num) { - (void) jack_id; + (void) cable_num; midid_interface_t* p_midi = &_midid_itf[itf]; tu_fifo_clear(&p_midi->rx_ff); _prep_out_transaction(p_midi); @@ -205,7 +205,7 @@ static uint32_t write_flush(midid_interface_t* midi) } } -uint32_t tud_midi_n_write(uint8_t itf, uint8_t jack_id, uint8_t const* buffer, uint32_t bufsize) +uint32_t tud_midi_n_write(uint8_t itf, uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize) { midid_interface_t* midi = &_midid_itf[itf]; if (midi->itf_num == 0) { @@ -228,7 +228,7 @@ uint32_t tud_midi_n_write(uint8_t itf, uint8_t jack_id, uint8_t const* buffer, u midi->write_target_length = 4; } } else if ((msg >= 0x8 && msg <= 0xB) || msg == 0xE) { - midi->write_buffer[0] = jack_id << 4 | msg; + midi->write_buffer[0] = cable_num << 4 | msg; midi->write_target_length = 4; } else if (msg == 0xf) { if (data == 0xf0) { @@ -246,7 +246,7 @@ uint32_t tud_midi_n_write(uint8_t itf, uint8_t jack_id, uint8_t const* buffer, u } } else { // Pack individual bytes if we don't support packing them into words. - midi->write_buffer[0] = jack_id << 4 | 0xf; + midi->write_buffer[0] = cable_num << 4 | 0xf; midi->write_buffer[2] = 0; midi->write_buffer[3] = 0; midi->write_buffer_length = 2; diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h index 9235448f2..5e7df80ae 100644 --- a/src/class/midi/midi_device.h +++ b/src/class/midi/midi_device.h @@ -60,13 +60,13 @@ // CFG_TUD_MIDI > 1 //--------------------------------------------------------------------+ bool tud_midi_n_mounted (uint8_t itf); -uint32_t tud_midi_n_available (uint8_t itf, uint8_t jack_id); -uint32_t tud_midi_n_read (uint8_t itf, uint8_t jack_id, void* buffer, uint32_t bufsize); -void tud_midi_n_read_flush (uint8_t itf, uint8_t jack_id); -uint32_t tud_midi_n_write (uint8_t itf, uint8_t jack_id, uint8_t const* buffer, uint32_t bufsize); +uint32_t tud_midi_n_available (uint8_t itf, uint8_t cable_num); +uint32_t tud_midi_n_read (uint8_t itf, uint8_t cable_num, void* buffer, uint32_t bufsize); +void tud_midi_n_read_flush (uint8_t itf, uint8_t cable_num); +uint32_t tud_midi_n_write (uint8_t itf, uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize); static inline -uint32_t tud_midi_n_write24 (uint8_t itf, uint8_t jack_id, uint8_t b1, uint8_t b2, uint8_t b3); +uint32_t tud_midi_n_write24 (uint8_t itf, uint8_t cable_num, uint8_t b1, uint8_t b2, uint8_t b3); bool tud_midi_n_receive (uint8_t itf, uint8_t packet[4]); bool tud_midi_n_send (uint8_t itf, uint8_t const packet[4]); @@ -78,8 +78,8 @@ static inline bool tud_midi_mounted (void); static inline uint32_t tud_midi_available (void); static inline uint32_t tud_midi_read (void* buffer, uint32_t bufsize); static inline void tud_midi_read_flush (void); -static inline uint32_t tud_midi_write (uint8_t jack_id, uint8_t const* buffer, uint32_t bufsize); -static inline uint32_t tudi_midi_write24 (uint8_t jack_id, uint8_t b1, uint8_t b2, uint8_t b3); +static inline uint32_t tud_midi_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize); +static inline uint32_t tud_midi_write24 (uint8_t cable_num, uint8_t b1, uint8_t b2, uint8_t b3); static inline bool tud_midi_receive (uint8_t packet[4]); static inline bool tud_midi_send (uint8_t const packet[4]); @@ -92,10 +92,10 @@ TU_ATTR_WEAK void tud_midi_rx_cb(uint8_t itf); // Inline Functions //--------------------------------------------------------------------+ -static inline uint32_t tud_midi_n_write24 (uint8_t itf, uint8_t jack_id, uint8_t b1, uint8_t b2, uint8_t b3) +static inline uint32_t tud_midi_n_write24 (uint8_t itf, uint8_t cable_num, uint8_t b1, uint8_t b2, uint8_t b3) { uint8_t msg[3] = { b1, b2, b3 }; - return tud_midi_n_write(itf, jack_id, msg, 3); + return tud_midi_n_write(itf, cable_num, msg, 3); } static inline bool tud_midi_mounted (void) @@ -118,15 +118,15 @@ static inline void tud_midi_read_flush (void) tud_midi_n_read_flush(0, 0); } -static inline uint32_t tud_midi_write (uint8_t jack_id, uint8_t const* buffer, uint32_t bufsize) +static inline uint32_t tud_midi_write (uint8_t cable_num, uint8_t const* buffer, uint32_t bufsize) { - return tud_midi_n_write(0, jack_id, buffer, bufsize); + return tud_midi_n_write(0, cable_num, buffer, bufsize); } -static inline uint32_t tudi_midi_write24 (uint8_t jack_id, uint8_t b1, uint8_t b2, uint8_t b3) +static inline uint32_t tud_midi_write24 (uint8_t cable_num, uint8_t b1, uint8_t b2, uint8_t b3) { uint8_t msg[3] = { b1, b2, b3 }; - return tud_midi_write(jack_id, msg, 3); + return tud_midi_write(cable_num, msg, 3); } static inline bool tud_midi_receive (uint8_t packet[4]) -- cgit v1.3.1 From 8f3f21045b8a5b533971c4e4c721b484056ac0db Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 19 Feb 2021 10:57:20 +0700 Subject: make midi example less ambigous for cable and channel --- examples/device/dynamic_configuration/src/main.c | 7 +++++-- examples/device/midi_test/src/main.c | 7 +++++-- 2 files changed, 10 insertions(+), 4 deletions(-) diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c index 45786e99a..acee295f6 100644 --- a/examples/device/dynamic_configuration/src/main.c +++ b/examples/device/dynamic_configuration/src/main.c @@ -165,6 +165,9 @@ void midi_task(void) { static uint32_t start_ms = 0; + uint8_t const cable_num = 0; // MIDI jack associated with USB endpoint + uint8_t const channel = 0; // 0 for channel 1 + // The MIDI interface always creates input and output port/jack descriptors // regardless of these being used or not. Therefore incoming traffic should be read // (possibly just discarded) to avoid the sender blocking in IO @@ -183,10 +186,10 @@ void midi_task(void) if (previous < 0) previous = sizeof(note_sequence) - 1; // Send Note On for current position at full velocity (127) on channel 1. - tudi_midi_write24(0, 0x90, note_sequence[note_pos], 127); + tud_midi_write24(cable_num, 0x90 | channel, note_sequence[note_pos], 127); // Send Note Off for previous note. - tudi_midi_write24(0, 0x80, note_sequence[previous], 0); + tud_midi_write24(cable_num, 0x80 | channel, note_sequence[previous], 0); // Increment position note_pos++; diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c index d92621fc9..858a096b6 100644 --- a/examples/device/midi_test/src/main.c +++ b/examples/device/midi_test/src/main.c @@ -125,6 +125,9 @@ void midi_task(void) { static uint32_t start_ms = 0; + uint8_t const cable_num = 0; // MIDI jack associated with USB endpoint + uint8_t const channel = 0; // 0 for channel 1 + // The MIDI interface always creates input and output port/jack descriptors // regardless of these being used or not. Therefore incoming traffic should be read // (possibly just discarded) to avoid the sender blocking in IO @@ -143,10 +146,10 @@ void midi_task(void) if (previous < 0) previous = sizeof(note_sequence) - 1; // Send Note On for current position at full velocity (127) on channel 1. - tudi_midi_write24(0, 0x90, note_sequence[note_pos], 127); + tud_midi_write24(cable_num, 0x90 | channel, note_sequence[note_pos], 127); // Send Note Off for previous note. - tudi_midi_write24(0, 0x80, note_sequence[previous], 0); + tud_midi_write24(cable_num, 0x80 | channel, note_sequence[previous], 0); // Increment position note_pos++; -- cgit v1.3.1 From 2a04ee68b82d8857fc02974eab2c0557826d9f49 Mon Sep 17 00:00:00 2001 From: hathach Date: Fri, 19 Feb 2021 11:57:56 +0700 Subject: add TU_FIFO_INIT() to help with tu_fifo declaration tu_fifo_clear() also reset max_pointer_idx and non_used_index_space --- src/common/tusb_fifo.c | 2 ++ src/common/tusb_fifo.h | 25 ++++++++++++++----------- src/osal/osal_none.h | 17 +++++------------ src/osal/osal_pico.h | 15 ++++----------- 4 files changed, 25 insertions(+), 34 deletions(-) diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c index e3c4d74c7..30629af71 100644 --- a/src/common/tusb_fifo.c +++ b/src/common/tusb_fifo.c @@ -598,6 +598,8 @@ bool tu_fifo_clear(tu_fifo_t *f) { tu_fifo_lock(f); f->rd_idx = f->wr_idx = 0; + f->max_pointer_idx = 2*f->depth-1; + f->non_used_index_space = UINT16_MAX - f->max_pointer_idx; tu_fifo_unlock(f); return true; diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h index c35b85a49..294378496 100644 --- a/src/common/tusb_fifo.h +++ b/src/common/tusb_fifo.h @@ -66,8 +66,8 @@ typedef struct uint16_t item_size ; ///< size of each item bool overwritable ; - uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length uint16_t max_pointer_idx ; ///< maximum absolute pointer index + uint16_t non_used_index_space ; ///< required for non-power-of-two buffer length volatile uint16_t wr_idx ; ///< write pointer volatile uint16_t rd_idx ; ///< read pointer @@ -78,16 +78,19 @@ typedef struct } tu_fifo_t; -#define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ - uint8_t _name##_buf[_depth*sizeof(_type)]; \ - tu_fifo_t _name = { \ - .buffer = _name##_buf, \ - .depth = _depth, \ - .item_size = sizeof(_type), \ - .overwritable = _overwritable, \ - .max_pointer_idx = 2*_depth-1, \ - .non_used_index_space = UINT16_MAX - (2*_depth-1), \ - } +#define TU_FIFO_INIT(_buffer, _depth, _type, _overwritable) \ +{ \ + .buffer = _buffer, \ + .depth = _depth, \ + .item_size = sizeof(_type), \ + .overwritable = _overwritable, \ + .max_pointer_idx = 2*(_depth)-1, \ + .non_used_index_space = UINT16_MAX - (2*(_depth)-1) \ +} + +#define TU_FIFO_DEF(_name, _depth, _type, _overwritable) \ + uint8_t _name##_buf[_depth*sizeof(_type)]; \ + tu_fifo_t _name = TU_FIFO_INIT(_name##_buf, _depth, _type, _overwritable) bool tu_fifo_set_overwritable(tu_fifo_t *f, bool overwritable); bool tu_fifo_clear(tu_fifo_t *f); diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h index 1d170d2fa..ea6818621 100644 --- a/src/osal/osal_none.h +++ b/src/osal/osal_none.h @@ -130,18 +130,11 @@ typedef struct typedef osal_queue_def_t* osal_queue_t; // role device/host is used by OS NONE for mutex (disable usb isr) only -#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \ - uint8_t _name##_buf[_depth*sizeof(_type)]; \ - osal_queue_def_t _name = { \ - .role = _role, \ - .ff = { \ - .buffer = _name##_buf, \ - .depth = _depth, \ - .item_size = sizeof(_type), \ - .overwritable = false, \ - .max_pointer_idx = (2*(_depth))-1, \ - .non_used_index_space = 0xFFFF-((2*(_depth))-1),\ - }\ +#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \ + uint8_t _name##_buf[_depth*sizeof(_type)]; \ + osal_queue_def_t _name = { \ + .role = _role, \ + .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \ } // lock queue by disable USB interrupt diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h index 79054ddfa..de964a7a0 100644 --- a/src/osal/osal_pico.h +++ b/src/osal/osal_pico.h @@ -115,17 +115,10 @@ typedef struct typedef osal_queue_def_t* osal_queue_t; // role device/host is used by OS NONE for mutex (disable usb isr) only -#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \ - uint8_t _name##_buf[_depth*sizeof(_type)]; \ - osal_queue_def_t _name = { \ - .ff = { \ - .buffer = _name##_buf, \ - .depth = _depth, \ - .item_size = sizeof(_type), \ - .overwritable = false, \ - .max_pointer_idx = 2*_depth-1, \ - .non_used_index_space = UINT16_MAX - (2*_depth-1), \ - }\ +#define OSAL_QUEUE_DEF(_role, _name, _depth, _type) \ + uint8_t _name##_buf[_depth*sizeof(_type)]; \ + osal_queue_def_t _name = { \ + .ff = TU_FIFO_INIT(_name##_buf, _depth, _type, false) \ } // lock queue by disable USB interrupt -- cgit v1.3.1 From 1bba2c0fc3bce05e9fbe4ff23dda30283d08574d Mon Sep 17 00:00:00 2001 From: Ha Thach Date: Fri, 19 Feb 2021 17:19:33 +0700 Subject: Update CONTRIBUTORS.md --- CONTRIBUTORS.md | 3 +++ 1 file changed, 3 insertions(+) diff --git a/CONTRIBUTORS.md b/CONTRIBUTORS.md index 8acbd69e2..d75a9d78a 100644 --- a/CONTRIBUTORS.md +++ b/CONTRIBUTORS.md @@ -47,6 +47,9 @@ - Board support for NuTiny NUC120, NUC121s, NUC125s, NUC126V, NUC505 - Improve multiple cdc interfaces API & add cdc_dual_ports example +- **[Raspberry Pi Team](https://github.com/raspberrypi)** + - Add new DCD port for **Raspberry Pi RP2040** + - **[Reinhard Panhuber](https://github.com/PanRe)** - Add new class driver for **USB Audio Class 2.0 (UAC2)** - Enhance tu_fifo with unmasked pointer, which better support DMA -- cgit v1.3.1 From cb5b9eb2f671a6d1a00205e0df01b0d68725ec60 Mon Sep 17 00:00:00 2001 From: ndinsmore <45537276+ndinsmore@users.noreply.github.com> Date: Fri, 19 Feb 2021 08:33:06 -0500 Subject: Remove stray. commented out line --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index 9bf359525..a6e0ed560 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -239,7 +239,6 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep) // Now we have synced our state with the hardware. Is there more data to transfer? uint remaining_bytes = ep->total_len - ep->len; - // ep->transfer_size = remaining_bytes > 64 ? 64 : remaining_bytes; if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) { -- cgit v1.3.1 From 16c8f75637ab593b3eea5b5d11af9be1436b13fd Mon Sep 17 00:00:00 2001 From: Jean Gressmann Date: Sat, 20 Feb 2021 14:38:08 +0100 Subject: Adds support for Microchip SAM E54 Xplained Pro --- docs/boards.md | 1 + hw/bsp/same54xplainedpro/board.mk | 50 +++++ hw/bsp/same54xplainedpro/same54p20a_flash.ld | 163 ++++++++++++++++ hw/bsp/same54xplainedpro/same54p20a_sram.ld | 162 ++++++++++++++++ hw/bsp/same54xplainedpro/same54xplainedpro.c | 274 +++++++++++++++++++++++++++ 5 files changed, 650 insertions(+) create mode 100644 hw/bsp/same54xplainedpro/board.mk create mode 100644 hw/bsp/same54xplainedpro/same54p20a_flash.ld create mode 100644 hw/bsp/same54xplainedpro/same54p20a_sram.ld create mode 100644 hw/bsp/same54xplainedpro/same54xplainedpro.c diff --git a/docs/boards.md b/docs/boards.md index 15971f03c..bff3f32be 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -41,6 +41,7 @@ This code base already had supported for a handful of following boards (sorted a - [Adafruit PyPortal](https://www.adafruit.com/product/4116) - [Adafruit Metro M4 Express](https://www.adafruit.com/product/3382) - [D5035-01](https://github.com/RudolphRiedel/USB_CAN-FD) +- [Microchip SAME54 Xplained Pro](https://www.microchip.com/developmenttools/productdetails/atsame54-xpro) ### MicroChip SAMG diff --git a/hw/bsp/same54xplainedpro/board.mk b/hw/bsp/same54xplainedpro/board.mk new file mode 100644 index 000000000..645372a2d --- /dev/null +++ b/hw/bsp/same54xplainedpro/board.mk @@ -0,0 +1,50 @@ +CONF_CPU_FREQUENCY ?= 120000000 + +CFLAGS += \ + -mthumb \ + -mabi=aapcs \ + -mlong-calls \ + -mcpu=cortex-m4 \ + -mfloat-abi=hard \ + -mfpu=fpv4-sp-d16 \ + -nostdlib -nostartfiles \ + -D__SAME54P20A__ \ + -DCONF_CPU_FREQUENCY=$(CONF_CPU_FREQUENCY) \ + -DCFG_TUSB_MCU=OPT_MCU_SAME5X \ + + + +# -DSVC_Handler=SVCall_Handler + +# All source paths should be relative to the top level. +LD_FILE = hw/bsp/$(BOARD)/same54p20a_flash.ld + +SRC_C += \ + hw/mcu/microchip/asf4/same54/gcc/gcc/startup_same54.c \ + hw/mcu/microchip/asf4/same54/gcc/system_same54.c \ + hw/mcu/microchip/asf4/same54/hal/utils/src/utils_syscalls.c + +INC += \ + $(TOP)/hw/mcu/microchip/asf4/same54/ \ + $(TOP)/hw/mcu/microchip/asf4/same54/config \ + $(TOP)/hw/mcu/microchip/asf4/same54/include \ + $(TOP)/hw/mcu/microchip/asf4/same54/hal/include \ + $(TOP)/hw/mcu/microchip/asf4/same54/hal/utils/include \ + $(TOP)/hw/mcu/microchip/asf4/same54/hpl/port \ + $(TOP)/hw/mcu/microchip/asf4/same54/hri \ + $(TOP)/hw/mcu/microchip/asf4/same54/CMSIS/Include + +# For TinyUSB port source +VENDOR = microchip +CHIP_FAMILY = samd + +# For freeRTOS port source +FREERTOS_PORT = ARM_CM4F + + +# For flash-jlink target +JLINK_DEVICE = ATSAME54P20 + +# flash using edbg from https://github.com/ataradov/edbg +flash: $(BUILD)/$(PROJECT).bin + edbg --verbose -t same54 -pv -f $< diff --git a/hw/bsp/same54xplainedpro/same54p20a_flash.ld b/hw/bsp/same54xplainedpro/same54p20a_flash.ld new file mode 100644 index 000000000..97072bfe6 --- /dev/null +++ b/hw/bsp/same54xplainedpro/same54p20a_flash.ld @@ -0,0 +1,163 @@ +/** + * \file + * + * \brief Linker script for running in internal FLASH on the SAME54P20A + * + * Copyright (c) 2019 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000 + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 + bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000 + qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000 +} + +/* The stack size used by the application. NOTE: you need to adjust according to your application. */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > rom + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + .bkupram (NOLOAD): + { + . = ALIGN(8); + _sbkupram = .; + *(.bkupram .bkupram.*); + . = ALIGN(8); + _ebkupram = .; + } > bkupram + + .qspi (NOLOAD): + { + . = ALIGN(8); + _sqspi = .; + *(.qspi .qspi.*); + . = ALIGN(8); + _eqspi = .; + } > qspi + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + . = ALIGN(4); + _end = . ; +} diff --git a/hw/bsp/same54xplainedpro/same54p20a_sram.ld b/hw/bsp/same54xplainedpro/same54p20a_sram.ld new file mode 100644 index 000000000..6219f4afe --- /dev/null +++ b/hw/bsp/same54xplainedpro/same54p20a_sram.ld @@ -0,0 +1,162 @@ +/** + * \file + * + * \brief Linker script for running in internal SRAM on the SAME54P20A + * + * Copyright (c) 2019 Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); you may + * not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an AS IS BASIS, WITHOUT + * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000 + bkupram (rwx) : ORIGIN = 0x47000000, LENGTH = 0x00002000 + qspi (rwx) : ORIGIN = 0x04000000, LENGTH = 0x01000000 +} + +/* The stack size used by the application. NOTE: you need to adjust according to your application. */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x10000; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > ram + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > ram + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + .bkupram (NOLOAD): + { + . = ALIGN(8); + _sbkupram = .; + *(.bkupram .bkupram.*); + . = ALIGN(8); + _ebkupram = .; + } > bkupram + + .qspi (NOLOAD): + { + . = ALIGN(8); + _sqspi = .; + *(.qspi .qspi.*); + . = ALIGN(8); + _eqspi = .; + } > qspi + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + . = ALIGN(4); + _end = . ; +} diff --git a/hw/bsp/same54xplainedpro/same54xplainedpro.c b/hw/bsp/same54xplainedpro/same54xplainedpro.c new file mode 100644 index 000000000..a176c02f4 --- /dev/null +++ b/hw/bsp/same54xplainedpro/same54xplainedpro.c @@ -0,0 +1,274 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021 Jean Gressmann + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + */ + +#include +#include "bsp/board.h" + +#include + + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void USB_0_Handler(void) +{ + tud_int_handler(0); +} + +void USB_1_Handler(void) +{ + tud_int_handler(0); +} + +void USB_2_Handler(void) +{ + tud_int_handler(0); +} + +void USB_3_Handler(void) +{ + tud_int_handler(0); +} + +//--------------------------------------------------------------------+ +// MACRO TYPEDEF CONSTANT ENUM DECLARATION +//--------------------------------------------------------------------+ +#define LED_PIN PIN_PC18 +#define BUTTON_PIN PIN_PB31 +#define BOARD_SERCOM SERCOM2 +#define BOARD_NAME "Microchip SAM E54 Xplained Pro" + +static inline void init_clock(void) +{ + /* configure for a 12MHz crystal connected to XIN1/XOUT1 */ + OSCCTRL->XOSCCTRL[1].reg = + OSCCTRL_XOSCCTRL_STARTUP(6) | // 1.953 ms + OSCCTRL_XOSCCTRL_RUNSTDBY | + OSCCTRL_XOSCCTRL_ENALC | + OSCCTRL_XOSCCTRL_IMULT(4) | OSCCTRL_XOSCCTRL_IPTAT(3) | // 8MHz to 16MHz + OSCCTRL_XOSCCTRL_XTALEN | + OSCCTRL_XOSCCTRL_ENABLE; + while(0 == OSCCTRL->STATUS.bit.XOSCRDY1); + + OSCCTRL->Dpll[0].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(5) | OSCCTRL_DPLLCTRLB_REFCLK_XOSC1; /* 12MHz / 12 = 1Mhz, input = XOSC1 */ + OSCCTRL->Dpll[0].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR((CONF_CPU_FREQUENCY / 1000000)-1); /* multiply to get CONF_CPU_FREQUENCY (default = 120MHz) */ + OSCCTRL->Dpll[0].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE; + while(0 == OSCCTRL->Dpll[0].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL0 to be ready */ + + OSCCTRL->Dpll[1].DPLLCTRLB.reg = OSCCTRL_DPLLCTRLB_DIV(5) | OSCCTRL_DPLLCTRLB_REFCLK_XOSC1; /* 12MHz / 12 = 1Mhz, input = XOSC1 */ + OSCCTRL->Dpll[1].DPLLRATIO.reg = OSCCTRL_DPLLRATIO_LDRFRAC(0x0) | OSCCTRL_DPLLRATIO_LDR(47); /* multiply by 48 -> 48 MHz */ + OSCCTRL->Dpll[1].DPLLCTRLA.reg = OSCCTRL_DPLLCTRLA_RUNSTDBY | OSCCTRL_DPLLCTRLA_ENABLE; + while(0 == OSCCTRL->Dpll[1].DPLLSTATUS.bit.CLKRDY); /* wait for the PLL1 to be ready */ + + /* configure clock-generator 0 to use DPLL0 as source -> GCLK0 is used for the core */ + GCLK->GENCTRL[0].reg = + GCLK_GENCTRL_DIV(0) | + GCLK_GENCTRL_RUNSTDBY | + GCLK_GENCTRL_GENEN | + GCLK_GENCTRL_SRC_DPLL0 | + GCLK_GENCTRL_IDC; + while(1 == GCLK->SYNCBUSY.bit.GENCTRL0); /* wait for the synchronization between clock domains to be complete */ + + /* configure clock-generator 1 to use DPLL1 as source -> for use with some peripheral */ + GCLK->GENCTRL[1].reg = + GCLK_GENCTRL_DIV(0) | + GCLK_GENCTRL_RUNSTDBY | + GCLK_GENCTRL_GENEN | + GCLK_GENCTRL_SRC_DPLL1 | + GCLK_GENCTRL_IDC ; + while(1 == GCLK->SYNCBUSY.bit.GENCTRL1); /* wait for the synchronization between clock domains to be complete */ +} + +static inline void uart_init(void) +{ + gpio_set_pin_function(PIN_PB24, PINMUX_PB24D_SERCOM2_PAD1); + gpio_set_pin_function(PIN_PB25, PINMUX_PB25D_SERCOM2_PAD0); + + MCLK->APBBMASK.bit.SERCOM2_ = 1; + GCLK->PCHCTRL[SERCOM2_GCLK_ID_CORE].reg = GCLK_PCHCTRL_GEN_GCLK1 | GCLK_PCHCTRL_CHEN; /* setup SERCOM to use GLCK1 -> 48MHz */ + + BOARD_SERCOM->USART.CTRLA.bit.SWRST = 1; /* reset and disable SERCOM -> enable configuration */ + while (BOARD_SERCOM->USART.SYNCBUSY.bit.SWRST); + + BOARD_SERCOM->USART.CTRLA.reg = + SERCOM_USART_CTRLA_SAMPR(0) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */ + SERCOM_USART_CTRLA_SAMPA(0) | /* 16x over sampling */ + SERCOM_USART_CTRLA_FORM(0) | /* 0x0 USART frame, 0x1 USART frame with parity, ... */ + SERCOM_USART_CTRLA_DORD | /* LSB first */ + SERCOM_USART_CTRLA_MODE(1) | /* 0x0 USART with external clock, 0x1 USART with internal clock */ + SERCOM_USART_CTRLA_RXPO(1) | /* SERCOM PAD[1] is used for data reception */ + SERCOM_USART_CTRLA_TXPO(0); /* SERCOM PAD[0] is used for data transmission */ + + BOARD_SERCOM->USART.CTRLB.reg = /* RXEM = 0 -> receiver disabled, LINCMD = 0 -> normal USART transmission, SFDE = 0 -> start-of-frame detection disabled, SBMODE = 0 -> one stop bit, CHSIZE = 0 -> 8 bits */ + SERCOM_USART_CTRLB_TXEN | /* transmitter enabled */ + SERCOM_USART_CTRLB_RXEN; /* receiver enabled */ + // BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(0) | SERCOM_USART_BAUD_FRAC_BAUD(26); /* 48000000/(16*115200) = 26.041666667 */ + BOARD_SERCOM->USART.BAUD.reg = SERCOM_USART_BAUD_BAUD(63019); /* 65536*(1−16*115200/48000000) */ + + BOARD_SERCOM->SPI.CTRLA.bit.ENABLE = 1; /* activate SERCOM */ + while (BOARD_SERCOM->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */ +} + +static inline void uart_send_buffer(uint8_t const *text, size_t len) +{ + for (size_t i = 0; i < len; ++i) { + BOARD_SERCOM->USART.DATA.reg = text[i]; + while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0); + } +} + +static inline void uart_send_str(const char* text) +{ + while (*text) { + BOARD_SERCOM->USART.DATA.reg = *text++; + while((BOARD_SERCOM->USART.INTFLAG.reg & SERCOM_SPI_INTFLAG_TXC) == 0); + } +} + + +void board_init(void) +{ + init_clock(); + + SystemCoreClock = CONF_CPU_FREQUENCY; + +#if CFG_TUSB_OS == OPT_OS_NONE + SysTick_Config(CONF_CPU_FREQUENCY / 1000); +#endif + + uart_init(); + +#if CFG_TUSB_DEBUG >= 2 + uart_send_str(BOARD_NAME " UART initialized\n"); + tu_printf(BOARD_NAME " reset cause %#02x\n", RSTC->RCAUSE.reg); +#endif + + // LED0 init + gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); + gpio_set_pin_level(LED_PIN, 0); + +#if CFG_TUSB_DEBUG >= 2 + uart_send_str(BOARD_NAME " LED pin configured\n"); +#endif + + // BTN0 init + gpio_set_pin_function(BUTTON_PIN, GPIO_DIRECTION_IN); + gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN); + gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP); + +#if CFG_TUSB_DEBUG >= 2 + uart_send_str(BOARD_NAME " Button pin configured\n"); +#endif + +#if CFG_TUSB_OS == OPT_OS_FREERTOS + // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) + NVIC_SetPriority(USB_0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USB_1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USB_2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); + NVIC_SetPriority(USB_3_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); +#endif + + +#if TUSB_OPT_DEVICE_ENABLED +#if CFG_TUSB_DEBUG >= 2 + uart_send_str(BOARD_NAME " USB device enabled\n"); +#endif + + /* USB clock init + * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock + * for low speed and full speed operation. + */ + hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); + hri_mclk_set_AHBMASK_USB_bit(MCLK); + hri_mclk_set_APBBMASK_USB_bit(MCLK); + + // USB pin init + gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA24, false); + gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); + gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); + gpio_set_pin_level(PIN_PA25, false); + gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); + + gpio_set_pin_function(PIN_PA24, PINMUX_PA24H_USB_DM); + gpio_set_pin_function(PIN_PA25, PINMUX_PA25H_USB_DP); + + +#if CFG_TUSB_DEBUG >= 2 + uart_send_str(BOARD_NAME " USB device configured\n"); +#endif +#endif +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + gpio_set_pin_level(LED_PIN, state); +} + +uint32_t board_button_read(void) +{ + return (PORT->Group[1].IN.reg & 0x80000000) != 0x80000000; +} + +int board_uart_read(uint8_t* buf, int len) +{ + (void) buf; (void) len; + return 0; +} + +int board_uart_write(void const * buf, int len) +{ + if (len < 0) { + uart_send_str(buf); + } else { + uart_send_buffer(buf, len); + } + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; + +void SysTick_Handler(void) +{ + system_ticks++; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#endif + +// Required by __libc_init_array in startup code if we are compiling using +// -nostdlib/-nostartfiles. +void _init(void) +{ + +} -- cgit v1.3.1 From 43ca6267748e697a70db4c8c085c837addadff2e Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 12:27:02 +0700 Subject: merge iso and cbi transaction size to max ep size --- src/portable/raspberrypi/rp2040/rp2040_usb.c | 20 ++------------------ 1 file changed, 2 insertions(+), 18 deletions(-) diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c index a6e0ed560..339297ad6 100644 --- a/src/portable/raspberrypi/rp2040/rp2040_usb.c +++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c @@ -153,15 +153,7 @@ void _hw_endpoint_xfer_start(struct hw_endpoint *ep, uint8_t *buffer, uint16_t t // Fill in info now that we're kicking off the hw ep->total_len = total_len; ep->len = 0; - // FIXME: What if low speed - if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) - { - ep->transfer_size = tu_min32(total_len, ep->wMaxPacketSize); - } - else - { - ep->transfer_size = tu_min32(total_len, 64); - } + ep->transfer_size = tu_min32(total_len, ep->wMaxPacketSize); ep->active = true; ep->user_buf = buffer; // Recalculate if this is the last buffer @@ -239,15 +231,7 @@ bool _hw_endpoint_xfer_continue(struct hw_endpoint *ep) // Now we have synced our state with the hardware. Is there more data to transfer? uint remaining_bytes = ep->total_len - ep->len; - - if(ep->transfer_type == TUSB_XFER_ISOCHRONOUS) - { - ep->transfer_size = tu_min32(remaining_bytes,ep->wMaxPacketSize); - } - else - { - ep->transfer_size = tu_min32(remaining_bytes, 64); - } + ep->transfer_size = tu_min32(remaining_bytes, ep->wMaxPacketSize); _hw_endpoint_update_last_buf(ep); // Can happen because of programmer error so check for it -- cgit v1.3.1 From 00b4b74e8276691dfc4a20163b472c7bd15f4f51 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 17:15:06 +0700 Subject: rename hcd_lpc18_43 to hcd_transdimension --- examples/host/cdc_msc_hid/Makefile | 2 +- src/portable/nxp/lpc18_43/hcd_lpc18_43.c | 50 ---------------------- .../nxp/transdimension/hcd_transdimension.c | 50 ++++++++++++++++++++++ 3 files changed, 51 insertions(+), 51 deletions(-) delete mode 100644 src/portable/nxp/lpc18_43/hcd_lpc18_43.c create mode 100644 src/portable/nxp/transdimension/hcd_transdimension.c diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile index b49c4c75c..3a0e94d73 100644 --- a/examples/host/cdc_msc_hid/Makefile +++ b/examples/host/cdc_msc_hid/Makefile @@ -21,7 +21,7 @@ SRC_C += \ src/host/usbh_control.c \ src/host/ehci/ehci.c \ src/host/ohci/ohci.c \ - src/portable/nxp/lpc18_43/hcd_lpc18_43.c \ + src/portable/nxp/transdimension/hcd_transdimension.c \ src/portable/nxp/lpc17_40/hcd_lpc17_40.c include ../../rules.mk diff --git a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c b/src/portable/nxp/lpc18_43/hcd_lpc18_43.c deleted file mode 100644 index cb509e7a2..000000000 --- a/src/portable/nxp/lpc18_43/hcd_lpc18_43.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "tusb_option.h" - -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX) - -#include "chip.h" - -// LPC18xx and 43xx use EHCI driver - -void hcd_int_enable(uint8_t rhport) -{ - NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); -} - -void hcd_int_disable(uint8_t rhport) -{ - NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); -} - -uint32_t hcd_ehci_register_addr(uint8_t rhport) -{ - return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); -} - -#endif diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c new file mode 100644 index 000000000..cb509e7a2 --- /dev/null +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -0,0 +1,50 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "tusb_option.h" + +#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX) + +#include "chip.h" + +// LPC18xx and 43xx use EHCI driver + +void hcd_int_enable(uint8_t rhport) +{ + NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); +} + +void hcd_int_disable(uint8_t rhport) +{ + NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); +} + +uint32_t hcd_ehci_register_addr(uint8_t rhport) +{ + return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); +} + +#endif -- cgit v1.3.1 From b591a66b3d38bc199aaa5ac1b32d0a1221b8b983 Mon Sep 17 00:00:00 2001 From: Kamil Tomaszewski Date: Mon, 22 Feb 2021 11:24:16 +0100 Subject: Pass the correct speed on Spresense --- src/portable/sony/cxd56/dcd_cxd56.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c index 88027ccaa..904176ba1 100644 --- a/src/portable/sony/cxd56/dcd_cxd56.c +++ b/src/portable/sony/cxd56/dcd_cxd56.c @@ -155,7 +155,24 @@ static void _dcd_disconnect(FAR struct usbdevclass_driver_s *driver, FAR struct { (void) driver; - tusb_speed_t speed = (dev->speed == 3) ? TUSB_SPEED_HIGH : TUSB_SPEED_FULL; + tusb_speed_t speed; + + switch (dev->speed) + { + case USB_SPEED_LOW: + speed = TUSB_SPEED_LOW; + break; + case USB_SPEED_FULL: + speed = TUSB_SPEED_FULL; + break; + case USB_SPEED_HIGH: + speed = TUSB_SPEED_HIGH; + break; + default: + speed = TUSB_SPEED_HIGH; + break; + } + dcd_event_bus_reset(0, speed, true); DEV_CONNECT(dev); } -- cgit v1.3.1 From 8a2e4c79fd6a5b7927ae07bececc30ca79d9edf2 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 18:02:52 +0700 Subject: make hcd tdi more generic --- src/host/ehci/ehci.c | 5 ++- .../nxp/transdimension/dcd_transdimension.c | 5 +-- .../nxp/transdimension/hcd_transdimension.c | 45 +++++++++++++++++++--- 3 files changed, 45 insertions(+), 10 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index 23c8ea9ee..f3a5cf9cd 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -26,7 +26,10 @@ #include "common/tusb_common.h" -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX) +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX ) + //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 755e7635e..6f1923ec9 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -26,9 +26,8 @@ #include "tusb_option.h" -#if TUSB_OPT_DEVICE_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_LPC43XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) +#if TUSB_OPT_DEVICE_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) //--------------------------------------------------------------------+ // INCLUDE diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index cb509e7a2..f8ad7c719 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -26,25 +26,58 @@ #include "tusb_option.h" -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX) +// NXP Trans-Dimension USB IP implement EHCI for host functionality -#include "chip.h" +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) + +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX + #include "fsl_device_registers.h" +#else + // LPCOpen for 18xx & 43xx + #include "chip.h" +#endif + +typedef struct +{ + uint32_t regs_addr; // registers base + const IRQn_Type irqnum; // IRQ number +}hcd_controller_t; + +#if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX + static const hcd_controller_t _hcd_controller[] = + { + // RT1010 and RT1020 only has 1 USB controller + #if FSL_FEATURE_SOC_USBHS_COUNT == 1 + { .regs_addr = (uint32_t) &USB->USBCMD , .irqnum = USB_OTG1_IRQn } + #else + { .regs_addr = (uint32_t) &USB1->USBCMD, .irqnum = USB_OTG1_IRQn }, + { .regs_addr = (uint32_t) &USB2->USBCMD, .irqnum = USB_OTG2_IRQn } + #endif + }; + +#else + static const hcd_controller_t _hcd_controller[] = + { + { .regs_addr = (uint32_t) &LPC_USB0->USBCMD_H, .irqnum = USB0_IRQn }, + { .regs_addr = (uint32_t) &LPC_USB1->USBCMD_H, .irqnum = USB1_IRQn } + }; +#endif -// LPC18xx and 43xx use EHCI driver void hcd_int_enable(uint8_t rhport) { - NVIC_EnableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); } void hcd_int_disable(uint8_t rhport) { - NVIC_DisableIRQ(rhport ? USB1_IRQn : USB0_IRQn); + NVIC_DisableIRQ(_hcd_controller[rhport].irqnum); } uint32_t hcd_ehci_register_addr(uint8_t rhport) { - return (uint32_t) (rhport ? &LPC_USB1->USBCMD_H : &LPC_USB0->USBCMD_H ); + return _hcd_controller[rhport].regs_addr; } #endif -- cgit v1.3.1 From 1e07fc024c91453cd71d357698b05d40eb571431 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 22:32:56 +0700 Subject: add rhport to hcd_init() --- src/host/ehci/ehci.c | 4 ++-- src/host/hcd.h | 2 +- src/host/usbh.c | 2 +- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index f3a5cf9cd..b5f872c81 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -105,10 +105,10 @@ static bool ehci_init (uint8_t rhport); //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ -bool hcd_init(void) +bool hcd_init(uint8_t rhport) { tu_memclr(&ehci_data, sizeof(ehci_data_t)); - return ehci_init(TUH_OPT_RHPORT); + return ehci_init(rhport); } uint32_t hcd_uframe_number(uint8_t rhport) diff --git a/src/host/hcd.h b/src/host/hcd.h index db98f6110..4810ef8da 100644 --- a/src/host/hcd.h +++ b/src/host/hcd.h @@ -98,7 +98,7 @@ enum { //--------------------------------------------------------------------+ // Controller & Port API //--------------------------------------------------------------------+ -bool hcd_init(void); +bool hcd_init(uint8_t rhport); void hcd_int_handler(uint8_t rhport); void hcd_int_enable (uint8_t rhport); void hcd_int_disable(uint8_t rhport); diff --git a/src/host/usbh.c b/src/host/usbh.c index f278f4d94..0bc6378b2 100644 --- a/src/host/usbh.c +++ b/src/host/usbh.c @@ -197,7 +197,7 @@ bool tuh_init(void) usbh_class_drivers[drv_id].init(); } - TU_ASSERT(hcd_init()); + TU_ASSERT(hcd_init(TUH_OPT_RHPORT)); hcd_int_enable(TUH_OPT_RHPORT); return true; -- cgit v1.3.1 From c5b8980398a8e79f6501af1f1b1e17e0a599fabf Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 22 Feb 2021 22:40:51 +0700 Subject: separate hcd_init from ehci --- src/host/ehci/ehci.c | 12 ++++-------- src/portable/nxp/transdimension/hcd_transdimension.c | 8 ++++++++ 2 files changed, 12 insertions(+), 8 deletions(-) diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c index b5f872c81..5626abcc8 100644 --- a/src/host/ehci/ehci.c +++ b/src/host/ehci/ehci.c @@ -51,6 +51,7 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; // EHCI portable uint32_t hcd_ehci_register_addr(uint8_t rhport); +bool hcd_ehci_init (uint8_t rhport); // TODO move later //--------------------------------------------------------------------+ // PROTOTYPE @@ -100,16 +101,9 @@ static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); -static bool ehci_init (uint8_t rhport); - //--------------------------------------------------------------------+ // HCD API //--------------------------------------------------------------------+ -bool hcd_init(uint8_t rhport) -{ - tu_memclr(&ehci_data, sizeof(ehci_data_t)); - return ehci_init(rhport); -} uint32_t hcd_uframe_number(uint8_t rhport) { @@ -206,8 +200,10 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) } // EHCI controller init -static bool ehci_init(uint8_t rhport) +bool hcd_ehci_init(uint8_t rhport) { + tu_memclr(&ehci_data, sizeof(ehci_data_t)); + ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(rhport); ehci_registers_t* regs = ehci_data.regs; diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index f8ad7c719..62b14364d 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -65,6 +65,14 @@ typedef struct #endif +// TODO better prototype later +extern bool hcd_ehci_init (uint8_t rhport); // from ehci.c + +bool hcd_init(uint8_t rhport) +{ + return hcd_ehci_init(rhport); +} + void hcd_int_enable(uint8_t rhport) { NVIC_EnableIRQ(_hcd_controller[rhport].irqnum); -- cgit v1.3.1 From de955852586eb88cac4c107cfa0ace267ce079d1 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 01:27:52 +0700 Subject: nxp tdi: hcd_init() reset and set host mode --- hw/bsp/mcb1800/mcb1800.c | 39 ------ .../nxp/transdimension/common_transdimension.h | 136 +++++++++++++++++++++ .../nxp/transdimension/dcd_transdimension.c | 108 +--------------- .../nxp/transdimension/hcd_transdimension.c | 52 ++++++-- 4 files changed, 185 insertions(+), 150 deletions(-) create mode 100644 src/portable/nxp/transdimension/common_transdimension.h diff --git a/hw/bsp/mcb1800/mcb1800.c b/hw/bsp/mcb1800/mcb1800.c index 569d33834..5256501ed 100644 --- a/hw/bsp/mcb1800/mcb1800.c +++ b/hw/bsp/mcb1800/mcb1800.c @@ -157,51 +157,12 @@ void board_init(void) Chip_UART_TXEnable(UART_DEV); //------------- USB -------------// - enum { - USBMODE_DEVICE = 2, - USBMODE_HOST = 3 - }; - - enum { - USBMODE_VBUS_LOW = 0, - USBMODE_VBUS_HIGH = 1 - }; - - // USB0 #if CFG_TUSB_RHPORT0_MODE Chip_USB0_Init(); - - // Host/Device mode can only be set right after controller reset - LPC_USB0->USBCMD_D |= 0x02; - while( LPC_USB0->USBCMD_D & 0x02 ) {} - - // Set mode - #if CFG_TUSB_RHPORT0_MODE & OPT_MODE_HOST - LPC_USB0->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); - LPC_USB0->PORTSC1_H |= (1<<24); // FIXME force full speed for debugging - #else // TODO OTG - LPC_USB0->USBMODE_D = USBMODE_DEVICE; - LPC_USB0->OTGSC = (1<<3) | (1<<0) /*| (1<<16)| (1<<24)| (1<<25)| (1<<26)| (1<<27)| (1<<28)| (1<<29)| (1<<30)*/; - #endif #endif - // USB1 #if CFG_TUSB_RHPORT1_MODE Chip_USB1_Init(); - -// // Reset controller -// LPC_USB1->USBCMD_D |= 0x02; -// while( LPC_USB1->USBCMD_D & 0x02 ) {} -// -// // Set mode -// #if CFG_TUSB_RHPORT1_MODE & OPT_MODE_HOST -// LPC_USB1->USBMODE_H = USBMODE_HOST | (USBMODE_VBUS_HIGH << 5); -// #else // TODO OTG -// LPC_USB1->USBMODE_D = USBMODE_DEVICE; -// #endif -// -// // USB1 as fullspeed -// LPC_USB1->PORTSC1_D |= (1<<24); #endif } diff --git a/src/portable/nxp/transdimension/common_transdimension.h b/src/portable/nxp/transdimension/common_transdimension.h new file mode 100644 index 000000000..7b94dac34 --- /dev/null +++ b/src/portable/nxp/transdimension/common_transdimension.h @@ -0,0 +1,136 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef COMMON_TRANSDIMENSION_H_ +#define COMMON_TRANSDIMENSION_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// USBCMD +enum { + USBCMD_RUN_STOP = TU_BIT(0), + USBCMD_RESET = TU_BIT(1), + USBCMD_SETUP_TRIPWIRE = TU_BIT(13), + USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD +// Interrupt Threshold bit 23:16 +}; + +// PORTSC1 +#define PORTSC1_PORT_SPEED_POS 26 + +enum { + PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), + PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), + PORTSC1_SUSPEND = TU_BIT(7), + PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), + PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) +}; + +// OTGSC +enum { + OTGSC_VBUS_DISCHARGE = TU_BIT(0), + OTGSC_VBUS_CHARGE = TU_BIT(1), +// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), + OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode + OTGSC_DATA_PULSING = TU_BIT(4), + OTGSC_ID_PULLUP = TU_BIT(5), +// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), +// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), + OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device + OTGSC_A_VBUS_VALID = TU_BIT(9), + OTGSC_A_SESSION_VALID = TU_BIT(10), + OTGSC_B_SESSION_VALID = TU_BIT(11), + OTGSC_B_SESSION_END = TU_BIT(12), + OTGSC_1MS_TOGGLE = TU_BIT(13), + OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), +}; + +// USBMode +enum { + USBMODE_CM_DEVICE = 2, + USBMODE_CM_HOST = 3, + + USBMODE_SLOM = TU_BIT(3), + USBMODE_SDIS = TU_BIT(4), + + USBMODE_VBUS_POWER_SELECT = TU_BIT(5), // Need to be enabled for LPC18XX/43XX in host mode +}; + +// Device Registers +typedef struct +{ + //------------- ID + HW Parameter Registers-------------// + __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX + + //------------- Capability Registers-------------// + __I uint8_t CAPLENGTH; ///< Capability Registers Length + __I uint8_t TU_RESERVED[1]; + __I uint16_t HCIVERSION; ///< Host Controller Interface Version + + __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters + __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters + __I uint32_t TU_RESERVED[5]; + + __I uint16_t DCIVERSION; ///< Device Controller Interface Version + __I uint8_t TU_RESERVED[2]; + + __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters + __I uint32_t TU_RESERVED[6]; + + //------------- Operational Registers -------------// + __IO uint32_t USBCMD; ///< USB Command Register + __IO uint32_t USBSTS; ///< USB Status Register + __IO uint32_t USBINTR; ///< Interrupt Enable Register + __IO uint32_t FRINDEX; ///< USB Frame Index + __I uint32_t TU_RESERVED; + __IO uint32_t DEVICEADDR; ///< Device Address + __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address + __I uint32_t TU_RESERVED; + __IO uint32_t BURSTSIZE; ///< Programmable Burst Size + __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning + uint32_t TU_RESERVED[4]; + __IO uint32_t ENDPTNAK; ///< Endpoint NAK + __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable + __I uint32_t TU_RESERVED; + __IO uint32_t PORTSC1; ///< Port Status & Control + __I uint32_t TU_RESERVED[7]; + __IO uint32_t OTGSC; ///< On-The-Go Status & control + __IO uint32_t USBMODE; ///< USB Device Mode + __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status + __IO uint32_t ENDPTPRIME; ///< Endpoint Prime + __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush + __I uint32_t ENDPTSTAT; ///< Endpoint Status + __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete + __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 +} dcd_registers_t; + +#ifdef __cplusplus + } +#endif + +#endif /* COMMON_TRANSDIMENSION_H_ */ diff --git a/src/portable/nxp/transdimension/dcd_transdimension.c b/src/portable/nxp/transdimension/dcd_transdimension.c index 6f1923ec9..afc7184a0 100644 --- a/src/portable/nxp/transdimension/dcd_transdimension.c +++ b/src/portable/nxp/transdimension/dcd_transdimension.c @@ -32,9 +32,6 @@ //--------------------------------------------------------------------+ // INCLUDE //--------------------------------------------------------------------+ -#include "common/tusb_common.h" -#include "device/dcd.h" - #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #include "fsl_device_registers.h" #else @@ -42,6 +39,10 @@ #include "chip.h" #endif +#include "common/tusb_common.h" +#include "device/dcd.h" +#include "common_transdimension.h" + #if defined(__CORTEX_M) && __CORTEX_M == 7 && __DCACHE_PRESENT == 1 #define CleanInvalidateDCache_by_Addr SCB_CleanInvalidateDCache_by_Addr #else @@ -60,15 +61,6 @@ enum { ENDPTCTRL_ENABLE = TU_BIT(7) }; -// USBCMD -enum { - USBCMD_RUN_STOP = TU_BIT(0), - USBCMD_RESET = TU_BIT(1), - USBCMD_SETUP_TRIPWIRE = TU_BIT(13), - USBCMD_ADD_QTD_TRIPWIRE = TU_BIT(14) ///< This bit is used as a semaphore to ensure the to proper addition of a new dTD to an active (primed) endpoint’s linked list. This bit is set and cleared by software during the process of adding a new dTD -}; -// Interrupt Threshold bit 23:16 - // USBSTS, USBINTR enum { INTR_USB = TU_BIT(0), @@ -80,96 +72,6 @@ enum { INTR_NAK = TU_BIT(16) }; -// PORTSC1 -#define PORTSC1_PORT_SPEED_POS 26 - -enum { - PORTSC1_CURRENT_CONNECT_STATUS = TU_BIT(0), - PORTSC1_FORCE_PORT_RESUME = TU_BIT(6), - PORTSC1_SUSPEND = TU_BIT(7), - PORTSC1_FORCE_FULL_SPEED = TU_BIT(24), - PORTSC1_PORT_SPEED = TU_BIT(26) | TU_BIT(27) -}; - -// OTGSC -enum { - OTGSC_VBUS_DISCHARGE = TU_BIT(0), - OTGSC_VBUS_CHARGE = TU_BIT(1), -// OTGSC_HWASSIST_AUTORESET = TU_BIT(2), - OTGSC_OTG_TERMINATION = TU_BIT(3), ///< Must set to 1 when OTG go to device mode - OTGSC_DATA_PULSING = TU_BIT(4), - OTGSC_ID_PULLUP = TU_BIT(5), -// OTGSC_HWASSIT_DATA_PULSE = TU_BIT(6), -// OTGSC_HWASSIT_BDIS_ACONN = TU_BIT(7), - OTGSC_ID = TU_BIT(8), ///< 0 = A device, 1 = B Device - OTGSC_A_VBUS_VALID = TU_BIT(9), - OTGSC_A_SESSION_VALID = TU_BIT(10), - OTGSC_B_SESSION_VALID = TU_BIT(11), - OTGSC_B_SESSION_END = TU_BIT(12), - OTGSC_1MS_TOGGLE = TU_BIT(13), - OTGSC_DATA_BUS_PULSING_STATUS = TU_BIT(14), -}; - -// USBMode -enum { - USBMODE_CM_DEVICE = 2, - USBMODE_CM_HOST = 3, - - USBMODE_SLOM = TU_BIT(3), - USBMODE_SDIS = TU_BIT(4), - - USBMODE_VBUS_POWER_SELCT = TU_BIT(5), // Enable for LPC18XX/43XX in host most only -}; - -// Device Registers -typedef struct -{ - //------------- ID + HW Parameter Registers-------------// - __I uint32_t TU_RESERVED[64]; ///< For iMX RT10xx, but not used by LPC18XX/LPC43XX - - //------------- Capability Registers-------------// - __I uint8_t CAPLENGTH; ///< Capability Registers Length - __I uint8_t TU_RESERVED[1]; - __I uint16_t HCIVERSION; ///< Host Controller Interface Version - - __I uint32_t HCSPARAMS; ///< Host Controller Structural Parameters - __I uint32_t HCCPARAMS; ///< Host Controller Capability Parameters - __I uint32_t TU_RESERVED[5]; - - __I uint16_t DCIVERSION; ///< Device Controller Interface Version - __I uint8_t TU_RESERVED[2]; - - __I uint32_t DCCPARAMS; ///< Device Controller Capability Parameters - __I uint32_t TU_RESERVED[6]; - - //------------- Operational Registers -------------// - __IO uint32_t USBCMD; ///< USB Command Register - __IO uint32_t USBSTS; ///< USB Status Register - __IO uint32_t USBINTR; ///< Interrupt Enable Register - __IO uint32_t FRINDEX; ///< USB Frame Index - __I uint32_t TU_RESERVED; - __IO uint32_t DEVICEADDR; ///< Device Address - __IO uint32_t ENDPTLISTADDR; ///< Endpoint List Address - __I uint32_t TU_RESERVED; - __IO uint32_t BURSTSIZE; ///< Programmable Burst Size - __IO uint32_t TXFILLTUNING; ///< TX FIFO Fill Tuning - uint32_t TU_RESERVED[4]; - __IO uint32_t ENDPTNAK; ///< Endpoint NAK - __IO uint32_t ENDPTNAKEN; ///< Endpoint NAK Enable - __I uint32_t TU_RESERVED; - __IO uint32_t PORTSC1; ///< Port Status & Control - __I uint32_t TU_RESERVED[7]; - __IO uint32_t OTGSC; ///< On-The-Go Status & control - __IO uint32_t USBMODE; ///< USB Device Mode - __IO uint32_t ENDPTSETUPSTAT; ///< Endpoint Setup Status - __IO uint32_t ENDPTPRIME; ///< Endpoint Prime - __IO uint32_t ENDPTFLUSH; ///< Endpoint Flush - __I uint32_t ENDPTSTAT; ///< Endpoint Status - __IO uint32_t ENDPTCOMPLETE; ///< Endpoint Complete - __IO uint32_t ENDPTCTRL[8]; ///< Endpoint Control 0 - 7 -} dcd_registers_t; - - // Queue Transfer Descriptor typedef struct { @@ -279,7 +181,7 @@ CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(2048) static dcd_data_t _dcd_data; //--------------------------------------------------------------------+ -// CONTROLLER API +// Controller API //--------------------------------------------------------------------+ /// follows LPC43xx User Manual 23.10.3 diff --git a/src/portable/nxp/transdimension/hcd_transdimension.c b/src/portable/nxp/transdimension/hcd_transdimension.c index 62b14364d..e6b7afe8f 100644 --- a/src/portable/nxp/transdimension/hcd_transdimension.c +++ b/src/portable/nxp/transdimension/hcd_transdimension.c @@ -31,6 +31,9 @@ #if TUSB_OPT_HOST_ENABLED && \ (CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX) +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ #if CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX #include "fsl_device_registers.h" #else @@ -38,9 +41,17 @@ #include "chip.h" #endif +#include "common/tusb_common.h" +#include "common_transdimension.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ + +// TODO can be merged with dcd_controller_t typedef struct { - uint32_t regs_addr; // registers base + uint32_t regs_base; // registers base const IRQn_Type irqnum; // IRQ number }hcd_controller_t; @@ -49,27 +60,49 @@ typedef struct { // RT1010 and RT1020 only has 1 USB controller #if FSL_FEATURE_SOC_USBHS_COUNT == 1 - { .regs_addr = (uint32_t) &USB->USBCMD , .irqnum = USB_OTG1_IRQn } + { .regs_base = USB_BASE , .irqnum = USB_OTG1_IRQn } #else - { .regs_addr = (uint32_t) &USB1->USBCMD, .irqnum = USB_OTG1_IRQn }, - { .regs_addr = (uint32_t) &USB2->USBCMD, .irqnum = USB_OTG2_IRQn } + { .regs_base = USB1_BASE, .irqnum = USB_OTG1_IRQn }, + { .regs_base = USB2_BASE, .irqnum = USB_OTG2_IRQn } #endif }; #else static const hcd_controller_t _hcd_controller[] = { - { .regs_addr = (uint32_t) &LPC_USB0->USBCMD_H, .irqnum = USB0_IRQn }, - { .regs_addr = (uint32_t) &LPC_USB1->USBCMD_H, .irqnum = USB1_IRQn } + { .regs_base = LPC_USB0_BASE, .irqnum = USB0_IRQn }, + { .regs_base = LPC_USB1_BASE, .irqnum = USB1_IRQn } }; #endif - // TODO better prototype later extern bool hcd_ehci_init (uint8_t rhport); // from ehci.c +//--------------------------------------------------------------------+ +// Controller API +//--------------------------------------------------------------------+ + bool hcd_init(uint8_t rhport) { + dcd_registers_t* dcd_reg = (dcd_registers_t*) _hcd_controller[rhport].regs_base; + + // Reset controller + dcd_reg->USBCMD |= USBCMD_RESET; + while( dcd_reg->USBCMD & USBCMD_RESET ) {} + + // Set mode to device, must be set immediately after reset +#if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX + // LPC18XX/43XX need to set VBUS Power Select to HIGH + // RHPORT1 is fullspeed only (need external PHY for Highspeed) + dcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT; + if (rhport == 1) dcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; +#else + dcd_reg->USBMODE = USBMODE_CM_HOST; +#endif + + // FIXME force full speed, still have issue with Highspeed enumeration + dcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED; + return hcd_ehci_init(rhport); } @@ -85,7 +118,10 @@ void hcd_int_disable(uint8_t rhport) uint32_t hcd_ehci_register_addr(uint8_t rhport) { - return _hcd_controller[rhport].regs_addr; + dcd_registers_t* hcd_reg = (dcd_registers_t*) _hcd_controller[rhport].regs_base; + + // EHCI USBCMD has same address within dcd_register_t + return (uint32_t) &hcd_reg->USBCMD; } #endif -- cgit v1.3.1 From ebc6253bd47ca7a38fe802ee161774938deb3e3b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 10:20:11 +0700 Subject: rt1011 msc host work --- hw/bsp/imxrt/family.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c index 9dff104f1..c6b1a3159 100644 --- a/hw/bsp/imxrt/family.c +++ b/hw/bsp/imxrt/family.c @@ -82,10 +82,15 @@ void board_init(void) LPUART_Init(UART_PORT, &uart_config, (CLOCK_GetPllFreq(kCLOCK_PllUsb1) / 6U) / (CLOCK_GetDiv(kCLOCK_UartDiv) + 1U)); //------------- USB0 -------------// + // Clock CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_Usbphy480M, 480000000U); CLOCK_EnableUsbhs0Clock(kCLOCK_Usb480M, 480000000U); + // USB1 +// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U); +// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U); + USBPHY_Type* usb_phy; // RT105x RT106x have dual USB controller. TODO support USB2 @@ -106,10 +111,6 @@ void board_init(void) phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK); phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06); usb_phy->TX = phytx; - - // USB1 -// CLOCK_EnableUsbhs1PhyPllClock(kCLOCK_Usbphy480M, 480000000U); -// CLOCK_EnableUsbhs1Clock(kCLOCK_Usb480M, 480000000U); } //--------------------------------------------------------------------+ -- cgit v1.3.1 From f2ed2ae09a480835eacf049d8959b3c904713be7 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 11:14:19 +0700 Subject: rename tuh_msc_scsi_inquiry() to tuh_msc_inquiry() --- examples/host/cdc_msc_hid/src/msc_app.c | 2 +- src/class/msc/msc_host.c | 2 +- src/class/msc/msc_host.h | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index a45fba737..5e2ea308a 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -82,7 +82,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) block_size = block_count = 0; uint8_t const lun = 0; - tuh_msc_scsi_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); + tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); // // //------------- file system (only 1 LUN support) -------------// // uint8_t phy_disk = dev_addr-1; diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 02ca81e77..9a44d0632 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -139,7 +139,7 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb); } -bool tuh_msc_scsi_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { msc_cbw_t cbw = { 0 }; diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 5913350b8..61f6e6a21 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -70,7 +70,7 @@ uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); // Carry out SCSI INQUIRY command in non-blocking manner. -bool tuh_msc_scsi_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); +bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); // Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); -- cgit v1.3.1 From ade4bf74ea7343bcebff4c1b2bbd1ebaac9009c0 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 11:38:15 +0700 Subject: update function comment --- src/class/msc/msc_host.h | 21 +++++++-------------- 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index 61f6e6a21..3d1963701 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -51,34 +51,27 @@ typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, ms // This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb() bool tuh_msc_mounted(uint8_t dev_addr); -/** \brief Check if the interface is currently busy or not - * \param[in] dev_addr device address - * \retval true if the interface is busy meaning the stack is still transferring/waiting data from/to device - * \retval false if the interface is not busy meaning the stack successfully transferred data from/to device - * \note This function is used to check if previous transfer is complete (success or error), so that the next transfer - * can be scheduled. User needs to make sure the corresponding interface is mounted (by \ref tuh_msc_is_mounted) - * before calling this function - */ -bool tuh_msc_is_busy(uint8_t dev_addr); +// Check if the interface is currently busy transferring data +bool tuh_msc_is_busy(uint8_t dev_addr); // Get Max Lun uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); -// Carry out a full SCSI command (cbw, data, csw) in non-blocking manner. +// Perform a full SCSI command (cbw, data, csw) in non-blocking manner. // `complete_cb` callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI INQUIRY command in non-blocking manner. +// Perform SCSI Inquiry command bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. +// Perform SCSI Test Unit Ready command bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI REQUEST SENSE (10) command in non-blocking manner. +// Perform SCSI Request Sense (10) command bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Carry out SCSI READ CAPACITY (10) command in non-blocking manner. +// Perform SCSI Read Capacity (10) command bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); #if 0 -- cgit v1.3.1 From 386a386345fbaa1a9c63a4346c2d946fe015da72 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 12:20:30 +0700 Subject: clean up host msc --- src/class/msc/msc_host.c | 91 +++++++++++++++++++++++------------------------- src/class/msc/msc_host.h | 38 ++++++++------------ 2 files changed, 57 insertions(+), 72 deletions(-) diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index ce3693dcb..943dc541f 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -99,11 +99,12 @@ bool tuh_msc_is_busy(uint8_t dev_addr) //--------------------------------------------------------------------+ // PUBLIC API: SCSI COMMAND //--------------------------------------------------------------------+ -static inline void msc_cbw_add_signature(msc_cbw_t *p_cbw, uint8_t lun) +static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun) { - p_cbw->signature = MSC_CBW_SIGNATURE; - p_cbw->tag = 0x54555342; // TUSB - p_cbw->lun = lun; + tu_memclr(cbw, sizeof(msc_cbw_t)); + cbw->signature = MSC_CBW_SIGNATURE; + cbw->tag = 0x54555342; // TUSB + cbw->lun = lun; } bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb) @@ -126,11 +127,11 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ) return false; + TU_VERIFY(p_msc->mounted); - msc_cbw_t cbw = { 0 }; + msc_cbw_t cbw; + cbw_init(&cbw, lun); - msc_cbw_add_signature(&cbw, lun); cbw.total_bytes = sizeof(scsi_read_capacity10_resp_t); cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read_capacity10_t); @@ -141,9 +142,9 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; + msc_cbw_t cbw; + cbw_init(&cbw, lun); - msc_cbw_add_signature(&cbw, lun); cbw.total_bytes = sizeof(scsi_inquiry_resp_t); cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_inquiry_t); @@ -160,8 +161,8 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; - msc_cbw_add_signature(&cbw, lun); + msc_cbw_t cbw; + cbw_init(&cbw, lun); cbw.total_bytes = 0; // Number of bytes cbw.dir = TUSB_DIR_OUT; @@ -174,8 +175,8 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb) { - msc_cbw_t cbw = { 0 }; - msc_cbw_add_signature(&cbw, lun); + msc_cbw_t cbw; + cbw_init(&cbw, lun); cbw.total_bytes = 18; // TODO sense response cbw.dir = TUSB_DIR_IN_MASK; @@ -192,58 +193,52 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms return tuh_msc_scsi_command(dev_addr, &cbw, resposne, complete_cb); } -bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ){ return false;}; + TU_VERIFY(p_msc->mounted); - msc_cbw_t cbw = { 0 }; - - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&cbw, lun); + msc_cbw_t cbw; + cbw_init(&cbw, lun); - cbw.total_bytes = 512*block_count; // Number of bytes + cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 cbw.dir = TUSB_DIR_IN_MASK; cbw.cmd_len = sizeof(scsi_read10_t); - //------------- SCSI command -------------// scsi_read10_t cmd_read10 = { - .cmd_code = SCSI_CMD_READ_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) + .cmd_code = SCSI_CMD_READ_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) }; memcpy(cbw.command, &cmd_read10, cbw.cmd_len); - return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); + return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb); } -bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msc = get_itf(dev_addr); - if ( !p_msc->mounted ){ return false;}; - - msc_cbw_t cbw = { 0 }; - - //------------- Command Block Wrapper -------------// - msc_cbw_add_signature(&cbw, lun); - - cbw.total_bytes = 512*block_count; // Number of bytes - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_write10_t); + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->mounted); - //------------- SCSI command -------------// - scsi_write10_t cmd_write10 = - { - .cmd_code = SCSI_CMD_WRITE_10, - .lba = tu_htonl(lba), - .block_count = tu_htons(block_count) - }; - - memcpy(cbw.command, &cmd_write10, cbw.cmd_len); - - return tuh_msc_scsi_command(dev_addr, &cbw, p_buffer, complete_cb); + msc_cbw_t cbw; + cbw_init(&cbw, lun); + + cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); + + scsi_write10_t cmd_write10 = + { + .cmd_code = SCSI_CMD_WRITE_10, + .lba = tu_htonl(lba), + .block_count = tu_htons(block_count) + }; + + memcpy(cbw.command, &cmd_write10, cbw.cmd_len); + + return tuh_msc_scsi_command(dev_addr, &cbw, (void*) buffer, complete_cb); } #if 0 diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index d80e3e44d..b6ead28c5 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -58,43 +58,33 @@ bool tuh_msc_is_busy(uint8_t dev_addr); uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); // Perform a full SCSI command (cbw, data, csw) in non-blocking manner. -// `complete_cb` callback is invoked when SCSI op is complete. +// Complete callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb); // Perform SCSI Inquiry command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb); // Perform SCSI Test Unit Ready command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Request Sense (10) command +// Perform SCSI Request Sense 10 command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Read Capacity (10) command +// Perform SCSI Read Capacity 10 command +// Complete callback is invoked when SCSI op is complete. bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); -/** \brief Perform SCSI READ 10 command to read data from MassStorage device - * \param[in] dev_addr device address - * \param[in] lun Targeted Logical Unit - * \param[out] p_buffer Buffer used to store data read from device. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) - * \param[in] lba Starting Logical Block Address to be read - * \param[in] block_count Number of Block to be read - * \retval true on success - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function - */ -bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); - -/** \brief Perform SCSI WRITE 10 command to write data to MassStorage device - * \param[in] dev_addr device address - * \param[in] lun Targeted Logical Unit - * \param[in] p_buffer Buffer containing data. Must be accessible by USB controller (see \ref CFG_TUSB_MEM_SECTION) - * \param[in] lba Starting Logical Block Address to be written - * \param[in] block_count Number of Block to be written - * \retval true on success - * \note This function is non-blocking and returns immediately. The result of USB transfer will be reported by \ref complete_cb callback function - */ -bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void * p_buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); +// Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer +// Complete callback is invoked when SCSI op is complete. +bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); + +// Perform SCSI Write 10 command. Write n blocks starting from LBA to device +// Complete callback is invoked when SCSI op is complete. +bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); //------------- Application Callback -------------// -- cgit v1.3.1 From 5108d7613600449c50af9e8ce373571d56bed3cc Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:41:11 +0700 Subject: host msc: call read_capacity as part of enumeration - add tuh_msc_get_block_count(), tuh_msc_get_block_size() - rename tuh_msc_mounted_cb/tuh_msc_unmounted_cb to tuh_msc_mount_cb/tuh_msc_unmount_cb to match device stack naming - change tuh_msc_is_busy() to tuh_msc_ready() - add CFG_TUH_MSC_MAXLUN (default to 4) to hold lun capacities - add host msc configured to for state check. --- examples/host/cdc_msc_hid/src/msc_app.c | 46 ++--------- examples/obsolete/host/src/msc_host_app.c | 4 +- lib/fatfs/diskio.c | 2 +- src/class/msc/msc_host.c | 133 ++++++++++++++++++++---------- src/class/msc/msc_host.h | 33 ++++++-- 5 files changed, 125 insertions(+), 93 deletions(-) diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 5e2ea308a..623141eaa 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -31,31 +31,6 @@ // MACRO TYPEDEF CONSTANT ENUM DECLARATION //--------------------------------------------------------------------+ static scsi_inquiry_resp_t inquiry_resp; -static scsi_read_capacity10_resp_t capacity_resp; - -uint32_t block_size; -uint32_t block_count; - -bool capacity_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) -{ - (void) dev_addr; - (void) cbw; - - if (csw->status != 0) - { - printf("Read Capacity (10) failed\r\n"); - return false; - } - - // Capacity response field: Block size and Last LBA are both Big-Endian - block_count = tu_ntohl(capacity_resp.last_lba) + 1; - block_size = tu_ntohl(capacity_resp.block_size); - - printf("Disk Size: %lu MB\r\n", block_count / ((1024*1024)/block_size)); - printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size); - - return true; -} bool inquiry_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) { @@ -68,19 +43,21 @@ bool inquiry_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const // Print out Vendor ID, Product ID and Rev printf("%.8s %.16s rev %.4s\r\n", inquiry_resp.vendor_id, inquiry_resp.product_id, inquiry_resp.product_rev); - // Read capacity of device - tuh_msc_read_capacity(dev_addr, cbw->lun, &capacity_resp, capacity_complete_cb); + // Get capacity of device + uint32_t const block_count = tuh_msc_get_block_count(dev_addr, cbw->lun); + uint32_t const block_size = tuh_msc_get_block_size(dev_addr, cbw->lun); + + printf("Disk Size: %lu MB\r\n", block_count / ((1024*1024)/block_size)); + printf("Block Count = %lu, Block Size: %lu\r\n", block_count, block_size); return true; } //------------- IMPLEMENTATION -------------// -void tuh_msc_mounted_cb(uint8_t dev_addr) +void tuh_msc_mount_cb(uint8_t dev_addr) { printf("A MassStorage device is mounted\r\n"); - block_size = block_count = 0; - uint8_t const lun = 0; tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb); // @@ -110,7 +87,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) // } } -void tuh_msc_unmounted_cb(uint8_t dev_addr) +void tuh_msc_unmount_cb(uint8_t dev_addr) { (void) dev_addr; printf("A MassStorage device is unmounted\r\n"); @@ -133,11 +110,4 @@ void tuh_msc_unmounted_cb(uint8_t dev_addr) // } } -//void tuh_msc_scsi_complete_cb(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) -//{ -// (void) dev_addr; -// (void) cbw; -// (void) csw; -//} - #endif diff --git a/examples/obsolete/host/src/msc_host_app.c b/examples/obsolete/host/src/msc_host_app.c index 8afb6ede8..5399e6620 100644 --- a/examples/obsolete/host/src/msc_host_app.c +++ b/examples/obsolete/host/src/msc_host_app.c @@ -48,7 +48,7 @@ CFG_TUSB_MEM_SECTION static FATFS fatfs[CFG_TUSB_HOST_DEVICE_MAX]; //--------------------------------------------------------------------+ // tinyusb callbacks //--------------------------------------------------------------------+ -void tuh_msc_mounted_cb(uint8_t dev_addr) +void tuh_msc_mount_cb(uint8_t dev_addr) { puts("\na MassStorage device is mounted"); @@ -94,7 +94,7 @@ void tuh_msc_mounted_cb(uint8_t dev_addr) } } -void tuh_msc_unmounted_cb(uint8_t dev_addr) +void tuh_msc_unmount_cb(uint8_t dev_addr) { puts("\na MassStorage device is unmounted"); diff --git a/lib/fatfs/diskio.c b/lib/fatfs/diskio.c index 38503148d..401f583a2 100644 --- a/lib/fatfs/diskio.c +++ b/lib/fatfs/diskio.c @@ -48,7 +48,7 @@ static DSTATUS disk_state[CFG_TUSB_HOST_DEVICE_MAX]; static DRESULT wait_for_io_complete(uint8_t usb_addr) { // TODO with RTOS, this should use semaphore instead of blocking - while ( tuh_msc_is_busy(usb_addr) ) + while ( !tuh_msc_ready(usb_addr) ) { // TODO should have timeout here #if CFG_TUSB_OS != OPT_OS_NONE diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c index 943dc541f..34dbec2e3 100644 --- a/src/class/msc/msc_host.c +++ b/src/class/msc/msc_host.c @@ -47,14 +47,21 @@ enum typedef struct { - uint8_t itf_num; - uint8_t ep_in; - uint8_t ep_out; + uint8_t itf_num; + uint8_t ep_in; + uint8_t ep_out; - uint8_t max_lun; + uint8_t max_lun; - volatile bool mounted; + volatile bool configured; // Receive SET_CONFIGURE + volatile bool mounted; // Enumeration is complete + struct { + uint32_t block_size; + uint32_t block_count; + } capacity[CFG_TUH_MSC_MAXLUN]; + + //------------- SCSI -------------// uint8_t stage; void* buffer; tuh_msc_complete_cb_t complete_cb; @@ -63,14 +70,15 @@ typedef struct msc_csw_t csw; }msch_interface_t; -CFG_TUSB_MEM_SECTION static msch_interface_t msch_data[CFG_TUSB_HOST_DEVICE_MAX]; +CFG_TUSB_MEM_SECTION static msch_interface_t _msch_itf[CFG_TUSB_HOST_DEVICE_MAX]; -// buffer used to read scsi information when mounted, largest response data currently is inquiry -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t msch_buffer[sizeof(scsi_inquiry_resp_t)]; +// buffer used to read scsi information when mounted +// largest response data currently is inquiry TODO Inquiry is not part of enum anymore +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4) static uint8_t _msch_buffer[sizeof(scsi_inquiry_resp_t)]; static inline msch_interface_t* get_itf(uint8_t dev_addr) { - return &msch_data[dev_addr-1]; + return &_msch_itf[dev_addr-1]; } //--------------------------------------------------------------------+ @@ -82,18 +90,28 @@ uint8_t tuh_msc_get_maxlun(uint8_t dev_addr) return p_msc->max_lun; } -bool tuh_msc_mounted(uint8_t dev_addr) +uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun) { msch_interface_t* p_msc = get_itf(dev_addr); + return p_msc->capacity[lun].block_count; +} - // is configured can be omitted - return tuh_device_is_configured(dev_addr) && p_msc->mounted; +uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun) +{ + msch_interface_t* p_msc = get_itf(dev_addr); + return p_msc->capacity[lun].block_size; +} + +bool tuh_msc_mounted(uint8_t dev_addr) +{ + msch_interface_t* p_msc = get_itf(dev_addr); + return p_msc->mounted; } -bool tuh_msc_is_busy(uint8_t dev_addr) +bool tuh_msc_ready(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); - return p_msc->mounted && hcd_edpt_busy(dev_addr, p_msc->ep_in); + return p_msc->mounted && !hcd_edpt_busy(dev_addr, p_msc->ep_in); } //--------------------------------------------------------------------+ @@ -110,7 +128,7 @@ static inline void cbw_init(msc_cbw_t *cbw, uint8_t lun) bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tuh_msc_complete_cb_t complete_cb) { msch_interface_t* p_msc = get_itf(dev_addr); - // TU_VERIFY(p_msc->mounted); // TODO part of the enumeration also use scsi command + TU_VERIFY(p_msc->configured); // TODO claim endpoint @@ -126,8 +144,8 @@ bool tuh_msc_scsi_command(uint8_t dev_addr, msc_cbw_t const* cbw, void* data, tu bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb) { - msch_interface_t* p_msc = get_itf(dev_addr); - TU_VERIFY(p_msc->mounted); + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->configured); msc_cbw_t cbw; cbw_init(&cbw, lun); @@ -142,6 +160,9 @@ bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_r bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* response, tuh_msc_complete_cb_t complete_cb) { + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->mounted); + msc_cbw_t cbw; cbw_init(&cbw, lun); @@ -161,14 +182,17 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_t complete_cb) { + msch_interface_t* p_msc = get_itf(dev_addr); + TU_VERIFY(p_msc->configured); + msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 0; // Number of bytes - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_test_unit_ready_t); - cbw.command[0] = SCSI_CMD_TEST_UNIT_READY; - cbw.command[1] = lun; // according to wiki TODO need verification + cbw.total_bytes = 0; + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_test_unit_ready_t); + cbw.command[0] = SCSI_CMD_TEST_UNIT_READY; + cbw.command[1] = lun; // according to wiki TODO need verification return tuh_msc_scsi_command(dev_addr, &cbw, NULL, complete_cb); } @@ -179,8 +203,8 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_ms cbw_init(&cbw, lun); cbw.total_bytes = 18; // TODO sense response - cbw.dir = TUSB_DIR_IN_MASK; - cbw.cmd_len = sizeof(scsi_request_sense_t); + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_request_sense_t); scsi_request_sense_t const cmd_request_sense = { @@ -201,11 +225,11 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 - cbw.dir = TUSB_DIR_IN_MASK; - cbw.cmd_len = sizeof(scsi_read10_t); + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; + cbw.dir = TUSB_DIR_IN_MASK; + cbw.cmd_len = sizeof(scsi_read10_t); - scsi_read10_t cmd_read10 = + scsi_read10_t const cmd_read10 = { .cmd_code = SCSI_CMD_READ_10, .lba = tu_htonl(lba), @@ -225,11 +249,11 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_ msc_cbw_t cbw; cbw_init(&cbw, lun); - cbw.total_bytes = 512*block_count; // Number of bytes TODO get block size from READ CAPACITY 10 - cbw.dir = TUSB_DIR_OUT; - cbw.cmd_len = sizeof(scsi_write10_t); + cbw.total_bytes = block_count*p_msc->capacity[lun].block_size; + cbw.dir = TUSB_DIR_OUT; + cbw.cmd_len = sizeof(scsi_write10_t); - scsi_write10_t cmd_write10 = + scsi_write10_t const cmd_write10 = { .cmd_code = SCSI_CMD_WRITE_10, .lba = tu_htonl(lba), @@ -267,14 +291,14 @@ bool tuh_msc_reset(uint8_t dev_addr) //--------------------------------------------------------------------+ void msch_init(void) { - tu_memclr(msch_data, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX); + tu_memclr(_msch_itf, sizeof(msch_interface_t)*CFG_TUSB_HOST_DEVICE_MAX); } void msch_close(uint8_t dev_addr) { msch_interface_t* p_msc = get_itf(dev_addr); tu_memclr(p_msc, sizeof(msch_interface_t)); - tuh_msc_unmounted_cb(dev_addr); // invoke Application Callback + tuh_msc_unmount_cb(dev_addr); // invoke Application Callback } bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) @@ -331,6 +355,7 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32 static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t const * request, xfer_result_t result); static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); +static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw); bool msch_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *itf_desc, uint16_t *p_length) { @@ -369,6 +394,8 @@ bool msch_set_config(uint8_t dev_addr, uint8_t itf_num) msch_interface_t* p_msc = get_itf(dev_addr); TU_ASSERT(p_msc->itf_num == itf_num); + p_msc->configured = true; + //------------- Get Max Lun -------------// TU_LOG2("MSC Get Max Lun\r\n"); tusb_control_request_t request = @@ -396,12 +423,13 @@ static bool config_get_maxlun_complete (uint8_t dev_addr, tusb_control_request_t msch_interface_t* p_msc = get_itf(dev_addr); // STALL means zero - p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? msch_buffer[0] : 0; + p_msc->max_lun = (XFER_RESULT_SUCCESS == result) ? _msch_buffer[0] : 0; p_msc->max_lun++; // MAX LUN is minus 1 by specs // TODO multiple LUN support TU_LOG2("SCSI Test Unit Ready\r\n"); - tuh_msc_test_unit_ready(dev_addr, 0, config_test_unit_ready_complete); + uint8_t const lun = 0; + tuh_msc_test_unit_ready(dev_addr, lun, config_test_unit_ready_complete); return true; } @@ -410,19 +438,16 @@ static bool config_test_unit_ready_complete(uint8_t dev_addr, msc_cbw_t const* c { if (csw->status == 0) { - msch_interface_t* p_msc = get_itf(dev_addr); - - usbh_driver_set_config_complete(dev_addr, p_msc->itf_num); - - // Unit is ready, Enumeration is complete - p_msc->mounted = true; - tuh_msc_mounted_cb(dev_addr); + // Unit is ready, read its capacity + TU_LOG2("SCSI Read Capacity\r\n"); + tuh_msc_read_capacity(dev_addr, cbw->lun, (scsi_read_capacity10_resp_t*) _msch_buffer, config_read_capacity_complete); }else { // Note: During enumeration, some device fails Test Unit Ready and require a few retries // with Request Sense to start working !! // TODO limit number of retries - TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, msch_buffer, config_request_sense_complete)); + TU_LOG2("SCSI Request Sense\r\n"); + TU_ASSERT(tuh_msc_request_sense(dev_addr, cbw->lun, _msch_buffer, config_request_sense_complete)); } return true; @@ -435,4 +460,24 @@ static bool config_request_sense_complete(uint8_t dev_addr, msc_cbw_t const* cbw return true; } +static bool config_read_capacity_complete(uint8_t dev_addr, msc_cbw_t const* cbw, msc_csw_t const* csw) +{ + TU_ASSERT(csw->status == 0); + + msch_interface_t* p_msc = get_itf(dev_addr); + + // Capacity response field: Block size and Last LBA are both Big-Endian + scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) _msch_buffer; + p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1; + p_msc->capacity[cbw->lun].block_size = tu_ntohl(resp->block_size); + + // Mark enumeration is complete + p_msc->mounted = true; + tuh_msc_mount_cb(dev_addr); + + usbh_driver_set_config_complete(dev_addr, p_msc->itf_num); + + return true; +} + #endif diff --git a/src/class/msc/msc_host.h b/src/class/msc/msc_host.h index b6ead28c5..8116e729f 100644 --- a/src/class/msc/msc_host.h +++ b/src/class/msc/msc_host.h @@ -35,6 +35,15 @@ extern "C" { #endif +//--------------------------------------------------------------------+ +// Class Driver Configuration +//--------------------------------------------------------------------+ + +#ifndef CFG_TUH_MSC_MAXLUN +#define CFG_TUH_MSC_MAXLUN 4 +#endif + + /** \addtogroup ClassDriver_MSC * @{ * \defgroup MSC_Host Host @@ -51,12 +60,18 @@ typedef bool (*tuh_msc_complete_cb_t)(uint8_t dev_addr, msc_cbw_t const* cbw, ms // This function true after tuh_msc_mounted_cb() and false after tuh_msc_unmounted_cb() bool tuh_msc_mounted(uint8_t dev_addr); -// Check if the interface is currently busy transferring data -bool tuh_msc_is_busy(uint8_t dev_addr); +// Check if the interface is currently ready or busy transferring data +bool tuh_msc_ready(uint8_t dev_addr); // Get Max Lun uint8_t tuh_msc_get_maxlun(uint8_t dev_addr); +// Get number of block +uint32_t tuh_msc_get_block_count(uint8_t dev_addr, uint8_t lun); + +// Get block size in bytes +uint32_t tuh_msc_get_block_size(uint8_t dev_addr, uint8_t lun); + // Perform a full SCSI command (cbw, data, csw) in non-blocking manner. // Complete callback is invoked when SCSI op is complete. // return true if success, false if there is already pending operation. @@ -74,10 +89,6 @@ bool tuh_msc_test_unit_ready(uint8_t dev_addr, uint8_t lun, tuh_msc_complete_cb_ // Complete callback is invoked when SCSI op is complete. bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void *resposne, tuh_msc_complete_cb_t complete_cb); -// Perform SCSI Read Capacity 10 command -// Complete callback is invoked when SCSI op is complete. -bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); - // Perform SCSI Read 10 command. Read n blocks starting from LBA to buffer // Complete callback is invoked when SCSI op is complete. bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); @@ -86,13 +97,19 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void * buffer, uint32_t lba, // Complete callback is invoked when SCSI op is complete. bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const * buffer, uint32_t lba, uint16_t block_count, tuh_msc_complete_cb_t complete_cb); +// Perform SCSI Read Capacity 10 command +// Complete callback is invoked when SCSI op is complete. +// Note: during enumeration, host stack already carried out this request. Application can retrieve capacity by +// simply call tuh_msc_get_block_count() and tuh_msc_get_block_size() +bool tuh_msc_read_capacity(uint8_t dev_addr, uint8_t lun, scsi_read_capacity10_resp_t* response, tuh_msc_complete_cb_t complete_cb); + //------------- Application Callback -------------// // Invoked when a device with MassStorage interface is mounted -void tuh_msc_mounted_cb(uint8_t dev_addr); +void tuh_msc_mount_cb(uint8_t dev_addr); // Invoked when a device with MassStorage interface is unmounted -void tuh_msc_unmounted_cb(uint8_t dev_addr); +void tuh_msc_unmount_cb(uint8_t dev_addr); //--------------------------------------------------------------------+ // Internal Class Driver API -- cgit v1.3.1 From 0de6a05d73ca79974bc45f5cfa94b2246113c1f1 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:45:53 +0700 Subject: fix ohci hcd_init() signature change --- src/host/ohci/ohci.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c index d9bbfc8c6..44acebf72 100644 --- a/src/host/ohci/ohci.c +++ b/src/host/ohci/ohci.c @@ -141,8 +141,10 @@ static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); // USBH-HCD API //--------------------------------------------------------------------+ // Initialization according to 5.1.1.4 -bool hcd_init(void) +bool hcd_init(uint8_t rhport) { + (void) rhport; + //------------- Data Structure init -------------// tu_memclr(&ohci_data, sizeof(ohci_data_t)); for(uint8_t i=0; i<32; i++) -- cgit v1.3.1 From afab5bf497ce429a60eee1642e8c58560f4b6147 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 19:50:39 +0700 Subject: enable host example ci build for imxrt --- examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX | 0 1 file changed, 0 insertions(+), 0 deletions(-) create mode 100644 examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX diff --git a/examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX b/examples/host/cdc_msc_hid/.only.MCU_MIMXRT10XX new file mode 100644 index 000000000..e69de29bb -- cgit v1.3.1 From 451650fa32b245f2dc02c366b25fa802b75fbb1b Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 23 Feb 2021 23:09:48 +0700 Subject: move ehci and ohci to portable folder --- examples/host/cdc_msc_hid/Makefile | 4 +- examples/host/cdc_msc_hid/src/msc_app.c | 7 - src/host/ehci/ehci.c | 901 -------------------------------- src/host/ehci/ehci.h | 462 ---------------- src/host/ohci/ohci.c | 686 ------------------------ src/host/ohci/ohci.h | 293 ----------- src/portable/ehci/ehci.c | 901 ++++++++++++++++++++++++++++++++ src/portable/ehci/ehci.h | 460 ++++++++++++++++ src/portable/ohci/ohci.c | 688 ++++++++++++++++++++++++ src/portable/ohci/ohci.h | 291 +++++++++++ 10 files changed, 2342 insertions(+), 2351 deletions(-) delete mode 100644 src/host/ehci/ehci.c delete mode 100644 src/host/ehci/ehci.h delete mode 100644 src/host/ohci/ohci.c delete mode 100644 src/host/ohci/ohci.h create mode 100644 src/portable/ehci/ehci.c create mode 100644 src/portable/ehci/ehci.h create mode 100644 src/portable/ohci/ohci.c create mode 100644 src/portable/ohci/ohci.h diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile index 3a0e94d73..6a2b4d902 100644 --- a/examples/host/cdc_msc_hid/Makefile +++ b/examples/host/cdc_msc_hid/Makefile @@ -19,8 +19,8 @@ SRC_C += \ src/host/hub.c \ src/host/usbh.c \ src/host/usbh_control.c \ - src/host/ehci/ehci.c \ - src/host/ohci/ohci.c \ + src/portable/ehci/ehci.c \ + src/portable/ohci/ohci.c \ src/portable/nxp/transdimension/hcd_transdimension.c \ src/portable/nxp/lpc17_40/hcd_lpc17_40.c diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c index 623141eaa..3a8ef3a07 100644 --- a/examples/host/cdc_msc_hid/src/msc_app.c +++ b/examples/host/cdc_msc_hid/src/msc_app.c @@ -73,13 +73,6 @@ void tuh_msc_mount_cb(uint8_t dev_addr) // return; // } // -// puts("---------------------------------------------------------------------"); -// puts("- MASSSTORAGE CLASS CLI IS A IMMATURE CODE. DISK-WRITING COMMANDS"); -// puts("- SUCH AS cp(COPY), mkdir(MAKE DIRECTORY) ARE POTENTIAL TO DAMAGE"); -// puts("- YOUR USB THUMBDRIVE. USING THOSE COMMANDS ARE AT YOUR OWN RISK."); -// puts("- THE AUTHOR HAS NO RESPONSIBILITY WITH YOUR DEVICE NOR ITS DATA"); -// puts("---------------------------------------------------------------------"); -// // f_chdrive(phy_disk); // change to newly mounted drive // f_chdir("/"); // root as current dir // diff --git a/src/host/ehci/ehci.c b/src/host/ehci/ehci.c deleted file mode 100644 index 5626abcc8..000000000 --- a/src/host/ehci/ehci.c +++ /dev/null @@ -1,901 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "common/tusb_common.h" - -#if TUSB_OPT_HOST_ENABLED && \ - (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ - CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX ) - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "osal/osal.h" - -#include "../hcd.h" -#include "../usbh_hcd.h" -#include "ehci.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -// Periodic frame list must be 4K alignment -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; - -// EHCI portable -uint32_t hcd_ehci_register_addr(uint8_t rhport); -bool hcd_ehci_init (uint8_t rhport); // TODO move later - -//--------------------------------------------------------------------+ -// PROTOTYPE -//--------------------------------------------------------------------+ -static inline ehci_link_t* get_period_head(uint8_t rhport, uint8_t interval_ms) -{ - (void) rhport; - return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; -} - -static inline ehci_qhd_t* qhd_control(uint8_t dev_addr) -{ - return &ehci_data.control[dev_addr].qhd; -} - -static inline ehci_qhd_t* qhd_async_head(uint8_t rhport) -{ - (void) rhport; - return qhd_control(0); // control qhd of dev0 is used as async head -} - -static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) -{ - return &ehci_data.control[dev_addr].qtd; -} - - -static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd); -static inline ehci_qhd_t* qhd_find_free (void); -static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr); - -// determine if a queue head has bus-related error -static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd) -{ - return (p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err); - //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error -} - -static void qhd_init (ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); - -static inline ehci_qtd_t* qtd_find_free (void); -static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd); -static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new); -static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd); -static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); - -static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); -static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); - -//--------------------------------------------------------------------+ -// HCD API -//--------------------------------------------------------------------+ - -uint32_t hcd_uframe_number(uint8_t rhport) -{ - (void) rhport; - return ehci_data.uframe_number + ehci_data.regs->frame_index; -} - -void hcd_port_reset(uint8_t rhport) -{ - (void) rhport; - - ehci_registers_t* regs = ehci_data.regs; - -// regs->portsc_bm.port_enabled = 0; // disable port before reset -// regs->portsc_bm.port_reset = 1; - - uint32_t portsc = regs->portsc; - - portsc &= ~(EHCI_PORTSC_MASK_PORT_EANBLED); - portsc |= EHCI_PORTSC_MASK_PORT_RESET; - - regs->portsc = portsc; -} - -#if 0 -void hcd_port_reset_end(uint8_t rhport) -{ - (void) rhport; - - ehci_registers_t* regs = ehci_data.regs; - regs->portsc_bm.port_reset = 0; -} -#endif - -bool hcd_port_connect_status(uint8_t rhport) -{ - (void) rhport; - return ehci_data.regs->portsc_bm.current_connect_status; -} - -tusb_speed_t hcd_port_speed_get(uint8_t rhport) -{ - (void) rhport; - return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed -} - -static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) -{ - for(ehci_link_t* prev = list_head; - !prev->terminate && (tu_align32(prev->address) != (uint32_t) list_head); - prev = list_next(prev) ) - { - // TODO check type for ISO iTD and siTD - ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev); - if ( qhd->dev_addr == dev_addr ) - { - // TODO deactive all TD, wait for QHD to inactive before removal - prev->address = qhd->next.address; - - // EHCI 4.8.2 link the removed qhd to async head (which always reachable by Host Controller) - qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1); - - if ( qhd->int_smask ) - { - // period list queue element is guarantee to be free in the next frame (1 ms) - qhd->used = 0; - }else - { - // async list use async advance handshake - // mark as removing, will completely re-usable when async advance isr occurs - qhd->removing = 1; - } - } - } -} - -// Close all opened endpoint belong to this device -void hcd_device_close(uint8_t rhport, uint8_t dev_addr) -{ - // skip dev0 - if (dev_addr == 0) return; - - // Remove from async list - list_remove_qhd_by_addr( (ehci_link_t*) qhd_async_head(rhport), dev_addr ); - - // Remove from all interval period list - for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) - { - list_remove_qhd_by_addr( (ehci_link_t*) &ehci_data.period_head_arr[i], dev_addr); - } - - // Async doorbell (EHCI 4.8.2 for operational details) - ehci_data.regs->command_bm.async_adv_doorbell = 1; -} - -// EHCI controller init -bool hcd_ehci_init(uint8_t rhport) -{ - tu_memclr(&ehci_data, sizeof(ehci_data_t)); - - ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(rhport); - - ehci_registers_t* regs = ehci_data.regs; - - //------------- CTRLDSSEGMENT Register (skip) -------------// - //------------- USB INT Register -------------// - regs->inten = 0; // 1. disable all the interrupt - regs->status = EHCI_INT_MASK_ALL; // 2. clear all status - - regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE | - EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER; - - //------------- Asynchronous List -------------// - ehci_qhd_t * const async_head = qhd_async_head(rhport); - tu_memclr(async_head, sizeof(ehci_qhd_t)); - - async_head->next.address = (uint32_t) async_head; // circular list, next is itself - async_head->next.type = EHCI_QTYPE_QHD; - async_head->head_list_flag = 1; - async_head->qtd_overlay.halted = 1; // inactive most of time - async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified - - regs->async_list_addr = (uint32_t) async_head; - - //------------- Periodic List -------------// - // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only - for(uint32_t i=0; i<4; i++) - { - ehci_data.period_head_arr[i].int_smask = 1; // queue head in period list must have smask non-zero - ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive - } - - ehci_link_t * const framelist = ehci_data.period_framelist; - ehci_link_t * const period_1ms = get_period_head(rhport, 1); - // all links --> period_head_arr[0] (1ms) - // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms) - // 1, 5 --> period_head_arr[2] (4ms) - // 3 --> period_head_arr[3] (8ms) - - // TODO EHCI_FRAMELIST_SIZE with other size than 8 - for(uint32_t i=0; iterminate = 1; - - regs->periodic_list_base = (uint32_t) framelist; - - //------------- TT Control (NXP only) -------------// - regs->nxp_tt_control = 0; - - //------------- USB CMD Register -------------// - regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) - | TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint - | ((EHCI_CFG_FRAMELIST_SIZE_BITS & TU_BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) - | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); - - //------------- ConfigFlag Register (skip) -------------// - regs->portsc_bm.port_power = 1; // enable port power - - return true; -} - -#if 0 -static void ehci_stop(uint8_t rhport) -{ - (void) rhport; - - ehci_registers_t* regs = ehci_data.regs; - - regs->command_bm.run_stop = 0; - - // USB Spec: controller has to stop within 16 uframe = 2 frames - while( regs->status_bm.hc_halted == 0 ) {} -} -#endif - -//--------------------------------------------------------------------+ -// CONTROL PIPE API -//--------------------------------------------------------------------+ -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -{ - (void) rhport; - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - // FIXME control only for now - if ( epnum == 0 ) - { - ehci_qhd_t* qhd = qhd_control(dev_addr); - ehci_qtd_t* qtd = qtd_control(dev_addr); - - qtd_init(qtd, buffer, buflen); - - // first first data toggle is always 1 (data & setup stage) - qtd->data_toggle = 1; - qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; - qtd->int_on_complete = 1; - qtd->next.terminate = 1; - - // sw region - qhd->p_qtd_list_head = qtd; - qhd->p_qtd_list_tail = qtd; - - // attach TD - qhd->qtd_overlay.next.address = (uint32_t) qtd; - }else - { - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - ehci_qtd_t *p_qtd = qtd_find_free(); - TU_ASSERT(p_qtd); - - qtd_init(p_qtd, buffer, buflen); - p_qtd->pid = p_qhd->pid; - - // Insert TD to QH - qtd_insert_to_qhd(p_qhd, p_qtd); - - p_qhd->p_qtd_list_tail->int_on_complete = 1; - - // attach head QTD to QHD start transferring - p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; - } - - return true; -} - -bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) -{ - (void) rhport; - - ehci_qhd_t* qhd = &ehci_data.control[dev_addr].qhd; - ehci_qtd_t* td = &ehci_data.control[dev_addr].qtd; - - qtd_init(td, (void*) setup_packet, 8); - td->pid = EHCI_PID_SETUP; - td->int_on_complete = 1; - td->next.terminate = 1; - - // sw region - qhd->p_qtd_list_head = td; - qhd->p_qtd_list_tail = td; - - // attach TD - qhd->qtd_overlay.next.address = (uint32_t) td; - - return true; -} - -//--------------------------------------------------------------------+ -// BULK/INT/ISO PIPE API -//--------------------------------------------------------------------+ -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) -{ - (void) rhport; - - // TODO not support ISO yet - TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - - //------------- Prepare Queue Head -------------// - ehci_qhd_t * p_qhd; - - if ( ep_desc->bEndpointAddress == 0 ) - { - p_qhd = qhd_control(dev_addr); - }else - { - p_qhd = qhd_find_free(); - } - TU_ASSERT(p_qhd); - - qhd_init(p_qhd, dev_addr, ep_desc); - - // control of dev0 is always present as async head - if ( dev_addr == 0 ) return true; - - // Insert to list - ehci_link_t * list_head = NULL; - - switch (ep_desc->bmAttributes.xfer) - { - case TUSB_XFER_CONTROL: - case TUSB_XFER_BULK: - list_head = (ehci_link_t*) qhd_async_head(rhport); - break; - - case TUSB_XFER_INTERRUPT: - list_head = get_period_head(rhport, p_qhd->interval_ms); - break; - - case TUSB_XFER_ISOCHRONOUS: - // TODO iso is not supported - break; - - default: break; - } - - TU_ASSERT(list_head); - - // TODO might need to disable async/period list - list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD); - - return true; -} - -bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) -{ - //------------- set up QTD -------------// - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - ehci_qtd_t *p_qtd = qtd_find_free(); - - TU_ASSERT(p_qtd); - - qtd_init(p_qtd, buffer, total_bytes); - p_qtd->pid = p_qhd->pid; - - //------------- insert TD to TD list -------------// - qtd_insert_to_qhd(p_qhd, p_qtd); - - return true; -} - -bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) -{ - TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) ); - - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - - if ( int_on_complete ) - { // the just added qtd is pointed by list_tail - p_qhd->p_qtd_list_tail->int_on_complete = 1; - } - p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; // attach head QTD to QHD start transferring - - return true; -} - -bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) -{ - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); -} - -bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) -{ - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); -} - -bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) -{ - ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); - p_qhd->qtd_overlay.halted = 0; - // TODO reset data toggle ? - return true; -} - -//--------------------------------------------------------------------+ -// EHCI Interrupt Handler -//--------------------------------------------------------------------+ - -// async_advance is handshake between usb stack & ehci controller. -// This isr mean it is safe to modify previously removed queue head from async list. -// In tinyusb, queue head is only removed when device is unplugged. -static void async_advance_isr(uint8_t rhport) -{ - (void) rhport; - - ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; - for(uint32_t i = 0; i < HCD_MAX_ENDPOINT; i++) - { - if ( qhd_pool[i].removing ) - { - qhd_pool[i].removing = 0; - qhd_pool[i].used = 0; - } - } -} - -static void port_connect_status_change_isr(uint8_t hostid) -{ - // NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device - if (ehci_data.regs->portsc_bm.current_connect_status) - { - hcd_port_reset(hostid); - hcd_event_device_attach(hostid, true); - }else // device unplugged - { - hcd_event_device_remove(hostid, true); - } -} - -static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) -{ - // free all TDs from the head td to the first active TD - while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active) - { - // TD need to be freed and removed from qhd, before invoking callback - bool is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0); - p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; - - p_qhd->p_qtd_list_head->used = 0; // free QTD - qtd_remove_1st_from_qhd(p_qhd); - - if (is_ioc) - { - // end of request - // call USBH callback - hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), p_qhd->total_xferred_bytes, XFER_RESULT_SUCCESS, true); - p_qhd->total_xferred_bytes = 0; - } - } -} - -static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head) -{ - ehci_qhd_t *p_qhd = async_head; - do - { - if ( !p_qhd->qtd_overlay.halted ) // halted or error is processed in error isr - { - qhd_xfer_complete_isr(p_qhd); - } - p_qhd = qhd_next(p_qhd); - }while(p_qhd != async_head); // async list traversal, stop if loop around -} - -static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) -{ - uint16_t max_loop = 0; - uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); - ehci_link_t next_item = * get_period_head(hostid, interval_ms); - - // TODO abstract max loop guard for period - while( !next_item.terminate && - !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) && - max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUSB_HOST_DEVICE_MAX) - { - switch ( next_item.type ) - { - case EHCI_QTYPE_QHD: - { - ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); - if ( !p_qhd_int->qtd_overlay.halted ) - { - qhd_xfer_complete_isr(p_qhd_int); - } - } - break; - - case EHCI_QTYPE_ITD: // TODO support hs/fs ISO - case EHCI_QTYPE_SITD: - case EHCI_QTYPE_FSTN: - - default: break; - } - - next_item = *list_next(&next_item); - max_loop++; - } -} - -static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) -{ - if ( (p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL - qhd_has_xact_error(p_qhd) ) - { - // current qhd has error in transaction - xfer_result_t error_event; - - // no error bits are set, endpoint is halted due to STALL - error_event = qhd_has_xact_error(p_qhd) ? XFER_RESULT_FAILED : XFER_RESULT_STALLED; - - p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; - -// if ( XFER_RESULT_FAILED == error_event ) TU_BREAKPOINT(); // TODO skip unplugged device - - p_qhd->p_qtd_list_head->used = 0; // free QTD - qtd_remove_1st_from_qhd(p_qhd); - - if ( 0 == p_qhd->ep_number ) - { - // control cannot be halted --> clear all qtd list - p_qhd->p_qtd_list_head = NULL; - p_qhd->p_qtd_list_tail = NULL; - - p_qhd->qtd_overlay.next.terminate = 1; - p_qhd->qtd_overlay.alternate.terminate = 1; - p_qhd->qtd_overlay.halted = 0; - - ehci_qtd_t *p_setup = qtd_control(p_qhd->dev_addr); - p_setup->used = 0; - } - - // call USBH callback - hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), p_qhd->total_xferred_bytes, error_event, true); - - p_qhd->total_xferred_bytes = 0; - } -} - -static void xfer_error_isr(uint8_t hostid) -{ - //------------- async list -------------// - ehci_qhd_t * const async_head = qhd_async_head(hostid); - ehci_qhd_t *p_qhd = async_head; - do - { - qhd_xfer_error_isr( p_qhd ); - p_qhd = qhd_next(p_qhd); - }while(p_qhd != async_head); // async list traversal, stop if loop around - - //------------- TODO refractor period list -------------// - uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); - for (uint8_t interval_ms=1; interval_ms <= EHCI_FRAMELIST_SIZE; interval_ms *= 2) - { - ehci_link_t next_item = * get_period_head(hostid, interval_ms); - - // TODO abstract max loop guard for period - while( !next_item.terminate && - !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) ) - { - switch ( next_item.type ) - { - case EHCI_QTYPE_QHD: - { - ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); - qhd_xfer_error_isr(p_qhd_int); - } - break; - - // TODO support hs/fs ISO - case EHCI_QTYPE_ITD: - case EHCI_QTYPE_SITD: - case EHCI_QTYPE_FSTN: - default: break; - } - - next_item = *list_next(&next_item); - } - } -} - -//------------- Host Controller Driver's Interrupt Handler -------------// -void hcd_int_handler(uint8_t rhport) -{ - ehci_registers_t* regs = ehci_data.regs; - - uint32_t int_status = regs->status; - int_status &= regs->inten; - - regs->status |= int_status; // Acknowledge handled interrupt - - if (int_status == 0) return; - - if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER) - { - ehci_data.uframe_number += (EHCI_FRAMELIST_SIZE << 3); - } - - if (int_status & EHCI_INT_MASK_PORT_CHANGE) - { - uint32_t port_status = regs->portsc & EHCI_PORTSC_MASK_ALL; - - if (regs->portsc_bm.connect_status_change) - { - port_connect_status_change_isr(rhport); - } - - regs->portsc |= port_status; // Acknowledge change bits in portsc - } - - if (int_status & EHCI_INT_MASK_ERROR) - { - xfer_error_isr(rhport); - } - - //------------- some QTD/SITD/ITD with IOC set is completed -------------// - if (int_status & EHCI_INT_MASK_NXP_ASYNC) - { - async_list_xfer_complete_isr( qhd_async_head(rhport) ); - } - - if (int_status & EHCI_INT_MASK_NXP_PERIODIC) - { - for (uint8_t i=1; i <= EHCI_FRAMELIST_SIZE; i *= 2) - { - period_list_xfer_complete_isr( rhport, i ); - } - } - - //------------- There is some removed async previously -------------// - if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC - { - async_advance_isr(rhport); - } -} - -//--------------------------------------------------------------------+ -// HELPER -//--------------------------------------------------------------------+ - - -//------------- queue head helper -------------// -static inline ehci_qhd_t* qhd_find_free (void) -{ - for (uint32_t i=0; inext.address); -} - -static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) -{ - ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; - - for(uint32_t i=0; inext.address); -} - -static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) -{ - if (p_qhd->p_qtd_list_head == p_qhd->p_qtd_list_tail) // last TD --> make it NULL - { - p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = NULL; - }else - { - p_qhd->p_qtd_list_head = qtd_next( p_qhd->p_qtd_list_head ); - } -} - -static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) -{ - if (p_qhd->p_qtd_list_head == NULL) // empty list - { - p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = p_qtd_new; - }else - { - p_qhd->p_qtd_list_tail->next.address = (uint32_t) p_qtd_new; - p_qhd->p_qtd_list_tail = p_qtd_new; - } -} - -static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) -{ - // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise) - if (dev_addr != 0) - { - tu_memclr(p_qhd, sizeof(ehci_qhd_t)); - } - - uint8_t const xfer_type = ep_desc->bmAttributes.xfer; - uint8_t const interval = ep_desc->bInterval; - - p_qhd->dev_addr = dev_addr; - p_qhd->fl_inactive_next_xact = 0; - p_qhd->ep_number = tu_edpt_number(ep_desc->bEndpointAddress); - p_qhd->ep_speed = _usbh_devices[dev_addr].speed; - p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; - p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head - p_qhd->max_packet_size = ep_desc->wMaxPacketSize.size; - p_qhd->fl_ctrl_ep_flag = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->ep_speed != TUSB_SPEED_HIGH)) ? 1 : 0; - p_qhd->nak_reload = 0; - - // Bulk/Control -> smask = cmask = 0 - // TODO Isochronous - if (TUSB_XFER_INTERRUPT == xfer_type) - { - if (TUSB_SPEED_HIGH == p_qhd->ep_speed) - { - TU_ASSERT( interval <= 16, ); - if ( interval < 4) // sub milisecond interval - { - p_qhd->interval_ms = 0; - p_qhd->int_smask = (interval == 1) ? TU_BIN8(11111111) : - (interval == 2) ? TU_BIN8(10101010) : TU_BIN8(01000100); - }else - { - p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 ); - p_qhd->int_smask = TU_BIT(interval % 8); - } - }else - { - TU_ASSERT( 0 != interval, ); - // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes - p_qhd->int_smask = 0x01; - p_qhd->fl_int_cmask = TU_BIN8(11100); - p_qhd->interval_ms = interval; - } - }else - { - p_qhd->int_smask = p_qhd->fl_int_cmask = 0; - } - - p_qhd->fl_hub_addr = _usbh_devices[dev_addr].hub_addr; - p_qhd->fl_hub_port = _usbh_devices[dev_addr].hub_port; - p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet - - //------------- HCD Management Data -------------// - p_qhd->used = 1; - p_qhd->removing = 0; - p_qhd->p_qtd_list_head = NULL; - p_qhd->p_qtd_list_tail = NULL; - p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint - - //------------- active, but no TD list -------------// - p_qhd->qtd_overlay.halted = 0; - p_qhd->qtd_overlay.next.terminate = 1; - p_qhd->qtd_overlay.alternate.terminate = 1; - if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid == EHCI_PID_OUT) - { - p_qhd->qtd_overlay.ping_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11 - } -} - -static void qtd_init(ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes) -{ - tu_memclr(p_qtd, sizeof(ehci_qtd_t)); - - p_qtd->used = 1; - - p_qtd->next.terminate = 1; // init to null - p_qtd->alternate.terminate = 1; // not used, always set to terminated - p_qtd->active = 1; - p_qtd->err_count = 3; // TODO 3 consecutive errors tolerance - p_qtd->data_toggle = 0; - p_qtd->total_bytes = total_bytes; - p_qtd->expected_bytes = total_bytes; - - p_qtd->buffer[0] = (uint32_t) buffer; - for(uint8_t i=1; i<5; i++) - { - p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; - } -} - -//------------- List Managing Helper -------------// -static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) -{ - new->address = current->address; - current->address = ((uint32_t) new) | (new_type << 1); -} - -static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) -{ - return (ehci_link_t*) tu_align32(p_link_pointer->address); -} - -#endif diff --git a/src/host/ehci/ehci.h b/src/host/ehci/ehci.h deleted file mode 100644 index d8218a5fd..000000000 --- a/src/host/ehci/ehci.h +++ /dev/null @@ -1,462 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup Group_HCD - * @{ - * \defgroup EHCI - * \brief EHCI driver. All documents sources mentioned here (eg section 3.5) is referring to EHCI Specs unless state otherwise - * @{ */ - -#ifndef _TUSB_EHCI_H_ -#define _TUSB_EHCI_H_ - -#include "common/tusb_common.h" -#include "../hcd.h" - -/* Abbreviation - * HC: Host Controller - * HCD: Host Controller Driver - * QHD: Queue Head for non-ISO transfer - * QTD: Queue Transfer Descriptor for non-ISO transfer - * ITD: Iso Transfer Descriptor for highspeed - * SITD: Split ISO Transfer Descriptor for full-speed - * SMASK: Start Split mask for Slipt Transaction - * CMASK: Complete Split mask for Slipt Transaction -*/ - -#ifdef __cplusplus - extern "C" { -#endif - -//--------------------------------------------------------------------+ -// EHCI CONFIGURATION & CONSTANTS -//--------------------------------------------------------------------+ -#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8) -#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS) - -// TODO merge OHCI with EHCI -enum { - EHCI_MAX_ITD = 4, - EHCI_MAX_SITD = 16 -}; - -//------------- Validation -------------// -TU_VERIFY_STATIC(EHCI_CFG_FRAMELIST_SIZE_BITS <= 7, "incorrect value"); - -//--------------------------------------------------------------------+ -// EHCI Data Structure -//--------------------------------------------------------------------+ -enum -{ - EHCI_QTYPE_ITD = 0 , - EHCI_QTYPE_QHD , - EHCI_QTYPE_SITD , - EHCI_QTYPE_FSTN -}; - -/// EHCI PID -enum -{ - EHCI_PID_OUT = 0 , - EHCI_PID_IN , - EHCI_PID_SETUP -}; - -/// Link pointer -typedef union { - uint32_t address; - struct { - uint32_t terminate : 1; - uint32_t type : 2; - }; -}ehci_link_t; - -/// Queue Element Transfer Descriptor -/// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with TU_ATTR_ALIGNED(32) -typedef struct -{ - // Word 0: Next QTD Pointer - ehci_link_t next; - - // Word 1: Alternate Next QTD Pointer (not used) - union{ - ehci_link_t alternate; - struct { - uint32_t : 5; - uint32_t used : 1; - uint32_t : 10; - uint32_t expected_bytes : 16; - }; - }; - - // Word 2: qTQ Token - volatile uint32_t ping_err : 1 ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator - volatile uint32_t non_hs_split_state : 1 ; ///< Used by HC to track the state of slipt transaction - volatile uint32_t non_hs_missed_uframe : 1 ; ///< HC misses a complete slip transaction - volatile uint32_t xact_err : 1 ; ///< Error (Timeout, CRC, Bad PID ... ) - volatile uint32_t babble_err : 1 ; ///< Babble detected, also set Halted bit to 1 - volatile uint32_t buffer_err : 1 ; ///< Data overrun/underrun error - volatile uint32_t halted : 1 ; ///< Serious error or STALL received - volatile uint32_t active : 1 ; ///< Start transfer, clear by HC when complete - - uint32_t pid : 2 ; ///< 0: OUT, 1: IN, 2 Setup - volatile uint32_t err_count : 2 ; ///< Error Counter of consecutive errors - volatile uint32_t current_page : 3 ; ///< Index into the qTD buffer pointer list - uint32_t int_on_complete : 1 ; ///< Interrupt on complete - volatile uint32_t total_bytes : 15 ; ///< Transfer bytes, decreased during transaction - volatile uint32_t data_toggle : 1 ; ///< Data Toogle bit - - - /// Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page - uint32_t buffer[5]; -} ehci_qtd_t; - -TU_VERIFY_STATIC( sizeof(ehci_qtd_t) == 32, "size is not correct" ); - -/// Queue Head -typedef struct TU_ATTR_ALIGNED(32) -{ - // Word 0: Next QHD - ehci_link_t next; - - // Word 1: Endpoint Characteristics - uint32_t dev_addr : 7 ; ///< device address - uint32_t fl_inactive_next_xact : 1 ; ///< Only valid for Periodic with Full/Slow speed - uint32_t ep_number : 4 ; ///< EP number - uint32_t ep_speed : 2 ; ///< 0: Full, 1: Low, 2: High - uint32_t data_toggle_control : 1 ; ///< 0: use DT in qHD, 1: use DT in qTD - uint32_t head_list_flag : 1 ; ///< Head of the queue - uint32_t max_packet_size : 11 ; ///< Max packet size - uint32_t fl_ctrl_ep_flag : 1 ; ///< 1 if is Full/Low speed control endpoint - uint32_t nak_reload : 4 ; ///< Used by HC - - // Word 2: Endpoint Capabilities - uint32_t int_smask : 8 ; ///< Interrupt Schedule Mask - uint32_t fl_int_cmask : 8 ; ///< Split Completion Mask for Full/Slow speed - uint32_t fl_hub_addr : 7 ; ///< Hub Address for Full/Slow speed - uint32_t fl_hub_port : 7 ; ///< Hub Port for Full/Slow speed - uint32_t mult : 2 ; ///< Transaction per micro frame - - // Word 3: Current qTD Pointer - volatile uint32_t qtd_addr; - - // Word 4-11: Transfer Overlay - volatile ehci_qtd_t qtd_overlay; - - //--------------------------------------------------------------------+ - /// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes - /// thus there are 16 bytes padding free that we can make use of. - //--------------------------------------------------------------------+ - uint8_t used; - uint8_t removing; // removed from asyn list, waiting for async advance - uint8_t pid; - uint8_t interval_ms; // polling interval in frames (or milisecond) - - uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set - uint8_t reserved2[2]; - - ehci_qtd_t * volatile p_qtd_list_head; // head of the scheduled TD list - ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list -} ehci_qhd_t; - -TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" ); - -/// Highspeed Isochronous Transfer Descriptor (section 3.3) -typedef struct TU_ATTR_ALIGNED(32) { - // Word 0: Next Link Pointer - ehci_link_t next; - - // Word 1-8: iTD Transaction Status and Control List - struct { - // iTD Control - volatile uint32_t offset : 12 ; ///< This field is a value that is an offset, expressed in bytes, from the beginning of a buffer. - volatile uint32_t page_select : 3 ; ///< These bits are set by software to indicate which of the buffer page pointers the offset field in this slot should be concatenated to produce the starting memory address for this transaction. The valid range of values for this field is 0 to 6 - uint32_t int_on_complete : 1 ; ///< If this bit is set to a one, it specifies that when this transaction completes, the Host Controller should issue an interrupt at the next interrupt threshold - volatile uint32_t length : 12 ; ///< For an OUT, this field is the number of data bytes the host controller will send during the transaction. The host controller is not required to update this field to reflect the actual number of bytes transferred during the transfer - ///< For an IN, the initial value of the field is the number of bytes the host expects the endpoint to deliver. During the status update, the host controller writes back the number of bytes successfully received. The value in this register is the actual byte count - // iTD Status - volatile uint32_t error : 1 ; ///< Set to a one by the Host Controller during status update in the case where the host did not receive a valid response from the device (Timeout, CRC, Bad PID, etc.). This bit may only be set for isochronous IN transactions. - volatile uint32_t babble_err : 1 ; ///< Set to a 1 by the Host Controller during status update when a babble is detected during the transaction - volatile uint32_t buffer_err : 1 ; ///< Set to a 1 by the Host Controller during status update to indicate that the Host Controller is unable to keep up with the reception of incoming data (overrun) or is unable to supply data fast enough during transmission (underrun). - volatile uint32_t active : 1 ; ///< Set to 1 by software to enable the execution of an isochronous transaction by the Host Controller - } xact[8]; - - // Word 9-15 Buffer Page Pointer List (Plus) - uint32_t BufferPointer[7]; - -// // FIXME: Store meta data into buffer pointer reserved for saving memory -// /*---------- HCD Area ----------*/ -// uint32_t used; -// uint32_t IhdIdx; -// uint32_t reserved[6]; -} ehci_itd_t; - -TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" ); - -/// Split (Full-Speed) Isochronous Transfer Descriptor -typedef struct TU_ATTR_ALIGNED(32) -{ - // Word 0: Next Link Pointer - ehci_link_t next; - - // Word 1: siTD Endpoint Characteristics - uint32_t dev_addr : 7; ///< This field selects the specific device serving as the data source or sink. - uint32_t : 1; ///< reserved - uint32_t ep_number : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink. - uint32_t : 4; ///< This field is reserved and should be set to zero. - uint32_t hub_addr : 7; ///< This field holds the device address of the transaction translators’ hub. - uint32_t : 1; ///< reserved - uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. - uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. - - // Word 2: Micro-frame Schedule Control - uint8_t int_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions - uint8_t fl_int_cmask; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions. - uint16_t reserved ; ///< reserved - - // Word 3: siTD Transfer Status and Control - // Status [7:0] TODO indentical to qTD Token'status --> refractor later - volatile uint32_t : 1 ; // reserved - volatile uint32_t split_state : 1 ; - volatile uint32_t missed_uframe : 1 ; - volatile uint32_t xact_err : 1 ; - volatile uint32_t babble_err : 1 ; - volatile uint32_t buffer_err : 1 ; - volatile uint32_t error : 1 ; - volatile uint32_t active : 1 ; - // Micro-frame Schedule Control - volatile uint32_t cmask_progress : 8 ; ///< This field is used by the host controller to record which split-completes have been executed. See Section 4.12.3.3.2 for behavioral requirements. - volatile uint32_t total_bytes : 10 ; ///< This field is initialized by software to the total number of bytes expected in this transfer. Maximum value is 1023 - volatile uint32_t : 4 ; ///< reserved - volatile uint32_t page_select : 1 ; ///< Used to indicate which data page pointer should be concatenated with the CurrentOffsetfield to construct a data buffer pointer - uint32_t int_on_complete : 1 ; ///< Do not interrupt when transaction is complete. 1 = Do interrupt when transaction is complete - uint32_t : 0 ; // padding to the end of current storage unit - - /// Word 4-5: Buffer Pointer List - uint32_t buffer[2]; // buffer[1] TP: Transaction Position - T-Count: Transaction Count - -// union{ -// uint32_t BufferPointer1; -// struct { -// volatile uint32_t TCount : 3; -// volatile uint32_t TPosition : 2; -// }; -// }; - - /*---------- Word 6 ----------*/ - ehci_link_t back; - - /// SITD is 32-byte aligned but occupies only 28 --> 4 bytes for storing extra data - uint8_t used; - uint8_t ihd_idx; - uint8_t reserved2[2]; -} ehci_sitd_t; - -TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" ); - -//--------------------------------------------------------------------+ -// EHCI Operational Register -//--------------------------------------------------------------------+ -enum ehci_interrupt_mask_{ - EHCI_INT_MASK_USB = TU_BIT(0), - EHCI_INT_MASK_ERROR = TU_BIT(1), - EHCI_INT_MASK_PORT_CHANGE = TU_BIT(2), - - EHCI_INT_MASK_FRAMELIST_ROLLOVER = TU_BIT(3), - EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4), - EHCI_INT_MASK_ASYNC_ADVANCE = TU_BIT(5), - EHCI_INT_MASK_NXP_SOF = TU_BIT(7), - - EHCI_INT_MASK_NXP_ASYNC = TU_BIT(18), - EHCI_INT_MASK_NXP_PERIODIC = TU_BIT(19), - - EHCI_INT_MASK_ALL = - EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | - EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR | - EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF | - EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC -}; - -enum ehci_usbcmd_pos_ { - EHCI_USBCMD_POS_RUN_STOP = 0, - EHCI_USBCMD_POS_FRAMELIST_SZIE = 2, - EHCI_USBCMD_POS_PERIOD_ENABLE = 4, - EHCI_USBCMD_POS_ASYNC_ENABLE = 5, - EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15, - EHCI_USBCMD_POS_INTERRUPT_THRESHOLD = 16 -}; - -enum ehci_portsc_change_mask_{ - EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0), - EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = TU_BIT(1), - EHCI_PORTSC_MASK_PORT_EANBLED = TU_BIT(2), - EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = TU_BIT(3), - EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = TU_BIT(5), - - EHCI_PORTSC_MASK_PORT_RESET = TU_BIT(8), - - EHCI_PORTSC_MASK_ALL = - EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE | - EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE | - EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE -}; - -typedef volatile struct -{ - union { - uint32_t command; - - struct { - uint32_t run_stop : 1 ; ///< 1=Run. 0=Stop - uint32_t reset : 1 ; ///< SW write 1 to reset HC, clear by HC when complete - uint32_t framelist_size : 2 ; ///< Frame List size 0: 1024, 1: 512, 2: 256 - uint32_t periodic_enable : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule. - uint32_t async_enable : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule. - uint32_t async_adv_doorbell : 1 ; ///< Tell HC to interrupt next time it advances async list. Clear by HC - uint32_t light_reset : 1 ; ///< Reset HC without affecting ports state - uint32_t async_park_count : 2 ; ///< not used by tinyusb - uint32_t : 1 ; - uint32_t async_park_enable : 1 ; ///< Enable park mode, not used by tinyusb - uint32_t : 3 ; - uint32_t nxp_framelist_size_msb : 1 ; ///< NXP customized : Bit 2 of the Frame List Size bits \n 011b: 128 elements \n 100b: 64 elements \n 101b: 32 elements \n 110b: 16 elements \n 111b: 8 elements - uint32_t int_threshold : 8 ; ///< Default 08h. Interrupt rate in unit of micro frame - }command_bm; - }; - - union { - uint32_t status; - - struct { - uint32_t usb : 1 ; ///< qTD with IOC is retired - uint32_t usb_error : 1 ; ///< qTD retired due to error - uint32_t port_change_detect : 1 ; ///< Set when PortOwner or ForcePortResume change from 0 -> 1 - uint32_t framelist_rollover : 1 ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles. - uint32_t pci_host_system_error : 1 ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs. - uint32_t async_adv : 1 ; ///< Async Advance interrupt - uint32_t : 1 ; - uint32_t nxp_int_sof : 1 ; ///< NXP customized: this bit will be set every 125us and can be used by host controller driver as a time base. - uint32_t : 4 ; - uint32_t hc_halted : 1 ; ///< Opposite value to run_stop bit. - uint32_t reclamation : 1 ; ///< Used to detect empty async shecudle - uint32_t periodic_status : 1 ; ///< Periodic schedule status - uint32_t async_status : 1 ; ///< Async schedule status - uint32_t : 2 ; - uint32_t nxp_int_async : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule. - uint32_t nxp_int_period : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule. - uint32_t : 12 ; - }status_bm; - }; - - union{ - uint32_t inten; - - struct { - uint32_t usb : 1 ; - uint32_t usb_error : 1 ; - uint32_t port_change_detect : 1 ; - uint32_t framelist_rollover : 1 ; - uint32_t pci_host_system_error : 1 ; - uint32_t async_adv : 1 ; - uint32_t : 1 ; - uint32_t nxp_int_sof : 1 ; - uint32_t : 10 ; - uint32_t nxp_int_async : 1 ; - uint32_t nxp_int_period : 1 ; - uint32_t : 12 ; - }inten_bm; - }; - - uint32_t frame_index ; ///< Micro frame counter - uint32_t ctrl_ds_seg ; ///< Control Data Structure Segment - uint32_t periodic_list_base ; ///< Beginning address of perodic frame list - uint32_t async_list_addr ; ///< Address of next async QHD to be executed - uint32_t nxp_tt_control ; ///< nxp embedded transaction translator (reserved by EHCI specs) - uint32_t reserved[8] ; - uint32_t config_flag ; ///< not used by NXP - - union { - uint32_t portsc ; ///< port status and control - struct { - uint32_t current_connect_status : 1; ///< 0: No device, 1: Device is present on port - uint32_t connect_status_change : 1; ///< Change in Current Connect Status - uint32_t port_enabled : 1; ///< Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable - uint32_t port_enable_change : 1; ///< Port Enabled has changed - uint32_t over_current_active : 1; ///< Port has an over-current condition - uint32_t over_current_change : 1; ///< Change to Over-current Active - uint32_t force_port_resume : 1; ///< Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit. - uint32_t suspend : 1; ///< Port in suspend state - uint32_t port_reset : 1; ///< 1=Port is in Reset. 0=Port is not in Reset - uint32_t nxp_highspeed_status : 1; ///< NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode - uint32_t line_status : 2; ///< D+/D- state: 00: SE0, 10: J-state, 01: K-state - uint32_t port_power : 1; ///< 0= power off, 1= power on - uint32_t port_owner : 1; ///< not used by NXP - uint32_t port_indicator_control : 2; ///< 00b: off, 01b: Amber, 10b: green, 11b: undefined - uint32_t port_test_control : 4; ///< Port test mode, not used by tinyusb - uint32_t wake_on_connect_enable : 1; ///< Enables device connects as wake-up events - uint32_t wake_on_disconnect_enable : 1; ///< Enables device disconnects as wake-up events - uint32_t wake_on_over_current_enable : 1; ///< Enables over-current conditions as wake-up events - uint32_t nxp_phy_clock_disable : 1; ///< NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock - uint32_t nxp_port_force_fullspeed : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device. - uint32_t : 1; - uint32_t nxp_port_speed : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed - uint32_t TU_RESERVED : 4; - }portsc_bm; - }; -}ehci_registers_t; - -//--------------------------------------------------------------------+ -// EHCI Data Organization -//--------------------------------------------------------------------+ -typedef struct -{ - ehci_link_t period_framelist[EHCI_FRAMELIST_SIZE]; - - // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist) - // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms - ehci_qhd_t period_head_arr[4]; - - // Note control qhd of dev0 is used as head of async list - struct { - ehci_qhd_t qhd; - ehci_qtd_t qtd; - }control[CFG_TUSB_HOST_DEVICE_MAX+1]; - - ehci_qhd_t qhd_pool[HCD_MAX_ENDPOINT]; - ehci_qtd_t qtd_pool[HCD_MAX_XFER] TU_ATTR_ALIGNED(32); - - ehci_registers_t* regs; - - volatile uint32_t uframe_number; -}ehci_data_t; - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_EHCI_H_ */ - -/** @} */ -/** @} */ diff --git a/src/host/ohci/ohci.c b/src/host/ohci/ohci.c deleted file mode 100644 index 44acebf72..000000000 --- a/src/host/ohci/ohci.c +++ /dev/null @@ -1,686 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include - -#if TUSB_OPT_HOST_ENABLED && (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "osal/osal.h" - -#include "../hcd.h" -#include "../usbh_hcd.h" -#include "ohci.h" - -// TODO remove -#include "chip.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -#define OHCI_REG ((ohci_registers_t *) LPC_USB_BASE) - -enum { - OHCI_CONTROL_FUNCSTATE_RESET = 0, - OHCI_CONTROL_FUNCSTATE_RESUME, - OHCI_CONTROL_FUNCSTATE_OPERATIONAL, - OHCI_CONTROL_FUNCSTATE_SUSPEND -}; - -enum { - OHCI_CONTROL_CONTROL_BULK_RATIO = 3, ///< This specifies the service ratio between Control and Bulk EDs. 0 = 1:1, 3 = 4:1 - OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK = TU_BIT(2), - OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = TU_BIT(3), - OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK = TU_BIT(4), - OHCI_CONTROL_LIST_BULK_ENABLE_MASK = TU_BIT(5), -}; - -enum { - OHCI_FMINTERVAL_FI = 0x2EDF, // 7.3.1 nominal (reset) value - OHCI_FMINTERVAL_FSMPS = (6*(OHCI_FMINTERVAL_FI-210)) / 7, // 5.4 calculated based on maximum overhead + bit stuffing -}; - -enum { - OHCI_PERIODIC_START = 0x3E67 -}; - -enum { - OHCI_INT_SCHEDULING_OVERUN_MASK = TU_BIT(0), - OHCI_INT_WRITEBACK_DONEHEAD_MASK = TU_BIT(1), - OHCI_INT_SOF_MASK = TU_BIT(2), - OHCI_INT_RESUME_DETECTED_MASK = TU_BIT(3), - OHCI_INT_UNRECOVERABLE_ERROR_MASK = TU_BIT(4), - OHCI_INT_FRAME_OVERFLOW_MASK = TU_BIT(5), - OHCI_INT_RHPORT_STATUS_CHANGE_MASK = TU_BIT(6), - - OHCI_INT_OWNERSHIP_CHANGE_MASK = TU_BIT(30), - OHCI_INT_MASTER_ENABLE_MASK = TU_BIT(31), -}; - -enum { - OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK = TU_BIT(0), - OHCI_RHPORT_PORT_ENABLE_STATUS_MASK = TU_BIT(1), - OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK = TU_BIT(2), - OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = TU_BIT(3), - OHCI_RHPORT_PORT_RESET_STATUS_MASK = TU_BIT(4), ///< write '1' to reset port - - OHCI_RHPORT_PORT_POWER_STATUS_MASK = TU_BIT(8), - OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK = TU_BIT(9), - - OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK = TU_BIT(16), - OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK = TU_BIT(17), - OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK = TU_BIT(18), - OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK = TU_BIT(19), - OHCI_RHPORT_PORT_RESET_CHANGE_MASK = TU_BIT(20), - - OHCI_RHPORT_ALL_CHANGE_MASK = OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK | OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK | - OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK | OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK | OHCI_RHPORT_PORT_RESET_CHANGE_MASK -}; - -enum { - OHCI_CCODE_NO_ERROR = 0, - OHCI_CCODE_CRC = 1, - OHCI_CCODE_BIT_STUFFING = 2, - OHCI_CCODE_DATA_TOGGLE_MISMATCH = 3, - OHCI_CCODE_STALL = 4, - OHCI_CCODE_DEVICE_NOT_RESPONDING = 5, - OHCI_CCODE_PID_CHECK_FAILURE = 6, - OHCI_CCODE_UNEXPECTED_PID = 7, - OHCI_CCODE_DATA_OVERRUN = 8, - OHCI_CCODE_DATA_UNDERRUN = 9, - OHCI_CCODE_BUFFER_OVERRUN = 12, - OHCI_CCODE_BUFFER_UNDERRUN = 13, - OHCI_CCODE_NOT_ACCESSED = 14, -}; - -enum { - OHCI_INT_ON_COMPLETE_YES = 0, - OHCI_INT_ON_COMPLETE_NO = TU_BIN8(111) -}; -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data; - -static ohci_ed_t * const p_ed_head[] = -{ - [TUSB_XFER_CONTROL] = &ohci_data.control[0].ed, - [TUSB_XFER_BULK ] = &ohci_data.bulk_head_ed, - [TUSB_XFER_INTERRUPT] = &ohci_data.period_head_ed, - [TUSB_XFER_ISOCHRONOUS] = NULL // TODO Isochronous -}; - -static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed); -static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); - -//--------------------------------------------------------------------+ -// USBH-HCD API -//--------------------------------------------------------------------+ -// Initialization according to 5.1.1.4 -bool hcd_init(uint8_t rhport) -{ - (void) rhport; - - //------------- Data Structure init -------------// - tu_memclr(&ohci_data, sizeof(ohci_data_t)); - for(uint8_t i=0; i<32; i++) - { // assign all interrupt pointes to period head ed - ohci_data.hcca.interrupt_table[i] = (uint32_t) &ohci_data.period_head_ed; - } - - ohci_data.control[0].ed.skip = 1; - ohci_data.bulk_head_ed.skip = 1; - ohci_data.period_head_ed.skip = 1; - - // reset controller - OHCI_REG->command_status_bit.controller_reset = 1; - while( OHCI_REG->command_status_bit.controller_reset ) {} // should not take longer than 10 us - - //------------- init ohci registers -------------// - OHCI_REG->control_head_ed = (uint32_t) &ohci_data.control[0].ed; - OHCI_REG->bulk_head_ed = (uint32_t) &ohci_data.bulk_head_ed; - OHCI_REG->hcca = (uint32_t) &ohci_data.hcca; - - OHCI_REG->interrupt_disable = OHCI_REG->interrupt_enable; // disable all interrupts - OHCI_REG->interrupt_status = OHCI_REG->interrupt_status; // clear current set bits - OHCI_REG->interrupt_enable = OHCI_INT_WRITEBACK_DONEHEAD_MASK | OHCI_INT_RESUME_DETECTED_MASK | - OHCI_INT_UNRECOVERABLE_ERROR_MASK | OHCI_INT_FRAME_OVERFLOW_MASK | OHCI_INT_RHPORT_STATUS_CHANGE_MASK | - OHCI_INT_MASTER_ENABLE_MASK; - - OHCI_REG->control |= OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK | - OHCI_CONTROL_LIST_BULK_ENABLE_MASK | OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK; // TODO Isochronous - - OHCI_REG->frame_interval = (OHCI_FMINTERVAL_FSMPS << 16) | OHCI_FMINTERVAL_FI; - OHCI_REG->periodic_start = (OHCI_FMINTERVAL_FI * 9) / 10; // Periodic start is 90% of frame interval - - OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power) - OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports - - return true; -} - -uint32_t hcd_uframe_number(uint8_t rhport) -{ - (void) rhport; - return (ohci_data.frame_number_hi << 16 | OHCI_REG->frame_number) << 3; -} - - -//--------------------------------------------------------------------+ -// PORT API -//--------------------------------------------------------------------+ -void hcd_port_reset(uint8_t hostid) -{ - (void) hostid; - OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; -} - -bool hcd_port_connect_status(uint8_t hostid) -{ - (void) hostid; - return OHCI_REG->rhport_status_bit[0].current_connect_status; -} - -tusb_speed_t hcd_port_speed_get(uint8_t hostid) -{ - (void) hostid; - return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL; -} - -// endpoints are tied to an address, which only reclaim after a long delay when enumerating -// thus there is no need to make sure ED is not in HC's cahed as it will not for sure -void hcd_device_close(uint8_t rhport, uint8_t dev_addr) -{ - // TODO OHCI - (void) rhport; - - // addr0 serves as static head --> only set skip bit - if ( dev_addr == 0 ) - { - ohci_data.control[0].ed.skip = 1; - }else - { - // remove control - ed_list_remove_by_addr( p_ed_head[TUSB_XFER_CONTROL], dev_addr); - - // remove bulk - ed_list_remove_by_addr(p_ed_head[TUSB_XFER_BULK], dev_addr); - - // remove interrupt - ed_list_remove_by_addr(p_ed_head[TUSB_XFER_INTERRUPT], dev_addr); - - // TODO remove ISO - } -} - -//--------------------------------------------------------------------+ -// Controller API -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// CONTROL PIPE API -//--------------------------------------------------------------------+ -static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) -{ - return (p_ed->ep_number == 0 ) ? TUSB_XFER_CONTROL : - (p_ed->is_iso ) ? TUSB_XFER_ISOCHRONOUS : - (p_ed->is_interrupt_xfer ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; -} - -static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval) -{ - (void) interval; - - // address 0 is used as async head, which always on the list --> cannot be cleared - if (dev_addr != 0) - { - tu_memclr(p_ed, sizeof(ohci_ed_t)); - } - - p_ed->dev_addr = dev_addr; - p_ed->ep_number = endpoint_addr & 0x0F; - p_ed->pid = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT ); - p_ed->speed = _usbh_devices[dev_addr].speed; - p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; - p_ed->max_packet_size = max_packet_size; - - p_ed->used = 1; - p_ed->is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0); -} - -static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) -{ - tu_memclr(p_td, sizeof(ohci_gtd_t)); - - p_td->used = 1; - p_td->expected_bytes = total_bytes; - - p_td->buffer_rounding = 1; // less than queued length is not a error - p_td->delay_interrupt = OHCI_INT_ON_COMPLETE_NO; - p_td->condition_code = OHCI_CCODE_NOT_ACCESSED; - - p_td->current_buffer_pointer = data_ptr; - p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; -} - -bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) -{ - (void) rhport; - - ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd; - - gtd_init(p_setup, (void*) setup_packet, 8); - p_setup->index = dev_addr; - p_setup->pid = OHCI_PID_SETUP; - p_setup->data_toggle = TU_BIN8(10); // DATA0 - p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - //------------- Attach TDs list to Control Endpoint -------------// - p_ed->td_head.address = (uint32_t) p_setup; - - OHCI_REG->command_status_bit.control_list_filled = 1; - - return true; -} - -// TODO move around -static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr); -static ohci_gtd_t * gtd_find_free(void); -static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd); - -bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) -{ - (void) rhport; - - uint8_t const epnum = tu_edpt_number(ep_addr); - uint8_t const dir = tu_edpt_dir(ep_addr); - - // FIXME control only for now - if ( epnum == 0 ) - { - ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; - ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd; - - gtd_init(p_data, buffer, buflen); - - p_data->index = dev_addr; - p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; - p_data->data_toggle = TU_BIN8(11); // DATA1 - p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - p_ed->td_head.address = (uint32_t) p_data; - - OHCI_REG->command_status_bit.control_list_filled = 1; - }else - { - ohci_ed_t * p_ed = ed_from_addr(dev_addr, ep_addr); - ohci_gtd_t* p_gtd = gtd_find_free(); - - TU_ASSERT(p_gtd); - - gtd_init(p_gtd, buffer, buflen); - p_gtd->index = p_ed-ohci_data.ed_pool; - p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - td_insert_to_ed(p_ed, p_gtd); - - tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) ); - if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1; - } - - return true; -} - -//--------------------------------------------------------------------+ -// BULK/INT/ISO PIPE API -//--------------------------------------------------------------------+ -static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) -{ - if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed; - - ohci_ed_t* ed_pool = ohci_data.ed_pool; - - for(uint32_t i=0; inext = p_pre->next; - p_pre->next = (uint32_t) p_ed; -} - -static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr) -{ - ohci_ed_t* p_prev = p_head; - - while( p_prev->next ) - { - ohci_ed_t* ed = (ohci_ed_t*) p_prev->next; - - if (ed->dev_addr == dev_addr) - { - // unlink ed - p_prev->next = ed->next; - - // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED - ed->next = (uint32_t) p_head; - ed->used = 0; - } - - // check next valid since we could remove it - if (p_prev->next) p_prev = (ohci_ed_t*) p_prev->next; - } -} - -bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) -{ - (void) rhport; - - // TODO iso support - TU_ASSERT(ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); - - //------------- Prepare Queue Head -------------// - ohci_ed_t * p_ed; - - if ( ep_desc->bEndpointAddress == 0 ) - { - p_ed = &ohci_data.control[dev_addr].ed; - }else - { - p_ed = ed_find_free(); - } - TU_ASSERT(p_ed); - - ed_init( p_ed, dev_addr, ep_desc->wMaxPacketSize.size, ep_desc->bEndpointAddress, - ep_desc->bmAttributes.xfer, ep_desc->bInterval ); - - // control of dev0 is used as static async head - if ( dev_addr == 0 ) - { - p_ed->skip = 0; // only need to clear skip bit - return true; - } - - ed_list_insert( p_ed_head[ep_desc->bmAttributes.xfer], p_ed ); - - return true; -} - -static ohci_gtd_t * gtd_find_free(void) -{ - for(uint8_t i=0; i < HCD_MAX_XFER; i++) - { - if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i]; - } - - return NULL; -} - -static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd) -{ - // tail is always NULL - if ( tu_align16(p_ed->td_head.address) == 0 ) - { // TD queue is empty --> head = TD - p_ed->td_head.address |= (uint32_t) p_gtd; - } - else - { // TODO currently only support queue up to 2 TD each endpoint at a time - ((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd; - } -} - -static bool pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) -{ - ohci_ed_t* const p_ed = ed_from_addr(dev_addr, ep_addr); - - // not support ISO yet - TU_VERIFY ( !p_ed->is_iso ); - - ohci_gtd_t * const p_gtd = gtd_find_free(); - TU_ASSERT(p_gtd); // not enough gtd - - gtd_init(p_gtd, buffer, total_bytes); - p_gtd->index = p_ed-ohci_data.ed_pool; - - if ( int_on_complete ) p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; - - td_insert_to_ed(p_ed, p_gtd); - - return true; -} - -bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) -{ - return pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, false); -} - -bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) -{ - (void) int_on_complete; - TU_ASSERT( pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, true) ); - - tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) ); - - if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1; - - return true; -} - -bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) -{ - ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); - return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail); -} - -bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) -{ - ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); - return p_ed->td_head.halted && p_ed->is_stalled; -} - -bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) -{ - ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); - - p_ed->is_stalled = 0; - p_ed->td_tail &= 0x0Ful; // set tail pointer back to NULL - - p_ed->td_head.toggle = 0; // reset data toggle - p_ed->td_head.halted = 0; - - if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1; - - return true; -} - - -//--------------------------------------------------------------------+ -// OHCI Interrupt Handler -//--------------------------------------------------------------------+ -static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) -{ - ohci_td_item_t* td_reverse_head = NULL; - - while(td_head != NULL) - { - uint32_t next = td_head->next; - - // make current's item become reverse's first item - td_head->next = (uint32_t) td_reverse_head; - td_reverse_head = td_head; - - td_head = (ohci_td_item_t*) next; // advance to next item - } - - return td_reverse_head; -} - -static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd) -{ - return ((uint32_t) p_qtd) < ((uint32_t) ohci_data.gtd_pool); // check ohci_data_t for memory layout -} - -static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd) -{ - if ( gtd_is_control(p_qtd) ) - { - return &ohci_data.control[p_qtd->index].ed; - }else - { - return &ohci_data.ed_pool[p_qtd->index]; - } -} - -static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer) -{ // 5.2.9 OHCI sample code - return (tu_align4k(buffer_end ^ current_buffer) ? 0x1000 : 0) + - tu_offset4k(buffer_end) - tu_offset4k(current_buffer) + 1; -} - -static void done_queue_isr(uint8_t hostid) -{ - (void) hostid; - - // done head is written in reversed order of completion --> need to reverse the done queue first - ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) tu_align16(ohci_data.hcca.done_head) ); - - while( td_head != NULL ) - { - // TODO check if td_head is iso td - //------------- Non ISO transfer -------------// - ohci_gtd_t * const p_qtd = (ohci_gtd_t *) td_head; - xfer_result_t const event = (p_qtd->condition_code == OHCI_CCODE_NO_ERROR) ? XFER_RESULT_SUCCESS : - (p_qtd->condition_code == OHCI_CCODE_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_FAILED; - - p_qtd->used = 0; // free TD - if ( (p_qtd->delay_interrupt == OHCI_INT_ON_COMPLETE_YES) || (event != XFER_RESULT_SUCCESS) ) - { - ohci_ed_t * const p_ed = gtd_get_ed(p_qtd); - - uint32_t const xferred_bytes = p_qtd->expected_bytes - gtd_xfer_byte_left((uint32_t) p_qtd->buffer_end, (uint32_t) p_qtd->current_buffer_pointer); - - // NOTE Assuming the current list is BULK and there is no other EDs in the list has queued TDs. - // When there is a error resulting this ED is halted, and this EP still has other queued TD - // --> the Bulk list only has this halted EP queueing TDs (remaining) - // --> Bulk list will be considered as not empty by HC !!! while there is no attempt transaction on this list - // --> HC will not process Control list (due to service ratio when Bulk list not empty) - // To walk-around this, the halted ED will have TailP = HeadP (empty list condition), when clearing halt - // the TailP must be set back to NULL for processing remaining TDs - if ((event != XFER_RESULT_SUCCESS)) - { - p_ed->td_tail &= 0x0Ful; - p_ed->td_tail |= tu_align16(p_ed->td_head.address); // mark halted EP as empty queue - if ( event == XFER_RESULT_STALLED ) p_ed->is_stalled = 1; - } - - hcd_event_xfer_complete(p_ed->dev_addr, - tu_edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN), - xferred_bytes, event, true); - } - - td_head = (ohci_td_item_t*) td_head->next; - } -} - -void hcd_int_handler(uint8_t hostid) -{ - uint32_t const int_en = OHCI_REG->interrupt_enable; - uint32_t const int_status = OHCI_REG->interrupt_status & int_en; - - if (int_status == 0) return; - - // Frame number overflow - if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK ) - { - ohci_data.frame_number_hi++; - } - - //------------- RootHub status -------------// - if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK ) - { - uint32_t const rhport_status = OHCI_REG->rhport_status[0] & OHCI_RHPORT_ALL_CHANGE_MASK; - - // TODO dual port is not yet supported - if ( rhport_status & OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK ) - { - // TODO check if remote wake-up - if ( OHCI_REG->rhport_status_bit[0].current_connect_status ) - { - // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change) - OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; - hcd_event_device_attach(hostid, true); - }else - { - hcd_event_device_remove(hostid, true); - } - } - - if ( rhport_status & OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK) - { - - } - - OHCI_REG->rhport_status[0] = rhport_status; // acknowledge all interrupt - } - - //------------- Transfer Complete -------------// - if ( int_status & OHCI_INT_WRITEBACK_DONEHEAD_MASK) - { - done_queue_isr(hostid); - } - - OHCI_REG->interrupt_status = int_status; // Acknowledge handled interrupt -} -//--------------------------------------------------------------------+ -// HELPER -//--------------------------------------------------------------------+ - - -#endif - diff --git a/src/host/ohci/ohci.h b/src/host/ohci/ohci.h deleted file mode 100644 index 2915f8b00..000000000 --- a/src/host/ohci/ohci.h +++ /dev/null @@ -1,293 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup Group_HCD - * @{ - * \defgroup OHCI - * \brief OHCI driver. All documents sources mentioned here (eg section 3.5) is referring to OHCI Specs unless state otherwise - * @{ */ - -#ifndef _TUSB_OHCI_H_ -#define _TUSB_OHCI_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -#include "common/tusb_common.h" - -//--------------------------------------------------------------------+ -// OHCI CONFIGURATION & CONSTANTS -//--------------------------------------------------------------------+ -#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed -#define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS) - -// TODO merge OHCI with EHCI -enum { - OHCI_MAX_ITD = 4 -}; - -enum { - OHCI_PID_SETUP = 0, - OHCI_PID_OUT, - OHCI_PID_IN, -}; - -//--------------------------------------------------------------------+ -// OHCI Data Structure -//--------------------------------------------------------------------+ -typedef struct { - uint32_t interrupt_table[32]; - volatile uint16_t frame_number; - volatile uint16_t frame_pad; - volatile uint32_t done_head; - uint8_t reserved[116+4]; // TODO try to make use of this area if possible, extra 4 byte to make the whole struct size = 256 -}ohci_hcca_t; // TU_ATTR_ALIGNED(256) - -TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" ); - -typedef struct { - uint32_t reserved[2]; - volatile uint32_t next; - uint32_t reserved2; -}ohci_td_item_t; - - -typedef struct TU_ATTR_ALIGNED(16) -{ - // Word 0 - uint32_t used : 1; - uint32_t index : 4; // endpoint index the td belongs to, or device address in case of control xfer - uint32_t expected_bytes : 13; // TODO available for hcd - - uint32_t buffer_rounding : 1; - uint32_t pid : 2; - uint32_t delay_interrupt : 3; - volatile uint32_t data_toggle : 2; - volatile uint32_t error_count : 2; - volatile uint32_t condition_code : 4; - - // Word 1 - volatile uint8_t* current_buffer_pointer; - - // Word 2 : next TD - volatile uint32_t next; - - // Word 3 - uint8_t* buffer_end; -} ohci_gtd_t; - -TU_VERIFY_STATIC( sizeof(ohci_gtd_t) == 16, "size is not correct" ); - -typedef struct TU_ATTR_ALIGNED(16) -{ - // Word 0 - uint32_t dev_addr : 7; - uint32_t ep_number : 4; - uint32_t pid : 2; // 00b from TD, 01b Out, 10b In - uint32_t speed : 1; - uint32_t skip : 1; - uint32_t is_iso : 1; - uint32_t max_packet_size : 11; - // HCD: make use of 5 reserved bits - uint32_t used : 1; - uint32_t is_interrupt_xfer : 1; - uint32_t is_stalled : 1; - uint32_t : 2; - - // Word 1 - uint32_t td_tail; - - // Word 2 - volatile union { - uint32_t address; - struct { - uint32_t halted : 1; - uint32_t toggle : 1; - uint32_t : 30; - }; - }td_head; - - // Word 3: next ED - uint32_t next; -} ohci_ed_t; - -TU_VERIFY_STATIC( sizeof(ohci_ed_t) == 16, "size is not correct" ); - -typedef struct TU_ATTR_ALIGNED(32) -{ - /*---------- Word 1 ----------*/ - uint32_t starting_frame : 16; - uint32_t : 5; // can be used - uint32_t delay_interrupt : 3; - uint32_t frame_count : 3; - uint32_t : 1; // can be used - volatile uint32_t condition_code : 4; - - /*---------- Word 2 ----------*/ - uint32_t buffer_page0; // 12 lsb bits can be used - - /*---------- Word 3 ----------*/ - volatile uint32_t next; - - /*---------- Word 4 ----------*/ - uint32_t buffer_end; - - /*---------- Word 5-8 ----------*/ - volatile uint16_t offset_packetstatus[8]; -} ochi_itd_t; - -TU_VERIFY_STATIC( sizeof(ochi_itd_t) == 32, "size is not correct" ); - -// structure with member alignment required from large to small -typedef struct TU_ATTR_ALIGNED(256) -{ - ohci_hcca_t hcca; - - ohci_ed_t bulk_head_ed; // static bulk head (dummy) - ohci_ed_t period_head_ed; // static periodic list head (dummy) - - // control endpoints has reserved resources - struct { - ohci_ed_t ed; - ohci_gtd_t gtd; - }control[CFG_TUSB_HOST_DEVICE_MAX+1]; - - // ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32 - ohci_ed_t ed_pool[HCD_MAX_ENDPOINT]; - ohci_gtd_t gtd_pool[HCD_MAX_XFER]; - - volatile uint16_t frame_number_hi; - -} ohci_data_t; - -//--------------------------------------------------------------------+ -// OHCI Operational Register -//--------------------------------------------------------------------+ - - -//--------------------------------------------------------------------+ -// OHCI Data Organization -//--------------------------------------------------------------------+ -typedef volatile struct -{ - uint32_t revision; - - union { - uint32_t control; - struct { - uint32_t control_bulk_service_ratio : 2; - uint32_t periodic_list_enable : 1; - uint32_t isochronous_enable : 1; - uint32_t control_list_enable : 1; - uint32_t bulk_list_enable : 1; - uint32_t hc_functional_state : 2; - uint32_t interrupt_routing : 1; - uint32_t remote_wakeup_connected : 1; - uint32_t remote_wakeup_enale : 1; - uint32_t TU_RESERVED : 21; - }control_bit; - }; - - union { - uint32_t command_status; - struct { - uint32_t controller_reset : 1; - uint32_t control_list_filled : 1; - uint32_t bulk_list_filled : 1; - uint32_t ownership_change_request : 1; - uint32_t : 12; - uint32_t scheduling_overrun_count : 2; - }command_status_bit; - }; - - uint32_t interrupt_status; - uint32_t interrupt_enable; - uint32_t interrupt_disable; - - uint32_t hcca; - uint32_t period_current_ed; - uint32_t control_head_ed; - uint32_t control_current_ed; - uint32_t bulk_head_ed; - uint32_t bulk_current_ed; - uint32_t done_head; - - uint32_t frame_interval; - uint32_t frame_remaining; - uint32_t frame_number; - uint32_t periodic_start; - uint32_t lowspeed_threshold; - - uint32_t rh_descriptorA; - uint32_t rh_descriptorB; - - union { - uint32_t rh_status; - struct { - uint32_t local_power_status : 1; // read Local Power Status; write: Clear Global Power - uint32_t over_current_indicator : 1; - uint32_t : 13; - uint32_t device_remote_wakeup_enable : 1; - uint32_t local_power_status_change : 1; - uint32_t over_current_indicator_change : 1; - uint32_t : 13; - uint32_t clear_remote_wakeup_enable : 1; - }rh_status_bit; - }; - - union { - uint32_t rhport_status[2]; // TODO NXP OHCI controller only has 2 ports - struct { - uint32_t current_connect_status : 1; - uint32_t port_enable_status : 1; - uint32_t port_suspend_status : 1; - uint32_t port_over_current_indicator : 1; - uint32_t port_reset_status : 1; - uint32_t : 3; - uint32_t port_power_status : 1; - uint32_t low_speed_device_attached : 1; - uint32_t : 6; - uint32_t connect_status_change : 1; - uint32_t port_enable_status_change : 1; - uint32_t port_suspend_status_change : 1; - uint32_t port_over_current_indicator_change : 1; - uint32_t port_reset_status_change : 1; - uint32_t TU_RESERVED : 11; - }rhport_status_bit[2]; - }; -}ohci_registers_t; - -TU_VERIFY_STATIC( sizeof(ohci_registers_t) == 0x5c, "size is not correct"); - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_OHCI_H_ */ - -/** @} */ -/** @} */ diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c new file mode 100644 index 000000000..e2327fdc0 --- /dev/null +++ b/src/portable/ehci/ehci.c @@ -0,0 +1,901 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include "common/tusb_common.h" + +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC43XX || CFG_TUSB_MCU == OPT_MCU_LPC18XX || \ + CFG_TUSB_MCU == OPT_MCU_MIMXRT10XX ) + +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ +#include "osal/osal.h" + +#include "host/hcd.h" +#include "host/usbh_hcd.h" +#include "ehci.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +// Periodic frame list must be 4K alignment +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(4096) static ehci_data_t ehci_data; + +// EHCI portable +uint32_t hcd_ehci_register_addr(uint8_t rhport); +bool hcd_ehci_init (uint8_t rhport); // TODO move later + +//--------------------------------------------------------------------+ +// PROTOTYPE +//--------------------------------------------------------------------+ +static inline ehci_link_t* get_period_head(uint8_t rhport, uint8_t interval_ms) +{ + (void) rhport; + return (ehci_link_t*) &ehci_data.period_head_arr[ tu_log2( tu_min8(EHCI_FRAMELIST_SIZE, interval_ms) ) ]; +} + +static inline ehci_qhd_t* qhd_control(uint8_t dev_addr) +{ + return &ehci_data.control[dev_addr].qhd; +} + +static inline ehci_qhd_t* qhd_async_head(uint8_t rhport) +{ + (void) rhport; + return qhd_control(0); // control qhd of dev0 is used as async head +} + +static inline ehci_qtd_t* qtd_control(uint8_t dev_addr) +{ + return &ehci_data.control[dev_addr].qtd; +} + + +static inline ehci_qhd_t* qhd_next (ehci_qhd_t const * p_qhd); +static inline ehci_qhd_t* qhd_find_free (void); +static inline ehci_qhd_t* qhd_get_from_addr (uint8_t dev_addr, uint8_t ep_addr); + +// determine if a queue head has bus-related error +static inline bool qhd_has_xact_error (ehci_qhd_t * p_qhd) +{ + return (p_qhd->qtd_overlay.buffer_err || p_qhd->qtd_overlay.babble_err || p_qhd->qtd_overlay.xact_err); + //p_qhd->qtd_overlay.non_hs_period_missed_uframe || p_qhd->qtd_overlay.pingstate_err TODO split transaction error +} + +static void qhd_init (ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc); + +static inline ehci_qtd_t* qtd_find_free (void); +static inline ehci_qtd_t* qtd_next (ehci_qtd_t const * p_qtd); +static inline void qtd_insert_to_qhd (ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new); +static inline void qtd_remove_1st_from_qhd (ehci_qhd_t *p_qhd); +static void qtd_init (ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes); + +static inline void list_insert (ehci_link_t *current, ehci_link_t *new, uint8_t new_type); +static inline ehci_link_t* list_next (ehci_link_t *p_link_pointer); + +//--------------------------------------------------------------------+ +// HCD API +//--------------------------------------------------------------------+ + +uint32_t hcd_uframe_number(uint8_t rhport) +{ + (void) rhport; + return ehci_data.uframe_number + ehci_data.regs->frame_index; +} + +void hcd_port_reset(uint8_t rhport) +{ + (void) rhport; + + ehci_registers_t* regs = ehci_data.regs; + +// regs->portsc_bm.port_enabled = 0; // disable port before reset +// regs->portsc_bm.port_reset = 1; + + uint32_t portsc = regs->portsc; + + portsc &= ~(EHCI_PORTSC_MASK_PORT_EANBLED); + portsc |= EHCI_PORTSC_MASK_PORT_RESET; + + regs->portsc = portsc; +} + +#if 0 +void hcd_port_reset_end(uint8_t rhport) +{ + (void) rhport; + + ehci_registers_t* regs = ehci_data.regs; + regs->portsc_bm.port_reset = 0; +} +#endif + +bool hcd_port_connect_status(uint8_t rhport) +{ + (void) rhport; + return ehci_data.regs->portsc_bm.current_connect_status; +} + +tusb_speed_t hcd_port_speed_get(uint8_t rhport) +{ + (void) rhport; + return (tusb_speed_t) ehci_data.regs->portsc_bm.nxp_port_speed; // NXP specific port speed +} + +static void list_remove_qhd_by_addr(ehci_link_t* list_head, uint8_t dev_addr) +{ + for(ehci_link_t* prev = list_head; + !prev->terminate && (tu_align32(prev->address) != (uint32_t) list_head); + prev = list_next(prev) ) + { + // TODO check type for ISO iTD and siTD + ehci_qhd_t* qhd = (ehci_qhd_t*) list_next(prev); + if ( qhd->dev_addr == dev_addr ) + { + // TODO deactive all TD, wait for QHD to inactive before removal + prev->address = qhd->next.address; + + // EHCI 4.8.2 link the removed qhd to async head (which always reachable by Host Controller) + qhd->next.address = ((uint32_t) list_head) | (EHCI_QTYPE_QHD << 1); + + if ( qhd->int_smask ) + { + // period list queue element is guarantee to be free in the next frame (1 ms) + qhd->used = 0; + }else + { + // async list use async advance handshake + // mark as removing, will completely re-usable when async advance isr occurs + qhd->removing = 1; + } + } + } +} + +// Close all opened endpoint belong to this device +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) +{ + // skip dev0 + if (dev_addr == 0) return; + + // Remove from async list + list_remove_qhd_by_addr( (ehci_link_t*) qhd_async_head(rhport), dev_addr ); + + // Remove from all interval period list + for(uint8_t i = 0; i < TU_ARRAY_SIZE(ehci_data.period_head_arr); i++) + { + list_remove_qhd_by_addr( (ehci_link_t*) &ehci_data.period_head_arr[i], dev_addr); + } + + // Async doorbell (EHCI 4.8.2 for operational details) + ehci_data.regs->command_bm.async_adv_doorbell = 1; +} + +// EHCI controller init +bool hcd_ehci_init(uint8_t rhport) +{ + tu_memclr(&ehci_data, sizeof(ehci_data_t)); + + ehci_data.regs = (ehci_registers_t* ) hcd_ehci_register_addr(rhport); + + ehci_registers_t* regs = ehci_data.regs; + + //------------- CTRLDSSEGMENT Register (skip) -------------// + //------------- USB INT Register -------------// + regs->inten = 0; // 1. disable all the interrupt + regs->status = EHCI_INT_MASK_ALL; // 2. clear all status + + regs->inten = EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | EHCI_INT_MASK_ASYNC_ADVANCE | + EHCI_INT_MASK_NXP_PERIODIC | EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_FRAMELIST_ROLLOVER; + + //------------- Asynchronous List -------------// + ehci_qhd_t * const async_head = qhd_async_head(rhport); + tu_memclr(async_head, sizeof(ehci_qhd_t)); + + async_head->next.address = (uint32_t) async_head; // circular list, next is itself + async_head->next.type = EHCI_QTYPE_QHD; + async_head->head_list_flag = 1; + async_head->qtd_overlay.halted = 1; // inactive most of time + async_head->qtd_overlay.next.terminate = 1; // TODO removed if verified + + regs->async_list_addr = (uint32_t) async_head; + + //------------- Periodic List -------------// + // Build the polling interval tree with 1 ms, 2 ms, 4 ms and 8 ms (framesize) only + for(uint32_t i=0; i<4; i++) + { + ehci_data.period_head_arr[i].int_smask = 1; // queue head in period list must have smask non-zero + ehci_data.period_head_arr[i].qtd_overlay.halted = 1; // dummy node, always inactive + } + + ehci_link_t * const framelist = ehci_data.period_framelist; + ehci_link_t * const period_1ms = get_period_head(rhport, 1); + // all links --> period_head_arr[0] (1ms) + // 0, 2, 4, 6 etc --> period_head_arr[1] (2ms) + // 1, 5 --> period_head_arr[2] (4ms) + // 3 --> period_head_arr[3] (8ms) + + // TODO EHCI_FRAMELIST_SIZE with other size than 8 + for(uint32_t i=0; iterminate = 1; + + regs->periodic_list_base = (uint32_t) framelist; + + //------------- TT Control (NXP only) -------------// + regs->nxp_tt_control = 0; + + //------------- USB CMD Register -------------// + regs->command |= TU_BIT(EHCI_USBCMD_POS_RUN_STOP) | TU_BIT(EHCI_USBCMD_POS_ASYNC_ENABLE) + | TU_BIT(EHCI_USBCMD_POS_PERIOD_ENABLE) // TODO enable period list only there is int/iso endpoint + | ((EHCI_CFG_FRAMELIST_SIZE_BITS & TU_BIN8(011)) << EHCI_USBCMD_POS_FRAMELIST_SZIE) + | ((EHCI_CFG_FRAMELIST_SIZE_BITS >> 2) << EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB); + + //------------- ConfigFlag Register (skip) -------------// + regs->portsc_bm.port_power = 1; // enable port power + + return true; +} + +#if 0 +static void ehci_stop(uint8_t rhport) +{ + (void) rhport; + + ehci_registers_t* regs = ehci_data.regs; + + regs->command_bm.run_stop = 0; + + // USB Spec: controller has to stop within 16 uframe = 2 frames + while( regs->status_bm.hc_halted == 0 ) {} +} +#endif + +//--------------------------------------------------------------------+ +// CONTROL PIPE API +//--------------------------------------------------------------------+ +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + (void) rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + // FIXME control only for now + if ( epnum == 0 ) + { + ehci_qhd_t* qhd = qhd_control(dev_addr); + ehci_qtd_t* qtd = qtd_control(dev_addr); + + qtd_init(qtd, buffer, buflen); + + // first first data toggle is always 1 (data & setup stage) + qtd->data_toggle = 1; + qtd->pid = dir ? EHCI_PID_IN : EHCI_PID_OUT; + qtd->int_on_complete = 1; + qtd->next.terminate = 1; + + // sw region + qhd->p_qtd_list_head = qtd; + qhd->p_qtd_list_tail = qtd; + + // attach TD + qhd->qtd_overlay.next.address = (uint32_t) qtd; + }else + { + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + ehci_qtd_t *p_qtd = qtd_find_free(); + TU_ASSERT(p_qtd); + + qtd_init(p_qtd, buffer, buflen); + p_qtd->pid = p_qhd->pid; + + // Insert TD to QH + qtd_insert_to_qhd(p_qhd, p_qtd); + + p_qhd->p_qtd_list_tail->int_on_complete = 1; + + // attach head QTD to QHD start transferring + p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; + } + + return true; +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + (void) rhport; + + ehci_qhd_t* qhd = &ehci_data.control[dev_addr].qhd; + ehci_qtd_t* td = &ehci_data.control[dev_addr].qtd; + + qtd_init(td, (void*) setup_packet, 8); + td->pid = EHCI_PID_SETUP; + td->int_on_complete = 1; + td->next.terminate = 1; + + // sw region + qhd->p_qtd_list_head = td; + qhd->p_qtd_list_tail = td; + + // attach TD + qhd->qtd_overlay.next.address = (uint32_t) td; + + return true; +} + +//--------------------------------------------------------------------+ +// BULK/INT/ISO PIPE API +//--------------------------------------------------------------------+ +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + + // TODO not support ISO yet + TU_ASSERT (ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); + + //------------- Prepare Queue Head -------------// + ehci_qhd_t * p_qhd; + + if ( ep_desc->bEndpointAddress == 0 ) + { + p_qhd = qhd_control(dev_addr); + }else + { + p_qhd = qhd_find_free(); + } + TU_ASSERT(p_qhd); + + qhd_init(p_qhd, dev_addr, ep_desc); + + // control of dev0 is always present as async head + if ( dev_addr == 0 ) return true; + + // Insert to list + ehci_link_t * list_head = NULL; + + switch (ep_desc->bmAttributes.xfer) + { + case TUSB_XFER_CONTROL: + case TUSB_XFER_BULK: + list_head = (ehci_link_t*) qhd_async_head(rhport); + break; + + case TUSB_XFER_INTERRUPT: + list_head = get_period_head(rhport, p_qhd->interval_ms); + break; + + case TUSB_XFER_ISOCHRONOUS: + // TODO iso is not supported + break; + + default: break; + } + + TU_ASSERT(list_head); + + // TODO might need to disable async/period list + list_insert(list_head, (ehci_link_t*) p_qhd, EHCI_QTYPE_QHD); + + return true; +} + +bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) +{ + //------------- set up QTD -------------// + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + ehci_qtd_t *p_qtd = qtd_find_free(); + + TU_ASSERT(p_qtd); + + qtd_init(p_qtd, buffer, total_bytes); + p_qtd->pid = p_qhd->pid; + + //------------- insert TD to TD list -------------// + qtd_insert_to_qhd(p_qhd, p_qtd); + + return true; +} + +bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +{ + TU_ASSERT ( hcd_pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes) ); + + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + + if ( int_on_complete ) + { // the just added qtd is pointed by list_tail + p_qhd->p_qtd_list_tail->int_on_complete = 1; + } + p_qhd->qtd_overlay.next.address = (uint32_t) p_qhd->p_qtd_list_head; // attach head QTD to QHD start transferring + + return true; +} + +bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) +{ + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + return !p_qhd->qtd_overlay.halted && (p_qhd->p_qtd_list_head != NULL); +} + +bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) +{ + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + return p_qhd->qtd_overlay.halted && !qhd_has_xact_error(p_qhd); +} + +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +{ + ehci_qhd_t *p_qhd = qhd_get_from_addr(dev_addr, ep_addr); + p_qhd->qtd_overlay.halted = 0; + // TODO reset data toggle ? + return true; +} + +//--------------------------------------------------------------------+ +// EHCI Interrupt Handler +//--------------------------------------------------------------------+ + +// async_advance is handshake between usb stack & ehci controller. +// This isr mean it is safe to modify previously removed queue head from async list. +// In tinyusb, queue head is only removed when device is unplugged. +static void async_advance_isr(uint8_t rhport) +{ + (void) rhport; + + ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; + for(uint32_t i = 0; i < HCD_MAX_ENDPOINT; i++) + { + if ( qhd_pool[i].removing ) + { + qhd_pool[i].removing = 0; + qhd_pool[i].used = 0; + } + } +} + +static void port_connect_status_change_isr(uint8_t hostid) +{ + // NOTE There is an sequence plug->unplug->…..-> plug if device is powering with pre-plugged device + if (ehci_data.regs->portsc_bm.current_connect_status) + { + hcd_port_reset(hostid); + hcd_event_device_attach(hostid, true); + }else // device unplugged + { + hcd_event_device_remove(hostid, true); + } +} + +static void qhd_xfer_complete_isr(ehci_qhd_t * p_qhd) +{ + // free all TDs from the head td to the first active TD + while(p_qhd->p_qtd_list_head != NULL && !p_qhd->p_qtd_list_head->active) + { + // TD need to be freed and removed from qhd, before invoking callback + bool is_ioc = (p_qhd->p_qtd_list_head->int_on_complete != 0); + p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; + + p_qhd->p_qtd_list_head->used = 0; // free QTD + qtd_remove_1st_from_qhd(p_qhd); + + if (is_ioc) + { + // end of request + // call USBH callback + hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), p_qhd->total_xferred_bytes, XFER_RESULT_SUCCESS, true); + p_qhd->total_xferred_bytes = 0; + } + } +} + +static void async_list_xfer_complete_isr(ehci_qhd_t * const async_head) +{ + ehci_qhd_t *p_qhd = async_head; + do + { + if ( !p_qhd->qtd_overlay.halted ) // halted or error is processed in error isr + { + qhd_xfer_complete_isr(p_qhd); + } + p_qhd = qhd_next(p_qhd); + }while(p_qhd != async_head); // async list traversal, stop if loop around +} + +static void period_list_xfer_complete_isr(uint8_t hostid, uint8_t interval_ms) +{ + uint16_t max_loop = 0; + uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); + ehci_link_t next_item = * get_period_head(hostid, interval_ms); + + // TODO abstract max loop guard for period + while( !next_item.terminate && + !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) && + max_loop < (HCD_MAX_ENDPOINT + EHCI_MAX_ITD + EHCI_MAX_SITD)*CFG_TUSB_HOST_DEVICE_MAX) + { + switch ( next_item.type ) + { + case EHCI_QTYPE_QHD: + { + ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); + if ( !p_qhd_int->qtd_overlay.halted ) + { + qhd_xfer_complete_isr(p_qhd_int); + } + } + break; + + case EHCI_QTYPE_ITD: // TODO support hs/fs ISO + case EHCI_QTYPE_SITD: + case EHCI_QTYPE_FSTN: + + default: break; + } + + next_item = *list_next(&next_item); + max_loop++; + } +} + +static void qhd_xfer_error_isr(ehci_qhd_t * p_qhd) +{ + if ( (p_qhd->dev_addr != 0 && p_qhd->qtd_overlay.halted) || // addr0 cannot be protocol STALL + qhd_has_xact_error(p_qhd) ) + { + // current qhd has error in transaction + xfer_result_t error_event; + + // no error bits are set, endpoint is halted due to STALL + error_event = qhd_has_xact_error(p_qhd) ? XFER_RESULT_FAILED : XFER_RESULT_STALLED; + + p_qhd->total_xferred_bytes += p_qhd->p_qtd_list_head->expected_bytes - p_qhd->p_qtd_list_head->total_bytes; + +// if ( XFER_RESULT_FAILED == error_event ) TU_BREAKPOINT(); // TODO skip unplugged device + + p_qhd->p_qtd_list_head->used = 0; // free QTD + qtd_remove_1st_from_qhd(p_qhd); + + if ( 0 == p_qhd->ep_number ) + { + // control cannot be halted --> clear all qtd list + p_qhd->p_qtd_list_head = NULL; + p_qhd->p_qtd_list_tail = NULL; + + p_qhd->qtd_overlay.next.terminate = 1; + p_qhd->qtd_overlay.alternate.terminate = 1; + p_qhd->qtd_overlay.halted = 0; + + ehci_qtd_t *p_setup = qtd_control(p_qhd->dev_addr); + p_setup->used = 0; + } + + // call USBH callback + hcd_event_xfer_complete(p_qhd->dev_addr, tu_edpt_addr(p_qhd->ep_number, p_qhd->pid == EHCI_PID_IN ? 1 : 0), p_qhd->total_xferred_bytes, error_event, true); + + p_qhd->total_xferred_bytes = 0; + } +} + +static void xfer_error_isr(uint8_t hostid) +{ + //------------- async list -------------// + ehci_qhd_t * const async_head = qhd_async_head(hostid); + ehci_qhd_t *p_qhd = async_head; + do + { + qhd_xfer_error_isr( p_qhd ); + p_qhd = qhd_next(p_qhd); + }while(p_qhd != async_head); // async list traversal, stop if loop around + + //------------- TODO refractor period list -------------// + uint32_t const period_1ms_addr = (uint32_t) get_period_head(hostid, 1); + for (uint8_t interval_ms=1; interval_ms <= EHCI_FRAMELIST_SIZE; interval_ms *= 2) + { + ehci_link_t next_item = * get_period_head(hostid, interval_ms); + + // TODO abstract max loop guard for period + while( !next_item.terminate && + !(interval_ms > 1 && period_1ms_addr == tu_align32(next_item.address)) ) + { + switch ( next_item.type ) + { + case EHCI_QTYPE_QHD: + { + ehci_qhd_t *p_qhd_int = (ehci_qhd_t *) tu_align32(next_item.address); + qhd_xfer_error_isr(p_qhd_int); + } + break; + + // TODO support hs/fs ISO + case EHCI_QTYPE_ITD: + case EHCI_QTYPE_SITD: + case EHCI_QTYPE_FSTN: + default: break; + } + + next_item = *list_next(&next_item); + } + } +} + +//------------- Host Controller Driver's Interrupt Handler -------------// +void hcd_int_handler(uint8_t rhport) +{ + ehci_registers_t* regs = ehci_data.regs; + + uint32_t int_status = regs->status; + int_status &= regs->inten; + + regs->status |= int_status; // Acknowledge handled interrupt + + if (int_status == 0) return; + + if (int_status & EHCI_INT_MASK_FRAMELIST_ROLLOVER) + { + ehci_data.uframe_number += (EHCI_FRAMELIST_SIZE << 3); + } + + if (int_status & EHCI_INT_MASK_PORT_CHANGE) + { + uint32_t port_status = regs->portsc & EHCI_PORTSC_MASK_ALL; + + if (regs->portsc_bm.connect_status_change) + { + port_connect_status_change_isr(rhport); + } + + regs->portsc |= port_status; // Acknowledge change bits in portsc + } + + if (int_status & EHCI_INT_MASK_ERROR) + { + xfer_error_isr(rhport); + } + + //------------- some QTD/SITD/ITD with IOC set is completed -------------// + if (int_status & EHCI_INT_MASK_NXP_ASYNC) + { + async_list_xfer_complete_isr( qhd_async_head(rhport) ); + } + + if (int_status & EHCI_INT_MASK_NXP_PERIODIC) + { + for (uint8_t i=1; i <= EHCI_FRAMELIST_SIZE; i *= 2) + { + period_list_xfer_complete_isr( rhport, i ); + } + } + + //------------- There is some removed async previously -------------// + if (int_status & EHCI_INT_MASK_ASYNC_ADVANCE) // need to place after EHCI_INT_MASK_NXP_ASYNC + { + async_advance_isr(rhport); + } +} + +//--------------------------------------------------------------------+ +// HELPER +//--------------------------------------------------------------------+ + + +//------------- queue head helper -------------// +static inline ehci_qhd_t* qhd_find_free (void) +{ + for (uint32_t i=0; inext.address); +} + +static inline ehci_qhd_t* qhd_get_from_addr(uint8_t dev_addr, uint8_t ep_addr) +{ + ehci_qhd_t* qhd_pool = ehci_data.qhd_pool; + + for(uint32_t i=0; inext.address); +} + +static inline void qtd_remove_1st_from_qhd(ehci_qhd_t *p_qhd) +{ + if (p_qhd->p_qtd_list_head == p_qhd->p_qtd_list_tail) // last TD --> make it NULL + { + p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = NULL; + }else + { + p_qhd->p_qtd_list_head = qtd_next( p_qhd->p_qtd_list_head ); + } +} + +static inline void qtd_insert_to_qhd(ehci_qhd_t *p_qhd, ehci_qtd_t *p_qtd_new) +{ + if (p_qhd->p_qtd_list_head == NULL) // empty list + { + p_qhd->p_qtd_list_head = p_qhd->p_qtd_list_tail = p_qtd_new; + }else + { + p_qhd->p_qtd_list_tail->next.address = (uint32_t) p_qtd_new; + p_qhd->p_qtd_list_tail = p_qtd_new; + } +} + +static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +{ + // address 0 is used as async head, which always on the list --> cannot be cleared (ehci halted otherwise) + if (dev_addr != 0) + { + tu_memclr(p_qhd, sizeof(ehci_qhd_t)); + } + + uint8_t const xfer_type = ep_desc->bmAttributes.xfer; + uint8_t const interval = ep_desc->bInterval; + + p_qhd->dev_addr = dev_addr; + p_qhd->fl_inactive_next_xact = 0; + p_qhd->ep_number = tu_edpt_number(ep_desc->bEndpointAddress); + p_qhd->ep_speed = _usbh_devices[dev_addr].speed; + p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0; + p_qhd->head_list_flag = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static asyn list head + p_qhd->max_packet_size = ep_desc->wMaxPacketSize.size; + p_qhd->fl_ctrl_ep_flag = ((xfer_type == TUSB_XFER_CONTROL) && (p_qhd->ep_speed != TUSB_SPEED_HIGH)) ? 1 : 0; + p_qhd->nak_reload = 0; + + // Bulk/Control -> smask = cmask = 0 + // TODO Isochronous + if (TUSB_XFER_INTERRUPT == xfer_type) + { + if (TUSB_SPEED_HIGH == p_qhd->ep_speed) + { + TU_ASSERT( interval <= 16, ); + if ( interval < 4) // sub milisecond interval + { + p_qhd->interval_ms = 0; + p_qhd->int_smask = (interval == 1) ? TU_BIN8(11111111) : + (interval == 2) ? TU_BIN8(10101010) : TU_BIN8(01000100); + }else + { + p_qhd->interval_ms = (uint8_t) tu_min16( 1 << (interval-4), 255 ); + p_qhd->int_smask = TU_BIT(interval % 8); + } + }else + { + TU_ASSERT( 0 != interval, ); + // Full/Low: 4.12.2.1 (EHCI) case 1 schedule start split at 1 us & complete split at 2,3,4 uframes + p_qhd->int_smask = 0x01; + p_qhd->fl_int_cmask = TU_BIN8(11100); + p_qhd->interval_ms = interval; + } + }else + { + p_qhd->int_smask = p_qhd->fl_int_cmask = 0; + } + + p_qhd->fl_hub_addr = _usbh_devices[dev_addr].hub_addr; + p_qhd->fl_hub_port = _usbh_devices[dev_addr].hub_port; + p_qhd->mult = 1; // TODO not use high bandwidth/park mode yet + + //------------- HCD Management Data -------------// + p_qhd->used = 1; + p_qhd->removing = 0; + p_qhd->p_qtd_list_head = NULL; + p_qhd->p_qtd_list_tail = NULL; + p_qhd->pid = tu_edpt_dir(ep_desc->bEndpointAddress) ? EHCI_PID_IN : EHCI_PID_OUT; // PID for TD under this endpoint + + //------------- active, but no TD list -------------// + p_qhd->qtd_overlay.halted = 0; + p_qhd->qtd_overlay.next.terminate = 1; + p_qhd->qtd_overlay.alternate.terminate = 1; + if (TUSB_XFER_BULK == xfer_type && p_qhd->ep_speed == TUSB_SPEED_HIGH && p_qhd->pid == EHCI_PID_OUT) + { + p_qhd->qtd_overlay.ping_err = 1; // do PING for Highspeed Bulk OUT, EHCI section 4.11 + } +} + +static void qtd_init(ehci_qtd_t* p_qtd, void* buffer, uint16_t total_bytes) +{ + tu_memclr(p_qtd, sizeof(ehci_qtd_t)); + + p_qtd->used = 1; + + p_qtd->next.terminate = 1; // init to null + p_qtd->alternate.terminate = 1; // not used, always set to terminated + p_qtd->active = 1; + p_qtd->err_count = 3; // TODO 3 consecutive errors tolerance + p_qtd->data_toggle = 0; + p_qtd->total_bytes = total_bytes; + p_qtd->expected_bytes = total_bytes; + + p_qtd->buffer[0] = (uint32_t) buffer; + for(uint8_t i=1; i<5; i++) + { + p_qtd->buffer[i] |= tu_align4k( p_qtd->buffer[i-1] ) + 4096; + } +} + +//------------- List Managing Helper -------------// +static inline void list_insert(ehci_link_t *current, ehci_link_t *new, uint8_t new_type) +{ + new->address = current->address; + current->address = ((uint32_t) new) | (new_type << 1); +} + +static inline ehci_link_t* list_next(ehci_link_t *p_link_pointer) +{ + return (ehci_link_t*) tu_align32(p_link_pointer->address); +} + +#endif diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h new file mode 100644 index 000000000..212f605b1 --- /dev/null +++ b/src/portable/ehci/ehci.h @@ -0,0 +1,460 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/** \ingroup Group_HCD + * @{ + * \defgroup EHCI + * \brief EHCI driver. All documents sources mentioned here (eg section 3.5) is referring to EHCI Specs unless state otherwise + * @{ */ + +#ifndef _TUSB_EHCI_H_ +#define _TUSB_EHCI_H_ + + +/* Abbreviation + * HC: Host Controller + * HCD: Host Controller Driver + * QHD: Queue Head for non-ISO transfer + * QTD: Queue Transfer Descriptor for non-ISO transfer + * ITD: Iso Transfer Descriptor for highspeed + * SITD: Split ISO Transfer Descriptor for full-speed + * SMASK: Start Split mask for Slipt Transaction + * CMASK: Complete Split mask for Slipt Transaction +*/ + +#ifdef __cplusplus + extern "C" { +#endif + +//--------------------------------------------------------------------+ +// EHCI CONFIGURATION & CONSTANTS +//--------------------------------------------------------------------+ +#define EHCI_CFG_FRAMELIST_SIZE_BITS 7 /// Framelist Size (NXP specific) (0:1024) - (1:512) - (2:256) - (3:128) - (4:64) - (5:32) - (6:16) - (7:8) +#define EHCI_FRAMELIST_SIZE (1024 >> EHCI_CFG_FRAMELIST_SIZE_BITS) + +// TODO merge OHCI with EHCI +enum { + EHCI_MAX_ITD = 4, + EHCI_MAX_SITD = 16 +}; + +//------------- Validation -------------// +TU_VERIFY_STATIC(EHCI_CFG_FRAMELIST_SIZE_BITS <= 7, "incorrect value"); + +//--------------------------------------------------------------------+ +// EHCI Data Structure +//--------------------------------------------------------------------+ +enum +{ + EHCI_QTYPE_ITD = 0 , + EHCI_QTYPE_QHD , + EHCI_QTYPE_SITD , + EHCI_QTYPE_FSTN +}; + +/// EHCI PID +enum +{ + EHCI_PID_OUT = 0 , + EHCI_PID_IN , + EHCI_PID_SETUP +}; + +/// Link pointer +typedef union { + uint32_t address; + struct { + uint32_t terminate : 1; + uint32_t type : 2; + }; +}ehci_link_t; + +/// Queue Element Transfer Descriptor +/// Qtd is used to declare overlay in ehci_qhd_t -> cannot be declared with TU_ATTR_ALIGNED(32) +typedef struct +{ + // Word 0: Next QTD Pointer + ehci_link_t next; + + // Word 1: Alternate Next QTD Pointer (not used) + union{ + ehci_link_t alternate; + struct { + uint32_t : 5; + uint32_t used : 1; + uint32_t : 10; + uint32_t expected_bytes : 16; + }; + }; + + // Word 2: qTQ Token + volatile uint32_t ping_err : 1 ; ///< For Highspeed: 0 Out, 1 Ping. Full/Slow used as error indicator + volatile uint32_t non_hs_split_state : 1 ; ///< Used by HC to track the state of slipt transaction + volatile uint32_t non_hs_missed_uframe : 1 ; ///< HC misses a complete slip transaction + volatile uint32_t xact_err : 1 ; ///< Error (Timeout, CRC, Bad PID ... ) + volatile uint32_t babble_err : 1 ; ///< Babble detected, also set Halted bit to 1 + volatile uint32_t buffer_err : 1 ; ///< Data overrun/underrun error + volatile uint32_t halted : 1 ; ///< Serious error or STALL received + volatile uint32_t active : 1 ; ///< Start transfer, clear by HC when complete + + uint32_t pid : 2 ; ///< 0: OUT, 1: IN, 2 Setup + volatile uint32_t err_count : 2 ; ///< Error Counter of consecutive errors + volatile uint32_t current_page : 3 ; ///< Index into the qTD buffer pointer list + uint32_t int_on_complete : 1 ; ///< Interrupt on complete + volatile uint32_t total_bytes : 15 ; ///< Transfer bytes, decreased during transaction + volatile uint32_t data_toggle : 1 ; ///< Data Toogle bit + + + /// Buffer Page Pointer List, Each element in the list is a 4K page aligned, physical memory address. The lower 12 bits in each pointer are reserved (except for the first one) as each memory pointer must reference the start of a 4K page + uint32_t buffer[5]; +} ehci_qtd_t; + +TU_VERIFY_STATIC( sizeof(ehci_qtd_t) == 32, "size is not correct" ); + +/// Queue Head +typedef struct TU_ATTR_ALIGNED(32) +{ + // Word 0: Next QHD + ehci_link_t next; + + // Word 1: Endpoint Characteristics + uint32_t dev_addr : 7 ; ///< device address + uint32_t fl_inactive_next_xact : 1 ; ///< Only valid for Periodic with Full/Slow speed + uint32_t ep_number : 4 ; ///< EP number + uint32_t ep_speed : 2 ; ///< 0: Full, 1: Low, 2: High + uint32_t data_toggle_control : 1 ; ///< 0: use DT in qHD, 1: use DT in qTD + uint32_t head_list_flag : 1 ; ///< Head of the queue + uint32_t max_packet_size : 11 ; ///< Max packet size + uint32_t fl_ctrl_ep_flag : 1 ; ///< 1 if is Full/Low speed control endpoint + uint32_t nak_reload : 4 ; ///< Used by HC + + // Word 2: Endpoint Capabilities + uint32_t int_smask : 8 ; ///< Interrupt Schedule Mask + uint32_t fl_int_cmask : 8 ; ///< Split Completion Mask for Full/Slow speed + uint32_t fl_hub_addr : 7 ; ///< Hub Address for Full/Slow speed + uint32_t fl_hub_port : 7 ; ///< Hub Port for Full/Slow speed + uint32_t mult : 2 ; ///< Transaction per micro frame + + // Word 3: Current qTD Pointer + volatile uint32_t qtd_addr; + + // Word 4-11: Transfer Overlay + volatile ehci_qtd_t qtd_overlay; + + //--------------------------------------------------------------------+ + /// Due to the fact QHD is 32 bytes aligned but occupies only 48 bytes + /// thus there are 16 bytes padding free that we can make use of. + //--------------------------------------------------------------------+ + uint8_t used; + uint8_t removing; // removed from asyn list, waiting for async advance + uint8_t pid; + uint8_t interval_ms; // polling interval in frames (or milisecond) + + uint16_t total_xferred_bytes; // number of bytes xferred until a qtd with ioc bit set + uint8_t reserved2[2]; + + ehci_qtd_t * volatile p_qtd_list_head; // head of the scheduled TD list + ehci_qtd_t * volatile p_qtd_list_tail; // tail of the scheduled TD list +} ehci_qhd_t; + +TU_VERIFY_STATIC( sizeof(ehci_qhd_t) == 64, "size is not correct" ); + +/// Highspeed Isochronous Transfer Descriptor (section 3.3) +typedef struct TU_ATTR_ALIGNED(32) { + // Word 0: Next Link Pointer + ehci_link_t next; + + // Word 1-8: iTD Transaction Status and Control List + struct { + // iTD Control + volatile uint32_t offset : 12 ; ///< This field is a value that is an offset, expressed in bytes, from the beginning of a buffer. + volatile uint32_t page_select : 3 ; ///< These bits are set by software to indicate which of the buffer page pointers the offset field in this slot should be concatenated to produce the starting memory address for this transaction. The valid range of values for this field is 0 to 6 + uint32_t int_on_complete : 1 ; ///< If this bit is set to a one, it specifies that when this transaction completes, the Host Controller should issue an interrupt at the next interrupt threshold + volatile uint32_t length : 12 ; ///< For an OUT, this field is the number of data bytes the host controller will send during the transaction. The host controller is not required to update this field to reflect the actual number of bytes transferred during the transfer + ///< For an IN, the initial value of the field is the number of bytes the host expects the endpoint to deliver. During the status update, the host controller writes back the number of bytes successfully received. The value in this register is the actual byte count + // iTD Status + volatile uint32_t error : 1 ; ///< Set to a one by the Host Controller during status update in the case where the host did not receive a valid response from the device (Timeout, CRC, Bad PID, etc.). This bit may only be set for isochronous IN transactions. + volatile uint32_t babble_err : 1 ; ///< Set to a 1 by the Host Controller during status update when a babble is detected during the transaction + volatile uint32_t buffer_err : 1 ; ///< Set to a 1 by the Host Controller during status update to indicate that the Host Controller is unable to keep up with the reception of incoming data (overrun) or is unable to supply data fast enough during transmission (underrun). + volatile uint32_t active : 1 ; ///< Set to 1 by software to enable the execution of an isochronous transaction by the Host Controller + } xact[8]; + + // Word 9-15 Buffer Page Pointer List (Plus) + uint32_t BufferPointer[7]; + +// // FIXME: Store meta data into buffer pointer reserved for saving memory +// /*---------- HCD Area ----------*/ +// uint32_t used; +// uint32_t IhdIdx; +// uint32_t reserved[6]; +} ehci_itd_t; + +TU_VERIFY_STATIC( sizeof(ehci_itd_t) == 64, "size is not correct" ); + +/// Split (Full-Speed) Isochronous Transfer Descriptor +typedef struct TU_ATTR_ALIGNED(32) +{ + // Word 0: Next Link Pointer + ehci_link_t next; + + // Word 1: siTD Endpoint Characteristics + uint32_t dev_addr : 7; ///< This field selects the specific device serving as the data source or sink. + uint32_t : 1; ///< reserved + uint32_t ep_number : 4; ///< This 4-bit field selects the particular endpoint number on the device serving as the data source or sink. + uint32_t : 4; ///< This field is reserved and should be set to zero. + uint32_t hub_addr : 7; ///< This field holds the device address of the transaction translators’ hub. + uint32_t : 1; ///< reserved + uint32_t port_number : 7; ///< This field is the port number of the recipient transaction translator. + uint32_t direction : 1; ///< 0 = OUT; 1 = IN. This field encodes whether the full-speed transaction should be an IN or OUT. + + // Word 2: Micro-frame Schedule Control + uint8_t int_smask ; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute complete-split transactions + uint8_t fl_int_cmask; ///< This field (along with the Activeand SplitX-statefields in the Statusbyte) are used to determine during which micro-frames the host controller should execute start-split transactions. + uint16_t reserved ; ///< reserved + + // Word 3: siTD Transfer Status and Control + // Status [7:0] TODO indentical to qTD Token'status --> refractor later + volatile uint32_t : 1 ; // reserved + volatile uint32_t split_state : 1 ; + volatile uint32_t missed_uframe : 1 ; + volatile uint32_t xact_err : 1 ; + volatile uint32_t babble_err : 1 ; + volatile uint32_t buffer_err : 1 ; + volatile uint32_t error : 1 ; + volatile uint32_t active : 1 ; + // Micro-frame Schedule Control + volatile uint32_t cmask_progress : 8 ; ///< This field is used by the host controller to record which split-completes have been executed. See Section 4.12.3.3.2 for behavioral requirements. + volatile uint32_t total_bytes : 10 ; ///< This field is initialized by software to the total number of bytes expected in this transfer. Maximum value is 1023 + volatile uint32_t : 4 ; ///< reserved + volatile uint32_t page_select : 1 ; ///< Used to indicate which data page pointer should be concatenated with the CurrentOffsetfield to construct a data buffer pointer + uint32_t int_on_complete : 1 ; ///< Do not interrupt when transaction is complete. 1 = Do interrupt when transaction is complete + uint32_t : 0 ; // padding to the end of current storage unit + + /// Word 4-5: Buffer Pointer List + uint32_t buffer[2]; // buffer[1] TP: Transaction Position - T-Count: Transaction Count + +// union{ +// uint32_t BufferPointer1; +// struct { +// volatile uint32_t TCount : 3; +// volatile uint32_t TPosition : 2; +// }; +// }; + + /*---------- Word 6 ----------*/ + ehci_link_t back; + + /// SITD is 32-byte aligned but occupies only 28 --> 4 bytes for storing extra data + uint8_t used; + uint8_t ihd_idx; + uint8_t reserved2[2]; +} ehci_sitd_t; + +TU_VERIFY_STATIC( sizeof(ehci_sitd_t) == 32, "size is not correct" ); + +//--------------------------------------------------------------------+ +// EHCI Operational Register +//--------------------------------------------------------------------+ +enum ehci_interrupt_mask_{ + EHCI_INT_MASK_USB = TU_BIT(0), + EHCI_INT_MASK_ERROR = TU_BIT(1), + EHCI_INT_MASK_PORT_CHANGE = TU_BIT(2), + + EHCI_INT_MASK_FRAMELIST_ROLLOVER = TU_BIT(3), + EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR = TU_BIT(4), + EHCI_INT_MASK_ASYNC_ADVANCE = TU_BIT(5), + EHCI_INT_MASK_NXP_SOF = TU_BIT(7), + + EHCI_INT_MASK_NXP_ASYNC = TU_BIT(18), + EHCI_INT_MASK_NXP_PERIODIC = TU_BIT(19), + + EHCI_INT_MASK_ALL = + EHCI_INT_MASK_USB | EHCI_INT_MASK_ERROR | EHCI_INT_MASK_PORT_CHANGE | + EHCI_INT_MASK_FRAMELIST_ROLLOVER | EHCI_INT_MASK_PCI_HOST_SYSTEM_ERROR | + EHCI_INT_MASK_ASYNC_ADVANCE | EHCI_INT_MASK_NXP_SOF | + EHCI_INT_MASK_NXP_ASYNC | EHCI_INT_MASK_NXP_PERIODIC +}; + +enum ehci_usbcmd_pos_ { + EHCI_USBCMD_POS_RUN_STOP = 0, + EHCI_USBCMD_POS_FRAMELIST_SZIE = 2, + EHCI_USBCMD_POS_PERIOD_ENABLE = 4, + EHCI_USBCMD_POS_ASYNC_ENABLE = 5, + EHCI_USBCMD_POS_NXP_FRAMELIST_SIZE_MSB = 15, + EHCI_USBCMD_POS_INTERRUPT_THRESHOLD = 16 +}; + +enum ehci_portsc_change_mask_{ + EHCI_PORTSC_MASK_CURRENT_CONNECT_STATUS = TU_BIT(0), + EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE = TU_BIT(1), + EHCI_PORTSC_MASK_PORT_EANBLED = TU_BIT(2), + EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE = TU_BIT(3), + EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE = TU_BIT(5), + + EHCI_PORTSC_MASK_PORT_RESET = TU_BIT(8), + + EHCI_PORTSC_MASK_ALL = + EHCI_PORTSC_MASK_CONNECT_STATUS_CHANGE | + EHCI_PORTSC_MASK_PORT_ENABLE_CHAGNE | + EHCI_PORTSC_MASK_OVER_CURRENT_CHANGE +}; + +typedef volatile struct +{ + union { + uint32_t command; + + struct { + uint32_t run_stop : 1 ; ///< 1=Run. 0=Stop + uint32_t reset : 1 ; ///< SW write 1 to reset HC, clear by HC when complete + uint32_t framelist_size : 2 ; ///< Frame List size 0: 1024, 1: 512, 2: 256 + uint32_t periodic_enable : 1 ; ///< This bit controls whether the host controller skips processing the Periodic Schedule. Values mean: 0b Do not process the Periodic Schedule 1b Use the PERIODICLISTBASE register to access the Periodic Schedule. + uint32_t async_enable : 1 ; ///< This bit controls whether the host controller skips processing the Asynchronous Schedule. Values mean: 0b Do not process the Asynchronous Schedule 1b Use the ASYNCLISTADDR register to access the Asynchronous Schedule. + uint32_t async_adv_doorbell : 1 ; ///< Tell HC to interrupt next time it advances async list. Clear by HC + uint32_t light_reset : 1 ; ///< Reset HC without affecting ports state + uint32_t async_park_count : 2 ; ///< not used by tinyusb + uint32_t : 1 ; + uint32_t async_park_enable : 1 ; ///< Enable park mode, not used by tinyusb + uint32_t : 3 ; + uint32_t nxp_framelist_size_msb : 1 ; ///< NXP customized : Bit 2 of the Frame List Size bits \n 011b: 128 elements \n 100b: 64 elements \n 101b: 32 elements \n 110b: 16 elements \n 111b: 8 elements + uint32_t int_threshold : 8 ; ///< Default 08h. Interrupt rate in unit of micro frame + }command_bm; + }; + + union { + uint32_t status; + + struct { + uint32_t usb : 1 ; ///< qTD with IOC is retired + uint32_t usb_error : 1 ; ///< qTD retired due to error + uint32_t port_change_detect : 1 ; ///< Set when PortOwner or ForcePortResume change from 0 -> 1 + uint32_t framelist_rollover : 1 ; ///< R/WC The Host Controller sets this bit to a one when the Frame List Index(see Section 2.3.4) rolls over from its maximum value to zero. The exact value at which the rollover occurs depends on the frame list size. For example, if the frame list size (as programmed in the Frame List Sizefield of the USBCMD register) is 1024, the Frame Index Registerrolls over every time FRINDEX[13] toggles. Similarly, if the size is 512, the Host Controller sets this bit to a one every time FRINDEX[12] toggles. + uint32_t pci_host_system_error : 1 ; ///< R/WC (not used by NXP) The Host Controller sets this bit to 1 when a serious error occurs during a host system access involving the Host Controller module. In a PCI system, conditions that set this bit to 1 include PCI Parity error, PCI Master Abort, and PCI Target Abort. When this error occurs, the Host Controller clears the Run/Stop bit in the Command register to prevent further execution of the scheduled TDs. + uint32_t async_adv : 1 ; ///< Async Advance interrupt + uint32_t : 1 ; + uint32_t nxp_int_sof : 1 ; ///< NXP customized: this bit will be set every 125us and can be used by host controller driver as a time base. + uint32_t : 4 ; + uint32_t hc_halted : 1 ; ///< Opposite value to run_stop bit. + uint32_t reclamation : 1 ; ///< Used to detect empty async shecudle + uint32_t periodic_status : 1 ; ///< Periodic schedule status + uint32_t async_status : 1 ; ///< Async schedule status + uint32_t : 2 ; + uint32_t nxp_int_async : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the asynchronous schedule. This bit is also set by the Host when a short packet is detected andthe packet is on the asynchronous schedule. + uint32_t nxp_int_period : 1 ; ///< NXP customized: This bit is set by the Host Controller when the cause of an interrupt is a completion of a USB transaction where the Transfer Descriptor (TD) has an interrupt on complete (IOC) bit set andthe TD was from the periodic schedule. + uint32_t : 12 ; + }status_bm; + }; + + union{ + uint32_t inten; + + struct { + uint32_t usb : 1 ; + uint32_t usb_error : 1 ; + uint32_t port_change_detect : 1 ; + uint32_t framelist_rollover : 1 ; + uint32_t pci_host_system_error : 1 ; + uint32_t async_adv : 1 ; + uint32_t : 1 ; + uint32_t nxp_int_sof : 1 ; + uint32_t : 10 ; + uint32_t nxp_int_async : 1 ; + uint32_t nxp_int_period : 1 ; + uint32_t : 12 ; + }inten_bm; + }; + + uint32_t frame_index ; ///< Micro frame counter + uint32_t ctrl_ds_seg ; ///< Control Data Structure Segment + uint32_t periodic_list_base ; ///< Beginning address of perodic frame list + uint32_t async_list_addr ; ///< Address of next async QHD to be executed + uint32_t nxp_tt_control ; ///< nxp embedded transaction translator (reserved by EHCI specs) + uint32_t reserved[8] ; + uint32_t config_flag ; ///< not used by NXP + + union { + uint32_t portsc ; ///< port status and control + struct { + uint32_t current_connect_status : 1; ///< 0: No device, 1: Device is present on port + uint32_t connect_status_change : 1; ///< Change in Current Connect Status + uint32_t port_enabled : 1; ///< Ports can only be enabled by HC as a part of the reset and enable. SW can write 0 to disable + uint32_t port_enable_change : 1; ///< Port Enabled has changed + uint32_t over_current_active : 1; ///< Port has an over-current condition + uint32_t over_current_change : 1; ///< Change to Over-current Active + uint32_t force_port_resume : 1; ///< Resume detected/driven on port. This functionality defined for manipulating this bit depends on the value of the Suspend bit. + uint32_t suspend : 1; ///< Port in suspend state + uint32_t port_reset : 1; ///< 1=Port is in Reset. 0=Port is not in Reset + uint32_t nxp_highspeed_status : 1; ///< NXP customized: 0=connected to the port is not in High-speed mode, 1=connected to the port is in High-speed mode + uint32_t line_status : 2; ///< D+/D- state: 00: SE0, 10: J-state, 01: K-state + uint32_t port_power : 1; ///< 0= power off, 1= power on + uint32_t port_owner : 1; ///< not used by NXP + uint32_t port_indicator_control : 2; ///< 00b: off, 01b: Amber, 10b: green, 11b: undefined + uint32_t port_test_control : 4; ///< Port test mode, not used by tinyusb + uint32_t wake_on_connect_enable : 1; ///< Enables device connects as wake-up events + uint32_t wake_on_disconnect_enable : 1; ///< Enables device disconnects as wake-up events + uint32_t wake_on_over_current_enable : 1; ///< Enables over-current conditions as wake-up events + uint32_t nxp_phy_clock_disable : 1; ///< NXP customized: the PHY can be put into Low Power Suspend – Clock Disable when the downstream device has been put into suspend mode or when no downstream device is connected. Low power suspend is completely under the control of software. 0: enable PHY clock, 1: disable PHY clock + uint32_t nxp_port_force_fullspeed : 1; ///< NXP customized: Writing this bit to a 1 will force the port to only connect at Full Speed. It disables the chirp sequence that allowsthe port to identify itself as High Speed. This is useful for testing FS configurations with a HS host, hub or device. + uint32_t : 1; + uint32_t nxp_port_speed : 2; ///< NXP customized: This register field indicates the speed atwhich the port is operating. For HS mode operation in the host controllerand HS/FS operation in the device controller the port routing steers data to the Protocol engine. For FS and LS mode operation in the host controller, the port routing steers data to the Protocol Engine w/ Embedded Transaction Translator. 0x0: Fullspeed, 0x1: Lowspeed, 0x2: Highspeed + uint32_t TU_RESERVED : 4; + }portsc_bm; + }; +}ehci_registers_t; + +//--------------------------------------------------------------------+ +// EHCI Data Organization +//--------------------------------------------------------------------+ +typedef struct +{ + ehci_link_t period_framelist[EHCI_FRAMELIST_SIZE]; + + // for NXP ECHI, only implement 1 ms & 2 ms & 4 ms, 8 ms (framelist) + // [0] : 1ms, [1] : 2ms, [2] : 4ms, [3] : 8 ms + ehci_qhd_t period_head_arr[4]; + + // Note control qhd of dev0 is used as head of async list + struct { + ehci_qhd_t qhd; + ehci_qtd_t qtd; + }control[CFG_TUSB_HOST_DEVICE_MAX+1]; + + ehci_qhd_t qhd_pool[HCD_MAX_ENDPOINT]; + ehci_qtd_t qtd_pool[HCD_MAX_XFER] TU_ATTR_ALIGNED(32); + + ehci_registers_t* regs; + + volatile uint32_t uframe_number; +}ehci_data_t; + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_EHCI_H_ */ + +/** @} */ +/** @} */ diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c new file mode 100644 index 000000000..ee294856b --- /dev/null +++ b/src/portable/ohci/ohci.c @@ -0,0 +1,688 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#include + +#if TUSB_OPT_HOST_ENABLED && \ + (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC40XX) + +//--------------------------------------------------------------------+ +// INCLUDE +//--------------------------------------------------------------------+ +#include "osal/osal.h" + +#include "host/hcd.h" +#include "host/usbh_hcd.h" +#include "ohci.h" + +// TODO remove +#include "chip.h" + +//--------------------------------------------------------------------+ +// MACRO CONSTANT TYPEDEF +//--------------------------------------------------------------------+ +#define OHCI_REG ((ohci_registers_t *) LPC_USB_BASE) + +enum { + OHCI_CONTROL_FUNCSTATE_RESET = 0, + OHCI_CONTROL_FUNCSTATE_RESUME, + OHCI_CONTROL_FUNCSTATE_OPERATIONAL, + OHCI_CONTROL_FUNCSTATE_SUSPEND +}; + +enum { + OHCI_CONTROL_CONTROL_BULK_RATIO = 3, ///< This specifies the service ratio between Control and Bulk EDs. 0 = 1:1, 3 = 4:1 + OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK = TU_BIT(2), + OHCI_CONTROL_LIST_ISOCHRONOUS_ENABLE_MASK = TU_BIT(3), + OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK = TU_BIT(4), + OHCI_CONTROL_LIST_BULK_ENABLE_MASK = TU_BIT(5), +}; + +enum { + OHCI_FMINTERVAL_FI = 0x2EDF, // 7.3.1 nominal (reset) value + OHCI_FMINTERVAL_FSMPS = (6*(OHCI_FMINTERVAL_FI-210)) / 7, // 5.4 calculated based on maximum overhead + bit stuffing +}; + +enum { + OHCI_PERIODIC_START = 0x3E67 +}; + +enum { + OHCI_INT_SCHEDULING_OVERUN_MASK = TU_BIT(0), + OHCI_INT_WRITEBACK_DONEHEAD_MASK = TU_BIT(1), + OHCI_INT_SOF_MASK = TU_BIT(2), + OHCI_INT_RESUME_DETECTED_MASK = TU_BIT(3), + OHCI_INT_UNRECOVERABLE_ERROR_MASK = TU_BIT(4), + OHCI_INT_FRAME_OVERFLOW_MASK = TU_BIT(5), + OHCI_INT_RHPORT_STATUS_CHANGE_MASK = TU_BIT(6), + + OHCI_INT_OWNERSHIP_CHANGE_MASK = TU_BIT(30), + OHCI_INT_MASTER_ENABLE_MASK = TU_BIT(31), +}; + +enum { + OHCI_RHPORT_CURRENT_CONNECT_STATUS_MASK = TU_BIT(0), + OHCI_RHPORT_PORT_ENABLE_STATUS_MASK = TU_BIT(1), + OHCI_RHPORT_PORT_SUSPEND_STATUS_MASK = TU_BIT(2), + OHCI_RHPORT_PORT_OVER_CURRENT_INDICATOR_MASK = TU_BIT(3), + OHCI_RHPORT_PORT_RESET_STATUS_MASK = TU_BIT(4), ///< write '1' to reset port + + OHCI_RHPORT_PORT_POWER_STATUS_MASK = TU_BIT(8), + OHCI_RHPORT_LOW_SPEED_DEVICE_ATTACHED_MASK = TU_BIT(9), + + OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK = TU_BIT(16), + OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK = TU_BIT(17), + OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK = TU_BIT(18), + OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK = TU_BIT(19), + OHCI_RHPORT_PORT_RESET_CHANGE_MASK = TU_BIT(20), + + OHCI_RHPORT_ALL_CHANGE_MASK = OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK | OHCI_RHPORT_PORT_ENABLE_CHANGE_MASK | + OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK | OHCI_RHPORT_OVER_CURRENT_CHANGE_MASK | OHCI_RHPORT_PORT_RESET_CHANGE_MASK +}; + +enum { + OHCI_CCODE_NO_ERROR = 0, + OHCI_CCODE_CRC = 1, + OHCI_CCODE_BIT_STUFFING = 2, + OHCI_CCODE_DATA_TOGGLE_MISMATCH = 3, + OHCI_CCODE_STALL = 4, + OHCI_CCODE_DEVICE_NOT_RESPONDING = 5, + OHCI_CCODE_PID_CHECK_FAILURE = 6, + OHCI_CCODE_UNEXPECTED_PID = 7, + OHCI_CCODE_DATA_OVERRUN = 8, + OHCI_CCODE_DATA_UNDERRUN = 9, + OHCI_CCODE_BUFFER_OVERRUN = 12, + OHCI_CCODE_BUFFER_UNDERRUN = 13, + OHCI_CCODE_NOT_ACCESSED = 14, +}; + +enum { + OHCI_INT_ON_COMPLETE_YES = 0, + OHCI_INT_ON_COMPLETE_NO = TU_BIN8(111) +}; +//--------------------------------------------------------------------+ +// INTERNAL OBJECT & FUNCTION DECLARATION +//--------------------------------------------------------------------+ +CFG_TUSB_MEM_SECTION TU_ATTR_ALIGNED(256) static ohci_data_t ohci_data; + +static ohci_ed_t * const p_ed_head[] = +{ + [TUSB_XFER_CONTROL] = &ohci_data.control[0].ed, + [TUSB_XFER_BULK ] = &ohci_data.bulk_head_ed, + [TUSB_XFER_INTERRUPT] = &ohci_data.period_head_ed, + [TUSB_XFER_ISOCHRONOUS] = NULL // TODO Isochronous +}; + +static void ed_list_insert(ohci_ed_t * p_pre, ohci_ed_t * p_ed); +static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr); + +//--------------------------------------------------------------------+ +// USBH-HCD API +//--------------------------------------------------------------------+ +// Initialization according to 5.1.1.4 +bool hcd_init(uint8_t rhport) +{ + (void) rhport; + + //------------- Data Structure init -------------// + tu_memclr(&ohci_data, sizeof(ohci_data_t)); + for(uint8_t i=0; i<32; i++) + { // assign all interrupt pointes to period head ed + ohci_data.hcca.interrupt_table[i] = (uint32_t) &ohci_data.period_head_ed; + } + + ohci_data.control[0].ed.skip = 1; + ohci_data.bulk_head_ed.skip = 1; + ohci_data.period_head_ed.skip = 1; + + // reset controller + OHCI_REG->command_status_bit.controller_reset = 1; + while( OHCI_REG->command_status_bit.controller_reset ) {} // should not take longer than 10 us + + //------------- init ohci registers -------------// + OHCI_REG->control_head_ed = (uint32_t) &ohci_data.control[0].ed; + OHCI_REG->bulk_head_ed = (uint32_t) &ohci_data.bulk_head_ed; + OHCI_REG->hcca = (uint32_t) &ohci_data.hcca; + + OHCI_REG->interrupt_disable = OHCI_REG->interrupt_enable; // disable all interrupts + OHCI_REG->interrupt_status = OHCI_REG->interrupt_status; // clear current set bits + OHCI_REG->interrupt_enable = OHCI_INT_WRITEBACK_DONEHEAD_MASK | OHCI_INT_RESUME_DETECTED_MASK | + OHCI_INT_UNRECOVERABLE_ERROR_MASK | OHCI_INT_FRAME_OVERFLOW_MASK | OHCI_INT_RHPORT_STATUS_CHANGE_MASK | + OHCI_INT_MASTER_ENABLE_MASK; + + OHCI_REG->control |= OHCI_CONTROL_CONTROL_BULK_RATIO | OHCI_CONTROL_LIST_CONTROL_ENABLE_MASK | + OHCI_CONTROL_LIST_BULK_ENABLE_MASK | OHCI_CONTROL_LIST_PERIODIC_ENABLE_MASK; // TODO Isochronous + + OHCI_REG->frame_interval = (OHCI_FMINTERVAL_FSMPS << 16) | OHCI_FMINTERVAL_FI; + OHCI_REG->periodic_start = (OHCI_FMINTERVAL_FI * 9) / 10; // Periodic start is 90% of frame interval + + OHCI_REG->control_bit.hc_functional_state = OHCI_CONTROL_FUNCSTATE_OPERATIONAL; // make HC's state to operational state TODO use this to suspend (save power) + OHCI_REG->rh_status_bit.local_power_status_change = 1; // set global power for ports + + return true; +} + +uint32_t hcd_uframe_number(uint8_t rhport) +{ + (void) rhport; + return (ohci_data.frame_number_hi << 16 | OHCI_REG->frame_number) << 3; +} + + +//--------------------------------------------------------------------+ +// PORT API +//--------------------------------------------------------------------+ +void hcd_port_reset(uint8_t hostid) +{ + (void) hostid; + OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; +} + +bool hcd_port_connect_status(uint8_t hostid) +{ + (void) hostid; + return OHCI_REG->rhport_status_bit[0].current_connect_status; +} + +tusb_speed_t hcd_port_speed_get(uint8_t hostid) +{ + (void) hostid; + return OHCI_REG->rhport_status_bit[0].low_speed_device_attached ? TUSB_SPEED_LOW : TUSB_SPEED_FULL; +} + +// endpoints are tied to an address, which only reclaim after a long delay when enumerating +// thus there is no need to make sure ED is not in HC's cahed as it will not for sure +void hcd_device_close(uint8_t rhport, uint8_t dev_addr) +{ + // TODO OHCI + (void) rhport; + + // addr0 serves as static head --> only set skip bit + if ( dev_addr == 0 ) + { + ohci_data.control[0].ed.skip = 1; + }else + { + // remove control + ed_list_remove_by_addr( p_ed_head[TUSB_XFER_CONTROL], dev_addr); + + // remove bulk + ed_list_remove_by_addr(p_ed_head[TUSB_XFER_BULK], dev_addr); + + // remove interrupt + ed_list_remove_by_addr(p_ed_head[TUSB_XFER_INTERRUPT], dev_addr); + + // TODO remove ISO + } +} + +//--------------------------------------------------------------------+ +// Controller API +//--------------------------------------------------------------------+ + +//--------------------------------------------------------------------+ +// CONTROL PIPE API +//--------------------------------------------------------------------+ +static inline tusb_xfer_type_t ed_get_xfer_type(ohci_ed_t const * const p_ed) +{ + return (p_ed->ep_number == 0 ) ? TUSB_XFER_CONTROL : + (p_ed->is_iso ) ? TUSB_XFER_ISOCHRONOUS : + (p_ed->is_interrupt_xfer ) ? TUSB_XFER_INTERRUPT : TUSB_XFER_BULK; +} + +static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t max_packet_size, uint8_t endpoint_addr, uint8_t xfer_type, uint8_t interval) +{ + (void) interval; + + // address 0 is used as async head, which always on the list --> cannot be cleared + if (dev_addr != 0) + { + tu_memclr(p_ed, sizeof(ohci_ed_t)); + } + + p_ed->dev_addr = dev_addr; + p_ed->ep_number = endpoint_addr & 0x0F; + p_ed->pid = (xfer_type == TUSB_XFER_CONTROL) ? OHCI_PID_SETUP : ( (endpoint_addr & TUSB_DIR_IN_MASK) ? OHCI_PID_IN : OHCI_PID_OUT ); + p_ed->speed = _usbh_devices[dev_addr].speed; + p_ed->is_iso = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0; + p_ed->max_packet_size = max_packet_size; + + p_ed->used = 1; + p_ed->is_interrupt_xfer = (xfer_type == TUSB_XFER_INTERRUPT ? 1 : 0); +} + +static void gtd_init(ohci_gtd_t* p_td, void* data_ptr, uint16_t total_bytes) +{ + tu_memclr(p_td, sizeof(ohci_gtd_t)); + + p_td->used = 1; + p_td->expected_bytes = total_bytes; + + p_td->buffer_rounding = 1; // less than queued length is not a error + p_td->delay_interrupt = OHCI_INT_ON_COMPLETE_NO; + p_td->condition_code = OHCI_CCODE_NOT_ACCESSED; + + p_td->current_buffer_pointer = data_ptr; + p_td->buffer_end = total_bytes ? (((uint8_t*) data_ptr) + total_bytes-1) : NULL; +} + +bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) +{ + (void) rhport; + + ohci_ed_t* p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_setup = &ohci_data.control[dev_addr].gtd; + + gtd_init(p_setup, (void*) setup_packet, 8); + p_setup->index = dev_addr; + p_setup->pid = OHCI_PID_SETUP; + p_setup->data_toggle = TU_BIN8(10); // DATA0 + p_setup->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + //------------- Attach TDs list to Control Endpoint -------------// + p_ed->td_head.address = (uint32_t) p_setup; + + OHCI_REG->command_status_bit.control_list_filled = 1; + + return true; +} + +// TODO move around +static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr); +static ohci_gtd_t * gtd_find_free(void); +static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd); + +bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen) +{ + (void) rhport; + + uint8_t const epnum = tu_edpt_number(ep_addr); + uint8_t const dir = tu_edpt_dir(ep_addr); + + // FIXME control only for now + if ( epnum == 0 ) + { + ohci_ed_t* const p_ed = &ohci_data.control[dev_addr].ed; + ohci_gtd_t *p_data = &ohci_data.control[dev_addr].gtd; + + gtd_init(p_data, buffer, buflen); + + p_data->index = dev_addr; + p_data->pid = dir ? OHCI_PID_IN : OHCI_PID_OUT; + p_data->data_toggle = TU_BIN8(11); // DATA1 + p_data->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + p_ed->td_head.address = (uint32_t) p_data; + + OHCI_REG->command_status_bit.control_list_filled = 1; + }else + { + ohci_ed_t * p_ed = ed_from_addr(dev_addr, ep_addr); + ohci_gtd_t* p_gtd = gtd_find_free(); + + TU_ASSERT(p_gtd); + + gtd_init(p_gtd, buffer, buflen); + p_gtd->index = p_ed-ohci_data.ed_pool; + p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + td_insert_to_ed(p_ed, p_gtd); + + tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) ); + if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1; + } + + return true; +} + +//--------------------------------------------------------------------+ +// BULK/INT/ISO PIPE API +//--------------------------------------------------------------------+ +static ohci_ed_t * ed_from_addr(uint8_t dev_addr, uint8_t ep_addr) +{ + if ( tu_edpt_number(ep_addr) == 0 ) return &ohci_data.control[dev_addr].ed; + + ohci_ed_t* ed_pool = ohci_data.ed_pool; + + for(uint32_t i=0; inext = p_pre->next; + p_pre->next = (uint32_t) p_ed; +} + +static void ed_list_remove_by_addr(ohci_ed_t * p_head, uint8_t dev_addr) +{ + ohci_ed_t* p_prev = p_head; + + while( p_prev->next ) + { + ohci_ed_t* ed = (ohci_ed_t*) p_prev->next; + + if (ed->dev_addr == dev_addr) + { + // unlink ed + p_prev->next = ed->next; + + // point the removed ED's next pointer to list head to make sure HC can always safely move away from this ED + ed->next = (uint32_t) p_head; + ed->used = 0; + } + + // check next valid since we could remove it + if (p_prev->next) p_prev = (ohci_ed_t*) p_prev->next; + } +} + +bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc) +{ + (void) rhport; + + // TODO iso support + TU_ASSERT(ep_desc->bmAttributes.xfer != TUSB_XFER_ISOCHRONOUS); + + //------------- Prepare Queue Head -------------// + ohci_ed_t * p_ed; + + if ( ep_desc->bEndpointAddress == 0 ) + { + p_ed = &ohci_data.control[dev_addr].ed; + }else + { + p_ed = ed_find_free(); + } + TU_ASSERT(p_ed); + + ed_init( p_ed, dev_addr, ep_desc->wMaxPacketSize.size, ep_desc->bEndpointAddress, + ep_desc->bmAttributes.xfer, ep_desc->bInterval ); + + // control of dev0 is used as static async head + if ( dev_addr == 0 ) + { + p_ed->skip = 0; // only need to clear skip bit + return true; + } + + ed_list_insert( p_ed_head[ep_desc->bmAttributes.xfer], p_ed ); + + return true; +} + +static ohci_gtd_t * gtd_find_free(void) +{ + for(uint8_t i=0; i < HCD_MAX_XFER; i++) + { + if ( !ohci_data.gtd_pool[i].used ) return &ohci_data.gtd_pool[i]; + } + + return NULL; +} + +static void td_insert_to_ed(ohci_ed_t* p_ed, ohci_gtd_t * p_gtd) +{ + // tail is always NULL + if ( tu_align16(p_ed->td_head.address) == 0 ) + { // TD queue is empty --> head = TD + p_ed->td_head.address |= (uint32_t) p_gtd; + } + else + { // TODO currently only support queue up to 2 TD each endpoint at a time + ((ohci_gtd_t*) tu_align16(p_ed->td_head.address))->next = (uint32_t) p_gtd; + } +} + +static bool pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +{ + ohci_ed_t* const p_ed = ed_from_addr(dev_addr, ep_addr); + + // not support ISO yet + TU_VERIFY ( !p_ed->is_iso ); + + ohci_gtd_t * const p_gtd = gtd_find_free(); + TU_ASSERT(p_gtd); // not enough gtd + + gtd_init(p_gtd, buffer, total_bytes); + p_gtd->index = p_ed-ohci_data.ed_pool; + + if ( int_on_complete ) p_gtd->delay_interrupt = OHCI_INT_ON_COMPLETE_YES; + + td_insert_to_ed(p_ed, p_gtd); + + return true; +} + +bool hcd_pipe_queue_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes) +{ + return pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, false); +} + +bool hcd_pipe_xfer(uint8_t dev_addr, uint8_t ep_addr, uint8_t buffer[], uint16_t total_bytes, bool int_on_complete) +{ + (void) int_on_complete; + TU_ASSERT( pipe_queue_xfer(dev_addr, ep_addr, buffer, total_bytes, true) ); + + tusb_xfer_type_t xfer_type = ed_get_xfer_type( ed_from_addr(dev_addr, ep_addr) ); + + if (TUSB_XFER_BULK == xfer_type) OHCI_REG->command_status_bit.bulk_list_filled = 1; + + return true; +} + +bool hcd_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) +{ + ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); + return tu_align16(p_ed->td_head.address) != tu_align16(p_ed->td_tail); +} + +bool hcd_edpt_stalled(uint8_t dev_addr, uint8_t ep_addr) +{ + ohci_ed_t const * const p_ed = ed_from_addr(dev_addr, ep_addr); + return p_ed->td_head.halted && p_ed->is_stalled; +} + +bool hcd_edpt_clear_stall(uint8_t dev_addr, uint8_t ep_addr) +{ + ohci_ed_t * const p_ed = ed_from_addr(dev_addr, ep_addr); + + p_ed->is_stalled = 0; + p_ed->td_tail &= 0x0Ful; // set tail pointer back to NULL + + p_ed->td_head.toggle = 0; // reset data toggle + p_ed->td_head.halted = 0; + + if ( TUSB_XFER_BULK == ed_get_xfer_type(p_ed) ) OHCI_REG->command_status_bit.bulk_list_filled = 1; + + return true; +} + + +//--------------------------------------------------------------------+ +// OHCI Interrupt Handler +//--------------------------------------------------------------------+ +static ohci_td_item_t* list_reverse(ohci_td_item_t* td_head) +{ + ohci_td_item_t* td_reverse_head = NULL; + + while(td_head != NULL) + { + uint32_t next = td_head->next; + + // make current's item become reverse's first item + td_head->next = (uint32_t) td_reverse_head; + td_reverse_head = td_head; + + td_head = (ohci_td_item_t*) next; // advance to next item + } + + return td_reverse_head; +} + +static inline bool gtd_is_control(ohci_gtd_t const * const p_qtd) +{ + return ((uint32_t) p_qtd) < ((uint32_t) ohci_data.gtd_pool); // check ohci_data_t for memory layout +} + +static inline ohci_ed_t* gtd_get_ed(ohci_gtd_t const * const p_qtd) +{ + if ( gtd_is_control(p_qtd) ) + { + return &ohci_data.control[p_qtd->index].ed; + }else + { + return &ohci_data.ed_pool[p_qtd->index]; + } +} + +static inline uint32_t gtd_xfer_byte_left(uint32_t buffer_end, uint32_t current_buffer) +{ // 5.2.9 OHCI sample code + return (tu_align4k(buffer_end ^ current_buffer) ? 0x1000 : 0) + + tu_offset4k(buffer_end) - tu_offset4k(current_buffer) + 1; +} + +static void done_queue_isr(uint8_t hostid) +{ + (void) hostid; + + // done head is written in reversed order of completion --> need to reverse the done queue first + ohci_td_item_t* td_head = list_reverse ( (ohci_td_item_t*) tu_align16(ohci_data.hcca.done_head) ); + + while( td_head != NULL ) + { + // TODO check if td_head is iso td + //------------- Non ISO transfer -------------// + ohci_gtd_t * const p_qtd = (ohci_gtd_t *) td_head; + xfer_result_t const event = (p_qtd->condition_code == OHCI_CCODE_NO_ERROR) ? XFER_RESULT_SUCCESS : + (p_qtd->condition_code == OHCI_CCODE_STALL) ? XFER_RESULT_STALLED : XFER_RESULT_FAILED; + + p_qtd->used = 0; // free TD + if ( (p_qtd->delay_interrupt == OHCI_INT_ON_COMPLETE_YES) || (event != XFER_RESULT_SUCCESS) ) + { + ohci_ed_t * const p_ed = gtd_get_ed(p_qtd); + + uint32_t const xferred_bytes = p_qtd->expected_bytes - gtd_xfer_byte_left((uint32_t) p_qtd->buffer_end, (uint32_t) p_qtd->current_buffer_pointer); + + // NOTE Assuming the current list is BULK and there is no other EDs in the list has queued TDs. + // When there is a error resulting this ED is halted, and this EP still has other queued TD + // --> the Bulk list only has this halted EP queueing TDs (remaining) + // --> Bulk list will be considered as not empty by HC !!! while there is no attempt transaction on this list + // --> HC will not process Control list (due to service ratio when Bulk list not empty) + // To walk-around this, the halted ED will have TailP = HeadP (empty list condition), when clearing halt + // the TailP must be set back to NULL for processing remaining TDs + if ((event != XFER_RESULT_SUCCESS)) + { + p_ed->td_tail &= 0x0Ful; + p_ed->td_tail |= tu_align16(p_ed->td_head.address); // mark halted EP as empty queue + if ( event == XFER_RESULT_STALLED ) p_ed->is_stalled = 1; + } + + hcd_event_xfer_complete(p_ed->dev_addr, + tu_edpt_addr(p_ed->ep_number, p_ed->pid == OHCI_PID_IN), + xferred_bytes, event, true); + } + + td_head = (ohci_td_item_t*) td_head->next; + } +} + +void hcd_int_handler(uint8_t hostid) +{ + uint32_t const int_en = OHCI_REG->interrupt_enable; + uint32_t const int_status = OHCI_REG->interrupt_status & int_en; + + if (int_status == 0) return; + + // Frame number overflow + if ( int_status & OHCI_INT_FRAME_OVERFLOW_MASK ) + { + ohci_data.frame_number_hi++; + } + + //------------- RootHub status -------------// + if ( int_status & OHCI_INT_RHPORT_STATUS_CHANGE_MASK ) + { + uint32_t const rhport_status = OHCI_REG->rhport_status[0] & OHCI_RHPORT_ALL_CHANGE_MASK; + + // TODO dual port is not yet supported + if ( rhport_status & OHCI_RHPORT_CONNECT_STATUS_CHANGE_MASK ) + { + // TODO check if remote wake-up + if ( OHCI_REG->rhport_status_bit[0].current_connect_status ) + { + // TODO reset port immediately, without this controller will got 2-3 (debouncing connection status change) + OHCI_REG->rhport_status[0] = OHCI_RHPORT_PORT_RESET_STATUS_MASK; + hcd_event_device_attach(hostid, true); + }else + { + hcd_event_device_remove(hostid, true); + } + } + + if ( rhport_status & OHCI_RHPORT_PORT_SUSPEND_CHANGE_MASK) + { + + } + + OHCI_REG->rhport_status[0] = rhport_status; // acknowledge all interrupt + } + + //------------- Transfer Complete -------------// + if ( int_status & OHCI_INT_WRITEBACK_DONEHEAD_MASK) + { + done_queue_isr(hostid); + } + + OHCI_REG->interrupt_status = int_status; // Acknowledge handled interrupt +} +//--------------------------------------------------------------------+ +// HELPER +//--------------------------------------------------------------------+ + + +#endif + diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h new file mode 100644 index 000000000..7f9e55b21 --- /dev/null +++ b/src/portable/ohci/ohci.h @@ -0,0 +1,291 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2019 Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/** \ingroup Group_HCD + * @{ + * \defgroup OHCI + * \brief OHCI driver. All documents sources mentioned here (eg section 3.5) is referring to OHCI Specs unless state otherwise + * @{ */ + +#ifndef _TUSB_OHCI_H_ +#define _TUSB_OHCI_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +//--------------------------------------------------------------------+ +// OHCI CONFIGURATION & CONSTANTS +//--------------------------------------------------------------------+ +#define HOST_HCD_XFER_INTERRUPT // TODO interrupt is used widely, should always be enalbed +#define OHCI_PERIODIC_LIST (defined HOST_HCD_XFER_INTERRUPT || defined HOST_HCD_XFER_ISOCHRONOUS) + +// TODO merge OHCI with EHCI +enum { + OHCI_MAX_ITD = 4 +}; + +enum { + OHCI_PID_SETUP = 0, + OHCI_PID_OUT, + OHCI_PID_IN, +}; + +//--------------------------------------------------------------------+ +// OHCI Data Structure +//--------------------------------------------------------------------+ +typedef struct { + uint32_t interrupt_table[32]; + volatile uint16_t frame_number; + volatile uint16_t frame_pad; + volatile uint32_t done_head; + uint8_t reserved[116+4]; // TODO try to make use of this area if possible, extra 4 byte to make the whole struct size = 256 +}ohci_hcca_t; // TU_ATTR_ALIGNED(256) + +TU_VERIFY_STATIC( sizeof(ohci_hcca_t) == 256, "size is not correct" ); + +typedef struct { + uint32_t reserved[2]; + volatile uint32_t next; + uint32_t reserved2; +}ohci_td_item_t; + + +typedef struct TU_ATTR_ALIGNED(16) +{ + // Word 0 + uint32_t used : 1; + uint32_t index : 4; // endpoint index the td belongs to, or device address in case of control xfer + uint32_t expected_bytes : 13; // TODO available for hcd + + uint32_t buffer_rounding : 1; + uint32_t pid : 2; + uint32_t delay_interrupt : 3; + volatile uint32_t data_toggle : 2; + volatile uint32_t error_count : 2; + volatile uint32_t condition_code : 4; + + // Word 1 + volatile uint8_t* current_buffer_pointer; + + // Word 2 : next TD + volatile uint32_t next; + + // Word 3 + uint8_t* buffer_end; +} ohci_gtd_t; + +TU_VERIFY_STATIC( sizeof(ohci_gtd_t) == 16, "size is not correct" ); + +typedef struct TU_ATTR_ALIGNED(16) +{ + // Word 0 + uint32_t dev_addr : 7; + uint32_t ep_number : 4; + uint32_t pid : 2; // 00b from TD, 01b Out, 10b In + uint32_t speed : 1; + uint32_t skip : 1; + uint32_t is_iso : 1; + uint32_t max_packet_size : 11; + // HCD: make use of 5 reserved bits + uint32_t used : 1; + uint32_t is_interrupt_xfer : 1; + uint32_t is_stalled : 1; + uint32_t : 2; + + // Word 1 + uint32_t td_tail; + + // Word 2 + volatile union { + uint32_t address; + struct { + uint32_t halted : 1; + uint32_t toggle : 1; + uint32_t : 30; + }; + }td_head; + + // Word 3: next ED + uint32_t next; +} ohci_ed_t; + +TU_VERIFY_STATIC( sizeof(ohci_ed_t) == 16, "size is not correct" ); + +typedef struct TU_ATTR_ALIGNED(32) +{ + /*---------- Word 1 ----------*/ + uint32_t starting_frame : 16; + uint32_t : 5; // can be used + uint32_t delay_interrupt : 3; + uint32_t frame_count : 3; + uint32_t : 1; // can be used + volatile uint32_t condition_code : 4; + + /*---------- Word 2 ----------*/ + uint32_t buffer_page0; // 12 lsb bits can be used + + /*---------- Word 3 ----------*/ + volatile uint32_t next; + + /*---------- Word 4 ----------*/ + uint32_t buffer_end; + + /*---------- Word 5-8 ----------*/ + volatile uint16_t offset_packetstatus[8]; +} ochi_itd_t; + +TU_VERIFY_STATIC( sizeof(ochi_itd_t) == 32, "size is not correct" ); + +// structure with member alignment required from large to small +typedef struct TU_ATTR_ALIGNED(256) +{ + ohci_hcca_t hcca; + + ohci_ed_t bulk_head_ed; // static bulk head (dummy) + ohci_ed_t period_head_ed; // static periodic list head (dummy) + + // control endpoints has reserved resources + struct { + ohci_ed_t ed; + ohci_gtd_t gtd; + }control[CFG_TUSB_HOST_DEVICE_MAX+1]; + + // ochi_itd_t itd[OHCI_MAX_ITD]; // itd requires alignment of 32 + ohci_ed_t ed_pool[HCD_MAX_ENDPOINT]; + ohci_gtd_t gtd_pool[HCD_MAX_XFER]; + + volatile uint16_t frame_number_hi; + +} ohci_data_t; + +//--------------------------------------------------------------------+ +// OHCI Operational Register +//--------------------------------------------------------------------+ + + +//--------------------------------------------------------------------+ +// OHCI Data Organization +//--------------------------------------------------------------------+ +typedef volatile struct +{ + uint32_t revision; + + union { + uint32_t control; + struct { + uint32_t control_bulk_service_ratio : 2; + uint32_t periodic_list_enable : 1; + uint32_t isochronous_enable : 1; + uint32_t control_list_enable : 1; + uint32_t bulk_list_enable : 1; + uint32_t hc_functional_state : 2; + uint32_t interrupt_routing : 1; + uint32_t remote_wakeup_connected : 1; + uint32_t remote_wakeup_enale : 1; + uint32_t TU_RESERVED : 21; + }control_bit; + }; + + union { + uint32_t command_status; + struct { + uint32_t controller_reset : 1; + uint32_t control_list_filled : 1; + uint32_t bulk_list_filled : 1; + uint32_t ownership_change_request : 1; + uint32_t : 12; + uint32_t scheduling_overrun_count : 2; + }command_status_bit; + }; + + uint32_t interrupt_status; + uint32_t interrupt_enable; + uint32_t interrupt_disable; + + uint32_t hcca; + uint32_t period_current_ed; + uint32_t control_head_ed; + uint32_t control_current_ed; + uint32_t bulk_head_ed; + uint32_t bulk_current_ed; + uint32_t done_head; + + uint32_t frame_interval; + uint32_t frame_remaining; + uint32_t frame_number; + uint32_t periodic_start; + uint32_t lowspeed_threshold; + + uint32_t rh_descriptorA; + uint32_t rh_descriptorB; + + union { + uint32_t rh_status; + struct { + uint32_t local_power_status : 1; // read Local Power Status; write: Clear Global Power + uint32_t over_current_indicator : 1; + uint32_t : 13; + uint32_t device_remote_wakeup_enable : 1; + uint32_t local_power_status_change : 1; + uint32_t over_current_indicator_change : 1; + uint32_t : 13; + uint32_t clear_remote_wakeup_enable : 1; + }rh_status_bit; + }; + + union { + uint32_t rhport_status[2]; // TODO NXP OHCI controller only has 2 ports + struct { + uint32_t current_connect_status : 1; + uint32_t port_enable_status : 1; + uint32_t port_suspend_status : 1; + uint32_t port_over_current_indicator : 1; + uint32_t port_reset_status : 1; + uint32_t : 3; + uint32_t port_power_status : 1; + uint32_t low_speed_device_attached : 1; + uint32_t : 6; + uint32_t connect_status_change : 1; + uint32_t port_enable_status_change : 1; + uint32_t port_suspend_status_change : 1; + uint32_t port_over_current_indicator_change : 1; + uint32_t port_reset_status_change : 1; + uint32_t TU_RESERVED : 11; + }rhport_status_bit[2]; + }; +}ohci_registers_t; + +TU_VERIFY_STATIC( sizeof(ohci_registers_t) == 0x5c, "size is not correct"); + +#ifdef __cplusplus + } +#endif + +#endif /* _TUSB_OHCI_H_ */ + +/** @} */ +/** @} */ -- cgit v1.3.1 From ac30211853e9f8948d03db871f839e93a75b1edd Mon Sep 17 00:00:00 2001 From: hathach Date: Wed, 24 Feb 2021 00:27:56 +0700 Subject: remove obsolete host example --- examples/obsolete/host/host_os_none/.cproject | 1039 ---------------------- examples/obsolete/host/host_os_none/.project | 129 --- examples/obsolete/host/src/app_os_prio.h | 70 -- examples/obsolete/host/src/cdc_serial_host_app.c | 157 ---- examples/obsolete/host/src/cdc_serial_host_app.h | 62 -- examples/obsolete/host/src/keyboard_host_app.c | 164 ---- examples/obsolete/host/src/keyboard_host_app.h | 68 -- examples/obsolete/host/src/main.c | 131 --- examples/obsolete/host/src/mouse_host_app.c | 169 ---- examples/obsolete/host/src/mouse_host_app.h | 71 -- examples/obsolete/host/src/msc_cli.c | 473 ---------- examples/obsolete/host/src/msc_cli.h | 52 -- examples/obsolete/host/src/msc_host_app.c | 170 ---- examples/obsolete/host/src/msc_host_app.h | 63 -- examples/obsolete/host/src/rndis_host_app.c | 64 -- examples/obsolete/host/src/rndis_host_app.h | 63 -- examples/obsolete/host/src/tusb_config.h | 101 --- 17 files changed, 3046 deletions(-) delete mode 100644 examples/obsolete/host/host_os_none/.cproject delete mode 100644 examples/obsolete/host/host_os_none/.project delete mode 100644 examples/obsolete/host/src/app_os_prio.h delete mode 100644 examples/obsolete/host/src/cdc_serial_host_app.c delete mode 100644 examples/obsolete/host/src/cdc_serial_host_app.h delete mode 100644 examples/obsolete/host/src/keyboard_host_app.c delete mode 100644 examples/obsolete/host/src/keyboard_host_app.h delete mode 100644 examples/obsolete/host/src/main.c delete mode 100644 examples/obsolete/host/src/mouse_host_app.c delete mode 100644 examples/obsolete/host/src/mouse_host_app.h delete mode 100644 examples/obsolete/host/src/msc_cli.c delete mode 100644 examples/obsolete/host/src/msc_cli.h delete mode 100644 examples/obsolete/host/src/msc_host_app.c delete mode 100644 examples/obsolete/host/src/msc_host_app.h delete mode 100644 examples/obsolete/host/src/rndis_host_app.c delete mode 100644 examples/obsolete/host/src/rndis_host_app.h delete mode 100644 examples/obsolete/host/src/tusb_config.h diff --git a/examples/obsolete/host/host_os_none/.cproject b/examples/obsolete/host/host_os_none/.cproject deleted file mode 100644 index 8082dcfaf..000000000 --- a/examples/obsolete/host/host_os_none/.cproject +++ /dev/null @@ -1,1039 +0,0 @@ - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - <?xml version="1.0" encoding="UTF-8"?> -<TargetConfig> -<Properties property_0="None" property_2="LPC18x7_43x7_2x512_BootA.cfx" property_3="NXP" property_4="LPC4357" property_count="5" version="70200"/> -<infoList vendor="NXP"><info chip="LPC4357" flash_driver="LPC18x7_43x7_2x512_BootA.cfx" match_id="0x0" name="LPC4357" resetscript="LPC18LPC43InternalFLASHBootResetscript.scp" stub="crt_emu_lpc18_43_nxp"><chip><name>LPC4357</name> -<family>LPC43xx</family> -<vendor>NXP (formerly Philips)</vendor> -<reset board="None" core="Real" sys="Real"/> -<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/> -<memory can_program="true" id="Flash" is_ro="true" type="Flash"/> -<memory id="RAM" type="RAM"/> -<memory id="Periph" is_volatile="true" type="Peripheral"/> -<memoryInstance derived_from="Flash" id="MFlashA512" location="0x1a000000" size="0x80000"/> -<memoryInstance derived_from="Flash" id="MFlashB512" location="0x1b000000" size="0x80000"/> -<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/> -<memoryInstance derived_from="RAM" id="RamLoc40" location="0x10080000" size="0xa000"/> -<memoryInstance derived_from="RAM" id="RamAHB32" location="0x20000000" size="0x8000"/> -<memoryInstance derived_from="RAM" id="RamAHB16" location="0x20008000" size="0x4000"/> -<memoryInstance derived_from="RAM" id="RamAHB_ETB16" location="0x2000c000" size="0x4000"/> -<prog_flash blocksz="0x2000" location="0x1a000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/> -<prog_flash blocksz="0x10000" location="0x1a010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/> -<prog_flash blocksz="0x2000" location="0x1b000000" maxprgbuff="0x400" progwithcode="TRUE" size="0x10000"/> -<prog_flash blocksz="0x10000" location="0x1b010000" maxprgbuff="0x400" progwithcode="TRUE" size="0x70000"/> -<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/> -<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/> -<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/> -<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/> -<peripheralInstance derived_from="SCT" id="SCT" location="0x40000000"/> -<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x40002000"/> -<peripheralInstance derived_from="SPIFI" id="SPIFI" location="0x40003000"/> -<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x40004000"/> -<peripheralInstance derived_from="EMC" id="EMC" location="0x40005000"/> -<peripheralInstance derived_from="USB0" id="USB0" location="0x40006000"/> -<peripheralInstance derived_from="USB1" id="USB1" location="0x40007000"/> -<peripheralInstance derived_from="LCD" id="LCD" location="0x40008000"/> -<peripheralInstance derived_from="EEPROM" id="EEPROM" location="0x4000e000"/> -<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x40010000"/> -<peripheralInstance derived_from="ATIMER" id="ATIMER" location="0x40040000"/> -<peripheralInstance derived_from="REGFILE" id="REGFILE" location="0x40041000"/> -<peripheralInstance derived_from="PMC" id="PMC" location="0x40042000"/> -<peripheralInstance derived_from="CREG" id="CREG" location="0x40043000"/> -<peripheralInstance derived_from="EVENTROUTER" id="EVENTROUTER" location="0x40044000"/> -<peripheralInstance derived_from="RTC" id="RTC" location="0x40046000"/> -<peripheralInstance derived_from="CGU" id="CGU" location="0x40050000"/> -<peripheralInstance derived_from="CCU1" id="CCU1" location="0x40051000"/> -<peripheralInstance derived_from="CCU2" id="CCU2" location="0x40052000"/> -<peripheralInstance derived_from="RGU" id="RGU" location="0x40053000"/> -<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40080000"/> -<peripheralInstance derived_from="USART0" id="USART0" location="0x40081000"/> -<peripheralInstance derived_from="USART2" id="USART2" location="0x400c1000"/> -<peripheralInstance derived_from="USART3" id="USART3" location="0x400c2000"/> -<peripheralInstance derived_from="UART1" id="UART1" location="0x40082000"/> -<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40083000"/> -<peripheralInstance derived_from="SSP1" id="SSP1" location="0x400c5000"/> -<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40084000"/> -<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40085000"/> -<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x400c3000"/> -<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x400c4000"/> -<peripheralInstance derived_from="SCU" id="SCU" location="0x40086000"/> -<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x40087000"/> -<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x40088000"/> -<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40089000"/> -<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400a0000"/> -<peripheralInstance derived_from="I2C0" id="I2C0" location="0x400a1000"/> -<peripheralInstance derived_from="I2C1" id="I2C1" location="0x400e0000"/> -<peripheralInstance derived_from="I2S0" id="I2S0" location="0x400a2000"/> -<peripheralInstance derived_from="I2S1" id="I2S1" location="0x400a3000"/> -<peripheralInstance derived_from="C-CAN1" id="C-CAN1" location="0x400a4000"/> -<peripheralInstance derived_from="RITIMER" id="RITIMER" location="0x400c0000"/> -<peripheralInstance derived_from="QEI" id="QEI" location="0x400c6000"/> -<peripheralInstance derived_from="GIMA" id="GIMA" location="0x400c7000"/> -<peripheralInstance derived_from="DAC" id="DAC" location="0x400e1000"/> -<peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400e2000"/> -<peripheralInstance derived_from="ADC0" id="ADC0" location="0x400e3000"/> -<peripheralInstance derived_from="ADC1" id="ADC1" location="0x400e4000"/> -<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x400f4000"/> -<peripheralInstance derived_from="SPI" id="SPI" location="0x40100000"/> -<peripheralInstance derived_from="SGPIO" id="SGPIO" location="0x40101000"/> -</chip> -<processor><name gcc_name="cortex-m4">Cortex-M4</name> -<family>Cortex-M</family> -</processor> -<link href="nxp_lpc43xx_peripheral.xme" show="embed" type="simple"/> -</info> -</infoList> -</TargetConfig> - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - diff --git a/examples/obsolete/host/host_os_none/.project b/examples/obsolete/host/host_os_none/.project deleted file mode 100644 index c633d669e..000000000 --- a/examples/obsolete/host/host_os_none/.project +++ /dev/null @@ -1,129 +0,0 @@ - - - host_os_none - - - - - - org.eclipse.cdt.managedbuilder.core.genmakebuilder - clean,full,incremental, - - - ?name? - - - - org.eclipse.cdt.make.core.append_environment - true - - - org.eclipse.cdt.make.core.autoBuildTarget - all - - - org.eclipse.cdt.make.core.buildArguments - - - - org.eclipse.cdt.make.core.buildCommand - make - - - org.eclipse.cdt.make.core.buildLocation - ${workspace_loc:/host/Debug} - - - org.eclipse.cdt.make.core.cleanBuildTarget - clean - - - org.eclipse.cdt.make.core.contents - org.eclipse.cdt.make.core.activeConfigSettings - - - org.eclipse.cdt.make.core.enableAutoBuild - false - - - org.eclipse.cdt.make.core.enableCleanBuild - true - - - org.eclipse.cdt.make.core.enableFullBuild - true - - - org.eclipse.cdt.make.core.fullBuildTarget - all - - - org.eclipse.cdt.make.core.stopOnError - true - - - org.eclipse.cdt.make.core.useDefaultBuildCmd - true - - - - - org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder - full,incremental, - - - - - - org.eclipse.cdt.core.cnature - org.eclipse.cdt.managedbuilder.core.managedBuildNature - org.eclipse.cdt.managedbuilder.core.ScannerConfigNature - - - - boards - 2 - PARENT-3-PROJECT_LOC/boards - - - fatfs - 2 - PARENT-3-PROJECT_LOC/vendor/fatfs - - - mcu - 2 - PARENT-3-PROJECT_LOC/mcu - - - src - 2 - PARENT-1-PROJECT_LOC/src - - - tinyusb - 2 - PARENT-3-PROJECT_LOC/tinyusb - - - - - 1394685086167 - mcu - 26 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-iar - - - - 1394685086182 - mcu - 26 - - org.eclipse.ui.ide.multiFilter - 1.0-name-matches-false-false-keil - - - - diff --git a/examples/obsolete/host/src/app_os_prio.h b/examples/obsolete/host/src/app_os_prio.h deleted file mode 100644 index a9e964a70..000000000 --- a/examples/obsolete/host/src/app_os_prio.h +++ /dev/null @@ -1,70 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup TBD - * \defgroup TBD - * \brief TBD - * - * @{ - */ - -#ifndef _TUSB_APP_OS_PRIO_H_ -#define _TUSB_APP_OS_PRIO_H_ - - -#ifdef __cplusplus - extern "C" { -#endif - -#include "tusb.h" - -#if CFG_TUSB_OS == OPT_OS_NONE - #define LOWER_PRIO(x) 0 // does not matter -#elif CFG_TUSB_OS == OPT_OS_FREERTOS - #define LOWER_PRIO(x) ((x)-1) // freeRTOS lower number --> lower priority -#elif CFG_TUSB_OS == TUSB_OS_CMSIS_RTX - #define LOWER_PRIO(x) ((x)-1) // CMSIS-RTOS lower number --> lower priority -#else - #error Priority is not configured for this RTOS -#endif - -enum { - STANDARD_APP_TASK_PRIO = LOWER_PRIO(CFG_TUD_TASK_PRIO), // Application Task is lower than usb system task - LED_BLINKING_APP_TASK_PRIO = LOWER_PRIO(STANDARD_APP_TASK_PRIO), // Blinking task is lower than normal task - - KEYBOARD_APP_TASK_PRIO = STANDARD_APP_TASK_PRIO, - MOUSE_APP_TASK_PRIO = STANDARD_APP_TASK_PRIO, - CDC_SERIAL_APP_TASK_PRIO = STANDARD_APP_TASK_PRIO, - MSC_APP_TASK_PRIO = STANDARD_APP_TASK_PRIO -}; - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_APP_OS_PRIO_H_ */ - -/** @} */ diff --git a/examples/obsolete/host/src/cdc_serial_host_app.c b/examples/obsolete/host/src/cdc_serial_host_app.c deleted file mode 100644 index a70ac09bb..000000000 --- a/examples/obsolete/host/src/cdc_serial_host_app.c +++ /dev/null @@ -1,157 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "cdc_serial_host_app.h" -#include "app_os_prio.h" - -#if CFG_TUH_CDC - -#define QUEUE_SERIAL_DEPTH 100 - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -static osal_semaphore_t sem_hdl; - -enum { SERIAL_BUFFER_SIZE = 64 }; -CFG_TUSB_MEM_SECTION static uint8_t serial_in_buffer[SERIAL_BUFFER_SIZE]; -CFG_TUSB_MEM_SECTION static uint8_t serial_out_buffer[SERIAL_BUFFER_SIZE]; - -static uint8_t received_bytes; // set by transfer complete callback - -//--------------------------------------------------------------------+ -// tinyusb callbacks -//--------------------------------------------------------------------+ -void tuh_cdc_mounted_cb(uint8_t dev_addr) -{ // application set-up - printf("\na CDC device (address %d) is mounted\n", dev_addr); - - tu_memclr(serial_in_buffer, sizeof(serial_in_buffer)); - tu_memclr(serial_out_buffer, sizeof(serial_out_buffer)); - received_bytes = 0; - - osal_semaphore_reset(sem_hdl); - tuh_cdc_receive(dev_addr, serial_in_buffer, SERIAL_BUFFER_SIZE, true); // schedule first transfer -} - -void tuh_cdc_unmounted_cb(uint8_t dev_addr) -{ // application tear-down - printf("\na CDC device (address %d) is unmounted \n", dev_addr); -} - -// invoked ISR context -void tuh_cdc_xfer_isr(uint8_t dev_addr, xfer_result_t event, cdc_pipeid_t pipe_id, uint32_t xferred_bytes) -{ - (void) dev_addr; // compiler warnings - - switch ( pipe_id ) - { - case CDC_PIPE_DATA_IN: - switch(event) - { - case XFER_RESULT_SUCCESS: - received_bytes = xferred_bytes; - osal_semaphore_post(sem_hdl); // notify main task - break; - - case XFER_RESULT_FAILED: - received_bytes = 0; // ignore - tuh_cdc_receive(dev_addr, serial_in_buffer, SERIAL_BUFFER_SIZE, true); // waiting for next data - break; - - case XFER_RESULT_STALLED: - default : - break; - } - break; - - case CDC_PIPE_DATA_OUT: - case CDC_PIPE_NOTIFICATION: - default: - break; - } -} - -//--------------------------------------------------------------------+ -// APPLICATION -//--------------------------------------------------------------------+ -void cdc_serial_host_app_init(void) -{ - sem_hdl = osal_semaphore_create(1, 0); - TU_ASSERT( sem_hdl, VOID_RETURN); - - TU_VERIFY( osal_task_create(cdc_serial_host_app_task, "cdc", 128, NULL, CDC_SERIAL_APP_TASK_PRIO), ); -} - -//------------- main task -------------// -void cdc_serial_host_app_task( void* param ) -{ - (void) param; - - OSAL_TASK_BEGIN - - //------------- send characters got from uart terminal to the first CDC device -------------// - for(uint8_t dev_addr=1; dev_addr <= CFG_TUSB_HOST_DEVICE_MAX; dev_addr++) - { - if ( tuh_cdc_serial_is_mounted(dev_addr) ) - { - int ch_tx = getchar(); - if ( ch_tx > 0 ) - { // USB is much faster than serial, here we assume usb is always complete. There could be some characters missing though - serial_out_buffer[0] = (uint8_t) ch_tx; - - if ( !tuh_cdc_is_busy(dev_addr, CDC_PIPE_DATA_OUT) ) - { - tuh_cdc_send(dev_addr, serial_out_buffer, 1, false); // no need for callback on serial out pipe - } - } - break; // demo app only communicate with the first CDC-capable device - } - } - - //------------- print out received characters -------------// - tusb_error_t error; - osal_semaphore_wait(sem_hdl, 100, &error); // waiting for incoming data - - if ( TUSB_ERROR_NONE == error) - { - for(uint8_t i=0; ikeycode[i] == keycode) return true; - } - - return false; -} - -static inline void process_kbd_report(hid_keyboard_report_t const *p_new_report) -{ - static hid_keyboard_report_t prev_report = { 0, 0, {0} }; // previous report to check key released - - //------------- example code ignore control (non-printable) key affects -------------// - for(uint8_t i=0; i<6; i++) - { - if ( p_new_report->keycode[i] ) - { - if ( find_key_in_report(&prev_report, p_new_report->keycode[i]) ) - { - // exist in previous report means the current key is holding - }else - { - // not existed in previous report means the current key is pressed - uint8_t ch = keycode_to_ascii(p_new_report->modifier, p_new_report->keycode[i]); - putchar(ch); - if ( ch == '\r' ) putchar('\n'); // added new line for enter key - } - } - // TODO example skips key released - } - - prev_report = *p_new_report; -} - -static inline uint8_t keycode_to_ascii(uint8_t modifier, uint8_t keycode) -{ - // TODO max of keycode_ascii_tbl - return keycode > 128 ? 0 : - hid_keycode_to_ascii_tbl [modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT) ? 1 : 0] [keycode]; -} - -#endif diff --git a/examples/obsolete/host/src/keyboard_host_app.h b/examples/obsolete/host/src/keyboard_host_app.h deleted file mode 100644 index 12d7fdedd..000000000 --- a/examples/obsolete/host/src/keyboard_host_app.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \file - * \brief TBD - * - * \note TBD - */ - -/** \ingroup TBD - * \defgroup TBD - * \brief TBD - * - * @{ - */ - -#ifndef _TUSB_KEYBOARD_HOST_APP_H_ -#define _TUSB_KEYBOARD_HOST_APP_H_ - -#include "board.h" -#include "tusb.h" - -#ifdef __cplusplus - extern "C" { -#endif - -#if CFG_TUH_HID_KEYBOARD - -void keyboard_host_app_init(void); -void keyboard_host_app_task(void* param); - -#else - -#define keyboard_host_app_init() -#define keyboard_host_app_task(x) - -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_KEYBOARD_HOST_APP_H_ */ - -/** @} */ diff --git a/examples/obsolete/host/src/main.c b/examples/obsolete/host/src/main.c deleted file mode 100644 index 59860b782..000000000 --- a/examples/obsolete/host/src/main.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include -#include -#include - -#include "board.h" -#include "tusb.h" - -#include "mouse_host_app.h" -#include "keyboard_host_app.h" -#include "msc_host_app.h" -#include "cdc_serial_host_app.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -void print_greeting(void); - -//--------------------------------------------------------------------+ -// IMPLEMENTATION -//--------------------------------------------------------------------+ - -#if CFG_TUSB_OS == OPT_OS_NONE -// like a real RTOS, this function is a main loop invoking each task in application and never return -void os_none_start_scheduler(void) -{ - while (1) - { - tusb_task(); - led_blinking_task(NULL); - - keyboard_host_app_task(NULL); - mouse_host_app_task(NULL); - msc_host_app_task(NULL); - cdc_serial_host_app_task(NULL); - } -} -#endif - -int main(void) -{ -#if CFG_TUSB_OS == TUSB_OS_CMSIS_RTX - osKernelInitialize(); // CMSIS RTX requires kernel init before any other OS functions -#endif - - board_init(); - print_greeting(); - - tusb_init(); - - //------------- application task init -------------// - led_blinking_init(); - - keyboard_host_app_init(); - mouse_host_app_init(); - msc_host_app_init(); - cdc_serial_host_app_init(); - - //------------- start OS scheduler (never return) -------------// -#if CFG_TUSB_OS == OPT_OS_FREERTOS - vTaskStartScheduler(); -#elif CFG_TUSB_OS == OPT_OS_NONE - os_none_start_scheduler(); -#elif CFG_TUSB_OS == TUSB_OS_CMSIS_RTX - osKernelStart(); -#else - #error need to start RTOS schduler -#endif - - return 0; -} - -//--------------------------------------------------------------------+ -// HELPER FUNCTION -//--------------------------------------------------------------------+ -void print_greeting(void) -{ - char const * const rtos_name[] = - { - [OPT_OS_NONE] = "None", - [OPT_OS_FREERTOS] = "FreeRTOS", - }; - - puts("\n\ ---------------------------------------------------------------------\n\ -- Host Demo (a tinyusb example)\n\ -- if you find any bugs or get any questions, feel free to file an\n\ -- issue at https://github.com/hathach/tinyusb\n\ ---------------------------------------------------------------------\n" - ); - - puts("This HOST demo is configured to support:"); - printf(" - RTOS = %s\n", rtos_name[CFG_TUSB_OS]); - if (CFG_TUH_HUB ) puts(" - Hub (1 level only)"); - if (CFG_TUH_HID_MOUSE ) puts(" - HID Mouse"); - if (CFG_TUH_HID_KEYBOARD ) puts(" - HID Keyboard"); - if (CFG_TUH_MSC ) puts(" - Mass Storage"); - if (CFG_TUH_CDC ) puts(" - Communication Device Class"); -} diff --git a/examples/obsolete/host/src/mouse_host_app.c b/examples/obsolete/host/src/mouse_host_app.c deleted file mode 100644 index 6fd6bcdba..000000000 --- a/examples/obsolete/host/src/mouse_host_app.c +++ /dev/null @@ -1,169 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "mouse_host_app.h" -#include "app_os_prio.h" - -#if CFG_TUH_HID_MOUSE - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -#define QUEUE_MOUSE_REPORT_DEPTH 4 - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -static osal_queue_t queue_mouse_hdl; -CFG_TUSB_MEM_SECTION static hid_mouse_report_t usb_mouse_report; - -static inline void process_mouse_report(hid_mouse_report_t const * p_report); - -//--------------------------------------------------------------------+ -// tinyusb callbacks -//--------------------------------------------------------------------+ -void tuh_hid_mouse_mounted_cb(uint8_t dev_addr) -{ - // application set-up - printf("\na Mouse device (address %d) is mounted\n", dev_addr); - - osal_queue_flush(queue_mouse_hdl); - (void) tuh_hid_mouse_get_report(dev_addr, (uint8_t*) &usb_mouse_report); // first report -} - -void tuh_hid_mouse_unmounted_cb(uint8_t dev_addr) -{ - // application tear-down - printf("\na Mouse device (address %d) is unmounted\n", dev_addr); -} - -// invoked ISR context -void tuh_hid_mouse_isr(uint8_t dev_addr, xfer_result_t event) -{ - switch(event) - { - case XFER_RESULT_SUCCESS: - osal_queue_send(queue_mouse_hdl, &usb_mouse_report); - (void) tuh_hid_mouse_get_report(dev_addr, (uint8_t*) &usb_mouse_report); - break; - - case XFER_RESULT_FAILED: - (void) tuh_hid_mouse_get_report(dev_addr, (uint8_t*) &usb_mouse_report); // ignore & continue - break; - - default : - break; - } -} - -//--------------------------------------------------------------------+ -// APPLICATION CODE -// NOTICE: MOUSE REPORT IS NOT CORRECT UNTIL A DECENT HID PARSER IS -// IMPLEMENTED, MEANWHILE IT CAN MISS DISPLAY BUTTONS OR X,Y etc -//--------------------------------------------------------------------+ -void mouse_host_app_init(void) -{ - tu_memclr(&usb_mouse_report, sizeof(hid_mouse_report_t)); - - queue_mouse_hdl = osal_queue_create( QUEUE_MOUSE_REPORT_DEPTH, sizeof(hid_mouse_report_t) ); - TU_ASSERT( queue_mouse_hdl, VOID_RETURN); - - TU_VERIFY( osal_task_create(mouse_host_app_task, "mouse", 128, NULL, MOUSE_APP_TASK_PRIO), ); -} - -//------------- main task -------------// -void mouse_host_app_task(void* param) -{ - (void) param; - - OSAL_TASK_BEGIN - - tusb_error_t error; - hid_mouse_report_t mouse_report; - - osal_queue_receive(queue_mouse_hdl, &mouse_report, OSAL_TIMEOUT_WAIT_FOREVER, &error); - (void) error; // suppress compiler's warnings - - process_mouse_report(&mouse_report); - - OSAL_TASK_END -} - -//--------------------------------------------------------------------+ -// HELPER -//--------------------------------------------------------------------+ -void cursor_movement(int8_t x, int8_t y, int8_t wheel) -{ - //------------- X -------------// - if ( x < 0) - { - printf(ANSI_CURSOR_BACKWARD(%d), (-x)); // move left - }else if ( x > 0) - { - printf(ANSI_CURSOR_FORWARD(%d), x); // move right - }else { } - - //------------- Y -------------// - if ( y < 0) - { - printf(ANSI_CURSOR_UP(%d), (-y)); // move up - }else if ( y > 0) - { - printf(ANSI_CURSOR_DOWN(%d), y); // move down - }else { } - - //------------- wheel -------------// - if (wheel < 0) - { - printf(ANSI_SCROLL_UP(%d), (-wheel)); // scroll up - }else if (wheel > 0) - { - printf(ANSI_SCROLL_DOWN(%d), wheel); // scroll down - }else { } -} - -static inline void process_mouse_report(hid_mouse_report_t const * p_report) -{ - static hid_mouse_report_t prev_report = { 0, 0, 0, 0 }; - - //------------- button state -------------// - uint8_t button_changed_mask = p_report->buttons ^ prev_report.buttons; - if ( button_changed_mask & p_report->buttons) - { - printf(" %c%c%c ", - p_report->buttons & MOUSE_BUTTON_LEFT ? 'L' : '-', - p_report->buttons & MOUSE_BUTTON_MIDDLE ? 'M' : '-', - p_report->buttons & MOUSE_BUTTON_RIGHT ? 'R' : '-'); - } - - //------------- cursor movement -------------// - cursor_movement(p_report->x, p_report->y, p_report->wheel); -} - -#endif diff --git a/examples/obsolete/host/src/mouse_host_app.h b/examples/obsolete/host/src/mouse_host_app.h deleted file mode 100644 index 0193a9146..000000000 --- a/examples/obsolete/host/src/mouse_host_app.h +++ /dev/null @@ -1,71 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \file - * \brief TBD - * - * \note TBD - */ - -/** \ingroup TBD - * \defgroup TBD - * \brief TBD - * - * @{ - */ - -#ifndef _TUSB_MOUSE_HOST_APP_H_ -#define _TUSB_MOUSE_HOST_APP_H_ - -#include -#include - -#include "board.h" -#include "tusb.h" - -#ifdef __cplusplus - extern "C" { -#endif - -#if CFG_TUH_HID_MOUSE - -void mouse_host_app_init(void); -void mouse_host_app_task(void* param); - -#else - -#define mouse_host_app_init() -#define mouse_host_app_task(x) - -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_MOUSE_HOST_APP_H_ */ - -/** @} */ diff --git a/examples/obsolete/host/src/msc_cli.c b/examples/obsolete/host/src/msc_cli.c deleted file mode 100644 index c15bcda39..000000000 --- a/examples/obsolete/host/src/msc_cli.c +++ /dev/null @@ -1,473 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "msc_cli.h" -#include "ctype.h" - -#if CFG_TUH_MSC - -#include "ff.h" -#include "diskio.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -#define CLI_MAX_BUFFER 256 -#define CLI_FILE_READ_BUFFER (4*1024) - -enum { - ASCII_BACKSPACE = 8, -}; - -typedef enum -{ - CLI_ERROR_NONE = 0, - CLI_ERROR_INVALID_PARA, - CLI_ERROR_INVALID_PATH, - CLI_ERROR_FILE_EXISTED, - CLI_ERROR_FAILED -}cli_error_t; - -static char const * const cli_error_message[] = -{ - [CLI_ERROR_NONE ] = 0, - [CLI_ERROR_INVALID_PARA ] = "Invalid parameter(s)", - [CLI_ERROR_INVALID_PATH ] = "No such file or directory", - [CLI_ERROR_FILE_EXISTED ] = "file or directory already exists", - [CLI_ERROR_FAILED ] = "failed to execute" -}; - -//--------------------------------------------------------------------+ -// CLI Database definition -//--------------------------------------------------------------------+ - -// command, function, description -#define CLI_COMMAND_TABLE(ENTRY) \ - ENTRY(unknown , cli_cmd_unknown , NULL ) \ - ENTRY(help , cli_cmd_help , NULL ) \ - ENTRY(cls , cli_cmd_clear , "Clear the screen.\n cls\n" ) \ - ENTRY(ls , cli_cmd_list , "List information of the FILEs.\n ls\n" ) \ - ENTRY(cd , cli_cmd_changedir, "change the current directory.\n cd a_folder\n" ) \ - ENTRY(cat , cli_cmd_cat , "display contents of a file.\n cat a_file.txt\n" ) \ - ENTRY(cp , cli_cmd_copy , "Copies one or more files to another location.\n cp a_file.txt dir1/another_file.txt\n cp a_file.txt dir1\n" ) \ - ENTRY(mkdir , cli_cmd_mkdir , "Create a DIRECTORY, if it does not already exist.\n mkdir \n" ) \ - ENTRY(mv , cli_cmd_move , "Rename or move a DIRECTORY or a FILE.\n mv old_name.txt new_name.txt\n mv old_name.txt dir1/new_name.txt\n" ) \ - ENTRY(rm , cli_cmd_remove , "Remove (delete) an empty DIRECTORY or FILE.\n rm deleted_name.txt\n rm empty_dir\n" ) \ - -//--------------------------------------------------------------------+ -// Expands the function to have the standard function signature -//--------------------------------------------------------------------+ -#define CLI_PROTOTYPE_EXPAND(command, function, description) \ - cli_error_t function(char * p_para); - -CLI_COMMAND_TABLE(CLI_PROTOTYPE_EXPAND) - -//--------------------------------------------------------------------+ -// Expand to enum value -//--------------------------------------------------------------------+ -#define CLI_ENUM_EXPAND(command, function, description) CLI_CMDTYPE_##command, -typedef enum -{ - CLI_COMMAND_TABLE(CLI_ENUM_EXPAND) - CLI_CMDTYPE_COUNT -}cli_cmdtype_t; - -//--------------------------------------------------------------------+ -// Expand to string table -//--------------------------------------------------------------------+ -#define CLI_STRING_EXPAND(command, function, description) #command, -char const* const cli_string_tbl[] = -{ - CLI_COMMAND_TABLE(CLI_STRING_EXPAND) -}; - -//--------------------------------------------------------------------+ -// Expand to Description table -//--------------------------------------------------------------------+ -#define CLI_DESCRIPTION_EXPAND(command, function, description) description, -char const* const cli_description_tbl[] = -{ - CLI_COMMAND_TABLE(CLI_DESCRIPTION_EXPAND) -}; - - -//--------------------------------------------------------------------+ -// Expand to Command Lookup Table -//--------------------------------------------------------------------+ -#define CMD_LOOKUP_EXPAND(command, function, description)\ - [CLI_CMDTYPE_##command] = function,\ - -typedef cli_error_t (* const cli_cmdfunc_t)(char *); -static cli_cmdfunc_t cli_command_tbl[] = -{ - CLI_COMMAND_TABLE(CMD_LOOKUP_EXPAND) -}; - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION uint8_t fileread_buffer[CLI_FILE_READ_BUFFER]; -static char cli_buffer[CLI_MAX_BUFFER]; -static char volume_label[20]; - -static inline void drive_number2letter(char * p_path) -{ - if (p_path[1] == ':') - { - p_path[0] = 'E' + p_path[0] - '0' ; - } -} - -static inline void drive_letter2number(char * p_path) -{ - if (p_path[1] == ':') - { - p_path[0] = p_path[0] - 'E' + '0'; - } -} - - -//--------------------------------------------------------------------+ -// IMPLEMENTATION -//--------------------------------------------------------------------+ -// NOTES: prompt re-use cli_buffer --> should not be called when cli_buffer has contents -void cli_command_prompt(void) -{ - f_getcwd(cli_buffer, CLI_MAX_BUFFER); - drive_number2letter(cli_buffer); - printf("\n%s %s\n$ ", - (volume_label[0] !=0) ? volume_label : "No Label", - cli_buffer); - - tu_memclr(cli_buffer, CLI_MAX_BUFFER); -} - -void cli_init(void) -{ - tu_memclr(cli_buffer, CLI_MAX_BUFFER); - f_getlabel(NULL, volume_label, NULL); - cli_command_prompt(); -} - -void cli_poll(char ch) -{ - if ( isprint(ch) ) - { // accumulate & echo - if (strlen(cli_buffer) < CLI_MAX_BUFFER) - { - cli_buffer[ strlen(cli_buffer) ] = ch; - putchar(ch); - }else - { - puts("cli buffer overflows"); - tu_memclr(cli_buffer, CLI_MAX_BUFFER); - } - } - else if ( ch == ASCII_BACKSPACE && strlen(cli_buffer)) - { - printf(ANSI_CURSOR_BACKWARD(1) ANSI_ERASE_LINE(0) ); // move cursor back & clear to the end of line - cli_buffer[ strlen(cli_buffer)-1 ] = 0; - } - else if ( ch == '\r') - { // execute command - //------------- Separate Command & Parameter -------------// - putchar('\n'); - char* p_space = strchr(cli_buffer, ' '); - uint32_t command_len = (p_space == NULL) ? strlen(cli_buffer) : (uint32_t) (p_space - cli_buffer); - char* p_para = (p_space == NULL) ? (cli_buffer+command_len) : (p_space+1); // point to NULL-character or after space - - //------------- Find entered command in lookup table & execute it -------------// - uint8_t cmd_id; - for(cmd_id = CLI_CMDTYPE_COUNT - 1; cmd_id > CLI_CMDTYPE_unknown; cmd_id--) - { - if( 0 == strncmp(cli_buffer, cli_string_tbl[cmd_id], command_len) ) break; - } - - cli_error_t error = cli_command_tbl[cmd_id]( p_para ); // command execution, (unknown command if cannot find) - - if (CLI_ERROR_NONE != error) puts(cli_error_message[error]); // error message output if any - cli_command_prompt(); // print out current path - } - else if (ch=='\t') // \t may be used for auto-complete later - { - - } -} - -//--------------------------------------------------------------------+ -// UNKNOWN Command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_unknown(char * p_para) -{ - (void) p_para; - puts("unknown command, please type \"help\" for list of supported commands"); - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// HELP command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_help(char * p_para) -{ - (void) p_para; - - puts("current supported commands are:"); - for(uint8_t cmd_id = CLI_CMDTYPE_help+1; cmd_id < CLI_CMDTYPE_COUNT; cmd_id++) - { - printf("%s\t%s\n", cli_string_tbl[cmd_id], cli_description_tbl[cmd_id]); - } - - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// Clear Screen Command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_clear(char* p_para) -{ - (void) p_para; - printf(ANSI_ERASE_SCREEN(2) ANSI_CURSOR_POSITION(1,1) ); - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// LS Command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_list(char * p_para) -{ - if ( strlen(p_para) == 0 ) // list current directory - { - DIR target_dir; - if ( FR_OK != f_opendir(&target_dir, ".") ) return CLI_ERROR_FAILED; - - TCHAR long_filename[_MAX_LFN]; - FILINFO dir_entry = - { - .lfname = long_filename, - .lfsize = _MAX_LFN - }; - while( (f_readdir(&target_dir, &dir_entry) == FR_OK) && dir_entry.fname[0] != 0) - { - if ( dir_entry.fname[0] != '.' ) // ignore . and .. entry - { - TCHAR const * const p_name = (dir_entry.lfname[0] != 0) ? dir_entry.lfname : dir_entry.fname; - if ( dir_entry.fattrib & AM_DIR ) // directory - { - printf("/%s", p_name); - }else - { - printf("%-40s%d KB", p_name, dir_entry.fsize / 1000); - } - putchar('\n'); - } - } - -// (void) f_closedir(&target_dir); - } - else - { - puts("ls only supports list current directory only, try to cd to that folder first"); - return CLI_ERROR_INVALID_PARA; - } - - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// CD Command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_changedir(char * p_para) -{ - if ( strlen(p_para) == 0 ) return CLI_ERROR_INVALID_PARA; - - drive_letter2number(p_para); - - if ( FR_OK != f_chdir(p_para) ) - { - return CLI_ERROR_INVALID_PATH; - } - - if ( p_para[1] == ':') - { // path has drive letter --> change drive, update volume label - f_chdrive(p_para[0] - '0'); - f_getlabel(NULL, volume_label, NULL); - } - - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// CAT Command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_cat(char *p_para) -{ - if ( strlen(p_para) == 0 ) return CLI_ERROR_INVALID_PARA; - - FIL file; - - switch( f_open(&file, p_para, FA_READ) ) - { - case FR_OK: - { - uint32_t bytes_read = 0; - - if ( (FR_OK == f_read(&file, fileread_buffer, CLI_FILE_READ_BUFFER, &bytes_read)) && (bytes_read > 0) ) - { - if ( file.fsize < 0x80000 ) // ~ 500KB - { - putchar('\n'); - do { - for(uint32_t i=0; i 0) ); - }else - { // not display file contents if first character is not printable (high chance of binary file) - printf("%s 's contents is too large\n", p_para); - } - } - f_close(&file); - } - break; - - case FR_INVALID_NAME: - return CLI_ERROR_INVALID_PATH; - - default : - return CLI_ERROR_FAILED; - } - - return CLI_ERROR_NONE; -} - -//--------------------------------------------------------------------+ -// Make Directory command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_mkdir(char *p_para) -{ - if ( strlen(p_para) == 0 ) return CLI_ERROR_INVALID_PARA; - - return (f_mkdir(p_para) == FR_OK) ? CLI_ERROR_NONE : CLI_ERROR_FAILED; -} - -//--------------------------------------------------------------------+ -// COPY command -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_copy(char *p_para) -{ - char* p_space = strchr(p_para, ' '); - if ( p_space == NULL ) return CLI_ERROR_INVALID_PARA; - *p_space = 0; // replace space by NULL-character - - char* p_dest = p_space+1; - if ( strlen(p_dest) == 0 ) return CLI_ERROR_INVALID_PARA; - - drive_letter2number(p_para); - drive_letter2number(p_dest); - - //------------- Check Existence of source file -------------// - FIL src_file; - if ( FR_OK != f_open(&src_file , p_para, FA_READ) ) return CLI_ERROR_INVALID_PATH; - - //------------- Check if dest path is a folder or a non-existing file (overwritten is not allowed) -------------// - FILINFO dest_entry; - if ( (f_stat(p_dest, &dest_entry) == FR_OK) && (dest_entry.fattrib & AM_DIR) ) - { // the destination is an existed folder --> auto append dest filename to be the folder - strcat(p_dest, "/"); - strcat(p_dest, p_para); - } - - //------------- Open dest file and start the copy -------------// - cli_error_t error = CLI_ERROR_NONE; - FIL dest_file; - - switch ( f_open(&dest_file, p_dest, FA_WRITE | FA_CREATE_NEW) ) - { - case FR_EXIST: - error = CLI_ERROR_FILE_EXISTED; - break; - - case FR_OK: - while(1) // copying - { - uint32_t bytes_read = 0; - uint32_t bytes_write = 0; - FRESULT res; - - res = f_read(&src_file, fileread_buffer, CLI_FILE_READ_BUFFER, &bytes_read); /* Read a chunk of src file */ - if ( (res != FR_OK) || (bytes_read == 0) ) break; /* error or eof */ - - res = f_write(&dest_file, fileread_buffer, bytes_read, &bytes_write); /* Write it to the dst file */ - if ( (res != FR_OK) || (bytes_write < bytes_read) ) break; /* error or disk full */ - } - - f_close(&dest_file); - break; - - default: - error = CLI_ERROR_FAILED; - break; - } - - f_close(&src_file); - - return error; -} - -//--------------------------------------------------------------------+ -// MOVE/RENAME -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_move(char *p_para) -{ - char* p_space = strchr(p_para, ' '); - if ( p_space == NULL ) return CLI_ERROR_INVALID_PARA; - *p_space = 0; // replace space by NULL-character - - char* p_dest = p_space+1; - if ( strlen(p_dest) == 0 ) return CLI_ERROR_INVALID_PARA; - - return (f_rename(p_para, p_dest) == FR_OK ) ? CLI_ERROR_NONE : CLI_ERROR_FAILED; -} - -//--------------------------------------------------------------------+ -// REMOVE -//--------------------------------------------------------------------+ -cli_error_t cli_cmd_remove(char *p_para) -{ - if ( strlen(p_para) == 0 ) return CLI_ERROR_INVALID_PARA; - - switch( f_unlink(p_para) ) - { - case FR_OK: return CLI_ERROR_NONE; - - case FR_DENIED: - printf("cannot remove readonly file/foler or non-empty folder\n"); - break; - - default: break; - } - - return CLI_ERROR_FAILED; -} -#endif diff --git a/examples/obsolete/host/src/msc_cli.h b/examples/obsolete/host/src/msc_cli.h deleted file mode 100644 index de90bebd1..000000000 --- a/examples/obsolete/host/src/msc_cli.h +++ /dev/null @@ -1,52 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ -#ifndef _TUSB_MSC_CLI_H_ -#define _TUSB_MSC_CLI_H_ - -#include "board.h" -#include "tusb.h" - -#ifdef __cplusplus -extern "C" { -#endif - - -//--------------------------------------------------------------------+ -// PUBLIC API -//--------------------------------------------------------------------+ -void cli_init(void); -void cli_poll(char ch); - -//--------------------------------------------------------------------+ -// Callback API -//--------------------------------------------------------------------+ - - -#ifdef __cplusplus -} -#endif - -#endif // _TUSB_CLI_H_ diff --git a/examples/obsolete/host/src/msc_host_app.c b/examples/obsolete/host/src/msc_host_app.c deleted file mode 100644 index 5399e6620..000000000 --- a/examples/obsolete/host/src/msc_host_app.c +++ /dev/null @@ -1,170 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -//--------------------------------------------------------------------+ -// INCLUDE -//--------------------------------------------------------------------+ -#include "msc_host_app.h" -#include "app_os_prio.h" - -#if CFG_TUH_MSC - -#include "msc_cli.h" -#include "ff.h" -#include "diskio.h" - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ - -//--------------------------------------------------------------------+ -// INTERNAL OBJECT & FUNCTION DECLARATION -//--------------------------------------------------------------------+ -CFG_TUSB_MEM_SECTION static FATFS fatfs[CFG_TUSB_HOST_DEVICE_MAX]; - -//--------------------------------------------------------------------+ -// tinyusb callbacks -//--------------------------------------------------------------------+ -void tuh_msc_mount_cb(uint8_t dev_addr) -{ - puts("\na MassStorage device is mounted"); - - //------------- Disk Information -------------// - // SCSI VendorID[8] & ProductID[16] from Inquiry Command - uint8_t const* p_vendor = tuh_msc_get_vendor_name(dev_addr); - uint8_t const* p_product = tuh_msc_get_product_name(dev_addr); - - for(uint8_t i=0; i<8; i++) putchar(p_vendor[i]); - - putchar(' '); - for(uint8_t i=0; i<16; i++) putchar(p_product[i]); - putchar('\n'); - - uint32_t last_lba, block_size; - tuh_msc_read_capacity(dev_addr, &last_lba, &block_size); - printf("Disk Size: %d MB\n", (last_lba+1)/ ((1024*1024)/block_size) ); - printf("LBA 0-0x%X Block Size: %d\n", last_lba, block_size); - - //------------- file system (only 1 LUN support) -------------// - uint8_t phy_disk = dev_addr-1; - disk_initialize(phy_disk); - - if ( disk_is_ready(phy_disk) ) - { - if ( f_mount(phy_disk, &fatfs[phy_disk]) != FR_OK ) - { - puts("mount failed"); - return; - } - - puts("---------------------------------------------------------------------"); - puts("- MASSSTORAGE CLASS CLI IS A IMMATURE CODE. DISK-WRITING COMMANDS"); - puts("- SUCH AS cp(COPY), mkdir(MAKE DIRECTORY) ARE POTENTIAL TO DAMAGE"); - puts("- YOUR USB THUMBDRIVE. USING THOSE COMMANDS ARE AT YOUR OWN RISK."); - puts("- THE AUTHOR HAS NO RESPONSIBILITY WITH YOUR DEVICE NOR ITS DATA"); - puts("---------------------------------------------------------------------"); - - f_chdrive(phy_disk); // change to newly mounted drive - f_chdir("/"); // root as current dir - - cli_init(); - } -} - -void tuh_msc_unmount_cb(uint8_t dev_addr) -{ - puts("\na MassStorage device is unmounted"); - - uint8_t phy_disk = dev_addr-1; - - f_mount(phy_disk, NULL); // unmount disk - disk_deinitialize(phy_disk); - - if ( phy_disk == f_get_current_drive() ) - { // active drive is unplugged --> change to other drive - for(uint8_t i=0; i 0 ) - { - cli_poll( (char) ch); - } - } - - OSAL_TASK_END -} - -#endif diff --git a/examples/obsolete/host/src/msc_host_app.h b/examples/obsolete/host/src/msc_host_app.h deleted file mode 100644 index 7a160e078..000000000 --- a/examples/obsolete/host/src/msc_host_app.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup TBD - * \defgroup TBD - * \brief TBD - * - * @{ - */ - -#ifndef _TUSB_MSC_HOST_APP_H_ -#define _TUSB_MSC_HOST_APP_H_ - -#include "board.h" -#include "tusb.h" - - -#ifdef __cplusplus - extern "C" { -#endif - -#if CFG_TUH_MSC - -void msc_host_app_init(void); -void msc_host_app_task(void* param); - -#else - -#define msc_host_app_init() -#define msc_host_app_task(x) - -#endif - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_MSC_HOST_APP_H_ */ - -/** @} */ diff --git a/examples/obsolete/host/src/rndis_host_app.c b/examples/obsolete/host/src/rndis_host_app.c deleted file mode 100644 index 66da33d06..000000000 --- a/examples/obsolete/host/src/rndis_host_app.c +++ /dev/null @@ -1,64 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "rndis_host_app.h" -#include "app_os_prio.h" - -#if CFG_TUH_CDC && CFG_TUH_CDC_RNDIS - -//--------------------------------------------------------------------+ -// MACRO CONSTANT TYPEDEF -//--------------------------------------------------------------------+ -void tusbh_cdc_rndis_mounted_cb(uint8_t dev_addr) -{ // application set-up - uint8_t mac_address[6]; - - printf("\nan RNDIS device is mounted\n"); - tusbh_cdc_rndis_get_mac_addr(dev_addr, mac_address); - - printf("MAC Address "); - for(uint8_t i=0; i<6; i++) printf("%X ", mac_address[i]); - printf("\n"); -} - -void tusbh_cdc_rndis_unmounted_cb(uint8_t dev_addr) -{ - // application tear-down - printf("\nan RNDIS device is unmounted\n"); -} - -void rndis_host_app_init(void) -{ - -} - -void rndis_host_app_task(void* param) -{ - OSAL_TASK_BEGIN - OSAL_TASK_END -} - -#endif diff --git a/examples/obsolete/host/src/rndis_host_app.h b/examples/obsolete/host/src/rndis_host_app.h deleted file mode 100644 index 97ff6e27f..000000000 --- a/examples/obsolete/host/src/rndis_host_app.h +++ /dev/null @@ -1,63 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -/** \ingroup TBD - * \defgroup TBD - * \brief TBD - * - * @{ - */ - -#ifndef _TUSB_RNDIS_HOST_APP_H_ -#define _TUSB_RNDIS_HOST_APP_H_ - -#include "board.h" -#include "tusb.h" - -#ifdef __cplusplus - extern "C" { -#endif - -#if CFG_TUH_CDC && CFG_TUH_CDC_RNDIS - -void rndis_host_app_init(void); -void rndis_host_app_task(void* param); - -#else - -#define rndis_host_app_init() -#define rndis_host_app_task(x) - -#endif - - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_RNDIS_HOST_APP_H_ */ - -/** @} */ diff --git a/examples/obsolete/host/src/tusb_config.h b/examples/obsolete/host/src/tusb_config.h deleted file mode 100644 index a025e9091..000000000 --- a/examples/obsolete/host/src/tusb_config.h +++ /dev/null @@ -1,101 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef _TUSB_CONFIG_H_ -#define _TUSB_CONFIG_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -//--------------------------------------------------------------------+ -// CONTROLLER CONFIGURATION -//--------------------------------------------------------------------+ -//#define CFG_TUSB_MCU will be passed from IDE for easy board/mcu switching -#define CFG_TUSB_RHPORT0_MODE (OPT_MODE_HOST) - -//--------------------------------------------------------------------+ -// HOST CONFIGURATION -//--------------------------------------------------------------------+ - -//------------- CLASS -------------// -#define CFG_TUH_HUB 1 -#define CFG_TUH_HID_KEYBOARD 1 -#define CFG_TUH_HID_MOUSE 1 -#define CFG_TUSB_HOST_HID_GENERIC 0 // (not yet supported) -#define CFG_TUH_MSC 1 -#define CFG_TUH_CDC 1 - -#define CFG_TUSB_HOST_DEVICE_MAX (CFG_TUH_HUB ? 5 : 1) // normal hub has 4 ports - -//--------------------------------------------------------------------+ -// COMMON CONFIGURATION -//--------------------------------------------------------------------+ -#define CFG_TUSB_DEBUG 1 - -//#define CFG_TUSB_OS OPT_OS_NONE // defined using eclipse build -//#define CFG_TUD_TASK_PRIO 0 // defined using eclipse build - -//--------------------------------------------------------------------+ -// USB RAM PLACEMENT -//--------------------------------------------------------------------+ -#ifdef __CODE_RED // make use of code red's support for ram region macros - - #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X - #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address - #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_MEM_SECTION TU_ATTR_SECTION(.data.$RAM3) - #endif - -#elif defined __CC_ARM // Compiled with Keil armcc - - #if (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - #define CFG_TUSB_MEM_SECTION // LPC17xx USB DMA can access all address - #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_MEM_SECTION // Use keil tool configure to have AHB SRAM as default memory - #endif - -#elif defined __ICCARM__ // compiled with IAR - - #if (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X) - // LP175x_6x can access all but CMSIS-RTX causes overflow in 32KB SRAM --> move to AHB ram - #define CFG_TUSB_MEM_SECTION _Pragma("location=\".sram\"") - #elif (CFG_TUSB_MCU == OPT_MCU_LPC43XX) - #define CFG_TUSB_MEM_SECTION _Pragma("location=\".ahb_sram1\"") - #endif - -#else - - #error compiler not specified - -#endif - - -#ifdef __cplusplus - } -#endif - -#endif /* _TUSB_CONFIG_H_ */ -- cgit v1.3.1