From 856dc0bab92799320d2909638d6988f3776f258a Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 28 Jun 2021 12:53:53 +0700 Subject: update doc and clean up --- docs/boards.md | 1 + 1 file changed, 1 insertion(+) (limited to 'docs') diff --git a/docs/boards.md b/docs/boards.md index ebba1f841..c790c7967 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -126,6 +126,7 @@ This code base already had supported for a handful of following boards (sorted a ### Renesas RX - [GR-CITRUS](https://www.renesas.com/us/en/products/gadget-renesas/boards/gr-citrus) +- [Renesas RX65N Cloud Kit](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rx-32-bit-performance-efficiency-mcus/rx65n-cloud-kit-renesas-rx65n-cloud-kit) ### Raspberry Pi RP2040 -- cgit v1.3.1 From 01987ef86c677c50c3dc5e83f3278fcd0edd4e82 Mon Sep 17 00:00:00 2001 From: hathach Date: Mon, 28 Jun 2021 14:37:41 +0700 Subject: merge saml21 + saml22 = saml2x --- .github/workflows/build.yml | 3 +- README.md | 2 +- docs/boards.md | 3 +- hw/bsp/saml21/boards/atsaml21_xpro/board.h | 50 ------- hw/bsp/saml21/boards/atsaml21_xpro/board.mk | 10 -- .../boards/atsaml21_xpro/saml21j18b_flash.ld | 153 ------------------- hw/bsp/saml21/family.c | 163 --------------------- hw/bsp/saml21/family.mk | 50 ------- hw/bsp/saml2x/boards/atsaml21_xpro/board.h | 50 +++++++ hw/bsp/saml2x/boards/atsaml21_xpro/board.mk | 12 ++ .../boards/atsaml21_xpro/saml21j18b_flash.ld | 153 +++++++++++++++++++ hw/bsp/saml2x/boards/saml22_feather/board.mk | 2 + hw/bsp/saml2x/boards/sensorwatch_m0/board.mk | 2 + hw/bsp/saml2x/family.c | 14 +- hw/bsp/saml2x/family.mk | 40 +++-- 15 files changed, 249 insertions(+), 458 deletions(-) delete mode 100644 hw/bsp/saml21/boards/atsaml21_xpro/board.h delete mode 100644 hw/bsp/saml21/boards/atsaml21_xpro/board.mk delete mode 100644 hw/bsp/saml21/boards/atsaml21_xpro/saml21j18b_flash.ld delete mode 100644 hw/bsp/saml21/family.c delete mode 100644 hw/bsp/saml21/family.mk create mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/board.h create mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/board.mk create mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld (limited to 'docs') diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml index 1e149dc65..fc5b92b68 100644 --- a/.github/workflows/build.yml +++ b/.github/workflows/build.yml @@ -49,8 +49,7 @@ jobs: - 'samd11' - 'samd21' - 'samd51' - - 'saml21' - - 'saml22' + - 'saml2x' - 'stm32f0' - 'stm32f4' - 'stm32f7' diff --git a/README.md b/README.md index 9b86e3b27..11c1df3f8 100644 --- a/README.md +++ b/README.md @@ -32,7 +32,7 @@ The stack supports the following MCUs: - **Dialog:** DA1469x - **Espressif:** ESP32-S2, ESP32-S3 -- **MicroChip:** SAMD11, SAMD21, SAMD51, SAME5x, SAMG55 +- **MicroChip:** SAMD11, SAMD21, SAMD51, SAME5x, SAMG55, SAML21, SAML22 - **NordicSemi:** nRF52833, nRF52840 - **Nuvoton:** NUC120, NUC121/NUC125, NUC126, NUC505 - **NXP:** diff --git a/docs/boards.md b/docs/boards.md index c790c7967..53b0da702 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -47,8 +47,9 @@ This code base already had supported for a handful of following boards (sorted a - [Microchip SAMG55 Xplained Pro](https://www.microchip.com/DevelopmentTools/ProductDetails/PartNO/ATSAMG55-XPRO) -### MicroChip SAML22 +### MicroChip SAML2x +- [SAML21 Xplaind Pro](https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAML21-XPRO-B) - [SAML22 Feather](https://github.com/joeycastillo/Feather-Projects/tree/main/SAML22%20Feather) - [Sensor Watch](https://github.com/joeycastillo/Sensor-Watch) diff --git a/hw/bsp/saml21/boards/atsaml21_xpro/board.h b/hw/bsp/saml21/boards/atsaml21_xpro/board.h deleted file mode 100644 index a3e03997c..000000000 --- a/hw/bsp/saml21/boards/atsaml21_xpro/board.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2020, Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#ifndef BOARD_H_ -#define BOARD_H_ - -#ifdef __cplusplus - extern "C" { -#endif - -// LED -#define LED_PIN (32 + 30) // PB30 -#define LED_STATE_ON 0 - -// Button -#define BUTTON_PIN (0 + 15) // PA15 -#define BUTTON_STATE_ACTIVE 0 - -// UART -#define UART_RX_PIN 4 -#define UART_TX_PIN 5 - -#ifdef __cplusplus - } -#endif - -#endif /* BOARD_H_ */ diff --git a/hw/bsp/saml21/boards/atsaml21_xpro/board.mk b/hw/bsp/saml21/boards/atsaml21_xpro/board.mk deleted file mode 100644 index aa77d4a21..000000000 --- a/hw/bsp/saml21/boards/atsaml21_xpro/board.mk +++ /dev/null @@ -1,10 +0,0 @@ -CFLAGS += -D__SAML21J18B__ - -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/saml21j18b_flash.ld - -# For flash-jlink target -JLINK_DEVICE = ATSAML21J18 - -# flash using jlink -flash: flash-jlink diff --git a/hw/bsp/saml21/boards/atsaml21_xpro/saml21j18b_flash.ld b/hw/bsp/saml21/boards/atsaml21_xpro/saml21j18b_flash.ld deleted file mode 100644 index 7f6b7fa99..000000000 --- a/hw/bsp/saml21/boards/atsaml21_xpro/saml21j18b_flash.ld +++ /dev/null @@ -1,153 +0,0 @@ -/** - * \file - * - * \brief Linker script for running in internal FLASH on the SAML21J18B - * - * Copyright (c) 2016 Atmel Corporation, - * a wholly owned subsidiary of Microchip Technology Inc. - * - * \asf_license_start - * - * \page License - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the Licence at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * \asf_license_stop - * - */ - - -OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") -OUTPUT_ARCH(arm) -SEARCH_DIR(.) - -/* Memory Spaces Definitions */ -MEMORY -{ - rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 - ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 - lpram (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00002000 -} - -/* The stack size used by the application. NOTE: you need to adjust according to your application. */ -STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; - -/* Section Definitions */ -SECTIONS -{ - .text : - { - . = ALIGN(4); - _sfixed = .; - KEEP(*(.vectors .vectors.*)) - *(.text .text.* .gnu.linkonce.t.*) - *(.glue_7t) *(.glue_7) - *(.rodata .rodata* .gnu.linkonce.r.*) - *(.ARM.extab* .gnu.linkonce.armextab.*) - - /* Support C constructors, and C destructors in both user code - and the C library. This also provides support for C++ code. */ - . = ALIGN(4); - KEEP(*(.init)) - . = ALIGN(4); - __preinit_array_start = .; - KEEP (*(.preinit_array)) - __preinit_array_end = .; - - . = ALIGN(4); - __init_array_start = .; - KEEP (*(SORT(.init_array.*))) - KEEP (*(.init_array)) - __init_array_end = .; - - . = ALIGN(4); - KEEP (*crtbegin.o(.ctors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) - KEEP (*(SORT(.ctors.*))) - KEEP (*crtend.o(.ctors)) - - . = ALIGN(4); - KEEP(*(.fini)) - - . = ALIGN(4); - __fini_array_start = .; - KEEP (*(.fini_array)) - KEEP (*(SORT(.fini_array.*))) - __fini_array_end = .; - - KEEP (*crtbegin.o(.dtors)) - KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*crtend.o(.dtors)) - - . = ALIGN(4); - _efixed = .; /* End of text section */ - } > rom - - /* .ARM.exidx is sorted, so has to go in its own output section. */ - PROVIDE_HIDDEN (__exidx_start = .); - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > rom - PROVIDE_HIDDEN (__exidx_end = .); - - . = ALIGN(4); - _etext = .; - - .relocate : AT (_etext) - { - . = ALIGN(4); - _srelocate = .; - *(.ramfunc .ramfunc.*); - *(.data .data.*); - . = ALIGN(4); - _erelocate = .; - } > ram - - .lpram (NOLOAD): - { - . = ALIGN(8); - _slpram = .; - *(.lpram .lpram.*); - . = ALIGN(8); - _elpram = .; - } > lpram - - /* .bss section which is used for uninitialized data */ - .bss (NOLOAD) : - { - . = ALIGN(4); - _sbss = . ; - _szero = .; - *(.bss .bss.*) - *(COMMON) - . = ALIGN(4); - _ebss = . ; - _ezero = .; - end = .; - } > ram - - /* stack section */ - .stack (NOLOAD): - { - . = ALIGN(8); - _sstack = .; - . = . + STACK_SIZE; - . = ALIGN(8); - _estack = .; - } > ram - - . = ALIGN(4); - _end = . ; -} diff --git a/hw/bsp/saml21/family.c b/hw/bsp/saml21/family.c deleted file mode 100644 index d2d25ecac..000000000 --- a/hw/bsp/saml21/family.c +++ /dev/null @@ -1,163 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2019 Ha Thach (tinyusb.org) - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "sam.h" -#include "bsp/board.h" -#include "board.h" - -#include "hal/include/hal_gpio.h" -#include "hal/include/hal_init.h" -#include "hpl/gclk/hpl_gclk_base.h" -#include "hpl_mclk_config.h" - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void USB_Handler(void) -{ - tud_int_handler(0); -} - -//--------------------------------------------------------------------+ -// MACRO TYPEDEF CONSTANT ENUM DECLARATION -//--------------------------------------------------------------------+ - -/* Referenced GCLKs (out of 0~4), should be initialized firstly */ -#define _GCLK_INIT_1ST 0x00000000 -/* Not referenced GCLKs, initialized last */ -#define _GCLK_INIT_LAST 0x0000001F - -void board_init(void) -{ - // Clock init ( follow hpl_init.c ) - hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE); - - _set_performance_level(2); - - _osc32kctrl_init_sources(); - _oscctrl_init_sources(); - _mclk_init(); -#if _GCLK_INIT_1ST - _gclk_init_generators_by_fref(_GCLK_INIT_1ST); -#endif - _oscctrl_init_referenced_generators(); - _gclk_init_generators_by_fref(_GCLK_INIT_LAST); - -#if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3) - hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL); - hri_port_set_EVCTRL_reg(PORT, 1, CONF_PORTB_EVCTRL); -#endif - - // Update SystemCoreClock since it is hard coded with asf4 and not correct - // Init 1ms tick timer (samd SystemCoreClock may not correct) - SystemCoreClock = CONF_CPU_FREQUENCY; - SysTick_Config(CONF_CPU_FREQUENCY / 1000); - - // Led init - gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT); - gpio_set_pin_level(LED_PIN, !LED_STATE_ON); - - // Button init - gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN); - gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP); - -#if CFG_TUSB_OS == OPT_OS_FREERTOS - // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher ) - NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY); -#endif - - /* USB Clock init - * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock - * for low speed and full speed operation. */ - hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); - hri_mclk_set_AHBMASK_USB_bit(MCLK); - hri_mclk_set_APBBMASK_USB_bit(MCLK); - - // USB Pin Init - gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA24, false); - gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF); - gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT); - gpio_set_pin_level(PIN_PA25, false); - gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF); - - gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM); - gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); - - // Output 500hz PWM on PB23 (TCC0 WO[3]) so we can validate the GCLK1 clock speed - hri_mclk_set_APBCMASK_TCC0_bit(MCLK); - TCC0->PER.bit.PER = 48000000 / 1000; - TCC0->CC[3].bit.CC = 48000000 / 2000; - TCC0->CTRLA.bit.ENABLE = true; - - gpio_set_pin_function(PIN_PA19, PINMUX_PA19F_TCC0_WO3); - hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - gpio_set_pin_level(LED_PIN, state); -} - -uint32_t board_button_read(void) -{ - // button is active low - return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1; -} - -int board_uart_read(uint8_t* buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -int board_uart_write(void const * buf, int len) -{ - (void) buf; (void) len; - return 0; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; - -void SysTick_Handler (void) -{ - system_ticks++; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#endif -void _init(void) -{ - -} \ No newline at end of file diff --git a/hw/bsp/saml21/family.mk b/hw/bsp/saml21/family.mk deleted file mode 100644 index a6611d5f4..000000000 --- a/hw/bsp/saml21/family.mk +++ /dev/null @@ -1,50 +0,0 @@ -UF2_FAMILY_ID = 0x68ed2b88 -DEPS_SUBMODULES += hw/mcu/microchip - -include $(TOP)/$(BOARD_PATH)/board.mk - -CFLAGS += \ - -mthumb \ - -mabi=aapcs \ - -mcpu=cortex-m0plus \ - -nostdlib -nostartfiles \ - -DCONF_OSC32K_CALIB_ENABLE=0 \ - -DCFG_TUSB_MCU=OPT_MCU_SAML21 - -SRC_C += \ - src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/saml21/gcc/gcc/startup_saml21.c \ - hw/mcu/microchip/saml21/gcc/system_saml21.c \ - hw/mcu/microchip/saml21/hpl/gclk/hpl_gclk.c \ - hw/mcu/microchip/saml21/hpl/mclk/hpl_mclk.c \ - hw/mcu/microchip/saml21/hpl/pm/hpl_pm.c \ - hw/mcu/microchip/saml21/hpl/osc32kctrl/hpl_osc32kctrl.c \ - hw/mcu/microchip/saml21/hpl/oscctrl/hpl_oscctrl.c \ - hw/mcu/microchip/saml21/hal/src/hal_atomic.c - -INC += \ - $(TOP)/$(BOARD_PATH) \ - $(TOP)/hw/mcu/microchip/saml21/ \ - $(TOP)/hw/mcu/microchip/saml21/config \ - $(TOP)/hw/mcu/microchip/saml21/include \ - $(TOP)/hw/mcu/microchip/saml21/hal/include \ - $(TOP)/hw/mcu/microchip/saml21/hal/utils/include \ - $(TOP)/hw/mcu/microchip/saml21/hpl/port \ - $(TOP)/hw/mcu/microchip/saml21/hri \ - $(TOP)/hw/mcu/microchip/saml21/CMSIS/Include - -# For TinyUSB port source -VENDOR = microchip -CHIP_FAMILY = samd - -# For freeRTOS port source -FREERTOS_PORT = ARM_CM0 - -# flash using bossac at least version 1.8 -# can be found in arduino15/packages/arduino/tools/bossac/ -# Add it to your PATH or change BOSSAC variable to match your installation -BOSSAC = bossac - -flash-bossac: $(BUILD)/$(PROJECT).bin - @:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0) - $(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h new file mode 100644 index 000000000..a3e03997c --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h @@ -0,0 +1,50 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2020, Ha Thach (tinyusb.org) + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +#ifndef BOARD_H_ +#define BOARD_H_ + +#ifdef __cplusplus + extern "C" { +#endif + +// LED +#define LED_PIN (32 + 30) // PB30 +#define LED_STATE_ON 0 + +// Button +#define BUTTON_PIN (0 + 15) // PA15 +#define BUTTON_STATE_ACTIVE 0 + +// UART +#define UART_RX_PIN 4 +#define UART_TX_PIN 5 + +#ifdef __cplusplus + } +#endif + +#endif /* BOARD_H_ */ diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk b/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk new file mode 100644 index 000000000..81b4ecdcb --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk @@ -0,0 +1,12 @@ +CFLAGS += -D__SAML21J18B__ + +SAML_VARIANT = saml21 + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/saml21j18b_flash.ld + +# For flash-jlink target +JLINK_DEVICE = ATSAML21J18 + +# flash using jlink +flash: flash-jlink diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld b/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld new file mode 100644 index 000000000..7f6b7fa99 --- /dev/null +++ b/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld @@ -0,0 +1,153 @@ +/** + * \file + * + * \brief Linker script for running in internal FLASH on the SAML21J18B + * + * Copyright (c) 2016 Atmel Corporation, + * a wholly owned subsidiary of Microchip Technology Inc. + * + * \asf_license_start + * + * \page License + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the Licence at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + * + * \asf_license_stop + * + */ + + +OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm") +OUTPUT_ARCH(arm) +SEARCH_DIR(.) + +/* Memory Spaces Definitions */ +MEMORY +{ + rom (rx) : ORIGIN = 0x00000000, LENGTH = 0x00040000 + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000 + lpram (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00002000 +} + +/* The stack size used by the application. NOTE: you need to adjust according to your application. */ +STACK_SIZE = DEFINED(STACK_SIZE) ? STACK_SIZE : DEFINED(__stack_size__) ? __stack_size__ : 0x2000; + +/* Section Definitions */ +SECTIONS +{ + .text : + { + . = ALIGN(4); + _sfixed = .; + KEEP(*(.vectors .vectors.*)) + *(.text .text.* .gnu.linkonce.t.*) + *(.glue_7t) *(.glue_7) + *(.rodata .rodata* .gnu.linkonce.r.*) + *(.ARM.extab* .gnu.linkonce.armextab.*) + + /* Support C constructors, and C destructors in both user code + and the C library. This also provides support for C++ code. */ + . = ALIGN(4); + KEEP(*(.init)) + . = ALIGN(4); + __preinit_array_start = .; + KEEP (*(.preinit_array)) + __preinit_array_end = .; + + . = ALIGN(4); + __init_array_start = .; + KEEP (*(SORT(.init_array.*))) + KEEP (*(.init_array)) + __init_array_end = .; + + . = ALIGN(4); + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*crtend.o(.ctors)) + + . = ALIGN(4); + KEEP(*(.fini)) + + . = ALIGN(4); + __fini_array_start = .; + KEEP (*(.fini_array)) + KEEP (*(SORT(.fini_array.*))) + __fini_array_end = .; + + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*crtend.o(.dtors)) + + . = ALIGN(4); + _efixed = .; /* End of text section */ + } > rom + + /* .ARM.exidx is sorted, so has to go in its own output section. */ + PROVIDE_HIDDEN (__exidx_start = .); + .ARM.exidx : + { + *(.ARM.exidx* .gnu.linkonce.armexidx.*) + } > rom + PROVIDE_HIDDEN (__exidx_end = .); + + . = ALIGN(4); + _etext = .; + + .relocate : AT (_etext) + { + . = ALIGN(4); + _srelocate = .; + *(.ramfunc .ramfunc.*); + *(.data .data.*); + . = ALIGN(4); + _erelocate = .; + } > ram + + .lpram (NOLOAD): + { + . = ALIGN(8); + _slpram = .; + *(.lpram .lpram.*); + . = ALIGN(8); + _elpram = .; + } > lpram + + /* .bss section which is used for uninitialized data */ + .bss (NOLOAD) : + { + . = ALIGN(4); + _sbss = . ; + _szero = .; + *(.bss .bss.*) + *(COMMON) + . = ALIGN(4); + _ebss = . ; + _ezero = .; + end = .; + } > ram + + /* stack section */ + .stack (NOLOAD): + { + . = ALIGN(8); + _sstack = .; + . = . + STACK_SIZE; + . = ALIGN(8); + _estack = .; + } > ram + + . = ALIGN(4); + _end = . ; +} diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.mk b/hw/bsp/saml2x/boards/saml22_feather/board.mk index a6a773137..0605dca19 100644 --- a/hw/bsp/saml2x/boards/saml22_feather/board.mk +++ b/hw/bsp/saml2x/boards/saml22_feather/board.mk @@ -1,5 +1,7 @@ CFLAGS += -D__SAML22J18A__ +SAML_VARIANT = saml22 + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/$(BOARD).ld diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk b/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk index a6a773137..0605dca19 100644 --- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk +++ b/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk @@ -1,5 +1,7 @@ CFLAGS += -D__SAML22J18A__ +SAML_VARIANT = saml22 + # All source paths should be relative to the top level. LD_FILE = $(BOARD_PATH)/$(BOARD).ld diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c index 1a185a59c..470fde750 100644 --- a/hw/bsp/saml2x/family.c +++ b/hw/bsp/saml2x/family.c @@ -108,13 +108,13 @@ void board_init(void) gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP); // Output 500hz PWM on PB23 (TCC0 WO[3]) so we can validate the GCLK1 clock speed - hri_mclk_set_APBCMASK_TCC0_bit(MCLK); - TCC0->PER.bit.PER = 48000000 / 1000; - TCC0->CC[3].bit.CC = 48000000 / 2000; - TCC0->CTRLA.bit.ENABLE = true; - - gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3); - hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); +// hri_mclk_set_APBCMASK_TCC0_bit(MCLK); +// TCC0->PER.bit.PER = 48000000 / 1000; +// TCC0->CC[3].bit.CC = 48000000 / 2000; +// TCC0->CTRLA.bit.ENABLE = true; +// +// gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3); +// hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN); } //--------------------------------------------------------------------+ diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk index fbe4e66f8..e0f6b2f77 100644 --- a/hw/bsp/saml2x/family.mk +++ b/hw/bsp/saml2x/family.mk @@ -1,8 +1,10 @@ UF2_FAMILY_ID = 0x68ed2b88 -DEPS_SUBMODULES += hw/mcu/microchip +DEPS_SUBMODULES += lib/CMSIS_5 hw/mcu/microchip include $(TOP)/$(BOARD_PATH)/board.mk +MCU_DIR = hw/mcu/microchip/$(SAML_VARIANT) + CFLAGS += \ -mthumb \ -mabi=aapcs \ @@ -13,29 +15,25 @@ CFLAGS += \ SRC_C += \ src/portable/microchip/samd/dcd_samd.c \ - hw/mcu/microchip/saml22/gcc/gcc/startup_saml22.c \ - hw/mcu/microchip/saml22/gcc/system_saml22.c \ - hw/mcu/microchip/saml22/hpl/gclk/hpl_gclk.c \ - hw/mcu/microchip/saml22/hpl/mclk/hpl_mclk.c \ - hw/mcu/microchip/saml22/hpl/pm/hpl_pm.c \ - hw/mcu/microchip/saml22/hpl/osc32kctrl/hpl_osc32kctrl.c \ - hw/mcu/microchip/saml22/hpl/oscctrl/hpl_oscctrl.c \ - hw/mcu/microchip/saml22/hal/src/hal_atomic.c + $(MCU_DIR)/gcc/gcc/startup_$(SAML_VARIANT).c \ + $(MCU_DIR)/gcc/system_$(SAML_VARIANT).c \ + $(MCU_DIR)/hpl/gclk/hpl_gclk.c \ + $(MCU_DIR)/hpl/mclk/hpl_mclk.c \ + $(MCU_DIR)/hpl/pm/hpl_pm.c \ + $(MCU_DIR)/hpl/osc32kctrl/hpl_osc32kctrl.c \ + $(MCU_DIR)/hpl/oscctrl/hpl_oscctrl.c \ + $(MCU_DIR)/hal/src/hal_atomic.c INC += \ $(TOP)/$(BOARD_PATH) \ - $(TOP)/hw/mcu/microchip/saml22/ \ - $(TOP)/hw/mcu/microchip/saml22/config \ - $(TOP)/hw/mcu/microchip/saml22/include \ - $(TOP)/hw/mcu/microchip/saml22/hal/include \ - $(TOP)/hw/mcu/microchip/saml22/hal/utils/include \ - $(TOP)/hw/mcu/microchip/saml22/hpl/port \ - $(TOP)/hw/mcu/microchip/saml22/hri \ - $(TOP)/hw/mcu/microchip/saml22/CMSIS/Core/Include - -# For TinyUSB port source -VENDOR = microchip -CHIP_FAMILY = samd + $(TOP)/$(MCU_DIR)/ \ + $(TOP)/$(MCU_DIR)/config \ + $(TOP)/$(MCU_DIR)/include \ + $(TOP)/$(MCU_DIR)/hal/include \ + $(TOP)/$(MCU_DIR)/hal/utils/include \ + $(TOP)/$(MCU_DIR)/hpl/port \ + $(TOP)/$(MCU_DIR)/hri \ + $(TOP)/lib/CMSIS_5/CMSIS/Core/Include # For freeRTOS port source FREERTOS_PORT = ARM_CM0 -- cgit v1.3.1 From 2d423514ee3e538408afe91693652d6079291195 Mon Sep 17 00:00:00 2001 From: hathach Date: Tue, 29 Jun 2021 16:33:32 +0700 Subject: rename rx65n cloud kit to target adding note for adding jlink support for rx65n_target board --- docs/boards.md | 2 +- hw/bsp/rx/boards/rx65n_cloud_kit/board.mk | 25 -- hw/bsp/rx/boards/rx65n_cloud_kit/r5f565ne.ld | 168 ------------ hw/bsp/rx/boards/rx65n_cloud_kit/rx65n_cloud_kit.c | 270 ------------------ hw/bsp/rx/boards/rx65n_target/board.mk | 25 ++ hw/bsp/rx/boards/rx65n_target/r5f565ne.ld | 168 ++++++++++++ hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 301 +++++++++++++++++++++ 7 files changed, 495 insertions(+), 464 deletions(-) delete mode 100644 hw/bsp/rx/boards/rx65n_cloud_kit/board.mk delete mode 100644 hw/bsp/rx/boards/rx65n_cloud_kit/r5f565ne.ld delete mode 100644 hw/bsp/rx/boards/rx65n_cloud_kit/rx65n_cloud_kit.c create mode 100644 hw/bsp/rx/boards/rx65n_target/board.mk create mode 100644 hw/bsp/rx/boards/rx65n_target/r5f565ne.ld create mode 100644 hw/bsp/rx/boards/rx65n_target/rx65n_target.c (limited to 'docs') diff --git a/docs/boards.md b/docs/boards.md index 53b0da702..324500bd1 100644 --- a/docs/boards.md +++ b/docs/boards.md @@ -127,7 +127,7 @@ This code base already had supported for a handful of following boards (sorted a ### Renesas RX - [GR-CITRUS](https://www.renesas.com/us/en/products/gadget-renesas/boards/gr-citrus) -- [Renesas RX65N Cloud Kit](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rx-32-bit-performance-efficiency-mcus/rx65n-cloud-kit-renesas-rx65n-cloud-kit) +- [Renesas RX65N Target Board](https://www.renesas.com/us/en/products/microcontrollers-microprocessors/rx-32-bit-performance-efficiency-mcus/rtk5rx65n0c00000br-target-board-rx65n) ### Raspberry Pi RP2040 diff --git a/hw/bsp/rx/boards/rx65n_cloud_kit/board.mk b/hw/bsp/rx/boards/rx65n_cloud_kit/board.mk deleted file mode 100644 index fc76d79fa..000000000 --- a/hw/bsp/rx/boards/rx65n_cloud_kit/board.mk +++ /dev/null @@ -1,25 +0,0 @@ -CFLAGS += \ - -mcpu=rx64m \ - -misa=v2 \ - -DCFG_TUSB_MCU=OPT_MCU_RX65X \ - -DIR_USB0_USBI0=IR_PERIB_INTB185 \ - -DIER_USB0_USBI0=IER_PERIB_INTB185 \ - -DIEN_USB0_USBI0=IEN_PERIB_INTB185 - -MCU_DIR = hw/mcu/renesas/rx/rx65n - -# All source paths should be relative to the top level. -LD_FILE = $(BOARD_PATH)/r5f565ne.ld - -# For freeRTOS port source -FREERTOS_PORT = RX600 - -# For flash-jlink target -JLINK_DEVICE = R5F565NE -JLINK_IF = JTAG - -# For flash-pyocd target -PYOCD_TARGET = - -# flash using rfp-cli -flash: flash-rfp diff --git a/hw/bsp/rx/boards/rx65n_cloud_kit/r5f565ne.ld b/hw/bsp/rx/boards/rx65n_cloud_kit/r5f565ne.ld deleted file mode 100644 index a02f0c02f..000000000 --- a/hw/bsp/rx/boards/rx65n_cloud_kit/r5f565ne.ld +++ /dev/null @@ -1,168 +0,0 @@ -__USTACK_SIZE = 0x00000200; -__ISTACK_SIZE = 0x00000200; - -MEMORY -{ - RAM : ORIGIN = 0x4, LENGTH = 0x3fffc - RAM2 : ORIGIN = 0x00800000, LENGTH = 0x60000 - OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128 - ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000 -} -SECTIONS -{ - .exvectors 0xFFFFFF80: AT(0xFFFFFF80) - { - "_exvectors_start" = .; - KEEP(*(.exvectors)) - "_exvectors_end" = .; - } >ROM - .fvectors 0xFFFFFFFC: AT(0xFFFFFFFC) - { - KEEP(*(.fvectors)) - } > ROM - .text 0xFFE00000: AT(0xFFE00000) - { - *(.text) - *(.text.*) - *(P) - KEEP(*(.text.*_isr)) - etext = .; - } > ROM - .rvectors ALIGN(4): - { - _rvectors_start = .; - KEEP(*(.rvectors)) - _rvectors_end = .; - } > ROM - .init : - { - KEEP(*(.init)) - __preinit_array_start = .; - KEEP(*(.preinit_array)) - __preinit_array_end = .; - __init_array_start = (. + 3) & ~ 3; - KEEP(*(.init_array)) - KEEP(*(SORT(.init_array.*))) - __init_array_end = .; - __fini_array_start = .; - KEEP(*(.fini_array)) - KEEP(*(SORT(.fini_array.*))) - __fini_array_end = .; - } > ROM - .fini : - { - KEEP(*(.fini)) - } > ROM - .got : - { - *(.got) - *(.got.plt) - } > ROM - .rodata : - { - *(.rodata) - *(.rodata.*) - *(C_1) - *(C_2) - *(C) - _erodata = .; - } > ROM - .eh_frame_hdr : - { - *(.eh_frame_hdr) - } > ROM - .eh_frame : - { - *(.eh_frame) - } > ROM - .jcr : - { - *(.jcr) - } > ROM - .tors : - { - __CTOR_LIST__ = .; - . = ALIGN(2); - ___ctors = .; - *(.ctors) - ___ctors_end = .; - __CTOR_END__ = .; - __DTOR_LIST__ = .; - ___dtors = .; - *(.dtors) - ___dtors_end = .; - __DTOR_END__ = .; - . = ALIGN(2); - _mdata = .; - } > ROM - .data : AT(_mdata) - { - _data = .; - *(.data) - *(.data.*) - *(D) - *(D_1) - *(D_2) - _edata = .; - } > RAM - .gcc_exc : - { - *(.gcc_exc) - } > RAM - .bss : - { - _bss = .; - *(.bss) - *(.bss.**) - *(COMMON) - *(B) - *(B_1) - *(B_2) - _ebss = .; - _end = .; - } > RAM - .ustack : - { - . = ALIGN(8); - . = . + __USTACK_SIZE; - PROVIDE(_ustack = .); - } > RAM - .istack : - { - . = ALIGN(8); - . = . + __ISTACK_SIZE; - PROVIDE(_istack = .); - } > RAM - .ofs1 0xFE7F5D00: AT(0xFE7F5D00) - { - KEEP(*(.ofs1)) - } > OFS - .ofs2 0xFE7F5D10: AT(0xFE7F5D10) - { - KEEP(*(.ofs2)) - } > OFS - .ofs3 0xFE7F5D20: AT(0xFE7F5D20) - { - KEEP(*(.ofs3)) - } > OFS - .ofs4 0xFE7F5D40: AT(0xFE7F5D40) - { - KEEP(*(.ofs4)) - } > OFS - .ofs5 0xFE7F5D48: AT(0xFE7F5D48) - { - KEEP(*(.ofs5)) - } > OFS - .ofs6 0xFE7F5D50: AT(0xFE7F5D50) - { - KEEP(*(.ofs6)) - } > OFS - .ofs7 0xFE7F5D64: AT(0xFE7F5D64) - { - KEEP(*(.ofs7)) - } > OFS - .ofs8 0xFE7F5D70: AT(0xFE7F5D70) - { - KEEP(*(.ofs8)) - } > OFS -} diff --git a/hw/bsp/rx/boards/rx65n_cloud_kit/rx65n_cloud_kit.c b/hw/bsp/rx/boards/rx65n_cloud_kit/rx65n_cloud_kit.c deleted file mode 100644 index 895b82e23..000000000 --- a/hw/bsp/rx/boards/rx65n_cloud_kit/rx65n_cloud_kit.c +++ /dev/null @@ -1,270 +0,0 @@ -/* - * The MIT License (MIT) - * - * Copyright (c) 2021, Koji Kitayama - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - * This file is part of the TinyUSB stack. - */ - -#include "bsp/board.h" -#include "iodefine.h" -#include "interrupt_handlers.h" - -#define IRQ_PRIORITY_CMT0 5 -#define IRQ_PRIORITY_USBI0 6 -#define IRQ_PRIORITY_SCI5 5 - -#define SYSTEM_PRCR_PRC1 (1<<1) -#define SYSTEM_PRCR_PRKEY (0xA5u<<8) - -#define CMT_PCLK 60000000 -#define CMT_CMCR_CKS_DIV_128 2 -#define CMT_CMCR_CMIE (1<<6) -#define MPC_PFS_ISEL (1<<6) - -#define SCI_PCLK 60000000 -#define SCI_SSR_FER (1<<4) -#define SCI_SSR_ORER (1<<5) - -#define SCI_SCR_TEIE (1u<<2) -#define SCI_SCR_RE (1u<<4) -#define SCI_SCR_TE (1u<<5) -#define SCI_SCR_RIE (1u<<6) -#define SCI_SCR_TIE (1u<<7) -#define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0 - -#define IRQ_USB0_USBI0 62 -#define SLIBR_USBI0 SLIBR185 -#define IPR_USB0_USBI0 IPR_PERIB_INTB185 -#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185 - -void HardwareSetup(void) -{ - FLASH.ROMCIV.WORD = 1; - while (FLASH.ROMCIV.WORD) ; - FLASH.ROMCE.WORD = 1; - while (!FLASH.ROMCE.WORD) ; - - SYSTEM.PRCR.WORD = 0xA503u; - if (!SYSTEM.RSTSR1.BYTE) { - RTC.RCR4.BYTE = 0; - RTC.RCR3.BYTE = 12; - while (12 != RTC.RCR3.BYTE) ; - } - SYSTEM.SOSCCR.BYTE = 1; - - if (SYSTEM.HOCOCR.BYTE) { - SYSTEM.HOCOCR.BYTE = 0; - while (!SYSTEM.OSCOVFSR.BIT.HCOVF) ; - } - SYSTEM.PLLCR.WORD = 0x1D10u; /* HOCO x 15 */ - SYSTEM.PLLCR2.BYTE = 0; - while (!SYSTEM.OSCOVFSR.BIT.PLOVF) ; - - SYSTEM.SCKCR.LONG = 0x21C11222u; - SYSTEM.SCKCR2.WORD = 0x0041u; - SYSTEM.ROMWT.BYTE = 0x02u; - while (0x02u != SYSTEM.ROMWT.BYTE) ; - SYSTEM.SCKCR3.WORD = 0x400u; - SYSTEM.PRCR.WORD = 0xA500u; -} - -//--------------------------------------------------------------------+ -// SCI handling -//--------------------------------------------------------------------+ -typedef struct { - uint8_t *buf; - uint32_t cnt; -} sci_buf_t; -static volatile sci_buf_t sci_buf[2]; - -void INT_Excep_SCI5_TXI5(void) -{ - uint8_t *buf = sci_buf[0].buf; - uint32_t cnt = sci_buf[0].cnt; - - if (!buf || !cnt) { - SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); - return; - } - SCI5.TDR = *buf; - if (--cnt) { - ++buf; - } else { - buf = NULL; - SCI5.SCR.BIT.TIE = 0; - SCI5.SCR.BIT.TEIE = 1; - } - sci_buf[0].buf = buf; - sci_buf[0].cnt = cnt; -} - -void INT_Excep_SCI5_TEI5(void) -{ - SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); -} - -void INT_Excep_SCI5_RXI5(void) -{ - uint8_t *buf = sci_buf[1].buf; - uint32_t cnt = sci_buf[1].cnt; - - if (!buf || !cnt || - (SCI5.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) { - sci_buf[1].buf = NULL; - SCI5.SSR.BYTE = 0; - SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); - return; - } - *buf = SCI5.RDR; - if (--cnt) { - ++buf; - } else { - buf = NULL; - SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); - } - sci_buf[1].buf = buf; - sci_buf[1].cnt = cnt; -} - -//--------------------------------------------------------------------+ -// Forward USB interrupt events to TinyUSB IRQ Handler -//--------------------------------------------------------------------+ -void INT_Excep_USB0_USBI0(void) -{ - tud_int_handler(0); -} - -void board_init(void) -{ - /* setup software configurable interrupts */ - ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0; - ICU.SLIPRCR.BYTE = 1; - -#if CFG_TUSB_OS == OPT_OS_NONE - /* Enable CMT0 */ - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; - MSTP(CMT0) = 0; - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; - /* Setup 1ms tick timer */ - CMT0.CMCNT = 0; - CMT0.CMCOR = CMT_PCLK / 1000 / 128; - CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128; - IR(CMT0, CMI0) = 0; - IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0; - IEN(CMT0, CMI0) = 1; - CMT.CMSTR0.BIT.STR0 = 1; -#endif - - /* Unlock MPC registers */ - MPC.PWPR.BIT.B0WI = 0; - MPC.PWPR.BIT.PFSWE = 1; - // SW PB1 - PORTB.PMR.BIT.B1 = 0U; - PORTB.PDR.BIT.B1 = 0U; - // LED PD6 - PORTD.PODR.BIT.B6 = 1U; - PORTD.ODR1.BIT.B4 = 1U; - PORTD.PMR.BIT.B6 = 0U; - PORTD.PDR.BIT.B6 = 1U; - /* UART TXD5 => PA4, RXD5 => PA3 */ - PORTA.PMR.BIT.B4 = 1U; - PORTA.PCR.BIT.B4 = 1U; - MPC.PA4PFS.BYTE = 0b01010; - PORTA.PMR.BIT.B3 = 1U; - MPC.PA5PFS.BYTE = 0b01010; - /* USB VBUS -> P16 */ - PORT1.PMR.BIT.B6 = 1U; - MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001; - /* Lock MPC registers */ - MPC.PWPR.BIT.PFSWE = 0; - MPC.PWPR.BIT.B0WI = 1; - - /* Enable SCI5 */ - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; - MSTP(SCI5) = 0; - SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; - SCI5.SEMR.BIT.ABCS = 1; - SCI5.SEMR.BIT.BGDM = 1; - SCI5.BRR = (SCI_PCLK / (8 * 115200)) - 1; - IR(SCI5, RXI5) = 0; - IR(SCI5, TXI5) = 0; - IS(SCI5, TEI5) = 0; - IR(ICU, GROUPBL0) = 0; - IPR(SCI5, RXI5) = IRQ_PRIORITY_SCI5; - IPR(SCI5, TXI5) = IRQ_PRIORITY_SCI5; - IPR(ICU,GROUPBL0) = IRQ_PRIORITY_SCI5; - IEN(SCI5, RXI5) = 1; - IEN(SCI5, TXI5) = 1; - IEN(ICU,GROUPBL0) = 1; - EN(SCI5, TEI5) = 1; - - /* setup USBI0 interrupt. */ - IR(USB0, USBI0) = 0; - IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; -} - -//--------------------------------------------------------------------+ -// Board porting API -//--------------------------------------------------------------------+ - -void board_led_write(bool state) -{ - PORTD.PODR.BIT.B6 = state ? 0 : 1; -} - -uint32_t board_button_read(void) -{ - return PORTB.PIDR.BIT.B1 ? 0 : 1; -} - -int board_uart_read(uint8_t* buf, int len) -{ - sci_buf[1].buf = buf; - sci_buf[1].cnt = len; - SCI5.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE; - while (SCI5.SCR.BIT.RE) ; - return len - sci_buf[1].cnt; -} - -int board_uart_write(void const *buf, int len) -{ - sci_buf[0].buf = (uint8_t*)buf; - sci_buf[0].cnt = len; - SCI5.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE; - while (SCI5.SCR.BIT.TE) ; - return len; -} - -#if CFG_TUSB_OS == OPT_OS_NONE -volatile uint32_t system_ticks = 0; -void INT_Excep_CMT0_CMI0(void) -{ - ++system_ticks; -} - -uint32_t board_millis(void) -{ - return system_ticks; -} -#else -uint32_t SystemCoreClock = 120000000; -#endif diff --git a/hw/bsp/rx/boards/rx65n_target/board.mk b/hw/bsp/rx/boards/rx65n_target/board.mk new file mode 100644 index 000000000..fc76d79fa --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/board.mk @@ -0,0 +1,25 @@ +CFLAGS += \ + -mcpu=rx64m \ + -misa=v2 \ + -DCFG_TUSB_MCU=OPT_MCU_RX65X \ + -DIR_USB0_USBI0=IR_PERIB_INTB185 \ + -DIER_USB0_USBI0=IER_PERIB_INTB185 \ + -DIEN_USB0_USBI0=IEN_PERIB_INTB185 + +MCU_DIR = hw/mcu/renesas/rx/rx65n + +# All source paths should be relative to the top level. +LD_FILE = $(BOARD_PATH)/r5f565ne.ld + +# For freeRTOS port source +FREERTOS_PORT = RX600 + +# For flash-jlink target +JLINK_DEVICE = R5F565NE +JLINK_IF = JTAG + +# For flash-pyocd target +PYOCD_TARGET = + +# flash using rfp-cli +flash: flash-rfp diff --git a/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld b/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld new file mode 100644 index 000000000..a02f0c02f --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/r5f565ne.ld @@ -0,0 +1,168 @@ +__USTACK_SIZE = 0x00000200; +__ISTACK_SIZE = 0x00000200; + +MEMORY +{ + RAM : ORIGIN = 0x4, LENGTH = 0x3fffc + RAM2 : ORIGIN = 0x00800000, LENGTH = 0x60000 + OFS : ORIGIN = 0xFE7F5D00, LENGTH = 128 + ROM : ORIGIN = 0xFFE00000, LENGTH = 0x200000 +} +SECTIONS +{ + .exvectors 0xFFFFFF80: AT(0xFFFFFF80) + { + "_exvectors_start" = .; + KEEP(*(.exvectors)) + "_exvectors_end" = .; + } >ROM + .fvectors 0xFFFFFFFC: AT(0xFFFFFFFC) + { + KEEP(*(.fvectors)) + } > ROM + .text 0xFFE00000: AT(0xFFE00000) + { + *(.text) + *(.text.*) + *(P) + KEEP(*(.text.*_isr)) + etext = .; + } > ROM + .rvectors ALIGN(4): + { + _rvectors_start = .; + KEEP(*(.rvectors)) + _rvectors_end = .; + } > ROM + .init : + { + KEEP(*(.init)) + __preinit_array_start = .; + KEEP(*(.preinit_array)) + __preinit_array_end = .; + __init_array_start = (. + 3) & ~ 3; + KEEP(*(.init_array)) + KEEP(*(SORT(.init_array.*))) + __init_array_end = .; + __fini_array_start = .; + KEEP(*(.fini_array)) + KEEP(*(SORT(.fini_array.*))) + __fini_array_end = .; + } > ROM + .fini : + { + KEEP(*(.fini)) + } > ROM + .got : + { + *(.got) + *(.got.plt) + } > ROM + .rodata : + { + *(.rodata) + *(.rodata.*) + *(C_1) + *(C_2) + *(C) + _erodata = .; + } > ROM + .eh_frame_hdr : + { + *(.eh_frame_hdr) + } > ROM + .eh_frame : + { + *(.eh_frame) + } > ROM + .jcr : + { + *(.jcr) + } > ROM + .tors : + { + __CTOR_LIST__ = .; + . = ALIGN(2); + ___ctors = .; + *(.ctors) + ___ctors_end = .; + __CTOR_END__ = .; + __DTOR_LIST__ = .; + ___dtors = .; + *(.dtors) + ___dtors_end = .; + __DTOR_END__ = .; + . = ALIGN(2); + _mdata = .; + } > ROM + .data : AT(_mdata) + { + _data = .; + *(.data) + *(.data.*) + *(D) + *(D_1) + *(D_2) + _edata = .; + } > RAM + .gcc_exc : + { + *(.gcc_exc) + } > RAM + .bss : + { + _bss = .; + *(.bss) + *(.bss.**) + *(COMMON) + *(B) + *(B_1) + *(B_2) + _ebss = .; + _end = .; + } > RAM + .ustack : + { + . = ALIGN(8); + . = . + __USTACK_SIZE; + PROVIDE(_ustack = .); + } > RAM + .istack : + { + . = ALIGN(8); + . = . + __ISTACK_SIZE; + PROVIDE(_istack = .); + } > RAM + .ofs1 0xFE7F5D00: AT(0xFE7F5D00) + { + KEEP(*(.ofs1)) + } > OFS + .ofs2 0xFE7F5D10: AT(0xFE7F5D10) + { + KEEP(*(.ofs2)) + } > OFS + .ofs3 0xFE7F5D20: AT(0xFE7F5D20) + { + KEEP(*(.ofs3)) + } > OFS + .ofs4 0xFE7F5D40: AT(0xFE7F5D40) + { + KEEP(*(.ofs4)) + } > OFS + .ofs5 0xFE7F5D48: AT(0xFE7F5D48) + { + KEEP(*(.ofs5)) + } > OFS + .ofs6 0xFE7F5D50: AT(0xFE7F5D50) + { + KEEP(*(.ofs6)) + } > OFS + .ofs7 0xFE7F5D64: AT(0xFE7F5D64) + { + KEEP(*(.ofs7)) + } > OFS + .ofs8 0xFE7F5D70: AT(0xFE7F5D70) + { + KEEP(*(.ofs8)) + } > OFS +} diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c new file mode 100644 index 000000000..96d8f36f0 --- /dev/null +++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c @@ -0,0 +1,301 @@ +/* + * The MIT License (MIT) + * + * Copyright (c) 2021, Koji Kitayama + * + * Permission is hereby granted, free of charge, to any person obtaining a copy + * of this software and associated documentation files (the "Software"), to deal + * in the Software without restriction, including without limitation the rights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN + * THE SOFTWARE. + * + * This file is part of the TinyUSB stack. + */ + +/* How to connect JLink and RX65n Target and option board + * (For original comment https://github.com/hathach/tinyusb/pull/922#issuecomment-869786131) + * + * To enable JTAG, RX65N requires following connections on main board. + * - short EJ2 jumper header, to disable onboard E2L. + * - short EMLE(J1-2) and 3V3(J1-14 or J2-10), to enable In-Circuit Emulator. + * + * Note: For RX65N-Cloud-Kit, the option board's JTAG pins to some switches or floating. + * To use JLink with the option board, I think some further modifications will be necessary. + * + * | Function | RX65N pin | main board | option board | JLink connector | + * |:---------:|:----------:|:----------:|:------------:|:---------------:| + * | 3V3 | VCC | J1-14 | CN5-6 | 1 | + * | TRST | P34 | J1-16 | CN5-7 | 3 | + * | GND | VSS | J1-12 | CN5-5 | 4 | + * | TDI | P30 | J1-20 | CN5-10 | 5 | + * | TMS | P31 | J1-19 | USER_SW | 7 | + * | TCK/FINEC | P27 | J1-21 | N/A | 9 | + * | TDO | P26 | J1-22 | CN5-9 | 13 | + * | nRES | RES# | J1-10 | RESET_SW | 15 | + * + * JLink firmware needs to update to V6.96 or newer version to avoid + * [a bug](https://forum.segger.com/index.php/Thread/7758-SOLVED-Bug-in-JLink-from-V6-88b-regarding-RX65N) + * regarding downloading. + * + * When using SEGGER RTT, `RX_NEWLIB=0` should be added to make command arguments. + * The option is used to change the C runtime library to `optlib` from `newlib`. + * RTT may not work with `newlib`. + * + */ + +#include "bsp/board.h" +#include "iodefine.h" +#include "interrupt_handlers.h" + +#define IRQ_PRIORITY_CMT0 5 +#define IRQ_PRIORITY_USBI0 6 +#define IRQ_PRIORITY_SCI5 5 + +#define SYSTEM_PRCR_PRC1 (1<<1) +#define SYSTEM_PRCR_PRKEY (0xA5u<<8) + +#define CMT_PCLK 60000000 +#define CMT_CMCR_CKS_DIV_128 2 +#define CMT_CMCR_CMIE (1<<6) +#define MPC_PFS_ISEL (1<<6) + +#define SCI_PCLK 60000000 +#define SCI_SSR_FER (1<<4) +#define SCI_SSR_ORER (1<<5) + +#define SCI_SCR_TEIE (1u<<2) +#define SCI_SCR_RE (1u<<4) +#define SCI_SCR_TE (1u<<5) +#define SCI_SCR_RIE (1u<<6) +#define SCI_SCR_TIE (1u<<7) +#define INT_Excep_SCI5_TEI5 INT_Excep_ICU_GROUPBL0 + +#define IRQ_USB0_USBI0 62 +#define SLIBR_USBI0 SLIBR185 +#define IPR_USB0_USBI0 IPR_PERIB_INTB185 +#define INT_Excep_USB0_USBI0 INT_Excep_PERIB_INTB185 + +void HardwareSetup(void) +{ + FLASH.ROMCIV.WORD = 1; + while (FLASH.ROMCIV.WORD) ; + FLASH.ROMCE.WORD = 1; + while (!FLASH.ROMCE.WORD) ; + + SYSTEM.PRCR.WORD = 0xA503u; + if (!SYSTEM.RSTSR1.BYTE) { + RTC.RCR4.BYTE = 0; + RTC.RCR3.BYTE = 12; + while (12 != RTC.RCR3.BYTE) ; + } + SYSTEM.SOSCCR.BYTE = 1; + + if (SYSTEM.HOCOCR.BYTE) { + SYSTEM.HOCOCR.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.HCOVF) ; + } + SYSTEM.PLLCR.WORD = 0x1D10u; /* HOCO x 15 */ + SYSTEM.PLLCR2.BYTE = 0; + while (!SYSTEM.OSCOVFSR.BIT.PLOVF) ; + + SYSTEM.SCKCR.LONG = 0x21C11222u; + SYSTEM.SCKCR2.WORD = 0x0041u; + SYSTEM.ROMWT.BYTE = 0x02u; + while (0x02u != SYSTEM.ROMWT.BYTE) ; + SYSTEM.SCKCR3.WORD = 0x400u; + SYSTEM.PRCR.WORD = 0xA500u; +} + +//--------------------------------------------------------------------+ +// SCI handling +//--------------------------------------------------------------------+ +typedef struct { + uint8_t *buf; + uint32_t cnt; +} sci_buf_t; +static volatile sci_buf_t sci_buf[2]; + +void INT_Excep_SCI5_TXI5(void) +{ + uint8_t *buf = sci_buf[0].buf; + uint32_t cnt = sci_buf[0].cnt; + + if (!buf || !cnt) { + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); + return; + } + SCI5.TDR = *buf; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BIT.TIE = 0; + SCI5.SCR.BIT.TEIE = 1; + } + sci_buf[0].buf = buf; + sci_buf[0].cnt = cnt; +} + +void INT_Excep_SCI5_TEI5(void) +{ + SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE); +} + +void INT_Excep_SCI5_RXI5(void) +{ + uint8_t *buf = sci_buf[1].buf; + uint32_t cnt = sci_buf[1].cnt; + + if (!buf || !cnt || + (SCI5.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) { + sci_buf[1].buf = NULL; + SCI5.SSR.BYTE = 0; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + return; + } + *buf = SCI5.RDR; + if (--cnt) { + ++buf; + } else { + buf = NULL; + SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE); + } + sci_buf[1].buf = buf; + sci_buf[1].cnt = cnt; +} + +//--------------------------------------------------------------------+ +// Forward USB interrupt events to TinyUSB IRQ Handler +//--------------------------------------------------------------------+ +void INT_Excep_USB0_USBI0(void) +{ + tud_int_handler(0); +} + +void board_init(void) +{ + /* setup software configurable interrupts */ + ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0; + ICU.SLIPRCR.BYTE = 1; + +#if CFG_TUSB_OS == OPT_OS_NONE + /* Enable CMT0 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(CMT0) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + /* Setup 1ms tick timer */ + CMT0.CMCNT = 0; + CMT0.CMCOR = CMT_PCLK / 1000 / 128; + CMT0.CMCR.WORD = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128; + IR(CMT0, CMI0) = 0; + IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0; + IEN(CMT0, CMI0) = 1; + CMT.CMSTR0.BIT.STR0 = 1; +#endif + + /* Unlock MPC registers */ + MPC.PWPR.BIT.B0WI = 0; + MPC.PWPR.BIT.PFSWE = 1; + // SW PB1 + PORTB.PMR.BIT.B1 = 0U; + PORTB.PDR.BIT.B1 = 0U; + // LED PD6 + PORTD.PODR.BIT.B6 = 1U; + PORTD.ODR1.BIT.B4 = 1U; + PORTD.PMR.BIT.B6 = 0U; + PORTD.PDR.BIT.B6 = 1U; + /* UART TXD5 => PA4, RXD5 => PA3 */ + PORTA.PMR.BIT.B4 = 1U; + PORTA.PCR.BIT.B4 = 1U; + MPC.PA4PFS.BYTE = 0b01010; + PORTA.PMR.BIT.B3 = 1U; + MPC.PA5PFS.BYTE = 0b01010; + /* USB VBUS -> P16 */ + PORT1.PMR.BIT.B6 = 1U; + MPC.P16PFS.BYTE = MPC_PFS_ISEL | 0b10001; + /* Lock MPC registers */ + MPC.PWPR.BIT.PFSWE = 0; + MPC.PWPR.BIT.B0WI = 1; + + /* Enable SCI5 */ + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1; + MSTP(SCI5) = 0; + SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY; + SCI5.SEMR.BIT.ABCS = 1; + SCI5.SEMR.BIT.BGDM = 1; + SCI5.BRR = (SCI_PCLK / (8 * 115200)) - 1; + IR(SCI5, RXI5) = 0; + IR(SCI5, TXI5) = 0; + IS(SCI5, TEI5) = 0; + IR(ICU, GROUPBL0) = 0; + IPR(SCI5, RXI5) = IRQ_PRIORITY_SCI5; + IPR(SCI5, TXI5) = IRQ_PRIORITY_SCI5; + IPR(ICU,GROUPBL0) = IRQ_PRIORITY_SCI5; + IEN(SCI5, RXI5) = 1; + IEN(SCI5, TXI5) = 1; + IEN(ICU,GROUPBL0) = 1; + EN(SCI5, TEI5) = 1; + + /* setup USBI0 interrupt. */ + IR(USB0, USBI0) = 0; + IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0; +} + +//--------------------------------------------------------------------+ +// Board porting API +//--------------------------------------------------------------------+ + +void board_led_write(bool state) +{ + PORTD.PODR.BIT.B6 = state ? 0 : 1; +} + +uint32_t board_button_read(void) +{ + return PORTB.PIDR.BIT.B1 ? 0 : 1; +} + +int board_uart_read(uint8_t* buf, int len) +{ + sci_buf[1].buf = buf; + sci_buf[1].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE; + while (SCI5.SCR.BIT.RE) ; + return len - sci_buf[1].cnt; +} + +int board_uart_write(void const *buf, int len) +{ + sci_buf[0].buf = (uint8_t*)buf; + sci_buf[0].cnt = len; + SCI5.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE; + while (SCI5.SCR.BIT.TE) ; + return len; +} + +#if CFG_TUSB_OS == OPT_OS_NONE +volatile uint32_t system_ticks = 0; +void INT_Excep_CMT0_CMI0(void) +{ + ++system_ticks; +} + +uint32_t board_millis(void) +{ + return system_ticks; +} +#else +uint32_t SystemCoreClock = 120000000; +#endif -- cgit v1.3.1