From b9c44eea76f92cf3719fd68c9a10b8662faf23b5 Mon Sep 17 00:00:00 2001
From: IngHK <github@hkue.de>
Date: Sat, 10 Feb 2024 17:08:29 +0100
Subject: improved tusb_config.h comment

---
 examples/host/cdc_msc_hid/src/tusb_config.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 76d59c316..e4d74077f 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -102,7 +102,7 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 1 // CDC ACM
+#define CFG_TUH_CDC                 1 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
-- 
cgit v1.3.1


From aabee25e189d2a05cb52e5c54329ab1ec875f084 Mon Sep 17 00:00:00 2001
From: IngHK <github@hkue.de>
Date: Thu, 22 Feb 2024 11:45:38 +0100
Subject: added PL2303 support

---
 examples/host/cdc_msc_hid/src/tusb_config.h        |   1 +
 .../host/cdc_msc_hid_freertos/src/tusb_config.h    |   1 +
 src/class/cdc/cdc_host.c                           | 754 ++++++++++++++++++++-
 src/class/cdc/serial/pl2303.h                      | 172 +++++
 src/tusb_option.h                                  |  18 +
 5 files changed, 942 insertions(+), 4 deletions(-)
 create mode 100644 src/class/cdc/serial/pl2303.h

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index e4d74077f..fc956c6d3 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -106,6 +106,7 @@
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_PL2303          1 // PL2303 Serial. PL2303 is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 9dc89dc55..dd732c700 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -111,6 +111,7 @@
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
+#define CFG_TUH_CDC_PL2303          1 // PL2303 Serial. PL2303 is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_HID                 (3*CFG_TUH_DEVICE_MAX) // typical keyboard + mouse device can have 3-4 HID interfaces
 #define CFG_TUH_MSC                 1
 #define CFG_TUH_VENDOR              0
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 86c010fa7..429d0a113 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -38,6 +38,7 @@
 #include "serial/ftdi_sio.h"
 #include "serial/cp210x.h"
 #include "serial/ch34x.h"
+#include "serial/pl2303.h"
 
 // Level where CFG_TUSB_DEBUG must be at least for this driver is logged
 #ifndef CFG_TUH_CDC_LOG_LEVEL
@@ -91,6 +92,10 @@ typedef struct {
     ftdi_private_t ftdi;
   #endif
 
+  #if CFG_TUH_CDC_PL2303
+    pl2303_private_t pl2303;
+  #endif
+
   struct {
     tu_edpt_stream_t tx;
     tu_edpt_stream_t rx;
@@ -105,7 +110,7 @@ typedef struct {
 
 CFG_TUH_MEM_SECTION
 static cdch_interface_t cdch_data[CFG_TUH_CDC];
-#if CFG_TUH_CDC_FTDI
+#if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_PL2303
   static tusb_desc_device_t desc_dev[CFG_TUH_CDC][CFG_TUH_ENUMERATION_BUFSIZE];
 #endif
 
@@ -164,6 +169,22 @@ static bool ch34x_set_line_coding(cdch_interface_t* p_cdc, tuh_xfer_cb_t complet
 static bool ch34x_set_modem_ctrl(cdch_interface_t* p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 #endif
 
+//------------- PL2303 prototypes -------------//
+#if CFG_TUH_CDC_PL2303
+static uint16_t const pl2303_vid_pid_list[][2] = {CFG_TUH_CDC_PL2303_VID_PID_LIST};
+static const struct pl2303_type_data pl2303_type_data[TYPE_COUNT] = {PL2303_TYPE_DATA};
+
+CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
+
+static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
+static void pl2303_process_config(tuh_xfer_t * xfer);
+
+static bool pl2303_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool pl2303_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool pl2303_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool pl2303_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+#endif
+
 //------------- Common -------------//
 enum {
   SERIAL_DRIVER_ACM = 0,
@@ -180,6 +201,10 @@ enum {
   SERIAL_DRIVER_CH34X,
 #endif
 
+#if CFG_TUH_CDC_PL2303
+  SERIAL_DRIVER_PL2303,
+#endif
+
   SERIAL_DRIVER_COUNT
 };
 
@@ -260,6 +285,22 @@ static const cdch_serial_driver_t serial_drivers[] = {
     #endif
   },
   #endif
+
+  #if CFG_TUH_CDC_PL2303
+  {
+      .vid_pid_list           = pl2303_vid_pid_list,
+      .vid_pid_count          = TU_ARRAY_SIZE(pl2303_vid_pid_list),
+      .open                   = pl2303_open,
+      .process_set_config     = pl2303_process_config,
+      .set_control_line_state = pl2303_set_modem_ctrl,
+      .set_baudrate           = pl2303_set_baudrate,
+      .set_data_format        = pl2303_set_data_format,
+      .set_line_coding        = pl2303_set_line_coding,
+    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
+      .name                   = (uint8_t const *) "PL2303"
+    #endif
+  }
+  #endif
 };
 
 TU_VERIFY_STATIC(TU_ARRAY_SIZE(serial_drivers) == SERIAL_DRIVER_COUNT, "Serial driver count mismatch");
@@ -1863,7 +1904,7 @@ static bool ch34x_modem_ctrl_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t com
 
 // internal control complete to update state such as line state, encoding
 static void ch34x_internal_control_complete(tuh_xfer_t * xfer) {
-  // CH34x only has 1 interface and wIndex used as payload and not for bInterfaceNumber
+  // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uint8_t const itf_num = 0;
   uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
   cdch_interface_t* p_cdc = get_itf(idx);
@@ -1921,7 +1962,8 @@ static bool ch34x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_
 }
 
 static void ch34x_set_line_coding_stage1_complete(tuh_xfer_t * xfer) {
-  uint8_t const itf_num = 0; // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
+  // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
+  uint8_t const itf_num = 0;
   set_line_coding_stage1_complete(xfer, itf_num,
                                   ch34x_write_reg_data_format,      // control request function to set data format
                                   ch34x_internal_control_complete); // control complete function to be called after request
@@ -1981,7 +2023,7 @@ static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const* itf_desc, uin
 }
 
 static void ch34x_process_config(tuh_xfer_t* xfer) {
-  // CH34x only has 1 interface and wIndex used as payload and not for bInterfaceNumber
+  // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uintptr_t const state = xfer->user_data;
   uint8_t const itf_num = 0;
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
@@ -2142,4 +2184,708 @@ static uint8_t ch34x_get_lcr(cdch_interface_t * p_cdc) {
 
 #endif // CFG_TUH_CDC_CH34X
 
+//--------------------------------------------------------------------+
+// PL2303
+//--------------------------------------------------------------------+
+#if CFG_TUH_CDC_PL2303
+
+static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t const idx, uint8_t step,
+                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+static bool pl2303_encode_baud_rate(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]);
+
+//------------- Control Request -------------//
+
+static bool pl2303_set_request(cdch_interface_t * p_cdc, uint8_t request, uint8_t requesttype,
+                               uint16_t value, uint16_t index, uint8_t * buffer, uint16_t length,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  tusb_control_request_t const request_setup = {
+    .bmRequestType = requesttype,
+    .bRequest      = request,
+    .wValue        = tu_htole16 (value),
+    .wIndex        = tu_htole16 (index),
+    .wLength       = tu_htole16 (length)
+  };
+
+  // use usbh enum buf since application variable does not live long enough
+  uint8_t * enum_buf = NULL;
+
+  if (buffer && length > 0) {
+    enum_buf = usbh_get_enum_buf();
+    if (request_setup.bmRequestType_bit.direction == TUSB_DIR_OUT) {
+      tu_memcpy_s(enum_buf, CFG_TUH_ENUMERATION_BUFSIZE, buffer, length);
+    }
+  }
+
+  tuh_xfer_t xfer = {
+    .daddr       = p_cdc->daddr,
+    .ep_addr     = 0,
+    .setup       = &request_setup,
+    .buffer      = enum_buf,
+    .complete_cb = complete_cb,
+    .user_data   = user_data
+  };
+
+  return tuh_control_xfer(&xfer);
+}
+
+static bool pl2303_vendor_read(cdch_interface_t * p_cdc, uint16_t value, uint8_t * buf,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ?
+                    PL2303_VENDOR_READ_NREQUEST : PL2303_VENDOR_READ_REQUEST;
+
+  return pl2303_set_request(p_cdc, request, PL2303_VENDOR_READ_REQUEST_TYPE, value, 0, buf, 1, complete_cb, user_data);
+}
+
+static bool pl2303_vendor_write(cdch_interface_t * p_cdc, uint16_t value, uint16_t index,
+                                tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ?
+                    PL2303_VENDOR_WRITE_NREQUEST : PL2303_VENDOR_WRITE_REQUEST;
+
+  return pl2303_set_request(p_cdc, request, PL2303_VENDOR_WRITE_REQUEST_TYPE, value, index, NULL, 0, complete_cb, user_data);
+}
+
+static inline bool pl2303_supports_hx_status(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  uint8_t buf;
+
+  return pl2303_set_request(p_cdc, PL2303_VENDOR_READ_REQUEST, PL2303_VENDOR_READ_REQUEST_TYPE, PL2303_READ_TYPE_HX_STATUS, 0,
+                            &buf, 1, complete_cb, user_data);
+}
+
+static inline bool pl2303_set_control_lines(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  return pl2303_set_request(p_cdc, PL2303_SET_CONTROL_REQUEST, PL2303_SET_CONTROL_REQUEST_TYPE,
+                            p_cdc->requested_line_state, 0, NULL, 0, complete_cb, user_data);
+}
+
+//static bool pl2303_get_line_request(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BUFSIZE])
+//{
+//  return pl2303_set_request(p_cdc, PL2303_GET_LINE_REQUEST, PL2303_GET_LINE_REQUEST_TYPE, 0, 0, buf, PL2303_LINE_CODING_BUFSIZE);
+//}
+
+static bool pl2303_set_line_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // the caller has to precheck, that the new line coding different than the current, else false returned
+  uint8_t buf[PL2303_LINE_CODING_BUFSIZE];
+  /*
+   * Some PL2303 are known to lose bytes if you change serial settings
+   * even to the same values as before. Thus we actually need to filter
+   * in this specific case.
+   */
+  // TODO really necessary to check? what to do in this case when no transfer will happen?
+  // callback is not called...
+  TU_VERIFY(memcmp(&p_cdc->requested_line_coding, &p_cdc->line_coding, sizeof(cdc_line_coding_t) ) != 0);
+
+  /* For reference buf[6] data bits value */
+  TU_VERIFY(p_cdc->requested_line_coding.data_bits >= 5 && p_cdc->requested_line_coding.data_bits <= 8, 0);
+  buf[6] = p_cdc->requested_line_coding.data_bits;
+
+  /* For reference buf[0]:buf[3] baud rate value */
+  TU_VERIFY(pl2303_encode_baud_rate(p_cdc, &buf[0]));
+
+  /* For reference buf[4]=0 is 1 stop bits */
+  /* For reference buf[4]=1 is 1.5 stop bits */
+  /* For reference buf[4]=2 is 2 stop bits */
+  buf[4] = p_cdc->requested_line_coding.stop_bits; // PL2303 has the same coding
+
+  /* For reference buf[5]=0 is none parity */
+  /* For reference buf[5]=1 is odd parity */
+  /* For reference buf[5]=2 is even parity */
+  /* For reference buf[5]=3 is mark parity */
+  /* For reference buf[5]=4 is space parity */
+  buf[5] = p_cdc->requested_line_coding.parity; // PL2303 has the same coding
+
+  return pl2303_set_request(p_cdc, PL2303_SET_LINE_REQUEST, PL2303_SET_LINE_REQUEST_TYPE, 0, 0,
+                            buf, PL2303_LINE_CODING_BUFSIZE, complete_cb, user_data);
+}
+
+//static bool pl2303_set_break(cdch_interface_t * p_cdc, bool enable)
+//{
+//  uint16_t state = enable ? PL2303_BREAK_ON : PL2303_BREAK_OFF;
+//  return pl2303_set_request(p_cdc, PL2303_BREAK_REQUEST, PL2303_BREAK_REQUEST_TYPE, state, 0, NULL, 0);
+//}
+
+static inline int pl2303_clear_halt(cdch_interface_t * p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
+{
+  /* we don't care if it wasn't halted first. in fact some devices
+   * (like some ibmcam model 1 units) seem to expect hosts to make
+   * this request for iso endpoints, which can't halt!
+   */
+  return pl2303_set_request(p_cdc, TUSB_REQ_CLEAR_FEATURE, PL2303_CLEAR_HALT_REQUEST_TYPE, TUSB_REQ_FEATURE_EDPT_HALT, endp,
+                            NULL, 0, complete_cb, user_data);
+}
+
+//------------- Driver API -------------//
+
+// internal control complete to update state such as line state, encoding
+static void pl2303_internal_control_complete(tuh_xfer_t * xfer) {
+  // PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
+  uint8_t const itf_num = 0;
+  uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc,);
+  bool const success = (xfer->result == XFER_RESULT_SUCCESS);
+  TU_LOG_P_CDC("control complete success = %u", success);
+
+  if (success) {
+    if (xfer->setup->bRequest == PL2303_SET_LINE_REQUEST &&
+         xfer->setup->bmRequestType == PL2303_SET_LINE_REQUEST_TYPE) {
+      p_cdc->line_coding = p_cdc->requested_line_coding;
+    }
+    if (xfer->setup->bRequest == PL2303_SET_CONTROL_REQUEST &&
+         xfer->setup->bmRequestType == PL2303_SET_CONTROL_REQUEST_TYPE) {
+      p_cdc->line_state = p_cdc->requested_line_state;
+    }
+  }
+
+  xfer->complete_cb = p_cdc->user_control_cb;
+  if (xfer->complete_cb) {
+    xfer->complete_cb(xfer);
+  }
+}
+
+static bool pl2303_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(pl2303_set_line_request(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
+
+  return true;
+}
+
+static bool pl2303_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  p_cdc->requested_line_coding.bit_rate = p_cdc->line_coding.bit_rate;
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(pl2303_set_line_request(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
+
+  return true;
+}
+
+static bool pl2303_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  p_cdc->requested_line_coding.stop_bits = p_cdc->line_coding.stop_bits;
+  p_cdc->requested_line_coding.parity    = p_cdc->line_coding.parity;
+  p_cdc->requested_line_coding.data_bits = p_cdc->line_coding.data_bits;
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(pl2303_set_line_request(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
+
+  return true;
+}
+
+static bool pl2303_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  // PL2303 has the same bit coding
+  p_cdc->user_control_cb = complete_cb;
+  TU_ASSERT(pl2303_set_control_lines(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
+
+  return true;
+}
+
+//------------- Enumeration -------------//
+
+enum {
+  CONFIG_PL2303_GET_DESC = 0,
+  CONFIG_PL2303_DETECT_TYPE,
+  CONFIG_PL2303_READ1,
+  CONFIG_PL2303_WRITE1,
+  CONFIG_PL2303_READ2,
+  CONFIG_PL2303_READ3,
+  CONFIG_PL2303_READ4,
+  CONFIG_PL2303_WRITE2,
+  CONFIG_PL2303_READ5,
+  CONFIG_PL2303_READ6,
+  CONFIG_PL2303_WRITE3,
+  CONFIG_PL2303_WRITE4,
+  CONFIG_PL2303_WRITE5,
+  CONFIG_PL2303_RESET_ENDP1,
+  CONFIG_PL2303_RESET_ENDP2,
+  CONFIG_PL2303_LINE_CODING,
+  CONFIG_PL2303_MODEM_CONTROL,
+  CONFIG_PL2303_FLOW_CTRL_READ,
+  CONFIG_PL2303_FLOW_CTRL_WRITE,
+  CONFIG_PL2303_COMPLETE
+};
+
+static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
+  // PL2303 Interface includes 1 vendor interface + 1 interrupt endpoints + 2 bulk
+  TU_VERIFY(itf_desc->bNumEndpoints == 3);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len);
+
+  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  TU_VERIFY(p_cdc);
+
+  p_cdc->serial_drid = SERIAL_DRIVER_PL2303;
+  p_cdc->pl2303.serial_private.quirks = 0;
+  p_cdc->pl2303.supports_hx_status = false;
+
+  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const * ) tu_desc_next(itf_desc);
+
+  // Interrupt endpoint: not used for now
+  TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(desc_ep) &&
+            TUSB_XFER_INTERRUPT == desc_ep->bmAttributes.xfer);
+  TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
+  p_cdc->ep_notif = desc_ep->bEndpointAddress;
+  desc_ep += 1;
+
+  // data endpoints expected to be in pairs
+  TU_ASSERT(open_ep_stream_pair(p_cdc, desc_ep));
+
+  return true;
+}
+
+static void pl2303_process_config(tuh_xfer_t * xfer) {
+  // PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
+  uint8_t const itf_num = 0;
+  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+  cdch_interface_t * p_cdc = get_itf(idx);
+  // state CONFIG_PL2303_READ1 may have no success due to expected stall by pl2303_supports_hx_status()
+  TU_ASSERT_COMPLETE(p_cdc && (xfer->result == XFER_RESULT_SUCCESS || xfer->user_data == CONFIG_PL2303_READ1));
+  uint8_t buf;
+  int8_t type;
+
+  switch (xfer->user_data) {
+
+    // from here sequence overtaken from Linux Kernel function pl2303_startup()
+    case CONFIG_PL2303_GET_DESC:
+      p_cdc->user_control_cb = pl2303_process_config; // set once for whole process config
+      // get device descriptor
+      TU_ASSERT_COMPLETE(tuh_descriptor_get_device(xfer->daddr, desc_dev[idx], sizeof(tusb_desc_device_t),
+                                                   pl2303_process_config, CONFIG_PL2303_DETECT_TYPE));
+      break;
+
+    case CONFIG_PL2303_DETECT_TYPE:
+      // get type and quirks (step 1)
+      type = pl2303_detect_type (p_cdc, idx, 1, pl2303_process_config, CONFIG_PL2303_READ1); // step 1
+      TU_ASSERT_COMPLETE(type!=PL2303_DETECT_TYPE_FAILED);
+      if (type == PL2303_SUPPORTS_HX_STATUS_TRIGGERED) {
+        break;
+      } // else: no transfer triggered and continue with CONFIG_PL2303_READ1
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ1:
+      // get supports_hx_status, type and quirks (step 2), do special read
+      p_cdc->pl2303.supports_hx_status = ( // will not be true, if coming directly from previous case
+                                           xfer->user_data == CONFIG_PL2303_READ1 && xfer->result == XFER_RESULT_SUCCESS );
+      type = pl2303_detect_type (p_cdc, idx, 2, NULL, 0); // step 2 now with supports_hx_status
+      TU_ASSERT_COMPLETE(type!=PL2303_DETECT_TYPE_FAILED);
+      p_cdc->pl2303.serial_private.type = &pl2303_type_data[type];
+      p_cdc->pl2303.serial_private.quirks |= p_cdc->pl2303.serial_private.type->quirks;
+      #if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL && 0 // can be activated if necessary
+        TU_LOG(CFG_TUH_CDC_LOG_LEVEL, "PL2303 bDeviceClass = 0x%02x bMaxPacketSize0 = %u bcdUSB = 0x%04x bcdDevice = 0x%04x",
+               desc_dev[idx]->bDeviceClass, desc_dev[idx]->bMaxPacketSize0, desc_dev[idx]->bcdUSB, desc_dev[idx]->bcdDevice );
+        uint16_t vid, pid;
+        TU_ASSERT_COMPLETE(tuh_vid_pid_get(p_cdc->daddr, &vid, &pid));
+        TU_LOG(CFG_TUH_CDC_LOG_LEVEL, "       vid = 0x%04x pid = 0x%04x supports_hx_status = %u type = %s quirks = %u",
+               vid, pid, p_cdc->pl2303.supports_hx_status,
+               p_cdc->pl2303.serial_private.type->name, p_cdc->pl2303.serial_private.quirks);
+      #endif
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_WRITE1));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE1:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0x0404, 0, pl2303_process_config, CONFIG_PL2303_READ2));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ2:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_READ3));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ3:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8383, &buf, pl2303_process_config, CONFIG_PL2303_READ4));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ4:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_WRITE2));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE2:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0x0404, 1, pl2303_process_config, CONFIG_PL2303_READ5));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ5:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_READ6));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_READ6:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8383, &buf, pl2303_process_config, CONFIG_PL2303_WRITE3));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE3:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0, 1, pl2303_process_config, CONFIG_PL2303_WRITE4));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE4:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 1, 0, pl2303_process_config, CONFIG_PL2303_WRITE5));
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    case CONFIG_PL2303_WRITE5:
+      // purpose unknown, overtaken from Linux Kernel driver
+      if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
+        if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
+          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 2, 0x24, pl2303_process_config, CONFIG_PL2303_RESET_ENDP1));
+        } else {
+          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 2, 0x44, pl2303_process_config, CONFIG_PL2303_RESET_ENDP1));
+        }
+        break;
+      } // else: continue with next step
+      TU_ATTR_FALLTHROUGH;
+
+    // from here sequence overtaken from Linux Kernel function pl2303_open()
+    case CONFIG_PL2303_RESET_ENDP1:
+      // step 1
+      if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
+        TU_ASSERT_COMPLETE(pl2303_clear_halt(p_cdc, PL2303_OUT_EP, pl2303_process_config, CONFIG_PL2303_RESET_ENDP2));
+      } else {
+        /* reset upstream data pipes */
+        if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, PL2303_HXN_RESET_REG, // skip CONFIG_PL2303_RESET_ENDP2, no 2nd step
+                                        PL2303_HXN_RESET_UPSTREAM_PIPE | PL2303_HXN_RESET_DOWNSTREAM_PIPE,
+                                        pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+        } else {
+          pl2303_vendor_write(p_cdc, 8, 0, pl2303_process_config, CONFIG_PL2303_RESET_ENDP2);
+        }
+      }
+      break;
+
+    case CONFIG_PL2303_RESET_ENDP2:
+      // step 2
+      if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
+        TU_ASSERT_COMPLETE(pl2303_clear_halt(p_cdc, PL2303_IN_EP, pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+      } else {
+        /* reset upstream data pipes */
+        if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+          // here nothing to do, only structure of previous step overtaken for better reading and comparison
+        } else {
+          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 9, 0, pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+        }
+      }
+      break;
+
+    // from here sequence overtaken from Linux Kernel function pl2303_set_termios()
+    // unnecessary pl2303_get_line_request() is skipped due to a stall
+    case CONFIG_PL2303_LINE_CODING:
+      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+        TU_ASSERT_COMPLETE( pl2303_set_line_request(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_MODEM_CONTROL));
+        break;
+      #else
+        TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_PL2303_MODEM_CONTROL:
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+        p_cdc->requested_line_state = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+        TU_ASSERT_COMPLETE(pl2303_set_control_lines(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_FLOW_CTRL_READ));
+        break;
+      #else
+        TU_ATTR_FALLTHROUGH;
+      #endif
+
+    case CONFIG_PL2303_FLOW_CTRL_READ:
+      // read flow control register for modify & write back in next step
+      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, PL2303_HXN_FLOWCTRL_REG, &buf, pl2303_process_config,
+                                              CONFIG_PL2303_FLOW_CTRL_WRITE));
+      } else {
+        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0, &buf, pl2303_process_config, CONFIG_PL2303_FLOW_CTRL_WRITE));
+      }
+      break;
+
+    case CONFIG_PL2303_FLOW_CTRL_WRITE:
+      // no flow control
+      buf = xfer->buffer[0];
+      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+        buf &= (uint8_t) ~PL2303_HXN_FLOWCTRL_MASK;
+        buf |= PL2303_HXN_FLOWCTRL_NONE;
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, PL2303_HXN_FLOWCTRL_REG, buf, pl2303_process_config,
+                                               CONFIG_PL2303_COMPLETE));
+      } else {
+        buf &= (uint8_t) ~PL2303_FLOWCTRL_MASK;
+        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0, buf, pl2303_process_config, CONFIG_PL2303_COMPLETE));
+      }
+      break;
+
+    case CONFIG_PL2303_COMPLETE:
+      set_config_complete(idx, 0, true);
+      break;
+
+    default:
+      set_config_complete(idx, 0, false);
+      break;
+  }
+}
+
+//------------- Helper -------------//
+
+static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t const idx, uint8_t step,
+                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data )
+{
+  /*
+   * Legacy PL2303H, variants 0 and 1 (difference unknown).
+   */
+  if (desc_dev[idx]->bDeviceClass == 0x02) {
+    return TYPE_H;    /* variant 0 */
+  }
+
+  if (desc_dev[idx]->bMaxPacketSize0 != 0x40) {
+    if (desc_dev[idx]->bDeviceClass == 0x00 || desc_dev[idx]->bDeviceClass == 0xff) {
+      return TYPE_H;  /* variant 1 */
+    }
+    return TYPE_H;    /* variant 0 */
+  }
+
+  switch (desc_dev[idx]->bcdUSB) {
+    case 0x101:
+      /* USB 1.0.1? Let's assume they meant 1.1... */
+      TU_ATTR_FALLTHROUGH;
+    case 0x110:
+      switch (desc_dev[idx]->bcdDevice) {
+        case 0x300:
+          return TYPE_HX;
+        case 0x400:
+          return TYPE_HXD;
+        default:
+          return TYPE_HX;
+      }
+      break;
+    case 0x200:
+      switch (desc_dev[idx]->bcdDevice) {
+        case 0x100: /* GC */
+        case 0x105:
+          return TYPE_HXN;
+        case 0x300: /* GT / TA */
+          if (step == 1) {
+            // step 1 trigger pl2303_supports_hx_status() request
+            TU_ASSERT(pl2303_supports_hx_status (p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
+            return PL2303_SUPPORTS_HX_STATUS_TRIGGERED;
+          } else {
+            // step 2 use supports_hx_status
+            if (p_cdc->pl2303.supports_hx_status) {
+              return TYPE_TA;
+            }
+          }
+          TU_ATTR_FALLTHROUGH;
+        case 0x305:
+        case 0x400: /* GL */
+        case 0x405:
+          return TYPE_HXN;
+        case 0x500: /* GE / TB */
+          if (step == 1) {
+            // step 1 trigger pl2303_supports_hx_status() request
+            TU_ASSERT(pl2303_supports_hx_status (p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
+            return PL2303_SUPPORTS_HX_STATUS_TRIGGERED;
+          } else {
+            // step 2 use supports_hx_status
+            if (p_cdc->pl2303.supports_hx_status) {
+              return TYPE_TB;
+            }
+          }
+          TU_ATTR_FALLTHROUGH;
+        case 0x505:
+        case 0x600: /* GS */
+        case 0x605:
+        case 0x700: /* GR */
+        case 0x705:
+          return TYPE_HXN;
+        default:
+          break;
+      }
+      break;
+    default: break;
+  }
+
+  TU_LOG_P_CDC("unknown device type bcdUSB = 0x%04x", desc_dev[idx]->bcdUSB);
+
+  return PL2303_DETECT_TYPE_FAILED;
+}
+
+/*
+ * Returns the nearest supported baud rate that can be set directly without
+ * using divisors.
+ */
+static uint32_t pl2303_get_supported_baud_rate(uint32_t baud)
+{
+  static const uint32_t baud_sup[] = {
+    75, 150, 300, 600, 1200, 1800, 2400, 3600, 4800, 7200, 9600,
+    14400, 19200, 28800, 38400, 57600, 115200, 230400, 460800,
+    614400, 921600, 1228800, 2457600, 3000000, 6000000
+  };
+
+  uint8_t i;
+  for (i = 0; i < TU_ARRAY_SIZE(baud_sup); ++i) {
+    if (baud_sup[i] > baud) {
+      break;
+    }
+  }
+
+  if (i == TU_ARRAY_SIZE(baud_sup)) {
+    baud = baud_sup[i - 1];
+  } else if (i > 0 && (baud_sup[i] - baud) > (baud - baud_sup[i - 1])) {
+    baud = baud_sup[i - 1];
+  } else {
+    baud = baud_sup[i];
+  }
+
+  return baud;
+}
+
+/*
+ * NOTE: If unsupported baud rates are set directly, the PL2303 seems to
+ *       use 9600 baud.
+ */
+static uint32_t pl2303_encode_baud_rate_direct(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
+{
+  uint32_t baud_le = tu_htole32(baud);
+  buf[0] = (uint8_t) ( baud_le        & 0xff);
+  buf[1] = (uint8_t) ((baud_le >>  8) & 0xff);
+  buf[2] = (uint8_t) ((baud_le >> 16) & 0xff);
+  buf[3] = (uint8_t) ((baud_le >> 24) & 0xff);
+
+  return baud;
+}
+
+static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
+{
+  uint32_t baseline, mantissa, exponent;
+
+  /*
+   * Apparently the formula is:
+   *   baudrate = 12M * 32 / (mantissa * 4^exponent)
+   * where
+   *   mantissa = buf[8:0]
+   *   exponent = buf[11:9]
+   */
+  baseline = 12000000 * 32;
+  mantissa = baseline / baud;
+  if (mantissa == 0)
+    mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
+  exponent = 0;
+  while (mantissa >= 512) {
+    if (exponent < 7) {
+      mantissa >>= 2; /* divide by 4 */
+      exponent++;
+    } else {
+      /* Exponent is maxed. Trim mantissa and leave. */
+      mantissa = 511;
+      break;
+    }
+  }
+
+  buf[3] = 0x80;
+  buf[2] = 0;
+  buf[1] = (uint8_t) ((exponent << 1 |  mantissa >> 8) & 0xff);
+  buf[0] = (uint8_t) (mantissa & 0xff);
+
+  /* Calculate and return the exact baud rate. */
+  baud = (baseline / mantissa) >> (exponent << 1);
+
+  return baud;
+}
+
+static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
+{
+  uint32_t baseline, mantissa, exponent;
+
+  /*
+   * Apparently, for the TA version the formula is:
+   *   baudrate = 12M * 32 / (mantissa * 2^exponent)
+   * where
+   *   mantissa = buf[10:0]
+   *   exponent = buf[15:13 16]
+   */
+  baseline = 12000000 * 32;
+  mantissa = baseline / baud;
+  if (mantissa == 0) {
+    mantissa = 1;   /* Avoid dividing by zero if baud > 32 * 12M. */
+  }
+  exponent = 0;
+  while (mantissa >= 2048) {
+    if (exponent < 15) {
+      mantissa >>= 1; /* divide by 2 */
+      exponent++;
+    } else {
+      /* Exponent is maxed. Trim mantissa and leave. */
+      mantissa = 2047;
+      break;
+    }
+  }
+
+  buf[3] = 0x80;
+  buf[2] = (uint8_t) (exponent & 0x01);
+  buf[1] = (uint8_t) (((exponent &  (uint32_t) ~0x01) << 4 | mantissa >> 8 ) & 0xff);
+  buf[0] = (uint8_t) (mantissa & 0xff);
+
+  /* Calculate and return the exact baud rate. */
+  baud = (baseline / mantissa) >> exponent;
+
+  return baud;
+}
+
+static bool pl2303_encode_baud_rate(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE])
+{
+  uint32_t baud = p_cdc->requested_line_coding.bit_rate;
+  uint32_t baud_sup;
+
+  TU_VERIFY(baud && baud <= p_cdc->pl2303.serial_private.type->max_baud_rate);
+  /*
+   * Use direct method for supported baud rates, otherwise use divisors.
+   * Newer chip types do not support divisor encoding.
+   */
+  if (p_cdc->pl2303.serial_private.type->no_divisors) {
+    baud_sup = baud;
+  } else {
+    baud_sup = pl2303_get_supported_baud_rate(baud);
+  }
+
+  if (baud == baud_sup) {
+    baud = pl2303_encode_baud_rate_direct(buf, baud);
+  } else if (p_cdc->pl2303.serial_private.type->alt_divisors) {
+    baud = pl2303_encode_baud_rate_divisor_alt(buf, baud);
+  } else {
+    baud = pl2303_encode_baud_rate_divisor(buf, baud);
+  }
+  TU_LOG_P_CDC("real baudrate = %lu", baud);
+
+  return true;
+}
+
+#endif // CFG_TUH_CDC_PL2303
+
 #endif
diff --git a/src/class/cdc/serial/pl2303.h b/src/class/cdc/serial/pl2303.h
new file mode 100644
index 000000000..bf264191b
--- /dev/null
+++ b/src/class/cdc/serial/pl2303.h
@@ -0,0 +1,172 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Heiko Kuester
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _PL2303_H_
+#define _PL2303_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+// There is no official documentation for the PL2303 chips.
+// Reference can be found
+// - https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.h and
+//   https://github.com/torvalds/linux/blob/master/drivers/usb/serial/pl2303.c
+// - https://github.com/freebsd/freebsd-src/blob/main/sys/dev/usb/serial/uplcom.c
+
+/* quirks */
+#define PL2303_QUIRK_UART_STATE_IDX0 1
+#define PL2303_QUIRK_LEGACY 2
+#define PL2303_QUIRK_ENDPOINT_HACK 4
+
+/* requests and bits */
+#define PL2303_SET_LINE_REQUEST_TYPE 0x21     // class request host to device interface
+#define PL2303_SET_LINE_REQUEST 0x20          // dec 32
+
+#define PL2303_SET_CONTROL_REQUEST_TYPE 0x21  // class request host to device interface
+#define PL2303_SET_CONTROL_REQUEST 0x22       // dec 34
+#define PL2303_CONTROL_DTR 0x01               // dec 1
+#define PL2303_CONTROL_RTS 0x02               // dec 2
+
+#define PL2303_BREAK_REQUEST_TYPE 0x21        // class request host to device interface
+#define PL2303_BREAK_REQUEST 0x23             // dec 35
+#define PL2303_BREAK_ON 0xffff
+#define PL2303_BREAK_OFF 0x0000
+
+#define PL2303_GET_LINE_REQUEST_TYPE 0xa1     // class request device to host interface
+#define PL2303_GET_LINE_REQUEST 0x21          // dec 33
+
+#define PL2303_VENDOR_WRITE_REQUEST_TYPE 0x40 // vendor request host to device interface
+#define PL2303_VENDOR_WRITE_REQUEST 0x01      // dec 1
+#define PL2303_VENDOR_WRITE_NREQUEST 0x80     // dec 128
+
+#define PL2303_VENDOR_READ_REQUEST_TYPE 0xc0  // vendor request device to host interface
+#define PL2303_VENDOR_READ_REQUEST 0x01       // dec 1
+#define PL2303_VENDOR_READ_NREQUEST 0x81      // dec 129
+
+#define PL2303_UART_STATE_INDEX 8
+#define PL2303_UART_STATE_MSR_MASK 0x8b
+#define PL2303_UART_STATE_TRANSIENT_MASK 0x74
+#define PL2303_UART_DCD 0x01
+#define PL2303_UART_DSR 0x02
+#define PL2303_UART_BREAK_ERROR 0x04
+#define PL2303_UART_RING 0x08
+#define PL2303_UART_FRAME_ERROR 0x10
+#define PL2303_UART_PARITY_ERROR 0x20
+#define PL2303_UART_OVERRUN_ERROR 0x40
+#define PL2303_UART_CTS 0x80
+
+#define PL2303_FLOWCTRL_MASK 0xf0
+
+#define PL2303_CLEAR_HALT_REQUEST_TYPE 0x02   // standard request host to device endpoint
+
+/* registers via vendor read/write requests */
+#define PL2303_READ_TYPE_HX_STATUS 0x8080
+
+#define PL2303_HXN_RESET_REG 0x07
+#define PL2303_HXN_RESET_UPSTREAM_PIPE 0x02
+#define PL2303_HXN_RESET_DOWNSTREAM_PIPE 0x01
+
+#define PL2303_HXN_FLOWCTRL_REG 0x0a
+#define PL2303_HXN_FLOWCTRL_MASK 0x1c
+#define PL2303_HXN_FLOWCTRL_NONE 0x1c
+#define PL2303_HXN_FLOWCTRL_RTS_CTS 0x18
+#define PL2303_HXN_FLOWCTRL_XON_XOFF 0x0c
+
+/* type data */
+enum pl2303_type {
+  TYPE_H,
+  TYPE_HX,
+  TYPE_TA,
+  TYPE_TB,
+  TYPE_HXD,
+  TYPE_HXN,
+  TYPE_COUNT
+};
+
+struct pl2303_type_data {
+  uint8_t const *name;
+  uint32_t const max_baud_rate;
+  uint8_t const quirks;
+  uint16_t const no_autoxonxoff:1;
+  uint16_t const no_divisors:1;
+  uint16_t const alt_divisors:1;
+};
+
+#define PL2303_TYPE_DATA \
+  [TYPE_H] = { \
+    .name = (uint8_t const*)"H", \
+    .max_baud_rate = 1228800, \
+    .quirks = PL2303_QUIRK_LEGACY, \
+    .no_autoxonxoff = true, \
+  }, \
+  [TYPE_HX] = { \
+    .name = (uint8_t const*)"HX", \
+    .max_baud_rate = 6000000, \
+  }, \
+  [TYPE_TA] = { \
+    .name = (uint8_t const*)"TA", \
+    .max_baud_rate = 6000000, \
+    .alt_divisors = true, \
+  }, \
+  [TYPE_TB] = { \
+    .name = (uint8_t const*)"TB", \
+    .max_baud_rate = 12000000, \
+    .alt_divisors = true, \
+  }, \
+  [TYPE_HXD] = { \
+    .name = (uint8_t const*)"HXD", \
+    .max_baud_rate = 12000000, \
+  }, \
+  [TYPE_HXN] = { \
+    .name = (uint8_t const*)"G (HXN)", \
+    .max_baud_rate = 12000000, \
+    .no_divisors = true, \
+  }
+
+/* private data types */
+struct pl2303_serial_private {
+  const struct pl2303_type_data* type;
+  uint8_t quirks;
+};
+
+typedef struct TU_ATTR_PACKED {
+  struct pl2303_serial_private serial_private;
+  bool supports_hx_status;
+} pl2303_private_t;
+
+/* buffer sizes for line coding data */
+#define PL2303_LINE_CODING_BUFSIZE 7
+#define PL2303_LINE_CODING_BAUDRATE_BUFSIZE 4
+
+/* bulk endpoints */
+#define PL2303_OUT_EP 0x02
+#define PL2303_IN_EP 0x83
+
+/* return values of pl2303_detect_type() */
+#define PL2303_SUPPORTS_HX_STATUS_TRIGGERED -1
+#define PL2303_DETECT_TYPE_FAILED -2
+
+#endif /* _PL2303_H_ */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 281341685..f023b490a 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -504,6 +504,24 @@
     { 0x9986, 0x7523 }  /* overtaken from Linux Kernel driver /drivers/usb/serial/ch341.c */
 #endif
 
+#ifndef CFG_TUH_CDC_PL2303
+  // PL2303 is not part of CDC class, only to re-use CDC driver API
+  #define CFG_TUH_CDC_PL2303 0
+#endif
+
+#ifndef CFG_TUH_CDC_PL2303_VID_PID_QUIRKS_LIST
+  // List of product IDs that can use the PL2303 CDC driver
+  #define CFG_TUH_CDC_PL2303_VID_PID_LIST \
+  { 0x067b, 0x2303 }, /* initial 2303 */ \
+  { 0x067b, 0x2304 }, /* TB */ \
+  { 0x067b, 0x23a3 }, /* GC */ \
+  { 0x067b, 0x23b3 }, /* GB */ \
+  { 0x067b, 0x23c3 }, /* GT */ \
+  { 0x067b, 0x23d3 }, /* GL */ \
+  { 0x067b, 0x23e3 }, /* GE */ \
+  { 0x067b, 0x23f3 }  /* GS */
+#endif
+
 #ifndef CFG_TUH_HID
   #define CFG_TUH_HID    0
 #endif
-- 
cgit v1.3.1


From ee92e582b38e36df53381f8c98a0be54c2caef3e Mon Sep 17 00:00:00 2001
From: IngHK <github@hkue.de>
Date: Sun, 3 Mar 2024 13:12:10 +0100
Subject: added defines CFG_TUH_CDC_DTR_CONTROL_ON_ENUM &
 CFG_TUH_CDC_RTS_CONTROL_ON_ENUM

---
 examples/host/cdc_msc_hid/src/tusb_config.h        |  4 +--
 .../host/cdc_msc_hid_freertos/src/tusb_config.h    |  4 +--
 src/class/cdc/cdc_host.c                           | 40 ++++++++++++++++------
 3 files changed, 34 insertions(+), 14 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index fc956c6d3..32a29bd4f 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -121,8 +121,8 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
-// DTR ( bit 0), RTS (bit 1)
-#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+#define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM true
+#define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM true
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index dd732c700..88b341e95 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -126,8 +126,8 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
-// DTR ( bit 0), RTS (bit 1)
-#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    0x03
+#define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM true
+#define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM true
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 86b874b1e..5b74d031d 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -63,6 +63,26 @@
 
 #define TU_ASSERT_COMPLETE(...) _GET_3RD_ARG(__VA_ARGS__, TU_ASSERT_COMPLETE_2ARGS, TU_ASSERT_COMPLETE_1ARGS, _dummy)(__VA_ARGS__)
 
+// handle line control defines
+#if defined(CFG_TUH_CDC_LINE_CONTROL_ON_ENUM) && \
+    (defined(CFG_TUH_CDC_DTR_CONTROL_ON_ENUM) || defined(CFG_TUH_CDC_RTS_CONTROL_ON_ENUM))
+  TU_VERIFY_STATIC(false, "Contradictory line control defines");
+#endif
+
+#ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+  #define LINE_CONTROL_ON_ENUM CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+#elif defined(CFG_TUH_CDC_DTR_CONTROL_ON_ENUM) || defined(CFG_TUH_CDC_RTS_CONTROL_ON_ENUM)
+  #ifndef CFG_TUH_CDC_DTR_CONTROL_ON_ENUM
+    #define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM 0
+  #endif
+  #ifndef CFG_TUH_CDC_RTS_CONTROL_ON_ENUM
+    #define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM 0
+  #endif
+  #define LINE_CONTROL_ON_ENUM ( ( CFG_TUH_CDC_DTR_CONTROL_ON_ENUM ? CDC_CONTROL_LINE_STATE_DTR : 0 ) | \
+                                 ( CFG_TUH_CDC_RTS_CONTROL_ON_ENUM ? CDC_CONTROL_LINE_STATE_RTS : 0 ) )
+#endif
+
+
 //--------------------------------------------------------------------+
 // Host CDC Interface
 //--------------------------------------------------------------------+
@@ -1057,9 +1077,9 @@ static void acm_process_config(tuh_xfer_t * xfer) {
 
   switch (state) {
     case CONFIG_ACM_SET_CONTROL_LINE_STATE:
-      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      #ifdef LINE_CONTROL_ON_ENUM
         if (p_cdc->acm_capability.support_line_request) {
-          p_cdc->requested_line_state.all = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+          p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
           TU_ASSERT_COMPLETE(acm_set_control_line_state(p_cdc, acm_process_config, CONFIG_ACM_SET_LINE_CODING), 1);
           break;
         }
@@ -1352,8 +1372,8 @@ static void ftdi_process_config(tuh_xfer_t * xfer) {
       break;
 
     case CONFIG_FTDI_MODEM_CTRL:
-      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+      #ifdef LINE_CONTROL_ON_ENUM
+        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
         TU_ASSERT_COMPLETE(ftdi_update_mctrl(p_cdc, ftdi_internal_control_complete, CONFIG_FTDI_COMPLETE));
         break;
       #else
@@ -1835,8 +1855,8 @@ static void cp210x_process_config(tuh_xfer_t * xfer) {
       #endif
 
     case CONFIG_CP210X_SET_DTR_RTS:
-      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+      #ifdef LINE_CONTROL_ON_ENUM
+        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
         TU_ASSERT_COMPLETE(cp210x_set_mhs(p_cdc, cp210x_internal_control_complete,
                                           CONFIG_CP210X_COMPLETE));
         break;
@@ -2117,8 +2137,8 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
       break;
 
     case CONFIG_CH34X_MODEM_CONTROL:
-      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+      #ifdef LINE_CONTROL_ON_ENUM
+        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
         TU_ASSERT_COMPLETE(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete,
                                                     CONFIG_CH34X_COMPLETE));
         break;
@@ -2662,8 +2682,8 @@ static void pl2303_process_config(tuh_xfer_t * xfer) {
       #endif
 
     case CONFIG_PL2303_MODEM_CONTROL:
-      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
+      #ifdef LINE_CONTROL_ON_ENUM
+        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
         TU_ASSERT_COMPLETE(pl2303_set_control_lines(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_FLOW_CTRL_READ));
         break;
       #else
-- 
cgit v1.3.1


From c8130afe9bb7365adc076c98059b869bfcaf2ecf Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Jan 2025 15:09:13 +0700
Subject: bump up cmake min to 3.20

---
 examples/CMakeLists.txt                                     | 2 +-
 examples/device/CMakeLists.txt                              | 2 +-
 examples/device/audio_4_channel_mic/CMakeLists.txt          | 2 +-
 examples/device/audio_4_channel_mic_freertos/CMakeLists.txt | 2 +-
 examples/device/audio_test/CMakeLists.txt                   | 2 +-
 examples/device/audio_test_freertos/CMakeLists.txt          | 2 +-
 examples/device/audio_test_multi_rate/CMakeLists.txt        | 2 +-
 examples/device/board_test/CMakeLists.txt                   | 2 +-
 examples/device/cdc_dual_ports/CMakeLists.txt               | 2 +-
 examples/device/cdc_msc/CMakeLists.txt                      | 2 +-
 examples/device/cdc_msc_freertos/CMakeLists.txt             | 2 +-
 examples/device/cdc_uac2/CMakeLists.txt                     | 2 +-
 examples/device/dfu/CMakeLists.txt                          | 2 +-
 examples/device/dfu_runtime/CMakeLists.txt                  | 2 +-
 examples/device/dynamic_configuration/CMakeLists.txt        | 2 +-
 examples/device/hid_boot_interface/CMakeLists.txt           | 2 +-
 examples/device/hid_composite/CMakeLists.txt                | 2 +-
 examples/device/hid_composite_freertos/CMakeLists.txt       | 2 +-
 examples/device/hid_generic_inout/CMakeLists.txt            | 2 +-
 examples/device/hid_multiple_interface/CMakeLists.txt       | 2 +-
 examples/device/midi_test/CMakeLists.txt                    | 2 +-
 examples/device/midi_test_freertos/CMakeLists.txt           | 2 +-
 examples/device/msc_dual_lun/CMakeLists.txt                 | 2 +-
 examples/device/net_lwip_webserver/CMakeLists.txt           | 2 +-
 examples/device/uac2_headset/CMakeLists.txt                 | 2 +-
 examples/device/uac2_speaker_fb/CMakeLists.txt              | 2 +-
 examples/device/usbtmc/CMakeLists.txt                       | 2 +-
 examples/device/video_capture/CMakeLists.txt                | 2 +-
 examples/device/video_capture_2ch/CMakeLists.txt            | 2 +-
 examples/device/webusb_serial/CMakeLists.txt                | 2 +-
 examples/dual/CMakeLists.txt                                | 2 +-
 examples/dual/host_hid_to_device_cdc/CMakeLists.txt         | 2 +-
 examples/dual/host_info_to_device_cdc/CMakeLists.txt        | 2 +-
 examples/host/CMakeLists.txt                                | 2 +-
 examples/host/bare_api/CMakeLists.txt                       | 2 +-
 examples/host/cdc_msc_hid/CMakeLists.txt                    | 2 +-
 examples/host/cdc_msc_hid_freertos/CMakeLists.txt           | 2 +-
 examples/host/device_info/CMakeLists.txt                    | 2 +-
 examples/host/hid_controller/CMakeLists.txt                 | 2 +-
 examples/host/msc_file_explorer/CMakeLists.txt              | 2 +-
 examples/typec/CMakeLists.txt                               | 2 +-
 examples/typec/power_delivery/CMakeLists.txt                | 2 +-
 pkg.yml                                                     | 2 +-
 src/CMakeLists.txt                                          | 2 +-
 44 files changed, 44 insertions(+), 44 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index c603d0c22..d34c6ed5d 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 #set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index 26a808a21..bb7dd0a0f 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index 0f5d36193..c8086ae46 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt b/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
index 285d4490b..c50d4fef7 100644
--- a/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index f61e1b640..6a7e68c3d 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/audio_test_freertos/CMakeLists.txt b/examples/device/audio_test_freertos/CMakeLists.txt
index 33f3b915f..6ce9e72fe 100644
--- a/examples/device/audio_test_freertos/CMakeLists.txt
+++ b/examples/device/audio_test_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index f61e1b640..6a7e68c3d 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 012eff095..837b4996a 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index f61e1b640..6a7e68c3d 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index c2f9cb095..fa7090807 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 #set_property(GLOBAL PROPERTY USE_FOLDERS ON)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index 32a9e2930..f7636a07a 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/cdc_uac2/CMakeLists.txt b/examples/device/cdc_uac2/CMakeLists.txt
index 64e4374e9..c8c797637 100644
--- a/examples/device/cdc_uac2/CMakeLists.txt
+++ b/examples/device/cdc_uac2/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/dfu/CMakeLists.txt
+++ b/examples/device/dfu/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/dfu_runtime/CMakeLists.txt
+++ b/examples/device/dfu_runtime/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt
index 2b20d2234..8a62d6ba2 100644
--- a/examples/device/dynamic_configuration/CMakeLists.txt
+++ b/examples/device/dynamic_configuration/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/hid_boot_interface/CMakeLists.txt
+++ b/examples/device/hid_boot_interface/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/hid_composite/CMakeLists.txt
+++ b/examples/device/hid_composite/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 33f3b915f..6ce9e72fe 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/hid_generic_inout/CMakeLists.txt
+++ b/examples/device/hid_generic_inout/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt
index a01eb3456..3da8ee3df 100644
--- a/examples/device/hid_multiple_interface/CMakeLists.txt
+++ b/examples/device/hid_multiple_interface/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt
index f61e1b640..6a7e68c3d 100644
--- a/examples/device/midi_test/CMakeLists.txt
+++ b/examples/device/midi_test/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/midi_test_freertos/CMakeLists.txt b/examples/device/midi_test_freertos/CMakeLists.txt
index 33f3b915f..6ce9e72fe 100644
--- a/examples/device/midi_test_freertos/CMakeLists.txt
+++ b/examples/device/midi_test_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt
index e69fead35..58a7bd30b 100644
--- a/examples/device/msc_dual_lun/CMakeLists.txt
+++ b/examples/device/msc_dual_lun/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 13923b583..87b92f4dc 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt
index e92a57148..ced98a909 100644
--- a/examples/device/uac2_headset/CMakeLists.txt
+++ b/examples/device/uac2_headset/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/uac2_speaker_fb/CMakeLists.txt b/examples/device/uac2_speaker_fb/CMakeLists.txt
index f40ca8716..0ed3db646 100644
--- a/examples/device/uac2_speaker_fb/CMakeLists.txt
+++ b/examples/device/uac2_speaker_fb/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt
index a63ca2d81..d2deb72d5 100644
--- a/examples/device/usbtmc/CMakeLists.txt
+++ b/examples/device/usbtmc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt
index 80dc39ca5..90788fa60 100644
--- a/examples/device/video_capture/CMakeLists.txt
+++ b/examples/device/video_capture/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/video_capture_2ch/CMakeLists.txt b/examples/device/video_capture_2ch/CMakeLists.txt
index 80dc39ca5..90788fa60 100644
--- a/examples/device/video_capture_2ch/CMakeLists.txt
+++ b/examples/device/video_capture_2ch/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt
index e92a57148..ced98a909 100644
--- a/examples/device/webusb_serial/CMakeLists.txt
+++ b/examples/device/webusb_serial/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt
index f11074e93..c5e3ffce4 100644
--- a/examples/dual/CMakeLists.txt
+++ b/examples/dual/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
index 54e36e3d3..6ae5b5766 100644
--- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/dual/host_info_to_device_cdc/CMakeLists.txt b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
index 54e36e3d3..6ae5b5766 100644
--- a/examples/dual/host_info_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/CMakeLists.txt b/examples/host/CMakeLists.txt
index 793f6ab08..175646830 100644
--- a/examples/host/CMakeLists.txt
+++ b/examples/host/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 76182d6fa..0efe84b60 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index a7c372a34..e8928cda5 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/cdc_msc_hid_freertos/CMakeLists.txt b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
index b4004f8d7..78b2784fe 100644
--- a/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/device_info/CMakeLists.txt b/examples/host/device_info/CMakeLists.txt
index 6a16155ec..33953233d 100644
--- a/examples/host/device_info/CMakeLists.txt
+++ b/examples/host/device_info/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index c1b500dd8..fb5faf210 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 1a57c7466..5ac75c04a 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/examples/typec/CMakeLists.txt b/examples/typec/CMakeLists.txt
index c7641494e..24c25908a 100644
--- a/examples/typec/CMakeLists.txt
+++ b/examples/typec/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../hw/bsp/family_support.cmake)
 
diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt
index 012eff095..837b4996a 100644
--- a/examples/typec/power_delivery/CMakeLists.txt
+++ b/examples/typec/power_delivery/CMakeLists.txt
@@ -1,4 +1,4 @@
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
diff --git a/pkg.yml b/pkg.yml
index 331445024..841307847 100644
--- a/pkg.yml
+++ b/pkg.yml
@@ -1,5 +1,5 @@
 pkg.name: tinyusb
-pkg.description: A silly USB stack for embedded
+pkg.description: An open source cross-platform USB stack for embedded system
 pkg.author: "Ha Thach <thach@tinyusb.org>"
 pkg.homepage: "https://github.com/hathach/tinyusb"
 pkg.keywords:
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index cf6878389..e8488166e 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -2,7 +2,7 @@
 # Usage: requires target tinyusb_config which expose tusb_config.h file
 # TINYUSB_TARGET_PREFIX and TINYUSB_TARGET_SUFFIX can be used to change the name of the target
 
-cmake_minimum_required(VERSION 3.17)
+cmake_minimum_required(VERSION 3.20)
 
 # Add tinyusb to a target, if user don't want to compile tinyusb as a library
 function(add_tinyusb TARGET)
-- 
cgit v1.3.1


From 09bce3532c9279b54f5dc1e48c51959344df6c56 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 9 Feb 2025 00:04:16 +0100
Subject: Add CMake presets.

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 .gitignore                                         |    8 +-
 examples/CMakePresets.json                         |    6 +
 examples/device/CMakePresets.json                  |    6 +
 .../device/audio_4_channel_mic/CMakePresets.json   |    6 +
 .../audio_4_channel_mic_freertos/CMakePresets.json |    6 +
 .../src/CMakePresets.json                          |    6 +
 examples/device/audio_test/CMakePresets.json       |    6 +
 .../device/audio_test_freertos/CMakePresets.json   |    6 +
 .../audio_test_freertos/src/CMakePresets.json      |    6 +
 .../device/audio_test_multi_rate/CMakePresets.json |    6 +
 examples/device/board_test/CMakePresets.json       |    6 +
 examples/device/board_test/src/CMakePresets.json   |    6 +
 examples/device/cdc_dual_ports/CMakePresets.json   |    6 +
 examples/device/cdc_msc/CMakePresets.json          |    6 +
 examples/device/cdc_msc_freertos/CMakePresets.json |    6 +
 .../device/cdc_msc_freertos/src/CMakePresets.json  |    6 +
 examples/device/cdc_uac2/CMakePresets.json         |    6 +
 examples/device/dfu/CMakePresets.json              |    6 +
 examples/device/dfu_runtime/CMakePresets.json      |    6 +
 .../device/dynamic_configuration/CMakePresets.json |    6 +
 .../device/hid_boot_interface/CMakePresets.json    |    6 +
 examples/device/hid_composite/CMakePresets.json    |    6 +
 .../hid_composite_freertos/CMakePresets.json       |    6 +
 .../hid_composite_freertos/src/CMakePresets.json   |    6 +
 .../device/hid_generic_inout/CMakePresets.json     |    6 +
 .../hid_multiple_interface/CMakePresets.json       |    6 +
 examples/device/midi_test/CMakePresets.json        |    6 +
 .../device/midi_test_freertos/CMakePresets.json    |    6 +
 .../midi_test_freertos/src/CMakePresets.json       |    6 +
 examples/device/msc_dual_lun/CMakePresets.json     |    6 +
 .../device/net_lwip_webserver/CMakePresets.json    |    6 +
 examples/device/uac2_headset/CMakePresets.json     |    6 +
 examples/device/uac2_speaker_fb/CMakePresets.json  |    6 +
 examples/device/usbtmc/CMakePresets.json           |    6 +
 examples/device/video_capture/CMakePresets.json    |    6 +
 .../device/video_capture/src/CMakePresets.json     |    6 +
 .../device/video_capture_2ch/CMakePresets.json     |    6 +
 .../device/video_capture_2ch/src/CMakePresets.json |    6 +
 examples/device/webusb_serial/CMakePresets.json    |    6 +
 examples/dual/CMakePresets.json                    |    6 +
 .../dual/host_hid_to_device_cdc/CMakePresets.json  |    6 +
 .../dual/host_info_to_device_cdc/CMakePresets.json |    6 +
 examples/host/CMakePresets.json                    |    6 +
 examples/host/bare_api/CMakePresets.json           |    6 +
 examples/host/cdc_msc_hid/CMakePresets.json        |    6 +
 .../host/cdc_msc_hid_freertos/CMakePresets.json    |    6 +
 .../cdc_msc_hid_freertos/src/CMakePresets.json     |    6 +
 examples/host/device_info/CMakePresets.json        |    6 +
 examples/host/device_info/src/CMakePresets.json    |    6 +
 examples/host/hid_controller/CMakePresets.json     |    6 +
 examples/host/msc_file_explorer/CMakePresets.json  |    6 +
 examples/typec/CMakePresets.json                   |    6 +
 examples/typec/power_delivery/CMakePresets.json    |    6 +
 hw/bsp/BoardPresets.json                           | 4002 ++++++++++++++++++++
 hw/bsp/family_support.cmake                        |    6 +-
 tools/gen_presets.py                               |   91 +
 56 files changed, 4417 insertions(+), 2 deletions(-)
 create mode 100644 examples/CMakePresets.json
 create mode 100644 examples/device/CMakePresets.json
 create mode 100644 examples/device/audio_4_channel_mic/CMakePresets.json
 create mode 100644 examples/device/audio_4_channel_mic_freertos/CMakePresets.json
 create mode 100644 examples/device/audio_4_channel_mic_freertos/src/CMakePresets.json
 create mode 100644 examples/device/audio_test/CMakePresets.json
 create mode 100644 examples/device/audio_test_freertos/CMakePresets.json
 create mode 100644 examples/device/audio_test_freertos/src/CMakePresets.json
 create mode 100644 examples/device/audio_test_multi_rate/CMakePresets.json
 create mode 100644 examples/device/board_test/CMakePresets.json
 create mode 100644 examples/device/board_test/src/CMakePresets.json
 create mode 100644 examples/device/cdc_dual_ports/CMakePresets.json
 create mode 100644 examples/device/cdc_msc/CMakePresets.json
 create mode 100644 examples/device/cdc_msc_freertos/CMakePresets.json
 create mode 100644 examples/device/cdc_msc_freertos/src/CMakePresets.json
 create mode 100644 examples/device/cdc_uac2/CMakePresets.json
 create mode 100644 examples/device/dfu/CMakePresets.json
 create mode 100644 examples/device/dfu_runtime/CMakePresets.json
 create mode 100644 examples/device/dynamic_configuration/CMakePresets.json
 create mode 100644 examples/device/hid_boot_interface/CMakePresets.json
 create mode 100644 examples/device/hid_composite/CMakePresets.json
 create mode 100644 examples/device/hid_composite_freertos/CMakePresets.json
 create mode 100644 examples/device/hid_composite_freertos/src/CMakePresets.json
 create mode 100644 examples/device/hid_generic_inout/CMakePresets.json
 create mode 100644 examples/device/hid_multiple_interface/CMakePresets.json
 create mode 100644 examples/device/midi_test/CMakePresets.json
 create mode 100644 examples/device/midi_test_freertos/CMakePresets.json
 create mode 100644 examples/device/midi_test_freertos/src/CMakePresets.json
 create mode 100644 examples/device/msc_dual_lun/CMakePresets.json
 create mode 100644 examples/device/net_lwip_webserver/CMakePresets.json
 create mode 100644 examples/device/uac2_headset/CMakePresets.json
 create mode 100644 examples/device/uac2_speaker_fb/CMakePresets.json
 create mode 100644 examples/device/usbtmc/CMakePresets.json
 create mode 100644 examples/device/video_capture/CMakePresets.json
 create mode 100644 examples/device/video_capture/src/CMakePresets.json
 create mode 100644 examples/device/video_capture_2ch/CMakePresets.json
 create mode 100644 examples/device/video_capture_2ch/src/CMakePresets.json
 create mode 100644 examples/device/webusb_serial/CMakePresets.json
 create mode 100644 examples/dual/CMakePresets.json
 create mode 100644 examples/dual/host_hid_to_device_cdc/CMakePresets.json
 create mode 100644 examples/dual/host_info_to_device_cdc/CMakePresets.json
 create mode 100644 examples/host/CMakePresets.json
 create mode 100644 examples/host/bare_api/CMakePresets.json
 create mode 100644 examples/host/cdc_msc_hid/CMakePresets.json
 create mode 100644 examples/host/cdc_msc_hid_freertos/CMakePresets.json
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/CMakePresets.json
 create mode 100644 examples/host/device_info/CMakePresets.json
 create mode 100644 examples/host/device_info/src/CMakePresets.json
 create mode 100644 examples/host/hid_controller/CMakePresets.json
 create mode 100644 examples/host/msc_file_explorer/CMakePresets.json
 create mode 100644 examples/typec/CMakePresets.json
 create mode 100644 examples/typec/power_delivery/CMakePresets.json
 create mode 100644 hw/bsp/BoardPresets.json
 create mode 100755 tools/gen_presets.py

(limited to 'examples/host/cdc_msc_hid')

diff --git a/.gitignore b/.gitignore
index 010b5c9ed..f981110b2 100644
--- a/.gitignore
+++ b/.gitignore
@@ -37,4 +37,10 @@ cmake-build-*
 sdkconfig
 .PVS-Studio
 .vscode/
-build/
+build
+CMakeFiles
+Debug
+RelWithDebInfo
+Release
+BrowseInfo
+.cmake_build
diff --git a/examples/CMakePresets.json b/examples/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/CMakePresets.json b/examples/device/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_4_channel_mic/CMakePresets.json b/examples/device/audio_4_channel_mic/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_4_channel_mic/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_4_channel_mic_freertos/CMakePresets.json b/examples/device/audio_4_channel_mic_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_4_channel_mic_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_4_channel_mic_freertos/src/CMakePresets.json b/examples/device/audio_4_channel_mic_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_4_channel_mic_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_test/CMakePresets.json b/examples/device/audio_test/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_test/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_test_freertos/CMakePresets.json b/examples/device/audio_test_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_test_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_test_freertos/src/CMakePresets.json b/examples/device/audio_test_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_test_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/audio_test_multi_rate/CMakePresets.json b/examples/device/audio_test_multi_rate/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/audio_test_multi_rate/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/board_test/CMakePresets.json b/examples/device/board_test/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/board_test/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/board_test/src/CMakePresets.json b/examples/device/board_test/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/board_test/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/cdc_dual_ports/CMakePresets.json b/examples/device/cdc_dual_ports/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_dual_ports/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/cdc_msc/CMakePresets.json b/examples/device/cdc_msc/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_msc/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/cdc_msc_freertos/CMakePresets.json b/examples/device/cdc_msc_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_msc_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/cdc_msc_freertos/src/CMakePresets.json b/examples/device/cdc_msc_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_msc_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/cdc_uac2/CMakePresets.json b/examples/device/cdc_uac2/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_uac2/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/dfu/CMakePresets.json b/examples/device/dfu/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/dfu/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/dfu_runtime/CMakePresets.json b/examples/device/dfu_runtime/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/dfu_runtime/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/dynamic_configuration/CMakePresets.json b/examples/device/dynamic_configuration/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/dynamic_configuration/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_boot_interface/CMakePresets.json b/examples/device/hid_boot_interface/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_boot_interface/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_composite/CMakePresets.json b/examples/device/hid_composite/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_composite/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_composite_freertos/CMakePresets.json b/examples/device/hid_composite_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_composite_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_composite_freertos/src/CMakePresets.json b/examples/device/hid_composite_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_composite_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_generic_inout/CMakePresets.json b/examples/device/hid_generic_inout/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_generic_inout/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/hid_multiple_interface/CMakePresets.json b/examples/device/hid_multiple_interface/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/hid_multiple_interface/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/midi_test/CMakePresets.json b/examples/device/midi_test/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/midi_test/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/midi_test_freertos/CMakePresets.json b/examples/device/midi_test_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/midi_test_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/midi_test_freertos/src/CMakePresets.json b/examples/device/midi_test_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/midi_test_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/msc_dual_lun/CMakePresets.json b/examples/device/msc_dual_lun/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/msc_dual_lun/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/net_lwip_webserver/CMakePresets.json b/examples/device/net_lwip_webserver/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/net_lwip_webserver/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/uac2_headset/CMakePresets.json b/examples/device/uac2_headset/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/uac2_headset/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/uac2_speaker_fb/CMakePresets.json b/examples/device/uac2_speaker_fb/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/uac2_speaker_fb/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/usbtmc/CMakePresets.json b/examples/device/usbtmc/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/usbtmc/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/video_capture/CMakePresets.json b/examples/device/video_capture/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/video_capture/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/video_capture/src/CMakePresets.json b/examples/device/video_capture/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/video_capture/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/video_capture_2ch/CMakePresets.json b/examples/device/video_capture_2ch/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/video_capture_2ch/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/video_capture_2ch/src/CMakePresets.json b/examples/device/video_capture_2ch/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/video_capture_2ch/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/webusb_serial/CMakePresets.json b/examples/device/webusb_serial/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/webusb_serial/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/dual/CMakePresets.json b/examples/dual/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/dual/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/dual/host_hid_to_device_cdc/CMakePresets.json b/examples/dual/host_hid_to_device_cdc/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/dual/host_hid_to_device_cdc/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/dual/host_info_to_device_cdc/CMakePresets.json b/examples/dual/host_info_to_device_cdc/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/dual/host_info_to_device_cdc/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/CMakePresets.json b/examples/host/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/bare_api/CMakePresets.json b/examples/host/bare_api/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/bare_api/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/cdc_msc_hid/CMakePresets.json b/examples/host/cdc_msc_hid/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/cdc_msc_hid/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/cdc_msc_hid_freertos/CMakePresets.json b/examples/host/cdc_msc_hid_freertos/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/cdc_msc_hid_freertos/src/CMakePresets.json b/examples/host/cdc_msc_hid_freertos/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/device_info/CMakePresets.json b/examples/host/device_info/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/device_info/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/device_info/src/CMakePresets.json b/examples/host/device_info/src/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/device_info/src/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/hid_controller/CMakePresets.json b/examples/host/hid_controller/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/hid_controller/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/host/msc_file_explorer/CMakePresets.json b/examples/host/msc_file_explorer/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/host/msc_file_explorer/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/typec/CMakePresets.json b/examples/typec/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/typec/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/typec/power_delivery/CMakePresets.json b/examples/typec/power_delivery/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/typec/power_delivery/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
new file mode 100644
index 000000000..c295efbdd
--- /dev/null
+++ b/hw/bsp/BoardPresets.json
@@ -0,0 +1,4002 @@
+{
+  "version": 6,
+  "configurePresets": [
+    {
+      "name": "default",
+      "hidden": true,
+      "description": "Configure preset for the ${presetName} board",
+      "generator": "Ninja",
+      "binaryDir": "${sourceDir}/build/${presetName}",
+      "cacheVariables": {
+        "CMAKE_BUILD_TYPE": "RelWithDebInfo",
+        "BOARD": "${presetName}"
+      }
+    },
+    {
+      "name": "raspberrypi_zero",
+      "inherits": "default"
+    },
+    {
+      "name": "raspberrypi_cm4",
+      "inherits": "default"
+    },
+    {
+      "name": "raspberrypi_zero2",
+      "inherits": "default"
+    },
+    {
+      "name": "ch32v103r_r1_1v0",
+      "inherits": "default"
+    },
+    {
+      "name": "ch32v203c_r0_1v0",
+      "inherits": "default"
+    },
+    {
+      "name": "ch32v203g_r0_1v0",
+      "inherits": "default"
+    },
+    {
+      "name": "nanoch32v203",
+      "inherits": "default"
+    },
+    {
+      "name": "ch32v307v_r1_1v0",
+      "inherits": "default"
+    },
+    {
+      "name": "da14695_dk_usb",
+      "inherits": "default"
+    },
+    {
+      "name": "da1469x_dk_pro",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_feather_esp32s2",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_feather_esp32s3",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_feather_esp32_v2",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_magtag_29gray",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_metro_esp32s2",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_addax_1",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_c3_devkitc",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_c6_devkitc",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_kaluga_1",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_p4_function_ev",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_s2_devkitc",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_s3_devkitc",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_s3_devkitm",
+      "inherits": "default"
+    },
+    {
+      "name": "espressif_saola_1",
+      "inherits": "default"
+    },
+    {
+      "name": "f1c100s",
+      "inherits": "default"
+    },
+    {
+      "name": "fomu",
+      "inherits": "default"
+    },
+    {
+      "name": "sipeed_longan_nano",
+      "inherits": "default"
+    },
+    {
+      "name": "metro_m7_1011",
+      "inherits": "default"
+    },
+    {
+      "name": "metro_m7_1011_sd",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1010_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1015_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1020_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1024_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1050_evkb",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1060_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1064_evk",
+      "inherits": "default"
+    },
+    {
+      "name": "mimxrt1170_evkb",
+      "inherits": "default"
+    },
+    {
+      "name": "teensy_40",
+      "inherits": "default"
+    },
+    {
+      "name": "teensy_41",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_k64f",
+      "inherits": "default"
+    },
+    {
+      "name": "teensy_35",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_k32l2a4s",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_k32l2b",
+      "inherits": "default"
+    },
+    {
+      "name": "kuiic",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_kl25z",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso11u37",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso11u68",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso1347",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso1549",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso1769",
+      "inherits": "default"
+    },
+    {
+      "name": "mbed1768",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso18s37",
+      "inherits": "default"
+    },
+    {
+      "name": "mcb1800",
+      "inherits": "default"
+    },
+    {
+      "name": "ea4088_quickstart",
+      "inherits": "default"
+    },
+    {
+      "name": "ea4357",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso43s67",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso51u68",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso54114",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso54608",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso54628",
+      "inherits": "default"
+    },
+    {
+      "name": "double_m33_express",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso55s28",
+      "inherits": "default"
+    },
+    {
+      "name": "lpcxpresso55s69",
+      "inherits": "default"
+    },
+    {
+      "name": "mcu_link",
+      "inherits": "default"
+    },
+    {
+      "name": "max32650evkit",
+      "inherits": "default"
+    },
+    {
+      "name": "max32650fthr",
+      "inherits": "default"
+    },
+    {
+      "name": "max32651evkit",
+      "inherits": "default"
+    },
+    {
+      "name": "max32666evkit",
+      "inherits": "default"
+    },
+    {
+      "name": "max32666fthr",
+      "inherits": "default"
+    },
+    {
+      "name": "apard32690",
+      "inherits": "default"
+    },
+    {
+      "name": "max32690evkit",
+      "inherits": "default"
+    },
+    {
+      "name": "max78002evkit",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_mcxa153",
+      "inherits": "default"
+    },
+    {
+      "name": "frdm_mcxn947",
+      "inherits": "default"
+    },
+    {
+      "name": "mcxn947brk",
+      "inherits": "default"
+    },
+    {
+      "name": "mm32f327x_mb39",
+      "inherits": "default"
+    },
+    {
+      "name": "mm32f327x_pitaya_lite",
+      "inherits": "default"
+    },
+    {
+      "name": "msp_exp430f5529lp",
+      "inherits": "default"
+    },
+    {
+      "name": "msp_exp432e401y",
+      "inherits": "default"
+    },
+    {
+      "name": "adafruit_clue",
+      "inherits": "default"
+    },
+    {
+      "name": "arduino_nano33_ble",
+      "inherits": "default"
+    },
+    {
+      "name": "circuitplayground_bluefruit",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_nrf52840_express",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_nrf52840_sense",
+      "inherits": "default"
+    },
+    {
+      "name": "itsybitsy_nrf52840",
+      "inherits": "default"
+    },
+    {
+      "name": "pca10056",
+      "inherits": "default"
+    },
+    {
+      "name": "pca10059",
+      "inherits": "default"
+    },
+    {
+      "name": "pca10095",
+      "inherits": "default"
+    },
+    {
+      "name": "pca10100",
+      "inherits": "default"
+    },
+    {
+      "name": "portenta_c33",
+      "inherits": "default"
+    },
+    {
+      "name": "ra2a1_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "ra4m1_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "ra4m3_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "ra6m1_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "ra6m5_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "ra8m1_ek",
+      "inherits": "default"
+    },
+    {
+      "name": "uno_r4",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_rp2040_max3421",
+      "inherits": "default"
+    },
+    {
+      "name": "pico_sdk",
+      "inherits": "default"
+    },
+    {
+      "name": "raspberry_pi_pico",
+      "inherits": "default"
+    },
+    {
+      "name": "raspberry_pi_pico2",
+      "inherits": "default"
+    },
+    {
+      "name": "cynthion_d11",
+      "inherits": "default"
+    },
+    {
+      "name": "samd11_xplained",
+      "inherits": "default"
+    },
+    {
+      "name": "atsamd21_xpro",
+      "inherits": "default"
+    },
+    {
+      "name": "circuitplayground_express",
+      "inherits": "default"
+    },
+    {
+      "name": "curiosity_nano",
+      "inherits": "default"
+    },
+    {
+      "name": "cynthion_d21",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_m0_express",
+      "inherits": "default"
+    },
+    {
+      "name": "itsybitsy_m0",
+      "inherits": "default"
+    },
+    {
+      "name": "metro_m0_express",
+      "inherits": "default"
+    },
+    {
+      "name": "qtpy",
+      "inherits": "default"
+    },
+    {
+      "name": "seeeduino_xiao",
+      "inherits": "default"
+    },
+    {
+      "name": "sparkfun_samd21_mini_usb",
+      "inherits": "default"
+    },
+    {
+      "name": "trinket_m0",
+      "inherits": "default"
+    },
+    {
+      "name": "d5035_01",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_m4_express",
+      "inherits": "default"
+    },
+    {
+      "name": "itsybitsy_m4",
+      "inherits": "default"
+    },
+    {
+      "name": "metro_m4_express",
+      "inherits": "default"
+    },
+    {
+      "name": "pybadge",
+      "inherits": "default"
+    },
+    {
+      "name": "pyportal",
+      "inherits": "default"
+    },
+    {
+      "name": "same54_xplained",
+      "inherits": "default"
+    },
+    {
+      "name": "samg55_xplained",
+      "inherits": "default"
+    },
+    {
+      "name": "atsaml21_xpro",
+      "inherits": "default"
+    },
+    {
+      "name": "saml22_feather",
+      "inherits": "default"
+    },
+    {
+      "name": "sensorwatch_m0",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32c071nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f070rbnucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f072disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f072eval",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f103ze_iar",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f103_bluepill",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f103_mini_2",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f207nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f303disco",
+      "inherits": "default"
+    },
+    {
+      "name": "feather_stm32f405",
+      "inherits": "default"
+    },
+    {
+      "name": "pyboardv11",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f401blackpill",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f407blackvet",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f407disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f411blackpill",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f411disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f412disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f412nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f439nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stlinkv3mini",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f723disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f746disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f746nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f767nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32f769disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32g0b1nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "b_g474e_dpow1",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32g474nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32g491nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h503nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h563nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h573i_dk",
+      "inherits": "default"
+    },
+    {
+      "name": "daisyseed",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h723nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h743eval",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h743nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h745disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h750bdk",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h750_weact",
+      "inherits": "default"
+    },
+    {
+      "name": "waveshare_openh743i",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32h7s3nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l052dap52",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l0538disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l412nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l476disco",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l4p5nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32l4r5nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "b_u585i_iot2a",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32u545nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32u575eval",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32u575nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32u5a5nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "stm32wb55nucleo",
+      "inherits": "default"
+    },
+    {
+      "name": "ek_tm4c123gxl",
+      "inherits": "default"
+    },
+    {
+      "name": "xmc4500_relax",
+      "inherits": "default"
+    },
+    {
+      "name": "xmc4700_relax",
+      "inherits": "default"
+    }
+  ],
+  "buildPresets": [
+    {
+      "name": "raspberrypi_zero",
+      "description": "Build preset for the raspberrypi_zero board",
+      "configurePreset": "raspberrypi_zero"
+    },
+    {
+      "name": "raspberrypi_cm4",
+      "description": "Build preset for the raspberrypi_cm4 board",
+      "configurePreset": "raspberrypi_cm4"
+    },
+    {
+      "name": "raspberrypi_zero2",
+      "description": "Build preset for the raspberrypi_zero2 board",
+      "configurePreset": "raspberrypi_zero2"
+    },
+    {
+      "name": "ch32v103r_r1_1v0",
+      "description": "Build preset for the ch32v103r_r1_1v0 board",
+      "configurePreset": "ch32v103r_r1_1v0"
+    },
+    {
+      "name": "ch32v203c_r0_1v0",
+      "description": "Build preset for the ch32v203c_r0_1v0 board",
+      "configurePreset": "ch32v203c_r0_1v0"
+    },
+    {
+      "name": "ch32v203g_r0_1v0",
+      "description": "Build preset for the ch32v203g_r0_1v0 board",
+      "configurePreset": "ch32v203g_r0_1v0"
+    },
+    {
+      "name": "nanoch32v203",
+      "description": "Build preset for the nanoch32v203 board",
+      "configurePreset": "nanoch32v203"
+    },
+    {
+      "name": "ch32v307v_r1_1v0",
+      "description": "Build preset for the ch32v307v_r1_1v0 board",
+      "configurePreset": "ch32v307v_r1_1v0"
+    },
+    {
+      "name": "da14695_dk_usb",
+      "description": "Build preset for the da14695_dk_usb board",
+      "configurePreset": "da14695_dk_usb"
+    },
+    {
+      "name": "da1469x_dk_pro",
+      "description": "Build preset for the da1469x_dk_pro board",
+      "configurePreset": "da1469x_dk_pro"
+    },
+    {
+      "name": "adafruit_feather_esp32s2",
+      "description": "Build preset for the adafruit_feather_esp32s2 board",
+      "configurePreset": "adafruit_feather_esp32s2"
+    },
+    {
+      "name": "adafruit_feather_esp32s3",
+      "description": "Build preset for the adafruit_feather_esp32s3 board",
+      "configurePreset": "adafruit_feather_esp32s3"
+    },
+    {
+      "name": "adafruit_feather_esp32_v2",
+      "description": "Build preset for the adafruit_feather_esp32_v2 board",
+      "configurePreset": "adafruit_feather_esp32_v2"
+    },
+    {
+      "name": "adafruit_magtag_29gray",
+      "description": "Build preset for the adafruit_magtag_29gray board",
+      "configurePreset": "adafruit_magtag_29gray"
+    },
+    {
+      "name": "adafruit_metro_esp32s2",
+      "description": "Build preset for the adafruit_metro_esp32s2 board",
+      "configurePreset": "adafruit_metro_esp32s2"
+    },
+    {
+      "name": "espressif_addax_1",
+      "description": "Build preset for the espressif_addax_1 board",
+      "configurePreset": "espressif_addax_1"
+    },
+    {
+      "name": "espressif_c3_devkitc",
+      "description": "Build preset for the espressif_c3_devkitc board",
+      "configurePreset": "espressif_c3_devkitc"
+    },
+    {
+      "name": "espressif_c6_devkitc",
+      "description": "Build preset for the espressif_c6_devkitc board",
+      "configurePreset": "espressif_c6_devkitc"
+    },
+    {
+      "name": "espressif_kaluga_1",
+      "description": "Build preset for the espressif_kaluga_1 board",
+      "configurePreset": "espressif_kaluga_1"
+    },
+    {
+      "name": "espressif_p4_function_ev",
+      "description": "Build preset for the espressif_p4_function_ev board",
+      "configurePreset": "espressif_p4_function_ev"
+    },
+    {
+      "name": "espressif_s2_devkitc",
+      "description": "Build preset for the espressif_s2_devkitc board",
+      "configurePreset": "espressif_s2_devkitc"
+    },
+    {
+      "name": "espressif_s3_devkitc",
+      "description": "Build preset for the espressif_s3_devkitc board",
+      "configurePreset": "espressif_s3_devkitc"
+    },
+    {
+      "name": "espressif_s3_devkitm",
+      "description": "Build preset for the espressif_s3_devkitm board",
+      "configurePreset": "espressif_s3_devkitm"
+    },
+    {
+      "name": "espressif_saola_1",
+      "description": "Build preset for the espressif_saola_1 board",
+      "configurePreset": "espressif_saola_1"
+    },
+    {
+      "name": "f1c100s",
+      "description": "Build preset for the f1c100s board",
+      "configurePreset": "f1c100s"
+    },
+    {
+      "name": "fomu",
+      "description": "Build preset for the fomu board",
+      "configurePreset": "fomu"
+    },
+    {
+      "name": "sipeed_longan_nano",
+      "description": "Build preset for the sipeed_longan_nano board",
+      "configurePreset": "sipeed_longan_nano"
+    },
+    {
+      "name": "metro_m7_1011",
+      "description": "Build preset for the metro_m7_1011 board",
+      "configurePreset": "metro_m7_1011"
+    },
+    {
+      "name": "metro_m7_1011_sd",
+      "description": "Build preset for the metro_m7_1011_sd board",
+      "configurePreset": "metro_m7_1011_sd"
+    },
+    {
+      "name": "mimxrt1010_evk",
+      "description": "Build preset for the mimxrt1010_evk board",
+      "configurePreset": "mimxrt1010_evk"
+    },
+    {
+      "name": "mimxrt1015_evk",
+      "description": "Build preset for the mimxrt1015_evk board",
+      "configurePreset": "mimxrt1015_evk"
+    },
+    {
+      "name": "mimxrt1020_evk",
+      "description": "Build preset for the mimxrt1020_evk board",
+      "configurePreset": "mimxrt1020_evk"
+    },
+    {
+      "name": "mimxrt1024_evk",
+      "description": "Build preset for the mimxrt1024_evk board",
+      "configurePreset": "mimxrt1024_evk"
+    },
+    {
+      "name": "mimxrt1050_evkb",
+      "description": "Build preset for the mimxrt1050_evkb board",
+      "configurePreset": "mimxrt1050_evkb"
+    },
+    {
+      "name": "mimxrt1060_evk",
+      "description": "Build preset for the mimxrt1060_evk board",
+      "configurePreset": "mimxrt1060_evk"
+    },
+    {
+      "name": "mimxrt1064_evk",
+      "description": "Build preset for the mimxrt1064_evk board",
+      "configurePreset": "mimxrt1064_evk"
+    },
+    {
+      "name": "mimxrt1170_evkb",
+      "description": "Build preset for the mimxrt1170_evkb board",
+      "configurePreset": "mimxrt1170_evkb"
+    },
+    {
+      "name": "teensy_40",
+      "description": "Build preset for the teensy_40 board",
+      "configurePreset": "teensy_40"
+    },
+    {
+      "name": "teensy_41",
+      "description": "Build preset for the teensy_41 board",
+      "configurePreset": "teensy_41"
+    },
+    {
+      "name": "frdm_k64f",
+      "description": "Build preset for the frdm_k64f board",
+      "configurePreset": "frdm_k64f"
+    },
+    {
+      "name": "teensy_35",
+      "description": "Build preset for the teensy_35 board",
+      "configurePreset": "teensy_35"
+    },
+    {
+      "name": "frdm_k32l2a4s",
+      "description": "Build preset for the frdm_k32l2a4s board",
+      "configurePreset": "frdm_k32l2a4s"
+    },
+    {
+      "name": "frdm_k32l2b",
+      "description": "Build preset for the frdm_k32l2b board",
+      "configurePreset": "frdm_k32l2b"
+    },
+    {
+      "name": "kuiic",
+      "description": "Build preset for the kuiic board",
+      "configurePreset": "kuiic"
+    },
+    {
+      "name": "frdm_kl25z",
+      "description": "Build preset for the frdm_kl25z board",
+      "configurePreset": "frdm_kl25z"
+    },
+    {
+      "name": "lpcxpresso11u37",
+      "description": "Build preset for the lpcxpresso11u37 board",
+      "configurePreset": "lpcxpresso11u37"
+    },
+    {
+      "name": "lpcxpresso11u68",
+      "description": "Build preset for the lpcxpresso11u68 board",
+      "configurePreset": "lpcxpresso11u68"
+    },
+    {
+      "name": "lpcxpresso1347",
+      "description": "Build preset for the lpcxpresso1347 board",
+      "configurePreset": "lpcxpresso1347"
+    },
+    {
+      "name": "lpcxpresso1549",
+      "description": "Build preset for the lpcxpresso1549 board",
+      "configurePreset": "lpcxpresso1549"
+    },
+    {
+      "name": "lpcxpresso1769",
+      "description": "Build preset for the lpcxpresso1769 board",
+      "configurePreset": "lpcxpresso1769"
+    },
+    {
+      "name": "mbed1768",
+      "description": "Build preset for the mbed1768 board",
+      "configurePreset": "mbed1768"
+    },
+    {
+      "name": "lpcxpresso18s37",
+      "description": "Build preset for the lpcxpresso18s37 board",
+      "configurePreset": "lpcxpresso18s37"
+    },
+    {
+      "name": "mcb1800",
+      "description": "Build preset for the mcb1800 board",
+      "configurePreset": "mcb1800"
+    },
+    {
+      "name": "ea4088_quickstart",
+      "description": "Build preset for the ea4088_quickstart board",
+      "configurePreset": "ea4088_quickstart"
+    },
+    {
+      "name": "ea4357",
+      "description": "Build preset for the ea4357 board",
+      "configurePreset": "ea4357"
+    },
+    {
+      "name": "lpcxpresso43s67",
+      "description": "Build preset for the lpcxpresso43s67 board",
+      "configurePreset": "lpcxpresso43s67"
+    },
+    {
+      "name": "lpcxpresso51u68",
+      "description": "Build preset for the lpcxpresso51u68 board",
+      "configurePreset": "lpcxpresso51u68"
+    },
+    {
+      "name": "lpcxpresso54114",
+      "description": "Build preset for the lpcxpresso54114 board",
+      "configurePreset": "lpcxpresso54114"
+    },
+    {
+      "name": "lpcxpresso54608",
+      "description": "Build preset for the lpcxpresso54608 board",
+      "configurePreset": "lpcxpresso54608"
+    },
+    {
+      "name": "lpcxpresso54628",
+      "description": "Build preset for the lpcxpresso54628 board",
+      "configurePreset": "lpcxpresso54628"
+    },
+    {
+      "name": "double_m33_express",
+      "description": "Build preset for the double_m33_express board",
+      "configurePreset": "double_m33_express"
+    },
+    {
+      "name": "lpcxpresso55s28",
+      "description": "Build preset for the lpcxpresso55s28 board",
+      "configurePreset": "lpcxpresso55s28"
+    },
+    {
+      "name": "lpcxpresso55s69",
+      "description": "Build preset for the lpcxpresso55s69 board",
+      "configurePreset": "lpcxpresso55s69"
+    },
+    {
+      "name": "mcu_link",
+      "description": "Build preset for the mcu_link board",
+      "configurePreset": "mcu_link"
+    },
+    {
+      "name": "max32650evkit",
+      "description": "Build preset for the max32650evkit board",
+      "configurePreset": "max32650evkit"
+    },
+    {
+      "name": "max32650fthr",
+      "description": "Build preset for the max32650fthr board",
+      "configurePreset": "max32650fthr"
+    },
+    {
+      "name": "max32651evkit",
+      "description": "Build preset for the max32651evkit board",
+      "configurePreset": "max32651evkit"
+    },
+    {
+      "name": "max32666evkit",
+      "description": "Build preset for the max32666evkit board",
+      "configurePreset": "max32666evkit"
+    },
+    {
+      "name": "max32666fthr",
+      "description": "Build preset for the max32666fthr board",
+      "configurePreset": "max32666fthr"
+    },
+    {
+      "name": "apard32690",
+      "description": "Build preset for the apard32690 board",
+      "configurePreset": "apard32690"
+    },
+    {
+      "name": "max32690evkit",
+      "description": "Build preset for the max32690evkit board",
+      "configurePreset": "max32690evkit"
+    },
+    {
+      "name": "max78002evkit",
+      "description": "Build preset for the max78002evkit board",
+      "configurePreset": "max78002evkit"
+    },
+    {
+      "name": "frdm_mcxa153",
+      "description": "Build preset for the frdm_mcxa153 board",
+      "configurePreset": "frdm_mcxa153"
+    },
+    {
+      "name": "frdm_mcxn947",
+      "description": "Build preset for the frdm_mcxn947 board",
+      "configurePreset": "frdm_mcxn947"
+    },
+    {
+      "name": "mcxn947brk",
+      "description": "Build preset for the mcxn947brk board",
+      "configurePreset": "mcxn947brk"
+    },
+    {
+      "name": "mm32f327x_mb39",
+      "description": "Build preset for the mm32f327x_mb39 board",
+      "configurePreset": "mm32f327x_mb39"
+    },
+    {
+      "name": "mm32f327x_pitaya_lite",
+      "description": "Build preset for the mm32f327x_pitaya_lite board",
+      "configurePreset": "mm32f327x_pitaya_lite"
+    },
+    {
+      "name": "msp_exp430f5529lp",
+      "description": "Build preset for the msp_exp430f5529lp board",
+      "configurePreset": "msp_exp430f5529lp"
+    },
+    {
+      "name": "msp_exp432e401y",
+      "description": "Build preset for the msp_exp432e401y board",
+      "configurePreset": "msp_exp432e401y"
+    },
+    {
+      "name": "adafruit_clue",
+      "description": "Build preset for the adafruit_clue board",
+      "configurePreset": "adafruit_clue"
+    },
+    {
+      "name": "arduino_nano33_ble",
+      "description": "Build preset for the arduino_nano33_ble board",
+      "configurePreset": "arduino_nano33_ble"
+    },
+    {
+      "name": "circuitplayground_bluefruit",
+      "description": "Build preset for the circuitplayground_bluefruit board",
+      "configurePreset": "circuitplayground_bluefruit"
+    },
+    {
+      "name": "feather_nrf52840_express",
+      "description": "Build preset for the feather_nrf52840_express board",
+      "configurePreset": "feather_nrf52840_express"
+    },
+    {
+      "name": "feather_nrf52840_sense",
+      "description": "Build preset for the feather_nrf52840_sense board",
+      "configurePreset": "feather_nrf52840_sense"
+    },
+    {
+      "name": "itsybitsy_nrf52840",
+      "description": "Build preset for the itsybitsy_nrf52840 board",
+      "configurePreset": "itsybitsy_nrf52840"
+    },
+    {
+      "name": "pca10056",
+      "description": "Build preset for the pca10056 board",
+      "configurePreset": "pca10056"
+    },
+    {
+      "name": "pca10059",
+      "description": "Build preset for the pca10059 board",
+      "configurePreset": "pca10059"
+    },
+    {
+      "name": "pca10095",
+      "description": "Build preset for the pca10095 board",
+      "configurePreset": "pca10095"
+    },
+    {
+      "name": "pca10100",
+      "description": "Build preset for the pca10100 board",
+      "configurePreset": "pca10100"
+    },
+    {
+      "name": "portenta_c33",
+      "description": "Build preset for the portenta_c33 board",
+      "configurePreset": "portenta_c33"
+    },
+    {
+      "name": "ra2a1_ek",
+      "description": "Build preset for the ra2a1_ek board",
+      "configurePreset": "ra2a1_ek"
+    },
+    {
+      "name": "ra4m1_ek",
+      "description": "Build preset for the ra4m1_ek board",
+      "configurePreset": "ra4m1_ek"
+    },
+    {
+      "name": "ra4m3_ek",
+      "description": "Build preset for the ra4m3_ek board",
+      "configurePreset": "ra4m3_ek"
+    },
+    {
+      "name": "ra6m1_ek",
+      "description": "Build preset for the ra6m1_ek board",
+      "configurePreset": "ra6m1_ek"
+    },
+    {
+      "name": "ra6m5_ek",
+      "description": "Build preset for the ra6m5_ek board",
+      "configurePreset": "ra6m5_ek"
+    },
+    {
+      "name": "ra8m1_ek",
+      "description": "Build preset for the ra8m1_ek board",
+      "configurePreset": "ra8m1_ek"
+    },
+    {
+      "name": "uno_r4",
+      "description": "Build preset for the uno_r4 board",
+      "configurePreset": "uno_r4"
+    },
+    {
+      "name": "feather_rp2040_max3421",
+      "description": "Build preset for the feather_rp2040_max3421 board",
+      "configurePreset": "feather_rp2040_max3421"
+    },
+    {
+      "name": "pico_sdk",
+      "description": "Build preset for the pico_sdk board",
+      "configurePreset": "pico_sdk"
+    },
+    {
+      "name": "raspberry_pi_pico",
+      "description": "Build preset for the raspberry_pi_pico board",
+      "configurePreset": "raspberry_pi_pico"
+    },
+    {
+      "name": "raspberry_pi_pico2",
+      "description": "Build preset for the raspberry_pi_pico2 board",
+      "configurePreset": "raspberry_pi_pico2"
+    },
+    {
+      "name": "cynthion_d11",
+      "description": "Build preset for the cynthion_d11 board",
+      "configurePreset": "cynthion_d11"
+    },
+    {
+      "name": "samd11_xplained",
+      "description": "Build preset for the samd11_xplained board",
+      "configurePreset": "samd11_xplained"
+    },
+    {
+      "name": "atsamd21_xpro",
+      "description": "Build preset for the atsamd21_xpro board",
+      "configurePreset": "atsamd21_xpro"
+    },
+    {
+      "name": "circuitplayground_express",
+      "description": "Build preset for the circuitplayground_express board",
+      "configurePreset": "circuitplayground_express"
+    },
+    {
+      "name": "curiosity_nano",
+      "description": "Build preset for the curiosity_nano board",
+      "configurePreset": "curiosity_nano"
+    },
+    {
+      "name": "cynthion_d21",
+      "description": "Build preset for the cynthion_d21 board",
+      "configurePreset": "cynthion_d21"
+    },
+    {
+      "name": "feather_m0_express",
+      "description": "Build preset for the feather_m0_express board",
+      "configurePreset": "feather_m0_express"
+    },
+    {
+      "name": "itsybitsy_m0",
+      "description": "Build preset for the itsybitsy_m0 board",
+      "configurePreset": "itsybitsy_m0"
+    },
+    {
+      "name": "metro_m0_express",
+      "description": "Build preset for the metro_m0_express board",
+      "configurePreset": "metro_m0_express"
+    },
+    {
+      "name": "qtpy",
+      "description": "Build preset for the qtpy board",
+      "configurePreset": "qtpy"
+    },
+    {
+      "name": "seeeduino_xiao",
+      "description": "Build preset for the seeeduino_xiao board",
+      "configurePreset": "seeeduino_xiao"
+    },
+    {
+      "name": "sparkfun_samd21_mini_usb",
+      "description": "Build preset for the sparkfun_samd21_mini_usb board",
+      "configurePreset": "sparkfun_samd21_mini_usb"
+    },
+    {
+      "name": "trinket_m0",
+      "description": "Build preset for the trinket_m0 board",
+      "configurePreset": "trinket_m0"
+    },
+    {
+      "name": "d5035_01",
+      "description": "Build preset for the d5035_01 board",
+      "configurePreset": "d5035_01"
+    },
+    {
+      "name": "feather_m4_express",
+      "description": "Build preset for the feather_m4_express board",
+      "configurePreset": "feather_m4_express"
+    },
+    {
+      "name": "itsybitsy_m4",
+      "description": "Build preset for the itsybitsy_m4 board",
+      "configurePreset": "itsybitsy_m4"
+    },
+    {
+      "name": "metro_m4_express",
+      "description": "Build preset for the metro_m4_express board",
+      "configurePreset": "metro_m4_express"
+    },
+    {
+      "name": "pybadge",
+      "description": "Build preset for the pybadge board",
+      "configurePreset": "pybadge"
+    },
+    {
+      "name": "pyportal",
+      "description": "Build preset for the pyportal board",
+      "configurePreset": "pyportal"
+    },
+    {
+      "name": "same54_xplained",
+      "description": "Build preset for the same54_xplained board",
+      "configurePreset": "same54_xplained"
+    },
+    {
+      "name": "samg55_xplained",
+      "description": "Build preset for the samg55_xplained board",
+      "configurePreset": "samg55_xplained"
+    },
+    {
+      "name": "atsaml21_xpro",
+      "description": "Build preset for the atsaml21_xpro board",
+      "configurePreset": "atsaml21_xpro"
+    },
+    {
+      "name": "saml22_feather",
+      "description": "Build preset for the saml22_feather board",
+      "configurePreset": "saml22_feather"
+    },
+    {
+      "name": "sensorwatch_m0",
+      "description": "Build preset for the sensorwatch_m0 board",
+      "configurePreset": "sensorwatch_m0"
+    },
+    {
+      "name": "stm32c071nucleo",
+      "description": "Build preset for the stm32c071nucleo board",
+      "configurePreset": "stm32c071nucleo"
+    },
+    {
+      "name": "stm32f070rbnucleo",
+      "description": "Build preset for the stm32f070rbnucleo board",
+      "configurePreset": "stm32f070rbnucleo"
+    },
+    {
+      "name": "stm32f072disco",
+      "description": "Build preset for the stm32f072disco board",
+      "configurePreset": "stm32f072disco"
+    },
+    {
+      "name": "stm32f072eval",
+      "description": "Build preset for the stm32f072eval board",
+      "configurePreset": "stm32f072eval"
+    },
+    {
+      "name": "stm32f103ze_iar",
+      "description": "Build preset for the stm32f103ze_iar board",
+      "configurePreset": "stm32f103ze_iar"
+    },
+    {
+      "name": "stm32f103_bluepill",
+      "description": "Build preset for the stm32f103_bluepill board",
+      "configurePreset": "stm32f103_bluepill"
+    },
+    {
+      "name": "stm32f103_mini_2",
+      "description": "Build preset for the stm32f103_mini_2 board",
+      "configurePreset": "stm32f103_mini_2"
+    },
+    {
+      "name": "stm32f207nucleo",
+      "description": "Build preset for the stm32f207nucleo board",
+      "configurePreset": "stm32f207nucleo"
+    },
+    {
+      "name": "stm32f303disco",
+      "description": "Build preset for the stm32f303disco board",
+      "configurePreset": "stm32f303disco"
+    },
+    {
+      "name": "feather_stm32f405",
+      "description": "Build preset for the feather_stm32f405 board",
+      "configurePreset": "feather_stm32f405"
+    },
+    {
+      "name": "pyboardv11",
+      "description": "Build preset for the pyboardv11 board",
+      "configurePreset": "pyboardv11"
+    },
+    {
+      "name": "stm32f401blackpill",
+      "description": "Build preset for the stm32f401blackpill board",
+      "configurePreset": "stm32f401blackpill"
+    },
+    {
+      "name": "stm32f407blackvet",
+      "description": "Build preset for the stm32f407blackvet board",
+      "configurePreset": "stm32f407blackvet"
+    },
+    {
+      "name": "stm32f407disco",
+      "description": "Build preset for the stm32f407disco board",
+      "configurePreset": "stm32f407disco"
+    },
+    {
+      "name": "stm32f411blackpill",
+      "description": "Build preset for the stm32f411blackpill board",
+      "configurePreset": "stm32f411blackpill"
+    },
+    {
+      "name": "stm32f411disco",
+      "description": "Build preset for the stm32f411disco board",
+      "configurePreset": "stm32f411disco"
+    },
+    {
+      "name": "stm32f412disco",
+      "description": "Build preset for the stm32f412disco board",
+      "configurePreset": "stm32f412disco"
+    },
+    {
+      "name": "stm32f412nucleo",
+      "description": "Build preset for the stm32f412nucleo board",
+      "configurePreset": "stm32f412nucleo"
+    },
+    {
+      "name": "stm32f439nucleo",
+      "description": "Build preset for the stm32f439nucleo board",
+      "configurePreset": "stm32f439nucleo"
+    },
+    {
+      "name": "stlinkv3mini",
+      "description": "Build preset for the stlinkv3mini board",
+      "configurePreset": "stlinkv3mini"
+    },
+    {
+      "name": "stm32f723disco",
+      "description": "Build preset for the stm32f723disco board",
+      "configurePreset": "stm32f723disco"
+    },
+    {
+      "name": "stm32f746disco",
+      "description": "Build preset for the stm32f746disco board",
+      "configurePreset": "stm32f746disco"
+    },
+    {
+      "name": "stm32f746nucleo",
+      "description": "Build preset for the stm32f746nucleo board",
+      "configurePreset": "stm32f746nucleo"
+    },
+    {
+      "name": "stm32f767nucleo",
+      "description": "Build preset for the stm32f767nucleo board",
+      "configurePreset": "stm32f767nucleo"
+    },
+    {
+      "name": "stm32f769disco",
+      "description": "Build preset for the stm32f769disco board",
+      "configurePreset": "stm32f769disco"
+    },
+    {
+      "name": "stm32g0b1nucleo",
+      "description": "Build preset for the stm32g0b1nucleo board",
+      "configurePreset": "stm32g0b1nucleo"
+    },
+    {
+      "name": "b_g474e_dpow1",
+      "description": "Build preset for the b_g474e_dpow1 board",
+      "configurePreset": "b_g474e_dpow1"
+    },
+    {
+      "name": "stm32g474nucleo",
+      "description": "Build preset for the stm32g474nucleo board",
+      "configurePreset": "stm32g474nucleo"
+    },
+    {
+      "name": "stm32g491nucleo",
+      "description": "Build preset for the stm32g491nucleo board",
+      "configurePreset": "stm32g491nucleo"
+    },
+    {
+      "name": "stm32h503nucleo",
+      "description": "Build preset for the stm32h503nucleo board",
+      "configurePreset": "stm32h503nucleo"
+    },
+    {
+      "name": "stm32h563nucleo",
+      "description": "Build preset for the stm32h563nucleo board",
+      "configurePreset": "stm32h563nucleo"
+    },
+    {
+      "name": "stm32h573i_dk",
+      "description": "Build preset for the stm32h573i_dk board",
+      "configurePreset": "stm32h573i_dk"
+    },
+    {
+      "name": "daisyseed",
+      "description": "Build preset for the daisyseed board",
+      "configurePreset": "daisyseed"
+    },
+    {
+      "name": "stm32h723nucleo",
+      "description": "Build preset for the stm32h723nucleo board",
+      "configurePreset": "stm32h723nucleo"
+    },
+    {
+      "name": "stm32h743eval",
+      "description": "Build preset for the stm32h743eval board",
+      "configurePreset": "stm32h743eval"
+    },
+    {
+      "name": "stm32h743nucleo",
+      "description": "Build preset for the stm32h743nucleo board",
+      "configurePreset": "stm32h743nucleo"
+    },
+    {
+      "name": "stm32h745disco",
+      "description": "Build preset for the stm32h745disco board",
+      "configurePreset": "stm32h745disco"
+    },
+    {
+      "name": "stm32h750bdk",
+      "description": "Build preset for the stm32h750bdk board",
+      "configurePreset": "stm32h750bdk"
+    },
+    {
+      "name": "stm32h750_weact",
+      "description": "Build preset for the stm32h750_weact board",
+      "configurePreset": "stm32h750_weact"
+    },
+    {
+      "name": "waveshare_openh743i",
+      "description": "Build preset for the waveshare_openh743i board",
+      "configurePreset": "waveshare_openh743i"
+    },
+    {
+      "name": "stm32h7s3nucleo",
+      "description": "Build preset for the stm32h7s3nucleo board",
+      "configurePreset": "stm32h7s3nucleo"
+    },
+    {
+      "name": "stm32l052dap52",
+      "description": "Build preset for the stm32l052dap52 board",
+      "configurePreset": "stm32l052dap52"
+    },
+    {
+      "name": "stm32l0538disco",
+      "description": "Build preset for the stm32l0538disco board",
+      "configurePreset": "stm32l0538disco"
+    },
+    {
+      "name": "stm32l412nucleo",
+      "description": "Build preset for the stm32l412nucleo board",
+      "configurePreset": "stm32l412nucleo"
+    },
+    {
+      "name": "stm32l476disco",
+      "description": "Build preset for the stm32l476disco board",
+      "configurePreset": "stm32l476disco"
+    },
+    {
+      "name": "stm32l4p5nucleo",
+      "description": "Build preset for the stm32l4p5nucleo board",
+      "configurePreset": "stm32l4p5nucleo"
+    },
+    {
+      "name": "stm32l4r5nucleo",
+      "description": "Build preset for the stm32l4r5nucleo board",
+      "configurePreset": "stm32l4r5nucleo"
+    },
+    {
+      "name": "b_u585i_iot2a",
+      "description": "Build preset for the b_u585i_iot2a board",
+      "configurePreset": "b_u585i_iot2a"
+    },
+    {
+      "name": "stm32u545nucleo",
+      "description": "Build preset for the stm32u545nucleo board",
+      "configurePreset": "stm32u545nucleo"
+    },
+    {
+      "name": "stm32u575eval",
+      "description": "Build preset for the stm32u575eval board",
+      "configurePreset": "stm32u575eval"
+    },
+    {
+      "name": "stm32u575nucleo",
+      "description": "Build preset for the stm32u575nucleo board",
+      "configurePreset": "stm32u575nucleo"
+    },
+    {
+      "name": "stm32u5a5nucleo",
+      "description": "Build preset for the stm32u5a5nucleo board",
+      "configurePreset": "stm32u5a5nucleo"
+    },
+    {
+      "name": "stm32wb55nucleo",
+      "description": "Build preset for the stm32wb55nucleo board",
+      "configurePreset": "stm32wb55nucleo"
+    },
+    {
+      "name": "ek_tm4c123gxl",
+      "description": "Build preset for the ek_tm4c123gxl board",
+      "configurePreset": "ek_tm4c123gxl"
+    },
+    {
+      "name": "xmc4500_relax",
+      "description": "Build preset for the xmc4500_relax board",
+      "configurePreset": "xmc4500_relax"
+    },
+    {
+      "name": "xmc4700_relax",
+      "description": "Build preset for the xmc4700_relax board",
+      "configurePreset": "xmc4700_relax"
+    }
+  ],
+  "workflowPresets": [
+    {
+      "name": "raspberrypi_zero",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "raspberrypi_zero"
+        },
+        {
+          "type": "build",
+          "name": "raspberrypi_zero"
+        }
+      ]
+    },
+    {
+      "name": "raspberrypi_cm4",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "raspberrypi_cm4"
+        },
+        {
+          "type": "build",
+          "name": "raspberrypi_cm4"
+        }
+      ]
+    },
+    {
+      "name": "raspberrypi_zero2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "raspberrypi_zero2"
+        },
+        {
+          "type": "build",
+          "name": "raspberrypi_zero2"
+        }
+      ]
+    },
+    {
+      "name": "ch32v103r_r1_1v0",
+      "steps": [
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+          "type": "configure",
+          "name": "ch32v103r_r1_1v0"
+        },
+        {
+          "type": "build",
+          "name": "ch32v103r_r1_1v0"
+        }
+      ]
+    },
+    {
+      "name": "ch32v203c_r0_1v0",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ch32v203c_r0_1v0"
+        },
+        {
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+          "name": "ch32v203c_r0_1v0"
+        }
+      ]
+    },
+    {
+      "name": "ch32v203g_r0_1v0",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ch32v203g_r0_1v0"
+        },
+        {
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+          "name": "ch32v203g_r0_1v0"
+        }
+      ]
+    },
+    {
+      "name": "nanoch32v203",
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+          "name": "nanoch32v203"
+        },
+        {
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+          "name": "nanoch32v203"
+        }
+      ]
+    },
+    {
+      "name": "ch32v307v_r1_1v0",
+      "steps": [
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+          "type": "configure",
+          "name": "ch32v307v_r1_1v0"
+        },
+        {
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+          "name": "ch32v307v_r1_1v0"
+        }
+      ]
+    },
+    {
+      "name": "da14695_dk_usb",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "da14695_dk_usb"
+        },
+        {
+          "type": "build",
+          "name": "da14695_dk_usb"
+        }
+      ]
+    },
+    {
+      "name": "da1469x_dk_pro",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "da1469x_dk_pro"
+        },
+        {
+          "type": "build",
+          "name": "da1469x_dk_pro"
+        }
+      ]
+    },
+    {
+      "name": "adafruit_feather_esp32s2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "adafruit_feather_esp32s2"
+        },
+        {
+          "type": "build",
+          "name": "adafruit_feather_esp32s2"
+        }
+      ]
+    },
+    {
+      "name": "adafruit_feather_esp32s3",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "adafruit_feather_esp32s3"
+        },
+        {
+          "type": "build",
+          "name": "adafruit_feather_esp32s3"
+        }
+      ]
+    },
+    {
+      "name": "adafruit_feather_esp32_v2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "adafruit_feather_esp32_v2"
+        },
+        {
+          "type": "build",
+          "name": "adafruit_feather_esp32_v2"
+        }
+      ]
+    },
+    {
+      "name": "adafruit_magtag_29gray",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "adafruit_magtag_29gray"
+        },
+        {
+          "type": "build",
+          "name": "adafruit_magtag_29gray"
+        }
+      ]
+    },
+    {
+      "name": "adafruit_metro_esp32s2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "adafruit_metro_esp32s2"
+        },
+        {
+          "type": "build",
+          "name": "adafruit_metro_esp32s2"
+        }
+      ]
+    },
+    {
+      "name": "espressif_addax_1",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_addax_1"
+        },
+        {
+          "type": "build",
+          "name": "espressif_addax_1"
+        }
+      ]
+    },
+    {
+      "name": "espressif_c3_devkitc",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_c3_devkitc"
+        },
+        {
+          "type": "build",
+          "name": "espressif_c3_devkitc"
+        }
+      ]
+    },
+    {
+      "name": "espressif_c6_devkitc",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_c6_devkitc"
+        },
+        {
+          "type": "build",
+          "name": "espressif_c6_devkitc"
+        }
+      ]
+    },
+    {
+      "name": "espressif_kaluga_1",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_kaluga_1"
+        },
+        {
+          "type": "build",
+          "name": "espressif_kaluga_1"
+        }
+      ]
+    },
+    {
+      "name": "espressif_p4_function_ev",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_p4_function_ev"
+        },
+        {
+          "type": "build",
+          "name": "espressif_p4_function_ev"
+        }
+      ]
+    },
+    {
+      "name": "espressif_s2_devkitc",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_s2_devkitc"
+        },
+        {
+          "type": "build",
+          "name": "espressif_s2_devkitc"
+        }
+      ]
+    },
+    {
+      "name": "espressif_s3_devkitc",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_s3_devkitc"
+        },
+        {
+          "type": "build",
+          "name": "espressif_s3_devkitc"
+        }
+      ]
+    },
+    {
+      "name": "espressif_s3_devkitm",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_s3_devkitm"
+        },
+        {
+          "type": "build",
+          "name": "espressif_s3_devkitm"
+        }
+      ]
+    },
+    {
+      "name": "espressif_saola_1",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "espressif_saola_1"
+        },
+        {
+          "type": "build",
+          "name": "espressif_saola_1"
+        }
+      ]
+    },
+    {
+      "name": "f1c100s",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "f1c100s"
+        },
+        {
+          "type": "build",
+          "name": "f1c100s"
+        }
+      ]
+    },
+    {
+      "name": "fomu",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "fomu"
+        },
+        {
+          "type": "build",
+          "name": "fomu"
+        }
+      ]
+    },
+    {
+      "name": "sipeed_longan_nano",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "sipeed_longan_nano"
+        },
+        {
+          "type": "build",
+          "name": "sipeed_longan_nano"
+        }
+      ]
+    },
+    {
+      "name": "metro_m7_1011",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "metro_m7_1011"
+        },
+        {
+          "type": "build",
+          "name": "metro_m7_1011"
+        }
+      ]
+    },
+    {
+      "name": "metro_m7_1011_sd",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "metro_m7_1011_sd"
+        },
+        {
+          "type": "build",
+          "name": "metro_m7_1011_sd"
+        }
+      ]
+    },
+    {
+      "name": "mimxrt1010_evk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "mimxrt1010_evk"
+        },
+        {
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+          "name": "mimxrt1010_evk"
+        }
+      ]
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+          "name": "mimxrt1015_evk"
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+          "name": "mimxrt1015_evk"
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+      ]
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+          "name": "mimxrt1020_evk"
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+          "name": "mimxrt1024_evk"
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+      "name": "mimxrt1050_evkb",
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+          "name": "mimxrt1050_evkb"
+        },
+        {
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+          "name": "mimxrt1050_evkb"
+        }
+      ]
+    },
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+      "name": "mimxrt1060_evk",
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+          "name": "mimxrt1060_evk"
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+          "name": "mimxrt1060_evk"
+        }
+      ]
+    },
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+      "name": "mimxrt1064_evk",
+      "steps": [
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+          "name": "mimxrt1064_evk"
+        },
+        {
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+          "name": "mimxrt1064_evk"
+        }
+      ]
+    },
+    {
+      "name": "mimxrt1170_evkb",
+      "steps": [
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+          "type": "configure",
+          "name": "mimxrt1170_evkb"
+        },
+        {
+          "type": "build",
+          "name": "mimxrt1170_evkb"
+        }
+      ]
+    },
+    {
+      "name": "teensy_40",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "teensy_40"
+        },
+        {
+          "type": "build",
+          "name": "teensy_40"
+        }
+      ]
+    },
+    {
+      "name": "teensy_41",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "teensy_41"
+        },
+        {
+          "type": "build",
+          "name": "teensy_41"
+        }
+      ]
+    },
+    {
+      "name": "frdm_k64f",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "frdm_k64f"
+        },
+        {
+          "type": "build",
+          "name": "frdm_k64f"
+        }
+      ]
+    },
+    {
+      "name": "teensy_35",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "teensy_35"
+        },
+        {
+          "type": "build",
+          "name": "teensy_35"
+        }
+      ]
+    },
+    {
+      "name": "frdm_k32l2a4s",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "frdm_k32l2a4s"
+        },
+        {
+          "type": "build",
+          "name": "frdm_k32l2a4s"
+        }
+      ]
+    },
+    {
+      "name": "frdm_k32l2b",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "frdm_k32l2b"
+        },
+        {
+          "type": "build",
+          "name": "frdm_k32l2b"
+        }
+      ]
+    },
+    {
+      "name": "kuiic",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "kuiic"
+        },
+        {
+          "type": "build",
+          "name": "kuiic"
+        }
+      ]
+    },
+    {
+      "name": "frdm_kl25z",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "frdm_kl25z"
+        },
+        {
+          "type": "build",
+          "name": "frdm_kl25z"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso11u37",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso11u37"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso11u37"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso11u68",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso11u68"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso11u68"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso1347",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso1347"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso1347"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso1549",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso1549"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso1549"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso1769",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso1769"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso1769"
+        }
+      ]
+    },
+    {
+      "name": "mbed1768",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "mbed1768"
+        },
+        {
+          "type": "build",
+          "name": "mbed1768"
+        }
+      ]
+    },
+    {
+      "name": "lpcxpresso18s37",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "lpcxpresso18s37"
+        },
+        {
+          "type": "build",
+          "name": "lpcxpresso18s37"
+        }
+      ]
+    },
+    {
+      "name": "mcb1800",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "mcb1800"
+        },
+        {
+          "type": "build",
+          "name": "mcb1800"
+        }
+      ]
+    },
+    {
+      "name": "ea4088_quickstart",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ea4088_quickstart"
+        },
+        {
+          "type": "build",
+          "name": "ea4088_quickstart"
+        }
+      ]
+    },
+    {
+      "name": "ea4357",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ea4357"
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+        },
+        {
+          "type": "build",
+          "name": "stm32f103ze_iar"
+        }
+      ]
+    },
+    {
+      "name": "stm32f103_bluepill",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f103_bluepill"
+        },
+        {
+          "type": "build",
+          "name": "stm32f103_bluepill"
+        }
+      ]
+    },
+    {
+      "name": "stm32f103_mini_2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f103_mini_2"
+        },
+        {
+          "type": "build",
+          "name": "stm32f103_mini_2"
+        }
+      ]
+    },
+    {
+      "name": "stm32f207nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f207nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32f207nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32f303disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f303disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f303disco"
+        }
+      ]
+    },
+    {
+      "name": "feather_stm32f405",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "feather_stm32f405"
+        },
+        {
+          "type": "build",
+          "name": "feather_stm32f405"
+        }
+      ]
+    },
+    {
+      "name": "pyboardv11",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "pyboardv11"
+        },
+        {
+          "type": "build",
+          "name": "pyboardv11"
+        }
+      ]
+    },
+    {
+      "name": "stm32f401blackpill",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f401blackpill"
+        },
+        {
+          "type": "build",
+          "name": "stm32f401blackpill"
+        }
+      ]
+    },
+    {
+      "name": "stm32f407blackvet",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f407blackvet"
+        },
+        {
+          "type": "build",
+          "name": "stm32f407blackvet"
+        }
+      ]
+    },
+    {
+      "name": "stm32f407disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f407disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f407disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32f411blackpill",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f411blackpill"
+        },
+        {
+          "type": "build",
+          "name": "stm32f411blackpill"
+        }
+      ]
+    },
+    {
+      "name": "stm32f411disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f411disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f411disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32f412disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f412disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f412disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32f412nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f412nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32f412nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32f439nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f439nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32f439nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stlinkv3mini",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stlinkv3mini"
+        },
+        {
+          "type": "build",
+          "name": "stlinkv3mini"
+        }
+      ]
+    },
+    {
+      "name": "stm32f723disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f723disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f723disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32f746disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f746disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f746disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32f746nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f746nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32f746nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32f767nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f767nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32f767nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32f769disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32f769disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32f769disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32g0b1nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32g0b1nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32g0b1nucleo"
+        }
+      ]
+    },
+    {
+      "name": "b_g474e_dpow1",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "b_g474e_dpow1"
+        },
+        {
+          "type": "build",
+          "name": "b_g474e_dpow1"
+        }
+      ]
+    },
+    {
+      "name": "stm32g474nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32g474nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32g474nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32g491nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32g491nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32g491nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32h503nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h503nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32h503nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32h563nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h563nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32h563nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32h573i_dk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h573i_dk"
+        },
+        {
+          "type": "build",
+          "name": "stm32h573i_dk"
+        }
+      ]
+    },
+    {
+      "name": "daisyseed",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "daisyseed"
+        },
+        {
+          "type": "build",
+          "name": "daisyseed"
+        }
+      ]
+    },
+    {
+      "name": "stm32h723nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h723nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32h723nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32h743eval",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h743eval"
+        },
+        {
+          "type": "build",
+          "name": "stm32h743eval"
+        }
+      ]
+    },
+    {
+      "name": "stm32h743nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h743nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32h743nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32h745disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h745disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32h745disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32h750bdk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h750bdk"
+        },
+        {
+          "type": "build",
+          "name": "stm32h750bdk"
+        }
+      ]
+    },
+    {
+      "name": "stm32h750_weact",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h750_weact"
+        },
+        {
+          "type": "build",
+          "name": "stm32h750_weact"
+        }
+      ]
+    },
+    {
+      "name": "waveshare_openh743i",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "waveshare_openh743i"
+        },
+        {
+          "type": "build",
+          "name": "waveshare_openh743i"
+        }
+      ]
+    },
+    {
+      "name": "stm32h7s3nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h7s3nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32h7s3nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32l052dap52",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l052dap52"
+        },
+        {
+          "type": "build",
+          "name": "stm32l052dap52"
+        }
+      ]
+    },
+    {
+      "name": "stm32l0538disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l0538disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32l0538disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32l412nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l412nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32l412nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32l476disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l476disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32l476disco"
+        }
+      ]
+    },
+    {
+      "name": "stm32l4p5nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l4p5nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32l4p5nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32l4r5nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l4r5nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32l4r5nucleo"
+        }
+      ]
+    },
+    {
+      "name": "b_u585i_iot2a",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "b_u585i_iot2a"
+        },
+        {
+          "type": "build",
+          "name": "b_u585i_iot2a"
+        }
+      ]
+    },
+    {
+      "name": "stm32u545nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32u545nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32u545nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32u575eval",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32u575eval"
+        },
+        {
+          "type": "build",
+          "name": "stm32u575eval"
+        }
+      ]
+    },
+    {
+      "name": "stm32u575nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32u575nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32u575nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32u5a5nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32u5a5nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32u5a5nucleo"
+        }
+      ]
+    },
+    {
+      "name": "stm32wb55nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32wb55nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32wb55nucleo"
+        }
+      ]
+    },
+    {
+      "name": "ek_tm4c123gxl",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ek_tm4c123gxl"
+        },
+        {
+          "type": "build",
+          "name": "ek_tm4c123gxl"
+        }
+      ]
+    },
+    {
+      "name": "xmc4500_relax",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "xmc4500_relax"
+        },
+        {
+          "type": "build",
+          "name": "xmc4500_relax"
+        }
+      ]
+    },
+    {
+      "name": "xmc4700_relax",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "xmc4700_relax"
+        },
+        {
+          "type": "build",
+          "name": "xmc4700_relax"
+        }
+      ]
+    }
+  ]
+}
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 04d537376..409fb9c75 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -399,7 +399,11 @@ endfunction()
 # Add flash jlink target
 function(family_flash_jlink TARGET)
   if (NOT DEFINED JLINKEXE)
-    set(JLINKEXE JLinkExe)
+    if(CMAKE_HOST_WIN32)
+      set(JLINKEXE JLink.exe)
+    else()
+      set(JLINKEXE JLinkExe)
+    endif()
   endif ()
 
   if (NOT DEFINED JLINK_IF)
diff --git a/tools/gen_presets.py b/tools/gen_presets.py
new file mode 100755
index 000000000..98b1a7d46
--- /dev/null
+++ b/tools/gen_presets.py
@@ -0,0 +1,91 @@
+#!/usr/bin/env python3
+import os
+import json
+
+
+def main():
+    board_list = []
+
+    # Find all board.cmake files
+    for root, dirs, files in os.walk("hw/bsp"):
+        for file in files:
+            if file == "board.cmake":
+                board_list.append(os.path.basename(root))
+
+    print('Generating presets for the following boards:')
+    print(board_list)
+
+    # Generate the presets
+    presets = {}
+    presets['version'] = 6
+
+    # Configure presets
+    presets['configurePresets'] = [
+        {"name": "default",
+         "hidden": True,
+         "description": r"Configure preset for the ${presetName} board",
+         "generator": "Ninja",
+         "binaryDir": r"${sourceDir}/build/${presetName}",
+         "cacheVariables": {
+             "CMAKE_BUILD_TYPE": "RelWithDebInfo",
+             "BOARD": r"${presetName}"
+         }
+         }]
+
+    presets['configurePresets'].extend(
+        [{'name': board, 'inherits': 'default'} for board in board_list]
+    )
+
+    # Build presets
+    # no inheritance since 'name' doesn't support macro expansion
+    presets['buildPresets'] = [
+        {
+            'name': board,
+            'description': "Build preset for the " + board + " board",
+            'configurePreset': board
+        }
+        for board in board_list
+    ]
+
+    # Workflow presets
+    presets['workflowPresets'] = [
+        {
+            "name": board,
+            "steps": [
+                {
+                    "type": "configure",
+                    "name": board
+                },
+                {
+                    "type": "build",
+                    "name": board
+                }
+            ]
+        }
+        for board in board_list
+    ]
+
+    with open("hw/bsp/BoardPresets.json", "w") as f:
+        f.write('{}\n'.format(json.dumps(presets, indent=2)))
+
+    # Generate presets for examples
+    presets = {
+        "version": 6,
+        "include": [
+            "../../../hw/bsp/BoardPresets.json"
+        ]
+    }
+
+    example_list = []
+    for root, dirs, files in os.walk("examples"):
+        for file in files:
+            if file == "CMakeLists.txt":
+                with open(os.path.join(root, 'CMakePresets.json'), 'w') as f:
+                    f.write('{}\n'.format(json.dumps(presets, indent=2)))
+                example_list.append(os.path.basename(root))
+
+    print('Generating presets for the following examples:')
+    print(example_list)
+
+if __name__ == "__main__":
+    main()
-- 
cgit v1.3.1


From d132044b7587f7e846bbec6e7b897d0842a21d13 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 24 Feb 2025 15:40:48 +0700
Subject: add tuh_midi_mount_cb_t struct for tuh_midi_mount_cb() change
 tuh_midi_rx/tx_cb() to have xferred_bytes rename
 tuh_midi_get_num_rx/tx_cables() to tuh_midi_get_rx/tx_cable_count() use
 default empty callback instead of weak null to be compatible with keil
 compiler

---
 examples/host/cdc_msc_hid/src/main.c |  4 +-
 examples/host/midi_rx/src/main.c     | 13 +++---
 src/class/cdc/cdc_host.h             |  8 ++--
 src/class/midi/midi_device.c         |  5 ---
 src/class/midi/midi_host.c           | 81 ++++++++++++++++--------------------
 src/class/midi/midi_host.h           | 34 +++++++++------
 src/host/usbh_pvt.h                  |  4 --
 7 files changed, 70 insertions(+), 79 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index 71257c0fe..2d5df23f9 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -82,12 +82,12 @@ int main(void) {
 
 void tuh_mount_cb(uint8_t dev_addr) {
   // application set-up
-  printf("A device with address %d is mounted\r\n", dev_addr);
+  printf("A device with address %u is mounted\r\n", dev_addr);
 }
 
 void tuh_umount_cb(uint8_t dev_addr) {
   // application tear-down
-  printf("A device with address %d is unmounted \r\n", dev_addr);
+  printf("A device with address %u is unmounted \r\n", dev_addr);
 }
 
 
diff --git a/examples/host/midi_rx/src/main.c b/examples/host/midi_rx/src/main.c
index 6db329ab5..d26321e5d 100644
--- a/examples/host/midi_rx/src/main.c
+++ b/examples/host/midi_rx/src/main.c
@@ -91,9 +91,9 @@ void midi_host_rx_task(void) {
 //--------------------------------------------------------------------+
 
 // Invoked when device with MIDI interface is mounted.
-void tuh_midi_mount_cb(uint8_t idx, uint8_t num_cables_rx, uint16_t num_cables_tx) {
-  printf("MIDI Interface Index = %u, Number of RX cables = %u, Number of TX cables = %u\r\n",
-          idx, num_cables_rx, num_cables_tx);
+void tuh_midi_mount_cb(uint8_t idx, const tuh_midi_mount_cb_t* mount_cb_data) {
+  printf("MIDI Interface Index = %u, Address = %u, Number of RX cables = %u, Number of TX cables = %u\r\n",
+          idx, mount_cb_data->daddr, mount_cb_data->rx_cable_count, mount_cb_data->tx_cable_count);
 }
 
 // Invoked when device with hid interface is un-mounted
@@ -101,8 +101,8 @@ void tuh_midi_umount_cb(uint8_t idx) {
   printf("MIDI Interface Index = %u is unmounted\r\n", idx);
 }
 
-void tuh_midi_rx_cb(uint8_t idx, uint32_t num_packets) {
-  if (num_packets == 0) {
+void tuh_midi_rx_cb(uint8_t idx, uint32_t xferred_bytes) {
+  if (xferred_bytes == 0) {
     return;
   }
 
@@ -117,6 +117,7 @@ void tuh_midi_rx_cb(uint8_t idx, uint32_t num_packets) {
   printf("\r\n");
 }
 
-void tuh_midi_tx_cb(uint8_t idx) {
+void tuh_midi_tx_cb(uint8_t idx, uint32_t xferred_bytes) {
   (void) idx;
+  (void) xferred_bytes;
 }
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index df975b2f0..8c5399534 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -49,22 +49,22 @@
 
 // RX FIFO size
 #ifndef CFG_TUH_CDC_RX_BUFSIZE
-#define CFG_TUH_CDC_RX_BUFSIZE USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
 #endif
 
 // RX Endpoint size
 #ifndef CFG_TUH_CDC_RX_EPSIZE
-#define CFG_TUH_CDC_RX_EPSIZE  USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_RX_EPSIZE  TUH_EPSIZE_BULK_MPS
 #endif
 
 // TX FIFO size
 #ifndef CFG_TUH_CDC_TX_BUFSIZE
-#define CFG_TUH_CDC_TX_BUFSIZE USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_TX_BUFSIZE TUH_EPSIZE_BULK_MPS
 #endif
 
 // TX Endpoint size
 #ifndef CFG_TUH_CDC_TX_EPSIZE
-#define CFG_TUH_CDC_TX_EPSIZE  USBH_EPSIZE_BULK_MAX
+#define CFG_TUH_CDC_TX_EPSIZE  TUH_EPSIZE_BULK_MPS
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/class/midi/midi_device.c b/src/class/midi/midi_device.c
index 7b6705640..0bbb3caf4 100644
--- a/src/class/midi/midi_device.c
+++ b/src/class/midi/midi_device.c
@@ -39,9 +39,6 @@
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-
-
-
 typedef struct {
   uint8_t itf_num;
   uint8_t ep_in;
@@ -440,8 +437,6 @@ uint16_t midid_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uint1
       drv_len += tu_desc_len(p_desc);
       p_desc   = tu_desc_next(p_desc);
     }
-  } else {
-    TU_LOG2("Warning: MIDI Device has no Audio Control Interface");
   }
 
   // 2nd Interface is MIDI Streaming
diff --git a/src/class/midi/midi_host.c b/src/class/midi/midi_host.c
index 770a39a8d..a4b1ebd2e 100644
--- a/src/class/midi/midi_host.c
+++ b/src/class/midi/midi_host.c
@@ -40,6 +40,15 @@
 
 #define TU_LOG_DRV(...)   TU_LOG(CFG_TUH_MIDI_LOG_LEVEL, __VA_ARGS__)
 
+//--------------------------------------------------------------------+
+// Weak stubs: invoked if no strong implementation is available
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK void tuh_midi_descriptor_cb(uint8_t idx, const tuh_midi_descriptor_cb_t * desc_cb_data) { (void) idx; (void) desc_cb_data; }
+TU_ATTR_WEAK void tuh_midi_mount_cb(uint8_t idx, const tuh_midi_mount_cb_t* mount_cb_data) { (void) idx; (void) mount_cb_data; }
+TU_ATTR_WEAK void tuh_midi_umount_cb(uint8_t idx) { (void) idx; }
+TU_ATTR_WEAK void tuh_midi_rx_cb(uint8_t idx, uint32_t xferred_bytes) { (void) idx; (void) xferred_bytes; }
+TU_ATTR_WEAK void tuh_midi_tx_cb(uint8_t idx, uint32_t xferred_bytes) { (void) idx; (void) xferred_bytes; }
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -52,8 +61,8 @@ typedef struct {
   uint8_t ep_in;          // IN endpoint address
   uint8_t ep_out;         // OUT endpoint address
 
-  uint8_t num_cables_rx;  // IN endpoint CS descriptor bNumEmbMIDIJack value
-  uint8_t num_cables_tx;  // OUT endpoint CS descriptor bNumEmbMIDIJack value
+  uint8_t rx_cable_count;  // IN endpoint CS descriptor bNumEmbMIDIJack value
+  uint8_t tx_cable_count;  // OUT endpoint CS descriptor bNumEmbMIDIJack value
 
   #if CFG_TUH_MIDI_STREAM_API
   // For Stream read()/write() API
@@ -135,16 +144,13 @@ void midih_close(uint8_t daddr) {
     midih_interface_t* p_midi = &_midi_host[idx];
     if (p_midi->daddr == daddr) {
       TU_LOG_DRV("  MIDI close addr = %u index = %u\r\n", daddr, idx);
-
-      if (tuh_midi_umount_cb) {
-        tuh_midi_umount_cb(idx);
-      }
+      tuh_midi_umount_cb(idx);
 
       p_midi->ep_in = 0;
       p_midi->ep_out = 0;
       p_midi->bInterfaceNumber = 0;
-      p_midi->num_cables_rx = 0;
-      p_midi->num_cables_tx = 0;
+      p_midi->rx_cable_count = 0;
+      p_midi->tx_cable_count = 0;
       p_midi->daddr = 0;
       p_midi->mounted = false;
       tu_memclr(&p_midi->stream_read, sizeof(p_midi->stream_read));
@@ -163,33 +169,16 @@ bool midih_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t result, uint
   midih_interface_t *p_midi_host = &_midi_host[idx];
 
   if (ep_addr == p_midi_host->ep_stream.rx.ep_addr) {
-    // receive new data if available
+    // receive new data, put it into FIFO and invoke callback if available
     if (xferred_bytes) {
-      // put in the RX FIFO only non-zero MIDI IN 4-byte packets
-      uint32_t packets_queued = 0;
-      uint8_t *buf = _midi_epbuf->rx;
-      const uint32_t npackets = xferred_bytes / 4;
-      for (uint32_t p = 0; p < npackets; p++) {
-        // some devices send back all zero packets even if there is no data ready
-        const uint32_t packet = tu_unaligned_read32(buf);
-        if (packet != 0) {
-          tu_edpt_stream_read_xfer_complete_with_buf(&p_midi_host->ep_stream.rx, buf, 4);
-          ++packets_queued;
-          TU_LOG3("MIDI RX=%08x\r\n", packet);
-        }
-        buf += 4;
-      }
-
-      if (tuh_midi_rx_cb) {
-        tuh_midi_rx_cb(idx, packets_queued);
-      }
+      tu_edpt_stream_read_xfer_complete(&p_midi_host->ep_stream.rx, xferred_bytes);
+      tuh_midi_rx_cb(idx, xferred_bytes);
     }
 
     tu_edpt_stream_read_xfer(dev_addr, &p_midi_host->ep_stream.rx); // prepare for next transfer
   } else if (ep_addr == p_midi_host->ep_stream.tx.ep_addr) {
-    if (tuh_midi_tx_cb) {
-      tuh_midi_tx_cb(idx);
-    }
+    tuh_midi_tx_cb(idx, xferred_bytes);
+
     if (0 == tu_edpt_stream_write_xfer(dev_addr, &p_midi_host->ep_stream.tx)) {
       // If there is no data left, a ZLP should be sent if
       // xferred_bytes is multiple of EP size and not zero
@@ -207,7 +196,6 @@ bool midih_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *d
   (void) rhport;
 
   TU_VERIFY(TUSB_CLASS_AUDIO == desc_itf->bInterfaceClass);
-  // const uint8_t* p_start = ((uint8_t const*) desc_itf);
   const uint8_t *p_end = ((const uint8_t *) desc_itf) + max_len;
   const uint8_t *p_desc = (const uint8_t *) desc_itf;
 
@@ -286,14 +274,14 @@ bool midih_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *d
         TU_LOG_DRV("  Endpoint and CS_Endpoint descriptor %02x\r\n", p_ep->bEndpointAddress);
         if (tu_edpt_dir(p_ep->bEndpointAddress) == TUSB_DIR_OUT) {
           p_midi->ep_out = p_ep->bEndpointAddress;
-          p_midi->num_cables_tx = p_csep->bNumEmbMIDIJack;
+          p_midi->tx_cable_count = p_csep->bNumEmbMIDIJack;
           desc_cb.desc_epout = p_ep;
 
           TU_ASSERT(tuh_edpt_open(dev_addr, p_ep));
           tu_edpt_stream_open(&p_midi->ep_stream.tx, p_ep);
         } else {
           p_midi->ep_in = p_ep->bEndpointAddress;
-          p_midi->num_cables_rx = p_csep->bNumEmbMIDIJack;
+          p_midi->rx_cable_count = p_csep->bNumEmbMIDIJack;
           desc_cb.desc_epin = p_ep;
 
           TU_ASSERT(tuh_edpt_open(dev_addr, p_ep));
@@ -309,10 +297,7 @@ bool midih_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_interface_t const *d
   desc_cb.desc_midi_total_len = (uint16_t) ((uintptr_t)p_desc - (uintptr_t) desc_itf);
 
   p_midi->daddr = dev_addr;
-
-  if (tuh_midi_descriptor_cb) {
-    tuh_midi_descriptor_cb(idx, &desc_cb);
-  }
+  tuh_midi_descriptor_cb(idx, &desc_cb);
 
   return true;
 }
@@ -323,9 +308,13 @@ bool midih_set_config(uint8_t dev_addr, uint8_t itf_num) {
   midih_interface_t *p_midi = &_midi_host[idx];
   p_midi->mounted = true;
 
-  if (tuh_midi_mount_cb) {
-    tuh_midi_mount_cb(idx, p_midi->num_cables_rx, p_midi->num_cables_tx);
-  }
+  const tuh_midi_mount_cb_t mount_cb_data = {
+    .daddr = dev_addr,
+    .bInterfaceNumber = itf_num,
+    .rx_cable_count = p_midi->rx_cable_count,
+    .tx_cable_count = p_midi->tx_cable_count,
+  };
+  tuh_midi_mount_cb(idx, &mount_cb_data);
 
   tu_edpt_stream_read_xfer(dev_addr, &p_midi->ep_stream.rx); // prepare for incoming data
 
@@ -355,18 +344,18 @@ uint8_t tuh_midi_itf_get_index(uint8_t daddr, uint8_t itf_num) {
   return TUSB_INDEX_INVALID_8;
 }
 
-uint8_t tuh_midi_get_num_tx_cables (uint8_t idx) {
+uint8_t tuh_midi_get_tx_cable_count (uint8_t idx) {
   TU_VERIFY(idx < CFG_TUH_MIDI);
   midih_interface_t *p_midi = &_midi_host[idx];
   TU_VERIFY(p_midi->ep_stream.tx.ep_addr != 0, 0);
-  return p_midi->num_cables_tx;
+  return p_midi->tx_cable_count;
 }
 
-uint8_t tuh_midi_get_num_rx_cables (uint8_t idx) {
+uint8_t tuh_midi_get_rx_cable_count (uint8_t idx) {
   TU_VERIFY(idx < CFG_TUH_MIDI);
   midih_interface_t *p_midi = &_midi_host[idx];
   TU_VERIFY(p_midi->ep_stream.rx.ep_addr != 0, 0);
-  return p_midi->num_cables_rx;
+  return p_midi->rx_cable_count;
 }
 
 uint32_t tuh_midi_read_available(uint8_t idx) {
@@ -410,7 +399,7 @@ uint32_t tuh_midi_packet_write_n(uint8_t idx, const uint8_t* buffer, uint32_t bu
 uint32_t tuh_midi_stream_write(uint8_t idx, uint8_t cable_num, uint8_t const *buffer, uint32_t bufsize) {
   TU_VERIFY(idx < CFG_TUH_MIDI && buffer && bufsize > 0);
   midih_interface_t *p_midi = &_midi_host[idx];
-  TU_VERIFY(cable_num < p_midi->num_cables_tx);
+  TU_VERIFY(cable_num < p_midi->tx_cable_count);
   midi_driver_stream_t *stream = &p_midi->stream_write;
 
   uint32_t byte_count = 0;
@@ -520,7 +509,7 @@ uint32_t tuh_midi_stream_read(uint8_t idx, uint8_t *p_cable_num, uint8_t *p_buff
   while (nread == 4 && bytes_buffered < bufsize) {
     *p_cable_num = (p_midi->stream_read.buffer[0] >> 4) & 0x0f;
     uint8_t bytes_to_add_to_stream = 0;
-    if (*p_cable_num < p_midi->num_cables_rx) {
+    if (*p_cable_num < p_midi->rx_cable_count) {
       // ignore the CIN field; too many devices out there encode this wrong
       uint8_t status = p_midi->stream_read.buffer[1];
       uint16_t cable_mask = (uint16_t) (1 << *p_cable_num);
diff --git a/src/class/midi/midi_host.h b/src/class/midi/midi_host.h
index 717e6ba67..b06bb43d7 100644
--- a/src/class/midi/midi_host.h
+++ b/src/class/midi/midi_host.h
@@ -37,10 +37,6 @@
 //--------------------------------------------------------------------+
 // Class Driver Configuration
 //--------------------------------------------------------------------+
-#ifndef CFG_TUH_MAX_CABLES
-#define CFG_TUH_MAX_CABLES 16
-#endif
-
 #ifndef CFG_TUH_MIDI_RX_BUFSIZE
 #define CFG_TUH_MIDI_RX_BUFSIZE TUH_EPSIZE_BULK_MPS
 #endif
@@ -60,7 +56,7 @@
 #endif
 
 //--------------------------------------------------------------------+
-// Application API
+// Application Types
 //--------------------------------------------------------------------+
 typedef struct {
   const tusb_desc_interface_t* desc_audio_control;
@@ -76,6 +72,17 @@ typedef struct {
   const uint8_t* desc_jack[16]; // list of jack descriptors (embedded + external)
 } tuh_midi_descriptor_cb_t;
 
+typedef struct {
+  uint8_t daddr;
+  uint8_t bInterfaceNumber; // interface number of MIDI streaming
+  uint8_t rx_cable_count;
+  uint8_t tx_cable_count;
+} tuh_midi_mount_cb_t;
+
+//--------------------------------------------------------------------+
+// Application API
+//--------------------------------------------------------------------+
+
 // Check if MIDI interface is mounted
 bool tuh_midi_mounted(uint8_t idx);
 
@@ -84,10 +91,10 @@ bool tuh_midi_mounted(uint8_t idx);
 uint8_t tuh_midi_itf_get_index(uint8_t daddr, uint8_t itf_num);
 
 // return the number of virtual midi cables on the device's IN endpoint
-uint8_t tuh_midi_get_num_rx_cables(uint8_t idx);
+uint8_t tuh_midi_get_rx_cable_count(uint8_t idx);
 
 // return the number of virtual midi cables on the device's OUT endpoint
-uint8_t tuh_midi_get_num_tx_cables(uint8_t idx);
+uint8_t tuh_midi_get_tx_cable_count(uint8_t idx);
 
 // return the raw number of bytes available.
 // Note: this is related but not the same as number of stream bytes available.
@@ -151,16 +158,19 @@ uint32_t tuh_midi_stream_read(uint8_t idx, uint8_t *p_cable_num, uint8_t *p_buff
 
 // Invoked when MIDI interface is detected in enumeration. Application can copy/parse descriptor if needed.
 // Note: may be fired before tuh_midi_mount_cb(), therefore midi interface is not mounted/ready.
-TU_ATTR_WEAK void tuh_midi_descriptor_cb(uint8_t idx, const tuh_midi_descriptor_cb_t * desc_cb);
+void tuh_midi_descriptor_cb(uint8_t idx, const tuh_midi_descriptor_cb_t * desc_cb_data);
 
 // Invoked when device with MIDI interface is mounted.
-TU_ATTR_WEAK void tuh_midi_mount_cb(uint8_t idx, uint8_t num_cables_rx, uint16_t num_cables_tx);
+void tuh_midi_mount_cb(uint8_t idx, const tuh_midi_mount_cb_t* mount_cb_data);
 
 // Invoked when device with MIDI interface is un-mounted
-TU_ATTR_WEAK void tuh_midi_umount_cb(uint8_t idx);
+void tuh_midi_umount_cb(uint8_t idx);
+
+// Invoked when received new data
+void tuh_midi_rx_cb(uint8_t idx, uint32_t xferred_bytes);
 
-TU_ATTR_WEAK void tuh_midi_rx_cb(uint8_t idx, uint32_t num_packets);
-TU_ATTR_WEAK void tuh_midi_tx_cb(uint8_t idx);
+// Invoked when a TX is complete and therefore space becomes available in TX buffer
+void tuh_midi_tx_cb(uint8_t idx, uint32_t xferred_bytes);
 
 //--------------------------------------------------------------------+
 // Internal Class Driver API
diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h
index d27c4baa2..bfa1fb2ba 100644
--- a/src/host/usbh_pvt.h
+++ b/src/host/usbh_pvt.h
@@ -41,10 +41,6 @@
 #define TU_LOG_INT_USBH(...)  TU_LOG_INT(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
 #define TU_LOG_HEX_USBH(...)  TU_LOG_HEX(CFG_TUH_LOG_LEVEL, __VA_ARGS__)
 
-enum {
-  USBH_EPSIZE_BULK_MAX = (TUH_OPT_HIGH_SPEED ? TUSB_EPSIZE_BULK_HS : TUSB_EPSIZE_BULK_FS)
-};
-
 //--------------------------------------------------------------------+
 // Class Driver API
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From 5f447b76ad23e8c977a5167b0b4dce93cd2980de Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Mar 2025 23:22:23 +0700
Subject: - add tuh_descriptor_get_string_langid() API - host enumeration
 always get language id, manufacturer, product and serial string. Which is
 required by some device such as 8bitdo

---
 examples/host/cdc_msc_hid/src/hid_app.c | 80 +++++++++++----------------
 src/common/tusb_types.h                 |  2 +-
 src/host/hub.c                          |  5 +-
 src/host/usbh.c                         | 95 ++++++++++++++++++++++++++-------
 src/host/usbh.h                         | 13 +++++
 5 files changed, 123 insertions(+), 72 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index 3f98ec89f..5bae250cf 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -39,18 +39,16 @@
 static uint8_t const keycode2ascii[128][2] =  { HID_KEYCODE_TO_ASCII };
 
 // Each HID instance can has multiple reports
-static struct
-{
+static struct {
   uint8_t report_count;
   tuh_hid_report_info_t report_info[MAX_REPORT];
-}hid_info[CFG_TUH_HID];
+} hid_info[CFG_TUH_HID];
 
 static void process_kbd_report(hid_keyboard_report_t const *report);
 static void process_mouse_report(hid_mouse_report_t const * report);
 static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
 
-void hid_app_task(void)
-{
+void hid_app_task(void) {
   // nothing to do
 }
 
@@ -63,64 +61,57 @@ void hid_app_task(void)
 // can be used to parse common/simple enough descriptor.
 // Note: if report descriptor length > CFG_TUH_ENUMERATION_BUFSIZE, it will be skipped
 // therefore report_desc = NULL, desc_len = 0
-void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* desc_report, uint16_t desc_len)
-{
+void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *desc_report, uint16_t desc_len) {
   printf("HID device address = %d, instance = %d is mounted\r\n", dev_addr, instance);
 
   // Interface protocol (hid_interface_protocol_enum_t)
-  const char* protocol_str[] = { "None", "Keyboard", "Mouse" };
+  const char *protocol_str[] = {"None", "Keyboard", "Mouse"};
   uint8_t const itf_protocol = tuh_hid_interface_protocol(dev_addr, instance);
 
   printf("HID Interface Protocol = %s\r\n", protocol_str[itf_protocol]);
 
   // By default host stack will use activate boot protocol on supported interface.
   // Therefore for this simple example, we only need to parse generic report descriptor (with built-in parser)
-  if ( itf_protocol == HID_ITF_PROTOCOL_NONE )
-  {
+  if (itf_protocol == HID_ITF_PROTOCOL_NONE) {
     hid_info[instance].report_count = tuh_hid_parse_report_descriptor(hid_info[instance].report_info, MAX_REPORT, desc_report, desc_len);
     printf("HID has %u reports \r\n", hid_info[instance].report_count);
   }
 
   // request to receive report
   // tuh_hid_report_received_cb() will be invoked when report is available
-  if ( !tuh_hid_receive_report(dev_addr, instance) )
-  {
+  if (!tuh_hid_receive_report(dev_addr, instance)) {
     printf("Error: cannot request to receive report\r\n");
   }
 }
 
 // Invoked when device with hid interface is un-mounted
-void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance)
-{
+void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance) {
   printf("HID device address = %d, instance = %d is unmounted\r\n", dev_addr, instance);
 }
 
 // Invoked when received report from device via interrupt endpoint
-void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len)
-{
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len) {
   uint8_t const itf_protocol = tuh_hid_interface_protocol(dev_addr, instance);
 
-  switch (itf_protocol)
-  {
+  switch (itf_protocol) {
     case HID_ITF_PROTOCOL_KEYBOARD:
       TU_LOG2("HID receive boot keyboard report\r\n");
-      process_kbd_report( (hid_keyboard_report_t const*) report );
-    break;
+      process_kbd_report((hid_keyboard_report_t const *) report);
+      break;
 
     case HID_ITF_PROTOCOL_MOUSE:
       TU_LOG2("HID receive boot mouse report\r\n");
-      process_mouse_report( (hid_mouse_report_t const*) report );
-    break;
+      process_mouse_report((hid_mouse_report_t const *) report);
+      break;
 
     default:
       // Generic report requires matching ReportID and contents with previous parsed report info
       process_generic_report(dev_addr, instance, report, len);
-    break;
+      break;
   }
 
   // continue to request to receive report
-  if ( !tuh_hid_receive_report(dev_addr, instance) )
-  {
+  if (!tuh_hid_receive_report(dev_addr, instance)) {
     printf("Error: cannot request to receive report\r\n");
   }
 }
@@ -231,29 +222,24 @@ static void process_mouse_report(hid_mouse_report_t const * report)
 //--------------------------------------------------------------------+
 // Generic Report
 //--------------------------------------------------------------------+
-static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len)
-{
+static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len) {
   (void) dev_addr;
   (void) len;
 
   uint8_t const rpt_count = hid_info[instance].report_count;
-  tuh_hid_report_info_t* rpt_info_arr = hid_info[instance].report_info;
-  tuh_hid_report_info_t* rpt_info = NULL;
+  tuh_hid_report_info_t *rpt_info_arr = hid_info[instance].report_info;
+  tuh_hid_report_info_t *rpt_info = NULL;
 
-  if ( rpt_count == 1 && rpt_info_arr[0].report_id == 0)
-  {
+  if (rpt_count == 1 && rpt_info_arr[0].report_id == 0) {
     // Simple report without report ID as 1st byte
     rpt_info = &rpt_info_arr[0];
-  }else
-  {
+  } else {
     // Composite report, 1st byte is report ID, data starts from 2nd byte
     uint8_t const rpt_id = report[0];
 
     // Find report id in the array
-    for(uint8_t i=0; i<rpt_count; i++)
-    {
-      if (rpt_id == rpt_info_arr[i].report_id )
-      {
+    for (uint8_t i = 0; i < rpt_count; i++) {
+      if (rpt_id == rpt_info_arr[i].report_id) {
         rpt_info = &rpt_info_arr[i];
         break;
       }
@@ -263,8 +249,7 @@ static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t c
     len--;
   }
 
-  if (!rpt_info)
-  {
+  if (!rpt_info) {
     printf("Couldn't find report info !\r\n");
     return;
   }
@@ -276,23 +261,22 @@ static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t c
   // - Consumer Control (Media Key) : Consumer, Consumer Control
   // - System Control (Power key)   : Desktop, System Control
   // - Generic (vendor)             : 0xFFxx, xx
-  if ( rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP )
-  {
-    switch (rpt_info->usage)
-    {
+  if (rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP) {
+    switch (rpt_info->usage) {
       case HID_USAGE_DESKTOP_KEYBOARD:
         TU_LOG1("HID receive keyboard report\r\n");
         // Assume keyboard follow boot report layout
-        process_kbd_report( (hid_keyboard_report_t const*) report );
-      break;
+        process_kbd_report((hid_keyboard_report_t const *) report);
+        break;
 
       case HID_USAGE_DESKTOP_MOUSE:
         TU_LOG1("HID receive mouse report\r\n");
         // Assume mouse follow boot report layout
-        process_mouse_report( (hid_mouse_report_t const*) report );
-      break;
+        process_mouse_report((hid_mouse_report_t const *) report);
+        break;
 
-      default: break;
+      default:
+        break;
     }
   }
 }
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 42ce5fc12..71af132af 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -462,7 +462,7 @@ TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8, "size is not correct
 typedef struct TU_ATTR_PACKED {
   uint8_t  bLength         ; ///< Size of this descriptor in bytes
   uint8_t  bDescriptorType ; ///< Descriptor Type
-  uint16_t unicode_string[];
+  uint16_t utf16le[];
 } tusb_desc_string_t;
 
 // USB Binary Device Object Store (BOS)
diff --git a/src/host/hub.c b/src/host/hub.c
index 93b4a3a84..61efa8ba5 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -46,7 +46,7 @@ typedef struct {
 
   // from hub descriptor
   uint8_t bNbrPorts;
-  uint8_t bPwrOn2PwrGood; // port power on to good, in 2ms unit
+  uint8_t bPwrOn2PwrGood_2ms; // port power on to good, in 2ms unit
   // uint16_t wHubCharacteristics;
 
   hub_port_status_response_t port_status;
@@ -279,7 +279,7 @@ static void config_set_port_power (tuh_xfer_t* xfer) {
   // only use number of ports in hub descriptor
   hub_desc_cs_t const* desc_hub = (hub_desc_cs_t const*) p_epbuf->ctrl_buf;
   p_hub->bNbrPorts = desc_hub->bNbrPorts;
-  p_hub->bPwrOn2PwrGood = desc_hub->bPwrOn2PwrGood;
+  p_hub->bPwrOn2PwrGood_2ms = desc_hub->bPwrOn2PwrGood;
 
   // May need to GET_STATUS
 
@@ -301,7 +301,6 @@ static void config_port_power_complete (tuh_xfer_t* xfer) {
       TU_MESS_FAILED();
       TU_BREAKPOINT();
     }
-    // delay bPwrOn2PwrGood * 2 ms before set configuration complete
     usbh_driver_set_config_complete(daddr, p_hub->itf_num);
   } else {
     // power next port
diff --git a/src/host/usbh.c b/src/host/usbh.c
index c7a9a868f..dcd22ee31 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -1282,13 +1282,17 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
           removing_hubs |= TU_BIT(dev_id - CFG_TUH_DEVICE_MAX);
         } else {
           // Invoke callback before closing driver (maybe call it later ?)
-          if (tuh_umount_cb) tuh_umount_cb(daddr);
+          if (tuh_umount_cb) {
+            tuh_umount_cb(daddr);
+          }
         }
 
         // Close class driver
         for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
           usbh_class_driver_t const* driver = get_driver(drv_id);
-          if (driver) driver->close(daddr);
+          if (driver) {
+            driver->close(daddr);
+          }
         }
 
         hcd_device_close(rhport, daddr);
@@ -1345,8 +1349,11 @@ enum {
   ENUM_HUB_GET_STATUS_2,
   ENUM_HUB_CLEAR_RESET_2,
   ENUM_SET_ADDR,
-
   ENUM_GET_DEVICE_DESC,
+  ENUM_GET_STRING_LANGUAGE_ID,
+  ENUM_GET_STRING_MANUFACTURER,
+  ENUM_GET_STRING_PRODUCT,
+  ENUM_GET_STRING_SERIAL,
   ENUM_GET_9BYTE_CONFIG_DESC,
   ENUM_GET_FULL_CONFIG_DESC,
   ENUM_SET_CONFIG,
@@ -1359,25 +1366,25 @@ static void enum_full_complete(void);
 
 // process device enumeration
 static void process_enumeration(tuh_xfer_t* xfer) {
-  // Retry a few times with transfers in enumeration since device can be unstable when starting up
-  enum {
-    ATTEMPT_COUNT_MAX = 3,
-    ATTEMPT_DELAY_MS = 100
-  };
+  // Retry a few times while enumerating since device can be unstable when starting up
   static uint8_t failed_count = 0;
+  if (XFER_RESULT_FAILED == xfer->result) {
+    enum {
+      ATTEMPT_COUNT_MAX = 3,
+      ATTEMPT_DELAY_MS = 100
+    };
 
-  if (XFER_RESULT_SUCCESS != xfer->result) {
     // retry if not reaching max attempt
+    failed_count++;
     bool retry = _dev0.enumerating && (failed_count < ATTEMPT_COUNT_MAX);
-    if ( retry ) {
-      failed_count++;
+    if (retry) {
       tusb_time_delay_ms_api(ATTEMPT_DELAY_MS); // delay a bit
-      TU_LOG1("Enumeration attempt %u\r\n", failed_count);
+      TU_LOG1("Enumeration attempt %u/%u\r\n", failed_count+1, ATTEMPT_COUNT_MAX);
       retry = tuh_control_xfer(xfer);
     }
 
     if (!retry) {
-      enum_full_complete();
+      enum_full_complete(); // complete as failed
     }
 
     return;
@@ -1386,6 +1393,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 
   uint8_t const daddr = xfer->daddr;
   uintptr_t const state = xfer->user_data;
+  usbh_device_t* dev = get_device(daddr);
+  uint16_t langid = 0x0409; // default is English
 
   switch (state) {
     #if CFG_TUH_HUB
@@ -1476,7 +1485,6 @@ static void process_enumeration(tuh_xfer_t* xfer) {
       tusb_time_delay_ms_api(2);
 
       const uint8_t new_addr = (uint8_t) tu_le16toh(xfer->setup->wValue);
-
       usbh_device_t* new_dev = get_device(new_addr);
       TU_ASSERT(new_dev,);
       new_dev->addressed = 1;
@@ -1490,21 +1498,69 @@ static void process_enumeration(tuh_xfer_t* xfer) {
       // Get full device descriptor
       TU_LOG_USBH("Get Device Descriptor\r\n");
       TU_ASSERT(tuh_descriptor_get_device(new_addr, _usbh_epbuf.ctrl, sizeof(tusb_desc_device_t),
-                                          process_enumeration, ENUM_GET_9BYTE_CONFIG_DESC),);
+                                          process_enumeration, ENUM_GET_STRING_LANGUAGE_ID),);
       break;
     }
 
-    case ENUM_GET_9BYTE_CONFIG_DESC: {
-      tusb_desc_device_t const* desc_device = (tusb_desc_device_t const*) _usbh_epbuf.ctrl;
-      usbh_device_t* dev = get_device(daddr);
+    case ENUM_GET_STRING_LANGUAGE_ID: {
+      // save the received device descriptor
       TU_ASSERT(dev,);
-
+      tusb_desc_device_t const* desc_device = (tusb_desc_device_t const*) _usbh_epbuf.ctrl;
       dev->vid = desc_device->idVendor;
       dev->pid = desc_device->idProduct;
       dev->i_manufacturer = desc_device->iManufacturer;
       dev->i_product = desc_device->iProduct;
       dev->i_serial = desc_device->iSerialNumber;
 
+      tuh_descriptor_get_string_langid(daddr, _usbh_epbuf.ctrl, CFG_TUH_ENUMERATION_BUFSIZE,
+                                       process_enumeration, ENUM_GET_STRING_MANUFACTURER);
+      break;
+    }
+
+    case ENUM_GET_STRING_MANUFACTURER: {
+      TU_ASSERT(dev,);
+      const tusb_desc_string_t* desc_langid = (tusb_desc_string_t const*) _usbh_epbuf.ctrl;
+      if (desc_langid->bLength >= 4) {
+        langid = tu_le16toh(desc_langid->utf16le[0]);
+      }
+      if (dev->i_manufacturer != 0) {
+        tuh_descriptor_get_string(daddr, dev->i_manufacturer, langid, _usbh_epbuf.ctrl, CFG_TUH_ENUMERATION_BUFSIZE,
+                                  process_enumeration, ENUM_GET_STRING_PRODUCT);
+        break;
+      } else {
+        TU_ATTR_FALLTHROUGH;
+      }
+    }
+
+    case ENUM_GET_STRING_PRODUCT: {
+      TU_ASSERT(dev,);
+      if (state == ENUM_GET_STRING_PRODUCT) {
+        langid = tu_le16toh(xfer->setup->wIndex); // if not fall through, get langid from previous setup packet
+      }
+      if (dev->i_product != 0) {
+        tuh_descriptor_get_string(daddr, dev->i_product, 0x0409, _usbh_epbuf.ctrl, CFG_TUH_ENUMERATION_BUFSIZE,
+                            process_enumeration, ENUM_GET_STRING_SERIAL);
+        break;
+      } else {
+        TU_ATTR_FALLTHROUGH;
+      }
+    }
+
+    case ENUM_GET_STRING_SERIAL: {
+      TU_ASSERT(dev,);
+      if (state == ENUM_GET_STRING_SERIAL) {
+        langid = tu_le16toh(xfer->setup->wIndex); // if not fall through, get langid from previous setup packet
+      }
+      if (dev->i_serial != 0) {
+        tuh_descriptor_get_string(daddr, dev->i_serial, langid, _usbh_epbuf.ctrl, CFG_TUH_ENUMERATION_BUFSIZE,
+                            process_enumeration, ENUM_GET_9BYTE_CONFIG_DESC);
+        break;
+      } else {
+        TU_ATTR_FALLTHROUGH;
+      }
+    }
+
+    case ENUM_GET_9BYTE_CONFIG_DESC: {
       // Get 9-byte for total length
       uint8_t const config_idx = CONFIG_NUM - 1;
       TU_LOG_USBH("Get Configuration[0] Descriptor (9 bytes)\r\n");
@@ -1537,7 +1593,6 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 
     case ENUM_CONFIG_DRIVER: {
       TU_LOG_USBH("Device configured\r\n");
-      usbh_device_t* dev = get_device(daddr);
       TU_ASSERT(dev,);
 
       dev->configured = 1;
diff --git a/src/host/usbh.h b/src/host/usbh.h
index c8b137173..0fbe39743 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -265,6 +265,13 @@ bool tuh_descriptor_get_hid_report(uint8_t daddr, uint8_t itf_num, uint8_t desc_
 bool tuh_descriptor_get_string(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len,
                                tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 
+// Get language id string descriptor (control transfer)
+TU_ATTR_ALWAYS_INLINE static inline
+bool tuh_descriptor_get_string_langid(uint8_t daddr, void* buffer, uint16_t len,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  return tuh_descriptor_get_string(daddr, 0, 0, buffer, len, complete_cb, user_data);
+}
+
 // Get manufacturer string descriptor (control transfer)
 // true on success, false if there is on-going control transfer or incorrect parameters
 bool tuh_descriptor_get_manufacturer_string(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len,
@@ -304,6 +311,12 @@ uint8_t tuh_descriptor_get_hid_report_sync(uint8_t daddr, uint8_t itf_num, uint8
 // return transfer result
 uint8_t tuh_descriptor_get_string_sync(uint8_t daddr, uint8_t index, uint16_t language_id, void* buffer, uint16_t len);
 
+// Sync (blocking) version of tuh_descriptor_get_string_langid()
+TU_ATTR_ALWAYS_INLINE static inline
+uint8_t tuh_descriptor_get_string_langid_sync(uint8_t daddr, void* buffer, uint16_t len) {
+  return tuh_descriptor_get_string_sync(daddr, 0, 0, buffer, len);
+}
+
 // Sync (blocking) version of tuh_descriptor_get_manufacturer_string()
 // return transfer result
 uint8_t tuh_descriptor_get_manufacturer_string_sync(uint8_t daddr, uint16_t language_id, void* buffer, uint16_t len);
-- 
cgit v1.3.1


From 65e44e0a51272f9d75719d90955f19209dbf1ea2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Mar 2025 22:46:21 +0700
Subject: fix(dwc2) host driver conflict with max3421e

---
 examples/host/bare_api/src/tusb_config.h             | 3 ++-
 examples/host/cdc_msc_hid/src/tusb_config.h          | 3 ++-
 examples/host/cdc_msc_hid_freertos/src/tusb_config.h | 3 ++-
 examples/host/device_info/src/tusb_config.h          | 3 ++-
 examples/host/hid_controller/src/tusb_config.h       | 3 ++-
 examples/host/msc_file_explorer/src/tusb_config.h    | 3 ++-
 src/portable/synopsys/dwc2/hcd_dwc2.c                | 2 +-
 7 files changed, 13 insertions(+), 7 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/bare_api/src/tusb_config.h b/examples/host/bare_api/src/tusb_config.h
index fab233be0..a03675c5f 100644
--- a/examples/host/bare_api/src/tusb_config.h
+++ b/examples/host/bare_api/src/tusb_config.h
@@ -69,9 +69,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index a59a0ffb9..cc8d6e5c4 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -69,9 +69,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 02de4197b..682265f59 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -74,9 +74,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/examples/host/device_info/src/tusb_config.h b/examples/host/device_info/src/tusb_config.h
index 5190b5b1f..db02a97db 100644
--- a/examples/host/device_info/src/tusb_config.h
+++ b/examples/host/device_info/src/tusb_config.h
@@ -74,9 +74,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index 3ac591d8f..351fe0178 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -69,9 +69,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index c798b4383..c1829c300 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -69,9 +69,10 @@
 // Enable Host stack
 #define CFG_TUH_ENABLED       1
 
+// #define CFG_TUH_MAX3421       1 // use max3421 as host controller
+
 #if CFG_TUSB_MCU == OPT_MCU_RP2040
   // #define CFG_TUH_RPI_PIO_USB   1 // use pio-usb as host controller
-  // #define CFG_TUH_MAX3421       1 // use max3421 as host controller
 
   // host roothub port is 1 if using either pio-usb or max3421
   #if (defined(CFG_TUH_RPI_PIO_USB) && CFG_TUH_RPI_PIO_USB) || (defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421)
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index ebbb6200a..b13479b02 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -26,7 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && defined(TUP_USBIP_DWC2)
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_DWC2) && !CFG_TUH_MAX3421
 
 #if !(CFG_TUH_DWC2_SLAVE_ENABLE || CFG_TUH_DWC2_DMA_ENABLE)
 #error DWC2 require either CFG_TUH_DWC2_SLAVE_ENABLE or CFG_TUH_DWC2_DMA_ENABLE to be enabled
-- 
cgit v1.3.1


From 99673cdbb81b76f7020cf6aacb182ea86fdee3da Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 25 Mar 2025 17:36:15 +0700
Subject: fix wanings

---
 examples/host/cdc_msc_hid/src/cdc_app.c          |  2 +-
 examples/host/cdc_msc_hid/src/hid_app.c          |  3 +--
 examples/host/cdc_msc_hid/src/main.c             | 12 ++++--------
 examples/host/cdc_msc_hid_freertos/src/cdc_app.c |  2 +-
 examples/host/cdc_msc_hid_freertos/src/main.c    |  6 ------
 examples/host/cdc_msc_hid_freertos/src/msc_app.c |  2 +-
 examples/host/hid_controller/src/hid_app.c       | 17 ++++++-----------
 examples/host/msc_file_explorer/src/msc_app.c    |  2 ++
 8 files changed, 16 insertions(+), 30 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 4a13f8b27..e68ec383b 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -27,7 +27,7 @@
 #include "tusb.h"
 #include "bsp/board_api.h"
 
-size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
+static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index 5bae250cf..a751c9c80 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -165,8 +165,7 @@ static void process_kbd_report(hid_keyboard_report_t const *report)
 // Mouse
 //--------------------------------------------------------------------+
 
-void cursor_movement(int8_t x, int8_t y, int8_t wheel)
-{
+static void cursor_movement(int8_t x, int8_t y, int8_t wheel) {
 #if USE_ANSI_ESCAPE
   // Move X using ansi escape
   if ( x < 0)
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index 2d5df23f9..7b02e238e 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -31,18 +31,12 @@
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF PROTYPES
+// MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 void led_blinking_task(void);
 extern void cdc_app_task(void);
 extern void hid_app_task(void);
 
-#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
-// API to read/rite MAX3421's register. Implemented by TinyUSB
-extern uint8_t tuh_max3421_reg_read(uint8_t rhport, uint8_t reg, bool in_isr);
-extern bool tuh_max3421_reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr);
-#endif
-
 /*------------- MAIN -------------*/
 int main(void) {
   board_init();
@@ -101,7 +95,9 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < interval_ms) return; // not enough time
+  if (board_millis() - start_ms < interval_ms) {
+    return;// not enough time
+  }
   start_ms += interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index 7cbe1e03a..e279ad509 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -52,7 +52,7 @@ void cdc_app_init(void) {
 }
 
 // helper
-size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
+static size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index 10d1b120b..64a108254 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -69,12 +69,6 @@ extern void cdc_app_init(void);
 extern void hid_app_init(void);
 extern void msc_app_init(void);
 
-#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
-// API to read/rite MAX3421's register. Implemented by TinyUSB
-extern uint8_t tuh_max3421_reg_read(uint8_t rhport, uint8_t reg, bool in_isr);
-extern bool tuh_max3421_reg_write(uint8_t rhport, uint8_t reg, uint8_t data, bool in_isr);
-#endif
-
 /*------------- MAIN -------------*/
 int main(void) {
   board_init();
diff --git a/examples/host/cdc_msc_hid_freertos/src/msc_app.c b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
index 6b9cdab85..6439495a8 100644
--- a/examples/host/cdc_msc_hid_freertos/src/msc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
@@ -34,7 +34,7 @@ void msc_app_init(void) {
   // nothing to do
 }
 
-bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const *cb_data) {
+static bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const *cb_data) {
   msc_cbw_t const *cbw = cb_data->cbw;
   msc_csw_t const *csw = cb_data->csw;
 
diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 6ffe0b6d4..1d6ca8b07 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -231,14 +231,12 @@ void tuh_hid_umount_cb(uint8_t dev_addr, uint8_t instance)
 }
 
 // check if different than 2
-bool diff_than_2(uint8_t x, uint8_t y)
-{
+static inline bool diff_than_2(uint8_t x, uint8_t y) {
   return (x - y > 2) || (y - x > 2);
 }
 
 // check if 2 reports are different enough
-bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2)
-{
+static bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2) {
   bool result;
 
   // x, y, z, rz must different than 2 to be counted
@@ -251,7 +249,7 @@ bool diff_report(sony_ds4_report_t const* rpt1, sony_ds4_report_t const* rpt2)
   return result;
 }
 
-void process_sony_ds4(uint8_t const* report, uint16_t len)
+static void process_sony_ds4(uint8_t const* report, uint16_t len)
 {
   (void)len;
   const char* dpad_str[] = { "N", "NE", "E", "SE", "S", "SW", "W", "NW", "none" };
@@ -310,16 +308,13 @@ void process_sony_ds4(uint8_t const* report, uint16_t len)
 }
 
 // Invoked when received report from device via interrupt endpoint
-void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len)
-{
-  if ( is_sony_ds4(dev_addr) )
-  {
+void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len) {
+  if (is_sony_ds4(dev_addr)) {
     process_sony_ds4(report, len);
   }
 
   // continue to request to receive report
-  if ( !tuh_hid_receive_report(dev_addr, instance) )
-  {
+  if (!tuh_hid_receive_report(dev_addr, instance)) {
     printf("Error: cannot request to receive report\r\n");
   }
 }
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 226c870ea..40a9ef57e 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -34,6 +34,8 @@
 #define EMBEDDED_CLI_IMPL
 #include "embedded_cli.h"
 
+#include "msc_app.h"
+
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
-- 
cgit v1.3.1


From 9645baa42ed3d50d650b9f2905a91d01b0a7a944 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 18 Apr 2025 12:16:35 +0200
Subject: include h7rs in host examples.

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/bare_api/only.txt             | 1 +
 examples/host/cdc_msc_hid/only.txt          | 1 +
 examples/host/cdc_msc_hid_freertos/only.txt | 1 +
 examples/host/device_info/only.txt          | 1 +
 examples/host/hid_controller/only.txt       | 1 +
 examples/host/midi_rx/only.txt              | 1 +
 examples/host/msc_file_explorer/only.txt    | 1 +
 7 files changed, 7 insertions(+)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 95f9f1d82..26662fc87 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 95f9f1d82..26662fc87 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index e3ae25260..3bec7f7f1 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -13,3 +13,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index b6f87f423..dd2035421 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -18,3 +18,4 @@ mcu:RAXXX
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index 95f9f1d82..26662fc87 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index b6f87f423..dd2035421 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -18,3 +18,4 @@ mcu:RAXXX
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 95f9f1d82..26662fc87 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32H7RS
-- 
cgit v1.3.1


From 741cb3cf029e37682634eeb355c20420c0816c8d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 23 Apr 2025 12:35:32 +0700
Subject: rename hcd_devtree_info_t to tuh_bus_info_t, hcd_devtree_get_info to
 hcd_bus_info_get streamline bus info to usbh_devies, also replace dev0
 (renamed to dev0_bus)

---
 .idea/debugServers/esp32s2.xml                 |  14 +++
 .idea/debugServers/rp2350.xml                  |   2 +-
 .idea/debugServers/stm32f769.xml               |  13 +++
 .idea/debugServers/stm32h563.xml               |  13 +++
 .idea/debugServers/stm32h743.xml               |  13 +++
 examples/host/cdc_msc_hid/src/msc_app.c        |  12 +--
 src/host/hcd.h                                 |  12 +--
 src/host/usbh.c                                | 127 +++++++++++--------------
 src/host/usbh_pvt.h                            |   2 +-
 src/portable/ehci/ehci.c                       |  10 +-
 src/portable/mentor/musb/hcd_musb.c            |  24 ++---
 src/portable/ohci/ohci.c                       |   6 +-
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c |   6 +-
 src/portable/renesas/rusb2/hcd_rusb2.c         |   6 +-
 src/portable/synopsys/dwc2/hcd_dwc2.c          |  18 ++--
 15 files changed, 152 insertions(+), 126 deletions(-)
 create mode 100644 .idea/debugServers/esp32s2.xml
 create mode 100644 .idea/debugServers/stm32f769.xml
 create mode 100644 .idea/debugServers/stm32h563.xml
 create mode 100644 .idea/debugServers/stm32h743.xml

(limited to 'examples/host/cdc_msc_hid')

diff --git a/.idea/debugServers/esp32s2.xml b/.idea/debugServers/esp32s2.xml
new file mode 100644
index 000000000..6a4aff3da
--- /dev/null
+++ b/.idea/debugServers/esp32s2.xml
@@ -0,0 +1,14 @@
+<component name="DebugServers">
+  <generic-debug-target name="esp32s2" uniqueID="254eff00-2acf-48fe-b255-1d0c0c9c4a7a">
+    <debugger version="1">
+      <debugger kind="GDB">$USER_HOME$/.espressif/tools/xtensa-esp-elf-gdb/14.2_20240403/xtensa-esp-elf-gdb/bin/xtensa-esp32s2-elf-gdb</debugger>
+      <env />
+    </debugger>
+    <gdbserver exe="$USER_HOME$/.espressif/tools/openocd-esp32/v0.12.0-esp32-20241016/openocd-esp32/bin/openocd" args="-f board/esp32s2-kaluga-1.cfg">
+      <env />
+    </gdbserver>
+    <console port="4444" />
+    <target download-type="NONE" reset-command="monitor reset halt" reset-before="false" />
+    <connection extended-remote="false" remote-string="tcp::3333" warmup-ms="500" />
+  </generic-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/rp2350.xml b/.idea/debugServers/rp2350.xml
index 5e092f3c4..52243a297 100644
--- a/.idea/debugServers/rp2350.xml
+++ b/.idea/debugServers/rp2350.xml
@@ -1,5 +1,5 @@
 <component name="DebugServers">
-  <generic-debug-target name="rp2350" uniqueID="939fdf16-9c30-4261-8435-3e8df7fd5800" selected="true">
+  <generic-debug-target name="rp2350" uniqueID="939fdf16-9c30-4261-8435-3e8df7fd5800">
     <debugger version="1">
       <debugger kind="GDB" isBundled="true" />
       <env />
diff --git a/.idea/debugServers/stm32f769.xml b/.idea/debugServers/stm32f769.xml
new file mode 100644
index 000000000..2fb322a0f
--- /dev/null
+++ b/.idea/debugServers/stm32f769.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32f769" uniqueID="7a47302f-f7e5-434b-b20b-78e95318dd0c" selected="true">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" type="RTT" />
+    <target device="STM32F769NI" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32h563.xml b/.idea/debugServers/stm32h563.xml
new file mode 100644
index 000000000..9bf6db6e9
--- /dev/null
+++ b/.idea/debugServers/stm32h563.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32h563" uniqueID="a3e9293d-113b-48b3-b83d-dd4249984abe">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="2334" type="RTT" />
+    <target device="STM32H562ZI" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32h743.xml b/.idea/debugServers/stm32h743.xml
new file mode 100644
index 000000000..63680b78c
--- /dev/null
+++ b/.idea/debugServers/stm32h743.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32h743" uniqueID="6d6a3ed6-f66d-4f6a-9e70-6aafe5c971d0">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="2334" type="RTT" />
+    <target device="STM32H743XI" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/examples/host/cdc_msc_hid/src/msc_app.c b/examples/host/cdc_msc_hid/src/msc_app.c
index 1d7e18e6e..0e9c99766 100644
--- a/examples/host/cdc_msc_hid/src/msc_app.c
+++ b/examples/host/cdc_msc_hid/src/msc_app.c
@@ -30,13 +30,11 @@
 //--------------------------------------------------------------------+
 static scsi_inquiry_resp_t inquiry_resp;
 
-bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data)
-{
+static bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_data) {
   msc_cbw_t const* cbw = cb_data->cbw;
   msc_csw_t const* csw = cb_data->csw;
 
-  if (csw->status != 0)
-  {
+  if (csw->status != 0) {
     printf("Inquiry failed\r\n");
     return false;
   }
@@ -55,16 +53,14 @@ bool inquiry_complete_cb(uint8_t dev_addr, tuh_msc_complete_data_t const * cb_da
 }
 
 //------------- IMPLEMENTATION -------------//
-void tuh_msc_mount_cb(uint8_t dev_addr)
-{
+void tuh_msc_mount_cb(uint8_t dev_addr) {
   printf("A MassStorage device is mounted\r\n");
 
   uint8_t const lun = 0;
   tuh_msc_inquiry(dev_addr, lun, &inquiry_resp, inquiry_complete_cb, 0);
 }
 
-void tuh_msc_umount_cb(uint8_t dev_addr)
-{
+void tuh_msc_umount_cb(uint8_t dev_addr) {
   (void) dev_addr;
   printf("A MassStorage device is unmounted\r\n");
 }
diff --git a/src/host/hcd.h b/src/host/hcd.h
index b20d96d54..1f2704a10 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -95,7 +95,7 @@ typedef struct {
   uint8_t hub_addr;
   uint8_t hub_port;
   uint8_t speed;
-} hcd_devtree_info_t;
+} tuh_bus_info_t;
 
 //--------------------------------------------------------------------+
 // Memory API
@@ -186,12 +186,8 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr);
 // USBH implemented API
 //--------------------------------------------------------------------+
 
-// Get device tree information of a device
-// USB device tree can be complicated and manged by USBH, this help HCD to retrieve
-// needed topology info to carry out its work
-extern void hcd_devtree_get_info(uint8_t dev_addr, hcd_devtree_info_t* devtree_info);
-
-//------------- Event API -------------//
+// Get device port information
+extern bool hcd_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info);
 
 // Called by HCD to notify stack
 extern void hcd_event_handler(hcd_event_t const* event, bool in_isr);
@@ -239,4 +235,4 @@ void hcd_event_xfer_complete(uint8_t dev_addr, uint8_t ep_addr, uint32_t xferred
  }
 #endif
 
-#endif /* _TUSB_HCD_H_ */
+#endif
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 0492fb2f2..c063c97f9 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -92,19 +92,7 @@ TU_ATTR_WEAK bool hcd_dcache_clean_invalidate(const void* addr, uint32_t data_si
 // USBH-HCD common data structure
 //--------------------------------------------------------------------+
 typedef struct {
-  // port
-  uint8_t rhport;
-  uint8_t hub_addr;
-  uint8_t hub_port;
-  uint8_t speed;
-} usbh_dev0_t;
-
-typedef struct {
-  // port, must be same layout as usbh_dev0_t
-  uint8_t rhport;
-  uint8_t hub_addr;
-  uint8_t hub_port;
-  uint8_t speed;
+  tuh_bus_info_t bus_info;
 
   // Device State
   struct TU_ATTR_PACKED {
@@ -231,8 +219,8 @@ static usbh_class_driver_t const usbh_class_drivers[] = {
 enum { BUILTIN_DRIVER_COUNT = TU_ARRAY_SIZE(usbh_class_drivers) };
 
 // Additional class drivers implemented by application
-tu_static usbh_class_driver_t const * _app_driver = NULL;
-tu_static uint8_t _app_driver_count = 0;
+static usbh_class_driver_t const * _app_driver = NULL;
+static uint8_t _app_driver_count = 0;
 
 #define TOTAL_DRIVER_COUNT    (_app_driver_count + BUILTIN_DRIVER_COUNT)
 
@@ -255,9 +243,6 @@ static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
 // sum of end device + hub
 #define TOTAL_DEVICES   (CFG_TUH_DEVICE_MAX + CFG_TUH_HUB)
 
-// Device with address = 0 for enumeration
-static usbh_dev0_t _dev0;
-
 // all devices excluding zero-address
 // hub address start from CFG_TUH_DEVICE_MAX+1
 // TODO: hub can has its own simpler struct to save memory
@@ -299,6 +284,8 @@ CFG_TUH_MEM_SECTION static usbh_epbuf_t _usbh_epbuf;
 typedef struct {
   uint8_t controller_id; // controller ID
   uint8_t enumerating_daddr; // device address of the device being enumerated
+
+  tuh_bus_info_t dev0_bus; // bus info for dev0 in enumeration
 } usbh_data_t;
 
 static usbh_data_t _usbh_data = {
@@ -353,9 +340,10 @@ bool tuh_vid_pid_get(uint8_t dev_addr, uint16_t *vid, uint16_t *pid) {
   return true;
 }
 
-tusb_speed_t tuh_speed_get(uint8_t dev_addr) {
-  usbh_device_t *dev = get_device(dev_addr);
-  return (tusb_speed_t) (dev ? get_device(dev_addr)->speed : _dev0.speed);
+tusb_speed_t tuh_speed_get(uint8_t daddr) {
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(daddr, &bus_info);
+  return bus_info.speed;
 }
 
 bool tuh_rhport_is_active(uint8_t rhport) {
@@ -423,9 +411,9 @@ bool tuh_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
     }
 
     // Device
-    tu_memclr(&_dev0, sizeof(_dev0));
     tu_memclr(_usbh_devices, sizeof(_usbh_devices));
     tu_memclr(&_ctrl_xfer, sizeof(_ctrl_xfer));
+    tu_memclr(&_usbh_data, sizeof(_usbh_data));
 
     _usbh_data.controller_id = TUSB_INDEX_INVALID_8;
     _usbh_data.enumerating_daddr = TUSB_INDEX_INVALID_8;
@@ -530,8 +518,8 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
         // due to the shared control buffer, we must fully complete enumerating one device first.
         // TODO better to have an separated queue for newly attached devices
         if (_usbh_data.enumerating_daddr != TUSB_INDEX_INVALID_8) {
-          if (event.rhport == _dev0.rhport &&
-              event.connection.hub_addr == _dev0.hub_addr && event.connection.hub_port == _dev0.hub_port) {
+          if (event.rhport == _usbh_data.dev0_bus.rhport &&
+              event.connection.hub_addr == _usbh_data.dev0_bus.hub_addr && event.connection.hub_port == _usbh_data.dev0_bus.hub_port) {
             // Some device can cause multiple duplicated attach events
             // drop current enumerating and start over for a proper port reset
             // abort/cancel current enumeration and start new one
@@ -859,7 +847,7 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
   const uint8_t dir   = tu_edpt_dir(ep_addr);
 
   if (epnum == 0) {
-    // Also include dev0 for aborting enumerating
+    // Also include dev0_bus for aborting enumerating
     const uint8_t rhport = usbh_get_rhport(daddr);
 
     // control transfer: only 1 control at a time, check if we are aborting the current one
@@ -871,7 +859,7 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
     TU_VERIFY(dev);
 
     TU_VERIFY(dev->ep_status[epnum][dir].busy); // non-control skip if not busy
-    hcd_edpt_abort_xfer(dev->rhport, daddr, ep_addr);
+    hcd_edpt_abort_xfer(dev->bus_info.rhport, daddr, ep_addr);
 
     // mark as ready and release endpoint if transfer is aborted
     dev->ep_status[epnum][dir].busy = false;
@@ -885,9 +873,10 @@ bool tuh_edpt_abort_xfer(uint8_t daddr, uint8_t ep_addr) {
 // USBH API For Class Driver
 //--------------------------------------------------------------------+
 
-uint8_t usbh_get_rhport(uint8_t dev_addr) {
-  usbh_device_t *dev = get_device(dev_addr);
-  return dev ? dev->rhport : _dev0.rhport;
+uint8_t usbh_get_rhport(uint8_t daddr) {
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(daddr, &bus_info);
+  return bus_info.rhport;
 }
 
 uint8_t *usbh_get_enum_buf(void) {
@@ -972,7 +961,7 @@ bool usbh_edpt_xfer_with_callback(uint8_t dev_addr, uint8_t ep_addr, uint8_t* bu
   dev->ep_callback[epnum][dir].user_data   = user_data;
 #endif
 
-  if (hcd_edpt_xfer(dev->rhport, dev_addr, ep_addr, buffer, total_bytes)) {
+  if (hcd_edpt_xfer(dev->bus_info.rhport, dev_addr, ep_addr, buffer, total_bytes)) {
     TU_LOG_USBH("OK\r\n");
     return true;
   } else {
@@ -1024,19 +1013,14 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) {
 // HCD Event Handler
 //--------------------------------------------------------------------+
 
-void hcd_devtree_get_info(uint8_t dev_addr, hcd_devtree_info_t* devtree_info) {
-  usbh_device_t const* dev = get_device(dev_addr);
+bool hcd_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info) {
+  usbh_device_t const* dev = get_device(daddr);
   if (dev) {
-    devtree_info->rhport = dev->rhport;
-    devtree_info->hub_addr = dev->hub_addr;
-    devtree_info->hub_port = dev->hub_port;
-    devtree_info->speed = dev->speed;
+    *bus_info = dev->bus_info;
   } else {
-    devtree_info->rhport = _dev0.rhport;
-    devtree_info->hub_addr = _dev0.hub_addr;
-    devtree_info->hub_port = _dev0.hub_port;
-    devtree_info->speed = _dev0.speed;
+    *bus_info = _usbh_data.dev0_bus;
   }
+  return true;
 }
 
 TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr) {
@@ -1269,10 +1253,10 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_hub_addr(uint8_t daddr) {
 
 // a device unplugged from rhport:hub_addr:hub_port
 static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hub_port) {
-  // dev0 is unplugged
-  if ((_usbh_data.enumerating_daddr == 0) && (rhport == _dev0.rhport) &&
-      (hub_addr == _dev0.hub_addr) && (hub_port == _dev0.hub_port)) {
-    hcd_device_close(_dev0.rhport, 0);
+  // dev0_bus is unplugged
+  if ((_usbh_data.enumerating_daddr == 0) && (rhport == _usbh_data.dev0_bus.rhport) &&
+      (hub_addr == _usbh_data.dev0_bus.hub_addr) && (hub_port == _usbh_data.dev0_bus.hub_port)) {
+    hcd_device_close(_usbh_data.dev0_bus.rhport, 0);
     if (_ctrl_xfer.daddr == 0) {
       _control_set_xfer_stage(CONTROL_STAGE_IDLE);
     }
@@ -1288,9 +1272,9 @@ static void process_removing_device(uint8_t rhport, uint8_t hub_addr, uint8_t hu
       uint8_t const daddr = dev_id + 1;
 
       // hub_addr = 0 means roothub, hub_port = 0 means all devices of downstream hub
-      if (dev->rhport == rhport && dev->connected &&
-          (hub_addr == 0 || dev->hub_addr == hub_addr) &&
-          (hub_port == 0 || dev->hub_port == hub_port)) {
+      if (dev->bus_info.rhport == rhport && dev->connected &&
+          (hub_addr == 0 || dev->bus_info.hub_addr == hub_addr) &&
+          (hub_port == 0 || dev->bus_info.hub_port == hub_port)) {
         TU_LOG_USBH("[%u:%u:%u] unplugged address = %u\r\n", rhport, hub_addr, hub_port, daddr);
 
         if (is_hub_addr(daddr)) {
@@ -1439,12 +1423,12 @@ static void process_enumeration(tuh_xfer_t* xfer) {
         return;
       }
 
-      _dev0.speed = (port_status.status.high_speed) ? TUSB_SPEED_HIGH :
+      _usbh_data.dev0_bus.speed = (port_status.status.high_speed) ? TUSB_SPEED_HIGH :
                     (port_status.status.low_speed) ? TUSB_SPEED_LOW : TUSB_SPEED_FULL;
 
       // Acknowledge Port Reset Change
       if (port_status.change.reset) {
-        hub_port_clear_reset_change(_dev0.hub_addr, _dev0.hub_port,
+        hub_port_clear_reset_change(_usbh_data.dev0_bus.hub_addr, _usbh_data.dev0_bus.hub_port,
                                     process_enumeration, ENUM_ADDR0_DEVICE_DESC);
       }
       break;
@@ -1452,7 +1436,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 
     case ENUM_HUB_GET_STATUS_2:
       tusb_time_delay_ms_api(ENUM_RESET_DELAY_MS);
-      TU_ASSERT(hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_epbuf.ctrl,
+      TU_ASSERT(hub_port_get_status(_usbh_data.dev0_bus.hub_addr, _usbh_data.dev0_bus.hub_port, _usbh_epbuf.ctrl,
                                     process_enumeration, ENUM_HUB_CLEAR_RESET_2),);
       break;
 
@@ -1462,7 +1446,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 
       // Acknowledge Port Reset Change if Reset Successful
       if (port_status.change.reset) {
-        TU_ASSERT(hub_port_clear_reset_change(_dev0.hub_addr, _dev0.hub_port,
+        TU_ASSERT(hub_port_clear_reset_change(_usbh_data.dev0_bus.hub_addr, _usbh_data.dev0_bus.hub_port,
                                               process_enumeration, ENUM_SET_ADDR),);
       }
       break;
@@ -1495,7 +1479,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
       new_dev->addressed = 1;
       _usbh_data.enumerating_daddr = new_addr;
 
-      hcd_device_close(_dev0.rhport, 0); // close dev0
+      hcd_device_close(_usbh_data.dev0_bus.rhport, 0); // close dev0_bus
 
       TU_ASSERT(usbh_edpt_control_open(new_addr, new_dev->ep0_size),); // open new control endpoint
 
@@ -1667,38 +1651,38 @@ static void process_enumeration(tuh_xfer_t* xfer) {
 }
 
 static bool enum_new_device(hcd_event_t* event) {
-  _dev0.rhport = event->rhport;
-  _dev0.hub_addr = event->connection.hub_addr;
-  _dev0.hub_port = event->connection.hub_port;
+  _usbh_data.dev0_bus.rhport = event->rhport;
+  _usbh_data.dev0_bus.hub_addr = event->connection.hub_addr;
+  _usbh_data.dev0_bus.hub_port = event->connection.hub_port;
 
-  if (_dev0.hub_addr == 0) {
+  if (_usbh_data.dev0_bus.hub_addr == 0) {
     // connected directly to roothub
 
     // wait until device connection is stable TODO non blocking
     tusb_time_delay_ms_api(ENUM_DEBOUNCING_DELAY_MS);
 
     // device unplugged while delaying
-    if (!hcd_port_connect_status(_dev0.rhport)) {
+    if (!hcd_port_connect_status(_usbh_data.dev0_bus.rhport)) {
       enum_full_complete();
       return true;
     }
 
-    hcd_port_reset(_dev0.rhport); // reset device
+    hcd_port_reset(_usbh_data.dev0_bus.rhport); // reset device
 
     // Since we are in middle of rhport reset, frame number is not available yet.
     // need to depend on tusb_time_millis_api()
     tusb_time_delay_ms_api(ENUM_RESET_DELAY_MS);
 
-    hcd_port_reset_end(_dev0.rhport);
+    hcd_port_reset_end(_usbh_data.dev0_bus.rhport);
 
     // device unplugged while delaying
-    if (!hcd_port_connect_status(_dev0.rhport)) {
+    if (!hcd_port_connect_status(_usbh_data.dev0_bus.rhport)) {
       enum_full_complete();
       return true;
     }
 
-    _dev0.speed = hcd_port_speed_get(_dev0.rhport);
-    TU_LOG_USBH("%s Speed\r\n", tu_str_speed[_dev0.speed]);
+    _usbh_data.dev0_bus.speed = hcd_port_speed_get(_usbh_data.dev0_bus.rhport);
+    TU_LOG_USBH("%s Speed\r\n", tu_str_speed[_usbh_data.dev0.speed]);
 
     // fake transfer to kick-off the enumeration process
     tuh_xfer_t xfer;
@@ -1715,7 +1699,7 @@ static bool enum_new_device(hcd_event_t* event) {
     tusb_time_delay_ms_api(ENUM_DEBOUNCING_DELAY_MS);
 
     // ENUM_HUB_GET_STATUS
-    TU_ASSERT(hub_port_get_status(_dev0.hub_addr, _dev0.hub_port, _usbh_epbuf.ctrl,
+    TU_ASSERT(hub_port_get_status(_usbh_data.dev0_bus.hub_addr, _usbh_data.dev0_bus.hub_port, _usbh_epbuf.ctrl,
                                   process_enumeration, ENUM_HUB_CLEAR_RESET_1));
   }
 #endif // hub
@@ -1749,10 +1733,7 @@ static bool enum_request_set_addr(tusb_desc_device_t const* desc_device) {
   TU_LOG_USBH("Set Address = %d\r\n", new_addr);
 
   usbh_device_t* new_dev = get_device(new_addr);
-  new_dev->rhport = _dev0.rhport;
-  new_dev->hub_addr = _dev0.hub_addr;
-  new_dev->hub_port = _dev0.hub_port;
-  new_dev->speed = _dev0.speed;
+  new_dev->bus_info = _usbh_data.dev0_bus;
   new_dev->connected = 1;
   new_dev->ep0_size = desc_device->bMaxPacketSize0;
 
@@ -1768,7 +1749,7 @@ static bool enum_request_set_addr(tusb_desc_device_t const* desc_device) {
       .wLength  = 0
   };
   tuh_xfer_t xfer = {
-      .daddr       = 0, // dev0
+      .daddr       = 0,
       .ep_addr     = 0,
       .setup       = &request,
       .buffer      = NULL,
@@ -1841,7 +1822,7 @@ static bool enum_parse_configuration_desc(uint8_t dev_addr, tusb_desc_configurat
     // Find driver for this interface
     for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
       usbh_class_driver_t const * driver = get_driver(drv_id);
-      if (driver && driver->open(dev->rhport, dev_addr, desc_itf, drv_len) ) {
+      if (driver && driver->open(dev->bus_info.rhport, dev_addr, desc_itf, drv_len) ) {
         // open successfully
         TU_LOG_USBH("  %s opened\r\n", driver->name);
 
@@ -1860,9 +1841,9 @@ static bool enum_parse_configuration_desc(uint8_t dev_addr, tusb_desc_configurat
         break; // exit driver find loop
       }
 
-      if ( drv_id == TOTAL_DRIVER_COUNT - 1 ) {
+      if (drv_id == TOTAL_DRIVER_COUNT - 1) {
         TU_LOG_USBH("[%u:%u] Interface %u: class = %u subclass = %u protocol = %u is not supported\r\n",
-               dev->rhport, dev_addr, desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
+               dev->bus_info.rhport, dev_addr, desc_itf->bInterfaceNumber, desc_itf->bInterfaceClass, desc_itf->bInterfaceSubClass, desc_itf->bInterfaceProtocol);
       }
     }
 
@@ -1909,8 +1890,8 @@ static void enum_full_complete(void) {
   _usbh_data.enumerating_daddr = TUSB_INDEX_INVALID_8;
 
 #if CFG_TUH_HUB
-  if (_dev0.hub_addr) {
-    hub_edpt_status_xfer(_dev0.hub_addr); // get next hub status
+  if (_usbh_data.dev0_bus.hub_addr != 0) {
+    hub_edpt_status_xfer(_usbh_data.dev0_bus.hub_addr); // get next hub status
   }
 #endif
 
diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h
index bfa1fb2ba..61b012493 100644
--- a/src/host/usbh_pvt.h
+++ b/src/host/usbh_pvt.h
@@ -63,7 +63,7 @@ usbh_class_driver_t const* usbh_app_driver_get_cb(uint8_t* driver_count) TU_ATTR
 // Call by class driver to tell USBH that it has complete the enumeration
 void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num);
 
-uint8_t usbh_get_rhport(uint8_t dev_addr);
+uint8_t usbh_get_rhport(uint8_t daddr);
 
 uint8_t* usbh_get_enum_buf(void);
 
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 7451f69a3..141a2c026 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -837,8 +837,8 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
     tu_memclr(p_qhd, sizeof(ehci_qhd_t));
   }
 
-  hcd_devtree_info_t devtree_info;
-  hcd_devtree_get_info(dev_addr, &devtree_info);
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
 
   uint8_t const xfer_type = ep_desc->bmAttributes.xfer;
   uint8_t const interval = ep_desc->bInterval;
@@ -846,7 +846,7 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
   p_qhd->dev_addr           = dev_addr;
   p_qhd->fl_inactive_next_xact = 0;
   p_qhd->ep_number          = tu_edpt_number(ep_desc->bEndpointAddress);
-  p_qhd->ep_speed           = devtree_info.speed;
+  p_qhd->ep_speed           = bus_info.speed;
   p_qhd->data_toggle_control= (xfer_type == TUSB_XFER_CONTROL) ? 1 : 0;
   p_qhd->head_list_flag     = (dev_addr == 0) ? 1 : 0; // addr0's endpoint is the static async list head
   p_qhd->max_packet_size    = tu_edpt_packet_size(ep_desc);
@@ -887,8 +887,8 @@ static void qhd_init(ehci_qhd_t *p_qhd, uint8_t dev_addr, tusb_desc_endpoint_t c
     default: break;
   }
 
-  p_qhd->fl_hub_addr  = devtree_info.hub_addr;
-  p_qhd->fl_hub_port  = devtree_info.hub_port;
+  p_qhd->fl_hub_addr  = bus_info.hub_addr;
+  p_qhd->fl_hub_port  = bus_info.hub_port;
   p_qhd->mult         = 1; // TODO not use high bandwidth/park mode yet
 
   //------------- HCD Management Data -------------//
diff --git a/src/portable/mentor/musb/hcd_musb.c b/src/portable/mentor/musb/hcd_musb.c
index 811043d74..97ef46152 100644
--- a/src/portable/mentor/musb/hcd_musb.c
+++ b/src/portable/mentor/musb/hcd_musb.c
@@ -695,16 +695,16 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   _hcd.pipe0.length    = 8;
   _hcd.pipe0.remaining = 0;
 
-  hcd_devtree_info_t devtree;
-  hcd_devtree_get_info(dev_addr, &devtree);
-  switch (devtree.speed) {
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
+  switch (bus_info.speed) {
     default: return false;
     case TUSB_SPEED_LOW:  USB0->TYPE0 = USB_TYPE0_SPEED_LOW;  break;
     case TUSB_SPEED_FULL: USB0->TYPE0 = USB_TYPE0_SPEED_FULL; break;
     case TUSB_SPEED_HIGH: USB0->TYPE0 = USB_TYPE0_SPEED_HIGH; break;
   }
-  USB0->TXHUBADDR0     = devtree.hub_addr;
-  USB0->TXHUBPORT0     = devtree.hub_port;
+  USB0->TXHUBADDR0     = bus_info.hub_addr;
+  USB0->TXHUBPORT0     = bus_info.hub_port;
   USB0->TXFUNCADDR0    = dev_addr;
   USB0->CSRL0 = USB_CSRL0_TXRDY | USB_CSRL0_SETUP;
   return true;
@@ -744,9 +744,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   pipe->remaining = 0;
 
   uint8_t pipe_type = 0;
-  hcd_devtree_info_t devtree;
-  hcd_devtree_get_info(dev_addr, &devtree);
-  switch (devtree.speed) {
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
+  switch (bus_info.speed) {
     default: return false;
     case TUSB_SPEED_LOW:  pipe_type |= USB_TXTYPE1_SPEED_LOW;  break;
     case TUSB_SPEED_FULL: pipe_type |= USB_TXTYPE1_SPEED_FULL; break;
@@ -763,8 +763,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   hw_endpoint_t volatile *regs = edpt_regs(pipenum - 1);
   if (dir_tx) {
     fadr->TXFUNCADDR = dev_addr;
-    fadr->TXHUBADDR  = devtree.hub_addr;
-    fadr->TXHUBPORT  = devtree.hub_port;
+    fadr->TXHUBADDR  = bus_info.hub_addr;
+    fadr->TXHUBPORT  = bus_info.hub_port;
     regs->TXMAXP     = mps;
     regs->TXTYPE     = pipe_type | epn;
     regs->TXINTERVAL = ep_desc->bInterval;
@@ -775,8 +775,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
     USB0->TXIE |= TU_BIT(pipenum);
   } else {
     fadr->RXFUNCADDR = dev_addr;
-    fadr->RXHUBADDR  = devtree.hub_addr;
-    fadr->RXHUBPORT  = devtree.hub_port;
+    fadr->RXHUBADDR  = bus_info.hub_addr;
+    fadr->RXHUBPORT  = bus_info.hub_port;
     regs->RXMAXP     = mps;
     regs->RXTYPE     = pipe_type | epn;
     regs->RXINTERVAL = ep_desc->bInterval;
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index 672ad0443..465b6731c 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -328,13 +328,13 @@ static void ed_init(ohci_ed_t *p_ed, uint8_t dev_addr, uint16_t ep_size, uint8_t
     tu_memclr(p_ed, sizeof(ohci_ed_t));
   }
 
-  hcd_devtree_info_t devtree_info;
-  hcd_devtree_get_info(dev_addr, &devtree_info);
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
 
   p_ed->dev_addr          = dev_addr;
   p_ed->ep_number         = ep_addr & 0x0F;
   p_ed->pid               = (xfer_type == TUSB_XFER_CONTROL) ? PID_FROM_TD : (tu_edpt_dir(ep_addr) ? PID_IN : PID_OUT);
-  p_ed->speed             = devtree_info.speed;
+  p_ed->speed             = bus_info.speed;
   p_ed->is_iso            = (xfer_type == TUSB_XFER_ISOCHRONOUS) ? 1 : 0;
   p_ed->max_packet_size   = ep_size;
 
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index 225a44dcf..0e3d0d31a 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -114,9 +114,9 @@ void hcd_int_disable(uint8_t rhport) {
 //--------------------------------------------------------------------+
 
 bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *desc_ep) {
-  hcd_devtree_info_t dev_tree;
-  hcd_devtree_get_info(dev_addr, &dev_tree);
-  bool const need_pre = (dev_tree.hub_addr && dev_tree.speed == TUSB_SPEED_LOW);
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
+  bool const need_pre = (bus_info.hub_addr && bus_info.speed == TUSB_SPEED_LOW);
 
   uint8_t const pio_rhport = RHPORT_PIO(rhport);
   return pio_usb_host_endpoint_open(pio_rhport, dev_addr, (uint8_t const *) desc_ep, need_pre);
diff --git a/src/portable/renesas/rusb2/hcd_rusb2.c b/src/portable/renesas/rusb2/hcd_rusb2.c
index 3e4b36981..e6975287d 100644
--- a/src/portable/renesas/rusb2/hcd_rusb2.c
+++ b/src/portable/renesas/rusb2/hcd_rusb2.c
@@ -662,13 +662,13 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
 
   if (0 == epn) {
     rusb->DCPCTR = RUSB2_PIPE_CTR_PID_NAK;
-    hcd_devtree_info_t devtree;
-    hcd_devtree_get_info(dev_addr, &devtree);
+    tuh_bus_info_t bus_info;
+    hcd_bus_info_get(dev_addr, &bus_info);
     uint16_t volatile *devadd = (uint16_t volatile *)(uintptr_t) &rusb->DEVADD[0];
     devadd += dev_addr;
     while (rusb->DCPCTR_b.PBUSY) {}
     rusb->DCPMAXP = (dev_addr << 12) | mps;
-    *devadd = (TUSB_SPEED_FULL == devtree.speed) ? RUSB2_DEVADD_USBSPD_FS : RUSB2_DEVADD_USBSPD_LS;
+    *devadd = (TUSB_SPEED_FULL == bus_info.speed) ? RUSB2_DEVADD_USBSPD_FS : RUSB2_DEVADD_USBSPD_LS;
     _hcd.ctl_mps[dev_addr] = mps;
     return true;
   }
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index 53bc0b059..6fd343686 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -475,8 +475,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t*
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   const tusb_speed_t rh_speed = hprt_speed_get(dwc2);
 
-  hcd_devtree_info_t devtree_info;
-  hcd_devtree_get_info(dev_addr, &devtree_info);
+  tuh_bus_info_t bus_info;
+  hcd_bus_info_get(dev_addr, &bus_info);
 
   // find a free endpoint
   const uint8_t ep_id = edpt_alloc();
@@ -487,7 +487,7 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t*
   hcchar_bm->ep_size         = tu_edpt_packet_size(desc_ep);
   hcchar_bm->ep_num          = tu_edpt_number(desc_ep->bEndpointAddress);
   hcchar_bm->ep_dir          = tu_edpt_dir(desc_ep->bEndpointAddress);
-  hcchar_bm->low_speed_dev   = (devtree_info.speed == TUSB_SPEED_LOW) ? 1 : 0;
+  hcchar_bm->low_speed_dev   = (bus_info.speed == TUSB_SPEED_LOW) ? 1 : 0;
   hcchar_bm->ep_type         = desc_ep->bmAttributes.xfer; // ep_type matches TUSB_XFER_*
   hcchar_bm->err_multi_count = 0;
   hcchar_bm->dev_addr        = dev_addr;
@@ -496,21 +496,21 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t*
   hcchar_bm->enable          = 1;
 
   dwc2_channel_split_t* hcsplt_bm = &edpt->hcsplt_bm;
-  hcsplt_bm->hub_port        = devtree_info.hub_port;
-  hcsplt_bm->hub_addr        = devtree_info.hub_addr;
+  hcsplt_bm->hub_port        = bus_info.hub_port;
+  hcsplt_bm->hub_addr        = bus_info.hub_addr;
   hcsplt_bm->xact_pos        = 0;
   hcsplt_bm->split_compl     = 0;
-  hcsplt_bm->split_en        = (rh_speed == TUSB_SPEED_HIGH && devtree_info.speed != TUSB_SPEED_HIGH) ? 1 : 0;
+  hcsplt_bm->split_en        = (rh_speed == TUSB_SPEED_HIGH && bus_info.speed != TUSB_SPEED_HIGH) ? 1 : 0;
 
-  edpt->speed = devtree_info.speed;
+  edpt->speed = bus_info.speed;
   edpt->next_pid = HCTSIZ_PID_DATA0;
   if (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS) {
     edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
-    if (devtree_info.speed == TUSB_SPEED_FULL) {
+    if (bus_info.speed == TUSB_SPEED_FULL) {
       edpt->uframe_interval <<= 3;
     }
   } else if (desc_ep->bmAttributes.xfer == TUSB_XFER_INTERRUPT) {
-    if (devtree_info.speed == TUSB_SPEED_HIGH) {
+    if (bus_info.speed == TUSB_SPEED_HIGH) {
       edpt->uframe_interval = 1 << (desc_ep->bInterval - 1);
     } else {
       edpt->uframe_interval = desc_ep->bInterval << 3;
-- 
cgit v1.3.1


From baf67539fc2d328a6274c35c18c90da27c37bc60 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 13 May 2025 10:28:42 +0700
Subject: fix warnings, minor clean up

---
 .github/actions/setup_toolchain/toolchain.json |   2 +-
 examples/host/cdc_msc_hid/src/hid_app.c        | 100 ++++++++-----------------
 src/class/cdc/cdc_host.c                       |   2 +-
 src/class/hid/hid_host.c                       |   6 +-
 src/host/hub.c                                 |   1 -
 src/host/usbh.c                                |   5 +-
 6 files changed, 41 insertions(+), 75 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/.github/actions/setup_toolchain/toolchain.json b/.github/actions/setup_toolchain/toolchain.json
index ea07ca344..f7123ef11 100644
--- a/.github/actions/setup_toolchain/toolchain.json
+++ b/.github/actions/setup_toolchain/toolchain.json
@@ -1,7 +1,7 @@
 {
   "aarch64-gcc": "https://developer.arm.com/-/media/Files/downloads/gnu-a/10.3-2021.07/binrel/gcc-arm-10.3-2021.07-x86_64-aarch64-none-elf.tar.xz",
   "arm-clang": "https://github.com/ARM-software/LLVM-embedded-toolchain-for-Arm/releases/download/release-19.1.1/LLVM-ET-Arm-19.1.1-Linux-x86_64.tar.xz",
-  "arm-gcc": "https://github.com/xpack-dev-tools/gcc-xpack/releases/download/v14.2.0-1/xpack-gcc-14.2.0-1-linux-x64.tar.gz",
+  "arm-gcc": "https://github.com/xpack-dev-tools/arm-none-eabi-gcc-xpack/releases/download/v14.2.1-1.1/xpack-arm-none-eabi-gcc-14.2.1-1.1-linux-x64.tar.gz",
   "msp430-gcc": "http://software-dl.ti.com/msp430/msp430_public_sw/mcu/msp430/MSPGCC/9_2_0_0/export/msp430-gcc-9.2.0.50_linux64.tar.bz2",
   "riscv-gcc": "https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack/releases/download/v13.2.0-2/xpack-riscv-none-elf-gcc-13.2.0-2-linux-x64.tar.gz",
   "rx-gcc": "https://github.com/hathach/rx_device/releases/download/0.0.1/gcc-8.3.0.202411-GNURX-ELF.run",
diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index a751c9c80..6f01d6f45 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -29,14 +29,9 @@
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
 //--------------------------------------------------------------------+
+#define MAX_REPORT 4
 
-// If your host terminal support ansi escape code such as TeraTerm
-// it can be use to simulate mouse cursor movement within terminal
-#define USE_ANSI_ESCAPE   0
-
-#define MAX_REPORT  4
-
-static uint8_t const keycode2ascii[128][2] =  { HID_KEYCODE_TO_ASCII };
+static uint8_t const keycode2ascii[128][2] = {HID_KEYCODE_TO_ASCII};
 
 // Each HID instance can has multiple reports
 static struct {
@@ -45,8 +40,8 @@ static struct {
 } hid_info[CFG_TUH_HID];
 
 static void process_kbd_report(hid_keyboard_report_t const *report);
-static void process_mouse_report(hid_mouse_report_t const * report);
-static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const* report, uint16_t len);
+static void process_mouse_report(hid_mouse_report_t const *report);
+static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t const *report, uint16_t len);
 
 void hid_app_task(void) {
   // nothing to do
@@ -70,7 +65,7 @@ void tuh_hid_mount_cb(uint8_t dev_addr, uint8_t instance, uint8_t const *desc_re
 
   printf("HID Interface Protocol = %s\r\n", protocol_str[itf_protocol]);
 
-  // By default host stack will use activate boot protocol on supported interface.
+  // By default, host stack will use boot protocol on supported interface.
   // Therefore for this simple example, we only need to parse generic report descriptor (with built-in parser)
   if (itf_protocol == HID_ITF_PROTOCOL_NONE) {
     hid_info[instance].report_count = tuh_hid_parse_report_descriptor(hid_info[instance].report_info, MAX_REPORT, desc_report, desc_len);
@@ -121,7 +116,7 @@ void tuh_hid_report_received_cb(uint8_t dev_addr, uint8_t instance, uint8_t cons
 //--------------------------------------------------------------------+
 
 // look up new key in previous keys
-static inline bool find_key_in_report(hid_keyboard_report_t const* report, uint8_t keycode) {
+static inline bool find_key_in_report(hid_keyboard_report_t const *report, uint8_t keycode) {
   for (uint8_t i = 0; i < 6; i++) {
     if (report->keycode[i] == keycode) {
       return true;
@@ -130,28 +125,25 @@ static inline bool find_key_in_report(hid_keyboard_report_t const* report, uint8
   return false;
 }
 
-static void process_kbd_report(hid_keyboard_report_t const *report)
-{
-  static hid_keyboard_report_t prev_report = { 0, 0, {0} }; // previous report to check key released
+static void process_kbd_report(hid_keyboard_report_t const *report) {
+  static hid_keyboard_report_t prev_report = {0, 0, {0}};// previous report to check key released
 
   //------------- example code ignore control (non-printable) key affects -------------//
-  for(uint8_t i=0; i<6; i++)
-  {
-    if ( report->keycode[i] )
-    {
-      if ( find_key_in_report(&prev_report, report->keycode[i]) )
-      {
+  for (uint8_t i = 0; i < 6; i++) {
+    if (report->keycode[i]) {
+      if (find_key_in_report(&prev_report, report->keycode[i])) {
         // exist in previous report means the current key is holding
-      }else
-      {
+      } else {
         // not existed in previous report means the current key is pressed
         bool const is_shift = report->modifier & (KEYBOARD_MODIFIER_LEFTSHIFT | KEYBOARD_MODIFIER_RIGHTSHIFT);
         uint8_t ch = keycode2ascii[report->keycode[i]][is_shift ? 1 : 0];
         putchar(ch);
-        if ( ch == '\r' ) putchar('\n'); // added new line for enter key
+        if (ch == '\r') {
+          putchar('\n');
+        }
 
-        #ifndef __ICCARM__ // TODO IAR doesn't support stream control ?
-        fflush(stdout); // flush right away, else nanolib will wait for newline
+        #ifndef __ICCARM__     // TODO IAR doesn't support stream control ?
+        fflush(stdout);// flush right away, else nanolib will wait for newline
         #endif
       }
     }
@@ -166,55 +158,22 @@ static void process_kbd_report(hid_keyboard_report_t const *report)
 //--------------------------------------------------------------------+
 
 static void cursor_movement(int8_t x, int8_t y, int8_t wheel) {
-#if USE_ANSI_ESCAPE
-  // Move X using ansi escape
-  if ( x < 0)
-  {
-    printf(ANSI_CURSOR_BACKWARD(%d), (-x)); // move left
-  }else if ( x > 0)
-  {
-    printf(ANSI_CURSOR_FORWARD(%d), x); // move right
-  }
-
-  // Move Y using ansi escape
-  if ( y < 0)
-  {
-    printf(ANSI_CURSOR_UP(%d), (-y)); // move up
-  }else if ( y > 0)
-  {
-    printf(ANSI_CURSOR_DOWN(%d), y); // move down
-  }
-
-  // Scroll using ansi escape
-  if (wheel < 0)
-  {
-    printf(ANSI_SCROLL_UP(%d), (-wheel)); // scroll up
-  }else if (wheel > 0)
-  {
-    printf(ANSI_SCROLL_DOWN(%d), wheel); // scroll down
-  }
-
-  printf("\r\n");
-#else
   printf("(%d %d %d)\r\n", x, y, wheel);
-#endif
 }
 
-static void process_mouse_report(hid_mouse_report_t const * report)
-{
-  static hid_mouse_report_t prev_report = { 0 };
+static void process_mouse_report(hid_mouse_report_t const *report) {
+  static hid_mouse_report_t prev_report = {0};
 
-  //------------- button state  -------------//
+  // button state
   uint8_t button_changed_mask = report->buttons ^ prev_report.buttons;
-  if ( button_changed_mask & report->buttons)
-  {
+  if (button_changed_mask & report->buttons) {
     printf(" %c%c%c ",
-       report->buttons & MOUSE_BUTTON_LEFT   ? 'L' : '-',
-       report->buttons & MOUSE_BUTTON_MIDDLE ? 'M' : '-',
-       report->buttons & MOUSE_BUTTON_RIGHT  ? 'R' : '-');
+           report->buttons & MOUSE_BUTTON_LEFT ? 'L' : '-',
+           report->buttons & MOUSE_BUTTON_MIDDLE ? 'M' : '-',
+           report->buttons & MOUSE_BUTTON_RIGHT ? 'R' : '-');
   }
 
-  //------------- cursor movement -------------//
+  // cursor movement
   cursor_movement(report->x, report->y, report->wheel);
 }
 
@@ -263,18 +222,23 @@ static void process_generic_report(uint8_t dev_addr, uint8_t instance, uint8_t c
   if (rpt_info->usage_page == HID_USAGE_PAGE_DESKTOP) {
     switch (rpt_info->usage) {
       case HID_USAGE_DESKTOP_KEYBOARD:
-        TU_LOG1("HID receive keyboard report\r\n");
+        TU_LOG2("HID receive keyboard report\r\n");
         // Assume keyboard follow boot report layout
         process_kbd_report((hid_keyboard_report_t const *) report);
         break;
 
       case HID_USAGE_DESKTOP_MOUSE:
-        TU_LOG1("HID receive mouse report\r\n");
+        TU_LOG2("HID receive mouse report\r\n");
         // Assume mouse follow boot report layout
         process_mouse_report((hid_mouse_report_t const *) report);
         break;
 
       default:
+        printf("report[%u] ", rpt_info->report_id);
+        for (uint8_t i = 0; i < len; i++) {
+          printf("%02X ", report[i]);
+        }
+        printf("\r\n");
         break;
     }
   }
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 4058857c5..bf245db3f 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -672,7 +672,7 @@ void cdch_close(uint8_t daddr) {
 
 bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes) {
   // TODO handle stall response, retry failed transfer ...
-  TU_ASSERT(event == XFER_RESULT_SUCCESS);
+  TU_VERIFY(event == XFER_RESULT_SUCCESS);
 
   uint8_t const idx = get_idx_by_ep_addr(daddr, ep_addr);
   cdch_interface_t * p_cdc = get_itf(idx);
diff --git a/src/class/hid/hid_host.c b/src/class/hid/hid_host.c
index a3cc7d6d7..57e437196 100644
--- a/src/class/hid/hid_host.c
+++ b/src/class/hid/hid_host.c
@@ -444,7 +444,7 @@ bool hidh_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t result, uint32_t
   hidh_epbuf_t* epbuf = get_hid_epbuf(idx);
 
   if (dir == TUSB_DIR_IN) {
-    TU_LOG_DRV("  Get Report callback (%u, %u)\r\n", daddr, idx);
+    TU_LOG_DRV("  [idx=%u] Get Report callback\r\n", idx);
     TU_LOG3_MEM(epbuf->epin, xferred_bytes, 2);
     tuh_hid_report_received_cb(daddr, idx, epbuf->epin, (uint16_t) xferred_bytes);
   } else {
@@ -461,7 +461,9 @@ void hidh_close(uint8_t daddr) {
     hidh_interface_t* p_hid = &_hidh_itf[i];
     if (p_hid->daddr == daddr) {
       TU_LOG_DRV("  HIDh close addr = %u index = %u\r\n", daddr, i);
-      if (tuh_hid_umount_cb) tuh_hid_umount_cb(daddr, i);
+      if (tuh_hid_umount_cb) {
+        tuh_hid_umount_cb(daddr, i);
+      }
       tu_memclr(p_hid, sizeof(hidh_interface_t));
     }
   }
diff --git a/src/host/hub.c b/src/host/hub.c
index 0ed0e0c42..0b172a596 100644
--- a/src/host/hub.c
+++ b/src/host/hub.c
@@ -201,7 +201,6 @@ bool hub_port_get_status(uint8_t hub_addr, uint8_t hub_port, void* resp,
 
 bool hub_port_get_status_local(uint8_t hub_addr, uint8_t hub_port, hub_port_status_response_t* resp) {
   (void) hub_port;
-  TU_VERIFY(hub_addr > CFG_TUH_DEVICE_MAX);
   hub_interface_t* p_hub = get_hub_itf(hub_addr);
   *resp = p_hub->port_status;
   return true;
diff --git a/src/host/usbh.c b/src/host/usbh.c
index a3d79a105..8ab1402dc 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -579,7 +579,8 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
         uint8_t const epnum = tu_edpt_number(ep_addr);
         uint8_t const ep_dir = (uint8_t) tu_edpt_dir(ep_addr);
 
-        TU_LOG_USBH("on EP %02X with %u bytes: %s\r\n", ep_addr, (unsigned int) event.xfer_complete.len, tu_str_xfer_result[event.xfer_complete.result]);
+        TU_LOG_USBH("[:%u] on EP %02X with %u bytes: %s\r\n",
+                    event.dev_addr, ep_addr, (unsigned int) event.xfer_complete.len, tu_str_xfer_result[event.xfer_complete.result]);
 
         if (event.dev_addr == 0) {
           // device 0 only has control endpoint
@@ -618,7 +619,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
               uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
               usbh_class_driver_t const* driver = get_driver(drv_id);
               if (driver) {
-                TU_LOG_USBH("%s xfer callback\r\n", driver->name);
+                TU_LOG_USBH("  %s xfer callback\r\n", driver->name);
                 driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
                                 event.xfer_complete.len);
               } else {
-- 
cgit v1.3.1


From 56c9521abdef663b455a345c99a4f6b22591aa56 Mon Sep 17 00:00:00 2001
From: James Sandison <james.s@advateklighting.com>
Date: Wed, 4 Jun 2025 11:21:27 +1000
Subject: chore: squash previous commits from other branches

---
 docs/reference/boards.rst                          |    2 +
 docs/reference/dependencies.rst                    |    1 +
 examples/build_system/cmake/cpu/cortex-m55.cmake   |   26 +
 examples/build_system/make/cpu/cortex-m55.mk       |   28 +
 examples/device/net_lwip_webserver/skip.txt        |    1 +
 examples/host/bare_api/only.txt                    |    1 +
 examples/host/cdc_msc_hid/only.txt                 |    1 +
 examples/host/cdc_msc_hid_freertos/only.txt        |    1 +
 examples/host/device_info/only.txt                 |    1 +
 examples/host/hid_controller/only.txt              |    1 +
 examples/host/midi_rx/only.txt                     |    1 +
 examples/host/msc_file_explorer/only.txt           |    1 +
 hw/bsp/stm32n6/FreeRTOSConfig/FreeRTOSConfig.h     |  149 ++
 .../stm32n657nucleo/STM32N657XX_AXISRAM2_fsbl.ld   |  203 +++
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake  |   25 +
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h      |  283 ++++
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk     |   23 +
 .../boards/stm32n657nucleo/tcpp0203/LICENSE.txt    |    6 +
 .../stm32n657nucleo/tcpp0203/Release_Notes.html    |  205 +++
 .../stm32n657nucleo/tcpp0203/_htmresc/favicon.png  |  Bin 0 -> 4126 bytes
 .../tcpp0203/_htmresc/mini-st_2020.css             | 1703 ++++++++++++++++++++
 .../tcpp0203/_htmresc/st_logo_2020.png             |  Bin 0 -> 7520 bytes
 .../boards/stm32n657nucleo/tcpp0203/tcpp0203.c     |  886 ++++++++++
 .../boards/stm32n657nucleo/tcpp0203/tcpp0203.h     |  353 ++++
 .../boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.c |   73 +
 .../boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.h |   98 ++
 hw/bsp/stm32n6/family.c                            |  276 ++++
 hw/bsp/stm32n6/family.cmake                        |  147 ++
 hw/bsp/stm32n6/family.mk                           |  101 ++
 hw/bsp/stm32n6/partition_stm32n657xx.h             |  792 +++++++++
 hw/bsp/stm32n6/stm32n6xx_hal_conf.h                |  504 ++++++
 hw/bsp/zephyr_board_aliases.cmake                  |    1 +
 src/common/tusb_mcu.h                              |    9 +
 src/portable/synopsys/dwc2/dcd_dwc2.c              |    5 +
 src/portable/synopsys/dwc2/dwc2_info.py            |    1 +
 src/portable/synopsys/dwc2/dwc2_stm32.h            |   11 +
 src/portable/synopsys/dwc2/hcd_dwc2.c              |    4 +
 src/tusb_option.h                                  |    1 +
 tools/get_deps.py                                  |    8 +-
 39 files changed, 5931 insertions(+), 1 deletion(-)
 create mode 100644 examples/build_system/cmake/cpu/cortex-m55.cmake
 create mode 100644 examples/build_system/make/cpu/cortex-m55.mk
 create mode 100644 hw/bsp/stm32n6/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/STM32N657XX_AXISRAM2_fsbl.ld
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/LICENSE.txt
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/Release_Notes.html
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/favicon.png
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/mini-st_2020.css
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/st_logo_2020.png
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.c
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.h
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.c
 create mode 100644 hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.h
 create mode 100644 hw/bsp/stm32n6/family.c
 create mode 100644 hw/bsp/stm32n6/family.cmake
 create mode 100644 hw/bsp/stm32n6/family.mk
 create mode 100644 hw/bsp/stm32n6/partition_stm32n657xx.h
 create mode 100644 hw/bsp/stm32n6/stm32n6xx_hal_conf.h

(limited to 'examples/host/cdc_msc_hid')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 5786b2182..317a40c9c 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -269,6 +269,8 @@ stm32l412nucleo      STM32 L412 Nucleo                  stm32l4   https://www.st
 stm32l476disco       STM32 L476 Disco                   stm32l4   https://www.st.com/en/evaluation-tools/32l476gdiscovery.html
 stm32l4p5nucleo      STM32 L4P5 Nucleo                  stm32l4   https://www.st.com/en/evaluation-tools/nucleo-l4p5zg.html
 stm32l4r5nucleo      STM32 L4R5 Nucleo                  stm32l4   https://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html
+stm32n657_dk         STM32 N657 Discovery Kit           stm32n6   https://www.st.com/en/evaluation-tools/stm32n6570-dk.html
+stm32n657nucleo      STM32 N657 Nucleo                  stm32n6   https://www.st.com/en/evaluation-tools/nucleo-n657x0-q.html
 b_u585i_iot2a        STM32 B-U585i IOT2A Discovery kit  stm32u5   https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html
 stm32u545nucleo      STM32 U545 Nucleo                  stm32u5   https://www.st.com/en/evaluation-tools/nucleo-u545re-q.html
 stm32u575eval        STM32 U575 Eval                    stm32u5   https://www.st.com/en/evaluation-tools/stm32u575i-ev.html
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index e124466da..98545b4cf 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -57,6 +57,7 @@ hw/mcu/st/stm32l0xx_hal_driver            https://github.com/STMicroelectronics/
 hw/mcu/st/stm32l1xx_hal_driver            https://github.com/STMicroelectronics/stm32l1xx_hal_driver.git  44efc446fa69ed8344e7fd966e68ed11043b35d9  stm32l1
 hw/mcu/st/stm32l4xx_hal_driver            https://github.com/STMicroelectronics/stm32l4xx_hal_driver.git  aee3d5bf283ae5df87532b781bdd01b7caf256fc  stm32l4
 hw/mcu/st/stm32l5xx_hal_driver            https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git  675c32a75df37f39d50d61f51cb0dcf53f07e1cb  stm32l5
+hw/mcu/st/stm32n6xx_hal_driver            https://github.com/STMicroelectronics/stm32n6xx-hal-driver.git  49f9989d10cf6817d4b07ac01848956b46bd0fd6  stm32n6
 hw/mcu/st/stm32u5xx_hal_driver            https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git  4d93097a67928e9377e655ddd14622adc31b9770  stm32u5
 hw/mcu/st/stm32wbxx_hal_driver            https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git  2c5f06638be516c1b772f768456ba637f077bac8  stm32wb
 hw/mcu/ti                                 https://github.com/hathach/ti_driver.git                        143ed6cc20a7615d042b03b21e070197d473e6e5  msp430 msp432e4 tm4c
diff --git a/examples/build_system/cmake/cpu/cortex-m55.cmake b/examples/build_system/cmake/cpu/cortex-m55.cmake
new file mode 100644
index 000000000..a7a57957c
--- /dev/null
+++ b/examples/build_system/cmake/cpu/cortex-m55.cmake
@@ -0,0 +1,26 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mthumb
+    -mcpu=cortex-m55
+    -mfloat-abi=hard
+    -mfpu=fpv5-d16
+    -mcmse
+    )
+  set(FREERTOS_PORT GCC_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "clang")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --target=arm-none-eabi
+    -mcpu=cortex-m55
+    -mfpu=fpv5-d16
+    )
+  set(FREERTOS_PORT GCC_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  set(TOOLCHAIN_COMMON_FLAGS
+    --cpu cortex-m55
+    --fpu VFPv5_D16
+    )
+  set(FREERTOS_PORT IAR_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
+
+endif ()
diff --git a/examples/build_system/make/cpu/cortex-m55.mk b/examples/build_system/make/cpu/cortex-m55.mk
new file mode 100644
index 000000000..de627caed
--- /dev/null
+++ b/examples/build_system/make/cpu/cortex-m55.mk
@@ -0,0 +1,28 @@
+ifeq ($(TOOLCHAIN),gcc)
+  CFLAGS += \
+    -mthumb \
+    -mcpu=cortex-m55 \
+    -mfloat-abi=hard \
+    -mfpu=fpv5-d16 \
+    -mcmse
+
+else ifeq ($(TOOLCHAIN),clang)
+  CFLAGS += \
+	  --target=arm-none-eabi \
+	  -mcpu=cortex-m55 \
+	  -mfpu=fpv5-d16 \
+
+else ifeq ($(TOOLCHAIN),iar)
+  CFLAGS += \
+  	--cpu cortex-m55 \
+  	--fpu VFPv5_D16 \
+
+  ASFLAGS += \
+		--cpu cortex-m55 \
+		--fpu VFPv5_D16 \
+
+else
+  $(error "TOOLCHAIN is not supported")
+endif
+
+FREERTOS_PORTABLE_SRC ?= $(FREERTOS_PORTABLE_PATH)/ARM_CM55_NTZ/non_secure
diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index 5ebe71612..c2e0d54ec 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -10,6 +10,7 @@ mcu:SAMD11
 mcu:STM32L0
 mcu:STM32F0
 mcu:KINETIS_KL
+mcu:STM32N6
 family:broadcom_64bit
 family:broadcom_32bit
 family:espressif
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 95f9f1d82..9b8d535e6 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 95f9f1d82..9b8d535e6 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index e3ae25260..4ff3841a4 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -13,3 +13,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index b6f87f423..6e6e2184f 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -18,3 +18,4 @@ mcu:RAXXX
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index 95f9f1d82..9b8d535e6 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index b6f87f423..6e6e2184f 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -18,3 +18,4 @@ mcu:RAXXX
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 95f9f1d82..9b8d535e6 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -15,3 +15,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:STM32N6
diff --git a/hw/bsp/stm32n6/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32n6/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..9fd3f6c50
--- /dev/null
+++ b/hw/bsp/stm32n6/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,149 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32h7rsxx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*8*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/STM32N657XX_AXISRAM2_fsbl.ld b/hw/bsp/stm32n6/boards/stm32n657nucleo/STM32N657XX_AXISRAM2_fsbl.ld
new file mode 100644
index 000000000..e4c792cd8
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/STM32N657XX_AXISRAM2_fsbl.ld
@@ -0,0 +1,203 @@
+/*
+******************************************************************************
+**
+** @file        : STM32N657XX_AXISRAM2_fsbl.ld
+**
+** @author      : GPM Application Team
+**
+** @brief       : Linker script for STM32N657XX Device from STM32N6 series
+**                      512 KBytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2023 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+_sstack = _estack - _Min_Stack_Size;
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x800; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  ROM    (xrw)    : ORIGIN = 0x34180400,   LENGTH = 255K
+  RAM    (xrw)    : ORIGIN = 0x341C0000,   LENGTH = 256K
+}
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "RAM" Ram type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >ROM
+
+  /* The program code and other data into "RAM" Ram type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >ROM
+
+  /* Constant data into "RAM" Ram type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM.extab   (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+   {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+   {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >ROM
+
+  .preinit_array     (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  .init_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  .fini_array (READONLY) : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> ROM
+
+  .noncacheable :
+  {
+    . = ALIGN(8);
+    __snoncacheable = .;/* create symbol for start of section */
+    KEEP(*(.noncacheable))
+    . = ALIGN(8);
+    __enoncacheable = .;  /* create symbol for end of section */
+  } > RAM
+
+
+  .gnu.sgstubs :
+  {
+    . = ALIGN(4);
+    *(.gnu.sgstubs*)   /* Secure Gateway stubs */
+    . = ALIGN(4);
+  } >ROM
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
new file mode 100644
index 000000000..197b5108f
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
@@ -0,0 +1,25 @@
+set(MCU_VARIANT stm32n657xx)
+set(JLINK_DEVICE stm32n6xx)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_LRUN.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+
+function(update_board TARGET)
+
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32N6xx
+    SEGGER_RTT_SECTION="noncacheable_buffer"
+    BUFFER_SIZE_UP=0x3000
+    )
+
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tcpp0203/tcpp0203.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tcpp0203/tcpp0203_reg.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tcpp0203
+    )
+endfunction()
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
new file mode 100644
index 000000000..d3781c6d0
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
@@ -0,0 +1,283 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: STM32 H723 Nucleo
+   url: https://www.st.com/en/evaluation-tools/nucleo-h723zg.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "stm32n657xx.h"
+#include "stm32n6xx_ll_exti.h"
+#include "stm32n6xx_ll_system.h"
+#include "tcpp0203.h"
+
+#define UART_DEV USART1
+#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+
+#define BOARD_TUD_RHPORT 1
+
+// VBUS Sense detection
+#define OTG_FS_VBUS_SENSE 1
+#define OTG_HS_VBUS_SENSE 1
+
+#define PINID_LED 0
+#define PINID_BUTTON 1
+#define PINID_UART_TX 2
+#define PINID_UART_RX 3
+#define PINID_TCPP0203_EN 4
+
+static board_pindef_t board_pindef[] = {
+    {// LED
+     .port = GPIOG,
+     .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+     .active_state = 1},
+    {// Button
+     .port = GPIOC,
+     .pin_init = {.Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+     .active_state = 1},
+    {// UART TX
+     .port = GPIOE,
+     .pin_init = {.Pin = GPIO_PIN_5, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF7_USART1},
+     .active_state = 0},
+    {// UART RX
+     .port = GPIOE,
+     .pin_init = {.Pin = GPIO_PIN_6, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF7_USART1},
+     .active_state = 0},
+    {// VBUS input pin used for TCPP0203 EN
+     .port = GPIOA,
+     .pin_init = {.Pin = GPIO_PIN_7, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+     .active_state = 0},
+    {
+        // I2C SCL for TCPP0203
+        .port = GPIOB,
+        .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    },
+    {
+        // I2C SDA for TCPP0203
+        .port = GPIOB,
+        .pin_init = {.Pin = GPIO_PIN_11, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    },
+    {
+        // INT for TCPP0203
+        .port = GPIOD,
+        .pin_init = {.Pin = GPIO_PIN_2, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+    },
+};
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+void SystemClock_Config(void) {
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  /* Configure the power domain */
+  if (HAL_PWREx_ConfigSupply(PWR_EXTERNAL_SOURCE_SUPPLY) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /* Get current CPU/System buses clocks configuration */
+  /* and if necessary switch to intermediate HSI clock */
+  /* to ensure target clock can be set                 */
+  HAL_RCC_GetClockConfig(&RCC_ClkInitStruct);
+  if ((RCC_ClkInitStruct.CPUCLKSource == RCC_CPUCLKSOURCE_IC1) ||
+      (RCC_ClkInitStruct.SYSCLKSource == RCC_SYSCLKSOURCE_IC2_IC6_IC11)) {
+    RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_CPUCLK | RCC_CLOCKTYPE_SYSCLK);
+    RCC_ClkInitStruct.CPUCLKSource = RCC_CPUCLKSOURCE_HSI;
+    RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+    if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK) {
+      Error_Handler();
+    }
+  }
+
+  /* HSE selected as source (stable clock on Level 0 samples */
+  /* PLL1 output = ((HSE/PLLM)*PLLN)/PLLP1/PLLP2             */
+  /*             = ((48000000/3)*75)/1/1                     */
+  /*             = (16000000*75)/1/1                         */
+  /*             = 1200000000 (1200 MHz)                     */
+  /* PLL2 off                                                */
+  /* PLL3 off                                                */
+  /* PLL4 off                                                */
+
+  /* Enable HSE && HSI */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
+  RCC_OscInitStruct.HSIDiv = RCC_HSI_DIV1;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON; /* 48 MHz */
+
+  RCC_OscInitStruct.PLL1.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL1.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL1.PLLM = 3;
+  RCC_OscInitStruct.PLL1.PLLN = 75; /* PLL1 VCO = 48/3 * 75 = 1200MHz */
+  RCC_OscInitStruct.PLL1.PLLP1 = 1; /* PLL output = PLL VCO frequency / (PLLP1 * PLLP2) */
+  RCC_OscInitStruct.PLL1.PLLP2 = 1; /* PLL output = 1200 MHz */
+  RCC_OscInitStruct.PLL1.PLLFractional = 0;
+
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    /* Initialization error */
+    Error_Handler();
+  }
+
+  /* Select PLL1 outputs as CPU and System bus clock source */
+  /* CPUCLK = ic1_ck = PLL1 output/ic1_divider = 600 MHz */
+  /* SYSCLK = ic2_ck = PLL1 output/ic2_divider = 400 MHz */
+  /* Configure the HCLK clock divider */
+  /* HCLK =  PLL1 SYSCLK/HCLK divider = 200 MHz */
+  /* PCLKx = HCLK / PCLKx divider = 200 MHz */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_CPUCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK |
+                                 RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 | RCC_CLOCKTYPE_PCLK4 | RCC_CLOCKTYPE_PCLK5);
+  RCC_ClkInitStruct.CPUCLKSource = RCC_CPUCLKSOURCE_IC1;
+  RCC_ClkInitStruct.IC1Selection.ClockSelection = RCC_ICCLKSOURCE_PLL1;
+  RCC_ClkInitStruct.IC1Selection.ClockDivider = 2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_IC2_IC6_IC11;
+  RCC_ClkInitStruct.IC2Selection.ClockSelection = RCC_ICCLKSOURCE_PLL1;
+  RCC_ClkInitStruct.IC2Selection.ClockDivider = 3;
+  RCC_ClkInitStruct.IC6Selection.ClockSelection = RCC_ICCLKSOURCE_PLL1;
+  RCC_ClkInitStruct.IC6Selection.ClockDivider = 3;
+  RCC_ClkInitStruct.IC11Selection.ClockSelection = RCC_ICCLKSOURCE_PLL1;
+  RCC_ClkInitStruct.IC11Selection.ClockDivider = 3;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV1;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV1;
+  RCC_ClkInitStruct.APB5CLKDivider = RCC_APB5_DIV1;
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct) != HAL_OK) {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /** Initializes the peripherals clock
+    */
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USBOTGHS1;
+  PeriphClkInitStruct.UsbOtgHs1ClockSelection = RCC_USBPHY1REFCLKSOURCE_HSE_DIRECT;
+
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    /* Initialization Error */
+    Error_Handler();
+  }
+
+  /** Set USB OTG HS PHY1 Reference Clock Source */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USBPHY1;
+  PeriphClkInitStruct.UsbPhy1ClockSelection = RCC_USBPHY1REFCLKSOURCE_HSE_DIRECT;
+
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    /* Initialization Error */
+    Error_Handler();
+  }
+}
+
+//--------------------------------------------------------------------+
+// USB PD
+//--------------------------------------------------------------------+
+static I2C_HandleTypeDef i2c_handle = {
+    .Instance = I2C2,
+    .Init = {
+        .Timing = 0x20C0EDFF,
+        .OwnAddress1 = 0,
+        .AddressingMode = I2C_ADDRESSINGMODE_7BIT,
+        .DualAddressMode = I2C_DUALADDRESS_DISABLE,
+        .OwnAddress2 = 0,
+        .OwnAddress2Masks = I2C_OA2_NOMASK,
+        .GeneralCallMode = I2C_GENERALCALL_DISABLE,
+        .NoStretchMode = I2C_NOSTRETCH_DISABLE,
+    }};
+static TCPP0203_Object_t tcpp0203_obj = {0};
+
+int32_t board_tcpp0203_init(void) {
+  board_pindef_t *pindef = &board_pindef[PINID_TCPP0203_EN];
+  HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, GPIO_PIN_SET);
+
+  __HAL_RCC_I2C2_CLK_ENABLE();
+  __HAL_RCC_I2C2_FORCE_RESET();
+  __HAL_RCC_I2C2_RELEASE_RESET();
+  if (HAL_I2C_Init(&i2c_handle) != HAL_OK) {
+    return HAL_ERROR;
+  }
+
+  NVIC_SetPriority(EXTI8_IRQn, 12);
+  NVIC_EnableIRQ(EXTI8_IRQn);
+
+  return 0;
+}
+
+int32_t board_tcpp0203_deinit(void) {
+  return 0;
+}
+
+int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+  TU_ASSERT(HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
+  return 0;
+}
+
+int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+  TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
+  return 0;
+}
+
+static inline void board_init2(void) {
+  TCPP0203_IO_t io_ctx;
+
+  io_ctx.Address = TCPP0203_I2C_ADDRESS_X68;
+  io_ctx.Init = board_tcpp0203_init;
+  io_ctx.DeInit = board_tcpp0203_deinit;
+  io_ctx.ReadReg = i2c_readreg;
+  io_ctx.WriteReg = i2c_writereg;
+
+  TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
+
+  TU_ASSERT(TCPP0203_Init(&tcpp0203_obj) == TCPP0203_OK, );
+
+  TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
+}
+
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void) state;
+  if (rhport == 1) {
+    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+  }
+}
+
+void EXTI8_IRQHandler(void) {
+  __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_8);
+  if (tcpp0203_obj.IsInitialized) {
+    TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
+    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+  }
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
new file mode 100644
index 000000000..b851da0ca
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
@@ -0,0 +1,23 @@
+MCU_VARIANT = stm32n6xx
+CFLAGS += -DSTM32N6xx
+
+# For flash-jlink target
+JLINK_DEVICE = stm32n6xx
+
+# flash target using on-board stlink
+flash: flash-stlink
+
+PORT = 1
+
+
+SRC_C += \
+	$(BOARD_PATH)/tcpp0203/tcpp0203.c \
+	$(BOARD_PATH)/tcpp0203/tcpp0203_reg.c \
+
+INC += \
+	$(TOP)/$(BOARD_PATH)/tcpp0203 \
+
+CFLAGS += \
+	-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
+	-DSTM32N657xx
+	-DBUFFER_SIZE_UP=0x3000 \
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/LICENSE.txt b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/LICENSE.txt
new file mode 100644
index 000000000..1cbbc544a
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/LICENSE.txt
@@ -0,0 +1,6 @@
+This software component is provided to you as part of a software package and
+applicable license terms are in the  Package_license file. If you received this
+software component outside of a package or without applicable license terms,
+the terms of the BSD-3-Clause license shall apply.
+You may obtain a copy of the BSD-3-Clause at:
+https://opensource.org/licenses/BSD-3-Clause
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/Release_Notes.html b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/Release_Notes.html
new file mode 100644
index 000000000..6bbba86a4
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/Release_Notes.html
@@ -0,0 +1,205 @@
+<!DOCTYPE html>
+<html xmlns="http://www.w3.org/1999/xhtml" lang="en" xml:lang="en">
+<head>
+  <meta charset="utf-8" />
+  <meta name="generator" content="pandoc" />
+  <meta name="viewport" content="width=device-width, initial-scale=1.0, user-scalable=yes" />
+  <title>Release Notes for TCPP0203 Component Driver</title>
+  <style type="text/css">
+      code{white-space: pre-wrap;}
+      span.smallcaps{font-variant: small-caps;}
+      span.underline{text-decoration: underline;}
+      div.column{display: inline-block; vertical-align: top; width: 50%;}
+  </style>
+  <link rel="stylesheet" href="_htmresc/mini-st_2020.css" />
+  <!--[if lt IE 9]>
+    <script src="//cdnjs.cloudflare.com/ajax/libs/html5shiv/3.7.3/html5shiv-printshiv.min.js"></script>
+  <![endif]-->
+  <link rel="icon" type="image/x-icon" href="_htmresc/favicon.png" />
+</head>
+<body>
+<div class="row">
+<div class="col-sm-12 col-lg-4">
+<center>
+<h1 id="release-notes-for-tcpp0203-component-driver">Release Notes for TCPP0203 Component Driver</h1>
+<p>Copyright © 2020 STMicroelectronics<br />
+</p>
+<a href="https://www.st.com" class="logo"><img src="_htmresc/st_logo_2020.png" alt="ST logo" /></a>
+</center>
+<h1 id="purpose">Purpose</h1>
+<p>This driver provides a set of functions needed to drive TCPP0203 Type-C Port Protection component</p>
+</div>
+<div class="col-sm-12 col-lg-8">
+<h1 id="update-history">Update History</h1>
+<div class="collapse">
+<input type="checkbox" id="collapse-section6" checked aria-hidden="true"> <label for="collapse-section6" aria-hidden="true">v1.2.3 / 21-Jan-2023</label>
+<div>
+<h2 id="main-changes">Main Changes</h2>
+<h3 id="maintenance-release">Maintenance release</h3>
+<h2 id="contents">Contents</h2>
+<table>
+<thead>
+<tr class="header">
+<th>Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>MISRA Rule-81.13 correction on TCPP0203 component driver files</td>
+</tr>
+</tbody>
+</table>
+<h2 id="backward-compatibility">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies">Dependencies</h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section5" aria-hidden="true"> <label for="collapse-section5" aria-hidden="true">v1.2.2 / 21-Jan-2022</label>
+<div>
+<h2 id="main-changes-1">Main Changes</h2>
+<h3 id="maintenance-release-1">Maintenance release</h3>
+<h2 id="contents-1">Contents</h2>
+<table>
+<caption>Fixed bugs list</caption>
+<thead>
+<tr class="header">
+<th>Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>MISRA corrections on TCPP0203 component driver files</td>
+</tr>
+</tbody>
+</table>
+<h2 id="known-limitations">Known Limitations</h2>
+<p>Outstanding bugs list : None</p>
+<p>Requirements not met or planned in a forthcoming release : None</p>
+<h2 id="development-toolchains-and-compilers">Development Toolchains and Compilers</h2>
+<ul>
+<li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
+<li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.27.1</li>
+<li>STM32CubeIDE toolchain V1.8.0</li>
+</ul>
+<h2 id="backward-compatibility-1">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies-1">Dependencies</h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section4" aria-hidden="true"> <label for="collapse-section4" aria-hidden="true">v1.2.1 / 18-June-2021</label>
+<div>
+<h2 id="main-changes-2">Main Changes</h2>
+<h3 id="maintenance-release-2">Maintenance release</h3>
+<h2 id="contents-2">Contents</h2>
+<table>
+<caption>Fixed bugs list</caption>
+<thead>
+<tr class="header">
+<th>Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>License updates</td>
+</tr>
+</tbody>
+</table>
+<h2 id="known-limitations-1">Known Limitations</h2>
+<p>Outstanding bugs list : None</p>
+<p>Requirements not met or planned in a forthcoming release : None</p>
+<h2 id="development-toolchains-and-compilers-1">Development Toolchains and Compilers</h2>
+<ul>
+<li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
+<li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.27.1</li>
+<li>STM32CubeIDE toolchain V1.6.0</li>
+</ul>
+<h2 id="backward-compatibility-2">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies-2">Dependencies</h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section3" aria-hidden="true"> <label for="collapse-section3" aria-hidden="true">v1.2.0 / 06-Apr-2021</label>
+<div>
+<h2 id="main-changes-3">Main Changes</h2>
+<h3 id="maintenance-release-3">Maintenance release</h3>
+<h2 id="contents-3">Contents</h2>
+<table>
+<caption>Fixed bugs list</caption>
+<thead>
+<tr class="header">
+<th>Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>CodeSpell correction on TCPP0203 component driver files</td>
+</tr>
+</tbody>
+</table>
+<h2 id="known-limitations-2">Known Limitations</h2>
+<p>Outstanding bugs list : None</p>
+<p>Requirements not met or planned in a forthcoming release : None</p>
+<h2 id="development-toolchains-and-compilers-2">Development Toolchains and Compilers</h2>
+<ul>
+<li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
+<li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.27.1</li>
+<li>STM32CubeIDE toolchain V1.5.0</li>
+</ul>
+<h2 id="backward-compatibility-3">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies-3">Dependencies</h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section2" aria-hidden="true"> <label for="collapse-section2" aria-hidden="true">v1.1.0 / 12-Mar-2021</label>
+<div>
+<h2 id="main-changes-4">Main Changes</h2>
+<h3 id="maintenance-release-4">Maintenance release</h3>
+<h2 id="contents-4">Contents</h2>
+<table>
+<caption>Fixed bugs list</caption>
+<thead>
+<tr class="header">
+<th>Headline</th>
+</tr>
+</thead>
+<tbody>
+<tr class="odd">
+<td>MCUAstyle correction on TCPP0203 component driver files</td>
+</tr>
+</tbody>
+</table>
+<h2 id="known-limitations-3">Known Limitations</h2>
+<p>Outstanding bugs list : None</p>
+<p>Requirements not met or planned in a forthcoming release : None</p>
+<h2 id="development-toolchains-and-compilers-3">Development Toolchains and Compilers</h2>
+<ul>
+<li>IAR Embedded Workbench for ARM (EWARM) toolchain V8.32.3</li>
+<li>RealView Microcontroller Development Kit (MDK-ARM) toolchain V5.27.1</li>
+<li>STM32CubeIDE toolchain V1.5.0</li>
+</ul>
+<h2 id="backward-compatibility-4">Backward compatibility</h2>
+<p>No compatibility break with previous version</p>
+<h2 id="dependencies-4">Dependencies</h2>
+</div>
+</div>
+<div class="collapse">
+<input type="checkbox" id="collapse-section1" aria-hidden="true"> <label for="collapse-section1" aria-hidden="true">v1.0.0 / 20-May-2020</label>
+<div>
+<h2 id="main-changes-5">Main Changes</h2>
+<ul>
+<li>First official release of <strong>TCPP0203</strong> Type-C port Protection Component drivers</li>
+</ul>
+</div>
+</div>
+</div>
+</div>
+<footer class="sticky">
+<p>For complete documentation on STM32,visit: [<a href="http://www.st.com">www.st.com/stm32</a>]</p>
+This release note uses up to date web standards and, for this reason, should not be opened with Internet Explorer but preferably with popular browsers such as Google Chrome, Mozilla Firefox, Opera or Microsoft Edge.
+</footer>
+</body>
+</html>
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+  .col-lg,
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+
+  .col-lg-offset-1 {
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+
+  .col-lg-3,
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+    flex-basis: 25%; }
+
+  .col-lg-offset-2 {
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+  .col-lg-4,
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+    flex-basis: 33.3333333333%; }
+
+  .col-lg-offset-3 {
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+  .col-lg-5,
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+  .col-lg-offset-4 {
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+  .col-lg-offset-5 {
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+
+  .col-lg-offset-6 {
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+
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+    flex-basis: 66.6666666667%; }
+
+  .col-lg-offset-7 {
+    margin-left: 58.3333333333%; }
+
+  .col-lg-9,
+  .row.cols-lg-9 > * {
+    max-width: 75%;
+    flex-basis: 75%; }
+
+  .col-lg-offset-8 {
+    margin-left: 66.6666666667%; }
+
+  .col-lg-10,
+  .row.cols-lg-10 > * {
+    max-width: 83.3333333333%;
+    flex-basis: 83.3333333333%; }
+
+  .col-lg-offset-9 {
+    margin-left: 75%; }
+
+  .col-lg-11,
+  .row.cols-lg-11 > * {
+    max-width: 91.6666666667%;
+    flex-basis: 91.6666666667%; }
+
+  .col-lg-offset-10 {
+    margin-left: 83.3333333333%; }
+
+  .col-lg-12,
+  .row.cols-lg-12 > * {
+    max-width: 100%;
+    flex-basis: 100%; }
+
+  .col-lg-offset-11 {
+    margin-left: 91.6666666667%; }
+
+  .col-lg-normal {
+    order: initial; }
+
+  .col-lg-first {
+    order: -999; }
+
+  .col-lg-last {
+    order: 999; } }
+/* Card component CSS variable definitions */
+:root {
+  --card-back-color: #3cb4e6;
+  --card-fore-color: #03234b;
+  --card-border-color: #03234b; }
+
+.card {
+  display: flex;
+  flex-direction: column;
+  justify-content: space-between;
+  align-self: center;
+  position: relative;
+  width: 100%;
+  background: var(--card-back-color);
+  color: var(--card-fore-color);
+  border: 0.0714285714rem solid var(--card-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  overflow: hidden; }
+  @media screen and (min-width: 320px) {
+    .card {
+      max-width: 320px; } }
+  .card > .sectione {
+    background: var(--card-back-color);
+    color: var(--card-fore-color);
+    box-sizing: border-box;
+    margin: 0;
+    border: 0;
+    border-radius: 0;
+    border-bottom: 0.0714285714rem solid var(--card-border-color);
+    padding: var(--universal-padding);
+    width: 100%; }
+    .card > .sectione.media {
+      height: 200px;
+      padding: 0;
+      -o-object-fit: cover;
+      object-fit: cover; }
+  .card > .sectione:last-child {
+    border-bottom: 0; }
+
+/*
+  Custom elements for card elements.
+*/
+@media screen and (min-width: 240px) {
+  .card.small {
+    max-width: 240px; } }
+@media screen and (min-width: 480px) {
+  .card.large {
+    max-width: 480px; } }
+.card.fluid {
+  max-width: 100%;
+  width: auto; }
+
+.card.warning {
+  --card-back-color: #e5b8b7;
+  --card-fore-color: #3b234b;
+  --card-border-color: #8c0078; }
+
+.card.error {
+  --card-back-color: #464650;
+  --card-fore-color: #ffffff;
+  --card-border-color: #8c0078; }
+
+.card > .sectione.dark {
+  --card-back-color: #3b234b;
+  --card-fore-color: #ffffff; }
+
+.card > .sectione.double-padded {
+  padding: calc(1.5 * var(--universal-padding)); }
+
+/*
+  Definitions for forms and input elements.
+*/
+/* Input_control module CSS variable definitions */
+:root {
+  --form-back-color: #ffe97f;
+  --form-fore-color: #03234b;
+  --form-border-color: #3cb4e6;
+  --input-back-color: #ffffff;
+  --input-fore-color: #03234b;
+  --input-border-color: #3cb4e6;
+  --input-focus-color: #0288d1;
+  --input-invalid-color: #d32f2f;
+  --button-back-color: #e2e2e2;
+  --button-hover-back-color: #dcdcdc;
+  --button-fore-color: #212121;
+  --button-border-color: transparent;
+  --button-hover-border-color: transparent;
+  --button-group-border-color: rgba(124, 124, 124, 0.54); }
+
+form {
+  background: var(--form-back-color);
+  color: var(--form-fore-color);
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding); }
+
+fieldset {
+  border: 0.0714285714rem solid var(--form-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 4);
+  padding: var(--universal-padding); }
+
+legend {
+  box-sizing: border-box;
+  display: table;
+  max-width: 100%;
+  white-space: normal;
+  font-weight: 500;
+  padding: calc(var(--universal-padding) / 2); }
+
+label {
+  padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+.input-group {
+  display: inline-block; }
+  .input-group.fluid {
+    display: flex;
+    align-items: center;
+    justify-content: center; }
+    .input-group.fluid > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+    @media screen and (max-width: 499px) {
+      .input-group.fluid {
+        align-items: stretch;
+        flex-direction: column; } }
+  .input-group.vertical {
+    display: flex;
+    align-items: stretch;
+    flex-direction: column; }
+    .input-group.vertical > input {
+      max-width: 100%;
+      flex-grow: 1;
+      flex-basis: 0px; }
+
+[type="number"]::-webkit-inner-spin-button, [type="number"]::-webkit-outer-spin-button {
+  height: auto; }
+
+[type="search"] {
+  -webkit-appearance: textfield;
+  outline-offset: -2px; }
+
+[type="search"]::-webkit-search-cancel-button,
+[type="search"]::-webkit-search-decoration {
+  -webkit-appearance: none; }
+
+input:not([type]), [type="text"], [type="email"], [type="number"], [type="search"],
+[type="password"], [type="url"], [type="tel"], [type="checkbox"], [type="radio"], textarea, select {
+  box-sizing: border-box;
+  background: var(--input-back-color);
+  color: var(--input-fore-color);
+  border: 0.0714285714rem solid var(--input-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: calc(var(--universal-margin) / 2);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):hover, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus, textarea:hover, textarea:focus, select:hover, select:focus {
+  border-color: var(--input-focus-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"]):invalid, input:not([type="button"]):not([type="submit"]):not([type="reset"]):focus:invalid, textarea:invalid, textarea:focus:invalid, select:invalid, select:focus:invalid {
+  border-color: var(--input-invalid-color);
+  box-shadow: none; }
+input:not([type="button"]):not([type="submit"]):not([type="reset"])[readonly], textarea[readonly], select[readonly] {
+  background: var(--secondary-back-color); }
+
+select {
+  max-width: 100%; }
+
+option {
+  overflow: hidden;
+  text-overflow: ellipsis; }
+
+[type="checkbox"], [type="radio"] {
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  position: relative;
+  height: calc(1rem + var(--universal-padding) / 2);
+  width: calc(1rem + var(--universal-padding) / 2);
+  vertical-align: text-bottom;
+  padding: 0;
+  flex-basis: calc(1rem + var(--universal-padding) / 2) !important;
+  flex-grow: 0 !important; }
+  [type="checkbox"]:checked:before, [type="radio"]:checked:before {
+    position: absolute; }
+
+[type="checkbox"]:checked:before {
+  content: '\2713';
+  font-family: sans-serif;
+  font-size: calc(1rem + var(--universal-padding) / 2);
+  top: calc(0rem - var(--universal-padding));
+  left: calc(var(--universal-padding) / 4); }
+
+[type="radio"] {
+  border-radius: 100%; }
+  [type="radio"]:checked:before {
+    border-radius: 100%;
+    content: '';
+    top: calc(0.0714285714rem + var(--universal-padding) / 2);
+    left: calc(0.0714285714rem + var(--universal-padding) / 2);
+    background: var(--input-fore-color);
+    width: 0.5rem;
+    height: 0.5rem; }
+
+:placeholder-shown {
+  color: var(--input-fore-color); }
+
+::-ms-placeholder {
+  color: var(--input-fore-color);
+  opacity: 0.54; }
+
+button::-moz-focus-inner, [type="button"]::-moz-focus-inner, [type="reset"]::-moz-focus-inner, [type="submit"]::-moz-focus-inner {
+  border-style: none;
+  padding: 0; }
+
+button, html [type="button"], [type="reset"], [type="submit"] {
+  -webkit-appearance: button; }
+
+button {
+  overflow: visible;
+  text-transform: none; }
+
+button, [type="button"], [type="submit"], [type="reset"],
+a.button, label.button, .button,
+a[role="button"], label[role="button"], [role="button"] {
+  display: inline-block;
+  background: var(--button-back-color);
+  color: var(--button-fore-color);
+  border: 0.0714285714rem solid var(--button-border-color);
+  border-radius: var(--universal-border-radius);
+  padding: var(--universal-padding) calc(1.5 * var(--universal-padding));
+  margin: var(--universal-margin);
+  text-decoration: none;
+  cursor: pointer;
+  transition: background 0.3s; }
+  button:hover, button:focus, [type="button"]:hover, [type="button"]:focus, [type="submit"]:hover, [type="submit"]:focus, [type="reset"]:hover, [type="reset"]:focus,
+  a.button:hover,
+  a.button:focus, label.button:hover, label.button:focus, .button:hover, .button:focus,
+  a[role="button"]:hover,
+  a[role="button"]:focus, label[role="button"]:hover, label[role="button"]:focus, [role="button"]:hover, [role="button"]:focus {
+    background: var(--button-hover-back-color);
+    border-color: var(--button-hover-border-color); }
+
+input:disabled, input[disabled], textarea:disabled, textarea[disabled], select:disabled, select[disabled], button:disabled, button[disabled], .button:disabled, .button[disabled], [role="button"]:disabled, [role="button"][disabled] {
+  cursor: not-allowed;
+  opacity: 0.75; }
+
+.button-group {
+  display: flex;
+  border: 0.0714285714rem solid var(--button-group-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  .button-group > button, .button-group [type="button"], .button-group > [type="submit"], .button-group > [type="reset"], .button-group > .button, .button-group > [role="button"] {
+    margin: 0;
+    max-width: 100%;
+    flex: 1 1 auto;
+    text-align: center;
+    border: 0;
+    border-radius: 0;
+    box-shadow: none; }
+  .button-group > :not(:first-child) {
+    border-left: 0.0714285714rem solid var(--button-group-border-color); }
+  @media screen and (max-width: 499px) {
+    .button-group {
+      flex-direction: column; }
+      .button-group > :not(:first-child) {
+        border: 0;
+        border-top: 0.0714285714rem solid var(--button-group-border-color); } }
+
+/*
+  Custom elements for forms and input elements.
+*/
+button.primary, [type="button"].primary, [type="submit"].primary, [type="reset"].primary, .button.primary, [role="button"].primary {
+  --button-back-color: #1976d2;
+  --button-fore-color: #f8f8f8; }
+  button.primary:hover, button.primary:focus, [type="button"].primary:hover, [type="button"].primary:focus, [type="submit"].primary:hover, [type="submit"].primary:focus, [type="reset"].primary:hover, [type="reset"].primary:focus, .button.primary:hover, .button.primary:focus, [role="button"].primary:hover, [role="button"].primary:focus {
+    --button-hover-back-color: #1565c0; }
+
+button.secondary, [type="button"].secondary, [type="submit"].secondary, [type="reset"].secondary, .button.secondary, [role="button"].secondary {
+  --button-back-color: #d32f2f;
+  --button-fore-color: #f8f8f8; }
+  button.secondary:hover, button.secondary:focus, [type="button"].secondary:hover, [type="button"].secondary:focus, [type="submit"].secondary:hover, [type="submit"].secondary:focus, [type="reset"].secondary:hover, [type="reset"].secondary:focus, .button.secondary:hover, .button.secondary:focus, [role="button"].secondary:hover, [role="button"].secondary:focus {
+    --button-hover-back-color: #c62828; }
+
+button.tertiary, [type="button"].tertiary, [type="submit"].tertiary, [type="reset"].tertiary, .button.tertiary, [role="button"].tertiary {
+  --button-back-color: #308732;
+  --button-fore-color: #f8f8f8; }
+  button.tertiary:hover, button.tertiary:focus, [type="button"].tertiary:hover, [type="button"].tertiary:focus, [type="submit"].tertiary:hover, [type="submit"].tertiary:focus, [type="reset"].tertiary:hover, [type="reset"].tertiary:focus, .button.tertiary:hover, .button.tertiary:focus, [role="button"].tertiary:hover, [role="button"].tertiary:focus {
+    --button-hover-back-color: #277529; }
+
+button.inverse, [type="button"].inverse, [type="submit"].inverse, [type="reset"].inverse, .button.inverse, [role="button"].inverse {
+  --button-back-color: #212121;
+  --button-fore-color: #f8f8f8; }
+  button.inverse:hover, button.inverse:focus, [type="button"].inverse:hover, [type="button"].inverse:focus, [type="submit"].inverse:hover, [type="submit"].inverse:focus, [type="reset"].inverse:hover, [type="reset"].inverse:focus, .button.inverse:hover, .button.inverse:focus, [role="button"].inverse:hover, [role="button"].inverse:focus {
+    --button-hover-back-color: #111; }
+
+button.small, [type="button"].small, [type="submit"].small, [type="reset"].small, .button.small, [role="button"].small {
+  padding: calc(0.5 * var(--universal-padding)) calc(0.75 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+button.large, [type="button"].large, [type="submit"].large, [type="reset"].large, .button.large, [role="button"].large {
+  padding: calc(1.5 * var(--universal-padding)) calc(2 * var(--universal-padding));
+  margin: var(--universal-margin); }
+
+/*
+  Definitions for navigation elements.
+*/
+/* Navigation module CSS variable definitions */
+:root {
+  --header-back-color: #03234b;
+  --header-hover-back-color: #ffd200;
+  --header-fore-color: #ffffff;
+  --header-border-color: #3cb4e6;
+  --nav-back-color: #ffffff;
+  --nav-hover-back-color: #ffe97f;
+  --nav-fore-color: #e6007e;
+  --nav-border-color: #3cb4e6;
+  --nav-link-color: #3cb4e6;
+  --footer-fore-color: #ffffff;
+  --footer-back-color: #03234b;
+  --footer-border-color: #3cb4e6;
+  --footer-link-color: #3cb4e6;
+  --drawer-back-color: #ffffff;
+  --drawer-hover-back-color: #ffe97f;
+  --drawer-border-color: #3cb4e6;
+  --drawer-close-color: #e6007e; }
+
+header {
+  height: 2.75rem;
+  background: var(--header-back-color);
+  color: var(--header-fore-color);
+  border-bottom: 0.0714285714rem solid var(--header-border-color);
+  padding: calc(var(--universal-padding) / 4) 0;
+  white-space: nowrap;
+  overflow-x: auto;
+  overflow-y: hidden; }
+  header.row {
+    box-sizing: content-box; }
+  header .logo {
+    color: var(--header-fore-color);
+    font-size: 1.75rem;
+    padding: var(--universal-padding) calc(2 * var(--universal-padding));
+    text-decoration: none; }
+  header button, header [type="button"], header .button, header [role="button"] {
+    box-sizing: border-box;
+    position: relative;
+    top: calc(0rem - var(--universal-padding) / 4);
+    height: calc(3.1875rem + var(--universal-padding) / 2);
+    background: var(--header-back-color);
+    line-height: calc(3.1875rem - var(--universal-padding) * 1.5);
+    text-align: center;
+    color: var(--header-fore-color);
+    border: 0;
+    border-radius: 0;
+    margin: 0;
+    text-transform: uppercase; }
+    header button:hover, header button:focus, header [type="button"]:hover, header [type="button"]:focus, header .button:hover, header .button:focus, header [role="button"]:hover, header [role="button"]:focus {
+      background: var(--header-hover-back-color); }
+
+nav {
+  background: var(--nav-back-color);
+  color: var(--nav-fore-color);
+  border: 0.0714285714rem solid var(--nav-border-color);
+  border-radius: var(--universal-border-radius);
+  margin: var(--universal-margin); }
+  nav * {
+    padding: var(--universal-padding) calc(1.5 * var(--universal-padding)); }
+  nav a, nav a:visited {
+    display: block;
+    color: var(--nav-link-color);
+    border-radius: var(--universal-border-radius);
+    transition: background 0.3s; }
+    nav a:hover, nav a:focus, nav a:visited:hover, nav a:visited:focus {
+      text-decoration: none;
+      background: var(--nav-hover-back-color); }
+  nav .sublink-1 {
+    position: relative;
+    margin-left: calc(2 * var(--universal-padding)); }
+    nav .sublink-1:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 1 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+  nav .sublink-2 {
+    position: relative;
+    margin-left: calc(4 * var(--universal-padding)); }
+    nav .sublink-2:before {
+      position: absolute;
+      left: calc(var(--universal-padding) - 3 * var(--universal-padding));
+      top: -0.0714285714rem;
+      content: '';
+      height: 100%;
+      border: 0.0714285714rem solid var(--nav-border-color);
+      border-left: 0; }
+
+footer {
+  background: var(--footer-back-color);
+  color: var(--footer-fore-color);
+  border-top: 0.0714285714rem solid var(--footer-border-color);
+  padding: calc(2 * var(--universal-padding)) var(--universal-padding);
+  font-size: 0.875rem; }
+  footer a, footer a:visited {
+    color: var(--footer-link-color); }
+
+header.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  top: 0; }
+
+footer.sticky {
+  position: -webkit-sticky;
+  position: sticky;
+  z-index: 1101;
+  bottom: 0; }
+
+.drawer-toggle:before {
+  display: inline-block;
+  position: relative;
+  vertical-align: bottom;
+  content: '\00a0\2261\00a0';
+  font-family: sans-serif;
+  font-size: 1.5em; }
+@media screen and (min-width: 500px) {
+  .drawer-toggle:not(.persistent) {
+    display: none; } }
+
+[type="checkbox"].drawer {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].drawer + * {
+    display: block;
+    box-sizing: border-box;
+    position: fixed;
+    top: 0;
+    width: 320px;
+    height: 100vh;
+    overflow-y: auto;
+    background: var(--drawer-back-color);
+    border: 0.0714285714rem solid var(--drawer-border-color);
+    border-radius: 0;
+    margin: 0;
+    z-index: 1110;
+    right: -320px;
+    transition: right 0.3s; }
+    [type="checkbox"].drawer + * .drawer-close {
+      position: absolute;
+      top: var(--universal-margin);
+      right: var(--universal-margin);
+      z-index: 1111;
+      width: 2rem;
+      height: 2rem;
+      border-radius: var(--universal-border-radius);
+      padding: var(--universal-padding);
+      margin: 0;
+      cursor: pointer;
+      transition: background 0.3s; }
+      [type="checkbox"].drawer + * .drawer-close:before {
+        display: block;
+        content: '\00D7';
+        color: var(--drawer-close-color);
+        position: relative;
+        font-family: sans-serif;
+        font-size: 2rem;
+        line-height: 1;
+        text-align: center; }
+      [type="checkbox"].drawer + * .drawer-close:hover, [type="checkbox"].drawer + * .drawer-close:focus {
+        background: var(--drawer-hover-back-color); }
+    @media screen and (max-width: 320px) {
+      [type="checkbox"].drawer + * {
+        width: 100%; } }
+  [type="checkbox"].drawer:checked + * {
+    right: 0; }
+  @media screen and (min-width: 500px) {
+    [type="checkbox"].drawer:not(.persistent) + * {
+      position: static;
+      height: 100%;
+      z-index: 1100; }
+      [type="checkbox"].drawer:not(.persistent) + * .drawer-close {
+        display: none; } }
+
+/*
+  Definitions for the responsive table component.
+*/
+/* Table module CSS variable definitions. */
+:root {
+  --table-border-color: #03234b;
+  --table-border-separator-color: #03234b;
+  --table-head-back-color: #03234b;
+  --table-head-fore-color: #ffffff;
+  --table-body-back-color: #ffffff;
+  --table-body-fore-color: #03234b;
+  --table-body-alt-back-color: #f4f4f4; }
+
+table {
+  border-collapse: separate;
+  border-spacing: 0;
+  margin: 0;
+  display: flex;
+  flex: 0 1 auto;
+  flex-flow: row wrap;
+  padding: var(--universal-padding);
+  padding-top: 0; }
+  table caption {
+    font-size: 1rem;
+    margin: calc(2 * var(--universal-margin)) 0;
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table thead, table tbody {
+    display: flex;
+    flex-flow: row wrap;
+    border: 0.0714285714rem solid var(--table-border-color); }
+  table thead {
+    z-index: 999;
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-separator-color); }
+  table tbody {
+    border-top: 0;
+    margin-top: calc(0 - var(--universal-margin));
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  table tr {
+    display: flex;
+    padding: 0; }
+  table th, table td {
+    padding: calc(0.5 * var(--universal-padding));
+		font-size: 0.9rem; }
+  table th {
+    text-align: left;
+    background: var(--table-head-back-color);
+    color: var(--table-head-fore-color); }
+  table td {
+    background: var(--table-body-back-color);
+    color: var(--table-body-fore-color);
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+
+table:not(.horizontal) {
+  overflow: auto;
+  max-height: 100%; }
+  table:not(.horizontal) thead, table:not(.horizontal) tbody {
+    max-width: 100%;
+    flex: 0 0 100%; }
+  table:not(.horizontal) tr {
+    flex-flow: row wrap;
+    flex: 0 0 100%; }
+  table:not(.horizontal) th, table:not(.horizontal) td {
+    flex: 1 0 0%;
+    overflow: hidden;
+    text-overflow: ellipsis; }
+  table:not(.horizontal) thead {
+    position: sticky;
+    top: 0; }
+  table:not(.horizontal) tbody tr:first-child td {
+    border-top: 0; }
+
+table.horizontal {
+  border: 0; }
+  table.horizontal thead, table.horizontal tbody {
+    border: 0;
+    flex: .2 0 0;
+    flex-flow: row nowrap; }
+  table.horizontal tbody {
+    overflow: auto;
+    justify-content: space-between;
+    flex: .8 0 0;
+    margin-left: 0;
+    padding-bottom: calc(var(--universal-padding) / 4); }
+  table.horizontal tr {
+    flex-direction: column;
+    flex: 1 0 auto; }
+  table.horizontal th, table.horizontal td {
+    width: auto;
+    border: 0;
+    border-bottom: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal th:not(:first-child), table.horizontal td:not(:first-child) {
+      border-top: 0; }
+  table.horizontal th {
+    text-align: right;
+    border-left: 0.0714285714rem solid var(--table-border-color);
+    border-right: 0.0714285714rem solid var(--table-border-separator-color); }
+  table.horizontal thead tr:first-child {
+    padding-left: 0; }
+  table.horizontal th:first-child, table.horizontal td:first-child {
+    border-top: 0.0714285714rem solid var(--table-border-color); }
+  table.horizontal tbody tr:last-child td {
+    border-right: 0.0714285714rem solid var(--table-border-color); }
+    table.horizontal tbody tr:last-child td:first-child {
+      border-top-right-radius: 0.25rem; }
+    table.horizontal tbody tr:last-child td:last-child {
+      border-bottom-right-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:first-child {
+    border-top-left-radius: 0.25rem; }
+  table.horizontal thead tr:first-child th:last-child {
+    border-bottom-left-radius: 0.25rem; }
+
+@media screen and (max-width: 499px) {
+  table, table.horizontal {
+    border-collapse: collapse;
+    border: 0;
+    width: 100%;
+    display: table; }
+    table thead, table th, table.horizontal thead, table.horizontal th {
+      border: 0;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      padding: 0;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%); }
+    table tbody, table.horizontal tbody {
+      border: 0;
+      display: table-row-group; }
+    table tr, table.horizontal tr {
+      display: block;
+      border: 0.0714285714rem solid var(--table-border-color);
+      border-radius: var(--universal-border-radius);
+      background: #ffffff;
+      padding: var(--universal-padding);
+      margin: var(--universal-margin);
+      margin-bottom: calc(1 * var(--universal-margin)); }
+    table th, table td, table.horizontal th, table.horizontal td {
+      width: auto; }
+    table td, table.horizontal td {
+      display: block;
+      border: 0;
+      text-align: right; }
+    table td:before, table.horizontal td:before {
+      content: attr(data-label);
+      float: left;
+      font-weight: 600; }
+    table th:first-child, table td:first-child, table.horizontal th:first-child, table.horizontal td:first-child {
+      border-top: 0; }
+    table tbody tr:last-child td, table.horizontal tbody tr:last-child td {
+      border-right: 0; } }
+table tr:nth-of-type(2n) > td {
+  background: var(--table-body-alt-back-color); }
+
+@media screen and (max-width: 500px) {
+  table tr:nth-of-type(2n) {
+    background: var(--table-body-alt-back-color); } }
+:root {
+  --table-body-hover-back-color: #90caf9; }
+
+table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+  background: var(--table-body-hover-back-color); }
+
+@media screen and (max-width: 500px) {
+  table.hoverable tr:hover, table.hoverable tr:hover > td, table.hoverable tr:focus, table.hoverable tr:focus > td {
+    background: var(--table-body-hover-back-color); } }
+/*
+  Definitions for contextual background elements, toasts and tooltips.
+*/
+/* Contextual module CSS variable definitions */
+:root {
+  --mark-back-color: #3cb4e6;
+  --mark-fore-color: #ffffff; }
+
+mark {
+  background: var(--mark-back-color);
+  color: var(--mark-fore-color);
+  font-size: 0.95em;
+  line-height: 1em;
+  border-radius: var(--universal-border-radius);
+  padding: calc(var(--universal-padding) / 4) var(--universal-padding); }
+  mark.inline-block {
+    display: inline-block;
+    font-size: 1em;
+    line-height: 1.4;
+    padding: calc(var(--universal-padding) / 2) var(--universal-padding); }
+
+:root {
+  --toast-back-color: #424242;
+  --toast-fore-color: #fafafa; }
+
+.toast {
+  position: fixed;
+  bottom: calc(var(--universal-margin) * 3);
+  left: 50%;
+  transform: translate(-50%, -50%);
+  z-index: 1111;
+  color: var(--toast-fore-color);
+  background: var(--toast-back-color);
+  border-radius: calc(var(--universal-border-radius) * 16);
+  padding: var(--universal-padding) calc(var(--universal-padding) * 3); }
+
+:root {
+  --tooltip-back-color: #212121;
+  --tooltip-fore-color: #fafafa; }
+
+.tooltip {
+  position: relative;
+  display: inline-block; }
+  .tooltip:before, .tooltip:after {
+    position: absolute;
+    opacity: 0;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%);
+    transition: all 0.3s;
+    z-index: 1010;
+    left: 50%; }
+  .tooltip:not(.bottom):before, .tooltip:not(.bottom):after {
+    bottom: 75%; }
+  .tooltip.bottom:before, .tooltip.bottom:after {
+    top: 75%; }
+  .tooltip:hover:before, .tooltip:hover:after, .tooltip:focus:before, .tooltip:focus:after {
+    opacity: 1;
+    clip: auto;
+    -webkit-clip-path: inset(0%);
+    clip-path: inset(0%); }
+  .tooltip:before {
+    content: '';
+    background: transparent;
+    border: var(--universal-margin) solid transparent;
+    left: calc(50% - var(--universal-margin)); }
+  .tooltip:not(.bottom):before {
+    border-top-color: #212121; }
+  .tooltip.bottom:before {
+    border-bottom-color: #212121; }
+  .tooltip:after {
+    content: attr(aria-label);
+    color: var(--tooltip-fore-color);
+    background: var(--tooltip-back-color);
+    border-radius: var(--universal-border-radius);
+    padding: var(--universal-padding);
+    white-space: nowrap;
+    transform: translateX(-50%); }
+  .tooltip:not(.bottom):after {
+    margin-bottom: calc(2 * var(--universal-margin)); }
+  .tooltip.bottom:after {
+    margin-top: calc(2 * var(--universal-margin)); }
+
+:root {
+  --modal-overlay-color: rgba(0, 0, 0, 0.45);
+  --modal-close-color: #e6007e;
+  --modal-close-hover-color: #ffe97f; }
+
+[type="checkbox"].modal {
+  height: 1px;
+  width: 1px;
+  margin: -1px;
+  overflow: hidden;
+  position: absolute;
+  clip: rect(0 0 0 0);
+  -webkit-clip-path: inset(100%);
+  clip-path: inset(100%); }
+  [type="checkbox"].modal + div {
+    position: fixed;
+    top: 0;
+    left: 0;
+    display: none;
+    width: 100vw;
+    height: 100vh;
+    background: var(--modal-overlay-color); }
+    [type="checkbox"].modal + div .card {
+      margin: 0 auto;
+      max-height: 50vh;
+      overflow: auto; }
+      [type="checkbox"].modal + div .card .modal-close {
+        position: absolute;
+        top: 0;
+        right: 0;
+        width: 1.75rem;
+        height: 1.75rem;
+        border-radius: var(--universal-border-radius);
+        padding: var(--universal-padding);
+        margin: 0;
+        cursor: pointer;
+        transition: background 0.3s; }
+        [type="checkbox"].modal + div .card .modal-close:before {
+          display: block;
+          content: '\00D7';
+          color: var(--modal-close-color);
+          position: relative;
+          font-family: sans-serif;
+          font-size: 1.75rem;
+          line-height: 1;
+          text-align: center; }
+        [type="checkbox"].modal + div .card .modal-close:hover, [type="checkbox"].modal + div .card .modal-close:focus {
+          background: var(--modal-close-hover-color); }
+  [type="checkbox"].modal:checked + div {
+    display: flex;
+    flex: 0 1 auto;
+    z-index: 1200; }
+    [type="checkbox"].modal:checked + div .card .modal-close {
+      z-index: 1211; }
+
+:root {
+  --collapse-label-back-color: #03234b;
+  --collapse-label-fore-color: #ffffff;
+  --collapse-label-hover-back-color: #3cb4e6;
+  --collapse-selected-label-back-color: #3cb4e6;
+  --collapse-border-color: var(--collapse-label-back-color);
+  --collapse-selected-border-color: #ceecf8;
+  --collapse-content-back-color: #ffffff;
+  --collapse-selected-label-border-color: #3cb4e6; }
+
+.collapse {
+  width: calc(100% - 2 * var(--universal-margin));
+  opacity: 1;
+  display: flex;
+  flex-direction: column;
+  margin: var(--universal-margin);
+  border-radius: var(--universal-border-radius); }
+  .collapse > [type="radio"], .collapse > [type="checkbox"] {
+    height: 1px;
+    width: 1px;
+    margin: -1px;
+    overflow: hidden;
+    position: absolute;
+    clip: rect(0 0 0 0);
+    -webkit-clip-path: inset(100%);
+    clip-path: inset(100%); }
+  .collapse > label {
+    flex-grow: 1;
+    display: inline-block;
+    height: 1.25rem;
+    cursor: pointer;
+    transition: background 0.2s;
+    color: var(--collapse-label-fore-color);
+    background: var(--collapse-label-back-color);
+    border: 0.0714285714rem solid var(--collapse-selected-border-color);
+    padding: calc(1.25 * var(--universal-padding)); }
+    .collapse > label:hover, .collapse > label:focus {
+      background: var(--collapse-label-hover-back-color); }
+    .collapse > label + div {
+      flex-basis: auto;
+      height: 1px;
+      width: 1px;
+      margin: -1px;
+      overflow: hidden;
+      position: absolute;
+      clip: rect(0 0 0 0);
+      -webkit-clip-path: inset(100%);
+      clip-path: inset(100%);
+      transition: max-height 0.3s;
+      max-height: 1px; }
+  .collapse > :checked + label {
+    background: var(--collapse-selected-label-back-color);
+    border-color: var(--collapse-selected-label-border-color); }
+    .collapse > :checked + label + div {
+      box-sizing: border-box;
+      position: relative;
+      width: 100%;
+      height: auto;
+      overflow: auto;
+      margin: 0;
+      background: var(--collapse-content-back-color);
+      border: 0.0714285714rem solid var(--collapse-selected-border-color);
+      border-top: 0;
+      padding: var(--universal-padding);
+      clip: auto;
+      -webkit-clip-path: inset(0%);
+      clip-path: inset(0%);
+      max-height: 100%; }
+  .collapse > label:not(:first-of-type) {
+    border-top: 0; }
+  .collapse > label:first-of-type {
+    border-radius: var(--universal-border-radius) var(--universal-border-radius) 0 0; }
+  .collapse > label:last-of-type:not(:first-of-type) {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+  .collapse > label:last-of-type:first-of-type {
+    border-radius: var(--universal-border-radius); }
+  .collapse > :checked:last-of-type:not(:first-of-type) + label {
+    border-radius: 0; }
+  .collapse > :checked:last-of-type + label + div {
+    border-radius: 0 0 var(--universal-border-radius) var(--universal-border-radius); }
+
+/*
+  Custom elements for contextual background elements, toasts and tooltips.
+*/
+mark.tertiary {
+  --mark-back-color: #3cb4e6; }
+
+mark.tag {
+  padding: calc(var(--universal-padding)/2) var(--universal-padding);
+  border-radius: 1em; }
+
+/*
+  Definitions for progress elements and spinners.
+*/
+/* Progress module CSS variable definitions */
+:root {
+  --progress-back-color: #3cb4e6;
+  --progress-fore-color: #555; }
+
+progress {
+  display: block;
+  vertical-align: baseline;
+  -webkit-appearance: none;
+  -moz-appearance: none;
+  appearance: none;
+  height: 0.75rem;
+  width: calc(100% - 2 * var(--universal-margin));
+  margin: var(--universal-margin);
+  border: 0;
+  border-radius: calc(2 * var(--universal-border-radius));
+  background: var(--progress-back-color);
+  color: var(--progress-fore-color); }
+  progress::-webkit-progress-value {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress::-webkit-progress-bar {
+    background: var(--progress-back-color); }
+  progress::-moz-progress-bar {
+    background: var(--progress-fore-color);
+    border-top-left-radius: calc(2 * var(--universal-border-radius));
+    border-bottom-left-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-webkit-progress-value {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress[value="1000"]::-moz-progress-bar {
+    border-radius: calc(2 * var(--universal-border-radius)); }
+  progress.inline {
+    display: inline-block;
+    vertical-align: middle;
+    width: 60%; }
+
+:root {
+  --spinner-back-color: #ddd;
+  --spinner-fore-color: #555; }
+
+@keyframes spinner-donut-anim {
+  0% {
+    transform: rotate(0deg); }
+  100% {
+    transform: rotate(360deg); } }
+.spinner {
+  display: inline-block;
+  margin: var(--universal-margin);
+  border: 0.25rem solid var(--spinner-back-color);
+  border-left: 0.25rem solid var(--spinner-fore-color);
+  border-radius: 50%;
+  width: 1.25rem;
+  height: 1.25rem;
+  animation: spinner-donut-anim 1.2s linear infinite; }
+
+/*
+  Custom elements for progress bars and spinners.
+*/
+progress.primary {
+  --progress-fore-color: #1976d2; }
+
+progress.secondary {
+  --progress-fore-color: #d32f2f; }
+
+progress.tertiary {
+  --progress-fore-color: #308732; }
+
+.spinner.primary {
+  --spinner-fore-color: #1976d2; }
+
+.spinner.secondary {
+  --spinner-fore-color: #d32f2f; }
+
+.spinner.tertiary {
+  --spinner-fore-color: #308732; }
+
+/*
+  Definitions for icons - powered by Feather (https://feathericons.com/).
+*/
+span[class^='icon-'] {
+  display: inline-block;
+  height: 1em;
+  width: 1em;
+  vertical-align: -0.125em;
+  background-size: contain;
+  margin: 0 calc(var(--universal-margin) / 4); }
+  span[class^='icon-'].secondary {
+    -webkit-filter: invert(25%);
+    filter: invert(25%); }
+  span[class^='icon-'].inverse {
+    -webkit-filter: invert(100%);
+    filter: invert(100%); }
+
+span.icon-alert {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='8' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='16' x2='12' y2='16'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-bookmark {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M19 21l-7-5-7 5V5a2 2 0 0 1 2-2h10a2 2 0 0 1 2 2z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-calendar {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='4' width='18' height='18' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='16' y1='2' x2='16' y2='6'%3E%3C/line%3E%3Cline x1='8' y1='2' x2='8' y2='6'%3E%3C/line%3E%3Cline x1='3' y1='10' x2='21' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-credit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='1' y='4' width='22' height='16' rx='2' ry='2'%3E%3C/rect%3E%3Cline x1='1' y1='10' x2='23' y2='10'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-edit {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 14.66V20a2 2 0 0 1-2 2H4a2 2 0 0 1-2-2V6a2 2 0 0 1 2-2h5.34'%3E%3C/path%3E%3Cpolygon points='18 2 22 6 12 16 8 16 8 12 18 2'%3E%3C/polygon%3E%3C/svg%3E"); }
+span.icon-link {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M18 13v6a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2V8a2 2 0 0 1 2-2h6'%3E%3C/path%3E%3Cpolyline points='15 3 21 3 21 9'%3E%3C/polyline%3E%3Cline x1='10' y1='14' x2='21' y2='3'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-help {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M9.09 9a3 3 0 0 1 5.83 1c0 2-3 3-3 3'%3E%3C/path%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='17' x2='12' y2='17'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-home {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M3 9l9-7 9 7v11a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2z'%3E%3C/path%3E%3Cpolyline points='9 22 9 12 15 12 15 22'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-info {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='10'%3E%3C/circle%3E%3Cline x1='12' y1='16' x2='12' y2='12'%3E%3C/line%3E%3Cline x1='12' y1='8' x2='12' y2='8'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-lock {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Crect x='3' y='11' width='18' height='11' rx='2' ry='2'%3E%3C/rect%3E%3Cpath d='M7 11V7a5 5 0 0 1 10 0v4'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-mail {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 4h16c1.1 0 2 .9 2 2v12c0 1.1-.9 2-2 2H4c-1.1 0-2-.9-2-2V6c0-1.1.9-2 2-2z'%3E%3C/path%3E%3Cpolyline points='22,6 12,13 2,6'%3E%3C/polyline%3E%3C/svg%3E"); }
+span.icon-location {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 10c0 7-9 13-9 13s-9-6-9-13a9 9 0 0 1 18 0z'%3E%3C/path%3E%3Ccircle cx='12' cy='10' r='3'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-phone {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M22 16.92v3a2 2 0 0 1-2.18 2 19.79 19.79 0 0 1-8.63-3.07 19.5 19.5 0 0 1-6-6 19.79 19.79 0 0 1-3.07-8.67A2 2 0 0 1 4.11 2h3a2 2 0 0 1 2 1.72 12.84 12.84 0 0 0 .7 2.81 2 2 0 0 1-.45 2.11L8.09 9.91a16 16 0 0 0 6 6l1.27-1.27a2 2 0 0 1 2.11-.45 12.84 12.84 0 0 0 2.81.7A2 2 0 0 1 22 16.92z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-rss {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M4 11a9 9 0 0 1 9 9'%3E%3C/path%3E%3Cpath d='M4 4a16 16 0 0 1 16 16'%3E%3C/path%3E%3Ccircle cx='5' cy='19' r='1'%3E%3C/circle%3E%3C/svg%3E"); }
+span.icon-search {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='11' cy='11' r='8'%3E%3C/circle%3E%3Cline x1='21' y1='21' x2='16.65' y2='16.65'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-settings {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='12' cy='12' r='3'%3E%3C/circle%3E%3Cpath d='M19.4 15a1.65 1.65 0 0 0 .33 1.82l.06.06a2 2 0 0 1 0 2.83 2 2 0 0 1-2.83 0l-.06-.06a1.65 1.65 0 0 0-1.82-.33 1.65 1.65 0 0 0-1 1.51V21a2 2 0 0 1-2 2 2 2 0 0 1-2-2v-.09A1.65 1.65 0 0 0 9 19.4a1.65 1.65 0 0 0-1.82.33l-.06.06a2 2 0 0 1-2.83 0 2 2 0 0 1 0-2.83l.06-.06a1.65 1.65 0 0 0 .33-1.82 1.65 1.65 0 0 0-1.51-1H3a2 2 0 0 1-2-2 2 2 0 0 1 2-2h.09A1.65 1.65 0 0 0 4.6 9a1.65 1.65 0 0 0-.33-1.82l-.06-.06a2 2 0 0 1 0-2.83 2 2 0 0 1 2.83 0l.06.06a1.65 1.65 0 0 0 1.82.33H9a1.65 1.65 0 0 0 1-1.51V3a2 2 0 0 1 2-2 2 2 0 0 1 2 2v.09a1.65 1.65 0 0 0 1 1.51 1.65 1.65 0 0 0 1.82-.33l.06-.06a2 2 0 0 1 2.83 0 2 2 0 0 1 0 2.83l-.06.06a1.65 1.65 0 0 0-.33 1.82V9a1.65 1.65 0 0 0 1.51 1H21a2 2 0 0 1 2 2 2 2 0 0 1-2 2h-.09a1.65 1.65 0 0 0-1.51 1z'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-share {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='18' cy='5' r='3'%3E%3C/circle%3E%3Ccircle cx='6' cy='12' r='3'%3E%3C/circle%3E%3Ccircle cx='18' cy='19' r='3'%3E%3C/circle%3E%3Cline x1='8.59' y1='13.51' x2='15.42' y2='17.49'%3E%3C/line%3E%3Cline x1='15.41' y1='6.51' x2='8.59' y2='10.49'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-cart {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Ccircle cx='9' cy='21' r='1'%3E%3C/circle%3E%3Ccircle cx='20' cy='21' r='1'%3E%3C/circle%3E%3Cpath d='M1 1h4l2.68 13.39a2 2 0 0 0 2 1.61h9.72a2 2 0 0 0 2-1.61L23 6H6'%3E%3C/path%3E%3C/svg%3E"); }
+span.icon-upload {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M21 15v4a2 2 0 0 1-2 2H5a2 2 0 0 1-2-2v-4'%3E%3C/path%3E%3Cpolyline points='17 8 12 3 7 8'%3E%3C/polyline%3E%3Cline x1='12' y1='3' x2='12' y2='15'%3E%3C/line%3E%3C/svg%3E"); }
+span.icon-user {
+  background-image: url("data:image/svg+xml,%3Csvg xmlns='http://www.w3.org/2000/svg' width='24' height='24' viewBox='0 0 24 24' fill='none' stroke='%2303234b' stroke-width='2' stroke-linecap='round' stroke-linejoin='round'%3E%3Cpath d='M20 21v-2a4 4 0 0 0-4-4H8a4 4 0 0 0-4 4v2'%3E%3C/path%3E%3Ccircle cx='12' cy='7' r='4'%3E%3C/circle%3E%3C/svg%3E"); }
+
+/*
+  Definitions for utilities and helper classes.
+*/
+/* Utility module CSS variable definitions */
+:root {
+  --generic-border-color: rgba(0, 0, 0, 0.3);
+  --generic-box-shadow: 0 0.2857142857rem 0.2857142857rem 0 rgba(0, 0, 0, 0.125), 0 0.1428571429rem 0.1428571429rem -0.1428571429rem rgba(0, 0, 0, 0.125); }
+
+.hidden {
+  display: none !important; }
+
+.visually-hidden {
+  position: absolute !important;
+  width: 1px !important;
+  height: 1px !important;
+  margin: -1px !important;
+  border: 0 !important;
+  padding: 0 !important;
+  clip: rect(0 0 0 0) !important;
+  -webkit-clip-path: inset(100%) !important;
+  clip-path: inset(100%) !important;
+  overflow: hidden !important; }
+
+.bordered {
+  border: 0.0714285714rem solid var(--generic-border-color) !important; }
+
+.rounded {
+  border-radius: var(--universal-border-radius) !important; }
+
+.circular {
+  border-radius: 50% !important; }
+
+.shadowed {
+  box-shadow: var(--generic-box-shadow) !important; }
+
+.responsive-margin {
+  margin: calc(var(--universal-margin) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-margin {
+      margin: calc(var(--universal-margin) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-margin {
+      margin: var(--universal-margin) !important; } }
+
+.responsive-padding {
+  padding: calc(var(--universal-padding) / 4) !important; }
+  @media screen and (min-width: 500px) {
+    .responsive-padding {
+      padding: calc(var(--universal-padding) / 2) !important; } }
+  @media screen and (min-width: 1280px) {
+    .responsive-padding {
+      padding: var(--universal-padding) !important; } }
+
+@media screen and (max-width: 499px) {
+  .hidden-sm {
+    display: none !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .hidden-md {
+    display: none !important; } }
+@media screen and (min-width: 1280px) {
+  .hidden-lg {
+    display: none !important; } }
+@media screen and (max-width: 499px) {
+  .visually-hidden-sm {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 500px) and (max-width: 1279px) {
+  .visually-hidden-md {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+@media screen and (min-width: 1280px) {
+  .visually-hidden-lg {
+    position: absolute !important;
+    width: 1px !important;
+    height: 1px !important;
+    margin: -1px !important;
+    border: 0 !important;
+    padding: 0 !important;
+    clip: rect(0 0 0 0) !important;
+    -webkit-clip-path: inset(100%) !important;
+    clip-path: inset(100%) !important;
+    overflow: hidden !important; } }
+
+/*# sourceMappingURL=mini-custom.css.map */
+
+img[alt="ST logo"] { display: block; margin: auto; width: 75%; max-width: 250px; min-width: 71px; }
+img[alt="Cube logo"] { float: right; width: 30%; max-width: 10rem; min-width: 8rem; padding-right: 1rem;}
+
+.figure {
+  display: block;
+  margin-left: auto;
+  margin-right: auto;
+  text-align: center;
+}
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/st_logo_2020.png b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/st_logo_2020.png
new file mode 100644
index 000000000..d6cebb5ac
Binary files /dev/null and b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/_htmresc/st_logo_2020.png differ
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.c b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.c
new file mode 100644
index 000000000..952ff16c9
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.c
@@ -0,0 +1,886 @@
+/**
+  ******************************************************************************
+  * @file    tcpp0203.c
+  * @author  MCD Application Team
+  * @brief   This file provides the TCPP02/03 Type-C port protection driver.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "tcpp0203.h"
+
+#if  defined(_TRACE)
+#include "usbpd_core.h"
+#include "usbpd_trace.h"
+#include "string.h"
+#include "stdio.h"
+#endif /* _TRACE */
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Components
+  * @{
+  */
+
+/** @addtogroup TCPP0203
+  * @brief     This file provides a set of functions needed to drive the
+  *            TCPP02/03 Type-C port protection.
+  * @{
+  */
+
+/** @defgroup TCPP0203_Private_Constants Private Constants
+  * @{
+  */
+
+/* Compilation option in order to enable/disable a concistency check performed
+   after each I2C access into TCPP0203 registers : goal is to check that written value in Reg0
+   is properly reflected into reg1 register content.
+   To enable register consistency check, please uncomment below definition.
+   To disable it, comment below line */
+/* #define TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+/** @defgroup TCPP0203_Private_Types Private Types
+  * @{
+  */
+/* TCPP02/03 Type-C port protection driver structure initialization */
+TCPP0203_Drv_t TCPP0203_Driver =
+{
+  TCPP0203_Init,
+  TCPP0203_DeInit,
+  TCPP0203_Reset,
+  TCPP0203_SetVConnSwitch,
+  TCPP0203_SetGateDriverProvider,
+  TCPP0203_SetGateDriverConsumer,
+  TCPP0203_SetPowerMode,
+  TCPP0203_SetVBusDischarge,
+  TCPP0203_SetVConnDischarge,
+  TCPP0203_GetVConnSwitchAck,
+  TCPP0203_GetGateDriverProviderAck,
+  TCPP0203_GetGateDriverConsumerAck,
+  TCPP0203_GetPowerModeAck,
+  TCPP0203_GetVBusDischargeAck,
+  TCPP0203_GetVConnDischargeAck,
+  TCPP0203_GetOCPVConnFlag,
+  TCPP0203_GetOCPVBusFlag,
+  TCPP0203_GetOVPVBusFlag,
+  TCPP0203_GetOVPCCFlag,
+  TCPP0203_GetOTPFlag,
+  TCPP0203_GetVBusOkFlag,
+  TCPP0203_ReadTCPPType,
+  TCPP0203_ReadVCONNPower,
+  TCPP0203_WriteCtrlRegister,
+  TCPP0203_ReadAckRegister,
+  TCPP0203_ReadFlagRegister,
+};
+
+/**
+  * @}
+  */
+
+/** @defgroup TCPP0203_Private_Variables Private Variables
+  * @{
+  */
+static uint8_t TCPP0203_DeviceType = TCPP0203_DEVICE_TYPE_03;
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+static uint8_t Reg0_Expected_Value = 0x00;
+static uint8_t Reg1_LastRead_Value = 0x00;
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+/**
+  * @}
+  */
+
+/* Private function prototypes -----------------------------------------------*/
+
+/** @defgroup TCPP0203_Private_Function_Prototypes TCPP0203 Private Function Prototypes
+  * @{
+  */
+static int32_t TCPP0203_ReadRegWrap(const void *handle, uint8_t Reg, uint8_t *Data, uint8_t Length);
+static int32_t TCPP0203_WriteRegWrap(const void *handle, uint8_t Reg, uint8_t *Data, uint8_t Length);
+
+static int32_t TCPP0203_ModifyReg0(TCPP0203_Object_t *pObj, uint8_t Value, uint8_t Mask);
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+static int32_t TCPP0203_CheckReg0Reg1(TCPP0203_Object_t *pObj, uint8_t Reg0ExpectedValue);
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+/**
+  * @}
+  */
+
+/** @defgroup TCPP0203_Exported_Functions TCPP0203 Exported Functions
+  * @{
+  */
+
+/**
+  * @brief  Register Bus Io to component
+  * @param  Component object pointer
+  * @retval Status of execution
+  */
+int32_t TCPP0203_RegisterBusIO(TCPP0203_Object_t *pObj, TCPP0203_IO_t *pIO)
+{
+  int32_t ret;
+
+  if (pObj == NULL)
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    pObj->IO.Init      = pIO->Init;
+    pObj->IO.DeInit    = pIO->DeInit;
+    pObj->IO.Address   = pIO->Address;
+    pObj->IO.WriteReg  = pIO->WriteReg;
+    pObj->IO.ReadReg   = pIO->ReadReg;
+    pObj->IO.GetTick   = pIO->GetTick;
+
+    pObj->Ctx.ReadReg  = TCPP0203_ReadRegWrap;
+    pObj->Ctx.WriteReg = TCPP0203_WriteRegWrap;
+    pObj->Ctx.handle   = pObj;
+
+    if (pObj->IO.Init != NULL)
+    {
+      ret = pObj->IO.Init();
+    }
+    else
+    {
+      ret = TCPP0203_ERROR;
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Initializes the TCPP0203 interface
+  * @param  pObj Pointer to component object
+  * @retval Component status (TCPP0203_OK / TCPP0203_ERROR)
+  */
+int32_t TCPP0203_Init(TCPP0203_Object_t *pObj)
+{
+  int32_t ret = 0;
+  uint8_t tmp;
+
+  if (pObj->IsInitialized == 0U)
+  {
+    /* Read TCPP Device type */
+    ret += tcpp0203_read_reg(&pObj->Ctx, TCPP0203_READ_REG2, &tmp, 1);
+
+    if (ret == TCPP0203_OK)
+    {
+      TCPP0203_DeviceType = (tmp & TCPP0203_DEVICE_TYPE_MSK);
+    }
+    else
+    {
+      TCPP0203_DeviceType = TCPP0203_DEVICE_TYPE_02;
+    }
+    pObj->IsInitialized = 1U;
+  }
+
+  if (ret != TCPP0203_OK)
+  {
+    ret = TCPP0203_ERROR;
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Deinitializes the TCPP0203 interface
+  * @param  pObj Pointer to component object
+  * @retval Component status (TCPP0203_OK / TCPP0203_ERROR)
+  */
+int32_t TCPP0203_DeInit(TCPP0203_Object_t *pObj)
+{
+  if (pObj->IsInitialized == 1U)
+  {
+    /* De-Initialize IO BUS layer */
+    pObj->IO.DeInit();
+
+    pObj->IsInitialized = 0U;
+  }
+
+  return TCPP0203_OK;
+}
+
+/**
+  * @brief  Resets TCPP0203 register (Reg0)
+  * @param  pObj Pointer to component object
+  * @retval Component status (TCPP0203_OK / TCPP0203_ERROR)
+  */
+int32_t TCPP0203_Reset(TCPP0203_Object_t *pObj)
+{
+  int32_t ret = TCPP0203_OK;
+  uint8_t tmp = TCPP0203_REG0_RST_VALUE;
+
+  /* Write reset values in Reg0 register */
+  if (tcpp0203_write_reg(&pObj->Ctx, TCPP0203_PROG_CTRL, &tmp, 1) != TCPP0203_OK)
+  {
+    ret = TCPP0203_ERROR;
+  }
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+  Reg0_Expected_Value = TCPP0203_REG0_RST_VALUE;
+  Reg1_LastRead_Value = TCPP0203_REG0_RST_VALUE;
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 VConn Switch
+  * @param  pObj Pointer to component object
+  * @param  VConnSwitch VConn Switch requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_VCONN_SWITCH_OPEN VConn switch open
+  *          @arg TCPP0203_VCONN_SWITCH_CC1  VConn closed on CC1
+  *          @arg TCPP0203_VCONN_SWITCH_CC2  VConn closed on CC2
+  * @retval Component status
+  */
+int32_t TCPP0203_SetVConnSwitch(TCPP0203_Object_t *pObj, uint8_t VConnSwitch)
+{
+  int32_t ret = TCPP0203_OK;
+
+  if ((VConnSwitch != TCPP0203_VCONN_SWITCH_OPEN)
+      && (VConnSwitch != TCPP0203_VCONN_SWITCH_CC1)
+      && (VConnSwitch != TCPP0203_VCONN_SWITCH_CC2))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update VConn switch setting in Writing register Reg0 */
+    ret += TCPP0203_ModifyReg0(pObj, VConnSwitch, TCPP0203_VCONN_SWITCH_MSK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 Gate Driver for Provider path
+  * @param  pObj Pointer to component object
+  * @param  GateDriverProvider GDP switch load requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_GD_PROVIDER_SWITCH_OPEN    GDP Switch Load Open
+  *          @arg TCPP0203_GD_PROVIDER_SWITCH_CLOSED  GDP Switch Load closed
+  * @retval Component status
+  */
+int32_t TCPP0203_SetGateDriverProvider(TCPP0203_Object_t *pObj, uint8_t GateDriverProvider)
+{
+  int32_t ret = TCPP0203_OK;
+
+  if ((GateDriverProvider != TCPP0203_GD_PROVIDER_SWITCH_OPEN)
+      && (GateDriverProvider != TCPP0203_GD_PROVIDER_SWITCH_CLOSED))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update GDP Switch Load setting in Writing register Reg0 */
+    if (GateDriverProvider == TCPP0203_GD_PROVIDER_SWITCH_CLOSED)
+    {
+      /* If Gate Driver Provider is to be closed, Gate Driver Consumer should be open */
+      ret += TCPP0203_ModifyReg0(pObj, (GateDriverProvider | TCPP0203_GD_CONSUMER_SWITCH_OPEN),
+                                 (TCPP0203_GD_PROVIDER_SWITCH_MSK | TCPP0203_GD_CONSUMER_SWITCH_MSK));
+    }
+    else
+    {
+      ret += TCPP0203_ModifyReg0(pObj, GateDriverProvider, TCPP0203_GD_PROVIDER_SWITCH_MSK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 Gate Driver for Consumer path
+  * @param  pObj Pointer to component object
+  * @param  GateDriverConsumer GDC switch load requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_GD_CONSUMER_SWITCH_OPEN    GDC Switch Load Open
+  *          @arg TCPP0203_GD_CONSUMER_SWITCH_CLOSED  GDC Switch Load closed
+  * @retval Component status
+  */
+int32_t TCPP0203_SetGateDriverConsumer(TCPP0203_Object_t *pObj, uint8_t GateDriverConsumer)
+{
+  int32_t ret = TCPP0203_OK;
+
+  /* Check if TCPP type is TCPP03. Otherwise, return error */
+  if (TCPP0203_DeviceType != TCPP0203_DEVICE_TYPE_03)
+  {
+    return (TCPP0203_ERROR);
+  }
+
+  if ((GateDriverConsumer != TCPP0203_GD_CONSUMER_SWITCH_OPEN)
+      && (GateDriverConsumer != TCPP0203_GD_CONSUMER_SWITCH_CLOSED))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update GDC Switch Load setting in Writing register Reg0 */
+    if (GateDriverConsumer == TCPP0203_GD_CONSUMER_SWITCH_CLOSED)
+    {
+      /* If Gate Driver Consumer is to be closed, Gate Driver Provider should be open */
+      ret += TCPP0203_ModifyReg0(pObj, (GateDriverConsumer | TCPP0203_GD_PROVIDER_SWITCH_OPEN),
+                                 (TCPP0203_GD_PROVIDER_SWITCH_MSK | TCPP0203_GD_CONSUMER_SWITCH_MSK));
+    }
+    else
+    {
+      ret += TCPP0203_ModifyReg0(pObj, GateDriverConsumer, TCPP0203_GD_CONSUMER_SWITCH_MSK);
+    }
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 Power Mode
+  * @param  pObj Pointer to component object
+  * @param  PowerMode Power mode requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_POWER_MODE_HIBERNATE    Hibernate
+  *          @arg TCPP0203_POWER_MODE_LOWPOWER     Low Power
+  *          @arg TCPP0203_POWER_MODE_NORMAL       Normal
+  * @retval Component status
+  */
+int32_t TCPP0203_SetPowerMode(TCPP0203_Object_t *pObj, uint8_t PowerMode)
+{
+  int32_t ret = TCPP0203_OK;
+
+  if ((PowerMode != TCPP0203_POWER_MODE_HIBERNATE)
+      && (PowerMode != TCPP0203_POWER_MODE_LOWPOWER)
+      && (PowerMode != TCPP0203_POWER_MODE_NORMAL))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update Power Mode setting in Writing register Reg0 */
+    ret += TCPP0203_ModifyReg0(pObj, PowerMode, TCPP0203_POWER_MODE_MSK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 Gate Driver for Provider path
+  * @param  pObj Pointer to component object
+  * @param  VBusDischarge VBUS Discharge requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_VBUS_DISCHARGE_OFF    VBUS Discharge Off
+  *          @arg TCPP0203_VBUS_DISCHARGE_ON     VBUS Discharge On
+  * @retval Component status
+  */
+int32_t TCPP0203_SetVBusDischarge(TCPP0203_Object_t *pObj, uint8_t VBusDischarge)
+{
+  int32_t ret = TCPP0203_OK;
+
+  if ((VBusDischarge != TCPP0203_VBUS_DISCHARGE_OFF)
+      && (VBusDischarge != TCPP0203_VBUS_DISCHARGE_ON))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update VBUS Discharge setting in Writing register Reg0 */
+    ret += TCPP0203_ModifyReg0(pObj, VBusDischarge, TCPP0203_VBUS_DISCHARGE_MSK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Configure TCPP0203 Gate Driver for Provider path
+  * @param  pObj Pointer to component object
+  * @param  VConnDischarge GDP switch load requested setting
+  *         This parameter can be one of the following values:
+  *          @arg TCPP0203_VCONN_DISCHARGE_OFF    VConn Discharge Off
+  *          @arg TCPP0203_VCONN_DISCHARGE_ON     VConn Discharge On
+  * @retval Component status
+  */
+int32_t TCPP0203_SetVConnDischarge(TCPP0203_Object_t *pObj, uint8_t VConnDischarge)
+{
+  int32_t ret = TCPP0203_OK;
+
+  if ((VConnDischarge != TCPP0203_VCONN_DISCHARGE_OFF)
+      && (VConnDischarge != TCPP0203_VCONN_DISCHARGE_ON))
+  {
+    ret = TCPP0203_ERROR;
+  }
+  else
+  {
+    /* Update VConn Discharge setting in Writing register Reg0 */
+    ret += TCPP0203_ModifyReg0(pObj, VConnDischarge, TCPP0203_VCONN_DISCHARGE_MSK);
+  }
+
+  return ret;
+}
+
+/**
+  * @brief  Get VConn switch Ack value
+  * @param  pObj Pointer to component object
+  * @param  pVConnSwitchAck Pointer on VConn switch Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_VCONN_SWITCH_OPEN VConn switch open Ack
+  *          @arg TCPP0203_VCONN_SWITCH_CC1  VConn closed on CC1 Ack
+  *          @arg TCPP0203_VCONN_SWITCH_CC2  VConn closed on CC2 Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetVConnSwitchAck(TCPP0203_Object_t *pObj, uint8_t *pVConnSwitchAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pVConnSwitchAck = (tmp & TCPP0203_VCONN_SWITCH_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get Gate Driver Provider Ack value
+  * @param  pObj Pointer to component object
+  * @param  pGateDriverProviderAck Pointer on Gate Driver Provider Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_GD_PROVIDER_SWITCH_ACK_OPEN    Gate Driver Provider Open Ack
+  *          @arg TCPP0203_GD_PROVIDER_SWITCH_ACK_CLOSED  Gate Driver Provider Closed Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetGateDriverProviderAck(TCPP0203_Object_t *pObj, uint8_t *pGateDriverProviderAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pGateDriverProviderAck = (tmp & TCPP0203_GD_PROVIDER_SWITCH_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get Gate Driver Consumer Ack value
+  * @param  pObj Pointer to component object
+  * @param  pGateDriverConsumerAck Pointer on Gate Driver Consumer Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_GD_CONSUMER_SWITCH_ACK_OPEN    Gate Driver Consumer Open Ack
+  *          @arg TCPP0203_GD_CONSUMER_SWITCH_ACK_CLOSED  Gate Driver Consumer Closed Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetGateDriverConsumerAck(TCPP0203_Object_t *pObj, uint8_t *pGateDriverConsumerAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  /* Check if TCPP type is TCPP03. Otherwise, return error */
+  if (TCPP0203_DeviceType != TCPP0203_DEVICE_TYPE_03)
+  {
+    return (TCPP0203_ERROR);
+  }
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pGateDriverConsumerAck = (tmp & TCPP0203_GD_CONSUMER_SWITCH_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get Power Mode Ack value
+  * @param  pObj Pointer to component object
+  * @param  pPowerModeAck Pointer on Power Mode Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_POWER_MODE_ACK_HIBERNATE  Power Mode Hibernate Ack
+  *          @arg TCPP0203_POWER_MODE_ACK_LOWPOWER   Power Mode Low Power Ack
+  *          @arg TCPP0203_POWER_MODE_ACK_NORMAL     Power Mode Normal Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetPowerModeAck(TCPP0203_Object_t *pObj, uint8_t *pPowerModeAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pPowerModeAck = (tmp & TCPP0203_POWER_MODE_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get VBUS Discharge Ack value
+  * @param  pObj Pointer to component object
+  * @param  pVBusDischargeAck Pointer on VBUS Discharge Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_VBUS_DISCHARGE_ACK_OFF   VBUS Discharge Off Ack
+  *          @arg TCPP0203_VBUS_DISCHARGE_ACK_ON    VBUS Discharge On Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetVBusDischargeAck(TCPP0203_Object_t *pObj, uint8_t *pVBusDischargeAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pVBusDischargeAck = (tmp & TCPP0203_VBUS_DISCHARGE_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get VConn Discharge Ack value
+  * @param  pObj Pointer to component object
+  * @param  pVConnDischargeAck Pointer on VConn Discharge Ack value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_VCONN_DISCHARGE_ACK_OFF   VConn Discharge Off Ack
+  *          @arg TCPP0203_VCONN_DISCHARGE_ACK_ON    VConn Discharge On Ack
+  * @retval Component status
+  */
+int32_t TCPP0203_GetVConnDischargeAck(TCPP0203_Object_t *pObj, uint8_t *pVConnDischargeAck)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+  *pVConnDischargeAck = (tmp & TCPP0203_VCONN_DISCHARGE_ACK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get OCP VConn Flag value
+  * @param  pObj Pointer to component object
+  * @param  pOCPVConnFlag Pointer on OCP VConn Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_OCP_VCONN_RESET   OCP VConn flag not set
+  *          @arg TCPP0203_FLAG_OCP_VCONN_SET     OCP VConn flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetOCPVConnFlag(TCPP0203_Object_t *pObj, uint8_t *pOCPVConnFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pOCPVConnFlag = (tmp & TCPP0203_FLAG_OCP_VCONN_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get OCP VBUS Flag value
+  * @param  pObj Pointer to component object
+  * @param  pGetOCPVBusFlag Pointer on OCP VBUS Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_OCP_VBUS_RESET   OCP VBUS flag not set
+  *          @arg TCPP0203_FLAG_OCP_VBUS_SET     OCP VBUS flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetOCPVBusFlag(TCPP0203_Object_t *pObj, uint8_t *pGetOCPVBusFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pGetOCPVBusFlag = (tmp & TCPP0203_FLAG_OCP_VBUS_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get OVP VBUS Flag value
+  * @param  pObj Pointer to component object
+  * @param  pOVPVBusFlag Pointer on OVP VBUS Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_OVP_VBUS_RESET   OVP VBUS flag not set
+  *          @arg TCPP0203_FLAG_OVP_VBUS_SET     OVP VBUS flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetOVPVBusFlag(TCPP0203_Object_t *pObj, uint8_t *pOVPVBusFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pOVPVBusFlag = (tmp & TCPP0203_FLAG_OVP_VBUS_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get OVP CC Flag value
+  * @param  pObj Pointer to component object
+  * @param  pOVPCCFlag Pointer on OVP CC Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_OVP_CC_RESET   OVP CC flag not set
+  *          @arg TCPP0203_FLAG_OVP_CC_SET     OVP CC flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetOVPCCFlag(TCPP0203_Object_t *pObj, uint8_t *pOVPCCFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pOVPCCFlag = (tmp & TCPP0203_FLAG_OVP_CC_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get Over Temperature Flag value
+  * @param  pObj Pointer to component object
+  * @param  pOTPFlag Pointer on Over Temperature Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_OTP_RESET   Over Temperature flag not set
+  *          @arg TCPP0203_FLAG_OTP_SET     Over Temperature flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetOTPFlag(TCPP0203_Object_t *pObj, uint8_t *pOTPFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pOTPFlag = (tmp & TCPP0203_FLAG_OTP_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get VBUS OK Flag value
+  * @param  pObj Pointer to component object
+  * @param  pVBusOkFlag Pointer on VBUS OK Flag value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_VBUS_OK_RESET   VBUS OK flag not set
+  *          @arg TCPP0203_FLAG_VBUS_OK_SET     VBUS OK flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_GetVBusOkFlag(TCPP0203_Object_t *pObj, uint8_t *pVBusOkFlag)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pVBusOkFlag = (tmp & TCPP0203_FLAG_VBUS_OK_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get TCPP0203 Device Type value
+  * @param  pObj Pointer to component object
+  * @param  pTCPPType Pointer on TCPP0203 Device Type value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_DEVICE_TYPE_02   TCPP02 Type
+  *          @arg TCPP0203_DEVICE_TYPE_03   TCPP03 Type
+  * @retval Component status
+  */
+int32_t TCPP0203_ReadTCPPType(TCPP0203_Object_t *pObj, uint8_t *pTCPPType)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pTCPPType = (tmp & TCPP0203_DEVICE_TYPE_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Get VConn Power value
+  * @param  pObj Pointer to component object
+  * @param  pVCONNPower Pointer on VConn Power value
+  *         This output parameter can be one of the following values:
+  *          @arg TCPP0203_FLAG_VCONN_PWR_1W       OCP VConn flag not set
+  *          @arg TCPP0203_FLAG_VCONN_PWR_0_1W     OCP VConn flag set
+  * @retval Component status
+  */
+int32_t TCPP0203_ReadVCONNPower(TCPP0203_Object_t *pObj, uint8_t *pVCONNPower)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, &tmp, 1);
+  *pVCONNPower = (tmp & TCPP0203_FLAG_VCONN_PWR_MSK);
+
+  return ret;
+}
+
+/**
+  * @brief  Set complete Ctrl register value (Reg 0)
+  * @param  pObj Pointer to component object
+  * @param  pCtrlRegister Pointer on Ctrl register value
+  * @retval Component status
+  */
+int32_t TCPP0203_WriteCtrlRegister(TCPP0203_Object_t *pObj, uint8_t *pCtrlRegister)
+{
+  int32_t ret;
+
+  /* Update value in writing register (reg0) */
+  ret = tcpp0203_write_reg(&pObj->Ctx, TCPP0203_PROG_CTRL, pCtrlRegister, 1);
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+  Reg0_Expected_Value = *pCtrlRegister;
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+  return ret;
+}
+
+/**
+  * @brief  Get complete Ack register value
+  * @param  pObj Pointer to component object
+  * @param  pAckRegister Pointer on Ack register value
+  * @retval Component status
+  */
+int32_t TCPP0203_ReadAckRegister(TCPP0203_Object_t *pObj, uint8_t *pAckRegister)
+{
+  int32_t ret;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, pAckRegister, 1);
+
+  return ret;
+}
+
+/**
+  * @brief  Get complete Flag register value
+  * @param  pObj Pointer to component object
+  * @param  pFlagRegister Pointer on Flag register value
+  * @retval Component status
+  */
+int32_t TCPP0203_ReadFlagRegister(TCPP0203_Object_t *pObj, uint8_t *pFlagRegister)
+{
+  int32_t ret;
+
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_FLAG_REG, pFlagRegister, 1);
+
+  return ret;
+}
+
+/******************** Static functions ****************************************/
+/**
+  * @brief  Wrap TCPP0203 read function to Bus IO function
+  * @param  handle  Component object handle
+  * @param  Reg     Target register address to read
+  * @param  pData   Buffer where Target register value should be stored
+  * @param  Length  buffer size to be read
+  * @retval error status
+  */
+static int32_t TCPP0203_ReadRegWrap(const void *handle, uint8_t Reg, uint8_t *pData, uint8_t Length)
+{
+  const TCPP0203_Object_t *pObj = (const TCPP0203_Object_t *)handle;
+
+  return pObj->IO.ReadReg(pObj->IO.Address, Reg, pData, Length);
+}
+
+/**
+  * @brief  Wrap TCPP0203 write function to Bus IO function
+  * @param  handle Component object handle
+  * @param  Reg    Target register address to write
+  * @param  pData  Target register value to be written
+  * @param  Length Buffer size to be written
+  * @retval error status
+  */
+static int32_t TCPP0203_WriteRegWrap(const void *handle, uint8_t Reg, uint8_t *pData, uint8_t Length)
+{
+  const TCPP0203_Object_t *pObj = (const TCPP0203_Object_t *)handle;
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+  Reg0_Expected_Value = *pData;
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+  return pObj->IO.WriteReg(pObj->IO.Address, Reg, pData, Length);
+}
+
+/**
+  * @brief  TCPP0203 register update function to Bus IO function
+  * @param  handle Component object handle
+  * @param  Reg    Target register address to write
+  * @param  pData  Target register value to be written
+  * @param  Length Buffer size to be written
+  * @retval error status
+  */
+static int32_t TCPP0203_ModifyReg0(TCPP0203_Object_t *pObj, uint8_t Value, uint8_t Mask)
+{
+  int32_t ret;
+  uint8_t tmp;
+
+  /* Read current content of ACK register (reflects content of bits set to 1 in Writing register Reg0) */
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &tmp, 1);
+
+  /* Update only the area dedicated to Mask */
+  tmp &= ~(Mask);
+  tmp |= (Value & Mask);
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+  Reg0_Expected_Value = tmp;
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+  /* Update value in writing register (reg0) */
+  ret += tcpp0203_write_reg(&pObj->Ctx, TCPP0203_PROG_CTRL, &tmp, 1);
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+  ret += TCPP0203_CheckReg0Reg1(pObj, Reg0_Expected_Value);
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+  return ret;
+}
+
+#if defined(TCPP0203_REGISTER_CONSISTENCY_CHECK)
+/**
+  * @brief  TCPP0203 register control function between Reg0 and Reg1 value
+  * @param  handle Component object handle
+  * @param  Reg0ExpectedValue Value expected in Reg0 (built after all calls to write functions)
+  * @retval error status
+  */
+static int32_t TCPP0203_CheckReg0Reg1(TCPP0203_Object_t *pObj, uint8_t Reg0ExpectedValue)
+{
+  int32_t ret;
+
+  /* Read current content of ACK register (expected to reflect content of bits set to 1 in Writing register Reg0) */
+  ret = tcpp0203_read_reg(&pObj->Ctx, TCPP0203_ACK_REG, &Reg1_LastRead_Value, 1);
+
+#ifdef _TRACE
+  char str[12];
+  sprintf(str, "Exp0_0x%02x", Reg0ExpectedValue);
+  USBPD_TRACE_Add(USBPD_TRACE_DEBUG, 0U, 0U, (uint8_t *)str, sizeof(str) - 1U);
+  sprintf(str, "Reg1_0x%02x", Reg1_LastRead_Value);
+  USBPD_TRACE_Add(USBPD_TRACE_DEBUG, 0U, 0U, (uint8_t *)str, sizeof(str) - 1U);
+#endif /* _TRACE */
+
+  /* Control if Reg1 value is same as Reg0 expected one */
+  if (Reg1_LastRead_Value != Reg0ExpectedValue)
+  {
+    while (1);
+  }
+
+  return ret;
+}
+#endif /* TCPP0203_REGISTER_CONSISTENCY_CHECK */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.h
new file mode 100644
index 000000000..271b534fc
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203.h
@@ -0,0 +1,353 @@
+/**
+  ******************************************************************************
+  * @file    tcpp0203.h
+  * @author  MCD Application Team
+  * @brief   This file contains all the functions prototypes for the
+  *          tcpp0203.c driver.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef TCPP0203_H
+#define TCPP0203_H
+
+/* Includes ------------------------------------------------------------------*/
+#include "tcpp0203_reg.h"
+#include <stddef.h>
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Component
+  * @{
+  */
+
+/** @addtogroup TCPP0203
+  * @{
+  */
+
+/* Exported types ------------------------------------------------------------*/
+
+/** @defgroup TCPP0203_Exported_Types TCPP0203 Exported Types
+  * @{
+  */
+typedef int32_t (*TCPP0203_Init_Func)(void);
+typedef int32_t (*TCPP0203_DeInit_Func)(void);
+typedef int32_t (*TCPP0203_GetTick_Func)(void);
+typedef int32_t (*TCPP0203_WriteReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
+typedef int32_t (*TCPP0203_ReadReg_Func)(uint16_t, uint16_t, uint8_t *, uint16_t);
+
+typedef struct
+{
+  TCPP0203_Init_Func          Init;
+  TCPP0203_DeInit_Func        DeInit;
+  uint16_t                    Address;
+  TCPP0203_WriteReg_Func      WriteReg;
+  TCPP0203_ReadReg_Func       ReadReg;
+  TCPP0203_GetTick_Func       GetTick;
+} TCPP0203_IO_t;
+
+
+typedef struct
+{
+  TCPP0203_IO_t         IO;
+  TCPP0203_ctx_t        Ctx;
+  uint8_t               IsInitialized;
+} TCPP0203_Object_t;
+
+typedef struct
+{
+  int32_t (*Init)(TCPP0203_Object_t *);
+  int32_t (*DeInit)(TCPP0203_Object_t *);
+  int32_t (*Reset)(TCPP0203_Object_t *);
+  int32_t (*SetVConnSwitch)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*SetGateDriverProvider)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*SetGateDriverConsumer)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*SetPowerMode)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*SetVBusDischarge)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*SetVConnDischarge)(TCPP0203_Object_t *, uint8_t);
+  int32_t (*GetVConnSwitchAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetGateDriverProviderAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetGateDriverConsumerAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetPowerModeAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetVBusDischargeAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetVConnDischargeAck)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetOCPVConnFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetOCPVBusFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetOVPVBusFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetOVPCCFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetOTPFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*GetVBusOkFlag)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*ReadTCPPType)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*ReadVCONNPower)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*WriteCtrlRegister)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*ReadAckRegister)(TCPP0203_Object_t *, uint8_t *);
+  int32_t (*ReadFlagRegister)(TCPP0203_Object_t *, uint8_t *);
+} TCPP0203_Drv_t;
+
+/**
+  * @}
+  */
+
+/** @defgroup TCPP0203_Exported_Constants TCPP0203 Exported Constants
+  * @{
+  */
+/**
+  * @brief  TCPP0203 Driver Response codes
+  */
+#define TCPP0203_OK                (0)
+#define TCPP0203_ERROR             (-1)
+
+/**
+  * @brief  TCPP0203 possible I2C Addresses
+  */
+#define TCPP0203_I2C_ADDRESS_X68                (0x68U)
+#define TCPP0203_I2C_ADDRESS_X6A                (0x6AU)
+
+/**
+  * @brief  TCPP0203 Reg0 Reset Value
+  */
+#define TCPP0203_REG0_RST_VALUE                   TCPP0203_GD_CONSUMER_SWITCH_CLOSED
+
+/**
+  * @brief  TCPP0203 VCONN Switch
+  */
+#define TCPP0203_VCONN_SWITCH_POS                 (0U)
+#define TCPP0203_VCONN_SWITCH_MSK                 (0x03U << TCPP0203_VCONN_SWITCH_POS)
+#define TCPP0203_VCONN_SWITCH_OPEN                (0x00U)
+#define TCPP0203_VCONN_SWITCH_CC1                 (0x01U << TCPP0203_VCONN_SWITCH_POS)
+#define TCPP0203_VCONN_SWITCH_CC2                 (0x02U << TCPP0203_VCONN_SWITCH_POS)
+
+/**
+  * @brief  TCPP0203 Gate Driver Provider values
+  */
+#define TCPP0203_GD_PROVIDER_SWITCH_POS           (2U)
+#define TCPP0203_GD_PROVIDER_SWITCH_MSK           (0x01U << TCPP0203_GD_PROVIDER_SWITCH_POS)
+#define TCPP0203_GD_PROVIDER_SWITCH_OPEN          (0x00U)
+#define TCPP0203_GD_PROVIDER_SWITCH_CLOSED        (TCPP0203_GD_PROVIDER_SWITCH_MSK)
+
+/**
+  * @brief  TCPP0203 Gate Driver Consumer values
+  */
+#define TCPP0203_GD_CONSUMER_SWITCH_POS           (3U)
+#define TCPP0203_GD_CONSUMER_SWITCH_MSK           (0x01U << TCPP0203_GD_CONSUMER_SWITCH_POS)
+#define TCPP0203_GD_CONSUMER_SWITCH_CLOSED        (0x00U)
+#define TCPP0203_GD_CONSUMER_SWITCH_OPEN          (TCPP0203_GD_CONSUMER_SWITCH_MSK)
+
+/**
+  * @brief  TCPP0203 Power Mode values
+  */
+#define TCPP0203_POWER_MODE_POS                   (4U)
+#define TCPP0203_POWER_MODE_MSK                   (0x03U << TCPP0203_POWER_MODE_POS)
+#define TCPP0203_POWER_MODE_HIBERNATE             (0x00U)
+#define TCPP0203_POWER_MODE_LOWPOWER              (0x02U << TCPP0203_POWER_MODE_POS)
+#define TCPP0203_POWER_MODE_NORMAL                (0x01U << TCPP0203_POWER_MODE_POS)
+
+/**
+  * @brief  TCPP0203 VBUS Discharge management
+  */
+#define TCPP0203_VBUS_DISCHARGE_POS               (6U)
+#define TCPP0203_VBUS_DISCHARGE_MSK               (0x01U << TCPP0203_VBUS_DISCHARGE_POS)
+#define TCPP0203_VBUS_DISCHARGE_OFF               (0x00U)
+#define TCPP0203_VBUS_DISCHARGE_ON                (TCPP0203_VBUS_DISCHARGE_MSK)
+
+/**
+  * @brief  TCPP0203 VConn Discharge management
+  */
+#define TCPP0203_VCONN_DISCHARGE_POS              (7U)
+#define TCPP0203_VCONN_DISCHARGE_MSK              (0x01U << TCPP0203_VCONN_DISCHARGE_POS)
+#define TCPP0203_VCONN_DISCHARGE_OFF              (0x00U)
+#define TCPP0203_VCONN_DISCHARGE_ON               (TCPP0203_VCONN_DISCHARGE_MSK)
+
+/**
+  * @brief  TCPP0203 VCONN Switch Acknowledge
+  */
+#define TCPP0203_VCONN_SWITCH_ACK_POS             (0U)
+#define TCPP0203_VCONN_SWITCH_ACK_MSK             (0x03U << TCPP0203_VCONN_SWITCH_ACK_POS)
+#define TCPP0203_VCONN_SWITCH_ACK_OPEN            (0x00U)
+#define TCPP0203_VCONN_SWITCH_ACK_CC1             (0x02U << TCPP0203_VCONN_SWITCH_ACK_POS)
+#define TCPP0203_VCONN_SWITCH_ACK_CC2             (0x01U << TCPP0203_VCONN_SWITCH_ACK_POS)
+
+/**
+  * @brief  TCPP0203 Gate Driver Provider Acknowledge
+  */
+#define TCPP0203_GD_PROVIDER_SWITCH_ACK_POS       (2U)
+#define TCPP0203_GD_PROVIDER_SWITCH_ACK_MSK       (0x01U << TCPP0203_GD_PROVIDER_SWITCH_ACK_POS)
+#define TCPP0203_GD_PROVIDER_SWITCH_ACK_OPEN      (0x00U)
+#define TCPP0203_GD_PROVIDER_SWITCH_ACK_CLOSED    (TCPP0203_GD_PROVIDER_SWITCH_ACK_MSK)
+
+/**
+  * @brief  TCPP0203 Gate Driver Consumer Acknowledge
+  */
+#define TCPP0203_GD_CONSUMER_SWITCH_ACK_POS       (3U)
+#define TCPP0203_GD_CONSUMER_SWITCH_ACK_MSK       (0x01U << TCPP0203_GD_CONSUMER_SWITCH_ACK_POS)
+#define TCPP0203_GD_CONSUMER_SWITCH_ACK_CLOSED    (0x00U)
+#define TCPP0203_GD_CONSUMER_SWITCH_ACK_OPEN      (TCPP0203_GD_CONSUMER_SWITCH_ACK_MSK)
+
+/**
+  * @brief  TCPP0203 Power Mode Acknowledge
+  */
+#define TCPP0203_POWER_MODE_ACK_POS               (4U)
+#define TCPP0203_POWER_MODE_ACK_MSK               (0x03U << TCPP0203_POWER_MODE_ACK_POS)
+#define TCPP0203_POWER_MODE_ACK_HIBERNATE         (0x00U)
+#define TCPP0203_POWER_MODE_ACK_LOWPOWER          (0x01U << TCPP0203_POWER_MODE_ACK_POS)
+#define TCPP0203_POWER_MODE_ACK_NORMAL            (0x02U << TCPP0203_POWER_MODE_ACK_POS)
+
+/**
+  * @brief  TCPP0203 VBUS Discharge Acknowledge
+  */
+#define TCPP0203_VBUS_DISCHARGE_ACK_POS           (6U)
+#define TCPP0203_VBUS_DISCHARGE_ACK_MSK           (0x01U << TCPP0203_VBUS_DISCHARGE_ACK_POS)
+#define TCPP0203_VBUS_DISCHARGE_ACK_OFF           (0x00U)
+#define TCPP0203_VBUS_DISCHARGE_ACK_ON            (TCPP0203_VBUS_DISCHARGE_ACK_MSK)
+
+/**
+  * @brief  TCPP0203 VConn Discharge Acknowledge
+  */
+#define TCPP0203_VCONN_DISCHARGE_ACK_POS          (7U)
+#define TCPP0203_VCONN_DISCHARGE_ACK_MSK          (0x01U << TCPP0203_VCONN_DISCHARGE_ACK_POS)
+#define TCPP0203_VCONN_DISCHARGE_ACK_OFF          (0x00U)
+#define TCPP0203_VCONN_DISCHARGE_ACK_ON           (TCPP0203_VCONN_DISCHARGE_ACK_MSK)
+
+/**
+  * @brief  TCPP0203 OCP Vconn Flag management
+  */
+#define TCPP0203_FLAG_OCP_VCONN_POS               (0U)
+#define TCPP0203_FLAG_OCP_VCONN_MSK               (0x01U << TCPP0203_FLAG_OCP_VCONN_POS)
+#define TCPP0203_FLAG_OCP_VCONN_SET               (TCPP0203_FLAG_OCP_VCONN_MSK)
+#define TCPP0203_FLAG_OCP_VCONN_RESET             (0x00U)
+
+/**
+  * @brief  TCPP0203 OCP VBUS Flag management
+  */
+#define TCPP0203_FLAG_OCP_VBUS_POS                (1U)
+#define TCPP0203_FLAG_OCP_VBUS_MSK                (0x01U << TCPP0203_FLAG_OCP_VBUS_POS)
+#define TCPP0203_FLAG_OCP_VBUS_SET                (TCPP0203_FLAG_OCP_VBUS_MSK)
+#define TCPP0203_FLAG_OCP_VBUS_RESET              (0x00U)
+
+/**
+  * @brief  TCPP0203 OVP VBUS Flag management
+  */
+#define TCPP0203_FLAG_OVP_VBUS_POS                (2U)
+#define TCPP0203_FLAG_OVP_VBUS_MSK                (0x01U << TCPP0203_FLAG_OVP_VBUS_POS)
+#define TCPP0203_FLAG_OVP_VBUS_SET                (TCPP0203_FLAG_OVP_VBUS_MSK)
+#define TCPP0203_FLAG_OVP_VBUS_RESET              (0x00U)
+
+/**
+  * @brief  TCPP0203 OVP CC Flag management
+  */
+#define TCPP0203_FLAG_OVP_CC_POS                  (3U)
+#define TCPP0203_FLAG_OVP_CC_MSK                  (0x01U << TCPP0203_FLAG_OVP_CC_POS)
+#define TCPP0203_FLAG_OVP_CC_SET                  (TCPP0203_FLAG_OVP_CC_MSK)
+#define TCPP0203_FLAG_OVP_CC_RESET                (0x00U)
+
+/**
+  * @brief  TCPP0203 OTP Flag management
+  */
+#define TCPP0203_FLAG_OTP_POS                     (4U)
+#define TCPP0203_FLAG_OTP_MSK                     (0x01U << TCPP0203_FLAG_OTP_POS)
+#define TCPP0203_FLAG_OTP_SET                     (TCPP0203_FLAG_OTP_MSK)
+#define TCPP0203_FLAG_OTP_RESET                   (0x00U)
+
+/**
+  * @brief  TCPP0203 VBUS OK Flag management
+  */
+#define TCPP0203_FLAG_VBUS_OK_POS                 (5U)
+#define TCPP0203_FLAG_VBUS_OK_MSK                 (0x01U << TCPP0203_FLAG_VBUS_OK_POS)
+#define TCPP0203_FLAG_VBUS_OK_SET                 (TCPP0203_FLAG_VBUS_OK_MSK)
+#define TCPP0203_FLAG_VBUS_OK_RESET               (0x00U)
+
+/**
+  * @brief  TCPP0203 VConn Power
+  */
+#define TCPP0203_FLAG_VCONN_PWR_POS               (6U)
+#define TCPP0203_FLAG_VCONN_PWR_MSK               (0x01U << TCPP0203_FLAG_VCONN_PWR_POS)
+#define TCPP0203_FLAG_VCONN_PWR_1W                (TCPP0203_FLAG_VCONN_PWR_MSK)
+#define TCPP0203_FLAG_VCONN_PWR_0_1W              (0x00U)
+
+/**
+  * @brief  TCPP0203 Device Type
+  */
+#define TCPP0203_DEVICE_TYPE_POS                  (7U)
+#define TCPP0203_DEVICE_TYPE_MSK                  (0x01U << TCPP0203_DEVICE_TYPE_POS)
+#define TCPP0203_DEVICE_TYPE_02                   (TCPP0203_DEVICE_TYPE_MSK)
+#define TCPP0203_DEVICE_TYPE_03                   (0x00U)
+
+/**
+  * @}
+  */
+
+/** @defgroup TCPP0203_Exported_Macros TCPP0203 Exported Macros
+  * @{
+  */
+/**
+  * @}
+  */
+
+/** @defgroup TCPP0203_Exported_Functions TCPP0203 Exported Functions
+  * @{
+  */
+
+/*------------------------------------------------------------------------------
+                TCPP02/03 Type-C port protection functions
+------------------------------------------------------------------------------*/
+/* High Layer codec functions */
+int32_t TCPP0203_RegisterBusIO(TCPP0203_Object_t *pObj, TCPP0203_IO_t *pIO);
+int32_t TCPP0203_Init(TCPP0203_Object_t *pObj);
+int32_t TCPP0203_DeInit(TCPP0203_Object_t *pObj);
+int32_t TCPP0203_Reset(TCPP0203_Object_t *pObj);
+int32_t TCPP0203_SetVConnSwitch(TCPP0203_Object_t *pObj, uint8_t VConnSwitch);
+int32_t TCPP0203_SetGateDriverProvider(TCPP0203_Object_t *pObj, uint8_t GateDriverProvider);
+int32_t TCPP0203_SetGateDriverConsumer(TCPP0203_Object_t *pObj, uint8_t GateDriverConsumer);
+int32_t TCPP0203_SetPowerMode(TCPP0203_Object_t *pObj, uint8_t PowerMode);
+int32_t TCPP0203_SetVBusDischarge(TCPP0203_Object_t *pObj, uint8_t VBusDischarge);
+int32_t TCPP0203_SetVConnDischarge(TCPP0203_Object_t *pObj, uint8_t VConnDischarge);
+int32_t TCPP0203_GetVConnSwitchAck(TCPP0203_Object_t *pObj, uint8_t *pVConnSwitchAck);
+int32_t TCPP0203_GetGateDriverProviderAck(TCPP0203_Object_t *pObj, uint8_t *pGateDriverProviderAck);
+int32_t TCPP0203_GetGateDriverConsumerAck(TCPP0203_Object_t *pObj, uint8_t *pGateDriverConsumerAck);
+int32_t TCPP0203_GetPowerModeAck(TCPP0203_Object_t *pObj, uint8_t *pPowerModeAck);
+int32_t TCPP0203_GetVBusDischargeAck(TCPP0203_Object_t *pObj, uint8_t *pVBusDischargeAck);
+int32_t TCPP0203_GetVConnDischargeAck(TCPP0203_Object_t *pObj, uint8_t *pVConnDischargeAck);
+int32_t TCPP0203_GetOCPVConnFlag(TCPP0203_Object_t *pObj, uint8_t *pOCPVConnFlag);
+int32_t TCPP0203_GetOCPVBusFlag(TCPP0203_Object_t *pObj, uint8_t *pGetOCPVBusFlag);
+int32_t TCPP0203_GetOVPVBusFlag(TCPP0203_Object_t *pObj, uint8_t *pOVPVBusFlag);
+int32_t TCPP0203_GetOVPCCFlag(TCPP0203_Object_t *pObj, uint8_t *pOVPCCFlag);
+int32_t TCPP0203_GetOTPFlag(TCPP0203_Object_t *pObj, uint8_t *pOTPFlag);
+int32_t TCPP0203_GetVBusOkFlag(TCPP0203_Object_t *pObj, uint8_t *pVBusOkFlag);
+int32_t TCPP0203_ReadTCPPType(TCPP0203_Object_t *pObj, uint8_t *pTCPPType);
+int32_t TCPP0203_ReadVCONNPower(TCPP0203_Object_t *pObj, uint8_t *pVCONNPower);
+int32_t TCPP0203_WriteCtrlRegister(TCPP0203_Object_t *pObj, uint8_t *pCtrlRegister);
+int32_t TCPP0203_ReadAckRegister(TCPP0203_Object_t *pObj, uint8_t *pAckRegister);
+int32_t TCPP0203_ReadFlagRegister(TCPP0203_Object_t *pObj, uint8_t *pFlagRegister);
+
+/**
+  * @}
+  */
+
+/* TCPP02/03 Type-C port protection driver structure */
+extern TCPP0203_Drv_t TCPP0203_Driver;
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#endif /* TCPP0203_H */
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.c b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.c
new file mode 100644
index 000000000..8025fa85e
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.c
@@ -0,0 +1,73 @@
+/**
+  ******************************************************************************
+  * @file    tcpp0203_reg.c
+  * @author  MCD Application Team
+  * @brief   This file provides unitary register function to control the TCPP02-03
+  *          Type-C port protection driver.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Includes ------------------------------------------------------------------*/
+#include "tcpp0203_reg.h"
+
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Components
+  * @{
+  */
+
+/** @addtogroup TCPP0203
+  * @brief     This file provides a set of functions needed to drive the
+  *            TCPP02/03 Type-C port protection codec.
+  * @{
+  */
+
+/************** Generic Function  *******************/
+/*******************************************************************************
+  * Function Name : tcpp0203_read_reg
+  * Description   : Generic Reading function. It must be fulfilled with either
+  *                 I2C or SPI reading functions
+  * Input         : Register Address, length of buffer
+  * Output        : data Read
+  *******************************************************************************/
+int32_t tcpp0203_read_reg(const TCPP0203_ctx_t *ctx, uint8_t reg, uint8_t *data, uint8_t length)
+{
+  return ctx->ReadReg(ctx->handle, reg, data, length);
+}
+
+/*******************************************************************************
+  * Function Name : tcpp0203_write_reg
+  * Description   : Generic Writing function. It must be fulfilled with either
+  *                 I2C or SPI writing function
+  * Input         : Register Address, data to be written, length of buffer
+  * Output        : None
+  *******************************************************************************/
+int32_t tcpp0203_write_reg(const TCPP0203_ctx_t *ctx, uint8_t reg, uint8_t *data, uint8_t length)
+{
+  return ctx->WriteReg(ctx->handle, reg, data, length);
+}
+
+/******************************************************************************/
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.h
new file mode 100644
index 000000000..92420e1fe
--- /dev/null
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/tcpp0203/tcpp0203_reg.h
@@ -0,0 +1,98 @@
+/**
+  ******************************************************************************
+  * @file    tcpp0203_reg.h
+  * @author  MCD Application Team
+  * @brief   Header of tcpp0203_reg.c
+  *
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2021 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef TCPP0203_REG_H
+#define TCPP0203_REG_H
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Includes ------------------------------------------------------------------*/
+/** @addtogroup BSP
+  * @{
+  */
+
+/** @addtogroup Component
+  * @{
+  */
+
+/** @addtogroup TCPP0203
+  * @{
+  */
+
+
+/** @defgroup TCPP0203_Exported_Constants TCPP0203 Exported Constants
+  * @{
+  */
+/******************************************************************************/
+/****************************** REGISTER MAPPING ******************************/
+/******************************************************************************/
+#define TCPP0203_WRITE_REG                   0x00U
+#define TCPP0203_PROG_CTRL                   TCPP0203_WRITE_REG
+#define TCPP0203_READ_REG1                   0x01U
+#define TCPP0203_ACK_REG                     TCPP0203_READ_REG1
+#define TCPP0203_READ_REG2                   0x02U
+#define TCPP0203_FLAG_REG                    TCPP0203_READ_REG2
+
+/**
+  * @}
+  */
+
+/************** Generic Function  *******************/
+
+typedef int32_t (*TCPP0203_Write_Func)(const void *, uint8_t, uint8_t *, uint8_t);
+typedef int32_t (*TCPP0203_Read_Func)(const void *, uint8_t, uint8_t *, uint8_t);
+
+typedef struct
+{
+  TCPP0203_Write_Func   WriteReg;
+  TCPP0203_Read_Func    ReadReg;
+  void                *handle;
+} TCPP0203_ctx_t;
+
+/*******************************************************************************
+  * Register      : Generic - All
+  * Address       : Generic - All
+  * Bit Group Name: None
+  * Permission    : W
+  *******************************************************************************/
+int32_t tcpp0203_write_reg(const TCPP0203_ctx_t *ctx, uint8_t reg, uint8_t *data, uint8_t length);
+int32_t tcpp0203_read_reg(const TCPP0203_ctx_t *ctx, uint8_t reg, uint8_t *data, uint8_t length);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TCPP0203_REG_H */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
new file mode 100644
index 000000000..0ec1875ac
--- /dev/null
+++ b/hw/bsp/stm32n6/family.c
@@ -0,0 +1,276 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019
+ *    William D. Jones (thor0505@comcast.net),
+ *    Ha Thach (tinyusb.org)
+ *    Uwe Bonnes (bon@elektron.ikp.physik.tu-darmstadt.de
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: STMicroelectronics
+*/
+
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-align"
+#endif
+
+#include "stm32n6xx_hal.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "bsp/board_api.h"
+
+TU_ATTR_UNUSED static void Error_Handler(void) { }
+
+void HardFault_Handler(void);
+
+typedef struct {
+  GPIO_TypeDef* port;
+  GPIO_InitTypeDef pin_init;
+  uint8_t active_state;
+} board_pindef_t;
+
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+
+#ifdef UART_DEV
+UART_HandleTypeDef UartHandle = {
+  .Instance = UART_DEV,
+  .Init = {
+    .BaudRate = CFG_BOARD_UART_BAUDRATE,
+    .WordLength = UART_WORDLENGTH_8B,
+    .StopBits = UART_STOPBITS_1,
+    .Parity = UART_PARITY_NONE,
+    .HwFlowCtl = UART_HWCONTROL_NONE,
+    .Mode = UART_MODE_TX_RX,
+    .OverSampling = UART_OVERSAMPLING_16,
+  }
+};
+#endif
+
+#ifndef SWO_FREQ
+#define SWO_FREQ  4000000
+#endif
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+
+// Despite being call USB2_OTG_FS on some MCUs
+// OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port
+void USB2_OTG_HS_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+// Despite being call USB1_OTG_HS on some MCUs
+// OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
+void USB1_OTG_HS_IRQHandler(void) {
+  tusb_int_handler(1, true);
+}
+
+void board_init(void) {
+
+  /* Enable BusFault and SecureFault handlers (HardFault is default) */
+  SCB->SHCSR |= (SCB_SHCSR_BUSFAULTENA_Msk | SCB_SHCSR_SECUREFAULTENA_Msk);
+
+  HAL_PWREx_EnableVddA();
+  HAL_PWREx_EnableVddIO2();
+  HAL_PWREx_EnableVddIO3();
+  HAL_PWREx_EnableVddIO4();
+  HAL_PWREx_EnableVddIO5();
+
+  HAL_Init();
+
+  // Implemented in board.h
+  SystemClock_Config();
+
+  // Enable All GPIOs clocks
+  __HAL_RCC_GPIOA_CLK_ENABLE();
+  __HAL_RCC_GPIOB_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  __HAL_RCC_GPIOD_CLK_ENABLE();
+  __HAL_RCC_GPIOE_CLK_ENABLE();
+  __HAL_RCC_GPIOF_CLK_ENABLE();
+  __HAL_RCC_GPIOG_CLK_ENABLE();
+  __HAL_RCC_GPIOH_CLK_ENABLE();
+  __HAL_RCC_GPION_CLK_ENABLE();
+  __HAL_RCC_GPIOO_CLK_ENABLE();
+  __HAL_RCC_GPIOP_CLK_ENABLE();
+  __HAL_RCC_GPIOQ_CLK_ENABLE();
+
+  // HAL_ICACHE_Enable();
+
+  for (uint8_t i = 0; i < TU_ARRAY_SIZE(board_pindef); i++) {
+    HAL_GPIO_Init(board_pindef[i].port, &board_pindef[i].pin_init);
+  }
+
+  NVIC_SetPriority(UCPD1_IRQn, NVIC_EncodePriority(NVIC_GetPriorityGrouping(),5, 0));
+  NVIC_EnableIRQ(UCPD1_IRQn);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  SysTick->CTRL &= ~1U;
+
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+
+  NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+
+
+#ifdef UART_DEV
+  UART_CLK_EN();
+  HAL_UART_Init(&UartHandle);
+#endif
+
+
+  __HAL_RCC_USB1_OTG_HS_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+  HAL_PWREx_EnableVddUSBVMEN();
+  while(__HAL_PWR_GET_FLAG(PWR_FLAG_USB33RDY));
+  HAL_PWREx_EnableVddUSB();
+
+  LL_AHB5_GRP1_ForceReset(0x00800000);
+  __HAL_RCC_USB1_OTG_HS_FORCE_RESET();
+  __HAL_RCC_USB1_OTG_HS_PHY_FORCE_RESET();
+
+  LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock();
+  LL_AHB5_GRP1_ReleaseReset(0x00800000);
+
+  /* Peripheral clock enable */
+  __HAL_RCC_USB1_OTG_HS_CLK_ENABLE();
+
+  /* Required few clock cycles before accessing USB PHY Controller Registers */
+  HAL_Delay(1);
+
+  USB1_HS_PHYC->USBPHYC_CR &= ~(0x7 << 0x4);
+
+  USB1_HS_PHYC->USBPHYC_CR |= (0x1 << 16) |
+                              (0x2 << 4)  |
+                              (0x1 << 2)  |
+                                0x1U;
+
+  __HAL_RCC_USB1_OTG_HS_PHY_RELEASE_RESET();
+
+  /* Required few clock cycles before Releasing Reset */
+  HAL_Delay(1);
+
+  __HAL_RCC_USB1_OTG_HS_RELEASE_RESET();
+
+  /* Peripheral PHY clock enable */
+  __HAL_RCC_USB1_OTG_HS_PHY_CLK_ENABLE();
+
+  board_init2();
+
+#if CFG_TUH_ENABLED
+  board_vbus_set(BOARD_TUH_RHPORT, 1);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#ifdef PINID_LED
+  board_pindef_t* pindef = &board_pindef[PINID_LED];
+  GPIO_PinState pin_state = state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET;
+  HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, pin_state);
+#else
+  (void) state;
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef PINID_BUTTON
+  board_pindef_t* pindef = &board_pindef[PINID_BUTTON];
+  return pindef->active_state == HAL_GPIO_ReadPin(pindef->port, pindef->pin_init.Pin);
+#else
+  return 0;
+#endif
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+#ifdef UART_DEV
+  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
+  buf, len, 0xffff);
+  return len;
+#else
+  (void) buf; (void) len;
+  return -1;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  HAL_IncTick();
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+}
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
new file mode 100644
index 000000000..600af7cdb
--- /dev/null
+++ b/hw/bsp/stm32n6/family.cmake
@@ -0,0 +1,147 @@
+include_guard()
+
+set(ST_FAMILY n6)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
+set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m55 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32N6 CACHE INTERNAL "")
+
+# ----------------------
+# Port & Speed Selection
+# ----------------------
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 1)
+endif ()
+
+if (NOT DEFINED RHPORT_SPEED)
+  set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_DEVICE_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_HOST_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+endif ()
+
+cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif()
+
+  # Startup & Linker script
+  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+  if(NOT DEFINED LD_FILE_GNU)
+    set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld)
+  endif()
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if(NOT DEFINED LD_FILE_IAR)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+  endif()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_ns.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_cortex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_i2c.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pwr_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_HAL_DRIVER}/Inc
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+    BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+    BOARD_TUH_RHPORT=${RHPORT_HOST}
+    BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32N6 ${RTOS})
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_stlink(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32n6/family.mk b/hw/bsp/stm32n6/family.mk
new file mode 100644
index 000000000..97930e189
--- /dev/null
+++ b/hw/bsp/stm32n6/family.mk
@@ -0,0 +1,101 @@
+ST_FAMILY = n6
+ST_PREFIX = stm32${ST_FAMILY}xx
+ST_PREFIX_LONG = stm32${ST_FAMILY}57xx
+ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
+ST_HAL_DRIVER = hw/mcu/st/${ST_PREFIX}_hal_driver
+
+UF2_FAMILY_ID = 0x6db66083
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m55
+
+# ----------------------
+# Port & Speed Selection
+# ----------------------
+RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 1
+
+# Determine RHPORT_DEVICE_SPEED if not defined
+ifndef RHPORT_DEVICE_SPEED
+ifeq ($(RHPORT_DEVICE), 0)
+  RHPORT_DEVICE_SPEED = $(firstword $(RHPORT_SPEED))
+else
+  RHPORT_DEVICE_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
+# Determine RHPORT_HOST_SPEED if not defined
+ifndef RHPORT_HOST_SPEED
+ifeq ($(RHPORT_HOST), 0)
+  RHPORT_HOST_SPEED = $(firstword $(RHPORT_SPEED))
+else
+  RHPORT_HOST_SPEED = $(lastword $(RHPORT_SPEED))
+endif
+endif
+
+# --------------
+# Compiler Flags
+# --------------
+CFLAGS += \
+  -DCFG_TUSB_MCU=OPT_MCU_STM32N6 \
+	-DBOARD_TUD_RHPORT=${RHPORT_DEVICE} \
+	-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
+	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
+	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
+
+# GCC Flags
+CFLAGS_GCC += \
+  -flto \
+
+# suppress warning caused by vendor mcu driver
+CFLAGS_GCC += \
+  -Wno-error=cast-align \
+  -Wno-error=unused-parameter \
+
+LDFLAGS_GCC += \
+  -nostdlib -nostartfiles \
+  --specs=nosys.specs --specs=nano.specs
+
+# -----------------
+# Sources & Include
+# -----------------
+
+SRC_C += \
+	src/portable/synopsys/dwc2/dcd_dwc2.c \
+	src/portable/synopsys/dwc2/hcd_dwc2.c \
+	src/portable/synopsys/dwc2/dwc2_common.c \
+	$(ST_CMSIS)/Source/Templates/system_${ST_PREFIX}_fsbl.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_cortex.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_dma.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_hcd.c \
+    $(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_i2c.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd_ex.c \
+    $(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pwr_ex.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rif.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart_ex.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_ll_usb.c \
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(ST_CMSIS)/Include \
+	$(TOP)/$(ST_HAL_DRIVER)/Inc
+
+# Linker
+LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
+
+# Startup
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(ST_PREFIX_LONG)_fsbl.s
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+
+# Linker
+LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(ST_PREFIX_LONG)_flash.ld
+LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32n6/partition_stm32n657xx.h b/hw/bsp/stm32n6/partition_stm32n657xx.h
new file mode 100644
index 000000000..713068609
--- /dev/null
+++ b/hw/bsp/stm32n6/partition_stm32n657xx.h
@@ -0,0 +1,792 @@
+/**
+  ******************************************************************************
+  * @file    partition_stm32n657xx.h
+  * @author  MCD Application Team
+  * @brief   CMSIS STM32N657xx Device Initial Setup for Secure / Non-Secure Zones
+  *          for ARMCM55 based on CMSIS CORE V5.3.1 partition_ARMCM33.h Template.
+  *
+  *          This file contains:
+  *           - Initialize Security Attribution Unit (SAU) CTRL register
+  *           - Setup behavior of Sleep and Exception Handling
+  *           - Setup behavior of Floating Point Unit
+  *           - Setup Interrupt Target
+  *
+  ******************************************************************************/
+/*
+ * Copyright (c) 2009-2016 ARM Limited. All rights reserved.
+ * Portions Copyright (c) 2023 STMicroelectronics, all rights reserved
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the License); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef PARTITION_STM32N657XX_H
+#define PARTITION_STM32N657XX_H
+
+/*
+//-------- <<< Use Configuration Wizard in Context Menu >>> -----------------
+*/
+
+/*
+// <e>Initialize Security Attribution Unit (SAU) CTRL register
+*/
+#define SAU_INIT_CTRL          0
+
+/*
+//   <q> Enable SAU
+//   <i> Value for SAU->CTRL register bit ENABLE
+*/
+#define SAU_INIT_CTRL_ENABLE   0
+
+/*
+//   <o> When SAU is disabled
+//     <0=> All Memory is Secure
+//     <1=> All Memory is Non-Secure
+//   <i> Value for SAU->CTRL register bit ALLNS
+//   <i> When all Memory is Non-Secure (ALLNS is 1), IDAU can override memory map configuration.
+*/
+#define SAU_INIT_CTRL_ALLNS  0
+
+/*
+// </e>
+*/
+
+/*
+// <h>Initialize Security Attribution Unit (SAU) Address Regions
+// <i>SAU configuration specifies regions to be one of:
+// <i> - Secure and Non-Secure Callable
+// <i> - Non-Secure
+// <i>Note: All memory regions not configured by SAU are Secure
+*/
+#define SAU_REGIONS_MAX   8                 /* Max. number of SAU regions */
+
+/*
+//   <e>Initialize SAU Region 0
+//   <i> Setup SAU Region 0 memory attributes
+*/
+#define SAU_INIT_REGION0    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START0     0x00000000      /* start address of SAU region 0 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END0       0x00000000      /* end address of SAU region 0 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC0       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 1
+//   <i> Setup SAU Region 1 memory attributes
+*/
+#define SAU_INIT_REGION1    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START1     0x00000000      /* start address of SAU region 1 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END1       0x00000000      /* end address of SAU region 1 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC1       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 2
+//   <i> Setup SAU Region 2 memory attributes
+*/
+#define SAU_INIT_REGION2    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START2     0x00000000      /* start address of SAU region 2 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END2       0x00000000      /* end address of SAU region 2 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC2       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 3
+//   <i> Setup SAU Region 3 memory attributes
+*/
+#define SAU_INIT_REGION3    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START3     0x00000000      /* start address of SAU region 3 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END3       0x00000000      /* end address of SAU region 3 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC3       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 4
+//   <i> Setup SAU Region 4 memory attributes
+*/
+#define SAU_INIT_REGION4    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START4     0x00000000      /* start address of SAU region 4 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END4       0x00000000      /* end address of SAU region 4 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC4       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 5
+//   <i> Setup SAU Region 5 memory attributes
+*/
+#define SAU_INIT_REGION5    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START5     0x00000000      /* start address of SAU region 5 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END5       0x00000000      /* end address of SAU region 5 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC5       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 6
+//   <i> Setup SAU Region 6 memory attributes
+*/
+#define SAU_INIT_REGION6    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START6     0x00000000      /* start address of SAU region 6 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END6       0x00000000      /* end address of SAU region 6 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC6       0
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize SAU Region 7
+//   <i> Setup SAU Region 7 memory attributes
+*/
+#define SAU_INIT_REGION7    0
+
+/*
+//     <o>Start Address <0-0xFFFFFFE0>
+*/
+#define SAU_INIT_START7     0x00000000      /* start address of SAU region 7 */
+
+/*
+//     <o>End Address <0x1F-0xFFFFFFFF>
+*/
+#define SAU_INIT_END7       0x00000000      /* end address of SAU region 7 */
+
+/*
+//     <o>Region is
+//         <0=>Non-Secure
+//         <1=>Secure, Non-Secure Callable
+*/
+#define SAU_INIT_NSC7       0
+/*
+//   </e>
+*/
+
+/*
+// </h>
+*/
+
+/*
+// <e>Setup behaviour of Sleep and Exception Handling
+*/
+#define SCB_CSR_AIRCR_INIT  0
+
+/*
+//   <o> Deep Sleep can be enabled by
+//     <0=>Secure and Non-Secure state
+//     <1=>Secure state only
+//   <i> Value for SCB->CSR register bit DEEPSLEEPS
+*/
+#define SCB_CSR_DEEPSLEEPS_VAL  0
+
+/*
+//   <o>System reset request accessible from
+//     <0=> Secure and Non-Secure state
+//     <1=> Secure state only
+//   <i> Value for SCB->AIRCR register bit SYSRESETREQS
+*/
+#define SCB_AIRCR_SYSRESETREQS_VAL  0
+
+/*
+//   <o>Priority of Non-Secure exceptions is
+//     <0=> Not altered
+//     <1=> Lowered to 0x04-0x07
+//   <i> Value for SCB->AIRCR register bit PRIS
+*/
+#define SCB_AIRCR_PRIS_VAL      0
+
+/*
+//   <o>BusFault, HardFault, and NMI target
+//     <0=> Secure state
+//     <1=> Non-Secure state
+//   <i> Value for SCB->AIRCR register bit BFHFNMINS
+*/
+#define SCB_AIRCR_BFHFNMINS_VAL 0
+
+/*
+// </e>
+*/
+
+/*
+// <e>Setup behaviour of Floating Point Unit
+*/
+#define TZ_FPU_NS_USAGE 1
+
+/*
+// <o>Floating Point Unit usage
+//     <0=> Secure state only
+//     <3=> Secure and Non-Secure state
+//   <i> Value for SCB->NSACR register bits CP10, CP11
+*/
+#define SCB_NSACR_CP10_11_VAL       3
+
+/*
+// <o>Treat floating-point registers as Secure
+//     <0=> Disabled
+//     <1=> Enabled
+//   <i> Value for FPU->FPCCR register bit TS
+*/
+#define FPU_FPCCR_TS_VAL            0
+
+/*
+// <o>Clear on return (CLRONRET) accessibility
+//     <0=> Secure and Non-Secure state
+//     <1=> Secure state only
+//   <i> Value for FPU->FPCCR register bit CLRONRETS
+*/
+#define FPU_FPCCR_CLRONRETS_VAL     0
+
+/*
+// <o>Clear floating-point caller saved registers on exception return
+//     <0=> Disabled
+//     <1=> Enabled
+//   <i> Value for FPU->FPCCR register bit CLRONRET
+*/
+#define FPU_FPCCR_CLRONRET_VAL      1
+
+/*
+// </e>
+*/
+
+/*
+// <h>Setup Interrupt Target
+*/
+
+/*
+//   <e>Initialize ITNS 0 (Interrupts 0..31)
+*/
+#define NVIC_INIT_ITNS0    1
+
+/*
+// Interrupts 0..31
+//   <o.0>  PVD_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.1>  Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.2>  DTS_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.3>  RCC_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.4>  LOCKUP_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.5>  CACHE_ECC_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.6>  TCM_ECC_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.7>  BKP_ECC_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.8>  FPU_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.9>  Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.10> RTC_S_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.11> TAMP_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.12> RIFSC_TAMPER_IRQn   <0=> Secure state <1=> Non-Secure state
+//   <o.13> IAC_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.14> RCC_S_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.15> Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.16> RTC_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.17> Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.18> IWDG_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.19> WWDG_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.20> EXTI0_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.21> EXTI1_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.22> EXTI2_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.23> EXTI3_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.24> EXTI4_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.25> EXTI5_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.26> EXTI6_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.27> EXTI7_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.28> EXTI8_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.29> EXTI9_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.30> EXTI10_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.31> EXTI11_IRQn         <0=> Secure state <1=> Non-Secure state
+*/
+#define NVIC_INIT_ITNS0_VAL     0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 1 (Interrupts 32..63)
+*/
+#define NVIC_INIT_ITNS1    1
+
+/*
+// Interrupts 32..63
+//   <o.0>  EXTI12_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.1>  EXTI13_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.2>  EXTI14_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.3>  EXTI15_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.4>  SAES_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.5>  CRYP_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.6>  PKA_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.7>  HASH_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.8>  RNG_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.9>  Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.10> MCE1_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.11> MCE2_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.12> MCE3_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.13> MCE4_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.14> ADC1_2_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.15> CSI_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.16> DCMIPP_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.17> Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.18> Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.19> Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.20> PAHB_ERR_IRQn       <0=> Secure state <1=> Non-Secure state
+//   <o.21> NPU0_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.22> NPU1_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.23> NPU2_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.24> NPU3_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.25> CACHEAXI_IRQn       <0=> Secure state <1=> Non-Secure state
+//   <o.26> LTDC_LO_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.27> LTDC_LO_ERR_IRQn    <0=> Secure state <1=> Non-Secure state
+//   <o.28> DMA2D_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.29> JPEG_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.30> VENC_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.31> GFXMMU_IRQn         <0=> Secure state <1=> Non-Secure state
+*/
+#define NVIC_INIT_ITNS1_VAL     0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 2 (Interrupts 64..95)
+*/
+#define NVIC_INIT_ITNS2    1
+
+/*
+// Interrupts 64..95
+//   <o.0>  GFXTIM_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.1>  GPU2D_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.2>  GPU2D_ER_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.3>  ICACHE_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.4>  HPDMA1_Channel0_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.5>  HPDMA1_Channel1_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.6>  HPDMA1_Channel2_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.7>  HPDMA1_Channel3_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.8>  HPDMA1_Channel4_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.9>  HPDMA1_Channel5_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.10> HPDMA1_Channel6_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.11> HPDMA1_Channel7_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.12> HPDMA1_Channel8_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.13> HPDMA1_Channel9_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.14> HPDMA1_Channel10_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.15> HPDMA1_Channel11_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.16> HPDMA1_Channel12_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.17> HPDMA1_Channel13_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.18> HPDMA1_Channel14_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.19> HPDMA1_Channel15_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.20> GPDMA1_Channel0_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.21> GPDMA1_Channel1_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.22> GPDMA1_Channel2_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.23> GPDMA1_Channel3_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.24> GPDMA1_Channel4_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.25> GPDMA1_Channel5_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.26> GPDMA1_Channel6_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.27> GPDMA1_Channel7_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.28> GPDMA1_Channel8_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.29> GPDMA1_Channel9_IRQn  <0=> Secure state <1=> Non-Secure state
+//   <o.30> GPDMA1_Channel10_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.31> GPDMA1_Channel11_IRQn <0=> Secure state <1=> Non-Secure state
+*/
+#define NVIC_INIT_ITNS2_VAL     0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 3 (Interrupts 96..127)
+*/
+#define NVIC_INIT_ITNS3    1
+
+/*
+// Interrupts 96..127
+//   <o.0>  GPDMA1_Channel12_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.1>  GPDMA1_Channel13_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.2>  GPDMA1_Channel14_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.3>  GPDMA1_Channel15_IRQn <0=> Secure state <1=> Non-Secure state
+//   <o.4>  I2C1_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.5>  I2C1_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.6>  I2C2_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.7>  I2C2_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.8>  I2C3_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.9>  I2C3_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.10> I2C4_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.11> I2C4_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.12> I3C1_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.13> I3C1_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.14> I3C2_EV_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.15> I3C2_ER_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.16> TIM1_BRK_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.17> TIM1_UP_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.18> TIM1_TRG_COM_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.19> TIM1_CC_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.20> TIM2_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.21> TIM3_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.22> TIM4_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.23> TIM5_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.24> TIM6_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.25> TIM7_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.26> TIM8_BRK_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.27> TIM8_UP_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.28> TIM8_TRG_COM_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.29> TIM8_CC_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.30> TIM9_IRQn             <0=> Secure state <1=> Non-Secure state
+//   <o.31> TIM10_IRQn            <0=> Secure state <1=> Non-Secure state
+
+*/
+#define NVIC_INIT_ITNS3_VAL     0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 4 (Interrupts 128..159)
+*/
+#define NVIC_INIT_ITNS4    1
+
+/*
+// Interrupts 128..159
+//   <o.0>  TIM11_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.1>  TIM12_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.2>  TIM13_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.3>  TIM14_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.4>  TIM15_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.5>  TIM16_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.6>  TIM17_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.7>  TIM18_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.8>  LPTIM1_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.9>  LPTIM2_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.10> LPTIM3_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.11> LPTIM4_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.12> LPTIM5_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.13> ADF1_FLT0_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.14> MDF1_FLT0_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.15> MDF1_FLT1_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.16> MDF1_FLT2_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.17> MDF1_FLT3_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.18> MDF1_FLT4_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.19> MDF1_FLT5_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.20> SAI1_A_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.21> SAI1_B_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.22> SAI2_A_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.23> SAI2_B_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.24> SPDIFRX1_IRQn       <0=> Secure state <1=> Non-Secure state
+//   <o.25> SPI1_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.26> SPI2_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.27> SPI3_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.28> SPI4_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.29> SPI5_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.30> SPI6_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.31> USART1_IRQn         <0=> Secure state <1=> Non-Secure state
+
+*/
+#define NVIC_INIT_ITNS4_VAL      0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 5 (Interrupts 160..191)
+*/
+#define NVIC_INIT_ITNS5    1
+
+/*
+// Interrupts 160..191
+//   <o.0>  USART2_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.1>  USART3_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.2>  UART4_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.3>  UART5_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.4>  USART6_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.5>  UART7_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.6>  UART8_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.7>  UART9_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.8>  USART10_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.9>  LPUART1_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.10> XSPI1_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.11> XSPI2_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.12> XSPI3_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.13> FMC_IRQn            <0=> Secure state <1=> Non-Secure state
+//   <o.14> SDMMC1_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.15> SDMMC2_IRQn         <0=> Secure state <1=> Non-Secure state
+//   <o.16> UCPD1_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.17> USB1_OTG_HS_IRQn    <0=> Secure state <1=> Non-Secure state
+//   <o.18> USB2_OTG_HS_IRQn    <0=> Secure state <1=> Non-Secure state
+//   <o.19> ETH1_IRQn           <0=> Secure state <1=> Non-Secure state
+//   <o.20> FDCAN1_IT0_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.21> FDCAN1_IT1_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.22> FDCAN2_IT0_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.23> FDCAN2_IT1_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.24> FDCAN3_IT0_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.25> FDCAN3_IT1_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.26> FDCAN_CU_IRQn       <0=> Secure state <1=> Non-Secure state
+//   <o.27> MDIOS_IRQn          <0=> Secure state <1=> Non-Secure state
+//   <o.28> DCMI_PSSI_IRQn      <0=> Secure state <1=> Non-Secure state
+//   <o.29> WAKEUP_PIN_IRQn     <0=> Secure state <1=> Non-Secure state
+//   <o.30> CTI_INT0_IRQn       <0=> Secure state <1=> Non-Secure state
+//   <o.31> CTI_INT1_IRQn       <0=> Secure state <1=> Non-Secure state
+
+*/
+#define NVIC_INIT_ITNS5_VAL      0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+//   <e>Initialize ITNS 6 (Interrupts 192..223)
+*/
+#define NVIC_INIT_ITNS6    1
+
+/*
+// Interrupts 192..223
+//   <o.0>  Reserved            <0=> Secure state <1=> Non-Secure state
+//   <o.1>  LTDC_UP_IRQn        <0=> Secure state <1=> Non-Secure state
+//   <o.2>  LTDC_UP_ERR_IRQn    <0=> Secure state <1=> Non-Secure state
+
+*/
+#define NVIC_INIT_ITNS6_VAL      0x00000000
+
+/*
+//   </e>
+*/
+
+/*
+// </h>
+*/
+
+
+
+/*
+    max 8 SAU regions.
+    SAU regions are defined in partition.h
+ */
+
+#define SAU_INIT_REGION(n) \
+    SAU->RNR  =  (n                                     & SAU_RNR_REGION_Msk); \
+    SAU->RBAR =  (SAU_INIT_START##n                     & SAU_RBAR_BADDR_Msk); \
+    SAU->RLAR =  (SAU_INIT_END##n                       & SAU_RLAR_LADDR_Msk) | \
+                ((SAU_INIT_NSC##n << SAU_RLAR_NSC_Pos)  & SAU_RLAR_NSC_Msk)   | 1U
+
+/**
+  \brief   Setup a SAU Region
+  \details Writes the region information contained in SAU_Region to the
+           registers SAU_RNR, SAU_RBAR, and SAU_RLAR
+ */
+__STATIC_INLINE void TZ_SAU_Setup (void)
+{
+
+#if defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U)
+
+  #if defined (SAU_INIT_REGION0) && (SAU_INIT_REGION0 == 1U)
+    SAU_INIT_REGION(0);
+  #endif
+
+  #if defined (SAU_INIT_REGION1) && (SAU_INIT_REGION1 == 1U)
+    SAU_INIT_REGION(1);
+  #endif
+
+  #if defined (SAU_INIT_REGION2) && (SAU_INIT_REGION2 == 1U)
+    SAU_INIT_REGION(2);
+  #endif
+
+  #if defined (SAU_INIT_REGION3) && (SAU_INIT_REGION3 == 1U)
+    SAU_INIT_REGION(3);
+  #endif
+
+  #if defined (SAU_INIT_REGION4) && (SAU_INIT_REGION4 == 1U)
+    SAU_INIT_REGION(4);
+  #endif
+
+  #if defined (SAU_INIT_REGION5) && (SAU_INIT_REGION5 == 1U)
+    SAU_INIT_REGION(5);
+  #endif
+
+  #if defined (SAU_INIT_REGION6) && (SAU_INIT_REGION6 == 1U)
+    SAU_INIT_REGION(6);
+  #endif
+
+  #if defined (SAU_INIT_REGION7) && (SAU_INIT_REGION7 == 1U)
+    SAU_INIT_REGION(7);
+  #endif
+
+  /* repeat this for all possible SAU regions */
+
+#endif /* defined (__SAUREGION_PRESENT) && (__SAUREGION_PRESENT == 1U) */
+
+
+  #if defined (SAU_INIT_CTRL) && (SAU_INIT_CTRL == 1U)
+    SAU->CTRL = ((SAU_INIT_CTRL_ENABLE << SAU_CTRL_ENABLE_Pos) & SAU_CTRL_ENABLE_Msk) |
+                ((SAU_INIT_CTRL_ALLNS  << SAU_CTRL_ALLNS_Pos)  & SAU_CTRL_ALLNS_Msk)   ;
+  #endif
+
+  #if defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U)
+    SCB->SCR   = (SCB->SCR   & ~(SCB_SCR_SLEEPDEEPS_Msk    )) |
+                   ((SCB_CSR_DEEPSLEEPS_VAL     << SCB_SCR_SLEEPDEEPS_Pos)     & SCB_SCR_SLEEPDEEPS_Msk);
+
+    SCB->AIRCR = (SCB->AIRCR & ~(SCB_AIRCR_VECTKEY_Msk   | SCB_AIRCR_SYSRESETREQS_Msk |
+                                 SCB_AIRCR_BFHFNMINS_Msk | SCB_AIRCR_PRIS_Msk)        )                     |
+                   ((0x05FAU                    << SCB_AIRCR_VECTKEY_Pos)      & SCB_AIRCR_VECTKEY_Msk)      |
+                   ((SCB_AIRCR_SYSRESETREQS_VAL << SCB_AIRCR_SYSRESETREQS_Pos) & SCB_AIRCR_SYSRESETREQS_Msk) |
+                   ((SCB_AIRCR_PRIS_VAL         << SCB_AIRCR_PRIS_Pos)         & SCB_AIRCR_PRIS_Msk)         |
+                   ((SCB_AIRCR_BFHFNMINS_VAL    << SCB_AIRCR_BFHFNMINS_Pos)    & SCB_AIRCR_BFHFNMINS_Msk);
+  #endif /* defined (SCB_CSR_AIRCR_INIT) && (SCB_CSR_AIRCR_INIT == 1U) */
+
+  #if defined (__FPU_USED) && (__FPU_USED == 1U) && \
+      defined (TZ_FPU_NS_USAGE) && (TZ_FPU_NS_USAGE == 1U)
+
+    SCB->NSACR = (SCB->NSACR & ~(SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk)) |
+                   ((SCB_NSACR_CP10_11_VAL << SCB_NSACR_CP10_Pos) & (SCB_NSACR_CP10_Msk | SCB_NSACR_CP11_Msk));
+
+    FPU->FPCCR = (FPU->FPCCR & ~(FPU_FPCCR_TS_Msk | FPU_FPCCR_CLRONRETS_Msk | FPU_FPCCR_CLRONRET_Msk)) |
+                   ((FPU_FPCCR_TS_VAL        << FPU_FPCCR_TS_Pos       ) & FPU_FPCCR_TS_Msk       ) |
+                   ((FPU_FPCCR_CLRONRETS_VAL << FPU_FPCCR_CLRONRETS_Pos) & FPU_FPCCR_CLRONRETS_Msk) |
+                   ((FPU_FPCCR_CLRONRET_VAL  << FPU_FPCCR_CLRONRET_Pos ) & FPU_FPCCR_CLRONRET_Msk );
+  #endif
+
+  #if defined (NVIC_INIT_ITNS0) && (NVIC_INIT_ITNS0 == 1U)
+    NVIC->ITNS[0] = NVIC_INIT_ITNS0_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS1) && (NVIC_INIT_ITNS1 == 1U)
+    NVIC->ITNS[1] = NVIC_INIT_ITNS1_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS2) && (NVIC_INIT_ITNS2 == 1U)
+    NVIC->ITNS[2] = NVIC_INIT_ITNS2_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS3) && (NVIC_INIT_ITNS3 == 1U)
+    NVIC->ITNS[3] = NVIC_INIT_ITNS3_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS4) && (NVIC_INIT_ITNS4 == 1U)
+    NVIC->ITNS[4] = NVIC_INIT_ITNS4_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS5) && (NVIC_INIT_ITNS5 == 1U)
+    NVIC->ITNS[5] = NVIC_INIT_ITNS5_VAL;
+  #endif
+
+  #if defined (NVIC_INIT_ITNS6) && (NVIC_INIT_ITNS6 == 1U)
+    NVIC->ITNS[6] = NVIC_INIT_ITNS6_VAL;
+  #endif    
+
+}
+
+#endif  /* PARTITION_STM32N657XX_H */
diff --git a/hw/bsp/stm32n6/stm32n6xx_hal_conf.h b/hw/bsp/stm32n6/stm32n6xx_hal_conf.h
new file mode 100644
index 000000000..d98d365a3
--- /dev/null
+++ b/hw/bsp/stm32n6/stm32n6xx_hal_conf.h
@@ -0,0 +1,504 @@
+/**
+  ******************************************************************************
+  * @file    stm32n6xx_hal_conf_template.h
+  * @author  MCD Application Team
+  * @brief   HAL configuration template file.
+  *          This file should be copied to the application folder and renamed
+  *          to stm32n6xx_hal_conf.h.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef STM32N6xx_HAL_CONF_H
+#define STM32N6xx_HAL_CONF_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/* ########################## Module Selection ############################## */
+/**
+  * @brief This is the list of modules to be used in the HAL driver
+  */
+#define HAL_MODULE_ENABLED
+/*#define HAL_ADC_MODULE_ENABLED      */
+/*#define HAL_BSEC_MODULE_ENABLED     */
+/*#define HAL_CRC_MODULE_ENABLED      */
+/*#define HAL_CRYP_MODULE_ENABLED     */
+/*#define HAL_DCMI_MODULE_ENABLED     */
+/*#define HAL_DCMIPP_MODULE_ENABLED   */
+/*#define HAL_DMA2D_MODULE_ENABLED    */
+/*#define HAL_DTS_MODULE_ENABLED      */
+/*#define HAL_ETH_MODULE_ENABLED      */
+/*#define HAL_EXTI_MODULE_ENABLED     */
+/*#define HAL_FDCAN_MODULE_ENABLED    */
+/*#define HAL_GFXMMU_MODULE_ENABLED   */
+/*#define HAL_GFXTIM_MODULE_ENABLED   */
+/*#define HAL_HASH_MODULE_ENABLED     */
+#define HAL_HCD_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
+/*#define HAL_I2S_MODULE_ENABLED      */
+/*#define HAL_I3C_MODULE_ENABLED      */
+/*#define HAL_ICACHE_MODULE_ENABLED   */
+/*#define HAL_IRDA_MODULE_ENABLED     */
+/*#define HAL_IWDG_MODULE_ENABLED     */
+/*#define HAL_JPEG_MODULE_ENABLED     */
+/*#define HAL_LPTIM_MODULE_ENABLED    */
+/*#define HAL_LTDC_MODULE_ENABLED     */
+/*#define HAL_MCE_MODULE_ENABLED      */
+/*#define HAL_MDF_MODULE_ENABLED      */
+/*#define HAL_MMC_MODULE_ENABLED      */
+/*#define HAL_NAND_MODULE_ENABLED     */
+/*#define HAL_NOR_MODULE_ENABLED      */
+#define HAL_PCD_MODULE_ENABLED
+/*#define HAL_PKA_MODULE_ENABLED      */
+/*#define HAL_PSSI_MODULE_ENABLED     */
+/*#define HAL_RAMCFG_MODULE_ENABLED   */
+#define HAL_RIF_MODULE_ENABLED
+/*#define HAL_RNG_MODULE_ENABLED      */
+/*#define HAL_RTC_MODULE_ENABLED      */
+/*#define HAL_SAI_MODULE_ENABLED      */
+/*#define HAL_SD_MODULE_ENABLED       */
+/*#define HAL_SDIO_MODULE_ENABLED     */
+/*#define HAL_SDRAM_MODULE_ENABLED    */
+/*#define HAL_SMARTCARD_MODULE_ENABLED*/
+/*#define HAL_SMBUS_MODULE_ENABLED    */
+/*#define HAL_SPDIFRX_MODULE_ENABLED  */
+/*#define HAL_SPI_MODULE_ENABLED      */
+/*#define HAL_SRAM_MODULE_ENABLED     */
+#define HAL_TIM_MODULE_ENABLED
+#define HAL_UART_MODULE_ENABLED
+#define HAL_USART_MODULE_ENABLED
+/*#define HAL_WWDG_MODULE_ENABLED     */
+/*#define HAL_XSPI_MODULE_ENABLED     */
+/*#define HAL_CACHEAXI_MODULE_ENABLED */
+/*#define HAL_MDIOS_MODULE_ENABLED    */
+/*#define HAL_GPU2D_MODULE_ENABLED    */
+/*#define HAL_CACHEAXI_MODULE_ENABLED */
+#define HAL_GPIO_MODULE_ENABLED
+#define HAL_EXTI_MODULE_ENABLED
+#define HAL_DMA_MODULE_ENABLED
+#define HAL_RCC_MODULE_ENABLED
+#define HAL_PWR_MODULE_ENABLED
+#define HAL_CORTEX_MODULE_ENABLED
+
+/* ########################## Oscillator Values adaptation ####################*/
+/**
+  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSE is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSE_VALUE)
+#define HSE_VALUE              48000000UL /*!< Value of the External oscillator in Hz */
+#endif /* HSE_VALUE */
+
+#if !defined  (HSE_STARTUP_TIMEOUT)
+#define HSE_STARTUP_TIMEOUT    100UL   /*!< Time out for HSE start up, in ms */
+#endif /* HSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief External Low Speed oscillator (LSE) value.
+  *        This value is used by the UART, RTC HAL module to compute the system frequency
+  */
+#if !defined  (LSE_VALUE)
+#define LSE_VALUE              32768UL   /*!< Value of the External oscillator in Hz */
+#endif /* LSE_VALUE */
+
+#if !defined  (LSE_STARTUP_TIMEOUT)
+#define LSE_STARTUP_TIMEOUT    5000UL     /*!< Time out for LSE start up, in ms */
+#endif /* LSE_STARTUP_TIMEOUT */
+
+/**
+  * @brief Internal Multiple Speed oscillator (MSI) default value.
+  *        This value is the default MSI range value after Reset.
+  */
+#if !defined  (MSI_VALUE)
+#define MSI_VALUE              4000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* MSI_VALUE */
+
+/**
+  * @brief Internal High Speed oscillator (HSI) value.
+  *        This value is used by the RCC HAL module to compute the system frequency
+  *        (when HSI is used as system clock source, directly or through the PLL).
+  */
+#if !defined  (HSI_VALUE)
+#define HSI_VALUE              64000000UL /*!< Value of the Internal oscillator in Hz */
+#endif /* HSI_VALUE */
+
+/**
+  * @brief Internal Low Speed oscillator (LSI) value.
+  */
+#if !defined  (LSI_VALUE)
+#define LSI_VALUE               32000UL    /*!< LSI Typical Value in Hz */
+#endif /* LSI_VALUE */                     /*!< Value of the Internal Low Speed oscillator in Hz */
+/* The real value may vary depending on the variations in voltage and temperature.*/
+
+/* Tip: To avoid modifying this file each time you need to use different HSE,
+   ===  you can define the HSE value in your toolchain compiler preprocessor. */
+
+/* ########################### System Configuration ######################### */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  VDD_VALUE                  3300UL /*!< Value of VDD in mv */
+#define  TICK_INT_PRIORITY          15U  /*!< tick interrupt priority (lowest by default) */
+#define  USE_RTOS                   0U
+
+/* ########################## Assert Selection ############################## */
+/**
+  * @brief Uncomment the line below to expanse the "assert_param" macro in the
+  *        HAL drivers code
+  */
+/* #define USE_FULL_ASSERT    1U */
+
+/* ################## Register callback feature configuration ############### */
+/**
+  * @brief Set below the peripheral configuration  to "1U" to add the support
+  *        of HAL callback registration/unregistration feature for the HAL
+  *        driver(s). This allows user application to provide specific callback
+  *        functions thanks to HAL_PPP_RegisterCallback() rather than overwriting
+  *        the default weak callback functions (see each stm32n6xx_hal_ppp.h file
+  *        for possible callback identifiers defined in HAL_PPP_CallbackIDTypeDef
+  *        for each PPP peripheral).
+  */
+#define  USE_HAL_ADC_REGISTER_CALLBACKS       0U /* ADC register callback disabled       */
+#define  USE_HAL_CACHEAXI_REGISTER_CALLBACKS  0U /* CACHEAXI register callback disabled  */
+#define  USE_HAL_CRYP_REGISTER_CALLBACKS      0U /* CRYP register callback disabled      */
+#define  USE_HAL_DCMI_REGISTER_CALLBACKS      0U /* DCMI register callback disabled      */
+#define  USE_HAL_DCMIPP_REGISTER_CALLBACKS    0U /* DCMIPP register callback disabled    */
+#define  USE_HAL_DMA2D_REGISTER_CALLBACKS     0U /* DMA2D register callback disabled     */
+#define  USE_HAL_DTS_REGISTER_CALLBACKS       0U /* DTS register callback disabled       */
+#define  USE_HAL_ETH_REGISTER_CALLBACKS       0U /* ETH register callback disabled       */
+#define  USE_HAL_FDCAN_REGISTER_CALLBACKS     0U /* FDCAN register callback disabled     */
+#define  USE_HAL_GFXMMU_REGISTER_CALLBACKS    0U /* GFXMMU register callback disabled    */
+#define  USE_HAL_GFXTIM_REGISTER_CALLBACKS    0U /* GFXTIM register callback disabled    */
+#define  USE_HAL_HASH_REGISTER_CALLBACKS      0U /* HASH register callback disabled      */
+#define  USE_HAL_HCD_REGISTER_CALLBACKS       0U /* HCD register callback disabled       */
+#define  USE_HAL_I2C_REGISTER_CALLBACKS       0U /* I2C register callback disabled       */
+#define  USE_HAL_I2S_REGISTER_CALLBACKS       0U /* I2S register callback disabled       */
+#define  USE_HAL_I3C_REGISTER_CALLBACKS       0U /* I3C register callback disabled       */
+#define  USE_HAL_IWDG_REGISTER_CALLBACKS      0U /* IWDG register callback disabled      */
+#define  USE_HAL_IRDA_REGISTER_CALLBACKS      0U /* IRDA register callback disabled      */
+#define  USE_HAL_LPTIM_REGISTER_CALLBACKS     0U /* LPTIM register callback disabled     */
+#define  USE_HAL_LTDC_REGISTER_CALLBACKS      0U /* LTDC register callback disabled      */
+#define  USE_HAL_MCE_REGISTER_CALLBACKS       0U /* MCE register callback disabled       */
+#define  USE_HAL_MDF_REGISTER_CALLBACKS       0U /* MDF register callback disabled       */
+#define  USE_HAL_MMC_REGISTER_CALLBACKS       0U /* MMC register callback disabled       */
+#define  USE_HAL_NAND_REGISTER_CALLBACKS      0U /* NAND register callback disabled      */
+#define  USE_HAL_NOR_REGISTER_CALLBACKS       0U /* NOR register callback disabled       */
+#define  USE_HAL_PCD_REGISTER_CALLBACKS       0U /* PCD register callback disabled       */
+#define  USE_HAL_PKA_REGISTER_CALLBACKS       0U /* PKA register callback disabled       */
+#define  USE_HAL_PSSI_REGISTER_CALLBACKS      0U /* PSSI register callback disabled      */
+#define  USE_HAL_RAMCFG_REGISTER_CALLBACKS    0U /* RAMCFG register callback disabled    */
+#define  USE_HAL_RNG_REGISTER_CALLBACKS       0U /* RNG register callback disabled       */
+#define  USE_HAL_RTC_REGISTER_CALLBACKS       0U /* RTC register callback disabled       */
+#define  USE_HAL_SAI_REGISTER_CALLBACKS       0U /* SAI register callback disabled       */
+#define  USE_HAL_SD_REGISTER_CALLBACKS        0U /* SD register callback disabled        */
+#define  USE_HAL_SDIO_REGISTER_CALLBACKS      0U /* SDIO register callback disabled      */
+#define  USE_HAL_SDRAM_REGISTER_CALLBACKS     0U /* SDRAM register callback disabled     */
+#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS 0U /* SMARTCARD register callback disabled */
+#define  USE_HAL_SMBUS_REGISTER_CALLBACKS     0U /* SMBUS register callback disabled     */
+#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS   0U /* SPDIFRX register callback disabled   */
+#define  USE_HAL_SPI_REGISTER_CALLBACKS       0U /* SPI register callback disabled       */
+#define  USE_HAL_SRAM_REGISTER_CALLBACKS      0U /* SRAM register callback disabled      */
+#define  USE_HAL_TIM_REGISTER_CALLBACKS       0U /* TIM register callback disabled       */
+#define  USE_HAL_UART_REGISTER_CALLBACKS      0U /* UART register callback disabled      */
+#define  USE_HAL_USART_REGISTER_CALLBACKS     0U /* USART register callback disabled     */
+#define  USE_HAL_WWDG_REGISTER_CALLBACKS      0U /* WWDG register callback disabled      */
+#define  USE_HAL_XSPI_REGISTER_CALLBACKS      0U /* XSPI register callback disabled      */
+
+/* ################## SPI peripheral configuration ########################## */
+
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+#define USE_SPI_CRC                   0U
+
+/* ################## SDMMC peripheral configuration ######################### */
+
+#define USE_SD_TRANSCEIVER            0U
+
+/* ################## SDIO peripheral configuration ########################## */
+#define USE_SDIO_TRANSCEIVER          1U
+#define SDIO_MAX_IO_NUMBER            7U /*!< SDIO device support maximum IO number */
+
+/* Includes ------------------------------------------------------------------*/
+/**
+  * @brief Include module's header file
+  */
+#ifdef HAL_RCC_MODULE_ENABLED
+#include "stm32n6xx_hal_rcc.h"
+#endif /* HAL_RCC_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32n6xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_RIF_MODULE_ENABLED
+#include "stm32n6xx_hal_rif.h"
+#endif /* HAL_RIF_MODULE_ENABLED */
+
+#ifdef HAL_DMA_MODULE_ENABLED
+#include "stm32n6xx_hal_dma.h"
+#endif /* HAL_DMA_MODULE_ENABLED */
+
+#ifdef HAL_CACHEAXI_MODULE_ENABLED
+#include "stm32n6xx_hal_cacheaxi.h"
+#endif /* HAL_CACHEAXI_MODULE_ENABLED */
+
+#ifdef HAL_CORTEX_MODULE_ENABLED
+#include "stm32n6xx_hal_cortex.h"
+#endif /* HAL_CORTEX_MODULE_ENABLED */
+
+#ifdef HAL_ADC_MODULE_ENABLED
+#include "stm32n6xx_hal_adc.h"
+#endif /* HAL_ADC_MODULE_ENABLED */
+
+#ifdef HAL_BSEC_MODULE_ENABLED
+#include "stm32n6xx_hal_bsec.h"
+#endif /* HAL_BSEC_MODULE_ENABLED */
+
+#ifdef HAL_CRC_MODULE_ENABLED
+#include "stm32n6xx_hal_crc.h"
+#endif /* HAL_CRC_MODULE_ENABLED */
+
+#ifdef HAL_CRYP_MODULE_ENABLED
+#include "stm32n6xx_hal_cryp.h"
+#endif /* HAL_CRYP_MODULE_ENABLED */
+
+#ifdef HAL_DCMI_MODULE_ENABLED
+#include "stm32n6xx_hal_dcmi.h"
+#endif /* HAL_DCMI_MODULE_ENABLED */
+
+#ifdef HAL_DCMIPP_MODULE_ENABLED
+#include "stm32n6xx_hal_dcmipp.h"
+#endif /* HAL_DCMIPP_MODULE_ENABLED */
+
+#ifdef HAL_DMA2D_MODULE_ENABLED
+#include "stm32n6xx_hal_dma2d.h"
+#endif /* HAL_DMA2D_MODULE_ENABLED */
+
+#ifdef HAL_DTS_MODULE_ENABLED
+#include "stm32n6xx_hal_dts.h"
+#endif /* HAL_DTS_MODULE_ENABLED */
+
+#ifdef HAL_ETH_MODULE_ENABLED
+#include "stm32n6xx_hal_eth.h"
+#endif /* HAL_ETH_MODULE_ENABLED */
+
+#ifdef HAL_EXTI_MODULE_ENABLED
+#include "stm32n6xx_hal_exti.h"
+#endif /* HAL_EXTI_MODULE_ENABLED */
+
+#ifdef HAL_FDCAN_MODULE_ENABLED
+#include "stm32n6xx_hal_fdcan.h"
+#endif /* HAL_FDCAN_MODULE_ENABLED */
+
+#ifdef HAL_GFXMMU_MODULE_ENABLED
+#include "stm32n6xx_hal_gfxmmu.h"
+#endif /* HAL_GFXMMU_MODULE_ENABLED */
+
+#ifdef HAL_GFXTIM_MODULE_ENABLED
+#include "stm32n6xx_hal_gfxtim.h"
+#endif /* HAL_GFXTIM_MODULE_ENABLED */
+
+#ifdef HAL_GPIO_MODULE_ENABLED
+#include "stm32n6xx_hal_gpio.h"
+#endif /* HAL_GPIO_MODULE_ENABLED */
+
+#ifdef HAL_GPU2D_MODULE_ENABLED
+#include "stm32n6xx_hal_gpu2d.h"
+#endif /* HAL_GPU2D_MODULE_ENABLED */
+
+#ifdef HAL_HASH_MODULE_ENABLED
+#include "stm32n6xx_hal_hash.h"
+#endif /* HAL_HASH_MODULE_ENABLED */
+
+#ifdef HAL_HCD_MODULE_ENABLED
+#include "stm32n6xx_hal_hcd.h"
+#endif /* HAL_HCD_MODULE_ENABLED */
+
+#ifdef HAL_I2C_MODULE_ENABLED
+#include "stm32n6xx_hal_i2c.h"
+#endif /* HAL_I2C_MODULE_ENABLED */
+
+#ifdef HAL_I2S_MODULE_ENABLED
+ #include "stm32n6xx_hal_i2s.h"
+#endif /* HAL_I2S_MODULE_ENABLED */
+
+#ifdef HAL_I3C_MODULE_ENABLED
+#include "stm32n6xx_hal_i3c.h"
+#endif /* HAL_I3C_MODULE_ENABLED */
+
+#ifdef HAL_ICACHE_MODULE_ENABLED
+#include "stm32n6xx_hal_icache.h"
+#endif /* HAL_ICACHE_MODULE_ENABLED */
+
+#ifdef HAL_IRDA_MODULE_ENABLED
+#include "stm32n6xx_hal_irda.h"
+#endif /* HAL_IRDA_MODULE_ENABLED */
+
+#ifdef HAL_IWDG_MODULE_ENABLED
+#include "stm32n6xx_hal_iwdg.h"
+#endif /* HAL_IWDG_MODULE_ENABLED */
+
+#ifdef HAL_JPEG_MODULE_ENABLED
+#include "stm32n6xx_hal_jpeg.h"
+#endif /* HAL_JPEG_MODULE_ENABLED */
+
+#ifdef HAL_LPTIM_MODULE_ENABLED
+#include "stm32n6xx_hal_lptim.h"
+#endif /* HAL_LPTIM_MODULE_ENABLED */
+
+#ifdef HAL_LTDC_MODULE_ENABLED
+#include "stm32n6xx_hal_ltdc.h"
+#endif /* HAL_LTDC_MODULE_ENABLED */
+
+#ifdef HAL_MCE_MODULE_ENABLED
+#include "stm32n6xx_hal_mce.h"
+#endif /* HAL_MCE_MODULE_ENABLED */
+
+#ifdef HAL_MDF_MODULE_ENABLED
+#include "stm32n6xx_hal_mdf.h"
+#endif /* HAL_MDF_MODULE_ENABLED */
+
+#ifdef HAL_MDIOS_MODULE_ENABLED
+#include "stm32n6xx_hal_mdios.h"
+#endif /* HAL_MDIOS_MODULE_ENABLED */
+
+#ifdef HAL_MMC_MODULE_ENABLED
+#include "stm32n6xx_hal_mmc.h"
+#endif /* HAL_MMC_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32n6xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_NOR_MODULE_ENABLED
+#include "stm32n6xx_hal_nor.h"
+#endif /* HAL_NOR_MODULE_ENABLED */
+
+#ifdef HAL_NAND_MODULE_ENABLED
+#include "stm32n6xx_hal_nand.h"
+#endif /* HAL_NAND_MODULE_ENABLED */
+
+#ifdef HAL_PCD_MODULE_ENABLED
+#include "stm32n6xx_hal_pcd.h"
+#endif /* HAL_PCD_MODULE_ENABLED */
+
+#ifdef HAL_PKA_MODULE_ENABLED
+#include "stm32n6xx_hal_pka.h"
+#endif /* HAL_PKA_MODULE_ENABLED */
+
+#ifdef HAL_PSSI_MODULE_ENABLED
+#include "stm32n6xx_hal_pssi.h"
+#endif /* HAL_PSSI_MODULE_ENABLED */
+
+#ifdef HAL_PWR_MODULE_ENABLED
+#include "stm32n6xx_hal_pwr.h"
+#endif /* HAL_PWR_MODULE_ENABLED */
+
+#ifdef HAL_RAMCFG_MODULE_ENABLED
+#include "stm32n6xx_hal_ramcfg.h"
+#endif /* HAL_RAMCFG_MODULE_ENABLED */
+
+#ifdef HAL_RNG_MODULE_ENABLED
+#include "stm32n6xx_hal_rng.h"
+#endif /* HAL_RNG_MODULE_ENABLED */
+
+#ifdef HAL_RTC_MODULE_ENABLED
+#include "stm32n6xx_hal_rtc.h"
+#endif /* HAL_RTC_MODULE_ENABLED */
+
+#ifdef HAL_SAI_MODULE_ENABLED
+#include "stm32n6xx_hal_sai.h"
+#endif /* HAL_SAI_MODULE_ENABLED */
+
+#ifdef HAL_SD_MODULE_ENABLED
+#include "stm32n6xx_hal_sd.h"
+#endif /* HAL_SD_MODULE_ENABLED */
+
+#ifdef HAL_SDIO_MODULE_ENABLED
+#include "stm32n6xx_hal_sdio.h"
+#endif /* HAL_SDIO_MODULE_ENABLED */
+
+#ifdef HAL_SDRAM_MODULE_ENABLED
+#include "stm32n6xx_hal_sdram.h"
+#endif /* HAL_SDRAM_MODULE_ENABLED */
+
+#ifdef HAL_SMARTCARD_MODULE_ENABLED
+#include "stm32n6xx_hal_smartcard.h"
+#endif /* HAL_SMARTCARD_MODULE_ENABLED */
+
+#ifdef HAL_SMBUS_MODULE_ENABLED
+#include "stm32n6xx_hal_smbus.h"
+#endif /* HAL_SMBUS_MODULE_ENABLED */
+
+#ifdef HAL_SPDIFRX_MODULE_ENABLED
+#include "stm32n6xx_hal_spdifrx.h"
+#endif /* HAL_SPDIFRX_MODULE_ENABLED */
+
+#ifdef HAL_SPI_MODULE_ENABLED
+#include "stm32n6xx_hal_spi.h"
+#endif /* HAL_SPI_MODULE_ENABLED */
+
+#ifdef HAL_SRAM_MODULE_ENABLED
+#include "stm32n6xx_hal_sram.h"
+#endif /* HAL_SRAM_MODULE_ENABLED */
+
+#ifdef HAL_TIM_MODULE_ENABLED
+#include "stm32n6xx_hal_tim.h"
+#endif /* HAL_TIM_MODULE_ENABLED */
+
+#ifdef HAL_UART_MODULE_ENABLED
+#include "stm32n6xx_hal_uart.h"
+#endif /* HAL_UART_MODULE_ENABLED */
+
+#ifdef HAL_USART_MODULE_ENABLED
+#include "stm32n6xx_hal_usart.h"
+#endif /* HAL_USART_MODULE_ENABLED */
+
+#ifdef HAL_WWDG_MODULE_ENABLED
+#include "stm32n6xx_hal_wwdg.h"
+#endif /* HAL_WWDG_MODULE_ENABLED */
+
+#ifdef HAL_XSPI_MODULE_ENABLED
+#include "stm32n6xx_hal_xspi.h"
+#endif /* HAL_XSPI_MODULE_ENABLED */
+
+/* Exported macros -----------------------------------------------------------*/
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  The assert_param macro is used for function's parameters check.
+  * @param  expr: If expr is false, it calls assert_failed function
+  *         which reports the name of the source file and the source
+  *         line number of the call that failed.
+  *         If expr is true, it returns no value.
+  * @retval None
+  */
+#define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
+/* Exported functions ------------------------------------------------------- */
+void assert_failed(uint8_t *file, uint32_t line);
+#else
+#define assert_param(expr) ((void)0U)
+#endif /* USE_FULL_ASSERT */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* STM32N6xx_HAL_CONF_H */
diff --git a/hw/bsp/zephyr_board_aliases.cmake b/hw/bsp/zephyr_board_aliases.cmake
index 91ffc3a39..b85ecec81 100644
--- a/hw/bsp/zephyr_board_aliases.cmake
+++ b/hw/bsp/zephyr_board_aliases.cmake
@@ -1 +1,2 @@
 set(pca10056_BOARD_ALIAS nrf52840dk/nrf52840)
+set(stm32n657nucleo_BOARD_ALIAS nucleo_n657x0_q)
\ No newline at end of file
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 6678265b5..027446a85 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -322,6 +322,15 @@
   // MCU with on-chip HS Phy
   #define TUP_RHPORT_HIGHSPEED    1
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32N6)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_STM32
+
+  #define TUP_DCD_ENDPOINT_MAX    9
+
+  // MCU with on-chip HS Phy
+  #define TUP_RHPORT_HIGHSPEED    2
+
 //--------------------------------------------------------------------+
 // Sony
 //--------------------------------------------------------------------+
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 865c51894..5f86d6b76 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -425,6 +425,11 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // Clear A override, force B Valid
   dwc2->gotgctl = (dwc2->gotgctl & ~GOTGCTL_AVALOEN) | GOTGCTL_BVALOEN | GOTGCTL_BVALOVAL;
 
+#if CFG_TUSB_MCU == OPT_MCU_STM32N6
+  // No hardware detection of Vbus B-session is available on the STM32N6
+  dwc2->stm32_gccfg |= STM32_GCCFG_VBVALOVAL;
+#endif
+
   // Enable required interrupts
   dwc2->gintmsk |= GINTMSK_OTGINT | GINTMSK_USBSUSPM | GINTMSK_USBRST | GINTMSK_ENUMDNEM | GINTMSK_WUIM;
 
diff --git a/src/portable/synopsys/dwc2/dwc2_info.py b/src/portable/synopsys/dwc2/dwc2_info.py
index 25edcf22d..38aa5656a 100755
--- a/src/portable/synopsys/dwc2/dwc2_info.py
+++ b/src/portable/synopsys/dwc2/dwc2_info.py
@@ -22,6 +22,7 @@ dwc2_reg_value = {
     'ST H743/H750': [0x2300, 0x4F54330A, 0, 0x229FE190, 0x03B8D2E8, 0xE3F00030],
     'ST L476 FS': [0x2000, 0x4F54310A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
     'ST U5A5 HS': [0x5000, 0x4F54411A, 0, 0x228FE052, 0x03B882E8, 0xE2103E30],
+    'ST N6xx HS': [0x5000, 0x4F54411A, 0, 0x228FE052, 0x03B882E8, 0xE2103E30],
     'XMC4500': [0xAEC000, 0x4F54292A, 0, 0x228F5930, 0x027A01E5, 0xDBF08030],
     'GD32VF103': [0x1000, 0, 0, 0, 0, 0],
 }
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index c11c1eb05..0c1f835a9 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -77,6 +77,17 @@ extern "C" {
   #define EP_MAX_HS       9
   #define EP_FIFO_SIZE_HS 4096
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32N6
+  #include "stm32n6xx.h"
+  #define EP_MAX_FS       6
+  #define EP_FIFO_SIZE_FS 1280
+
+  #define EP_MAX_HS       9
+  #define EP_FIFO_SIZE_HS 4096
+
+  #define USB_OTG_HS_PERIPH_BASE    USB1_OTG_HS_BASE
+  #define OTG_HS_IRQn               USB1_OTG_HS_IRQn
+
 #elif CFG_TUSB_MCU == OPT_MCU_STM32F7
   #include "stm32f7xx.h"
   #define EP_MAX_FS       6
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index 2de15068a..257fa2833 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -381,6 +381,10 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 
   // force host mode and wait for mode switch
   dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FDMOD) | GUSBCFG_FHMOD;
+#if CFG_TUSB_MCU == OPT_MCU_STM32N6
+  // No hardware detection of Vbus B-session is available on the STM32N6
+  dwc2->stm32_gccfg &= ~STM32_GCCFG_VBVALOVAL;
+#endif
   while ((dwc2->gintsts & GINTSTS_CMOD) != GINTSTS_CMODE_HOST) {}
 
   // configure fixed-allocated fifo scheme
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 104f669c9..cca6096c6 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -94,6 +94,7 @@
 #define OPT_MCU_STM32U0           316 ///< ST U0
 #define OPT_MCU_STM32H7RS         317 ///< ST F7RS
 #define OPT_MCU_STM32C0           318 ///< ST C0
+#define OPT_MCU_STM32N6           319 ///< ST N6
 
 // Sony
 #define OPT_MCU_CXD56             400 ///< SONY CXD56
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 1ce8be6c7..ab9d50585 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -118,6 +118,9 @@ deps_optional = {
     'hw/mcu/st/cmsis_device_l5': ['https://github.com/STMicroelectronics/cmsis_device_l5.git',
                                   'd922865fc0326a102c26211c44b8e42f52c1e53d',
                                   'stm32l5'],
+    'hw/mcu/st/cmsis_device_n6': ['https://github.com/STMicroelectronics/cmsis-device-n6.git',
+                                  'f818b00f775444e8d19ef6cad822534c345e054f',
+                                  'stm32n6'],
     'hw/mcu/st/cmsis_device_u5': ['https://github.com/STMicroelectronics/cmsis_device_u5.git',
                                   '5ad9797c54ec3e55eff770fc9b3cd4a1aefc1309',
                                   'stm32u5'],
@@ -172,6 +175,9 @@ deps_optional = {
     'hw/mcu/st/stm32l5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32l5xx_hal_driver.git',
                                        '675c32a75df37f39d50d61f51cb0dcf53f07e1cb',
                                        'stm32l5'],
+    'hw/mcu/st/stm32n6xx_hal_driver': ['https://github.com/STMicroelectronics/stm32n6xx-hal-driver.git',
+                                       '49f9989d10cf6817d4b07ac01848956b46bd0fd6',
+                                       'stm32n6'],
     'hw/mcu/st/stm32u5xx_hal_driver': ['https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git',
                                        '4d93097a67928e9377e655ddd14622adc31b9770',
                                        'stm32u5'],
@@ -198,7 +204,7 @@ deps_optional = {
                     'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
-                    'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32u5 stm32wb '
+                    'stm32h7 stm32l0 stm32l1 stm32l4 stm32l5 stm32n6 stm32u5 stm32wb '
                     'sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg '
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
-- 
cgit v1.3.1


From d4abf43f226b5594c935c60c38d05a90359763e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 17 Jun 2025 22:16:13 +0700
Subject: add common cdch_process_set_config() to safely complete set_config()
 when it failed. driver_process_set_config() also pass drv index with
 user_data

---
 examples/host/cdc_msc_hid/src/cdc_app.c |  13 +-
 src/class/cdc/cdc_host.c                | 887 ++++++++++++++++----------------
 2 files changed, 453 insertions(+), 447 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index e68ec383b..6f4433f22 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -31,8 +31,7 @@ static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
-    if (ch <= 0) break;
-
+    if (ch <= 0) { break; }
     buf[count] = (uint8_t) ch;
     count++;
   }
@@ -69,10 +68,12 @@ void tuh_cdc_rx_cb(uint8_t idx) {
   uint32_t const bufsize = sizeof(buf) - 1;
 
   // forward cdc interfaces -> console
-  uint32_t count = tuh_cdc_read(idx, buf, bufsize);
-  buf[count] = 0;
-
-  printf("%s", (char*) buf);
+  const uint32_t count = tuh_cdc_read(idx, buf, bufsize);
+  if (count) {
+    buf[count] = 0;
+    printf("%s", (char*) buf);
+    fflush(stdout);
+  }
 }
 
 // Invoked when a device with CDC interface is mounted
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 5d5da9796..b6e9cb297 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -52,17 +52,6 @@
                                                           serial_drivers[p_cdc->serial_drid].name, ##__VA_ARGS__)
 #define TU_LOG_P_CDC_BOOL(TXT,VAL)             TU_LOG_P_CDC(TXT " " #VAL " = %d", VAL)
 
-// assert and set config complete
-#define TU_ASSERT_COMPLETE_DEFINE(_cond, _itf_offset)                                                \
-  do {                                                                                               \
-    if (!(_cond)) { _MESS_FAILED(); TU_BREAKPOINT(); set_config_complete(idx, _itf_offset, false); } \
-  } while(0)
-
-#define TU_ASSERT_COMPLETE_1ARGS(_cond)               TU_ASSERT_COMPLETE_DEFINE(_cond, 0)
-#define TU_ASSERT_COMPLETE_2ARGS(_cond, _itf_offset)  TU_ASSERT_COMPLETE_DEFINE(_cond, _itf_offset)
-
-#define TU_ASSERT_COMPLETE(...) _GET_3RD_ARG(__VA_ARGS__, TU_ASSERT_COMPLETE_2ARGS, TU_ASSERT_COMPLETE_1ARGS, _dummy)(__VA_ARGS__)
-
 // handle line control defines
 #if defined(CFG_TUH_CDC_LINE_CONTROL_ON_ENUM) && \
     (defined(CFG_TUH_CDC_DTR_CONTROL_ON_ENUM) || defined(CFG_TUH_CDC_RTS_CONTROL_ON_ENUM))
@@ -142,9 +131,14 @@ CFG_TUH_MEM_SECTION static cdch_epbuf_t cdch_epbuf[CFG_TUH_CDC];
 // Serial Driver
 //--------------------------------------------------------------------+
 
+// for process_set_config user_data: idx (byte1) and state (byte0)
+#define PROCESS_CONFIG_STATE(_idx, _state) tu_u16(_idx, _state)
+
+static void cdch_process_set_config(tuh_xfer_t *xfer);
+
 //------------- ACM prototypes -------------//
 static bool acm_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
-static void acm_process_config(tuh_xfer_t * xfer);
+static bool acm_process_set_config(tuh_xfer_t * xfer);
 
 static bool acm_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 static bool acm_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -159,7 +153,7 @@ static uint16_t const ftdi_vid_pid_list[][2] = {CFG_TUH_CDC_FTDI_VID_PID_LIST};
 #endif
 
 static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len);
-static void ftdi_process_config(tuh_xfer_t * xfer);
+static bool ftdi_proccess_set_config(tuh_xfer_t * xfer);
 
 static bool ftdi_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 static bool ftdi_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -172,7 +166,7 @@ static bool ftdi_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete
 static uint16_t const cp210x_vid_pid_list[][2] = {CFG_TUH_CDC_CP210X_VID_PID_LIST};
 
 static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
-static void cp210x_process_config(tuh_xfer_t * xfer);
+static bool cp210x_process_set_config(tuh_xfer_t * xfer);
 
 static bool cp210x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 static bool cp210x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -185,7 +179,7 @@ static bool cp210x_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t comple
 static uint16_t const ch34x_vid_pid_list[][2] = {CFG_TUH_CDC_CH34X_VID_PID_LIST};
 
 static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
-static void ch34x_process_config(tuh_xfer_t * xfer);
+static bool ch34x_process_set_config(tuh_xfer_t *xfer);
 
 static bool ch34x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 static bool ch34x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -201,7 +195,7 @@ static const struct pl2303_type_data pl2303_type_data[TYPE_COUNT] = {PL2303_TYPE
 CFG_TUH_MEM_SECTION CFG_TUH_MEM_ALIGN
 
 static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len);
-static void pl2303_process_config(tuh_xfer_t * xfer);
+static bool pl2303_process_set_config(tuh_xfer_t *xfer);
 
 static bool pl2303_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
 static bool pl2303_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -236,7 +230,7 @@ typedef struct {
   uint16_t const (*vid_pid_list)[2];
   uint16_t const vid_pid_count;
   bool (*const open)(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len);
-  void (*const process_set_config)(tuh_xfer_t * xfer);
+  bool (*const process_set_config)(tuh_xfer_t * xfer);
   bool (*const set_control_line_state)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
   bool (*const set_baudrate)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
   bool (*const set_data_format)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
@@ -252,7 +246,7 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = NULL,
       .vid_pid_count          = 0,
       .open                   = acm_open,
-      .process_set_config     = acm_process_config,
+      .process_set_config     = acm_process_set_config,
       .set_control_line_state = acm_set_control_line_state,
       .set_baudrate           = acm_set_baudrate,
       .set_data_format        = acm_set_data_format,
@@ -267,7 +261,7 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = ftdi_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ftdi_vid_pid_list),
       .open                   = ftdi_open,
-      .process_set_config     = ftdi_process_config,
+      .process_set_config     = ftdi_proccess_set_config,
       .set_control_line_state = ftdi_set_modem_ctrl,
       .set_baudrate           = ftdi_set_baudrate,
       .set_data_format        = ftdi_set_data_format,
@@ -283,7 +277,7 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = cp210x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(cp210x_vid_pid_list),
       .open                   = cp210x_open,
-      .process_set_config     = cp210x_process_config,
+      .process_set_config     = cp210x_process_set_config,
       .set_control_line_state = cp210x_set_modem_ctrl,
       .set_baudrate           = cp210x_set_baudrate,
       .set_data_format        = cp210x_set_data_format,
@@ -299,7 +293,7 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = ch34x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ch34x_vid_pid_list),
       .open                   = ch34x_open,
-      .process_set_config     = ch34x_process_config,
+      .process_set_config     = ch34x_process_set_config,
       .set_control_line_state = ch34x_set_modem_ctrl,
       .set_baudrate           = ch34x_set_baudrate,
       .set_data_format        = ch34x_set_data_format,
@@ -315,7 +309,7 @@ static const cdch_serial_driver_t serial_drivers[] = {
       .vid_pid_list           = pl2303_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(pl2303_vid_pid_list),
       .open                   = pl2303_open,
-      .process_set_config     = pl2303_process_config,
+      .process_set_config     = pl2303_process_set_config,
       .set_control_line_state = pl2303_set_modem_ctrl,
       .set_baudrate           = pl2303_set_baudrate,
       .set_data_format        = pl2303_set_data_format,
@@ -378,9 +372,8 @@ static bool open_ep_stream_pair(cdch_interface_t * p_cdc , tusb_desc_endpoint_t
 uint8_t tuh_cdc_itf_get_index(uint8_t daddr, uint8_t itf_num) {
   for (uint8_t i = 0; i < CFG_TUH_CDC; i++) {
     const cdch_interface_t * p_cdc = &cdch_data[i];
-    if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) return i;
+    if (p_cdc->daddr == daddr && p_cdc->bInterfaceNumber == itf_num) { return i; }
   }
-
   return TUSB_INDEX_INVALID_8;
 }
 
@@ -642,18 +635,18 @@ bool tuh_cdc_set_dtr(uint8_t idx, bool dtr_state, tuh_xfer_cb_t complete_cb, uin
 }
 
 bool tuh_cdc_set_rts(uint8_t idx, bool rts_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  cdc_line_control_state_t const line_state = { .rts = rts_state, .dtr = p_cdc->line_state.dtr };
+  cdc_line_control_state_t const line_state = {.rts = rts_state, .dtr = p_cdc->line_state.dtr};
 
   return tuh_cdc_set_control_line_state_u(idx, line_state, complete_cb, user_data);
 }
 
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
   TU_LOG_P_CDC("set baudrate %lu", baudrate);
-  cdch_serial_driver_t const * driver = &serial_drivers[p_cdc->serial_drid];
+  cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
 
   p_cdc->requested_line_coding.bit_rate = baudrate;
 
@@ -669,12 +662,12 @@ bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete
 
 bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits,
                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
   TU_LOG_P_CDC("set data format %u%c%s",
                data_bits, CDC_LINE_CODING_PARITY_CHAR(parity),
                CDC_LINE_CODING_STOP_BITS_TEXT(stop_bits));
-  cdch_serial_driver_t const * driver = &serial_drivers[p_cdc->serial_drid];
+  cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
 
   p_cdc->requested_line_coding.stop_bits = stop_bits;
   p_cdc->requested_line_coding.parity    = parity;
@@ -692,15 +685,15 @@ bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uin
   return ret;
 }
 
-bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const * line_coding,
+bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
   TU_LOG_P_CDC("set line coding %lu %u%c%s",
                line_coding->bit_rate, line_coding->data_bits,
                CDC_LINE_CODING_PARITY_CHAR(line_coding->parity),
                CDC_LINE_CODING_STOP_BITS_TEXT(line_coding->stop_bits));
-  cdch_serial_driver_t const * driver = &serial_drivers[p_cdc->serial_drid];
+  cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
 
   p_cdc->requested_line_coding = *line_coding;
 
@@ -722,8 +715,8 @@ bool cdch_init(void) {
   TU_LOG_DRV("sizeof(cdch_interface_t) = %u\r\n", sizeof(cdch_interface_t));
   tu_memclr(cdch_data, sizeof(cdch_data));
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
-    cdch_interface_t* p_cdc = &cdch_data[i];
-    cdch_epbuf_t* epbuf = &cdch_epbuf[i];
+    cdch_interface_t *p_cdc = &cdch_data[i];
+    cdch_epbuf_t *epbuf = &cdch_epbuf[i];
     tu_edpt_stream_init(&p_cdc->stream.tx, true, true, false,
                         p_cdc->stream.tx_ff_buf, CFG_TUH_CDC_TX_BUFSIZE,
                         epbuf->tx, CFG_TUH_CDC_TX_EPSIZE);
@@ -738,7 +731,7 @@ bool cdch_init(void) {
 
 bool cdch_deinit(void) {
   for (size_t i = 0; i < CFG_TUH_CDC; i++) {
-    cdch_interface_t* p_cdc = &cdch_data[i];
+    cdch_interface_t *p_cdc = &cdch_data[i];
     tu_edpt_stream_deinit(&p_cdc->stream.tx);
     tu_edpt_stream_deinit(&p_cdc->stream.rx);
   }
@@ -747,7 +740,7 @@ bool cdch_deinit(void) {
 
 void cdch_close(uint8_t daddr) {
   for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
-    cdch_interface_t * p_cdc = &cdch_data[idx];
+    cdch_interface_t *p_cdc = &cdch_data[idx];
     if (p_cdc->daddr == daddr) {
       TU_LOG_P_CDC("close");
 
@@ -770,7 +763,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
   TU_VERIFY(event == XFER_RESULT_SUCCESS);
 
   uint8_t const idx = get_idx_by_ep_addr(daddr, ep_addr);
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc);
 
   if (ep_addr == p_cdc->stream.tx.ep_addr) {
@@ -779,31 +772,36 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
       tuh_cdc_tx_complete_cb(idx);
     }
 
-    if ( 0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx) ) {
+    if (0 == tu_edpt_stream_write_xfer(daddr, &p_cdc->stream.tx)) {
       // If there is no data left, a ZLP should be sent if:
       // - xferred_bytes is multiple of EP Packet size and not zero
       tu_edpt_stream_write_zlp_if_needed(daddr, &p_cdc->stream.tx, xferred_bytes);
     }
   } else if (ep_addr == p_cdc->stream.rx.ep_addr) {
     #if CFG_TUH_CDC_FTDI
-    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI && xferred_bytes > 2) {
+    if (p_cdc->serial_drid == SERIAL_DRIVER_FTDI) {
       // FTDI reserve 2 bytes for status
       // uint8_t status[2] = {p_cdc->stream.rx.ep_buf[0], p_cdc->stream.rx.ep_buf[1]};
-      tu_edpt_stream_read_xfer_complete_with_buf(&p_cdc->stream.rx, p_cdc->stream.rx.ep_buf+2, xferred_bytes-2);
-    }else
+      if (xferred_bytes > 2) {
+        tu_edpt_stream_read_xfer_complete_with_buf(&p_cdc->stream.rx, p_cdc->stream.rx.ep_buf + 2, xferred_bytes - 2);
+
+        if (tuh_cdc_rx_cb) {
+          tuh_cdc_rx_cb(idx); // invoke receive callback
+        }
+      }
+    } else
     #endif
     {
       tu_edpt_stream_read_xfer_complete(&p_cdc->stream.rx, xferred_bytes);
-    }
 
-    // invoke receive callback
-    if (tuh_cdc_rx_cb) {
-      tuh_cdc_rx_cb(idx);
+      if (tuh_cdc_rx_cb) {
+        tuh_cdc_rx_cb(idx); // invoke receive callback
+      }
     }
 
     // prepare for next transfer if needed
     tu_edpt_stream_read_xfer(daddr, &p_cdc->stream.rx);
-  }else if ( ep_addr == p_cdc->ep_notif ) {
+  } else if (ep_addr == p_cdc->ep_notif) {
     // TODO handle notification endpoint
   } else {
     TU_ASSERT(false);
@@ -816,7 +814,7 @@ bool cdch_xfer_cb(uint8_t daddr, uint8_t ep_addr, xfer_result_t event, uint32_t
 // Enumeration
 //--------------------------------------------------------------------+
 
-static bool open_ep_stream_pair(cdch_interface_t * p_cdc, tusb_desc_endpoint_t const * desc_ep) {
+static bool open_ep_stream_pair(cdch_interface_t *p_cdc, tusb_desc_endpoint_t const *desc_ep) {
   for (size_t i = 0; i < 2; i++) {
     TU_ASSERT(TUSB_DESC_ENDPOINT == desc_ep->bDescriptorType &&
               TUSB_XFER_BULK == desc_ep->bmAttributes.xfer);
@@ -834,9 +832,9 @@ static bool open_ep_stream_pair(cdch_interface_t * p_cdc, tusb_desc_endpoint_t c
   return true;
 }
 
-bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
+bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
   (void) rhport;
-  cdch_serial_driver_t const * driver_detected = NULL;
+  cdch_serial_driver_t const *driver_detected = NULL;
 
   // For CDC: only support ACM subclass
   // Note: Protocol 0xFF can be RNDIS device
@@ -849,7 +847,7 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const * itf_
     TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
 
     for (size_t dr = 1; dr < SERIAL_DRIVER_COUNT; dr++) {
-      cdch_serial_driver_t const * driver = &serial_drivers[dr];
+      cdch_serial_driver_t const *driver = &serial_drivers[dr];
       for (size_t i = 0; i < driver->vid_pid_count; i++) {
         if (driver->vid_pid_list[i][0] == vid && driver->vid_pid_list[i][1] == pid) {
           driver_detected = driver;
@@ -865,7 +863,7 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const * itf_
   if (driver_detected) {
     TU_LOG_CDC("open", daddr, itf_desc->bInterfaceNumber, driver_detected->name);
     bool ret = driver_detected->open(daddr, itf_desc, max_len);
-//    TU_LOG_CDC("opened ret = %s", daddr, itf_desc->bInterfaceNumber, driver_detected->name, ret ? "true" : "FALSE" );
+    //    TU_LOG_CDC("opened ret = %s", daddr, itf_desc->bInterfaceNumber, driver_detected->name, ret ? "true" : "FALSE" );
     return ret;
   }
 
@@ -873,8 +871,8 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const * itf_
 }
 
 static void set_config_complete(uint8_t idx, uint8_t itf_offset, bool success) {
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   TU_LOG_P_CDC_BOOL("set config complete", success);
 
   if (success) {
@@ -894,22 +892,32 @@ static void set_config_complete(uint8_t idx, uint8_t itf_offset, bool success) {
   usbh_driver_set_config_complete(p_cdc->daddr, p_cdc->bInterfaceNumber + itf_offset);
 }
 
+static void cdch_process_set_config(tuh_xfer_t *xfer) {
+  const uint8_t idx = tu_u32_byte1(xfer->user_data);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
+
+  if (!serial_drivers[p_cdc->serial_drid].process_set_config(xfer)) {
+    const uint8_t itf_offset = (p_cdc->serial_drid == SERIAL_DRIVER_ACM) ? 1 : 0;
+    set_config_complete(idx, itf_offset, false);
+  }
+}
+
 bool cdch_set_config(uint8_t daddr, uint8_t itf_num) {
   tusb_control_request_t request;
   request.wIndex = tu_htole16((uint16_t) itf_num);
   uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
   TU_LOG_P_CDC("set config");
 
   // fake transfer to kick-off process_set_config()
   tuh_xfer_t xfer;
-  xfer.daddr  = daddr;
+  xfer.daddr = daddr;
   xfer.result = XFER_RESULT_SUCCESS;
-  xfer.setup  = &request;
-  xfer.user_data = 0; // initial state 0
-
-  serial_drivers[p_cdc->serial_drid].process_set_config(&xfer);
+  xfer.setup = &request;
+  xfer.user_data = PROCESS_CONFIG_STATE(idx, 0); // initial state 0
+  cdch_process_set_config(&xfer);
 
   return true;
 }
@@ -921,11 +929,11 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num) {
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, encoding
-static void acm_internal_control_complete(tuh_xfer_t * xfer) {
+static void acm_internal_control_complete(tuh_xfer_t *xfer) {
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
   TU_LOG_P_CDC_BOOL("control complete", success);
 
@@ -949,7 +957,7 @@ static void acm_internal_control_complete(tuh_xfer_t * xfer) {
   }
 }
 
-static bool acm_set_control_line_state(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->acm_capability.support_line_request);
 
   tusb_control_request_t const request = {
@@ -980,10 +988,10 @@ static bool acm_set_control_line_state(cdch_interface_t * p_cdc, tuh_xfer_cb_t c
   return true;
 }
 
-static bool acm_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool acm_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->acm_capability.support_line_request);
   TU_VERIFY((p_cdc->requested_line_coding.data_bits >= 5 && p_cdc->requested_line_coding.data_bits <= 8) ||
-             p_cdc->requested_line_coding.data_bits == 16);
+            p_cdc->requested_line_coding.data_bits == 16);
 
   tusb_control_request_t const request = {
     .bmRequestType_bit = {
@@ -998,7 +1006,7 @@ static bool acm_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete
   };
 
   // use usbh enum buf to hold line coding since user line_coding variable does not live long enough
-  uint8_t * enum_buf = usbh_get_enum_buf();
+  uint8_t *enum_buf = usbh_get_enum_buf();
   memcpy(enum_buf, &p_cdc->requested_line_coding, sizeof(cdc_line_coding_t));
 
   p_cdc->user_control_cb = complete_cb;
@@ -1017,13 +1025,13 @@ static bool acm_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete
   return true;
 }
 
-static bool acm_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool acm_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->requested_line_coding.bit_rate = p_cdc->line_coding.bit_rate;
 
   return acm_set_line_coding(p_cdc, complete_cb, user_data);
 }
 
-static bool acm_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool acm_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->requested_line_coding.stop_bits = p_cdc->line_coding.stop_bits;
   p_cdc->requested_line_coding.parity    = p_cdc->line_coding.parity;
   p_cdc->requested_line_coding.data_bits = p_cdc->line_coding.data_bits;
@@ -1036,19 +1044,19 @@ static bool acm_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb
 enum {
   CONFIG_ACM_SET_CONTROL_LINE_STATE = 0,
   CONFIG_ACM_SET_LINE_CODING,
-  CONFIG_ACM_COMPLETE,
+  CONFIG_ACM_COMPLETE
 };
 
-static bool acm_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
-  uint8_t const * p_desc_end = ((uint8_t const *) itf_desc) + max_len;
+static bool acm_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
+  uint8_t const *p_desc_end = ((uint8_t const *) itf_desc) + max_len;
 
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
   p_cdc->serial_drid = SERIAL_DRIVER_ACM;
 
   //------------- Control Interface -------------//
-  uint8_t const * p_desc = tu_desc_next(itf_desc);
+  uint8_t const *p_desc = tu_desc_next(itf_desc);
 
   // Communication Functional Descriptors
   while ((p_desc < p_desc_end) && (TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc))) {
@@ -1063,7 +1071,7 @@ static bool acm_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint
   // Open notification endpoint of control interface if any
   if (itf_desc->bNumEndpoints == 1) {
     TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(p_desc));
-    tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) p_desc;
+    tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) p_desc;
 
     TU_ASSERT(tuh_edpt_open(daddr, desc_ep));
     p_cdc->ep_notif = desc_ep->bEndpointAddress;
@@ -1084,31 +1092,31 @@ static bool acm_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint
   return true;
 }
 
-static void acm_process_config(tuh_xfer_t * xfer) {
-  uintptr_t const state = xfer->user_data;
+static bool acm_process_set_config(tuh_xfer_t *xfer) {
+  const uint8_t state = (uint8_t) xfer->user_data;
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT_COMPLETE(p_cdc && xfer->result == XFER_RESULT_SUCCESS, 1);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
   switch (state) {
     case CONFIG_ACM_SET_CONTROL_LINE_STATE:
       #ifdef LINE_CONTROL_ON_ENUM
-        if (p_cdc->acm_capability.support_line_request) {
-          p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
-          TU_ASSERT_COMPLETE(acm_set_control_line_state(p_cdc, acm_process_config, CONFIG_ACM_SET_LINE_CODING), 1);
-          break;
-        }
+      if (p_cdc->acm_capability.support_line_request) {
+        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+        TU_ASSERT(acm_set_control_line_state(p_cdc, cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_ACM_SET_LINE_CODING)));
+        break;
+      }
       #endif
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_ACM_SET_LINE_CODING:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        if (p_cdc->acm_capability.support_line_request) {
-          p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-          TU_ASSERT_COMPLETE(acm_set_line_coding(p_cdc, acm_process_config, CONFIG_ACM_COMPLETE), 1);
-          break;
-        }
+      if (p_cdc->acm_capability.support_line_request) {
+        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+        TU_ASSERT(acm_set_line_coding(p_cdc, cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_ACM_COMPLETE)));
+        break;
+      }
       #endif
       TU_ATTR_FALLTHROUGH;
 
@@ -1118,9 +1126,10 @@ static void acm_process_config(tuh_xfer_t * xfer) {
       break;
 
     default:
-      set_config_complete(idx, 1, false);
-      break;
+      return false; // invalid state
   }
+
+  return true;
 }
 
 //--------------------------------------------------------------------+
@@ -1128,14 +1137,14 @@ static void acm_process_config(tuh_xfer_t * xfer) {
 //--------------------------------------------------------------------+
 #if CFG_TUH_CDC_FTDI
 
-static bool ftdi_determine_type(cdch_interface_t * p_cdc);
-static uint32_t ftdi_get_divisor(cdch_interface_t * p_cdc);
-static uint8_t ftdi_get_idx(tuh_xfer_t * xfer);
+static bool ftdi_determine_type(cdch_interface_t *p_cdc);
+static uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc);
+static uint8_t ftdi_get_idx(tuh_xfer_t *xfer);
 
 //------------- Control Request -------------//
 
 // set request without data
-static bool ftdi_set_request(cdch_interface_t * p_cdc, uint8_t request, uint8_t requesttype,
+static bool ftdi_set_request(cdch_interface_t *p_cdc, uint8_t request, uint8_t requesttype,
                              uint16_t value, uint16_t index, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request_setup = {
     .bmRequestType = requesttype,
@@ -1167,37 +1176,36 @@ static int8_t ftdi_write_latency_timer(cdch_interface_t * p_cdc, uint16_t latenc
 }
 #endif
 
-static inline bool ftdi_sio_reset(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static inline bool ftdi_sio_reset(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ftdi_set_request(p_cdc, FTDI_SIO_RESET_REQUEST, FTDI_SIO_RESET_REQUEST_TYPE, FTDI_SIO_RESET_SIO,
                           p_cdc->ftdi.channel, complete_cb, user_data);
 }
 
-static bool ftdi_change_speed(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ftdi_change_speed(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint32_t index_value = ftdi_get_divisor(p_cdc);
   TU_VERIFY(index_value);
   uint16_t value = (uint16_t) index_value;
   uint16_t index = (uint16_t) (index_value >> 16);
   if (p_cdc->ftdi.channel) {
-    index = (uint16_t)((index << 8) | p_cdc->ftdi.channel);
+    index = (uint16_t) ((index << 8) | p_cdc->ftdi.channel);
   }
 
   return ftdi_set_request(p_cdc, FTDI_SIO_SET_BAUDRATE_REQUEST, FTDI_SIO_SET_BAUDRATE_REQUEST_TYPE,
                           value, index, complete_cb, user_data);
 }
 
-static bool ftdi_set_data_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ftdi_set_data_request(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->requested_line_coding.data_bits >= 7 && p_cdc->requested_line_coding.data_bits <= 8, 0);
-  uint16_t value = (uint16_t) (
-    (p_cdc->requested_line_coding.data_bits & 0xfUL)       |  // data bit quantity is stored in bits 0-3
-    (p_cdc->requested_line_coding.parity    & 0x7UL) <<  8 |  // parity is stored in bits 8-10, same coding
-    (p_cdc->requested_line_coding.stop_bits & 0x3UL) << 11 ); // stop bits quantity is stored in bits 11-12, same coding
-                                                                        // not each FTDI supports 1.5 stop bits
+  uint16_t value = (uint16_t) ((p_cdc->requested_line_coding.data_bits & 0xfUL) |       // data bit quantity is stored in bits 0-3
+                               (p_cdc->requested_line_coding.parity    & 0x7UL) << 8 |  // parity is stored in bits 8-10, same coding
+                               (p_cdc->requested_line_coding.stop_bits & 0x3UL) << 11); // stop bits quantity is stored in bits 11-12, same coding
+                                                                                        // not each FTDI supports 1.5 stop bits
 
   return ftdi_set_request(p_cdc, FTDI_SIO_SET_DATA_REQUEST, FTDI_SIO_SET_DATA_REQUEST_TYPE,
                           value, p_cdc->ftdi.channel, complete_cb, user_data);
 }
 
-static inline bool ftdi_update_mctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static inline bool ftdi_update_mctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint16_t value = (uint16_t) ((p_cdc->requested_line_state.dtr ? FTDI_SIO_SET_DTR_HIGH : FTDI_SIO_SET_DTR_LOW) |
                                (p_cdc->requested_line_state.rts ? FTDI_SIO_SET_RTS_HIGH : FTDI_SIO_SET_RTS_LOW));
 
@@ -1208,10 +1216,10 @@ static inline bool ftdi_update_mctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t com
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, line_coding
-static void ftdi_internal_control_complete(tuh_xfer_t * xfer) {
+static void ftdi_internal_control_complete(tuh_xfer_t *xfer) {
   uint8_t const idx = ftdi_get_idx(xfer);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
   TU_LOG_P_CDC_BOOL("control complete", success);
 
@@ -1238,24 +1246,24 @@ static void ftdi_internal_control_complete(tuh_xfer_t * xfer) {
   }
 }
 
-static bool ftdi_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ftdi_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_set_data_request(p_cdc, complete_cb ? ftdi_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static bool ftdi_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ftdi_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_change_speed(p_cdc, complete_cb ? ftdi_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static void ftdi_set_line_coding_stage1_complete(tuh_xfer_t * xfer) {
+static void ftdi_set_line_coding_stage1_complete(tuh_xfer_t *xfer) {
   uint8_t const idx = ftdi_get_idx(xfer);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   uint8_t const itf_num = p_cdc->bInterfaceNumber;
   set_line_coding_stage1_complete(xfer, itf_num,
                                   ftdi_set_data_request,           // control request function to set data format
@@ -1272,7 +1280,7 @@ static bool ftdi_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complet
                                   complete_cb, user_data);
 }
 
-static bool ftdi_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ftdi_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ftdi_update_mctrl(p_cdc, complete_cb ? ftdi_internal_control_complete : NULL, user_data));
 
@@ -1293,19 +1301,19 @@ enum {
   CONFIG_FTDI_COMPLETE
 };
 
-static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len) {
+static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
   // FTDI Interface includes 1 vendor interface + 2 bulk endpoints
   TU_VERIFY(itf_desc->bInterfaceSubClass == 0xff && itf_desc->bInterfaceProtocol == 0xff &&
             itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2 * sizeof(tusb_desc_endpoint_t) <= max_len);
 
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
   p_cdc->serial_drid = SERIAL_DRIVER_FTDI;
 
   // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
   /*
    * NOTE: Some customers have programmed FT232R/FT245R devices
@@ -1317,22 +1325,20 @@ static bool ftdi_open(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uin
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
-static void ftdi_process_config(tuh_xfer_t * xfer) {
-  uintptr_t const state = xfer->user_data;
+static bool ftdi_proccess_set_config(tuh_xfer_t *xfer) {
+  const uint8_t state = (uint8_t) xfer->user_data;
   uint8_t const idx = ftdi_get_idx(xfer);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT_COMPLETE(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
+  cdch_interface_t *p_cdc = get_itf(idx);
   uint8_t const itf_num = p_cdc->bInterfaceNumber;
+  TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
-  switch(state) {
-
+  switch (state) {
     // from here sequence overtaken from Linux Kernel function ftdi_port_probe()
     case CONFIG_FTDI_GET_DESC:
       // get device descriptor
-      p_cdc->user_control_cb = ftdi_process_config; // set once for whole process config
-      if (itf_num == 0) { // only necessary for 1st interface. other interface overtake type from interface 0
-        TU_ASSERT_COMPLETE(tuh_descriptor_get_device(xfer->daddr, &desc_dev, sizeof(tusb_desc_device_t),
-                                                     ftdi_process_config, CONFIG_FTDI_DETERMINE_TYPE));
+      if (itf_num == 0) {                          // only necessary for 1st interface. other interface overtake type from interface 0
+        TU_ASSERT(tuh_descriptor_get_device(xfer->daddr, &desc_dev, sizeof(tusb_desc_device_t),
+                                            cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_DETERMINE_TYPE)));
         break;
       }
       TU_ATTR_FALLTHROUGH;
@@ -1340,66 +1346,67 @@ static void ftdi_process_config(tuh_xfer_t * xfer) {
     case CONFIG_FTDI_DETERMINE_TYPE:
       // determine type
       if (itf_num == 0) {
-        TU_ASSERT_COMPLETE(ftdi_determine_type(p_cdc));
+        TU_ASSERT(ftdi_determine_type(p_cdc));
       } else {
         // other interfaces have same type as interface 0
         uint8_t const idx_itf0 = tuh_cdc_itf_get_index(xfer->daddr, 0);
-        cdch_interface_t const * p_cdc_itf0 = get_itf(idx_itf0);
-        TU_ASSERT_COMPLETE(p_cdc_itf0);
-        if (p_cdc_itf0) {
-         p_cdc->ftdi.chip_type = p_cdc_itf0->ftdi.chip_type;
-        }
+        cdch_interface_t const *p_cdc_itf0 = get_itf(idx_itf0);
+        TU_ASSERT(p_cdc_itf0);
+        p_cdc->ftdi.chip_type = p_cdc_itf0->ftdi.chip_type;
       }
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_FTDI_WRITE_LATENCY:
       #ifdef CFG_TUH_CDC_FTDI_LATENCY
-        int8_t result = ftdi_write_latency_timer(p_cdc, CFG_TUH_CDC_FTDI_LATENCY, ftdi_process_config,
-                                                 CONFIG_FTDI_SIO_RESET);
-        TU_ASSERT_COMPLETE(result != FTDI_FAIL);
-        if(result == FTDI_REQUESTED) {
-          break;
-        } // else FTDI_NOT_POSSIBLE => continue directly with next state
+      int8_t result = ftdi_write_latency_timer(p_cdc, CFG_TUH_CDC_FTDI_LATENCY, ftdi_process_config,
+                                               CONFIG_FTDI_SIO_RESET);
+      TU_ASSERT(result != FTDI_FAIL);
+      if (result == FTDI_REQUESTED) {
+        break;
+      }// else FTDI_NOT_POSSIBLE => continue directly with next state
       #endif
       TU_ATTR_FALLTHROUGH;
 
-    // from here sequence overtaken from Linux Kernel function ftdi_open()
+      // from here sequence overtaken from Linux Kernel function ftdi_open()
     case CONFIG_FTDI_SIO_RESET:
-      TU_ASSERT_COMPLETE(ftdi_sio_reset(p_cdc, ftdi_process_config, CONFIG_FTDI_SET_DATA));
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(ftdi_sio_reset(p_cdc, cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_SET_DATA)));
       break;
 
-    // from here sequence overtaken from Linux Kernel function ftdi_set_termios()
+      // from here sequence overtaken from Linux Kernel function ftdi_set_termios()
     case CONFIG_FTDI_SET_DATA:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT_COMPLETE(ftdi_set_data_request(p_cdc, ftdi_internal_control_complete, CONFIG_FTDI_SET_BAUDRATE));
-        break;
+      p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(ftdi_set_data_request(p_cdc, ftdi_internal_control_complete, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_SET_BAUDRATE)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_FTDI_SET_BAUDRATE:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        TU_ASSERT_COMPLETE(ftdi_change_speed(p_cdc, ftdi_internal_control_complete, CONFIG_FTDI_FLOW_CONTROL));
-        break;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(ftdi_change_speed(p_cdc, ftdi_internal_control_complete, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_FLOW_CONTROL)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_FTDI_FLOW_CONTROL:
       // disable flow control
-      TU_ASSERT_COMPLETE(ftdi_set_request(p_cdc, FTDI_SIO_SET_FLOW_CTRL_REQUEST, FTDI_SIO_SET_FLOW_CTRL_REQUEST_TYPE,
-                                          FTDI_SIO_DISABLE_FLOW_CTRL, p_cdc->ftdi.channel,
-                                          ftdi_process_config, CONFIG_FTDI_MODEM_CTRL));
+      TU_ASSERT(ftdi_set_request(p_cdc, FTDI_SIO_SET_FLOW_CTRL_REQUEST, FTDI_SIO_SET_FLOW_CTRL_REQUEST_TYPE, FTDI_SIO_DISABLE_FLOW_CTRL,
+                                 p_cdc->ftdi.channel, cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_MODEM_CTRL)));
       break;
 
     case CONFIG_FTDI_MODEM_CTRL:
       #ifdef LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
-        TU_ASSERT_COMPLETE(ftdi_update_mctrl(p_cdc, ftdi_internal_control_complete, CONFIG_FTDI_COMPLETE));
-        break;
+      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(ftdi_update_mctrl(p_cdc, ftdi_internal_control_complete, PROCESS_CONFIG_STATE(idx, CONFIG_FTDI_COMPLETE)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_FTDI_COMPLETE:
@@ -1407,15 +1414,15 @@ static void ftdi_process_config(tuh_xfer_t * xfer) {
       break;
 
     default:
-      TU_ASSERT_COMPLETE(false);
-      break;
+      return false;
   }
+
+  return true;
 }
 
 //------------- Helper -------------//
 
-static bool ftdi_determine_type(cdch_interface_t * p_cdc)
-{
+static bool ftdi_determine_type(cdch_interface_t *p_cdc) {
   uint16_t const version = desc_dev->bcdDevice;
   uint8_t const itf_num = p_cdc->bInterfaceNumber;
 
@@ -1527,28 +1534,27 @@ static bool ftdi_determine_type(cdch_interface_t * p_cdc)
 //}
 
 static uint32_t ftdi_232bm_baud_base_to_divisor(uint32_t baud, uint32_t base) {
-  uint8_t divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 };
+  uint8_t divfrac[8] = {0, 3, 2, 4, 1, 5, 6, 7};
   uint32_t divisor;
   /* divisor shifted 3 bits to the left */
   uint32_t divisor3 = DIV_ROUND_CLOSEST(base, 2 * baud);
   divisor = divisor3 >> 3;
-  divisor |= (uint32_t)divfrac[divisor3 & 0x7] << 14;
+  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
   /* Deal with special cases for highest baud rates. */
-  if (divisor == 1)   /* 1.0 */
+  if (divisor == 1) /* 1.0 */ {
     divisor = 0;
-  else if (divisor == 0x4001) /* 1.5 */
+  } else if (divisor == 0x4001) /* 1.5 */ {
     divisor = 1;
+  }
   return divisor;
 }
 
-static inline uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud)
-{
-   return ftdi_232bm_baud_base_to_divisor(baud, 48000000);
+static inline uint32_t ftdi_232bm_baud_to_divisor(uint32_t baud) {
+  return ftdi_232bm_baud_base_to_divisor(baud, 48000000);
 }
 
-static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base)
-{
-  static const unsigned char divfrac[8] = { 0, 3, 2, 4, 1, 5, 6, 7 };
+static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base) {
+  static const unsigned char divfrac[8] = {0, 3, 2, 4, 1, 5, 6, 7};
   uint32_t divisor;
   uint32_t divisor3;
 
@@ -1556,12 +1562,13 @@ static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base)
   divisor3 = DIV_ROUND_CLOSEST(8 * base, 10 * baud);
 
   divisor = divisor3 >> 3;
-  divisor |= (uint32_t)divfrac[divisor3 & 0x7] << 14;
+  divisor |= (uint32_t) divfrac[divisor3 & 0x7] << 14;
   /* Deal with special cases for highest baud rates. */
-  if (divisor == 1)   /* 1.0 */
+  if (divisor == 1) /* 1.0 */ {
     divisor = 0;
-  else if (divisor == 0x4001) /* 1.5 */
+  } else if (divisor == 0x4001) /* 1.5 */ {
     divisor = 1;
+  }
   /*
    * Set this bit to turn off a divide by 2.5 on baud rate generator
    * This enables baud rates up to 12Mbaud but cannot reach below 1200
@@ -1571,13 +1578,11 @@ static uint32_t ftdi_2232h_baud_base_to_divisor(uint32_t baud, uint32_t base)
   return divisor;
 }
 
-static inline uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud)
-{
-   return ftdi_2232h_baud_base_to_divisor(baud, (uint32_t) 120000000);
+static inline uint32_t ftdi_2232h_baud_to_divisor(uint32_t baud) {
+  return ftdi_2232h_baud_base_to_divisor(baud, (uint32_t) 120000000);
 }
 
-static inline uint32_t ftdi_get_divisor(cdch_interface_t * p_cdc)
-{
+static inline uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc) {
   uint32_t baud = p_cdc->requested_line_coding.bit_rate;
   uint32_t div_value = 0;
   TU_VERIFY(baud);
@@ -1646,13 +1651,13 @@ static inline uint32_t ftdi_get_divisor(cdch_interface_t * p_cdc)
   return div_value;
 }
 
-static uint8_t ftdi_get_idx(tuh_xfer_t * xfer) {
-  uint8_t const channel = (uint8_t) tu_le16toh(xfer->setup->wIndex); // channel index, or 0 for legacy types
+static uint8_t ftdi_get_idx(tuh_xfer_t *xfer) {
+  uint8_t const channel = (uint8_t) tu_le16toh(xfer->setup->wIndex);// channel index, or 0 for legacy types
   for (uint8_t i = 0; i < CFG_TUH_CDC; i++) {
-    const cdch_interface_t * p_cdc = &cdch_data[i];
+    const cdch_interface_t *p_cdc = &cdch_data[i];
     if (p_cdc->daddr == xfer->daddr &&
         (!p_cdc->ftdi.channel ||           // 0 for legacy types (only interface 0)
-        channel == p_cdc->ftdi.channel)) { // or  multi-channel types (interfaces 0..n)
+         channel == p_cdc->ftdi.channel)) {// or  multi-channel types (interfaces 0..n)
       return i;
     }
   }
@@ -1703,29 +1708,28 @@ static bool cp210x_set_request(cdch_interface_t * p_cdc, uint8_t command, uint16
   return tuh_control_xfer(&xfer);
 }
 
-static inline bool cp210x_ifc_enable(cdch_interface_t * p_cdc, uint16_t enabled,
+static inline bool cp210x_ifc_enable(cdch_interface_t *p_cdc, uint16_t enabled,
                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return cp210x_set_request(p_cdc, CP210X_IFC_ENABLE, enabled, NULL, 0, complete_cb, user_data);
 }
 
-static bool cp210x_set_baudrate_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_baudrate_request(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // Not every baud rate is supported. See datasheets and AN205 "CP210x Baud Rate Support"
   uint32_t baud_le = tu_htole32(p_cdc->requested_line_coding.bit_rate);
 
   return cp210x_set_request(p_cdc, CP210X_SET_BAUDRATE, 0, (uint8_t *) &baud_le, 4, complete_cb, user_data);
 }
 
-static bool cp210x_set_line_ctl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_line_ctl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   TU_VERIFY(p_cdc->requested_line_coding.data_bits >= 5 && p_cdc->requested_line_coding.data_bits <= 8, 0);
-  uint16_t lcr = (uint16_t) (
-    (p_cdc->requested_line_coding.data_bits & 0xfUL) << 8 | // data bit quantity is stored in bits 8-11
-    (p_cdc->requested_line_coding.parity    & 0xfUL) << 4 | // parity is stored in bits 4-7, same coding
-    (p_cdc->requested_line_coding.stop_bits & 0xfUL));      // parity is stored in bits 0-3, same coding
+  uint16_t lcr = (uint16_t) ((p_cdc->requested_line_coding.data_bits & 0xfUL) << 8 | // data bit quantity is stored in bits 8-11
+                             (p_cdc->requested_line_coding.parity    & 0xfUL) << 4 | // parity is stored in bits 4-7, same coding
+                             (p_cdc->requested_line_coding.stop_bits & 0xfUL));      // parity is stored in bits 0-3, same coding
 
   return cp210x_set_request(p_cdc, CP210X_SET_LINE_CTL, lcr, NULL, 0, complete_cb, user_data);
 }
 
-static inline bool cp210x_set_mhs(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static inline bool cp210x_set_mhs(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // CP210x has the same bit coding
   return cp210x_set_request(p_cdc, CP210X_SET_MHS,
                             (uint16_t) (CP210X_CONTROL_WRITE_DTR | CP210X_CONTROL_WRITE_RTS |
@@ -1736,16 +1740,16 @@ static inline bool cp210x_set_mhs(cdch_interface_t * p_cdc, tuh_xfer_cb_t comple
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, encoding
-static void cp210x_internal_control_complete(tuh_xfer_t * xfer) {
+static void cp210x_internal_control_complete(tuh_xfer_t *xfer) {
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
   TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
-    switch(xfer->setup->bRequest) {
+    switch (xfer->setup->bRequest) {
       case CP210X_SET_MHS:
         p_cdc->line_state = p_cdc->requested_line_state;
         break;
@@ -1770,21 +1774,21 @@ static void cp210x_internal_control_complete(tuh_xfer_t * xfer) {
   }
 }
 
-static bool cp210x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(cp210x_set_baudrate_request(p_cdc, complete_cb ? cp210x_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static bool cp210x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(cp210x_set_line_ctl(p_cdc, complete_cb ? cp210x_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static void cp210x_set_line_coding_stage1_complete(tuh_xfer_t * xfer) {
+static void cp210x_set_line_coding_stage1_complete(tuh_xfer_t *xfer) {
   uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
   set_line_coding_stage1_complete(xfer, itf_num,
                                   cp210x_set_line_ctl,               // control request function to set data format
@@ -1792,7 +1796,7 @@ static void cp210x_set_line_coding_stage1_complete(tuh_xfer_t * xfer) {
 }
 
 // 2 stages: set baudrate (stage1) + set data format (stage2)
-static bool cp210x_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return set_line_coding_sequence(p_cdc,
                                   cp210x_set_baudrate_request,            // control request function to set baudrate
                                   cp210x_set_line_ctl,                    // control request function to set data format
@@ -1801,7 +1805,7 @@ static bool cp210x_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t compl
                                   complete_cb, user_data);
 }
 
-static bool cp210x_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool cp210x_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(cp210x_set_mhs(p_cdc, complete_cb ? cp210x_internal_control_complete : NULL, user_data));
 
@@ -1818,64 +1822,66 @@ enum {
   CONFIG_CP210X_COMPLETE
 };
 
-static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
+static bool cp210x_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
   // CP210x Interface includes 1 vendor interface + 2 bulk endpoints
   TU_VERIFY(itf_desc->bInterfaceSubClass == 0 && itf_desc->bInterfaceProtocol == 0 && itf_desc->bNumEndpoints == 2);
-  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2*sizeof(tusb_desc_endpoint_t) <= max_len);
+  TU_VERIFY(sizeof(tusb_desc_interface_t) + 2 * sizeof(tusb_desc_endpoint_t) <= max_len);
 
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
   p_cdc->serial_drid = SERIAL_DRIVER_CP210X;
 
   // endpoint pair
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
   // data endpoints expected to be in pairs
   return open_ep_stream_pair(p_cdc, desc_ep);
 }
 
-static void cp210x_process_config(tuh_xfer_t * xfer) {
-  uintptr_t const state   = xfer->user_data;
-  uint8_t const   itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
-  uint8_t const   idx     = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
+static bool cp210x_process_set_config(tuh_xfer_t *xfer) {
+  const uint8_t state = (uint8_t) xfer->user_data;
+  uint8_t const itf_num = (uint8_t) tu_le16toh(xfer->setup->wIndex);
+  uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
   cdch_interface_t *p_cdc = get_itf(idx);
-  TU_ASSERT_COMPLETE(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
+  TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
   switch (state) {
     case CONFIG_CP210X_IFC_ENABLE:
-      p_cdc->user_control_cb = cp210x_process_config; // set once for whole process config
-      TU_ASSERT_COMPLETE(cp210x_ifc_enable(p_cdc, CP210X_UART_ENABLE, cp210x_process_config,
-                                           CONFIG_CP210X_SET_BAUDRATE_REQUEST));
+      TU_ASSERT(cp210x_ifc_enable(p_cdc, CP210X_UART_ENABLE, cdch_process_set_config,
+                                  PROCESS_CONFIG_STATE(idx, CONFIG_CP210X_SET_BAUDRATE_REQUEST)));
       break;
 
     case CONFIG_CP210X_SET_BAUDRATE_REQUEST:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT_COMPLETE(cp210x_set_baudrate_request(p_cdc, cp210x_internal_control_complete,
-                                                       CONFIG_CP210X_SET_LINE_CTL));
-        break;
+      p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(cp210x_set_baudrate_request(p_cdc, cp210x_internal_control_complete,
+                                            PROCESS_CONFIG_STATE(idx, CONFIG_CP210X_SET_LINE_CTL)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_CP210X_SET_LINE_CTL:
       #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        TU_ASSERT_COMPLETE(cp210x_set_line_ctl(p_cdc, cp210x_internal_control_complete,
-                                               CONFIG_CP210X_SET_DTR_RTS));
-        break;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(cp210x_set_line_ctl(p_cdc, cp210x_internal_control_complete,
+                                    PROCESS_CONFIG_STATE(idx, CONFIG_CP210X_SET_DTR_RTS)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_CP210X_SET_DTR_RTS:
       #ifdef LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
-        TU_ASSERT_COMPLETE(cp210x_set_mhs(p_cdc, cp210x_internal_control_complete,
-                                          CONFIG_CP210X_COMPLETE));
-        break;
+      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(cp210x_set_mhs(p_cdc, cp210x_internal_control_complete,
+                               PROCESS_CONFIG_STATE(idx, CONFIG_CP210X_COMPLETE)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_CP210X_COMPLETE:
@@ -1883,9 +1889,10 @@ static void cp210x_process_config(tuh_xfer_t * xfer) {
       break;
 
     default:
-      TU_ASSERT_COMPLETE(false);
-      break;
+      return false;
   }
+
+  return true;
 }
 
 #endif
@@ -1896,13 +1903,13 @@ static void cp210x_process_config(tuh_xfer_t * xfer) {
 
 #if CFG_TUH_CDC_CH34X
 
-static uint8_t ch34x_get_lcr(cdch_interface_t * p_cdc);
-static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t * p_cdc);
+static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc);
+static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t *p_cdc);
 
 //------------- Control Request -------------//
 
-static bool ch34x_set_request(cdch_interface_t * p_cdc, uint8_t direction, uint8_t request,
-                              uint16_t value, uint16_t index, uint8_t * buffer, uint16_t length,
+static bool ch34x_set_request(cdch_interface_t *p_cdc, uint8_t direction, uint8_t request,
+                              uint16_t value, uint16_t index, uint8_t *buffer, uint16_t length,
                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request_setup = {
       .bmRequestType_bit = {
@@ -1917,7 +1924,7 @@ static bool ch34x_set_request(cdch_interface_t * p_cdc, uint8_t direction, uint8
   };
 
   // use usbh enum buf since application variable does not live long enough
-  uint8_t * enum_buf = NULL;
+  uint8_t *enum_buf = NULL;
 
   if (buffer && length > 0) {
     enum_buf = usbh_get_enum_buf();
@@ -1938,18 +1945,18 @@ static bool ch34x_set_request(cdch_interface_t * p_cdc, uint8_t direction, uint8
   return tuh_control_xfer(&xfer);
 }
 
-static inline bool ch34x_control_out(cdch_interface_t * p_cdc, uint8_t request, uint16_t value, uint16_t index,
+static inline bool ch34x_control_out(cdch_interface_t *p_cdc, uint8_t request, uint16_t value, uint16_t index,
                                      tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_set_request(p_cdc, TUSB_DIR_OUT, request, value, index, NULL, 0, complete_cb, user_data);
 }
 
-static inline bool ch34x_control_in(cdch_interface_t * p_cdc, uint8_t request, uint16_t value, uint16_t index,
-                                    uint8_t * buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static inline bool ch34x_control_in(cdch_interface_t *p_cdc, uint8_t request, uint16_t value, uint16_t index,
+                                    uint8_t *buffer, uint16_t buffersize, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_set_request(p_cdc, TUSB_DIR_IN, request, value, index, buffer, buffersize,
                            complete_cb, user_data);
 }
 
-static inline bool ch34x_write_reg(cdch_interface_t * p_cdc, uint16_t reg, uint16_t reg_value,
+static inline bool ch34x_write_reg(cdch_interface_t *p_cdc, uint16_t reg, uint16_t reg_value,
                                    tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return ch34x_control_out(p_cdc, CH34X_REQ_WRITE_REG, reg, reg_value, complete_cb, user_data);
 }
@@ -1960,36 +1967,33 @@ static inline bool ch34x_write_reg(cdch_interface_t * p_cdc, uint16_t reg, uint1
 //  return ch34x_control_in ( p_cdc, CH34X_REQ_READ_REG, reg, 0, buffer, buffersize, complete_cb, user_data );
 //}
 
-static bool ch34x_write_reg_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ch34x_write_reg_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint8_t const lcr = ch34x_get_lcr(p_cdc);
   TU_VERIFY(lcr);
-
   return ch34x_write_reg(p_cdc, CH32X_REG16_LCR2_LCR, lcr, complete_cb, user_data);
 }
 
-static bool ch34x_write_reg_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ch34x_write_reg_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint16_t const div_ps = ch34x_get_divisor_prescaler(p_cdc);
   TU_VERIFY(div_ps);
-
   return ch34x_write_reg(p_cdc, CH34X_REG16_DIVISOR_PRESCALER, div_ps, complete_cb, user_data);
 }
 
-static bool ch34x_modem_ctrl_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  uint8_t control = ~((p_cdc->requested_line_state.rts ? CH34X_BIT_RTS : 0) | // CH34x signals are inverted
+static bool ch34x_modem_ctrl_request(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t control = ~((p_cdc->requested_line_state.rts ? CH34X_BIT_RTS : 0) |// CH34x signals are inverted
                       (p_cdc->requested_line_state.dtr ? CH34X_BIT_DTR : 0));
-
   return ch34x_control_out(p_cdc, CH34X_REQ_MODEM_CTRL, control, 0, complete_cb, user_data);
 }
 
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, encoding
-static void ch34x_internal_control_complete(tuh_xfer_t * xfer) {
+static void ch34x_internal_control_complete(tuh_xfer_t *xfer) {
   // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uint8_t const itf_num = 0;
   uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
   TU_LOG_P_CDC_BOOL("control complete", success);
 
@@ -2028,21 +2032,21 @@ static void ch34x_internal_control_complete(tuh_xfer_t * xfer) {
   }
 }
 
-static bool ch34x_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ch34x_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ch34x_write_reg_data_format(p_cdc, complete_cb ? ch34x_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static bool ch34x_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool ch34x_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(ch34x_write_reg_baudrate(p_cdc, complete_cb ? ch34x_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static void ch34x_set_line_coding_stage1_complete(tuh_xfer_t * xfer) {
+static void ch34x_set_line_coding_stage1_complete(tuh_xfer_t *xfer) {
   // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uint8_t const itf_num = 0;
   set_line_coding_stage1_complete(xfer, itf_num,
@@ -2103,20 +2107,19 @@ static bool ch34x_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, ui
   return true;
 }
 
-static void ch34x_process_config(tuh_xfer_t* xfer) {
-  uintptr_t const state = xfer->user_data;
-  // CH34x has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
-  uint8_t const itf_num = 0;
+static bool ch34x_process_set_config(tuh_xfer_t *xfer) {
+  const uint8_t state = (uint8_t) xfer->user_data;
+  uint8_t const itf_num = 0; // CH34x has only interface 0, since wIndex is used as payload
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT_COMPLETE(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
-  uint8_t buffer[2]; // TODO remove
+  cdch_interface_t *p_cdc = get_itf(idx);
+  uint8_t buffer[2];// TODO remove
+
+  TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
   switch (state) {
     case CONFIG_CH34X_READ_VERSION:
-      p_cdc->user_control_cb = ch34x_process_config; // set once for whole process config
-      TU_ASSERT_COMPLETE(ch34x_control_in(p_cdc, CH34X_REQ_READ_VERSION, 0, 0, buffer, 2,
-                                          ch34x_process_config, CONFIG_CH34X_SERIAL_INIT));
+      TU_ASSERT(ch34x_control_in(p_cdc, CH34X_REQ_READ_VERSION, 0, 0, buffer, 2,
+                                 cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_CH34X_SERIAL_INIT)));
       break;
 
     case CONFIG_CH34X_SERIAL_INIT: {
@@ -2125,39 +2128,39 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
       TU_LOG_P_CDC("Chip Version = 0x%02x", version);
       // only versions >= 0x30 are tested, below 0x30 seems having other programming
       // see drivers from WCH vendor, Linux kernel and FreeBSD
-      TU_ASSERT_COMPLETE(version >= 0x30);
-      // init CH34x with line coding
-      p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
-      uint16_t const div_ps = ch34x_get_divisor_prescaler(p_cdc);
-      TU_ASSERT_COMPLETE(div_ps);
-      uint8_t const lcr = ch34x_get_lcr(p_cdc);
-      TU_ASSERT_COMPLETE(lcr);
-      TU_ASSERT_COMPLETE(ch34x_control_out(p_cdc, CH34X_REQ_SERIAL_INIT, tu_u16(lcr, 0x9c), div_ps,
-                                           ch34x_process_config, CONFIG_CH34X_SPECIAL_REG_WRITE));
+      if (version >= 0x30) {
+        // init CH34x with line coding
+        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
+        uint16_t const div_ps = ch34x_get_divisor_prescaler(p_cdc);
+        uint8_t const lcr = ch34x_get_lcr(p_cdc);
+        TU_ASSERT(div_ps != 0 && lcr != 0);
+        TU_ASSERT(ch34x_control_out(p_cdc, CH34X_REQ_SERIAL_INIT, tu_u16(lcr, 0x9c), div_ps,
+                                    cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_CH34X_SPECIAL_REG_WRITE)));
+      }
       break;
     }
 
     case CONFIG_CH34X_SPECIAL_REG_WRITE:
       // overtake line coding and do special reg write, purpose unknown, overtaken from WCH driver
       p_cdc->line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM_CH34X;
-      TU_ASSERT_COMPLETE(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x0F, CH341_REG_0x2C), 0x0007,
-                                         ch34x_process_config, CONFIG_CH34X_FLOW_CONTROL));
+      TU_ASSERT(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x0F, CH341_REG_0x2C), 0x0007,
+                                cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_CH34X_FLOW_CONTROL)));
       break;
 
     case CONFIG_CH34X_FLOW_CONTROL:
       // no hardware flow control
-      TU_ASSERT_COMPLETE(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x27, CH341_REG_0x27), 0x0000,
-                                         ch34x_process_config, CONFIG_CH34X_MODEM_CONTROL));
+      TU_ASSERT(ch34x_write_reg(p_cdc, TU_U16(CH341_REG_0x27, CH341_REG_0x27), 0x0000,
+                                cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_CH34X_MODEM_CONTROL)));
       break;
 
     case CONFIG_CH34X_MODEM_CONTROL:
       #ifdef LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
-        TU_ASSERT_COMPLETE(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete,
-                                                    CONFIG_CH34X_COMPLETE));
-        break;
+      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      p_cdc->user_control_cb = cdch_process_set_config;
+      TU_ASSERT(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete, PROCESS_CONFIG_STATE(idx, CONFIG_CH34X_COMPLETE)));
+      break;
       #else
-        TU_ATTR_FALLTHROUGH;
+      TU_ATTR_FALLTHROUGH;
       #endif
 
     case CONFIG_CH34X_COMPLETE:
@@ -2165,15 +2168,16 @@ static void ch34x_process_config(tuh_xfer_t* xfer) {
       break;
 
     default:
-      TU_ASSERT_COMPLETE(false);
       break;
   }
+
+  return true;
 }
 
 //------------- Helper -------------//
 
 // calculate divisor and prescaler for baudrate, return it as 16-bit combined value
-static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t * p_cdc) {
+static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t *p_cdc) {
   uint32_t const baval = p_cdc->requested_line_coding.bit_rate;
   uint8_t a;
   uint8_t b;
@@ -2219,20 +2223,20 @@ static uint16_t ch34x_get_divisor_prescaler(cdch_interface_t * p_cdc) {
   // reg divisor = a, reg prescaler = b
   // According to linux code we need to set bit 7 of UCHCOM_REG_BPS_PRE,
   // otherwise the chip will buffer data.
-  return (uint16_t) ((uint16_t)a << 8 | 0x80 | b);
+  return (uint16_t) ((uint16_t) a << 8 | 0x80 | b);
 }
 
 // calculate lcr value from data coding
-static uint8_t ch34x_get_lcr(cdch_interface_t * p_cdc) {
+static uint8_t ch34x_get_lcr(cdch_interface_t *p_cdc) {
   uint8_t const stop_bits = p_cdc->requested_line_coding.stop_bits;
-  uint8_t const parity    = p_cdc->requested_line_coding.parity;
+  uint8_t const parity = p_cdc->requested_line_coding.parity;
   uint8_t const data_bits = p_cdc->requested_line_coding.data_bits;
 
   uint8_t lcr = CH34X_LCR_ENABLE_RX | CH34X_LCR_ENABLE_TX;
   TU_VERIFY(data_bits >= 5 && data_bits <= 8);
   lcr |= (uint8_t) (data_bits - 5);
 
-  switch(parity) {
+  switch (parity) {
     case CDC_LINE_CODING_PARITY_NONE:
       break;
 
@@ -2271,14 +2275,13 @@ static uint8_t ch34x_get_lcr(cdch_interface_t * p_cdc) {
 //--------------------------------------------------------------------+
 #if CFG_TUH_CDC_PL2303
 
-static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t step,
+static int8_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step,
                                  tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-static bool pl2303_encode_baud_rate(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]);
+static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]);
 
 //------------- Control Request -------------//
-
-static bool pl2303_set_request(cdch_interface_t * p_cdc, uint8_t request, uint8_t requesttype,
-                               uint16_t value, uint16_t index, uint8_t * buffer, uint16_t length,
+static bool pl2303_set_request(cdch_interface_t *p_cdc, uint8_t request, uint8_t requesttype,
+                               uint16_t value, uint16_t index, uint8_t *buffer, uint16_t length,
                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   tusb_control_request_t const request_setup = {
     .bmRequestType = requesttype,
@@ -2289,7 +2292,7 @@ static bool pl2303_set_request(cdch_interface_t * p_cdc, uint8_t request, uint8_
   };
 
   // use usbh enum buf since application variable does not live long enough
-  uint8_t * enum_buf = NULL;
+  uint8_t *enum_buf = NULL;
 
   if (buffer && length > 0) {
     enum_buf = usbh_get_enum_buf();
@@ -2310,34 +2313,28 @@ static bool pl2303_set_request(cdch_interface_t * p_cdc, uint8_t request, uint8_
   return tuh_control_xfer(&xfer);
 }
 
-static bool pl2303_vendor_read(cdch_interface_t * p_cdc, uint16_t value, uint8_t * buf,
-                               tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ?
-                    PL2303_VENDOR_READ_NREQUEST : PL2303_VENDOR_READ_REQUEST;
+static bool pl2303_vendor_read(cdch_interface_t *p_cdc, uint16_t value, uint8_t *buf,
+                               tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ? PL2303_VENDOR_READ_NREQUEST : PL2303_VENDOR_READ_REQUEST;
 
   return pl2303_set_request(p_cdc, request, PL2303_VENDOR_READ_REQUEST_TYPE, value, 0, buf, 1, complete_cb, user_data);
 }
 
-static bool pl2303_vendor_write(cdch_interface_t * p_cdc, uint16_t value, uint16_t index,
-                                tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
-  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ?
-                    PL2303_VENDOR_WRITE_NREQUEST : PL2303_VENDOR_WRITE_REQUEST;
+static bool pl2303_vendor_write(cdch_interface_t *p_cdc, uint16_t value, uint16_t index,
+                                tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+  uint8_t request = p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN] ? PL2303_VENDOR_WRITE_NREQUEST : PL2303_VENDOR_WRITE_REQUEST;
 
   return pl2303_set_request(p_cdc, request, PL2303_VENDOR_WRITE_REQUEST_TYPE, value, index, NULL, 0, complete_cb, user_data);
 }
 
-static inline bool pl2303_supports_hx_status(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
+static inline bool pl2303_supports_hx_status(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   uint8_t buf = 0;
 
   return pl2303_set_request(p_cdc, PL2303_VENDOR_READ_REQUEST, PL2303_VENDOR_READ_REQUEST_TYPE, PL2303_READ_TYPE_HX_STATUS, 0,
                             &buf, 1, complete_cb, user_data);
 }
 
-static inline bool pl2303_set_control_lines(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
+static inline bool pl2303_set_control_lines(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // PL2303 has the same bit coding
   return pl2303_set_request(p_cdc, PL2303_SET_CONTROL_REQUEST, PL2303_SET_CONTROL_REQUEST_TYPE,
                             p_cdc->requested_line_state.all, 0, NULL, 0, complete_cb, user_data);
@@ -2348,7 +2345,7 @@ static inline bool pl2303_set_control_lines(cdch_interface_t * p_cdc, tuh_xfer_c
 //  return pl2303_set_request(p_cdc, PL2303_GET_LINE_REQUEST, PL2303_GET_LINE_REQUEST_TYPE, 0, 0, buf, PL2303_LINE_CODING_BUFSIZE);
 //}
 
-static bool pl2303_set_line_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool pl2303_set_line_request(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // the caller has to precheck, that the new line coding different than the current, else false returned
   uint8_t buf[PL2303_LINE_CODING_BUFSIZE];
   /*
@@ -2390,8 +2387,7 @@ static bool pl2303_set_line_request(cdch_interface_t * p_cdc, tuh_xfer_cb_t comp
 //  return pl2303_set_request(p_cdc, PL2303_BREAK_REQUEST, PL2303_BREAK_REQUEST_TYPE, state, 0, NULL, 0);
 //}
 
-static inline int pl2303_clear_halt(cdch_interface_t * p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data)
-{
+static inline int pl2303_clear_halt(cdch_interface_t *p_cdc, uint8_t endp, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   /* we don't care if it wasn't halted first. in fact some devices
    * (like some ibmcam model 1 units) seem to expect hosts to make
    * this request for iso endpoints, which can't halt!
@@ -2403,22 +2399,22 @@ static inline int pl2303_clear_halt(cdch_interface_t * p_cdc, uint8_t endp, tuh_
 //------------- Driver API -------------//
 
 // internal control complete to update state such as line state, encoding
-static void pl2303_internal_control_complete(tuh_xfer_t * xfer) {
+static void pl2303_internal_control_complete(tuh_xfer_t *xfer) {
   // PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uint8_t const itf_num = 0;
   uint8_t idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
-  TU_ASSERT(p_cdc,);
+  cdch_interface_t *p_cdc = get_itf(idx);
+  TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
   TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     if (xfer->setup->bRequest == PL2303_SET_LINE_REQUEST &&
-         xfer->setup->bmRequestType == PL2303_SET_LINE_REQUEST_TYPE) {
+        xfer->setup->bmRequestType == PL2303_SET_LINE_REQUEST_TYPE) {
       p_cdc->line_coding = p_cdc->requested_line_coding;
     }
     if (xfer->setup->bRequest == PL2303_SET_CONTROL_REQUEST &&
-         xfer->setup->bmRequestType == PL2303_SET_CONTROL_REQUEST_TYPE) {
+        xfer->setup->bmRequestType == PL2303_SET_CONTROL_REQUEST_TYPE) {
       p_cdc->line_state = p_cdc->requested_line_state;
     }
   }
@@ -2429,14 +2425,14 @@ static void pl2303_internal_control_complete(tuh_xfer_t * xfer) {
   }
 }
 
-static bool pl2303_set_line_coding(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool pl2303_set_line_coding(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(pl2303_set_line_request(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
 
   return true;
 }
 
-static bool pl2303_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool pl2303_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->requested_line_coding.bit_rate = p_cdc->line_coding.bit_rate;
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(pl2303_set_line_request(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
@@ -2444,7 +2440,7 @@ static bool pl2303_set_data_format(cdch_interface_t * p_cdc, tuh_xfer_cb_t compl
   return true;
 }
 
-static bool pl2303_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool pl2303_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->requested_line_coding.stop_bits = p_cdc->line_coding.stop_bits;
   p_cdc->requested_line_coding.parity    = p_cdc->line_coding.parity;
   p_cdc->requested_line_coding.data_bits = p_cdc->line_coding.data_bits;
@@ -2454,7 +2450,7 @@ static bool pl2303_set_baudrate(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete
   return true;
 }
 
-static bool pl2303_set_modem_ctrl(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+static bool pl2303_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // PL2303 has the same bit coding
   p_cdc->user_control_cb = complete_cb;
   TU_ASSERT(pl2303_set_control_lines(p_cdc, complete_cb ? pl2303_internal_control_complete : NULL, user_data));
@@ -2487,19 +2483,19 @@ enum {
   CONFIG_PL2303_COMPLETE
 };
 
-static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, uint16_t max_len) {
+static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const *itf_desc, uint16_t max_len) {
   // PL2303 Interface includes 1 vendor interface + 1 interrupt endpoints + 2 bulk
   TU_VERIFY(itf_desc->bNumEndpoints == 3);
   TU_VERIFY(sizeof(tusb_desc_interface_t) + 3 * sizeof(tusb_desc_endpoint_t) <= max_len);
 
-  cdch_interface_t * p_cdc = make_new_itf(daddr, itf_desc);
+  cdch_interface_t *p_cdc = make_new_itf(daddr, itf_desc);
   TU_VERIFY(p_cdc);
 
   p_cdc->serial_drid = SERIAL_DRIVER_PL2303;
   p_cdc->pl2303.serial_private.quirks = 0;
   p_cdc->pl2303.supports_hx_status = false;
 
-  tusb_desc_endpoint_t const * desc_ep = (tusb_desc_endpoint_t const * ) tu_desc_next(itf_desc);
+  tusb_desc_endpoint_t const *desc_ep = (tusb_desc_endpoint_t const *) tu_desc_next(itf_desc);
 
   // Interrupt endpoint: not used for now
   TU_ASSERT(TUSB_DESC_ENDPOINT == tu_desc_type(desc_ep) &&
@@ -2514,158 +2510,167 @@ static bool pl2303_open(uint8_t daddr, tusb_desc_interface_t const * itf_desc, u
   return true;
 }
 
-static void pl2303_process_config(tuh_xfer_t * xfer) {
-  uintptr_t const state = xfer->user_data;
+static bool pl2303_process_set_config(tuh_xfer_t *xfer) {
+  const uint8_t state = (uint8_t) xfer->user_data;
   // PL2303 has only interface 0, because wIndex is used as payload and not for bInterfaceNumber
   uint8_t const itf_num = 0;
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
-  cdch_interface_t * p_cdc = get_itf(idx);
+  cdch_interface_t *p_cdc = get_itf(idx);
   // state CONFIG_PL2303_READ1 may have no success due to expected stall by pl2303_supports_hx_status()
-  TU_ASSERT_COMPLETE(p_cdc && (xfer->result == XFER_RESULT_SUCCESS || xfer->user_data == CONFIG_PL2303_READ1));
   uint8_t buf = 0;
   int8_t type;
 
+  TU_ASSERT(p_cdc && (xfer->result == XFER_RESULT_SUCCESS || xfer->user_data == CONFIG_PL2303_READ1));
   switch (state) {
-
     // from here sequence overtaken from Linux Kernel function pl2303_startup()
     case CONFIG_PL2303_GET_DESC:
-      p_cdc->user_control_cb = pl2303_process_config; // set once for whole process config
+      p_cdc->user_control_cb = cdch_process_set_config;// set once for whole process config
       // get device descriptor
-      TU_ASSERT_COMPLETE(tuh_descriptor_get_device(xfer->daddr, &desc_dev, sizeof(tusb_desc_device_t),
-                                                   pl2303_process_config, CONFIG_PL2303_DETECT_TYPE));
+      TU_ASSERT(tuh_descriptor_get_device(xfer->daddr, &desc_dev, sizeof(tusb_desc_device_t),
+                                          cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_DETECT_TYPE)));
       break;
 
     case CONFIG_PL2303_DETECT_TYPE:
       // get type and quirks (step 1)
-      type = pl2303_detect_type (p_cdc, 1, pl2303_process_config, CONFIG_PL2303_READ1); // step 1
-      TU_ASSERT_COMPLETE(type!=PL2303_DETECT_TYPE_FAILED);
+      type = pl2303_detect_type(p_cdc, 1, cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ1));
+      TU_ASSERT(type != PL2303_DETECT_TYPE_FAILED);
       if (type == PL2303_SUPPORTS_HX_STATUS_TRIGGERED) {
         break;
-      } // else: no transfer triggered and continue with CONFIG_PL2303_READ1
+      }// else: no transfer triggered and continue with CONFIG_PL2303_READ1
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ1:
       // get supports_hx_status, type and quirks (step 2), do special read
-      p_cdc->pl2303.supports_hx_status = ( // will not be true, if coming directly from previous case
-                                           xfer->user_data == CONFIG_PL2303_READ1 && xfer->result == XFER_RESULT_SUCCESS );
-      type = pl2303_detect_type (p_cdc, 2, NULL, 0); // step 2 now with supports_hx_status
-      TU_ASSERT_COMPLETE(type!=PL2303_DETECT_TYPE_FAILED);
+      p_cdc->pl2303.supports_hx_status = (// will not be true, if coming directly from previous case
+          xfer->user_data == CONFIG_PL2303_READ1 && xfer->result == XFER_RESULT_SUCCESS);
+      type = pl2303_detect_type(p_cdc, 2, NULL, 0); // step 2 now with supports_hx_status
+      TU_ASSERT(type != PL2303_DETECT_TYPE_FAILED);
       p_cdc->pl2303.serial_private.type = &pl2303_type_data[type];
       p_cdc->pl2303.serial_private.quirks |= p_cdc->pl2303.serial_private.type->quirks;
-      #if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL && 0 // can be activated if necessary
-        TU_LOG_P_CDC("bDeviceClass = 0x%02x bMaxPacketSize0 = %u bcdUSB = 0x%04x bcdDevice = 0x%04x",
-                     desc_dev->bDeviceClass, desc_dev->bMaxPacketSize0,
-                     desc_dev->bcdUSB, desc_dev->bcdDevice );
-        uint16_t vid, pid;
-        TU_ASSERT_COMPLETE(tuh_vid_pid_get(p_cdc->daddr, &vid, &pid));
-        TU_LOG_P_CDC("vid = 0x%04x pid = 0x%04x supports_hx_status = %u type = %s quirks = %u",
-                     vid, pid, p_cdc->pl2303.supports_hx_status,
-                     p_cdc->pl2303.serial_private.type->name, p_cdc->pl2303.serial_private.quirks);
+      #if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL && 0// can be activated if necessary
+      TU_LOG_P_CDC("bDeviceClass = 0x%02x bMaxPacketSize0 = %u bcdUSB = 0x%04x bcdDevice = 0x%04x",
+                   desc_dev->bDeviceClass, desc_dev->bMaxPacketSize0,
+                   desc_dev->bcdUSB, desc_dev->bcdDevice);
+      uint16_t vid, pid;
+      TU_ASSERT(tuh_vid_pid_get(p_cdc->daddr, &vid, &pid));
+      TU_LOG_P_CDC("vid = 0x%04x pid = 0x%04x supports_hx_status = %u type = %s quirks = %u",
+                   vid, pid, p_cdc->pl2303.supports_hx_status,
+                   p_cdc->pl2303.serial_private.type->name, p_cdc->pl2303.serial_private.quirks);
       #endif
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_WRITE1));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_WRITE1)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_WRITE1:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0x0404, 0, pl2303_process_config, CONFIG_PL2303_READ2));
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0x0404, 0,
+                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ2)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ2:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_READ3));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ3)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ3:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8383, &buf, pl2303_process_config, CONFIG_PL2303_READ4));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8383, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ4)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ4:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_WRITE2));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_WRITE2)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_WRITE2:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0x0404, 1, pl2303_process_config, CONFIG_PL2303_READ5));
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0x0404, 1,
+                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ5)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ5:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8484, &buf, pl2303_process_config, CONFIG_PL2303_READ6));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8484, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_READ6)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_READ6:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0x8383, &buf, pl2303_process_config, CONFIG_PL2303_WRITE3));
+        TU_ASSERT(pl2303_vendor_read(p_cdc, 0x8383, &buf,
+                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_WRITE3)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_WRITE3:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0, 1, pl2303_process_config, CONFIG_PL2303_WRITE4));
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 0, 1,
+                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_WRITE4)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_WRITE4:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 1, 0, pl2303_process_config, CONFIG_PL2303_WRITE5));
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 1, 0,
+                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_WRITE5)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
     case CONFIG_PL2303_WRITE5:
       // purpose unknown, overtaken from Linux Kernel driver
       if (p_cdc->pl2303.serial_private.type != &pl2303_type_data[TYPE_HXN]) {
-        if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
-          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 2, 0x24, pl2303_process_config, CONFIG_PL2303_RESET_ENDP1));
-        } else {
-          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 2, 0x44, pl2303_process_config, CONFIG_PL2303_RESET_ENDP1));
-        }
+        uint16_t const windex = (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) ? 0x24 : 0x44;
+        TU_ASSERT(pl2303_vendor_write(p_cdc, 2, windex,
+                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_RESET_ENDP1)));
         break;
-      } // else: continue with next step
+      }// else: continue with next step
       TU_ATTR_FALLTHROUGH;
 
-    // from here sequence overtaken from Linux Kernel function pl2303_open()
+      // from here sequence overtaken from Linux Kernel function pl2303_open()
     case CONFIG_PL2303_RESET_ENDP1:
       // step 1
       if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
-        TU_ASSERT_COMPLETE(pl2303_clear_halt(p_cdc, PL2303_OUT_EP, pl2303_process_config, CONFIG_PL2303_RESET_ENDP2));
+        TU_ASSERT(pl2303_clear_halt(p_cdc, PL2303_OUT_EP,
+                                    cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_RESET_ENDP2)));
       } else {
         /* reset upstream data pipes */
         if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
-          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, PL2303_HXN_RESET_REG, // skip CONFIG_PL2303_RESET_ENDP2, no 2nd step
+          TU_ASSERT(pl2303_vendor_write(p_cdc, PL2303_HXN_RESET_REG,// skip CONFIG_PL2303_RESET_ENDP2, no 2nd step
                                         PL2303_HXN_RESET_UPSTREAM_PIPE | PL2303_HXN_RESET_DOWNSTREAM_PIPE,
-                                        pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+                                        cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_LINE_CODING)));
         } else {
-          pl2303_vendor_write(p_cdc, 8, 0, pl2303_process_config, CONFIG_PL2303_RESET_ENDP2);
+          pl2303_vendor_write(p_cdc, 8, 0,
+                              cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_RESET_ENDP2));
         }
       }
       break;
@@ -2673,91 +2678,96 @@ static void pl2303_process_config(tuh_xfer_t * xfer) {
     case CONFIG_PL2303_RESET_ENDP2:
       // step 2
       if (p_cdc->pl2303.serial_private.quirks & PL2303_QUIRK_LEGACY) {
-        TU_ASSERT_COMPLETE(pl2303_clear_halt(p_cdc, PL2303_IN_EP, pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+        TU_ASSERT(pl2303_clear_halt(p_cdc, PL2303_IN_EP,
+                                    cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_LINE_CODING)));
       } else {
         /* reset upstream data pipes */
         if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
           // here nothing to do, only structure of previous step overtaken for better reading and comparison
         } else {
-          TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 9, 0, pl2303_process_config, CONFIG_PL2303_LINE_CODING));
+          TU_ASSERT(pl2303_vendor_write(p_cdc, 9, 0,
+                                        cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_LINE_CODING)));
         }
       }
       break;
 
-    // from here sequence overtaken from Linux Kernel function pl2303_set_termios()
-    // unnecessary pl2303_get_line_request() is skipped due to a stall
+      // from here sequence overtaken from Linux Kernel function pl2303_set_termios()
+      // unnecessary pl2303_get_line_request() is skipped due to a stall
     case CONFIG_PL2303_LINE_CODING:
-      #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
-        p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
-        TU_ASSERT_COMPLETE( pl2303_set_line_request(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_MODEM_CONTROL));
-        break;
-      #else
-        TU_ATTR_FALLTHROUGH;
-      #endif
+    #ifdef CFG_TUH_CDC_LINE_CODING_ON_ENUM
+      p_cdc->requested_line_coding = (cdc_line_coding_t) CFG_TUH_CDC_LINE_CODING_ON_ENUM;
+      TU_ASSERT(pl2303_set_line_request(p_cdc, pl2303_internal_control_complete,
+                                        PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_MODEM_CONTROL)));
+      break;
+    #else
+      TU_ATTR_FALLTHROUGH;
+    #endif
 
     case CONFIG_PL2303_MODEM_CONTROL:
-      #ifdef LINE_CONTROL_ON_ENUM
-        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
-        TU_ASSERT_COMPLETE(pl2303_set_control_lines(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_COMPLETE));
-        break;
-      #else
-        TU_ATTR_FALLTHROUGH;
-      #endif
+    #ifdef LINE_CONTROL_ON_ENUM
+      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      TU_ASSERT(pl2303_set_control_lines(p_cdc, pl2303_internal_control_complete,
+                                         PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_COMPLETE)));
+      break;
+    #else
+      TU_ATTR_FALLTHROUGH;
+    #endif
 
-// skipped, because it's not working with each PL230x. flow control can be also set by PL2303 EEPROM Writer Program
-//    case CONFIG_PL2303_FLOW_CTRL_READ:
-//      // read flow control register for modify & write back in next step
-//      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
-//        TU_LOG_P_CDC ( "1\r\n" );
-//        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, PL2303_HXN_FLOWCTRL_REG, &buf, pl2303_process_config,
-//                                              CONFIG_PL2303_FLOW_CTRL_WRITE));
-//      } else {
-//        TU_LOG_P_CDC ( "2\r\n" );
-//        TU_ASSERT_COMPLETE(pl2303_vendor_read(p_cdc, 0, &buf, pl2303_process_config, CONFIG_PL2303_FLOW_CTRL_WRITE));
-//      }
-//      break;
-//
-//    case CONFIG_PL2303_FLOW_CTRL_WRITE:
-//      // no flow control
-//      buf = xfer->buffer[0];
-//      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
-//        buf &= (uint8_t) ~PL2303_HXN_FLOWCTRL_MASK;
-//        buf |= PL2303_HXN_FLOWCTRL_NONE;
-//        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, PL2303_HXN_FLOWCTRL_REG, buf, pl2303_process_config,
-//                                               CONFIG_PL2303_COMPLETE));
-//      } else {
-//        buf &= (uint8_t) ~PL2303_FLOWCTRL_MASK;
-//        TU_ASSERT_COMPLETE(pl2303_vendor_write(p_cdc, 0, buf, pl2303_process_config, CONFIG_PL2303_COMPLETE));
-//      }
-//      break;
+      // skipped, because it's not working with each PL230x. flow control can be also set by PL2303 EEPROM Writer Program
+      //    case CONFIG_PL2303_FLOW_CTRL_READ:
+      //      // read flow control register for modify & write back in next step
+      //      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+      //        TU_LOG_P_CDC ( "1\r\n" );
+      //        TU_ASSERT(pl2303_vendor_read(p_cdc, PL2303_HXN_FLOWCTRL_REG, &buf,
+      //                                     cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_FLOW_CTRL_WRITE)));
+      //      } else {
+      //        TU_LOG_P_CDC ( "2\r\n" );
+      //        TU_ASSERT(pl2303_vendor_read(p_cdc, 0, &buf, cdch_process_set_config, CONFIG_PL2303_FLOW_CTRL_WRITE));
+      //      }
+      //      break;
+      //
+      //    case CONFIG_PL2303_FLOW_CTRL_WRITE:
+      //      // no flow control
+      //      buf = xfer->buffer[0];
+      //      if (p_cdc->pl2303.serial_private.type == &pl2303_type_data[TYPE_HXN]) {
+      //        buf &= (uint8_t) ~PL2303_HXN_FLOWCTRL_MASK;
+      //        buf |= PL2303_HXN_FLOWCTRL_NONE;
+      //        TU_ASSERT(pl2303_vendor_write(p_cdc, PL2303_HXN_FLOWCTRL_REG, buf,
+      //                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_COMPLETE)));
+      //      } else {
+      //        buf &= (uint8_t) ~PL2303_FLOWCTRL_MASK;
+      //        TU_ASSERT(pl2303_vendor_write(p_cdc, 0, buf,
+      //                                      cdch_process_set_config, PROCESS_CONFIG_STATE(idx, CONFIG_PL2303_COMPLETE)));
+      //      }
+      //      break;
 
     case CONFIG_PL2303_COMPLETE:
       set_config_complete(idx, 0, true);
       break;
 
     default:
-      TU_ASSERT_COMPLETE(false);
-      break;
+      return false;
   }
+
+  return true;
 }
 
 //------------- Helper -------------//
 
-static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t step,
-                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data )
-{
+static int8_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step,
+                                 tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   /*
    * Legacy PL2303H, variants 0 and 1 (difference unknown).
    */
   if (desc_dev->bDeviceClass == 0x02) {
-    return TYPE_H;    /* variant 0 */
+    return TYPE_H; /* variant 0 */
   }
 
   if (desc_dev->bMaxPacketSize0 != 0x40) {
     if (desc_dev->bDeviceClass == 0x00 || desc_dev->bDeviceClass == 0xff) {
-      return TYPE_H;  /* variant 1 */
+      return TYPE_H; /* variant 1 */
     }
-    return TYPE_H;    /* variant 0 */
+    return TYPE_H; /* variant 0 */
   }
 
   switch (desc_dev->bcdUSB) {
@@ -2782,7 +2792,7 @@ static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t step,
         case 0x300: /* GT / TA */
           if (step == 1) {
             // step 1 trigger pl2303_supports_hx_status() request
-            TU_ASSERT(pl2303_supports_hx_status (p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
+            TU_ASSERT(pl2303_supports_hx_status(p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
             return PL2303_SUPPORTS_HX_STATUS_TRIGGERED;
           } else {
             // step 2 use supports_hx_status
@@ -2798,7 +2808,7 @@ static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t step,
         case 0x500: /* GE / TB */
           if (step == 1) {
             // step 1 trigger pl2303_supports_hx_status() request
-            TU_ASSERT(pl2303_supports_hx_status (p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
+            TU_ASSERT(pl2303_supports_hx_status(p_cdc, complete_cb, user_data), PL2303_DETECT_TYPE_FAILED);
             return PL2303_SUPPORTS_HX_STATUS_TRIGGERED;
           } else {
             // step 2 use supports_hx_status
@@ -2829,8 +2839,7 @@ static int8_t pl2303_detect_type(cdch_interface_t * p_cdc, uint8_t step,
  * Returns the nearest supported baud rate that can be set directly without
  * using divisors.
  */
-static uint32_t pl2303_get_supported_baud_rate(uint32_t baud)
-{
+static uint32_t pl2303_get_supported_baud_rate(uint32_t baud) {
   static const uint32_t baud_sup[] = {
     75, 150, 300, 600, 1200, 1800, 2400, 3600, 4800, 7200, 9600,
     14400, 19200, 28800, 38400, 57600, 115200, 230400, 460800,
@@ -2859,8 +2868,7 @@ static uint32_t pl2303_get_supported_baud_rate(uint32_t baud)
  * NOTE: If unsupported baud rates are set directly, the PL2303 seems to
  *       use 9600 baud.
  */
-static uint32_t pl2303_encode_baud_rate_direct(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
-{
+static uint32_t pl2303_encode_baud_rate_direct(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
   uint32_t baud_le = tu_htole32(baud);
   buf[0] = (uint8_t) ( baud_le        & 0xff);
   buf[1] = (uint8_t) ((baud_le >>  8) & 0xff);
@@ -2870,8 +2878,7 @@ static uint32_t pl2303_encode_baud_rate_direct(uint8_t buf[PL2303_LINE_CODING_BA
   return baud;
 }
 
-static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
-{
+static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
   uint32_t baseline, mantissa, exponent;
 
   /*
@@ -2899,7 +2906,7 @@ static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_B
 
   buf[3] = 0x80;
   buf[2] = 0;
-  buf[1] = (uint8_t) ((exponent << 1 |  mantissa >> 8) & 0xff);
+  buf[1] = (uint8_t) ((exponent << 1 | mantissa >> 8) & 0xff);
   buf[0] = (uint8_t) (mantissa & 0xff);
 
   /* Calculate and return the exact baud rate. */
@@ -2908,8 +2915,7 @@ static uint32_t pl2303_encode_baud_rate_divisor(uint8_t buf[PL2303_LINE_CODING_B
   return baud;
 }
 
-static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud)
-{
+static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE], uint32_t baud) {
   uint32_t baseline, mantissa, exponent;
 
   /*
@@ -2922,7 +2928,7 @@ static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODI
   baseline = 12000000 * 32;
   mantissa = baseline / baud;
   if (mantissa == 0) {
-    mantissa = 1;   /* Avoid dividing by zero if baud > 32 * 12M. */
+    mantissa = 1; /* Avoid dividing by zero if baud > 32 * 12M. */
   }
   exponent = 0;
   while (mantissa >= 2048) {
@@ -2938,7 +2944,7 @@ static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODI
 
   buf[3] = 0x80;
   buf[2] = (uint8_t) (exponent & 0x01);
-  buf[1] = (uint8_t) (((exponent &  (uint32_t) ~0x01) << 4 | mantissa >> 8 ) & 0xff);
+  buf[1] = (uint8_t) (((exponent & (uint32_t) ~0x01) << 4 | mantissa >> 8) & 0xff);
   buf[0] = (uint8_t) (mantissa & 0xff);
 
   /* Calculate and return the exact baud rate. */
@@ -2947,8 +2953,7 @@ static uint32_t pl2303_encode_baud_rate_divisor_alt(uint8_t buf[PL2303_LINE_CODI
   return baud;
 }
 
-static bool pl2303_encode_baud_rate(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE])
-{
+static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_LINE_CODING_BAUDRATE_BUFSIZE]) {
   uint32_t baud = p_cdc->requested_line_coding.bit_rate;
   uint32_t baud_sup;
 
-- 
cgit v1.3.1


From fa3ec44533ff986688318c3f80e9f373f55318f0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 19 Jun 2025 17:22:26 +0700
Subject: revert CFG_TUH_CDC_DTR/RTS_CONTROL_ON_ENUM

---
 examples/host/cdc_msc_hid/src/tusb_config.h        |  5 +--
 .../host/cdc_msc_hid_freertos/src/tusb_config.h    |  3 +-
 src/class/cdc/cdc.h                                | 14 +++----
 src/class/cdc/cdc_host.c                           | 49 +++++++---------------
 4 files changed, 24 insertions(+), 47 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 4bd5b0472..e610c5672 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -103,7 +103,7 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 1 // number of supported CDC devices. also activates CDC ACM
+#define CFG_TUH_CDC                 4 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
@@ -122,8 +122,7 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
-#define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM true
-#define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM true
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 94b121672..05deecba0 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -127,8 +127,7 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
-#define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM true
-#define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM true
+#define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
 // bit rate = 115200, 1 stop bit, no parity, 8 bit data width
diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 10aed79ab..9f3ace63c 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -404,8 +404,7 @@ static inline uint8_t cdc_functional_desc_typeof(uint8_t const * p_desc)
 //--------------------------------------------------------------------+
 // Requests
 //--------------------------------------------------------------------+
-typedef struct TU_ATTR_PACKED
-{
+typedef struct TU_ATTR_PACKED {
   uint32_t bit_rate;
   uint8_t  stop_bits; ///< 0: 1 stop bit - 1: 1.5 stop bits - 2: 2 stop bits
   uint8_t  parity;    ///< 0: None - 1: Odd - 2: Even - 3: Mark - 4: Space
@@ -414,14 +413,13 @@ typedef struct TU_ATTR_PACKED
 
 TU_VERIFY_STATIC(sizeof(cdc_line_coding_t) == 7, "size is not correct");
 
-typedef union TU_ATTR_PACKED
-{
+typedef union TU_ATTR_PACKED {
   struct {
-  uint8_t dtr : 1;
-  uint8_t rts : 1;
-  uint8_t     : 6;
+    uint8_t dtr : 1;
+    uint8_t rts : 1;
+    uint8_t     : 6;
   };
-  uint8_t all;
+  uint8_t value;
 } cdc_line_control_state_t;
 
 TU_VERIFY_STATIC(sizeof(cdc_line_control_state_t) == 1, "size is not correct");
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index dae38ba42..7259e819f 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -52,25 +52,6 @@
                                                           serial_drivers[p_cdc->serial_drid].name, ##__VA_ARGS__)
 #define TU_LOG_P_CDC_BOOL(TXT,VAL)             TU_LOG_P_CDC(TXT " " #VAL " = %d", VAL)
 
-// handle line control defines
-#if defined(CFG_TUH_CDC_LINE_CONTROL_ON_ENUM) && \
-    (defined(CFG_TUH_CDC_DTR_CONTROL_ON_ENUM) || defined(CFG_TUH_CDC_RTS_CONTROL_ON_ENUM))
-  TU_VERIFY_STATIC(false, "Contradictory line control defines");
-#endif
-
-#ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-  #define LINE_CONTROL_ON_ENUM CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
-#elif defined(CFG_TUH_CDC_DTR_CONTROL_ON_ENUM) || defined(CFG_TUH_CDC_RTS_CONTROL_ON_ENUM)
-  #ifndef CFG_TUH_CDC_DTR_CONTROL_ON_ENUM
-    #define CFG_TUH_CDC_DTR_CONTROL_ON_ENUM 0
-  #endif
-  #ifndef CFG_TUH_CDC_RTS_CONTROL_ON_ENUM
-    #define CFG_TUH_CDC_RTS_CONTROL_ON_ENUM 0
-  #endif
-  #define LINE_CONTROL_ON_ENUM ( ( CFG_TUH_CDC_DTR_CONTROL_ON_ENUM ? CDC_CONTROL_LINE_STATE_DTR : 0 ) | \
-                                 ( CFG_TUH_CDC_RTS_CONTROL_ON_ENUM ? CDC_CONTROL_LINE_STATE_RTS : 0 ) )
-#endif
-
 //--------------------------------------------------------------------+
 // Host CDC Interface
 //--------------------------------------------------------------------+
@@ -396,7 +377,7 @@ static cdch_interface_t * make_new_itf(uint8_t daddr, tusb_desc_interface_t cons
       p_cdc->bInterfaceSubClass = itf_desc->bInterfaceSubClass;
       p_cdc->bInterfaceProtocol = itf_desc->bInterfaceProtocol;
       p_cdc->line_coding        = (cdc_line_coding_t) { 0, 0, 0, 0 };
-      p_cdc->line_state.all     = 0;
+      p_cdc->line_state.value   = 0;
       return p_cdc;
     }
   }
@@ -661,7 +642,7 @@ bool tuh_cdc_set_control_line_state_u(uint8_t idx, cdc_line_control_state_t line
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // uses uint16_t for line_state => DTR (bit 0), RTS (bit 1)
 
-  return tuh_cdc_set_control_line_state_u(idx, (cdc_line_control_state_t) { .all = (uint8_t) line_state },
+  return tuh_cdc_set_control_line_state_u(idx, (cdc_line_control_state_t) { .value = (uint8_t) line_state },
                                           complete_cb, user_data);
 }
 
@@ -1004,7 +985,7 @@ static bool acm_set_control_line_state(cdch_interface_t *p_cdc, tuh_xfer_cb_t co
       .direction = TUSB_DIR_OUT
     },
     .bRequest = CDC_REQUEST_SET_CONTROL_LINE_STATE,
-    .wValue   = tu_htole16((uint16_t) p_cdc->requested_line_state.all),
+    .wValue   = tu_htole16((uint16_t) p_cdc->requested_line_state.value),
     .wIndex   = tu_htole16((uint16_t) p_cdc->bInterfaceNumber),
     .wLength  = 0
   };
@@ -1137,9 +1118,9 @@ static bool acm_process_set_config(tuh_xfer_t *xfer) {
 
   switch (state) {
     case CONFIG_ACM_SET_CONTROL_LINE_STATE:
-      #ifdef LINE_CONTROL_ON_ENUM
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
       if (p_cdc->acm_capability.support_line_request) {
-        p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+        p_cdc->requested_line_state.value = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
         TU_ASSERT(acm_set_control_line_state(p_cdc, cdch_process_set_config, CONFIG_ACM_SET_LINE_CODING));
         break;
       }
@@ -1426,8 +1407,8 @@ static bool ftdi_proccess_set_config(tuh_xfer_t *xfer) {
       break;
 
     case CONFIG_FTDI_MODEM_CTRL:
-      #ifdef LINE_CONTROL_ON_ENUM
-      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      p_cdc->requested_line_state.value = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
       p_cdc->user_control_cb = cdch_process_set_config;
       TU_ASSERT(ftdi_update_mctrl(p_cdc, ftdi_internal_control_complete, CONFIG_FTDI_COMPLETE));
       break;
@@ -1735,7 +1716,7 @@ static inline bool cp210x_set_mhs(cdch_interface_t *p_cdc, tuh_xfer_cb_t complet
   // CP210x has the same bit coding
   return cp210x_set_request(p_cdc, CP210X_SET_MHS,
                             (uint16_t) (CP210X_CONTROL_WRITE_DTR | CP210X_CONTROL_WRITE_RTS |
-                                        p_cdc->requested_line_state.all),
+                                        p_cdc->requested_line_state.value),
                             NULL, 0, complete_cb, user_data);
 }
 
@@ -1873,8 +1854,8 @@ static bool cp210x_process_set_config(tuh_xfer_t *xfer) {
       #endif
 
     case CONFIG_CP210X_SET_DTR_RTS:
-      #ifdef LINE_CONTROL_ON_ENUM
-      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      p_cdc->requested_line_state.value = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
       p_cdc->user_control_cb = cdch_process_set_config;
       TU_ASSERT(cp210x_set_mhs(p_cdc, cp210x_internal_control_complete, CONFIG_CP210X_COMPLETE));
       break;
@@ -2153,8 +2134,8 @@ static bool ch34x_process_set_config(tuh_xfer_t *xfer) {
       break;
 
     case CONFIG_CH34X_MODEM_CONTROL:
-      #ifdef LINE_CONTROL_ON_ENUM
-      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+      #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      p_cdc->requested_line_state.value = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
       p_cdc->user_control_cb = cdch_process_set_config;
       TU_ASSERT(ch34x_modem_ctrl_request(p_cdc, ch34x_internal_control_complete, CONFIG_CH34X_COMPLETE));
       break;
@@ -2332,7 +2313,7 @@ static inline bool pl2303_supports_hx_status(cdch_interface_t *p_cdc, tuh_xfer_c
 static inline bool pl2303_set_control_lines(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   // PL2303 has the same bit coding
   return pl2303_set_request(p_cdc, PL2303_SET_CONTROL_REQUEST, PL2303_SET_CONTROL_REQUEST_TYPE,
-                            p_cdc->requested_line_state.all, 0, NULL, 0, complete_cb, user_data);
+                            p_cdc->requested_line_state.value, 0, NULL, 0, complete_cb, user_data);
 }
 
 //static bool pl2303_get_line_request(cdch_interface_t * p_cdc, uint8_t buf[PL2303_LINE_CODING_BUFSIZE])
@@ -2670,8 +2651,8 @@ static bool pl2303_process_set_config(tuh_xfer_t *xfer) {
     #endif
 
     case CONFIG_PL2303_MODEM_CONTROL:
-    #ifdef LINE_CONTROL_ON_ENUM
-      p_cdc->requested_line_state.all = LINE_CONTROL_ON_ENUM;
+    #ifdef CFG_TUH_CDC_LINE_CONTROL_ON_ENUM
+      p_cdc->requested_line_state.value = CFG_TUH_CDC_LINE_CONTROL_ON_ENUM;
       TU_ASSERT(pl2303_set_control_lines(p_cdc, pl2303_internal_control_complete, CONFIG_PL2303_COMPLETE));
       break;
     #else
-- 
cgit v1.3.1


From adf6cbfe03523cd8f7e23cb7f2edbb4304a6cd89 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 20 Jun 2025 12:52:34 +0700
Subject: cdch clean up and refactor, add explicit sync() API

---
 examples/host/cdc_msc_hid/src/cdc_app.c |   2 +-
 src/class/cdc/cdc_host.c                | 172 +++++++++++++-------------------
 src/class/cdc/cdc_host.h                |  48 +++++++--
 src/class/cdc/serial/pl2303.h           |  33 +++---
 4 files changed, 127 insertions(+), 128 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 6f4433f22..2fa9a8560 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -89,7 +89,7 @@ void tuh_cdc_mount_cb(uint8_t idx) {
   // If CFG_TUH_CDC_LINE_CODING_ON_ENUM is defined, line coding will be set by tinyusb stack
   // while eneumerating new cdc device
   cdc_line_coding_t line_coding = {0};
-  if (tuh_cdc_get_local_line_coding(idx, &line_coding)) {
+  if (tuh_cdc_get_line_coding_local(idx, &line_coding)) {
     printf("  Baudrate: %" PRIu32 ", Stop Bits : %u\r\n", line_coding.bit_rate, line_coding.stop_bits);
     printf("  Parity  : %u, Data Width: %u\r\n", line_coding.parity, line_coding.data_bits);
   }
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index 2fe2c85bc..50d0a020d 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -42,15 +42,15 @@
 
 // Level where CFG_TUSB_DEBUG must be at least for this driver is logged
 #ifndef CFG_TUH_CDC_LOG_LEVEL
-  #define CFG_TUH_CDC_LOG_LEVEL   CFG_TUH_LOG_LEVEL
+  #define CFG_TUH_CDC_LOG_LEVEL   1
 #endif
 
-#define TU_LOG_DRV(...)                        TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
-#define TU_LOG_CDC(TXT,DADDR,ITF_NUM,NAME,...) TU_LOG_DRV("[:%u:%u] CDCh %s " TXT "\r\n", \
-                                                          DADDR, ITF_NUM, NAME, ##__VA_ARGS__)
-#define TU_LOG_P_CDC(TXT,...)                  TU_LOG_CDC(TXT, p_cdc->daddr, p_cdc->bInterfaceNumber, \
-                                                          serial_drivers[p_cdc->serial_drid].name, ##__VA_ARGS__)
-#define TU_LOG_P_CDC_BOOL(TXT,VAL)             TU_LOG_P_CDC(TXT " " #VAL " = %d", VAL)
+#define TU_LOG_DRV(...)                     TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
+#define TU_LOG_CDC(_cdc, _format, ...)      TU_LOG_DRV("[:%u:%u] CDCh %s " _format "\r\n", _cdc->daddr, _cdc->bInterfaceNumber, \
+                                                       serial_drivers[_cdc->serial_drid].name, ##__VA_ARGS__)
+
+// Driver that need to set line coding in two stages: baudrate then data format.
+#define DRIVER_2STAGE_SET_LINE_CODING  (CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X || CFG_TUH_CDC_CH34X)
 
 //--------------------------------------------------------------------+
 // Host CDC Interface
@@ -72,7 +72,8 @@ typedef struct {
   } line, requested_line;
 
   tuh_xfer_cb_t user_complete_cb; // required since we handle request internally first
-  #if CFG_TUH_CDC_FTDI || CFG_TUH_CDC_CP210X || CFG_TUH_CDC_CH34X
+
+  #if DRIVER_2STAGE_SET_LINE_CODING
     tuh_xfer_cb_t requested_complete_cb;
   #endif
 
@@ -197,49 +198,57 @@ enum {
   SERIAL_DRIVER_COUNT
 };
 
+typedef bool (*serial_driver_func_t)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+
 typedef struct {
   uint16_t const (*vid_pid_list)[2];
   uint16_t const vid_pid_count;
+  bool is_2stage_line_coding; // true if driver requires to set baudrate then data format separately
+
   bool (*const open)(uint8_t daddr, const tusb_desc_interface_t * itf_desc, uint16_t max_len);
   bool (*const process_set_config)(tuh_xfer_t * xfer);
-  bool (*const set_control_line_state)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_baudrate)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_data_format)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
-  bool (*const set_line_coding)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data);
+  const serial_driver_func_t set_control_line_state;
+  const serial_driver_func_t set_baudrate;
+  const serial_driver_func_t set_data_format;
+  const serial_driver_func_t set_line_coding;
   #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-    uint8_t const * name;
+  const char * name;
   #endif
 } cdch_serial_driver_t;
 
+#if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
+  #define DRIVER_NAME_DECLARE(_str)  .name = _str
+#else
+  #define DRIVER_NAME_DECLARE(_str)
+#endif
+
 // Note driver list must be in the same order as SERIAL_DRIVER enum
 static const cdch_serial_driver_t serial_drivers[] = {
   {
       .vid_pid_list           = NULL,
       .vid_pid_count          = 0,
+      .is_2stage_line_coding  = false,
       .open                   = acm_open,
       .process_set_config     = acm_process_set_config,
       .set_control_line_state = acm_set_control_line_state,
       .set_baudrate           = acm_set_baudrate,
       .set_data_format        = acm_set_data_format,
       .set_line_coding        = acm_set_line_coding,
-    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-      .name                   = (uint8_t const *) "ACM"
-    #endif
+      DRIVER_NAME_DECLARE("ACM")
   },
 
   #if CFG_TUH_CDC_FTDI
   {
       .vid_pid_list           = ftdi_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ftdi_vid_pid_list),
+      .is_2stage_line_coding  = true,
       .open                   = ftdi_open,
       .process_set_config     = ftdi_proccess_set_config,
       .set_control_line_state = ftdi_set_modem_ctrl,
       .set_baudrate           = ftdi_set_baudrate,
       .set_data_format        = ftdi_set_data_format,
       .set_line_coding        = ftdi_set_line_coding,
-    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-      .name                   = (uint8_t const *) "FTDI"
-    #endif
+      DRIVER_NAME_DECLARE("FTDI")
   },
   #endif
 
@@ -247,15 +256,14 @@ static const cdch_serial_driver_t serial_drivers[] = {
   {
       .vid_pid_list           = cp210x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(cp210x_vid_pid_list),
+      .is_2stage_line_coding  = true,
       .open                   = cp210x_open,
       .process_set_config     = cp210x_process_set_config,
       .set_control_line_state = cp210x_set_modem_ctrl,
       .set_baudrate           = cp210x_set_baudrate,
       .set_data_format        = cp210x_set_data_format,
       .set_line_coding        = cp210x_set_line_coding,
-    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-      .name                   = (uint8_t const *) "CP210x"
-    #endif
+      DRIVER_NAME_DECLARE("CP210x")
   },
   #endif
 
@@ -263,15 +271,14 @@ static const cdch_serial_driver_t serial_drivers[] = {
   {
       .vid_pid_list           = ch34x_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(ch34x_vid_pid_list),
+      .is_2stage_line_coding  = true,
       .open                   = ch34x_open,
       .process_set_config     = ch34x_process_set_config,
       .set_control_line_state = ch34x_set_modem_ctrl,
       .set_baudrate           = ch34x_set_baudrate,
       .set_data_format        = ch34x_set_data_format,
       .set_line_coding        = ch34x_set_line_coding,
-    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-      .name                   = (uint8_t const *) "CH34x"
-    #endif
+      DRIVER_NAME_DECLARE("CH34x")
   },
   #endif
 
@@ -279,15 +286,14 @@ static const cdch_serial_driver_t serial_drivers[] = {
   {
       .vid_pid_list           = pl2303_vid_pid_list,
       .vid_pid_count          = TU_ARRAY_SIZE(pl2303_vid_pid_list),
+      .is_2stage_line_coding  = false,
       .open                   = pl2303_open,
       .process_set_config     = pl2303_process_set_config,
       .set_control_line_state = pl2303_set_modem_ctrl,
       .set_baudrate           = pl2303_set_baudrate,
       .set_data_format        = pl2303_set_data_format,
       .set_line_coding        = pl2303_set_line_coding,
-    #if CFG_TUSB_DEBUG && CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
-      .name                   = (uint8_t const *) "PL2303"
-    #endif
+      DRIVER_NAME_DECLARE("PL2303")
   }
   #endif
 };
@@ -440,13 +446,7 @@ bool tuh_cdc_get_control_line_state_local(uint8_t idx, uint16_t* line_state) {
 bool tuh_cdc_get_line_coding_local(uint8_t idx, cdc_line_coding_t * line_coding) {
   cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc);
-
   *line_coding = p_cdc->line.coding;
-  TU_LOG_P_CDC("get line coding %lu %u%c%s",
-               p_cdc->line.coding.bit_rate, p_cdc->line.coding.data_bits,
-               CDC_LINE_CODING_PARITY_CHAR(p_cdc->line.coding.parity),
-               CDC_LINE_CODING_STOP_BITS_TEXT(line_coding->stop_bits));
-
   return true;
 }
 
@@ -520,29 +520,27 @@ bool tuh_cdc_read_clear (uint8_t idx) {
 // Control Endpoint API
 //--------------------------------------------------------------------+
 
+#if DRIVER_2STAGE_SET_LINE_CODING
+
 // set line coding using sequence with 2 stages: set baudrate (stage1) + set data format (stage2)
 static bool set_line_coding_sequence(
     cdch_interface_t * p_cdc,
-    // control request function to set baudrate
-    bool (*set_baudrate_request)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data),
-    // control request function to set data format
-    bool (*set_data_format_request)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data),
-    // function to be called after stage 1 completed
-    void (*set_line_coding_stage1_complete)(tuh_xfer_t * xfer),
-    // control complete function to be called after request
-    void (*internal_control_complete)(tuh_xfer_t * xfer),
+    serial_driver_func_t set_baudrate,
+    serial_driver_func_t set_data_format,
+    tuh_xfer_cb_t set_line_coding_stage1_complete, // function to be called after stage 1 completed
+    tuh_xfer_cb_t internal_control_complete, // control complete function to be called after request
     tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   if (complete_cb) {
     // non-blocking
     // stage 1 set baudrate
     p_cdc->requested_complete_cb = complete_cb; // store complete_cb to be used in set_line_coding_stage1_complete()
     p_cdc->user_complete_cb = set_line_coding_stage1_complete;
-    return set_baudrate_request(p_cdc, internal_control_complete, user_data);
+    return set_baudrate(p_cdc, internal_control_complete, user_data);
   } else {
     // blocking sequence
     // stage 1 set baudrate
     xfer_result_t result = XFER_RESULT_INVALID; // use local result, because user_data ptr may be NULL
-    bool ret = set_baudrate_request(p_cdc, NULL, (uintptr_t) &result);
+    bool ret = set_baudrate(p_cdc, NULL, (uintptr_t) &result);
 
     if (user_data) {
       *((xfer_result_t *) user_data) = result;
@@ -556,7 +554,7 @@ static bool set_line_coding_sequence(
 
     // stage 2 set data format
     result = XFER_RESULT_INVALID;
-    ret = set_data_format_request(p_cdc, NULL, (uintptr_t) &result);
+    ret = set_data_format(p_cdc, NULL, (uintptr_t) &result);
 
     if (user_data) {
       *((xfer_result_t *) user_data) = result;
@@ -590,58 +588,35 @@ static void set_line_coding_stage1_complete(
     }
   }
 }
-
-// call of (non-)blocking set-functions (to set line state, baudrate, ...)
-static bool set_function_call (
-    cdch_interface_t * p_cdc,
-    bool (*set_function)(cdch_interface_t * p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data),
-    tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
-  if (complete_cb) {
-    // non-blocking with call back
-    return set_function(p_cdc, complete_cb, user_data);
-  } else {
-    // blocking
-    xfer_result_t result = XFER_RESULT_INVALID; // use local result, because user_data ptr may be NULL
-    bool ret = set_function(p_cdc, NULL, (uintptr_t) &result);
-
-    if (user_data) {
-      *((xfer_result_t *) user_data) = result;
-    }
-
-    return (ret && result == XFER_RESULT_SUCCESS);
-  }
-}
+#endif
 
 bool tuh_cdc_set_control_line_state(uint8_t idx, uint16_t line_state, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t * p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
+  TU_LOG_CDC(p_cdc, "set control line state dtr = %u rts = %u", p_cdc->requested_line.control_state.dtr, p_cdc->requested_line.control_state.rts);
   cdch_serial_driver_t const * driver = &serial_drivers[p_cdc->serial_drid];
 
   p_cdc->requested_line.control_state.value = (uint8_t) line_state;
-  TU_LOG_P_CDC("set control line state dtr = %u rts = %u", p_cdc->requested_line.control_state.dtr, p_cdc->requested_line.control_state.rts);
-
-  const bool ret = set_function_call(p_cdc, driver->set_control_line_state, complete_cb, user_data);
-
+  const bool ret = driver->set_control_line_state(p_cdc, complete_cb, user_data);
   if (ret && !complete_cb) {
-    p_cdc->line.control_state = p_cdc->requested_line.control_state;
+    // blocking, update line state if request was successful
+    p_cdc->line.control_state.value = (uint8_t) line_state;
   }
+
   return ret;
 }
 
 bool tuh_cdc_set_baudrate(uint8_t idx, uint32_t baudrate, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  TU_LOG_P_CDC("set baudrate %lu", baudrate);
+  TU_LOG_CDC(p_cdc, "set baudrate %lu", baudrate);
   cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
 
   p_cdc->requested_line.coding.bit_rate = baudrate;
-
-  bool ret = set_function_call(p_cdc, driver->set_baudrate, complete_cb, user_data);
-
+  const bool ret = driver->set_baudrate(p_cdc, complete_cb, user_data);
   if (ret && !complete_cb) {
     p_cdc->line.coding.bit_rate = baudrate;
   }
-//  TU_LOG_P_CDC_BOOL("set baudrate", ret);
 
   return ret;
 }
@@ -650,7 +625,7 @@ bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uin
                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  TU_LOG_P_CDC("set data format %u%c%s",
+  TU_LOG_CDC(p_cdc, "set data format %u%c%s",
                data_bits, CDC_LINE_CODING_PARITY_CHAR(parity),
                CDC_LINE_CODING_STOP_BITS_TEXT(stop_bits));
   cdch_serial_driver_t const *driver = &serial_drivers[p_cdc->serial_drid];
@@ -659,15 +634,13 @@ bool tuh_cdc_set_data_format(uint8_t idx, uint8_t stop_bits, uint8_t parity, uin
   p_cdc->requested_line.coding.parity    = parity;
   p_cdc->requested_line.coding.data_bits = data_bits;
 
-  bool ret = set_function_call(p_cdc, driver->set_data_format, complete_cb, user_data);
+  const bool ret = driver->set_data_format(p_cdc, complete_cb, user_data);
 
   if (ret && !complete_cb) {
     p_cdc->line.coding.stop_bits = stop_bits;
     p_cdc->line.coding.parity    = parity;
     p_cdc->line.coding.data_bits = data_bits;
   }
-//  TU_LOG_P_CDC_BOOL("set data format", ret);
-
   return ret;
 }
 
@@ -675,7 +648,7 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
                              tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_VERIFY(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  TU_LOG_P_CDC("set line coding %lu %u%c%s",
+  TU_LOG_CDC(p_cdc, "set line coding %lu %u%c%s",
                line_coding->bit_rate, line_coding->data_bits,
                CDC_LINE_CODING_PARITY_CHAR(line_coding->parity),
                CDC_LINE_CODING_STOP_BITS_TEXT(line_coding->stop_bits));
@@ -683,12 +656,11 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const *line_coding,
 
   p_cdc->requested_line.coding = *line_coding;
 
-  bool ret = set_function_call(p_cdc, driver->set_line_coding, complete_cb, user_data);
+  const bool ret = driver->set_line_coding(p_cdc, complete_cb, user_data);
 
   if (ret && !complete_cb) {
     p_cdc->line.coding = *line_coding;
   }
-//  TU_LOG_P_CDC_BOOL("set line coding", ret);
 
   return ret;
 }
@@ -728,7 +700,7 @@ void cdch_close(uint8_t daddr) {
   for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
     cdch_interface_t *p_cdc = &cdch_data[idx];
     if (p_cdc->daddr == daddr) {
-      TU_LOG_P_CDC("close");
+      TU_LOG_CDC(p_cdc, "close");
 
       // Invoke application callback
       if (tuh_cdc_umount_cb) {
@@ -847,9 +819,8 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
   }
 
   if (driver_detected) {
-    TU_LOG_CDC("open", daddr, itf_desc->bInterfaceNumber, driver_detected->name);
-    bool ret = driver_detected->open(daddr, itf_desc, max_len);
-    //    TU_LOG_CDC("opened ret = %s", daddr, itf_desc->bInterfaceNumber, driver_detected->name, ret ? "true" : "FALSE" );
+    const bool ret = driver_detected->open(daddr, itf_desc, max_len);
+    TU_LOG_DRV("[:%u:%u] CDCh %s open %s\r\n", daddr, itf_desc->bInterfaceNumber, driver_detected->name, ret ? "OK" : "FAILED");
     return ret;
   }
 
@@ -859,7 +830,6 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
 static void set_config_complete(uint8_t idx, uint8_t itf_offset, bool success) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
-  TU_LOG_P_CDC_BOOL("set config complete", success);
 
   if (success) {
     p_cdc->mounted = true;
@@ -883,6 +853,8 @@ static void cdch_process_set_config(tuh_xfer_t *xfer) {
   TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT,);
   const uint8_t idx = get_idx_by_ptr(p_cdc);
 
+  TU_LOG_DRV("  state = %u\r\n", xfer->user_data);
+
   if (!serial_drivers[p_cdc->serial_drid].process_set_config(xfer)) {
     const uint8_t itf_offset = (p_cdc->serial_drid == SERIAL_DRIVER_ACM) ? 1 : 0;
     set_config_complete(idx, itf_offset, false);
@@ -895,7 +867,7 @@ bool cdch_set_config(uint8_t daddr, uint8_t itf_num) {
   uint8_t const idx = tuh_cdc_itf_get_index(daddr, itf_num);
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc && p_cdc->serial_drid < SERIAL_DRIVER_COUNT);
-  TU_LOG_P_CDC("set config");
+  TU_LOG_CDC(p_cdc, "set config");
 
   // fake transfer to kick-off process_set_config()
   tuh_xfer_t xfer;
@@ -919,7 +891,6 @@ static void acm_internal_control_complete(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
-  TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     switch (xfer->setup->bRequest) {
@@ -1204,7 +1175,6 @@ static void ftdi_internal_control_complete(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
-  TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     if (xfer->setup->bRequest      == FTDI_SIO_SET_MODEM_CTRL_REQUEST &&
@@ -1232,14 +1202,12 @@ static void ftdi_internal_control_complete(tuh_xfer_t *xfer) {
 static bool ftdi_set_data_format(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_complete_cb = complete_cb;
   TU_ASSERT(ftdi_set_data_request(p_cdc, complete_cb ? ftdi_internal_control_complete : NULL, user_data));
-
   return true;
 }
 
 static bool ftdi_set_baudrate(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   p_cdc->user_complete_cb = complete_cb;
   TU_ASSERT(ftdi_change_speed(p_cdc, complete_cb ? ftdi_internal_control_complete : NULL, user_data));
-
   return true;
 }
 
@@ -1271,7 +1239,6 @@ static bool ftdi_set_modem_ctrl(cdch_interface_t *p_cdc, tuh_xfer_cb_t complete_
 }
 
 //------------- Enumeration -------------//
-
 enum {
   CONFIG_FTDI_DETERMINE_TYPE = 0,
   CONFIG_FTDI_WRITE_LATENCY,
@@ -1448,7 +1415,7 @@ static bool ftdi_determine_type(cdch_interface_t *p_cdc) {
 
   #if CFG_TUSB_DEBUG >= CFG_TUH_CDC_LOG_LEVEL
   const char * ftdi_chip_name[] = { FTDI_CHIP_NAMES };
-  TU_LOG_P_CDC("%s detected (bcdDevice = 0x%04x)",
+  TU_LOG_CDC(p_cdc, "%s detected (bcdDevice = 0x%04x)",
                ftdi_chip_name[p_cdc->ftdi.chip_type], version);
   #endif
 
@@ -1595,7 +1562,7 @@ static inline uint32_t ftdi_get_divisor(cdch_interface_t *p_cdc) {
       break;
   }
 
-  TU_LOG_P_CDC("Baudrate divisor = 0x%lu", div_value);
+  TU_LOG_CDC(p_cdc, "Baudrate divisor = 0x%lu", div_value);
 
   return div_value;
 }
@@ -1695,7 +1662,6 @@ static void cp210x_internal_control_complete(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
-  TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     switch (xfer->setup->bRequest) {
@@ -1795,7 +1761,7 @@ static bool cp210x_process_set_config(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
-  switch (state) {
+    switch (state) {
     case CONFIG_CP210X_IFC_ENABLE:
       TU_ASSERT(cp210x_ifc_enable(p_cdc, CP210X_UART_ENABLE, cdch_process_set_config, CONFIG_CP210X_SET_BAUDRATE_REQUEST));
       break;
@@ -1941,7 +1907,6 @@ static void ch34x_internal_control_complete(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
-  TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     switch (xfer->setup->bRequest) {
@@ -2059,7 +2024,6 @@ static bool ch34x_process_set_config(tuh_xfer_t *xfer) {
   uint8_t const idx = tuh_cdc_itf_get_index(xfer->daddr, itf_num);
   cdch_interface_t *p_cdc = get_itf(idx);
   uint8_t buffer[2];// TODO remove
-
   TU_ASSERT(p_cdc && xfer->result == XFER_RESULT_SUCCESS);
 
   switch (state) {
@@ -2071,7 +2035,7 @@ static bool ch34x_process_set_config(tuh_xfer_t *xfer) {
     case CONFIG_CH34X_SERIAL_INIT: {
       // handle version read data, set CH34x line coding (incl. baudrate)
       uint8_t const version = xfer->buffer[0];
-      TU_LOG_P_CDC("Chip Version = 0x%02x", version);
+      TU_LOG_CDC(p_cdc, "Chip Version = 0x%02x", version);
       // only versions >= 0x30 are tested, below 0x30 seems having other programming
       // see drivers from WCH vendor, Linux kernel and FreeBSD
       if (version >= 0x30) {
@@ -2348,7 +2312,6 @@ static void pl2303_internal_control_complete(tuh_xfer_t *xfer) {
   cdch_interface_t *p_cdc = get_itf(idx);
   TU_ASSERT(p_cdc, );
   bool const success = (xfer->result == XFER_RESULT_SUCCESS);
-  TU_LOG_P_CDC_BOOL("control complete", success);
 
   if (success) {
     if (xfer->setup->bRequest == PL2303_SET_LINE_REQUEST &&
@@ -2458,6 +2421,7 @@ static bool pl2303_process_set_config(tuh_xfer_t *xfer) {
   pl2303_type_t type;
 
   TU_ASSERT(p_cdc && (xfer->result == XFER_RESULT_SUCCESS || state == CONFIG_PL2303_READ1));
+
   switch (state) {
     // from here sequence overtaken from Linux Kernel function pl2303_startup()
     case CONFIG_PL2303_DETECT_TYPE:
@@ -2741,7 +2705,7 @@ static pl2303_type_t pl2303_detect_type(cdch_interface_t *p_cdc, uint8_t step) {
     default: break;
   }
 
-  TU_LOG_P_CDC("unknown device type bcdUSB = 0x%04x", desc_dev.bcdUSB);
+  TU_LOG_CDC(p_cdc, "unknown device type bcdUSB = 0x%04x", desc_dev.bcdUSB);
   return PL2303_TYPE_UNKNOWN;
 }
 
@@ -2886,7 +2850,7 @@ static bool pl2303_encode_baud_rate(cdch_interface_t *p_cdc, uint8_t buf[PL2303_
   } else {
     baud = pl2303_encode_baud_rate_divisor(buf, baud);
   }
-  TU_LOG_P_CDC("real baudrate %lu", baud);
+  TU_LOG_CDC(p_cdc, "real baudrate %lu", baud);
 
   return true;
 }
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index 688164cb2..37bfca270 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -137,13 +137,12 @@ bool tuh_cdc_peek(uint8_t idx, uint8_t* ch);
 bool tuh_cdc_read_clear (uint8_t idx);
 
 //--------------------------------------------------------------------+
-// Control Endpoint (Request) API
+// Control Request API
 // Each Function will make a USB control transfer request to/from device
 // - If complete_cb is provided, the function will return immediately and invoke
 // the callback when request is complete.
 // - If complete_cb is NULL, the function will block until request is complete.
-//   - In this case, user_data should be pointed to xfer_result_t to hold the transfer result.
-//   - The function will return true if transfer is successful, false otherwise.
+// In this case, user_data should be usb_xfer_result_t* to hold the transfer result.
 //--------------------------------------------------------------------+
 
 // Request to Set Control Line State: DTR (bit 0), RTS (bit 1)
@@ -179,17 +178,52 @@ bool tuh_cdc_set_line_coding(uint8_t idx, cdc_line_coding_t const* line_coding,
 // bool tuh_cdc_get_line_coding(uint8_t idx, cdc_line_coding_t* coding);
 
 // Connect by set both DTR, RTS
-TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_connect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return tuh_cdc_set_control_line_state(idx, CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS, complete_cb, user_data);
 }
 
 // Disconnect by clear both DTR, RTS
-TU_ATTR_ALWAYS_INLINE static inline
-bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
+TU_ATTR_ALWAYS_INLINE static inline bool tuh_cdc_disconnect(uint8_t idx, tuh_xfer_cb_t complete_cb, uintptr_t user_data) {
   return tuh_cdc_set_control_line_state(idx, 0x00, complete_cb, user_data);
 }
 
+//--------------------------------------------------------------------+
+// Control Request Sync API
+// Each Function will make a USB control transfer request to/from device the function will block until request is
+// complete. The function will return the transfer request result
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_control_line_state_sync(uint8_t idx, uint16_t line_state) {
+  TU_API_SYNC(tuh_cdc_set_control_line_state, idx, line_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_dtr_sync(uint8_t idx, bool dtr_state) {
+  TU_API_SYNC(tuh_cdc_set_dtr, idx, dtr_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_rts_sync(uint8_t idx, bool rts_state) {
+  TU_API_SYNC(tuh_cdc_set_rts, idx, rts_state);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_baudrate_sync(uint8_t idx, uint32_t baudrate) {
+  TU_API_SYNC(tuh_cdc_set_baudrate, idx, baudrate);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_data_format_sync(uint8_t idx, uint8_t stop_bits, uint8_t parity, uint8_t data_bits) {
+  TU_API_SYNC(tuh_cdc_set_data_format, idx, stop_bits, parity, data_bits);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_set_line_coding_sync(uint8_t idx, cdc_line_coding_t const* line_coding) {
+  TU_API_SYNC(tuh_cdc_set_line_coding, idx, line_coding);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_connect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_connect, idx);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline tusb_xfer_result_t tuh_cdc_disconnect_sync(uint8_t idx) {
+  TU_API_SYNC(tuh_cdc_disconnect, idx);
+}
+
 //--------------------------------------------------------------------+
 // CDC APPLICATION CALLBACKS
 //--------------------------------------------------------------------+
diff --git a/src/class/cdc/serial/pl2303.h b/src/class/cdc/serial/pl2303.h
index c01dac0e1..63910c7bb 100644
--- a/src/class/cdc/serial/pl2303.h
+++ b/src/class/cdc/serial/pl2303.h
@@ -109,36 +109,37 @@ typedef enum pl2303_type {
 } pl2303_type_t;
 
 typedef struct pl2303_type_data {
-  uint32_t const max_baud_rate;
-  uint8_t const quirks;
-  uint8_t const no_autoxonxoff : 1;
-  uint8_t const no_divisors    : 1;
-  uint8_t const alt_divisors   : 1;
+  uint32_t max_baud_rate;
+  uint8_t  quirks;
+  uint8_t  no_autoxonxoff : 1;
+  uint8_t  no_divisors    : 1;
+  uint8_t  alt_divisors   : 1;
 } pl2303_type_data_t;
 
 #define PL2303_TYPE_DATA \
   [PL2303_TYPE_H] = { \
-    .max_baud_rate = 1228800, \
-    .quirks = PL2303_QUIRK_LEGACY, \
-    .no_autoxonxoff = true, \
+    .max_baud_rate = 1228800, .quirks = PL2303_QUIRK_LEGACY, \
+    .no_autoxonxoff = 1, .no_divisors = 0, .alt_divisors = 0 \
   }, \
   [PL2303_TYPE_HX] = { \
-    .max_baud_rate = 6000000, \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
   }, \
   [PL2303_TYPE_TA] = { \
-    .max_baud_rate = 6000000, \
-    .alt_divisors = true, \
+    .max_baud_rate = 6000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
   }, \
   [PL2303_TYPE_TB] = { \
-    .max_baud_rate = 12000000, \
-    .alt_divisors = true, \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 1 \
   }, \
   [PL2303_TYPE_HXD] = { \
-    .max_baud_rate = 12000000, \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 0, .alt_divisors = 0 \
   }, \
   [PL2303_TYPE_HXN] = { \
-    .max_baud_rate = 12000000, \
-    .no_divisors = true, \
+    .max_baud_rate = 12000000, .quirks = 0, \
+    .no_autoxonxoff = 0, .no_divisors = 1, .alt_divisors = 0 \
   }
 
 typedef struct TU_ATTR_PACKED {
-- 
cgit v1.3.1


From d86362414e9c467d93f37672228e220a718de81d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 27 Jun 2025 17:57:26 +0700
Subject: clean up

---
 examples/host/cdc_msc_hid/src/tusb_config.h        |  3 +-
 .../host/cdc_msc_hid_freertos/src/tusb_config.h    |  1 +
 src/class/cdc/cdc_host.c                           | 34 +++++++++++-----------
 3 files changed, 20 insertions(+), 18 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index e610c5672..2f8cb5e03 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -103,7 +103,7 @@
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 4 // number of supported CDC devices. also activates CDC ACM
+#define CFG_TUH_CDC                 2 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
@@ -122,6 +122,7 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
+// DTR ( bit 0), RTS (bit 1)
 #define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 05deecba0..bc8887211 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -127,6 +127,7 @@
 //------------- CDC -------------//
 
 // Set Line Control state on enumeration/mounted:
+// DTR ( bit 0), RTS (bit 1)
 #define CFG_TUH_CDC_LINE_CONTROL_ON_ENUM    (CDC_CONTROL_LINE_STATE_DTR | CDC_CONTROL_LINE_STATE_RTS)
 
 // Set Line Coding on enumeration/mounted, value for cdc_line_coding_t
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index ebbd9c18c..f4567fac4 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -42,7 +42,7 @@
 
 // Level where CFG_TUSB_DEBUG must be at least for this driver is logged
 #ifndef CFG_TUH_CDC_LOG_LEVEL
-  #define CFG_TUH_CDC_LOG_LEVEL   1
+  #define CFG_TUH_CDC_LOG_LEVEL   2
 #endif
 
 #define TU_LOG_DRV(...)                 TU_LOG(CFG_TUH_CDC_LOG_LEVEL, __VA_ARGS__)
@@ -748,25 +748,25 @@ bool cdch_open(uint8_t rhport, uint8_t daddr, tusb_desc_interface_t const *itf_d
   (void) rhport;
   // For CDC: only support ACM subclass
   // Note: Protocol 0xFF can be RNDIS device
-  if (TUSB_CLASS_CDC                           == itf_desc->bInterfaceClass &&
+  if (TUSB_CLASS_CDC == itf_desc->bInterfaceClass &&
       CDC_COMM_SUBCLASS_ABSTRACT_CONTROL_MODEL == itf_desc->bInterfaceSubClass) {
     return acm_open(daddr, itf_desc, max_len);
-      } else if (SERIAL_DRIVER_COUNT > 1 &&
-                 TUSB_CLASS_VENDOR_SPECIFIC == itf_desc->bInterfaceClass) {
-        uint16_t vid, pid;
-        TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
-
-        for (size_t dr = 1; dr < SERIAL_DRIVER_COUNT; dr++) {
-          const cdch_serial_driver_t *driver = &serial_drivers[dr];
-          for (size_t i = 0; i < driver->vid_pid_count; i++) {
-            if (driver->vid_pid_list[i][0] == vid && driver->vid_pid_list[i][1] == pid) {
-              const bool ret = driver->open(daddr, itf_desc, max_len);
-              TU_LOG_DRV("[:%u:%u] CDCh %s open %s\r\n", daddr, itf_desc->bInterfaceNumber, driver->name, ret ? "OK" : "FAILED");
-              return ret;
-            }
-          }
+  } else if (SERIAL_DRIVER_COUNT > 1 &&
+             TUSB_CLASS_VENDOR_SPECIFIC == itf_desc->bInterfaceClass) {
+    uint16_t vid, pid;
+    TU_VERIFY(tuh_vid_pid_get(daddr, &vid, &pid));
+
+    for (size_t dr = 1; dr < SERIAL_DRIVER_COUNT; dr++) {
+      const cdch_serial_driver_t *driver = &serial_drivers[dr];
+      for (size_t i = 0; i < driver->vid_pid_count; i++) {
+        if (driver->vid_pid_list[i][0] == vid && driver->vid_pid_list[i][1] == pid) {
+          const bool ret = driver->open(daddr, itf_desc, max_len);
+          TU_LOG_DRV("[:%u:%u] CDCh %s open %s\r\n", daddr, itf_desc->bInterfaceNumber, driver->name, ret ? "OK" : "FAILED");
+          return ret;
         }
-                 }
+      }
+    }
+  }
 
   return false;
 }
-- 
cgit v1.3.1


From a8b5e2bfc0a2d35ba775f7b2de81d531ed525e41 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 2 Jul 2025 15:38:14 +0700
Subject: update example

---
 examples/device/board_test/src/main.c   | 21 ++++++++++++---------
 examples/host/cdc_msc_hid/src/cdc_app.c |  5 ++++-
 hw/bsp/rp2040/family.c                  |  6 +++++-
 3 files changed, 21 insertions(+), 11 deletions(-)

(limited to 'examples/host/cdc_msc_hid')

diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 2269d45f1..2c6ab6288 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -49,25 +49,28 @@ int main(void) {
   while (1) {
     uint32_t interval_ms = board_button_read() ? BLINK_PRESSED : BLINK_UNPRESSED;
 
+    int ch = board_getchar();
+    if (ch > 0) {
+      board_putchar(ch);
+    }
+
     // Blink and print every interval ms
     if (!(board_millis() - start_ms < interval_ms)) {
-      board_uart_write(HELLO_STR, strlen(HELLO_STR));
-
       start_ms = board_millis();
 
+      if (ch < 0) {
+        // skip if echoing
+        printf(HELLO_STR);
+        board_uart_write(HELLO_STR, strlen(HELLO_STR));
+      }
+
       board_led_write(led_state);
       led_state = 1 - led_state; // toggle
     }
-
-    // echo
-    uint8_t ch;
-    if (board_uart_read(&ch, 1) > 0) {
-      board_uart_write(&ch, 1);
-    }
   }
 }
 
-#if TUSB_MCU_VENDOR_ESPRESSIF
+#ifdef ESP_PLATFORM
 void app_main(void) {
   main();
 }
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 2fa9a8560..97f1a96d6 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -72,7 +72,10 @@ void tuh_cdc_rx_cb(uint8_t idx) {
   if (count) {
     buf[count] = 0;
     printf("%s", (char*) buf);
-    fflush(stdout);
+
+    #ifndef __ICCARM__     // TODO IAR doesn't support stream control ?
+    fflush(stdout);// flush right away, else nanolib will wait for newline
+    #endif
   }
 }
 
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 8c85c5cc8..a22924131 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -254,7 +254,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 int board_uart_read(uint8_t *buf, int len) {
 #ifdef UART_DEV
   int count = 0;
-  while ( (count < len) && uart_is_readable(uart_inst) ) {
+  while ((count < len) && uart_is_readable(uart_inst)) {
     buf[count] = uart_getc(uart_inst);
     count++;
   }
@@ -282,6 +282,10 @@ int board_getchar(void) {
   return getchar_timeout_us(0);
 }
 
+void board_putchar(int c) {
+  stdio_putchar(c);
+}
+
 //--------------------------------------------------------------------+
 // USB Interrupt Handler
 // rp2040 implementation will install appropriate handler when initializing
-- 
cgit v1.3.1