From b73a46bf8f26b497bf66ec0d479c0b7194e195ca Mon Sep 17 00:00:00 2001
From: Adam Slaymark <adam.slaymark@googlemail.com>
Date: Mon, 18 Aug 2025 12:05:36 +0100
Subject: added support for stm32l496nucleo

---
 .../boards/stm32l496nucleo/STM32L496XX_FLASH.ld    | 208 +++++++++++++++++++++
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake  |  10 +
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.h      | 158 ++++++++++++++++
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk     |  13 ++
 hw/bsp/stm32l4/family.c                            |   2 +-
 5 files changed, 390 insertions(+), 1 deletion(-)
 create mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
 create mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
 create mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
 create mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk

(limited to 'hw')

diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
new file mode 100644
index 000000000..1978d2077
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
@@ -0,0 +1,208 @@
+/*
+******************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**  Author		: STM32CubeMX
+**
+**  Abstract    : Linker script for STM32L496ZGTxP series
+**                1024Kbytes FLASH and 320Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**  Distribution: The file is distributed “as is,” without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** <h2><center>&copy; COPYRIGHT(c) 2025 STMicroelectronics</center></h2>
+**
+** Redistribution and use in source and binary forms, with or without modification,
+** are permitted provided that the following conditions are met:
+**   1. Redistributions of source code must retain the above copyright notice,
+**      this list of conditions and the following disclaimer.
+**   2. Redistributions in binary form must reproduce the above copyright notice,
+**      this list of conditions and the following disclaimer in the documentation
+**      and/or other materials provided with the distribution.
+**   3. Neither the name of STMicroelectronics nor the names of its contributors
+**      may be used to endorse or promote products derived from this software
+**      without specific prior written permission.
+**
+** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+**
+*****************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x500;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 256K
+RAM2 (xrw)      : ORIGIN = 0x10000000, LENGTH = 64K
+FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 1024K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(8);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(8);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(8);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(8);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(8);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(8);
+  } >FLASH
+
+  .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  { 
+  . = ALIGN(8);
+  *(.ARM.extab* .gnu.linkonce.armextab.*)
+  . = ALIGN(8);
+  } >FLASH
+
+  .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+	. = ALIGN(8);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+	. = ALIGN(8);
+  } >FLASH
+
+  .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+	. = ALIGN(8);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+	. = ALIGN(8);
+  } >FLASH
+  
+  .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+	. = ALIGN(8);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+	. = ALIGN(8);
+  } >FLASH
+
+  .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+
+  {
+	. = ALIGN(8);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+	. = ALIGN(8);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data : 
+  {
+    . = ALIGN(8);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(8);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+  
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss secion */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+}
+
+
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
new file mode 100644
index 000000000..78c0423a8
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT stm32l496xx)
+set(JLINK_DEVICE stm32l496kb)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L496XX_FLASH.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32L496xx
+    )
+endfunction()
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
new file mode 100644
index 000000000..175ebabda
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
@@ -0,0 +1,158 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: STM32 L496 Nucleo
+   url: https://www.st.com/en/evaluation-tools/nucleo-l496ZG-P.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT              GPIOB
+#define LED_PIN               GPIO_PIN_7
+#define LED_STATE_ON          1
+
+// Not a real button
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN            GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   1
+
+#define UART_DEV              LPUART1
+#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_GPIO_PORT        GPIOG
+#define UART_GPIO_AF          GPIO_AF8_LPUART1
+#define UART_TX_PIN           GPIO_PIN_7
+#define UART_RX_PIN           GPIO_PIN_8
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+
+/**
+  * @brief  System Clock Configuration
+  *         The system Clock is configured as follow :
+  *            System Clock source            = PLL (MSI)
+  *            SYSCLK(Hz)                     = 80000000
+  *            HCLK(Hz)                       = 80000000
+  *            AHB Prescaler                  = 1
+  *            APB1 Prescaler                 = 1
+  *            APB2 Prescaler                 = 1
+  *            MSI Frequency(Hz)              = 8000000
+  *            PLL_M                          = 1
+  *            PLL_N                          = 10
+  *            PLL_Q                          = 2
+  *            PLL_R                          = 2
+  *            VDD(V)                         = 3.3
+  * @param  None
+  * @retval None
+  */
+
+static inline void board_clock_init(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  /** Configure LSE Drive Capability
+  */
+  HAL_PWR_EnableBkUpAccess();
+  __HAL_RCC_LSEDRIVE_CONFIG(RCC_LSEDRIVE_LOW);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = 1;
+  RCC_OscInitStruct.PLL.PLLN = 10;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+
+  // /** Enable the SYSCFG APB clock
+  // */
+  // __HAL_RCC_CRS_CLK_ENABLE();
+  //
+  // /** Configures CRS
+  // */
+  // RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
+  // RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
+  // RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
+  // RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
+  // RCC_CRSInitStruct.ErrorLimitValue = 34;
+  // RCC_CRSInitStruct.HSI48CalibrationValue = 32;
+  //
+  // HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+
+  /* Select HSI48 output as USB clock source */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+  /* Select PLL output as UART clock source */
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_LPUART1;
+  PeriphClkInitStruct.Lpuart1ClockSelection = RCC_LPUART1CLKSOURCE_PCLK1;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+}
+
+static inline void board_vbus_sense_init(void)
+{
+  // Enable VBUS sense (B device) via pin PA9
+  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
new file mode 100644
index 000000000..b5ed800a4
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
@@ -0,0 +1,13 @@
+CFLAGS += \
+  -DSTM32L496xx \
+
+# GCC
+SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l496xx.s
+LD_FILE_GCC = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
+
+# IAR
+SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l496xx.s
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l496xx_flash.icf
+
+# For flash-jlink target
+JLINK_DEVICE = stm32l496xx
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 2b555b5c2..084866dd3 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -143,7 +143,7 @@ void board_init(void) {
   GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
 #if defined(USB_OTG_FS)
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
 #else
-- 
cgit v1.3.1


From a75daaf8194de6f1c821a8e8073c4e2e19e66197 Mon Sep 17 00:00:00 2001
From: Adam Slaymark <adam.slaymark@googlemail.com>
Date: Mon, 18 Aug 2025 12:17:46 +0100
Subject: fixed typo in l496 make file

---
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
index b5ed800a4..290c4f908 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
@@ -3,7 +3,7 @@ CFLAGS += \
 
 # GCC
 SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l496xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
+LD_FILE_GCC = $(BOARD_PATH)/STM32L496KBUx_FLASH.ld
 
 # IAR
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l496xx.s
-- 
cgit v1.3.1


From f69d89454ef4a57a1ff199d42cb24a7eff4f6d90 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 3 Sep 2025 17:42:23 +0700
Subject: fix pre-commit and fix READONLY linker keyword with clang

---
 .../boards/stm32l496nucleo/STM32L496XX_FLASH.ld    | 29 +++++++++++-----------
 1 file changed, 14 insertions(+), 15 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
index 1978d2077..5aa932e20 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
@@ -51,8 +51,6 @@
 /* Entry Point */
 ENTRY(Reset_Handler)
 
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
 /* Generate a link error if heap and stack don't fit into RAM */
 _Min_Heap_Size = 0x500;      /* required amount of heap  */
 _Min_Stack_Size = 0x1000; /* required amount of stack */
@@ -65,6 +63,9 @@ RAM2 (xrw)      : ORIGIN = 0x10000000, LENGTH = 64K
 FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 1024K
 }
 
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
+
 /* Define output sections */
 SECTIONS
 {
@@ -102,14 +103,14 @@ SECTIONS
     . = ALIGN(8);
   } >FLASH
 
-  .ARM.extab (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
-  { 
+  .ARM.extab :
+  {
   . = ALIGN(8);
   *(.ARM.extab* .gnu.linkonce.armextab.*)
   . = ALIGN(8);
   } >FLASH
 
-  .ARM (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  .ARM :
   {
 	. = ALIGN(8);
     __exidx_start = .;
@@ -118,7 +119,7 @@ SECTIONS
 	. = ALIGN(8);
   } >FLASH
 
-  .preinit_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  .preinit_array :
   {
 	. = ALIGN(8);
     PROVIDE_HIDDEN (__preinit_array_start = .);
@@ -126,8 +127,8 @@ SECTIONS
     PROVIDE_HIDDEN (__preinit_array_end = .);
 	. = ALIGN(8);
   } >FLASH
-  
-  .init_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+
+  .init_array :
   {
 	. = ALIGN(8);
     PROVIDE_HIDDEN (__init_array_start = .);
@@ -137,7 +138,7 @@ SECTIONS
 	. = ALIGN(8);
   } >FLASH
 
-  .fini_array (READONLY) : /* The "READONLY" keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  .fini_array :
 
   {
 	. = ALIGN(8);
@@ -152,7 +153,7 @@ SECTIONS
   _sidata = LOADADDR(.data);
 
   /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data : 
+  .data :
   {
     . = ALIGN(8);
     _sdata = .;        /* create a global symbol at data start */
@@ -165,12 +166,12 @@ SECTIONS
     _edata = .;        /* define a global symbol at data end */
   } >RAM AT> FLASH
 
-  
+
   /* Uninitialized data section */
   . = ALIGN(4);
   .bss :
   {
-    /* This is used by the startup in order to initialize the .bss secion */
+    /* This is used by the startup in order to initialize the .bss section */
     _sbss = .;         /* define a global symbol at bss start */
     __bss_start__ = _sbss;
     *(.bss)
@@ -193,7 +194,7 @@ SECTIONS
     . = ALIGN(8);
   } >RAM
 
-  
+
 
   /* Remove information from the standard libraries */
   /DISCARD/ :
@@ -204,5 +205,3 @@ SECTIONS
   }
 
 }
-
-
-- 
cgit v1.3.1


From f0670fdf3b86edcb37558a3bff606bab67649f38 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Oct 2025 11:40:23 +0700
Subject: fix make build

---
 hw/bsp/samd11/family.mk | 1 +
 1 file changed, 1 insertion(+)

(limited to 'hw')

diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index c41a0dd37..6f89a2d66 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -8,6 +8,7 @@ CFLAGS += \
   -DOSC32K_OVERWRITE_CALIBRATION=0 \
   -DCFG_EXAMPLE_MSC_READONLY \
   -DCFG_EXAMPLE_VIDEO_READONLY \
+  -DCFG_EXAMPLE_MTP_READONLY \
   -DCFG_TUSB_MCU=OPT_MCU_SAMD11
 
 # suppress warning caused by vendor mcu driver
-- 
cgit v1.3.1


From c3f6c20ee97de7f12682c9f4f805dffec17f291e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Oct 2025 12:20:07 +0700
Subject: fix make stm32u0

---
 .github/copilot-instructions.md | 67 ++++++++++++++++++++++++++++++++++++++---
 hw/bsp/stm32u0/family.mk        |  1 +
 2 files changed, 63 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/.github/copilot-instructions.md b/.github/copilot-instructions.md
index 572b8d6f5..9982583cd 100644
--- a/.github/copilot-instructions.md
+++ b/.github/copilot-instructions.md
@@ -18,15 +18,23 @@ Choose ONE of these approaches:
 ```bash
 cd examples/device/cdc_msc
 mkdir -p build && cd build
-cmake -DBOARD=stm32f407disco -DCMAKE_BUILD_TYPE=MinSizeRel ..
+cmake -DBOARD=raspberry_pi_pico -DCMAKE_BUILD_TYPE=MinSizeRel ..
 cmake --build . -j4
 ```
 -- takes 1-2 seconds. NEVER CANCEL. Set timeout to 5+ minutes.
 
+**CMake with Ninja (Alternative)**
+```bash
+cd examples/device/cdc_msc
+mkdir build && cd build
+cmake -G Ninja -DBOARD=raspberry_pi_pico ..
+ninja
+```
+
 **Option 2: Individual Example with Make**
 ```bash
 cd examples/device/cdc_msc
-make BOARD=stm32f407disco all
+make BOARD=raspberry_pi_pico all
 ```
 -- takes 2-3 seconds. NEVER CANCEL. Set timeout to 5+ minutes.
 
@@ -36,9 +44,39 @@ python3 tools/build.py -b BOARD_NAME
 ```
 -- takes 15-20 seconds, may have some objcopy failures that are non-critical. NEVER CANCEL. Set timeout to 30+ minutes.
 
+### Build Options
+- **Debug build**:
+  - CMake: `-DCMAKE_BUILD_TYPE=Debug`
+  - Make: `DEBUG=1`
+- **With logging**:
+  - CMake: `-DLOG=2`
+  - Make: `LOG=2`
+- **With RTT logger**:
+  - CMake: `-DLOG=2 -DLOGGER=rtt`
+  - Make: `LOG=2 LOGGER=rtt`
+- **RootHub port selection**:
+  - CMake: `-DRHPORT_DEVICE=1`
+  - Make: `RHPORT_DEVICE=1`
+- **Port speed**:
+  - CMake: `-DRHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED`
+  - Make: `RHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED`
+
+### Flashing and Deploymen
+- **Flash with JLink**:1
+  - CMake: `ninja cdc_msc-jlink`
+  - Make: `make BOARD=raspberry_pi_pico flash-jlink`
+- **Flash with OpenOCD**:
+  - CMake: `ninja cdc_msc-openocd`
+  - Make: `make BOARD=raspberry_pi_pico flash-openocd`
+- **Generate UF2**:
+  - CMake: `ninja cdc_msc-uf2`
+  - Make: `make BOARD=raspberry_pi_pico all uf2`
+- **List all targets** (CMake/Ninja): `ninja -t targets`
+
 ### Unit Testing
 - Install Ceedling: `sudo gem install ceedling`
-- Run all unit tests: `cd test/unit-test && ceedling` -- takes 4 seconds. NEVER CANCEL. Set timeout to 10+ minutes.
+- Run all unit tests: `cd test/unit-test && ceedling` or `cd test/unit-test && ceedling test:all` -- takes 4 seconds. NEVER CANCEL. Set timeout to 10+ minutes.
+- Run specific test: `cd test/unit-test && ceedling test:test_fifo`
 - Tests use Unity framework with CMock for mocking
 
 ### Documentation
@@ -60,7 +98,7 @@ python3 tools/build.py -b BOARD_NAME
 2. **Build validation**: Build at least one example that exercises your changes
    ```bash
    cd examples/device/cdc_msc
-   make BOARD=stm32f407disco all
+   make BOARD=raspberry_pi_pico all
    ```
 
 ### Manual Testing Scenarios
@@ -70,7 +108,7 @@ python3 tools/build.py -b BOARD_NAME
 
 ### Board Selection for Testing
 - **STM32F4**: `stm32f407disco` - no external SDK required, good for testing
-- **RP2040**: `pico_sdk` - requires Pico SDK, commonly used
+- **RP2040**: `raspberry_pi_pico` - requires Pico SDK, commonly used
 - **Other families**: Check `hw/bsp/FAMILY/boards/` for available boards
 
 ## Common Tasks and Time Expectations
@@ -130,4 +168,23 @@ python3 tools/build.py -b BOARD_NAME
 - **Microchip**: SAM D/E/G/L families
 - Check `hw/bsp/` for complete list and `docs/reference/boards.rst` for details
 
+## Code Style Guidelines
+
+### General Coding Standards
+- Use C99 standard
+- Memory-safe: no dynamic allocation
+- Thread-safe: defer all interrupt events to non-ISR task functions
+- 2-space indentation, no tabs
+- Use snake_case for variables/functions
+- Use UPPER_CASE for macros and constants
+- Follow existing variable naming patterns in files you're modifying
+- Include proper header comments with MIT license
+- Add descriptive comments for non-obvious functions
+
+### Best Practices
+- When including headers, group in order: C stdlib, tusb common, drivers, classes
+- Always check return values from functions that can fail
+- Use TU_ASSERT() for error checking with return statements
+- Follow the existing code patterns in the files you're modifying
+
 Remember: TinyUSB is designed for embedded systems - builds are fast, tests are focused, and the codebase is optimized for resource-constrained environments.
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
index 02e0bb792..d5a850050 100644
--- a/hw/bsp/stm32u0/family.mk
+++ b/hw/bsp/stm32u0/family.mk
@@ -33,6 +33,7 @@ SRC_C += \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+  ${ST_HAL_DRIVER}/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
 
 INC += \
-- 
cgit v1.3.1


From 3c33aff4a6e511922dd459e2b68b31c969d58fe0 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 4 Oct 2025 12:12:20 +0200
Subject: Fix jlink device name

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake | 2 +-
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk    | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
index aae820aee..7b3456585 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT stm32h7s3xx)
-set(JLINK_DEVICE stm32h7s3xx)
+set(JLINK_DEVICE stm32h7s3l8)
 
 set(LD_FILE_Clang ${LD_FILE_GNU})
 
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
index 47055a108..40b15bc0e 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = stm32h7s3xx
 CFLAGS += -DSTM32H7S3xx
 
 # For flash-jlink target
-JLINK_DEVICE = stm32h7s3xx
+JLINK_DEVICE = stm32h7s3l8
 
 # flash target using on-board stlink
 flash: flash-stlink
-- 
cgit v1.3.1


From 54fffd0de258e0c345e87479b9d4a221387b897b Mon Sep 17 00:00:00 2001
From: Mengsk <admin@hifiphile.com>
Date: Mon, 6 Oct 2025 17:11:14 +0200
Subject: Fix preset with espressif

Signed-off-by: Mengsk <admin@hifiphile.com>
---
 hw/bsp/BoardPresets.json | 128 +++++++++++++++++++++++++----------------------
 tools/gen_presets.py     |  36 ++++++++++++-
 2 files changed, 103 insertions(+), 61 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 335546837..044c74ee1 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -13,23 +13,17 @@
       }
     },
     {
-      "name": "adafruit_clue",
-      "inherits": "default"
-    },
-    {
-      "name": "adafruit_feather_esp32_v2",
-      "inherits": "default"
-    },
-    {
-      "name": "adafruit_feather_esp32c6",
-      "inherits": "default"
-    },
-    {
-      "name": "adafruit_feather_esp32s2",
-      "inherits": "default"
+      "name": "default single config",
+      "hidden": true,
+      "description": "Configure preset for the ${presetName} board",
+      "generator": "Ninja",
+      "binaryDir": "${sourceDir}/build/${presetName}",
+      "cacheVariables": {
+        "BOARD": "${presetName}"
+      }
     },
     {
-      "name": "adafruit_feather_esp32s3",
+      "name": "adafruit_clue",
       "inherits": "default"
     },
     {
@@ -40,14 +34,6 @@
       "name": "adafruit_fruit_jam",
       "inherits": "default"
     },
-    {
-      "name": "adafruit_magtag_29gray",
-      "inherits": "default"
-    },
-    {
-      "name": "adafruit_metro_esp32s2",
-      "inherits": "default"
-    },
     {
       "name": "adafruit_metro_rp2350",
       "inherits": "default"
@@ -188,42 +174,6 @@
       "name": "ek_tm4c123gxl",
       "inherits": "default"
     },
-    {
-      "name": "espressif_addax_1",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_c3_devkitc",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_c6_devkitc",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_kaluga_1",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_p4_function_ev",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_s2_devkitc",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_s3_devkitc",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_s3_devkitm",
-      "inherits": "default"
-    },
-    {
-      "name": "espressif_saola_1",
-      "inherits": "default"
-    },
     {
       "name": "f1c100s",
       "inherits": "default"
@@ -823,6 +773,66 @@
     {
       "name": "xmc4700_relax",
       "inherits": "default"
+    },
+    {
+      "name": "adafruit_feather_esp32_v2",
+      "inherits": "default single config"
+    },
+    {
+      "name": "adafruit_feather_esp32c6",
+      "inherits": "default single config"
+    },
+    {
+      "name": "adafruit_feather_esp32s2",
+      "inherits": "default single config"
+    },
+    {
+      "name": "adafruit_feather_esp32s3",
+      "inherits": "default single config"
+    },
+    {
+      "name": "adafruit_magtag_29gray",
+      "inherits": "default single config"
+    },
+    {
+      "name": "adafruit_metro_esp32s2",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_addax_1",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_c3_devkitc",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_c6_devkitc",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_kaluga_1",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_p4_function_ev",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_s2_devkitc",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_s3_devkitc",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_s3_devkitm",
+      "inherits": "default single config"
+    },
+    {
+      "name": "espressif_saola_1",
+      "inherits": "default single config"
     }
   ],
   "buildPresets": [
diff --git a/tools/gen_presets.py b/tools/gen_presets.py
index 94b8d16b0..94a9361db 100755
--- a/tools/gen_presets.py
+++ b/tools/gen_presets.py
@@ -5,13 +5,20 @@ from pathlib import Path
 
 def main():
     board_list = []
+    board_list_esp = []
 
-    # Find all board.cmake files
+    # Find all board.cmake files, exclude espressif
     for root, dirs, files in os.walk("hw/bsp"):
         for file in files:
-            if file == "board.cmake":
+            if file == "board.cmake" and "espressif" not in root:
                 board_list.append(os.path.basename(root))
 
+    # Find all espressif boards
+    for root, dirs, files in os.walk("hw/bsp/espressif"):
+        for file in files:
+            if file == "board.cmake":
+                board_list_esp.append(os.path.basename(root))
+
     print('Generating presets for the following boards:')
     print(board_list)
 
@@ -29,8 +36,17 @@ def main():
          "cacheVariables": {
              "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo",
              "BOARD": r"${presetName}"
+         }},
+         {"name": "default single config",
+         "hidden": True,
+         "description": r"Configure preset for the ${presetName} board",
+         "generator": "Ninja",
+         "binaryDir": r"${sourceDir}/build/${presetName}",
+         "cacheVariables": {
+             "BOARD": r"${presetName}"
          }}]
 
+    # Add non-espressif boards
     presets['configurePresets'].extend(
         sorted(
             [
@@ -43,6 +59,22 @@ def main():
         )
     )
 
+    # Add espressif boards with single config generator
+    presets['configurePresets'].extend(
+        sorted(
+            [
+                {
+                    'name': board,
+                    'inherits': 'default single config'
+                }
+                for board in board_list_esp
+            ], key=lambda x: x['name']
+        )
+    )
+
+    # Combine all boards
+    board_list.extend(board_list_esp)
+
     # Build presets
     # no inheritance since 'name' doesn't support macro expansion
     presets['buildPresets'] = sorted(
-- 
cgit v1.3.1


From e976a80fb0387ecab62971b1fd06bc571ebd0f0a Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 8 Oct 2025 21:41:32 +0200
Subject: stm32h7rs: fix typo in makefile

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h7rs/family.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7rs/family.mk b/hw/bsp/stm32h7rs/family.mk
index fba38448d..7082cc900 100644
--- a/hw/bsp/stm32h7rs/family.mk
+++ b/hw/bsp/stm32h7rs/family.mk
@@ -43,7 +43,7 @@ CFLAGS += \
 	-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
 	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
 	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
-	-DSEGGER_RTT_SECTION="noncacheable_buffer" \
+	-DSEGGER_RTT_SECTION="\"noncacheable_buffer\"" \
 	-DBUFFER_SIZE_UP=0x300 \
 
 # GCC Flags
-- 
cgit v1.3.1


From 83baf13dcbde66942419c03348cc88ef22575e32 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Oct 2025 12:33:41 +0700
Subject: try to enable ohci for lpc55 but not working, probably clock issue

---
 README.rst                                         |  8 +--
 hw/bsp/lpc17/family.cmake                          |  1 -
 hw/bsp/lpc17/family.mk                             |  1 -
 hw/bsp/lpc40/family.cmake                          |  1 -
 hw/bsp/lpc40/family.mk                             |  1 -
 hw/bsp/lpc55/boards/double_m33_express/board.cmake |  5 --
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake    |  5 --
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake    |  5 --
 hw/bsp/lpc55/family.c                              | 74 ++++++++++++++++------
 hw/bsp/lpc55/family.cmake                          | 46 +++++++++-----
 src/common/tusb_mcu.h                              |  5 ++
 src/portable/nxp/lpc17_40/hcd_lpc17_40.c           | 48 --------------
 src/portable/ohci/ohci.c                           | 11 +++-
 src/portable/ohci/ohci.h                           | 49 +++++++-------
 src/portable/ohci/ohci_nxp.h                       | 70 ++++++++++++++++++++
 15 files changed, 196 insertions(+), 134 deletions(-)
 delete mode 100644 src/portable/nxp/lpc17_40/hcd_lpc17_40.c
 create mode 100644 src/portable/ohci/ohci_nxp.h

(limited to 'hw')

diff --git a/README.rst b/README.rst
index 03ad3744c..7165b72ed 100644
--- a/README.rst
+++ b/README.rst
@@ -160,7 +160,7 @@ Supported CPUs
 |              +-----------------------------+--------+------+-----------+------------------------+-------------------+
 |              | NUC505                      | ✔      |      | ✔         | nuc505                 |                   |
 +--------------+---------+-------------------+--------+------+-----------+------------------------+-------------------+
-| NXP          | iMXRT   | RT 10xx, 11xx     | ✔      | ✔    | ✔         | ci_hs                  |                   |
+| NXP          | iMXRT   | RT 10xx, 11xx     | ✔      | ✔    | ✔         | ci_hs, ehci            |                   |
 |              +---------+-------------------+--------+------+-----------+------------------------+-------------------+
 |              | Kinetis | KL                | ✔      | ⚠    | ✖         | ci_fs, khci            |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
@@ -168,15 +168,15 @@ Supported CPUs
 |              +---------+-------------------+--------+------+-----------+------------------------+-------------------+
 |              | LPC     | 11u, 13, 15       | ✔      | ✖    | ✖         | lpc_ip3511             |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
-|              |         | 17, 40            | ✔      | ⚠    | ✖         | lpc17_40               |                   |
+|              |         | 17, 40            | ✔      | ⚠    | ✖         | lpc17_40, ohci         |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
-|              |         | 18, 43            | ✔      | ✔    | ✔         | ci_hs                  |                   |
+|              |         | 18, 43            | ✔      | ✔    | ✔         | ci_hs, ehci            |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
 |              |         | 51u               | ✔      | ✖    | ✖         | lpc_ip3511             |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
 |              |         | 54, 55            | ✔      |      | ✔         | lpc_ip3511             |                   |
 |              +---------+-------------------+--------+------+-----------+------------------------+-------------------+
-|              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs           |                   |
+|              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs, ehci     |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
 |              |         | A15               | ✔      |      |           | ci_fs                  |                   |
 +--------------+---------+-------------------+--------+------+-----------+------------------------+-------------------+
diff --git a/hw/bsp/lpc17/family.cmake b/hw/bsp/lpc17/family.cmake
index 771a0f405..c18a10e24 100644
--- a/hw/bsp/lpc17/family.cmake
+++ b/hw/bsp/lpc17/family.cmake
@@ -89,7 +89,6 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC175X_6X)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
-    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
     ${TOP}/src/portable/ohci/ohci.c
     )
   target_link_libraries(${TARGET} PUBLIC board_${BOARD})
diff --git a/hw/bsp/lpc17/family.mk b/hw/bsp/lpc17/family.mk
index e8d707ea5..f1ed1a7d0 100644
--- a/hw/bsp/lpc17/family.mk
+++ b/hw/bsp/lpc17/family.mk
@@ -20,7 +20,6 @@ LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c \
 	src/portable/ohci/ohci.c \
 	$(MCU_DIR)/../gcc/cr_startup_lpc175x_6x.c \
 	$(MCU_DIR)/src/chip_17xx_40xx.c \
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index 3a680eae6..439b27491 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -90,7 +90,6 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC40XX)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
-    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
     ${TOP}/src/portable/ohci/ohci.c
     )
   target_link_libraries(${TARGET} PUBLIC board_${BOARD})
diff --git a/hw/bsp/lpc40/family.mk b/hw/bsp/lpc40/family.mk
index c72631235..c21923000 100644
--- a/hw/bsp/lpc40/family.mk
+++ b/hw/bsp/lpc40/family.mk
@@ -18,7 +18,6 @@ LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
 # All source paths should be relative to the top level.
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
-	src/portable/nxp/lpc17_40/hcd_lpc17_40.c \
 	src/portable/ohci/ohci.c \
 	$(MCU_DIR)/../gcc/cr_startup_lpc40xx.c \
 	$(MCU_DIR)/src/chip_17xx_40xx.c \
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.cmake b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
index 3324ce888..186655b5a 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.cmake
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.cmake
@@ -7,11 +7,6 @@ set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
 
-# Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
-endif()
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
index b3d0c3349..d935b70e6 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
@@ -5,11 +5,6 @@ set(JLINK_DEVICE LPC55S28)
 set(PYOCD_TARGET LPC55S28)
 set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
 
-# Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
-endif()
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S28JBD100
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index b52ec2f9d..f46775b27 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -5,11 +5,6 @@ set(JLINK_DEVICE LPC55S69_M33_0)
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
-# Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
-endif()
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index dbf8d71b7..b2e219382 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -55,6 +55,7 @@
 #define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
 #define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
 #define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
+#define IOCON_PIO_MODE_PULLUP    0x20u   /*!<@brief Selects pull-up function */
 
 #define IOCON_PIO_DIG_FUNC0_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC0) // Digital pin function 0 enabled
 #define IOCON_PIO_DIG_FUNC1_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC1) // Digital pin function 1 enabled
@@ -197,13 +198,14 @@ void board_init(void) {
   USART_Init(UART_DEV, &uart_config, 12000000);
 #endif
 
-  // USB VBUS
+#if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0)
   /* PORT0 PIN22 configured as USB0_VBUS */
   IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN);
-
-#if defined(BOARD_TUD_RHPORT)  && BOARD_TUD_RHPORT == 0
   // Port0 is Full Speed
 
+  NVIC_ClearPendingIRQ(USB0_IRQn);
+  NVIC_ClearPendingIRQ(USB0_NEEDCLK_IRQn);
+
   /* Turn on USB0 Phy */
   POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY);
 
@@ -212,21 +214,55 @@ void board_init(void) {
   RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
   RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
 
-  // Enable USB Clock Adjustments to trim the FRO for the full speed controller
-  ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
-  CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
-  CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
-
-  /*According to reference manual, device mode setting has to be set by access usb host register */
-  CLOCK_EnableClock(kCLOCK_Usbhsl0);  // enable usb0 host clock
-  USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
-  CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
-
-  /* enable USB Device clock */
-  CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
+  if (BOARD_TUD_RHPORT == 0) {
+    // Enable USB Clock Adjustments to trim the FRO for the full speed controller
+    ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
+    CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
+
+    /*According to reference manual, device mode setting has to be set by access usb host register */
+    CLOCK_EnableClock(kCLOCK_Usbhsl0);  // enable usb0 host clock
+    USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
+    CLOCK_DisableClock(kCLOCK_Usbhsl0); // disable usb0 host clock
+    /* enable USB Device clock */
+    CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
+  } else {
+    const uint32_t port1_pin12_config = (/* Pin is configured as USB0_PORTPWRN */
+                                         IOCON_PIO_FUNC4 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN12 (coords: 67) is configured as USB0_PORTPWRN */
+    IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config);
+
+    const uint32_t port0_pin28_config = (/* Pin is configured as USB0_OVERCURRENTN */
+                                         IOCON_PIO_FUNC7 |
+                                         /* Selects pull-up function */
+                                         IOCON_PIO_MODE_PULLUP |
+                                         /* Standard mode, output slew rate control is enabled */
+                                         IOCON_PIO_SLEW_STANDARD |
+                                         /* Input function is not inverted */
+                                         IOCON_PIO_INV_DI |
+                                         /* Enables digital function */
+                                         IOCON_PIO_DIGITAL_EN |
+                                         /* Open drain is disabled */
+                                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN28 (coords: 66) is configured as USB0_OVERCURRENTN */
+    IOCON_PinMuxSet(IOCON, 0U, 28U, port0_pin28_config);
+
+    CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll1, 48000000U);
+    USBFSH->PORTMODE &= ~USBFSH_PORTMODE_DEV_ENABLE_MASK;
+  }
 #endif
 
-#if defined(BOARD_TUD_RHPORT)  && BOARD_TUD_RHPORT == 1
+#if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 1)
   // Port1 is High Speed
 
   /* Turn on USB1 Phy */
@@ -266,9 +302,9 @@ void board_init(void) {
 //  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
 //  USBPHY->TX = phytx;
 
-    ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
-    ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));
-    ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
+  ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
+  ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));
+  ARM_MPU_Enable(MPU_CTRL_PRIVDEFENA_Msk | MPU_CTRL_HFNMIENA_Msk);
 #endif
 }
 
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index a89548635..506164d9d 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -12,12 +12,29 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 
 set(FAMILY_MCUS LPC55 CACHE INTERNAL "")
 
-if (NOT DEFINED PORT)
-  set(PORT 0)
-endif()
-
-# Host port will be the other port if available
-set(HOST_PORT $<NOT:${PORT}>)
+# ----------------------
+# Port & Speed Selection
+# ----------------------
+
+# default device port to USB1 highspeed, host to USB0 fullspeed
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
+endif ()
+
+# port 0 is fullspeed, port 1 is highspeed
+set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+
+if (NOT DEFINED RHPORT_DEVICE_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_HOST_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+endif ()
+
+cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
 # BOARD_TARGET
@@ -67,22 +84,20 @@ function(add_board_target BOARD_TARGET)
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
-    BOARD_TUD_RHPORT=${PORT}
-    BOARD_TUH_RHPORT=${HOST_PORT}
+    BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+    BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+    BOARD_TUH_RHPORT=${RHPORT_HOST}
+    BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
     __STARTUP_CLEAR_BSS
     )
 
   # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
-  if (PORT EQUAL 1)
+  if (RHPORT_DEVICE EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-      BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
       CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
-  else ()
+  elseif (RHPORT_HOST EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
-      BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
       CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
       )
   endif ()
@@ -143,11 +158,10 @@ function(family_configure_example TARGET RTOS)
   family_add_tinyusb(${TARGET} OPT_MCU_LPC55)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    ${TOP}/src/portable/ohci/ohci.c
     )
   target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1c11df114..03062beb8 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -64,6 +64,7 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
   #define TUP_DCD_ENDPOINT_MAX    16
   #define TUP_USBIP_OHCI
+  #define TUP_USBIP_OHCI_NXP
   #define TUP_OHCI_RHPORTS        2
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC51UXX)
@@ -78,6 +79,10 @@
 #elif TU_CHECK_MCU(OPT_MCU_LPC55)
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
+  #define TUP_USBIP_OHCI
+  #define TUP_USBIP_OHCI_NXP
+  #define TUP_OHCI_RHPORTS        1 // 1 downstream port
+
   #define TUP_DCD_ENDPOINT_MAX    6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC18XX, OPT_MCU_LPC43XX)
diff --git a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c b/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
deleted file mode 100644
index fea3e2a66..000000000
--- a/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if CFG_TUH_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX)
-
-#include "chip.h"
-#include "host/hcd.h"
-#include "host/usbh.h"
-
-void hcd_int_enable(uint8_t rhport)
-{
-  (void) rhport;
-  NVIC_EnableIRQ(USB_IRQn);
-}
-
-void hcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
-  NVIC_DisableIRQ(USB_IRQn);
-}
-
-#endif
diff --git a/src/portable/ohci/ohci.c b/src/portable/ohci/ohci.c
index f1689b5b4..a12f7d6ed 100644
--- a/src/portable/ohci/ohci.c
+++ b/src/portable/ohci/ohci.c
@@ -41,13 +41,16 @@
 #include "host/usbh.h"
 #include "ohci.h"
 
-// TODO remove
-#include "chip.h"
+#if defined(TUP_USBIP_OHCI_NXP)
+  #include "ohci_nxp.h"
+#else
+  #error Unsupported OHCI IP
+#endif
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
-#define OHCI_REG               ((ohci_registers_t *) LPC_USB_BASE)
+
 
 enum {
   OHCI_CONTROL_FUNCSTATE_RESET = 0,
@@ -181,6 +184,8 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   (void) rhport;
   (void) rh_init;
 
+  ohci_phy_init(rhport);
+
   //------------- Data Structure init -------------//
   tu_memclr(&ohci_data, sizeof(ohci_data_t));
   for(uint8_t i=0; i<32; i++)
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 94bad5df7..bddb19561 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -192,10 +192,10 @@ typedef struct TU_ATTR_ALIGNED(256) {
 //--------------------------------------------------------------------+
 typedef volatile struct
 {
-  uint32_t revision;
+  uint32_t revision;                               // 0x00
 
   union {
-    uint32_t control;
+    uint32_t control;                              // 0x04
     struct {
       uint32_t control_bulk_service_ratio : 2;
       uint32_t periodic_list_enable       : 1;
@@ -211,7 +211,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t command_status;
+    uint32_t command_status;                       // 0x08
     struct {
       uint32_t controller_reset         : 1;
       uint32_t control_list_filled      : 1;
@@ -222,26 +222,24 @@ typedef volatile struct
     }command_status_bit;
   };
 
-  uint32_t interrupt_status;
-  uint32_t interrupt_enable;
-  uint32_t interrupt_disable;
-
-  uint32_t hcca;
-  uint32_t period_current_ed;
-  uint32_t control_head_ed;
-  uint32_t control_current_ed;
-  uint32_t bulk_head_ed;
-  uint32_t bulk_current_ed;
-  uint32_t done_head;
-
-  uint32_t frame_interval;
-  uint32_t frame_remaining;
-  uint32_t frame_number;
-  uint32_t periodic_start;
-  uint32_t lowspeed_threshold;
+  uint32_t interrupt_status;                       // 0x0C
+  uint32_t interrupt_enable;                       // 0x10
+  uint32_t interrupt_disable;                      // 0x14
+  uint32_t hcca;                                   // 0x18
+  uint32_t period_current_ed;                      // 0x1C
+  uint32_t control_head_ed;                        // 0x20
+  uint32_t control_current_ed;                     // 0x24
+  uint32_t bulk_head_ed;                           // 0x28
+  uint32_t bulk_current_ed;                        // 0x2C
+  uint32_t done_head;                              // 0x30
+  uint32_t frame_interval;                         // 0x34
+  uint32_t frame_remaining;                        // 0x38
+  uint32_t frame_number;                           // 0x3C
+  uint32_t periodic_start;                         // 0x40
+  uint32_t lowspeed_threshold;                     // 0x44
 
   union {
-    uint32_t rh_descriptorA;
+    uint32_t rh_descriptorA;                       // 0x48
     struct {
       uint32_t number_downstream_ports     : 8;
       uint32_t power_switching_mode        : 1;
@@ -255,7 +253,7 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_descriptorB;
+    uint32_t rh_descriptorB;                       // 0x4C
     struct {
       uint32_t device_removable        : 16;
       uint32_t port_power_control_mask : 16;
@@ -263,9 +261,9 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rh_status;
+    uint32_t rh_status;                            // 0x50
     struct {
-      uint32_t local_power_status            : 1; // read Local Power Status; write: Clear Global Power
+      uint32_t local_power_status            : 1;  // read Local Power Status; write: Clear Global Power
       uint32_t over_current_indicator        : 1;
       uint32_t                               : 13;
       uint32_t device_remote_wakeup_enable   : 1;
@@ -277,7 +275,8 @@ typedef volatile struct
   };
 
   union {
-    uint32_t rhport_status[TUP_OHCI_RHPORTS];
+    uint32_t rhport_status[TUP_OHCI_RHPORTS];      // 0x54
+
     struct {
       uint32_t current_connect_status             : 1;
       uint32_t port_enable_status                 : 1;
diff --git a/src/portable/ohci/ohci_nxp.h b/src/portable/ohci/ohci_nxp.h
new file mode 100644
index 000000000..9cba05e95
--- /dev/null
+++ b/src/portable/ohci/ohci_nxp.h
@@ -0,0 +1,70 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_OHCI_NXP_H
+#define TUSB_OHCI_NXP_H
+
+#if TU_CHECK_MCU(OPT_MCU_LPC175X_6X, OPT_MCU_LPC177X_8X, OPT_MCU_LPC40XX)
+
+#include "chip.h"
+#define OHCI_REG   ((ohci_registers_t *) LPC_USB_BASE)
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB_IRQn);
+}
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+#else
+
+#include "fsl_device_registers.h"
+
+// for LPC55 USB0 controller
+#define OHCI_REG  ((ohci_registers_t *) USBFSH_BASE)
+
+static void ohci_phy_init(uint8_t rhport) {
+  (void) rhport;
+}
+
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_EnableIRQ(USB0_IRQn);
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
+  NVIC_DisableIRQ(USB0_IRQn);
+}
+#endif
+
+#endif
-- 
cgit v1.3.1


From 10e86b012f435afacc673b18cea5b54b8585bde9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 11 Oct 2025 18:51:36 +0700
Subject: correct l496zg variant, fix build warning

---
 .../boards/stm32l496nucleo/STM32L496XX_FLASH.ld    | 207 --------------------
 .../boards/stm32l496nucleo/STM32L496ZGTX_FLASH.ld  | 208 +++++++++++++++++++++
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake  |   4 +-
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.h      |   2 +-
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk     |   4 +-
 5 files changed, 213 insertions(+), 212 deletions(-)
 delete mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
 create mode 100644 hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496ZGTX_FLASH.ld

(limited to 'hw')

diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
deleted file mode 100644
index 5aa932e20..000000000
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496XX_FLASH.ld
+++ /dev/null
@@ -1,207 +0,0 @@
-/*
-******************************************************************************
-**
-
-**  File        : LinkerScript.ld
-**
-**  Author		: STM32CubeMX
-**
-**  Abstract    : Linker script for STM32L496ZGTxP series
-**                1024Kbytes FLASH and 320Kbytes RAM
-**
-**                Set heap size, stack size and stack location according
-**                to application requirements.
-**
-**                Set memory bank area and size if external memory is used.
-**
-**  Target      : STMicroelectronics STM32
-**  Distribution: The file is distributed “as is,” without any warranty
-**                of any kind.
-**
-*****************************************************************************
-** @attention
-**
-** <h2><center>&copy; COPYRIGHT(c) 2025 STMicroelectronics</center></h2>
-**
-** Redistribution and use in source and binary forms, with or without modification,
-** are permitted provided that the following conditions are met:
-**   1. Redistributions of source code must retain the above copyright notice,
-**      this list of conditions and the following disclaimer.
-**   2. Redistributions in binary form must reproduce the above copyright notice,
-**      this list of conditions and the following disclaimer in the documentation
-**      and/or other materials provided with the distribution.
-**   3. Neither the name of STMicroelectronics nor the names of its contributors
-**      may be used to endorse or promote products derived from this software
-**      without specific prior written permission.
-**
-** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-**
-*****************************************************************************
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Generate a link error if heap and stack don't fit into RAM */
-_Min_Heap_Size = 0x500;      /* required amount of heap  */
-_Min_Stack_Size = 0x1000; /* required amount of stack */
-
-/* Specify the memory areas */
-MEMORY
-{
-RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 256K
-RAM2 (xrw)      : ORIGIN = 0x10000000, LENGTH = 64K
-FLASH (rx)      : ORIGIN = 0x8000000, LENGTH = 1024K
-}
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM);    /* end of RAM */
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into FLASH */
-  .isr_vector :
-  {
-    . = ALIGN(8);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(8);
-  } >FLASH
-
-  /* The program code and other data goes into FLASH */
-  .text :
-  {
-    . = ALIGN(8);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(8);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data goes into FLASH */
-  .rodata :
-  {
-    . = ALIGN(8);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(8);
-  } >FLASH
-
-  .ARM.extab :
-  {
-  . = ALIGN(8);
-  *(.ARM.extab* .gnu.linkonce.armextab.*)
-  . = ALIGN(8);
-  } >FLASH
-
-  .ARM :
-  {
-	. = ALIGN(8);
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-	. = ALIGN(8);
-  } >FLASH
-
-  .preinit_array :
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-
-  .init_array :
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-
-  .fini_array :
-
-  {
-	. = ALIGN(8);
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-	. = ALIGN(8);
-  } >FLASH
-
-  /* used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections goes into RAM, load LMA copy after code */
-  .data :
-  {
-    . = ALIGN(8);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    . = ALIGN(8);
-    _edata = .;        /* define a global symbol at data end */
-  } >RAM AT> FLASH
-
-
-  /* Uninitialized data section */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough RAM left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-
-
-  /* Remove information from the standard libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-}
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496ZGTX_FLASH.ld b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496ZGTX_FLASH.ld
new file mode 100644
index 000000000..fcd5daee3
--- /dev/null
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/STM32L496ZGTX_FLASH.ld
@@ -0,0 +1,208 @@
+/*
+******************************************************************************
+**
+** @file        : LinkerScript.ld
+**
+** @author      : Auto-generated by STM32CubeIDE
+**
+**  Abstract    : Linker script for NUCLEO-L496ZG Board embedding STM32L496ZGTx Device from stm32l4 series
+**                      1024Kbytes ROM
+**                      256Kbytes RAM
+**                      64Kbytes SRAM2
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is, without any warranty
+**                of any kind.
+**
+******************************************************************************
+** @attention
+**
+** Copyright (c) 2022 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+_Min_Heap_Size = 0x200; /* required amount of heap */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 256K
+  SRAM2    (xrw)    : ORIGIN = 0x10000000,   LENGTH = 64K
+  ROM    (rx)    : ORIGIN = 0x08000000,   LENGTH = 1024K
+}
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "ROM" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >ROM
+
+  /* The program code and other data into "ROM" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >ROM
+
+  /* Constant data into "ROM" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM.extab :
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >ROM
+
+  .ARM :
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >ROM
+
+  .preinit_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >ROM
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> ROM
+
+  _sisram2 = LOADADDR(.sram2);
+
+  /* SRAM2 section
+  *
+  * IMPORTANT NOTE!
+  * If initialized variables will be placed in this section,
+  * the startup code needs to be modified to copy the init-values.
+  */
+  .sram2 :
+  {
+    . = ALIGN(4);
+    _ssram2 = .;       /* create a global symbol at sram2 start */
+    *(.sram2)
+    *(.sram2*)
+
+    . = ALIGN(4);
+    _esram2 = .;       /* create a global symbol at sram2 end */
+  } >SRAM2 AT> ROM
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
index 78c0423a8..bfa8261b9 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.cmake
@@ -1,7 +1,7 @@
 set(MCU_VARIANT stm32l496xx)
-set(JLINK_DEVICE stm32l496kb)
+set(JLINK_DEVICE stm32l496zg)
 
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L496XX_FLASH.ld)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32L496ZGTX_FLASH.ld)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
index 175ebabda..607210cec 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
@@ -79,7 +79,6 @@ static inline void board_clock_init(void)
 {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
 
   /** Configure the main internal regulator output voltage
@@ -125,6 +124,7 @@ static inline void board_clock_init(void)
   //
   // /** Configures CRS
   // */
+  // RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
   // RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
   // RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
   // RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
index 290c4f908..bc0a63c1c 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
@@ -3,11 +3,11 @@ CFLAGS += \
 
 # GCC
 SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l496xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L496KBUx_FLASH.ld
+LD_FILE_GCC = $(BOARD_PATH)/STM32L496ZGTX_FLASH.ld
 
 # IAR
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l496xx.s
 LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l496xx_flash.icf
 
 # For flash-jlink target
-JLINK_DEVICE = stm32l496xx
+JLINK_DEVICE = stm32l496zg
-- 
cgit v1.3.1


From ee7a7c56db8d6429e9df2bf042cbbe638210100d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Oct 2025 12:41:55 +0700
Subject: get cmake build with 54h20 not tested on actual hw, probably not
 running

---
 hw/bsp/nrf/boards/nrf52833dk/board.cmake       |   4 +
 hw/bsp/nrf/boards/nrf52833dk/board.h           |  57 ++++++++++++
 hw/bsp/nrf/boards/nrf52833dk/board.mk          |   7 ++
 hw/bsp/nrf/boards/nrf54h20dk/board.cmake       |  11 +++
 hw/bsp/nrf/boards/nrf54h20dk/board.h           |  65 ++++++++++++++
 hw/bsp/nrf/boards/nrf54h20dk/board.mk          |  16 ++++
 hw/bsp/nrf/boards/pca10095/board.cmake         |   3 +-
 hw/bsp/nrf/boards/pca10095/board.mk            |   1 -
 hw/bsp/nrf/boards/pca10100/board.cmake         |   4 -
 hw/bsp/nrf/boards/pca10100/board.h             |  57 ------------
 hw/bsp/nrf/boards/pca10100/board.mk            |   7 --
 hw/bsp/nrf/family.c                            |  90 +++++++------------
 hw/bsp/nrf/family.cmake                        |  69 +++++++++------
 hw/bsp/nrf/family.mk                           |  10 ++-
 hw/bsp/nrf/linker/nrf52833_xxaa.ld             |   6 --
 hw/bsp/nrf/linker/nrf52840_s140_v6.ld          |   6 --
 hw/bsp/nrf/linker/nrf52840_xxaa.ld             |   6 --
 hw/bsp/nrf/linker/nrf5340_xxaa_application.ld  |   6 --
 hw/bsp/nrf/linker/nrf54h20_xxaa_application.ld |  21 +++++
 hw/bsp/nrf/nrfx_config/nrfx_config.h           | 115 +++++++++++++++++++------
 hw/bsp/nrf/nrfx_config/nrfx_config_common.h    |  86 ++++++++++++++++++
 hw/bsp/nrf/nrfx_config/nrfx_config_ext.h       |  39 +++++++++
 src/common/tusb_mcu.h                          |   6 ++
 src/portable/synopsys/dwc2/dwc2_common.h       |   2 +
 src/portable/synopsys/dwc2/dwc2_nrf.h          |  61 +++++++++++++
 src/tusb_option.h                              |   3 +-
 tools/get_deps.py                              |   2 +-
 27 files changed, 555 insertions(+), 205 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/nrf52833dk/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf52833dk/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf52833dk/board.mk
 create mode 100644 hw/bsp/nrf/boards/nrf54h20dk/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf54h20dk/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf54h20dk/board.mk
 delete mode 100644 hw/bsp/nrf/boards/pca10100/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/pca10100/board.h
 delete mode 100644 hw/bsp/nrf/boards/pca10100/board.mk
 create mode 100644 hw/bsp/nrf/linker/nrf54h20_xxaa_application.ld
 create mode 100644 hw/bsp/nrf/nrfx_config/nrfx_config_common.h
 create mode 100644 hw/bsp/nrf/nrfx_config/nrfx_config_ext.h
 create mode 100644 src/portable/synopsys/dwc2/dwc2_nrf.h

(limited to 'hw')

diff --git a/hw/bsp/nrf/boards/nrf52833dk/board.cmake b/hw/bsp/nrf/boards/nrf52833dk/board.cmake
new file mode 100644
index 000000000..a925dae80
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52833dk/board.cmake
@@ -0,0 +1,4 @@
+set(MCU_VARIANT nrf52833)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf52833dk/board.h b/hw/bsp/nrf/boards/nrf52833dk/board.h
new file mode 100644
index 000000000..8aca6dce9
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52833dk/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF52833 DK
+   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED
+#define LED_PIN               13
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            11
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           8
+#define UART_TX_PIN           6
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf52833dk/board.mk b/hw/bsp/nrf/boards/nrf52833dk/board.mk
new file mode 100644
index 000000000..5fba269b7
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52833dk/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = nrf52833
+CFLAGS += -DNRF52833_XXAA
+
+LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52833_xxaa.ld
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.cmake b/hw/bsp/nrf/boards/nrf54h20dk/board.cmake
new file mode 100644
index 000000000..fca7a56d2
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT nrf54h20)
+
+function(update_board TARGET)
+  # temporarily, 54h20 has multiple sram sections
+  target_compile_definitions(${TARGET} PUBLIC
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+  target_sources(${TARGET} PRIVATE
+#    ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
+    )
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.h b/hw/bsp/nrf/boards/nrf54h20dk/board.h
new file mode 100644
index 000000000..1c7981049
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.h
@@ -0,0 +1,65 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF5340 DK
+   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED
+#define LED_PIN               28
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            23
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           22
+#define UART_TX_PIN           20
+
+// SPI for USB host shield
+// Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !?
+//#define MAX3421_SCK_PIN  _PINNUM(1, 15)
+//#define MAX3421_MOSI_PIN _PINNUM(1, 13)
+//#define MAX3421_MISO_PIN _PINNUM(1, 14)
+//#define MAX3421_CS_PIN   _PINNUM(1, 12)
+//#define MAX3421_INTR_PIN _PINNUM(1, 11)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.mk b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
new file mode 100644
index 000000000..157ba3c36
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
@@ -0,0 +1,16 @@
+MCU_VARIANT = nrf54h20_application
+CFLAGS += -DNRF54H20_XXAA
+
+# enable max3421 host driver for this board
+MAX3421_HOST = 1
+
+LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld
+
+SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c
+
+# caused by void SystemStoreFICRNS() (without void) in system_nrf5340_application.c
+CFLAGS += -Wno-error=strict-prototypes
+
+# flash using jlink
+JLINK_DEVICE = nrf5340_xxaa_app
+flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
index 6d183dde6..a2bfeec89 100644
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ b/hw/bsp/nrf/boards/pca10095/board.cmake
@@ -1,4 +1,5 @@
-set(MCU_VARIANT nrf5340_application)
+#set(MCU_VARIANT nrf5340_application)
+set(MCU_VARIANT nrf5340)
 
 function(update_board TARGET)
   target_sources(${TARGET} PRIVATE
diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk
index 20580d619..9a973150d 100644
--- a/hw/bsp/nrf/boards/pca10095/board.mk
+++ b/hw/bsp/nrf/boards/pca10095/board.mk
@@ -1,4 +1,3 @@
-CPU_CORE = cortex-m33
 MCU_VARIANT = nrf5340_application
 CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION
 
diff --git a/hw/bsp/nrf/boards/pca10100/board.cmake b/hw/bsp/nrf/boards/pca10100/board.cmake
deleted file mode 100644
index a925dae80..000000000
--- a/hw/bsp/nrf/boards/pca10100/board.cmake
+++ /dev/null
@@ -1,4 +0,0 @@
-set(MCU_VARIANT nrf52833)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/nrf/boards/pca10100/board.h b/hw/bsp/nrf/boards/pca10100/board.h
deleted file mode 100644
index 8aca6dce9..000000000
--- a/hw/bsp/nrf/boards/pca10100/board.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Nordic nRF52833 DK
-   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               13
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            11
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           8
-#define UART_TX_PIN           6
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/pca10100/board.mk b/hw/bsp/nrf/boards/pca10100/board.mk
deleted file mode 100644
index 5fba269b7..000000000
--- a/hw/bsp/nrf/boards/pca10100/board.mk
+++ /dev/null
@@ -1,7 +0,0 @@
-MCU_VARIANT = nrf52833
-CFLAGS += -DNRF52833_XXAA
-
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52833_xxaa.ld
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 298ca2302..6edeacd87 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -45,7 +45,9 @@
 #include "nrfx.h"
 #include "hal/nrf_gpio.h"
 #include "nrfx_gpiote.h"
+#if !defined(NRF54H20_XXAA)
 #include "nrfx_power.h"
+#endif
 #include "nrfx_uarte.h"
 #include "nrfx_spim.h"
 
@@ -58,21 +60,26 @@
 #pragma GCC diagnostic pop
 #endif
 
-
-// There is API changes between nrfx v2 and v3
-#if 85301 >= (10000*MDK_MAJOR_VERSION + 100*MDK_MINOR_VERSION + MDK_MICRO_VERSION)
-  // note MDK 8.53.1 is also used by nrfx v3.0.0, just skip this version and use later 3.x
-  #define NRFX_VER 2
-#else
-  #define NRFX_VER 3
+// example only supports nrfx v3 for code simplicity
+#if !(defined(NRFX_CONFIG_API_VER_MAJOR) && NRFX_CONFIG_API_VER_MAJOR >= 3) && \
+    !(85301 >= (10000*MDK_MAJOR_VERSION + 100*MDK_MINOR_VERSION + MDK_MICRO_VERSION))
+  #error "Example requires nrfx v3.0.0 or later"
 #endif
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
+#if defined(NRF54H20_XXAA)
+#define USBD_IRQn  USBHS_IRQn
+void USBHS_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+#else
 void USBD_IRQHandler(void) {
   tud_int_handler(0);
 }
+#endif
 
 /*------------------------------------------------------------------*/
 /* MACRO TYPEDEF CONSTANT ENUM
@@ -96,39 +103,39 @@ enum {
   #define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
 #endif
 
-static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
+static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(CFG_NRFX_UARTE_INSTANCE_ID);
 
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
 extern void tusb_hal_nrf_power_event(uint32_t event);
 
+#if !defined(NRF54H20_XXAA)
 // nrf power callback, could be unused if SD is enabled or usb is disabled (board_test example)
 TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
   tusb_hal_nrf_power_event((uint32_t) event);
 }
+#endif
 
 //------------- Host using MAX2341E -------------//
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
 static void max3421_init(void);
 static nrfx_spim_t _spi = NRFX_SPIM_INSTANCE(1);
-
-#if NRFX_VER > 2
 static nrfx_gpiote_t _gpiote = NRFX_GPIOTE_INSTANCE(0);
 #endif
 
-#endif
-
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
 
 void board_init(void) {
+#if !defined(NRF54H20_XXAA)
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
   // Use Internal OSC to compatible with all boards
   NRF_CLOCK->LFCLKSRC = LFCLK_SRC_RC;
   NRF_CLOCK->TASKS_LFCLKSTART = 1UL;
+#endif
 
   // LED
   nrf_gpio_cfg_output(LED_PIN);
@@ -140,6 +147,7 @@ void board_init(void) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
+
 #elif CFG_TUSB_OS == OPT_OS_ZEPHYR
   #ifdef CONFIG_HAS_HW_NRF_USBREG
   // IRQ_CONNECT(USBREGULATOR_IRQn, DT_IRQ(DT_INST(0, nordic_nrf_clock), priority), nrfx_isr, nrfx_usbreg_irq_handler, 0);
@@ -153,21 +161,6 @@ void board_init(void) {
 #endif
 
   // UART
-  #if NRFX_VER <= 2
-  nrfx_uarte_config_t uart_cfg = {
-      .pseltxd   = UART_TX_PIN,
-      .pselrxd   = UART_RX_PIN,
-      .pselcts   = NRF_UARTE_PSEL_DISCONNECTED,
-      .pselrts   = NRF_UARTE_PSEL_DISCONNECTED,
-      .p_context = NULL,
-      .baudrate  = NRF_UARTE_BAUDRATE_115200, // CFG_BOARD_UART_BAUDRATE
-      .interrupt_priority = 7,
-      .hal_cfg = {
-          .hwfc      = NRF_UARTE_HWFC_DISABLED,
-          .parity    = NRF_UARTE_PARITY_EXCLUDED,
-      }
-  };
-  #else
   nrfx_uarte_config_t uart_cfg = {
       .txd_pin   = UART_TX_PIN,
       .rxd_pin   = UART_RX_PIN,
@@ -181,7 +174,6 @@ void board_init(void) {
           .parity    = NRF_UARTE_PARITY_EXCLUDED,
       }
   };
-  #endif
 
   nrfx_uarte_init(&_uart_id, &uart_cfg, NULL);
 
@@ -191,6 +183,7 @@ void board_init(void) {
   // 2 is highest for application
   NVIC_SetPriority(USBD_IRQn, 2);
 
+#if !defined(NRF54H20_XXAA)
   // USB power may already be ready at this time -> no event generated
   // We need to invoke the handler based on the status initially
   uint32_t usb_reg;
@@ -234,6 +227,7 @@ void board_init(void) {
     tusb_hal_nrf_power_event(USB_EVT_READY);
   }
 #endif
+#endif
 
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
   max3421_init();
@@ -255,7 +249,9 @@ uint32_t board_button_read(void) {
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   (void) max_len;
 
-#ifdef NRF5340_XXAA
+#if defined(NRF54H20_XXAA)
+  uintptr_t did_addr = (uintptr_t) NRF_FICR->BLE.ADDR;
+#elif defined(NRF5340_XXAA)
   uintptr_t did_addr = (uintptr_t) NRF_FICR->INFO.DEVICEID;
 #else
   uintptr_t did_addr = (uintptr_t) NRF_FICR->DEVICEID;
@@ -277,11 +273,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len
-                                 #if NRFX_VER > 2
-                                 ,0
-                                 #endif
-                                );
+  nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len ,0);
   return (NRFX_SUCCESS == err) ? len : 0;
 }
 
@@ -352,18 +344,16 @@ void nrf_error_cb(uint32_t id, uint32_t pc, uint32_t info) {
 // API: SPI transfer with MAX3421E, must be implemented by application
 //--------------------------------------------------------------------+
 #if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-
-#if NRFX_VER <= 2
-void max3421_int_handler(nrfx_gpiote_pin_t pin, nrf_gpiote_polarity_t action ) {
-  if (action != NRF_GPIOTE_POLARITY_HITOLO) return;
-#else
 void max3421_int_handler(nrfx_gpiote_pin_t pin, nrfx_gpiote_trigger_t action, void* p_context) {
   (void) p_context;
-  if (action != NRFX_GPIOTE_TRIGGER_HITOLO) return;
-#endif
+  if (action != NRFX_GPIOTE_TRIGGER_HITOLO) {
+    return;
+  }
+  if (pin != MAX3421_INTR_PIN) {
+    return;
+  }
 
-  if (pin != MAX3421_INTR_PIN) return;
-  tuh_int_handler(1, true);
+  tusb_int_handler(1, true);
 }
 
 static void max3421_init(void) {
@@ -378,13 +368,8 @@ static void max3421_init(void) {
       .sck_pin        = MAX3421_SCK_PIN,
       .mosi_pin       = MAX3421_MOSI_PIN,
       .miso_pin       = MAX3421_MISO_PIN,
-  #if NRFX_VER <= 2
-      .ss_pin         = NRFX_SPIM_PIN_NOT_USED,
-      .frequency      = NRF_SPIM_FREQ_4M,
-  #else
       .ss_pin         = NRF_SPIM_PIN_NOT_CONNECTED,
       .frequency      = 4000000u,
-  #endif
       .ss_active_high = false,
       .irq_priority   = 3,
       .orc            = 0xFF,
@@ -398,14 +383,6 @@ static void max3421_init(void) {
   TU_ASSERT(NRFX_SUCCESS == nrfx_spim_init(&_spi, &cfg, NULL, NULL), );
 
   // max3421e interrupt pin
-  #if NRFX_VER <= 2
-  nrfx_gpiote_init(1);
-  nrfx_gpiote_in_config_t in_config = NRFX_GPIOTE_CONFIG_IN_SENSE_HITOLO(true);
-  in_config.pull = NRF_GPIO_PIN_PULLUP;
-  NVIC_SetPriority(GPIOTE_IRQn, 2);
-  nrfx_gpiote_in_init(MAX3421_INTR_PIN, &in_config, max3421_int_handler);
-  nrfx_gpiote_trigger_enable(MAX3421_INTR_PIN, true);
-  #else
   nrf_gpio_pin_pull_t intr_pull = NRF_GPIO_PIN_PULLUP;
   nrfx_gpiote_trigger_config_t intr_trigger = {
       .trigger = NRFX_GPIOTE_TRIGGER_HITOLO,
@@ -426,7 +403,6 @@ static void max3421_init(void) {
 
   nrfx_gpiote_input_configure(&_gpiote, MAX3421_INTR_PIN, &intr_config);
   nrfx_gpiote_trigger_enable(&_gpiote, MAX3421_INTR_PIN, true);
-  #endif
 }
 
 // API to enable/disable MAX3421 INTR pin interrupt
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 7d0a9f6de..67aa19db2 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -10,17 +10,21 @@ if (NOT board_cmake_included)
 endif ()
 
 # toolchain set up
-if (MCU_VARIANT STREQUAL "nrf5340_application")
+if (MCU_VARIANT STREQUAL nrf5340 OR MCU_VARIANT STREQUAL nrf54h20)
   set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
-  set(JLINK_DEVICE nrf5340_xxaa_app)
+  set(JLINK_DEVICE ${MCU_VARIANT}_xxaa_app)
 else ()
   set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
   set(JLINK_DEVICE ${MCU_VARIANT}_xxaa)
 endif ()
 
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+if (MCU_VARIANT STREQUAL "nrf54h20")
+  set(FAMILY_MCUS NRF54 CACHE INTERNAL "")
+else ()
+  set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
+endif ()
 
-set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 #------------------------------------
 # BOARD_TARGET
@@ -31,36 +35,46 @@ function(add_board_target BOARD_TARGET)
     return()
   endif ()
 
-  if (MCU_VARIANT STREQUAL "nrf5340_application")
-    set(MCU_VARIANT_XXAA "nrf5340_xxaa_application")
-  else ()
-    set(MCU_VARIANT_XXAA "${MCU_VARIANT}_xxaa")
-  endif ()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_XXAA}.ld)
-  endif ()
-
-  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-    set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}.S)
-    set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  endif ()
-
   add_library(${BOARD_TARGET} STATIC
     ${NRFX_PATH}/helpers/nrfx_flag32_allocator.c
     ${NRFX_PATH}/drivers/src/nrfx_gpiote.c
     ${NRFX_PATH}/drivers/src/nrfx_power.c
     ${NRFX_PATH}/drivers/src/nrfx_spim.c
     ${NRFX_PATH}/drivers/src/nrfx_uarte.c
-    ${NRFX_PATH}/mdk/system_${MCU_VARIANT}.c
     ${NRFX_PATH}/soc/nrfx_atomic.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  string(TOUPPER "${MCU_VARIANT_XXAA}" MCU_VARIANT_XXAA_UPPER)
+
+  if (MCU_VARIANT STREQUAL nrf54h20)
+    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${NRFX_PATH}/mdk/system_nrf54h.c
+      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
+    )
+  elseif (MCU_VARIANT STREQUAL nrf5340)
+    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${NRFX_PATH}/mdk/system_${MCU_VARIANT}_application.c
+      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
+      )
+    target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA_APPLICATION)
+  else()
+    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa.ld)
+    target_sources(${BOARD_TARGET} PUBLIC
+      ${NRFX_PATH}/mdk/system_${MCU_VARIANT}.c
+      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}.S
+      )
+  endif ()
+
+  if (NOT DEFINED LD_FILE_GNU)
+    set(LD_FILE_GNU ${LD_FILE_GNU_DEFAULT})
+  endif ()
+
+  string(TOUPPER ${MCU_VARIANT} MCU_VARIANT_UPPER)
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __STARTUP_CLEAR_BSS
     CONFIG_GPIO_AS_PINRESET
-    ${MCU_VARIANT_XXAA_UPPER}
+    ${MCU_VARIANT_UPPER}_XXAA
+    NRF_APPLICATION
     )
 
   if (TRACE_ETM STREQUAL "1")
@@ -137,13 +151,16 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
   # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_NRF5X)
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
   target_sources(${TARGET} PRIVATE
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
     )
 
   # Flashing
-#  family_add_bin_hex(${TARGET})
+  #  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-#  family_flash_adafruit_nrfutil(${TARGET})
+  #  family_flash_adafruit_nrfutil(${TARGET})
 endfunction()
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index a8acb1624..f3a6e2cc1 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -5,7 +5,15 @@ NRFX_PATH = hw/mcu/nordic/nrfx
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 # nRF52 is cortex-m4, nRF53 is cortex-m33
-CPU_CORE ?= cortex-m4
+ifeq (${MCU_VARIANT},nrf5340_application)
+	CPU_CORE = cortex-m33
+else
+ifeq (${MCU_VARIANT},nrf54h20_application)
+	CPU_CORE = cortex-m33
+else
+	CPU_CORE = cortex-m4
+endif
+endif
 
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_NRF5X \
diff --git a/hw/bsp/nrf/linker/nrf52833_xxaa.ld b/hw/bsp/nrf/linker/nrf52833_xxaa.ld
index ae4d0e5b3..f4c46a3f1 100644
--- a/hw/bsp/nrf/linker/nrf52833_xxaa.ld
+++ b/hw/bsp/nrf/linker/nrf52833_xxaa.ld
@@ -12,9 +12,3 @@ MEMORY
 
 
 INCLUDE "nrf_common.ld"
-
-/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
-__tbss_start__ = __tbss_start;
-__tbss_end__ = __tbss_end;
-__sbss_start__ = __sbss_start;
-__sbss_end__ = __sbss_end;
diff --git a/hw/bsp/nrf/linker/nrf52840_s140_v6.ld b/hw/bsp/nrf/linker/nrf52840_s140_v6.ld
index 037a14196..1a2292269 100644
--- a/hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+++ b/hw/bsp/nrf/linker/nrf52840_s140_v6.ld
@@ -36,9 +36,3 @@ SECTIONS
 } INSERT AFTER .data;
 
 INCLUDE "nrf_common.ld"
-
-/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
-__tbss_start__ = __tbss_start;
-__tbss_end__ = __tbss_end;
-__sbss_start__ = __sbss_start;
-__sbss_end__ = __sbss_end;
diff --git a/hw/bsp/nrf/linker/nrf52840_xxaa.ld b/hw/bsp/nrf/linker/nrf52840_xxaa.ld
index 2d20ba7ac..fcfe08a60 100644
--- a/hw/bsp/nrf/linker/nrf52840_xxaa.ld
+++ b/hw/bsp/nrf/linker/nrf52840_xxaa.ld
@@ -12,9 +12,3 @@ MEMORY
 }
 
 INCLUDE "nrf_common.ld"
-
-/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
-__tbss_start__ = __tbss_start;
-__tbss_end__ = __tbss_end;
-__sbss_start__ = __sbss_start;
-__sbss_end__ = __sbss_end;
diff --git a/hw/bsp/nrf/linker/nrf5340_xxaa_application.ld b/hw/bsp/nrf/linker/nrf5340_xxaa_application.ld
index 31762d0b2..7fd682a40 100644
--- a/hw/bsp/nrf/linker/nrf5340_xxaa_application.ld
+++ b/hw/bsp/nrf/linker/nrf5340_xxaa_application.ld
@@ -13,9 +13,3 @@ MEMORY
 
 
 INCLUDE "nrf_common.ld"
-
-/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
-__tbss_start__ = __tbss_start;
-__tbss_end__ = __tbss_end;
-__sbss_start__ = __sbss_start;
-__sbss_end__ = __sbss_end;
diff --git a/hw/bsp/nrf/linker/nrf54h20_xxaa_application.ld b/hw/bsp/nrf/linker/nrf54h20_xxaa_application.ld
new file mode 100644
index 000000000..0c8d7127a
--- /dev/null
+++ b/hw/bsp/nrf/linker/nrf54h20_xxaa_application.ld
@@ -0,0 +1,21 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+/*GROUP(-lgcc -lc) not compatible with clang*/
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0xE0A0000, LENGTH = 0x40000 /* Inside global MRAM0 */
+  FLASH1 (rx) : ORIGIN = 0x2F840000, LENGTH = 0x4000 /* OTP0 */
+  EXTFLASH (rx) : ORIGIN = 0x70000000, LENGTH = 0x20000000
+  RAM (rwx) : ORIGIN = 0x22000000, LENGTH = 0x8000
+  RAM1 (rwx) : ORIGIN = 0x2F000000, LENGTH = 0x80000 /* RAM00 */
+  RAM2 (rwx) : ORIGIN = 0x2F080000, LENGTH = 0x60000 /* RAM01 */
+  RAM3 (rwx) : ORIGIN = 0x2F880000, LENGTH = 0x10000 /* RAM20 */
+  RAM4 (rwx) : ORIGIN = 0x2F890000, LENGTH = 0x8000 /* RAM21 */
+  RAM5 (rwx) : ORIGIN = 0x2FC00000, LENGTH = 0x4000 /* RAM30 (low-speed) */
+  RAM6 (rwx) : ORIGIN = 0x2FC04000, LENGTH = 0x4000 /* RAM31 (low-speed) */
+}
+
+
+INCLUDE "nrf_common.ld"
diff --git a/hw/bsp/nrf/nrfx_config/nrfx_config.h b/hw/bsp/nrf/nrfx_config/nrfx_config.h
index fbec4192b..88431e42c 100644
--- a/hw/bsp/nrf/nrfx_config/nrfx_config.h
+++ b/hw/bsp/nrf/nrfx_config/nrfx_config.h
@@ -1,46 +1,111 @@
+/*
+ * Copyright (c) 2019 - 2025, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
 #ifndef NRFX_CONFIG_H__
 #define NRFX_CONFIG_H__
 
-#define NRFX_POWER_ENABLED   1
-#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
-
-#define NRFX_CLOCK_ENABLED   0
-#define NRFX_GPIOTE_ENABLED  1
-#define NRFX_GPIOTE0_ENABLED 1
-
-#define NRFX_UARTE_ENABLED   1
-#define NRFX_UARTE0_ENABLED  1
-
-#define NRFX_SPIM_ENABLED    1
-#define NRFX_SPIM1_ENABLED   1 // use SPI1 since nrf5340 share uart with spi
-
-#define NRFX_PRS_ENABLED     0
-#define NRFX_USBREG_ENABLED  1
+#include "nrfx_config_common.h"
 
 #if defined(NRF51)
-#include <templates/nrfx_config_nrf51.h>
+    #include <templates/nrfx_config_nrf51.h>
 #elif defined(NRF52805_XXAA)
-#include <templates/nrfx_config_nrf52805.h>
+    #include <templates/nrfx_config_nrf52805.h>
 #elif defined(NRF52810_XXAA)
-#include <templates/nrfx_config_nrf52810.h>
+    #include <templates/nrfx_config_nrf52810.h>
 #elif defined(NRF52811_XXAA)
-#include <templates/nrfx_config_nrf52811.h>
+    #include <templates/nrfx_config_nrf52811.h>
 #elif defined(NRF52820_XXAA)
-#include <templates/nrfx_config_nrf52820.h>
+    #include <templates/nrfx_config_nrf52820.h>
 #elif defined(NRF52832_XXAA) || defined (NRF52832_XXAB)
-#include <templates/nrfx_config_nrf52832.h>
+    #include <templates/nrfx_config_nrf52832.h>
 #elif defined(NRF52833_XXAA)
-#include <templates/nrfx_config_nrf52833.h>
+    #include <templates/nrfx_config_nrf52833.h>
 #elif defined(NRF52840_XXAA)
-#include <templates/nrfx_config_nrf52840.h>
+    #include <templates/nrfx_config_nrf52840.h>
 #elif defined(NRF5340_XXAA_APPLICATION)
-#include <templates/nrfx_config_nrf5340_application.h>
+    #include <templates/nrfx_config_nrf5340_application.h>
 #elif defined(NRF5340_XXAA_NETWORK)
     #include <templates/nrfx_config_nrf5340_network.h>
+#elif defined(NRF54H20_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54h20_application.h>
+#elif defined(NRF54H20_XXAA) && defined(NRF_RADIOCORE)
+    #include <templates/nrfx_config_nrf54h20_radiocore.h>
+#elif defined(NRF54H20_XXAA) && defined(NRF_PPR)
+    #include <templates/nrfx_config_nrf54h20_ppr.h>
+#elif defined(NRF54H20_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54h20_flpr.h>
+#elif defined(NRF54L05_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54l05_application.h>
+#elif defined(NRF54L05_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54l05_flpr.h>
+#elif defined(NRF54L10_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54l10_application.h>
+#elif defined(NRF54L10_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54l10_flpr.h>
+#elif defined(NRF54L15_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54l15_application.h>
+#elif defined(NRF54L15_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54l15_flpr.h>
+#elif defined(NRF54LM20A_ENGA_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54lm20a_enga_application.h>
+#elif defined(NRF54LM20A_ENGA_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54lm20a_enga_flpr.h>
+#elif defined(NRF54LS05B_ENGA_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54ls05b_application.h>
+#elif defined(NRF54LV10A_ENGA_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf54lv10a_enga_application.h>
+#elif defined(NRF54LV10A_ENGA_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf54lv10a_enga_flpr.h>
+#elif defined(NRF7120_ENGA_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf7120_application.h>
+#elif defined(NRF7120_ENGA_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf7120_flpr.h>
+#elif defined(NRF7120_ENGA_XXAA) && defined(NRF_LMAC)
+    #include <templates/nrfx_config_nrf7120_lmac.h>
+#elif defined(NRF7120_ENGA_XXAA) && defined(NRF_UMAC)
+    #include <templates/nrfx_config_nrf7120_umac.h>
 #elif defined(NRF9120_XXAA) || defined(NRF9160_XXAA)
     #include <templates/nrfx_config_nrf91.h>
+#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_APPLICATION)
+    #include <templates/nrfx_config_nrf9230_engb_application.h>
+#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_RADIOCORE)
+    #include <templates/nrfx_config_nrf9230_engb_radiocore.h>
+#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_PPR)
+    #include <templates/nrfx_config_nrf9230_engb_ppr.h>
+#elif defined(NRF9230_ENGB_XXAA) && defined(NRF_FLPR)
+    #include <templates/nrfx_config_nrf9230_engb_flpr.h>
 #else
-    #error "Unknown device."
+    #include "nrfx_config_ext.h"
 #endif
 
 #endif // NRFX_CONFIG_H__
diff --git a/hw/bsp/nrf/nrfx_config/nrfx_config_common.h b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
new file mode 100644
index 000000000..1d75e5a66
--- /dev/null
+++ b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2022 - 2025, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_CONFIG_COMMON_H__
+#define NRFX_CONFIG_COMMON_H__
+
+#ifndef NRFX_CONFIG_H__
+#error "This file should not be included directly. Include nrfx_config.h instead."
+#endif
+
+/** @brief Symbol specifying major version of the nrfx API to be used. */
+#ifndef NRFX_CONFIG_API_VER_MAJOR
+#define NRFX_CONFIG_API_VER_MAJOR 3
+#endif
+
+/** @brief Symbol specifying minor version of the nrfx API to be used. */
+#ifndef NRFX_CONFIG_API_VER_MINOR
+#define NRFX_CONFIG_API_VER_MINOR 12
+#endif
+
+/** @brief Symbol specifying micro version of the nrfx API to be used. */
+#ifndef NRFX_CONFIG_API_VER_MICRO
+#define NRFX_CONFIG_API_VER_MICRO 0
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+#define NRFX_CLOCK_ENABLED   0
+#define NRFX_UARTE_ENABLED   1
+
+#if defined(NRF54H20_XXAA)
+#define NRFX_UARTE120_ENABLED  1
+#define CFG_NRFX_UARTE_INSTANCE_ID 120
+
+#else
+
+#define NRFX_POWER_ENABLED   1
+#define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
+
+#define NRFX_UARTE0_ENABLED  1
+#define CFG_NRFX_UARTE_INSTANCE_ID 0
+
+#define NRFX_GPIOTE_ENABLED  1
+#define NRFX_GPIOTE0_ENABLED 1
+
+#define NRFX_SPIM_ENABLED    1
+#define NRFX_SPIM1_ENABLED   1 // use SPI1 since nrf5340 share uart with spi
+#endif
+
+#define NRFX_PRS_ENABLED     0
+#define NRFX_USBREG_ENABLED  1
+
+#define NRF_STATIC_INLINE static inline
+
+#endif /* NRFX_CONFIG_COMMON_H__ */
diff --git a/hw/bsp/nrf/nrfx_config/nrfx_config_ext.h b/hw/bsp/nrf/nrfx_config/nrfx_config_ext.h
new file mode 100644
index 000000000..e503e1399
--- /dev/null
+++ b/hw/bsp/nrf/nrfx_config/nrfx_config_ext.h
@@ -0,0 +1,39 @@
+/*
+ * Copyright (c) 2023 - 2025, Nordic Semiconductor ASA
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice, this
+ *    list of conditions and the following disclaimer.
+ *
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * 3. Neither the name of the copyright holder nor the names of its
+ *    contributors may be used to endorse or promote products derived from this
+ *    software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef NRFX_CONFIG_EXT_H__
+#define NRFX_CONFIG_EXT_H__
+
+#error "Unknown device."
+
+#endif // NRFX_CONFIG_EXT_H__
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1c11df114..1f8975e55 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -137,6 +137,12 @@
   // 8 CBI + 1 ISO
   #define TUP_DCD_ENDPOINT_MAX    9
 
+#elif TU_CHECK_MCU(OPT_MCU_NRF54)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_NRF
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
+
 //--------------------------------------------------------------------+
 // Microchip
 //--------------------------------------------------------------------+
diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h
index 33219f786..0166b0261 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.h
+++ b/src/portable/synopsys/dwc2/dwc2_common.h
@@ -51,6 +51,8 @@
   #include "dwc2_xmc.h"
 #elif defined(TUP_USBIP_DWC2_AT32)
   #include "dwc2_at32.h"
+#elif defined(TUP_USBIP_DWC2_NRF)
+  #include "dwc2_nrf.h"
 #else
   #error "Unsupported MCUs"
 #endif
diff --git a/src/portable/synopsys/dwc2/dwc2_nrf.h b/src/portable/synopsys/dwc2/dwc2_nrf.h
new file mode 100644
index 000000000..b93571f16
--- /dev/null
+++ b/src/portable/synopsys/dwc2/dwc2_nrf.h
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_DWC2_NRF_H
+#define TUSB_DWC2_NRF_H
+
+#include "nrf.h"
+
+#define DWC2_EP_MAX 16
+
+static const dwc2_controller_t _dwc2_controller[] = {
+  { .reg_base = NRF_USBHSCORE0_NS_BASE, .irqnum = USBHS_IRQn, .ep_count = 16, .ep_fifo_size = 12288 },
+};
+
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
+  (void) rhport;
+  (void) role;
+  (void) enabled;
+}
+
+#define dwc2_dcd_int_enable(_rhport)  dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, true)
+#define dwc2_dcd_int_disable(_rhport) dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, false)
+
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
+}
+
+// MCU specific PHY init, called BEFORE core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_init(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
+}
+
+// MCU specific PHY update, it is called AFTER init() and core reset
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint8_t hs_phy_type) {
+  (void)dwc2;
+  (void)hs_phy_type;
+}
+
+#endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 378b5607e..dd57f6296 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -62,7 +62,8 @@
 #define OPT_MCU_LPC55XX            OPT_MCU_LPC55
 
 // NRF
-#define OPT_MCU_NRF5X             100 ///< Nordic nRF5x series
+#define OPT_MCU_NRF5X             100 ///< Nordic nRF 52,53 series
+#define OPT_MCU_NRF54             101 ///< Nordic nRF54 series
 
 // SAM
 #define OPT_MCU_SAMD21            200 ///< MicroChip SAMD21
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 36ed98a62..c243137fa 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -47,7 +47,7 @@ deps_optional = {
                                   'b93e856211060ae825216c6a1d6aa347ec758843',
                                   'mm32'],
     'hw/mcu/nordic/nrfx': ['https://github.com/NordicSemiconductor/nrfx.git',
-                           '7c47cc0a56ce44658e6da2458e86cd8783ccc4a2',
+                           '11f57e578c7feea13f21c79ea0efab2630ac68c7',
                            'nrf'],
     'hw/mcu/nuvoton': ['https://github.com/majbthrd/nuc_driver.git',
                        '2204191ec76283371419fbcec207da02e1bc22fa',
-- 
cgit v1.3.1


From dacbe8ee311d4a2eda06e4aca8c29529736abfd7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Oct 2025 14:48:07 +0700
Subject: update make build system rename pca10095 to nrf5340dk

---
 hw/bsp/nrf/boards/adafruit_clue/board.mk           |   2 +-
 .../boards/circuitplayground_bluefruit/board.mk    |   2 +-
 .../nrf/boards/feather_nrf52840_express/board.mk   |   2 +-
 hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk  |   2 +-
 hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk      |   2 +-
 hw/bsp/nrf/boards/nrf52833dk/board.mk              |   2 +-
 hw/bsp/nrf/boards/nrf5340dk/board.cmake            |   4 +
 hw/bsp/nrf/boards/nrf5340dk/board.h                |  65 ++++
 hw/bsp/nrf/boards/nrf5340dk/board.mk               |  12 +
 hw/bsp/nrf/boards/nrf5340dk/ozone/nrf5340.jdebug   | 335 +++++++++++++++++++++
 hw/bsp/nrf/boards/nrf54h20dk/board.mk              |   6 +-
 hw/bsp/nrf/boards/pca10056/board.mk                |   2 -
 hw/bsp/nrf/boards/pca10059/pca10059.ld             |   6 -
 hw/bsp/nrf/boards/pca10095/board.cmake             |   8 -
 hw/bsp/nrf/boards/pca10095/board.h                 |  65 ----
 hw/bsp/nrf/boards/pca10095/board.mk                |  16 -
 hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug    | 335 ---------------------
 hw/bsp/nrf/family.cmake                            |   1 +
 hw/bsp/nrf/family.mk                               |  39 ++-
 19 files changed, 453 insertions(+), 453 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/nrf5340dk/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf5340dk/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf5340dk/board.mk
 create mode 100644 hw/bsp/nrf/boards/nrf5340dk/ozone/nrf5340.jdebug
 delete mode 100644 hw/bsp/nrf/boards/pca10095/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/pca10095/board.h
 delete mode 100644 hw/bsp/nrf/boards/pca10095/board.mk
 delete mode 100644 hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug

(limited to 'hw')

diff --git a/hw/bsp/nrf/boards/adafruit_clue/board.mk b/hw/bsp/nrf/boards/adafruit_clue/board.mk
index b80807963..e6fcdd9b0 100644
--- a/hw/bsp/nrf/boards/adafruit_clue/board.mk
+++ b/hw/bsp/nrf/boards/adafruit_clue/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52840_s140_v6.ld
 
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
diff --git a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
index b80807963..e6fcdd9b0 100644
--- a/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
+++ b/hw/bsp/nrf/boards/circuitplayground_bluefruit/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52840_s140_v6.ld
 
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
index 488f07b82..d33b3558a 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_express/board.mk
@@ -5,7 +5,7 @@ CFLAGS += -DNRF52840_XXAA
 MAX3421_HOST = 1
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52840_s140_v6.ld
 
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
diff --git a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
index b80807963..e6fcdd9b0 100644
--- a/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
+++ b/hw/bsp/nrf/boards/feather_nrf52840_sense/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52840_s140_v6.ld
 
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
diff --git a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
index b80807963..e6fcdd9b0 100644
--- a/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
+++ b/hw/bsp/nrf/boards/itsybitsy_nrf52840/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
 # All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nrf/linker/nrf52840_s140_v6.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52840_s140_v6.ld
 
 $(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
 	adafruit-nrfutil dfu genpkg --dev-type 0x0052 --sd-req 0xFFFE --application $^ $@
diff --git a/hw/bsp/nrf/boards/nrf52833dk/board.mk b/hw/bsp/nrf/boards/nrf52833dk/board.mk
index 5fba269b7..7cf00cbc1 100644
--- a/hw/bsp/nrf/boards/nrf52833dk/board.mk
+++ b/hw/bsp/nrf/boards/nrf52833dk/board.mk
@@ -1,7 +1,7 @@
 MCU_VARIANT = nrf52833
 CFLAGS += -DNRF52833_XXAA
 
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52833_xxaa.ld
+LD_FILE = ${FAMILY_PATH}/linker/nrf52833_xxaa.ld
 
 # flash using jlink
 flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/nrf5340dk/board.cmake b/hw/bsp/nrf/boards/nrf5340dk/board.cmake
new file mode 100644
index 000000000..fe766dd78
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf5340dk/board.cmake
@@ -0,0 +1,4 @@
+set(MCU_VARIANT nrf5340)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf5340dk/board.h b/hw/bsp/nrf/boards/nrf5340dk/board.h
new file mode 100644
index 000000000..1c7981049
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf5340dk/board.h
@@ -0,0 +1,65 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF5340 DK
+   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED
+#define LED_PIN               28
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            23
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           22
+#define UART_TX_PIN           20
+
+// SPI for USB host shield
+// Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !?
+//#define MAX3421_SCK_PIN  _PINNUM(1, 15)
+//#define MAX3421_MOSI_PIN _PINNUM(1, 13)
+//#define MAX3421_MISO_PIN _PINNUM(1, 14)
+//#define MAX3421_CS_PIN   _PINNUM(1, 12)
+//#define MAX3421_INTR_PIN _PINNUM(1, 11)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf5340dk/board.mk b/hw/bsp/nrf/boards/nrf5340dk/board.mk
new file mode 100644
index 000000000..972168fcd
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf5340dk/board.mk
@@ -0,0 +1,12 @@
+MCU_VARIANT = nrf5340
+CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION
+
+# enable max3421 host driver for this board
+MAX3421_HOST = 1
+
+# caused by void SystemStoreFICRNS() (without void) in system_nrf5340_application.c
+CFLAGS += -Wno-error=strict-prototypes
+
+# flash using jlink
+JLINK_DEVICE = nrf5340_xxaa_app
+flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/nrf5340dk/ozone/nrf5340.jdebug b/hw/bsp/nrf/boards/nrf5340dk/ozone/nrf5340.jdebug
new file mode 100644
index 000000000..4ad0376a4
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf5340dk/ozone/nrf5340.jdebug
@@ -0,0 +1,335 @@
+/*********************************************************************
+*                 (c) SEGGER Microcontroller GmbH                    *
+*                      The Embedded Experts                          *
+*                         www.segger.com                             *
+**********************************************************************
+
+File          :
+Created       : 30 Jun 2021 13:37
+Ozone Version : V3.24a
+*/
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  // Dialog-generated settings
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M33F.svd");
+  Project.AddSvdFile ("./nrf5340_application.svd");
+  Project.SetDevice ("nRF5340_xxAA_APP");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("16 MHz");
+
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  // User settings
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10095/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*       OnStartupComplete
+*
+* Function description
+*   Called when program execution has reached/passed
+*   the startup completion point. Optional.
+*
+**********************************************************************
+*/
+//void OnStartupComplete (void) {
+//}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging an application in RAM on a Cortex-M target device.
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//  //
+//  // Set up initial stack pointer
+//  //
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//  }
+//  //
+//  // Set up entry point PC
+//  //
+//  PC = Elf.GetEntryPointPC();
+//
+//  if (PC != 0xFFFFFFFF) {
+//    Target.SetReg("PC", PC);
+//  } else if (VectorTableAddr != 0xFFFFFFFF) {
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  } else {
+//    Util.Error("Project file error: failed to set entry point PC", 1);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+**
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetResume
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetResume (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotLoad
+*
+* Function description
+*   Called upon loading a snapshot. Optional.
+*
+* Additional information
+*   This function is used to restore the target state in cases
+*   where values cannot simply be written to the target.
+*   Typical use: GPIO clock needs to be enabled, before
+*   GPIO is configured.
+*
+**********************************************************************
+*/
+//void OnSnapshotLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotSave
+*
+* Function description
+*   Called upon saving a snapshot. Optional.
+*
+* Additional information
+*   This function is usually used to save values of the target
+*   state which can either not be trivially read,
+*   or need to be restored in a specific way or order.
+*   Typically use: Memory Mapped Registers,
+*   such as PLL and GPIO configuration.
+*
+**********************************************************************
+*/
+//void OnSnapshotSave (void) {
+//}
+
+/*********************************************************************
+*
+*       OnError
+*
+* Function description
+*   Called when an error occurred. Optional.
+*
+**********************************************************************
+*/
+//void OnError (void) {
+//}
+
+/*********************************************************************
+*
+*       _SetupTarget
+*
+* Function description
+*   Setup the target.
+*   Called by AfterTargetReset() and AfterTargetDownload().
+*
+*   Auto-generated function. May be overridden by Ozone.
+*
+**********************************************************************
+*/
+void _SetupTarget(void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+  //
+  // Set up initial stack pointer
+  //
+  SP = Target.ReadU32(VectorTableAddr);
+  if (SP != 0xFFFFFFFF) {
+    Target.SetReg("SP", SP);
+  }
+  //
+  // Set up entry point PC
+  //
+  PC = Elf.GetEntryPointPC();
+  if (PC != 0xFFFFFFFF) {
+    Target.SetReg("PC", PC);
+  } else {
+    Util.Error("Project script error: failed to set up entry point PC", 1);
+  }
+}
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.mk b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
index 157ba3c36..c49b605e8 100644
--- a/hw/bsp/nrf/boards/nrf54h20dk/board.mk
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
@@ -1,13 +1,9 @@
-MCU_VARIANT = nrf54h20_application
+MCU_VARIANT = nrf54h20
 CFLAGS += -DNRF54H20_XXAA
 
 # enable max3421 host driver for this board
 MAX3421_HOST = 1
 
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld
-
-SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c
-
 # caused by void SystemStoreFICRNS() (without void) in system_nrf5340_application.c
 CFLAGS += -Wno-error=strict-prototypes
 
diff --git a/hw/bsp/nrf/boards/pca10056/board.mk b/hw/bsp/nrf/boards/pca10056/board.mk
index be2ed3314..d8bbd41f8 100644
--- a/hw/bsp/nrf/boards/pca10056/board.mk
+++ b/hw/bsp/nrf/boards/pca10056/board.mk
@@ -1,7 +1,5 @@
 MCU_VARIANT = nrf52840
 CFLAGS += -DNRF52840_XXAA
 
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf52840_xxaa.ld
-
 # flash using jlink
 flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/pca10059/pca10059.ld b/hw/bsp/nrf/boards/pca10059/pca10059.ld
index adc80f3c4..32cc6eada 100644
--- a/hw/bsp/nrf/boards/pca10059/pca10059.ld
+++ b/hw/bsp/nrf/boards/pca10059/pca10059.ld
@@ -11,9 +11,3 @@ MEMORY
 
 
 INCLUDE "nrf_common.ld"
-
-/* nrfx v2 linker does not define __tbss_start/end__ __sbss_start/end__*/
-__tbss_start__ = __tbss_start;
-__tbss_end__ = __tbss_end;
-__sbss_start__ = __sbss_start;
-__sbss_end__ = __sbss_end;
diff --git a/hw/bsp/nrf/boards/pca10095/board.cmake b/hw/bsp/nrf/boards/pca10095/board.cmake
deleted file mode 100644
index a2bfeec89..000000000
--- a/hw/bsp/nrf/boards/pca10095/board.cmake
+++ /dev/null
@@ -1,8 +0,0 @@
-#set(MCU_VARIANT nrf5340_application)
-set(MCU_VARIANT nrf5340)
-
-function(update_board TARGET)
-  target_sources(${TARGET} PRIVATE
-    ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
-    )
-endfunction()
diff --git a/hw/bsp/nrf/boards/pca10095/board.h b/hw/bsp/nrf/boards/pca10095/board.h
deleted file mode 100644
index 1c7981049..000000000
--- a/hw/bsp/nrf/boards/pca10095/board.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Nordic nRF5340 DK
-   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               28
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            23
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           22
-#define UART_TX_PIN           20
-
-// SPI for USB host shield
-// Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !?
-//#define MAX3421_SCK_PIN  _PINNUM(1, 15)
-//#define MAX3421_MOSI_PIN _PINNUM(1, 13)
-//#define MAX3421_MISO_PIN _PINNUM(1, 14)
-//#define MAX3421_CS_PIN   _PINNUM(1, 12)
-//#define MAX3421_INTR_PIN _PINNUM(1, 11)
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/pca10095/board.mk b/hw/bsp/nrf/boards/pca10095/board.mk
deleted file mode 100644
index 9a973150d..000000000
--- a/hw/bsp/nrf/boards/pca10095/board.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-MCU_VARIANT = nrf5340_application
-CFLAGS += -DNRF5340_XXAA -DNRF5340_XXAA_APPLICATION
-
-# enable max3421 host driver for this board
-MAX3421_HOST = 1
-
-LD_FILE = hw/mcu/nordic/nrfx/mdk/nrf5340_xxaa_application.ld
-
-SRC_C += hw/mcu/nordic/nrfx/drivers/src/nrfx_usbreg.c
-
-# caused by void SystemStoreFICRNS() (without void) in system_nrf5340_application.c
-CFLAGS += -Wno-error=strict-prototypes
-
-# flash using jlink
-JLINK_DEVICE = nrf5340_xxaa_app
-flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug b/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug
deleted file mode 100644
index 4ad0376a4..000000000
--- a/hw/bsp/nrf/boards/pca10095/ozone/nrf5340.jdebug
+++ /dev/null
@@ -1,335 +0,0 @@
-/*********************************************************************
-*                 (c) SEGGER Microcontroller GmbH                    *
-*                      The Embedded Experts                          *
-*                         www.segger.com                             *
-**********************************************************************
-
-File          :
-Created       : 30 Jun 2021 13:37
-Ozone Version : V3.24a
-*/
-
-/*********************************************************************
-*
-*       OnProjectLoad
-*
-* Function description
-*   Project load routine. Required.
-*
-**********************************************************************
-*/
-void OnProjectLoad (void) {
-  // Dialog-generated settings
-  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M33F.svd");
-  Project.AddSvdFile ("./nrf5340_application.svd");
-  Project.SetDevice ("nRF5340_xxAA_APP");
-  Project.SetHostIF ("USB", "");
-  Project.SetTargetIF ("SWD");
-  Project.SetTIFSpeed ("16 MHz");
-
-  Project.SetTraceSource ("Trace Pins");
-  Project.SetTracePortWidth (4);
-
-  // User settings
-  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10095/cdc_msc.elf");
-}
-
-/*********************************************************************
-*
-*       OnStartupComplete
-*
-* Function description
-*   Called when program execution has reached/passed
-*   the startup completion point. Optional.
-*
-**********************************************************************
-*/
-//void OnStartupComplete (void) {
-//}
-
-/*********************************************************************
-*
-*      TargetReset
-*
-* Function description
-*   Replaces the default target device reset routine. Optional.
-*
-* Notes
-*   This example demonstrates the usage when
-*   debugging an application in RAM on a Cortex-M target device.
-*
-**********************************************************************
-*/
-//void TargetReset (void) {
-//
-//  unsigned int SP;
-//  unsigned int PC;
-//  unsigned int VectorTableAddr;
-//
-//  VectorTableAddr = Elf.GetBaseAddr();
-//  //
-//  // Set up initial stack pointer
-//  //
-//  if (VectorTableAddr != 0xFFFFFFFF) {
-//    SP = Target.ReadU32(VectorTableAddr);
-//    Target.SetReg("SP", SP);
-//  }
-//  //
-//  // Set up entry point PC
-//  //
-//  PC = Elf.GetEntryPointPC();
-//
-//  if (PC != 0xFFFFFFFF) {
-//    Target.SetReg("PC", PC);
-//  } else if (VectorTableAddr != 0xFFFFFFFF) {
-//    PC = Target.ReadU32(VectorTableAddr + 4);
-//    Target.SetReg("PC", PC);
-//  } else {
-//    Util.Error("Project file error: failed to set entry point PC", 1);
-//  }
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetReset
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetReset (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetReset
-*
-* Function description
-*   Event handler routine. Optional.
-*   The default implementation initializes SP and PC to reset values.
-**
-**********************************************************************
-*/
-void AfterTargetReset (void) {
-  _SetupTarget();
-}
-
-/*********************************************************************
-*
-*       DebugStart
-*
-* Function description
-*   Replaces the default debug session startup routine. Optional.
-*
-**********************************************************************
-*/
-//void DebugStart (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetConnect
-*
-* Function description
-*   Replaces the default target IF connection routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-void BeforeTargetConnect (void) {
-}
-
-/*********************************************************************
-*
-*       AfterTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetDownload
-*
-* Function description
-*   Replaces the default program download routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetDownload
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*      AfterTargetDownload
-*
-* Function description
-*   Event handler routine. Optional.
-*   The default implementation initializes SP and PC to reset values.
-*
-**********************************************************************
-*/
-void AfterTargetDownload (void) {
-  _SetupTarget();
-}
-
-/*********************************************************************
-*
-*       BeforeTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetHalt
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetHalt (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetResume
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetResume (void) {
-//}
-
-/*********************************************************************
-*
-*       OnSnapshotLoad
-*
-* Function description
-*   Called upon loading a snapshot. Optional.
-*
-* Additional information
-*   This function is used to restore the target state in cases
-*   where values cannot simply be written to the target.
-*   Typical use: GPIO clock needs to be enabled, before
-*   GPIO is configured.
-*
-**********************************************************************
-*/
-//void OnSnapshotLoad (void) {
-//}
-
-/*********************************************************************
-*
-*       OnSnapshotSave
-*
-* Function description
-*   Called upon saving a snapshot. Optional.
-*
-* Additional information
-*   This function is usually used to save values of the target
-*   state which can either not be trivially read,
-*   or need to be restored in a specific way or order.
-*   Typically use: Memory Mapped Registers,
-*   such as PLL and GPIO configuration.
-*
-**********************************************************************
-*/
-//void OnSnapshotSave (void) {
-//}
-
-/*********************************************************************
-*
-*       OnError
-*
-* Function description
-*   Called when an error occurred. Optional.
-*
-**********************************************************************
-*/
-//void OnError (void) {
-//}
-
-/*********************************************************************
-*
-*       _SetupTarget
-*
-* Function description
-*   Setup the target.
-*   Called by AfterTargetReset() and AfterTargetDownload().
-*
-*   Auto-generated function. May be overridden by Ozone.
-*
-**********************************************************************
-*/
-void _SetupTarget(void) {
-  unsigned int SP;
-  unsigned int PC;
-  unsigned int VectorTableAddr;
-
-  VectorTableAddr = Elf.GetBaseAddr();
-  //
-  // Set up initial stack pointer
-  //
-  SP = Target.ReadU32(VectorTableAddr);
-  if (SP != 0xFFFFFFFF) {
-    Target.SetReg("SP", SP);
-  }
-  //
-  // Set up entry point PC
-  //
-  PC = Elf.GetEntryPointPC();
-  if (PC != 0xFFFFFFFF) {
-    Target.SetReg("PC", PC);
-  } else {
-    Util.Error("Project script error: failed to set up entry point PC", 1);
-  }
-}
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 67aa19db2..8cebcbedd 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -55,6 +55,7 @@ function(add_board_target BOARD_TARGET)
     target_sources(${BOARD_TARGET} PUBLIC
       ${NRFX_PATH}/mdk/system_${MCU_VARIANT}_application.c
       ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
+      ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
       )
     target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA_APPLICATION)
   else()
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index f3a6e2cc1..2cead99db 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -4,19 +4,37 @@ NRFX_PATH = hw/mcu/nordic/nrfx
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
-# nRF52 is cortex-m4, nRF53 is cortex-m33
-ifeq (${MCU_VARIANT},nrf5340_application)
+ifeq (${MCU_VARIANT},nrf54h20)
 	CPU_CORE = cortex-m33
+	CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF54
+	LD_FILE_DEFAULT = ${FAMILY_PATH}/linker/${MCU_VARIANT}_xxaa_application.ld
+	SRC_C += ${NRFX_PATH}/mdk/system_nrf54h.c
+	SRC_S += ${NRFX_PATH}/mdk/gcc_startup_$(MCU_VARIANT)_application.S
+	JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa_app
+
 else
-ifeq (${MCU_VARIANT},nrf54h20_application)
+ifeq (${MCU_VARIANT},nrf5340)
 	CPU_CORE = cortex-m33
+	CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF5X
+	LD_FILE_DEFAULT = ${FAMILY_PATH}/linker/${MCU_VARIANT}_xxaa_application.ld
+	SRC_C += ${NRFX_PATH}/mdk/system_$(MCU_VARIANT)_application.c \
+					 ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
+	SRC_S += ${NRFX_PATH}/mdk/gcc_startup_$(MCU_VARIANT)_application.S
+  JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa_app
+
 else
+
 	CPU_CORE = cortex-m4
+	CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF5X
+	LD_FILE_DEFAULT = ${FAMILY_PATH}/linker/${MCU_VARIANT}_xxaa.ld
+	SRC_C += ${NRFX_PATH}/mdk/system_$(MCU_VARIANT).c
+	SRC_S += ${NRFX_PATH}/mdk/gcc_startup_$(MCU_VARIANT).S
+	JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa
 endif
 endif
 
 CFLAGS += \
-  -DCFG_TUSB_MCU=OPT_MCU_NRF5X \
+  -DNRF_APPLICATION \
   -DCONFIG_GPIO_AS_PINRESET \
   -D__STARTUP_CLEAR_BSS
 
@@ -41,14 +59,20 @@ LDFLAGS_GCC += \
 LDFLAGS_CLANG += \
   -L$(TOP)/${NRFX_PATH}/mdk \
 
+ifndef LD_FILE
+LD_FILE = ${LD_FILE_DEFAULT}
+endif
+
 SRC_C += \
   src/portable/nordic/nrf5x/dcd_nrf5x.c \
+  src/portable/synopsys/dwc2/dwc2_common.c \
+	src/portable/synopsys/dwc2/dcd_dwc2.c \
+	src/portable/synopsys/dwc2/hcd_dwc2.c \
 	${NRFX_PATH}/helpers/nrfx_flag32_allocator.c \
 	${NRFX_PATH}/drivers/src/nrfx_gpiote.c \
   ${NRFX_PATH}/drivers/src/nrfx_power.c \
   ${NRFX_PATH}/drivers/src/nrfx_spim.c \
   ${NRFX_PATH}/drivers/src/nrfx_uarte.c \
-  ${NRFX_PATH}/mdk/system_$(MCU_VARIANT).c \
   ${NRFX_PATH}/soc/nrfx_atomic.c
 
 INC += \
@@ -61,9 +85,4 @@ INC += \
   $(TOP)/${NRFX_PATH}/drivers/include \
   $(TOP)/${NRFX_PATH}/drivers/src \
 
-SRC_S += ${NRFX_PATH}/mdk/gcc_startup_$(MCU_VARIANT).S
-
 ASFLAGS += -D__HEAP_SIZE=0
-
-# For flash-jlink target
-JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa
-- 
cgit v1.3.1


From 84f0cda013c83e8fa61c9d85f061f5f88cf30b9d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Oct 2025 14:53:28 +0700
Subject: rename pca10056 to nrf52840dk, pca10059 to nrf52840dongle

---
 docs/reference/boards.rst                          |  11 +-
 docs/reference/dependencies.rst                    |   2 +-
 hw/bsp/nrf/boards/nrf52840dk/board.cmake           |  10 +
 hw/bsp/nrf/boards/nrf52840dk/board.h               |  65 ++++++
 hw/bsp/nrf/boards/nrf52840dk/board.mk              |   5 +
 hw/bsp/nrf/boards/nrf52840dk/ozone/nrf52840.jdebug | 238 +++++++++++++++++++++
 hw/bsp/nrf/boards/nrf52840dongle/board.cmake       |   5 +
 hw/bsp/nrf/boards/nrf52840dongle/board.h           |  57 +++++
 hw/bsp/nrf/boards/nrf52840dongle/board.mk          |  15 ++
 hw/bsp/nrf/boards/nrf52840dongle/nrf52840dongle.ld |  13 ++
 hw/bsp/nrf/boards/nrf54h20dk/board.h               |   2 +-
 hw/bsp/nrf/boards/pca10056/board.cmake             |  10 -
 hw/bsp/nrf/boards/pca10056/board.h                 |  65 ------
 hw/bsp/nrf/boards/pca10056/board.mk                |   5 -
 hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug   | 238 ---------------------
 hw/bsp/nrf/boards/pca10059/board.cmake             |   5 -
 hw/bsp/nrf/boards/pca10059/board.h                 |  57 -----
 hw/bsp/nrf/boards/pca10059/board.mk                |  15 --
 hw/bsp/nrf/boards/pca10059/pca10059.ld             |  13 --
 19 files changed, 416 insertions(+), 415 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/nrf52840dk/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf52840dk/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf52840dk/board.mk
 create mode 100644 hw/bsp/nrf/boards/nrf52840dk/ozone/nrf52840.jdebug
 create mode 100644 hw/bsp/nrf/boards/nrf52840dongle/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf52840dongle/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf52840dongle/board.mk
 create mode 100644 hw/bsp/nrf/boards/nrf52840dongle/nrf52840dongle.ld
 delete mode 100644 hw/bsp/nrf/boards/pca10056/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/pca10056/board.h
 delete mode 100644 hw/bsp/nrf/boards/pca10056/board.mk
 delete mode 100644 hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
 delete mode 100644 hw/bsp/nrf/boards/pca10059/board.cmake
 delete mode 100644 hw/bsp/nrf/boards/pca10059/board.h
 delete mode 100644 hw/bsp/nrf/boards/pca10059/board.mk
 delete mode 100644 hw/bsp/nrf/boards/pca10059/pca10059.ld

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 3f8277247..e668e2693 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -202,10 +202,11 @@ circuitplayground_bluefruit  Adafruit Circuit Playground Bluefruit  nrf       ht
 feather_nrf52840_express     Adafruit Feather nRF52840 Express      nrf       https://www.adafruit.com/product/4062
 feather_nrf52840_sense       Adafruit Feather nRF52840 Sense        nrf       https://www.adafruit.com/product/4516
 itsybitsy_nrf52840           Adafruit ItsyBitsy nRF52840 Express    nrf       https://www.adafruit.com/product/4481
-pca10056                     Nordic nRF52840DK                      nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK
-pca10059                     Nordic nRF52840 Dongle                 nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle
-pca10095                     Nordic nRF5340 DK                      nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
-pca10100                     Nordic nRF52833 DK                     nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK
+nrf52833dk                   Nordic nRF52833 DK                     nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52833-DK
+nrf52840dk                   Nordic nRF52840DK                      nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK
+nrf52840dongle               Nordic nRF52840 Dongle                 nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle
+nrf5340dk                    Nordic nRF5340 DK                      nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
+nrf54h20dk                   Nordic nRF54H20 DK                     nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
 ===========================  =====================================  ========  ==============================================================================  ======
 
 Raspberry Pi
@@ -298,8 +299,8 @@ stm32l4p5nucleo      STM32 L4P5 Nucleo                  stm32l4    https://www.s
 stm32l4r5nucleo      STM32 L4R5 Nucleo                  stm32l4    https://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html
 stm32n6570dk         STM32 N6570-DK                     stm32n6    https://www.st.com/en/evaluation-tools/stm32n6570-dk.html
 stm32n657nucleo      STM32 N657X0-Q Nucleo              stm32n6    https://www.st.com/en/evaluation-tools/nucleo-n657x0-q.html
+stm32u083cdk         STM32U083C-DK Discovery Kit        stm32u0    https://www.st.com/en/evaluation-tools/stm32u083c-dk.html
 b_u585i_iot2a        STM32 B-U585i IOT2A Discovery kit  stm32u5    https://www.st.com/en/evaluation-tools/b-u585i-iot02a.html
-stm32u083cdk         STM32 U083C Discovery Kit          stm32u0    https://www.st.com/en/evaluation-tools/stm32u083c-dk.html
 stm32u545nucleo      STM32 U545 Nucleo                  stm32u5    https://www.st.com/en/evaluation-tools/nucleo-u545re-q.html
 stm32u575eval        STM32 U575 Eval                    stm32u5    https://www.st.com/en/evaluation-tools/stm32u575i-ev.html
 stm32u575nucleo      STM32 U575 Nucleo                  stm32u5    https://www.st.com/en/evaluation-tools/nucleo-u575zi-q.html
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index 1a088c989..9ca9b0b54 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -22,7 +22,7 @@ hw/mcu/gd/nuclei-sdk                      https://github.com/Nuclei-Software/nuc
 hw/mcu/infineon/mtb-xmclib-cat3           https://github.com/Infineon/mtb-xmclib-cat3.git                   daf5500d03cba23e68c2f241c30af79cd9d63880  xmc4000
 hw/mcu/microchip                          https://github.com/hathach/microchip_driver.git                   9e8b37e307d8404033bb881623a113931e1edf27  sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg
 hw/mcu/mindmotion/mm32sdk                 https://github.com/hathach/mm32sdk.git                            b93e856211060ae825216c6a1d6aa347ec758843  mm32
-hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                   7c47cc0a56ce44658e6da2458e86cd8783ccc4a2  nrf
+hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                   11f57e578c7feea13f21c79ea0efab2630ac68c7  nrf
 hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                        2204191ec76283371419fbcec207da02e1bc22fa  nuc
 hw/mcu/nxp/lpcopen                        https://github.com/hathach/nxp_lpcopen.git                        b41cf930e65c734d8ec6de04f1d57d46787c76ae  lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
 hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
diff --git a/hw/bsp/nrf/boards/nrf52840dk/board.cmake b/hw/bsp/nrf/boards/nrf52840dk/board.cmake
new file mode 100644
index 000000000..85314f3bc
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dk/board.cmake
@@ -0,0 +1,10 @@
+set(MCU_VARIANT nrf52840)
+
+function(update_board TARGET)
+endfunction()
+
+#board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
+#include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
+#include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
+#include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
+#include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
diff --git a/hw/bsp/nrf/boards/nrf52840dk/board.h b/hw/bsp/nrf/boards/nrf52840dk/board.h
new file mode 100644
index 000000000..ec632e769
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dk/board.h
@@ -0,0 +1,65 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF52840DK
+   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED
+#define LED_PIN               13
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            25 // button 4
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           8
+#define UART_TX_PIN           6
+
+// SPI for USB host shield
+// Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !?
+//#define MAX3421_SCK_PIN  _PINNUM(1, 15)
+//#define MAX3421_MOSI_PIN _PINNUM(1, 13)
+//#define MAX3421_MISO_PIN _PINNUM(1, 14)
+//#define MAX3421_CS_PIN   _PINNUM(1, 12)
+//#define MAX3421_INTR_PIN _PINNUM(1, 11)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf52840dk/board.mk b/hw/bsp/nrf/boards/nrf52840dk/board.mk
new file mode 100644
index 000000000..d8bbd41f8
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dk/board.mk
@@ -0,0 +1,5 @@
+MCU_VARIANT = nrf52840
+CFLAGS += -DNRF52840_XXAA
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/nrf52840dk/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/nrf52840dk/ozone/nrf52840.jdebug
new file mode 100644
index 000000000..fa7ab9e23
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dk/ozone/nrf52840.jdebug
@@ -0,0 +1,238 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  // Dialog-generated settings
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M4F.svd");
+  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
+
+  Project.SetDevice ("nRF52840_xxAA");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("8 MHz");
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTracePortWidth (4);
+
+  // User settings
+  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10056/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging a RAM program on a Cortex-M target device
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  Exec.Reset();
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//
+//    Util.Log("Resetting Program.");
+//
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+void BeforeTargetConnect (void) {
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+  VectorTableAddr = Elf.GetBaseAddr();
+
+  if (VectorTableAddr == 0xFFFFFFFF) {
+    Util.Log("Project file error: failed to get program base");
+  } else {
+    SP = Target.ReadU32(VectorTableAddr);
+    Target.SetReg("SP", SP);
+
+    PC = Target.ReadU32(VectorTableAddr + 4);
+    Target.SetReg("PC", PC);
+  }
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
diff --git a/hw/bsp/nrf/boards/nrf52840dongle/board.cmake b/hw/bsp/nrf/boards/nrf52840dongle/board.cmake
new file mode 100644
index 000000000..5ec769192
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dongle/board.cmake
@@ -0,0 +1,5 @@
+set(MCU_VARIANT nrf52840)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf52840dongle/board.h b/hw/bsp/nrf/boards/nrf52840dongle/board.h
new file mode 100644
index 000000000..3b95481ad
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dongle/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF52840 Dongle
+   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED
+#define LED_PIN               8
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            _PINNUM(1, 6)
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           8
+#define UART_TX_PIN           6
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf52840dongle/board.mk b/hw/bsp/nrf/boards/nrf52840dongle/board.mk
new file mode 100644
index 000000000..0b82ecdbb
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dongle/board.mk
@@ -0,0 +1,15 @@
+MCU_VARIANT = nrf52840
+CFLAGS += -DNRF52840_XXAA
+
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# flash using Nordic nrfutil (pip2 install nrfutil)
+# 	make BOARD=pca10059 SERIAL=/dev/ttyACM0 all flash
+NRFUTIL = nrfutil
+
+$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
+	$(NRFUTIL) pkg generate --hw-version 52 --sd-req 0x0000 --debug-mode --application $^ $@
+
+flash: $(BUILD)/$(PROJECT).zip
+	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
+	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
diff --git a/hw/bsp/nrf/boards/nrf52840dongle/nrf52840dongle.ld b/hw/bsp/nrf/boards/nrf52840dongle/nrf52840dongle.ld
new file mode 100644
index 000000000..32cc6eada
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf52840dongle/nrf52840dongle.ld
@@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+/*GROUP(-lgcc -lc -lnosys) not compatible with clang*/
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x1000, LENGTH = 0xff000
+  RAM (rwx) :  ORIGIN = 0x20000008, LENGTH = 0x3fff8
+}
+
+
+INCLUDE "nrf_common.ld"
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.h b/hw/bsp/nrf/boards/nrf54h20dk/board.h
index 1c7981049..c8ed5779f 100644
--- a/hw/bsp/nrf/boards/nrf54h20dk/board.h
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.h
@@ -25,7 +25,7 @@
  */
 
 /* metadata:
-   name: Nordic nRF5340 DK
+   name: Nordic nRF54H20 DK
    url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
 */
 
diff --git a/hw/bsp/nrf/boards/pca10056/board.cmake b/hw/bsp/nrf/boards/pca10056/board.cmake
deleted file mode 100644
index 85314f3bc..000000000
--- a/hw/bsp/nrf/boards/pca10056/board.cmake
+++ /dev/null
@@ -1,10 +0,0 @@
-set(MCU_VARIANT nrf52840)
-
-function(update_board TARGET)
-endfunction()
-
-#board_runner_args(jlink "--device=nRF52840_xxAA" "--speed=4000")
-#include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake)
-#include(${ZEPHYR_BASE}/boards/common/nrfutil.board.cmake)
-#include(${ZEPHYR_BASE}/boards/common/jlink.board.cmake)
-#include(${ZEPHYR_BASE}/boards/common/openocd-nrf5.board.cmake)
diff --git a/hw/bsp/nrf/boards/pca10056/board.h b/hw/bsp/nrf/boards/pca10056/board.h
deleted file mode 100644
index ec632e769..000000000
--- a/hw/bsp/nrf/boards/pca10056/board.h
+++ /dev/null
@@ -1,65 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Nordic nRF52840DK
-   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-DK
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               13
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            25 // button 4
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           8
-#define UART_TX_PIN           6
-
-// SPI for USB host shield
-// Pin is correct but not working probably due to signal incompatible (1.8V 3v3) with MAC3421E !?
-//#define MAX3421_SCK_PIN  _PINNUM(1, 15)
-//#define MAX3421_MOSI_PIN _PINNUM(1, 13)
-//#define MAX3421_MISO_PIN _PINNUM(1, 14)
-//#define MAX3421_CS_PIN   _PINNUM(1, 12)
-//#define MAX3421_INTR_PIN _PINNUM(1, 11)
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/pca10056/board.mk b/hw/bsp/nrf/boards/pca10056/board.mk
deleted file mode 100644
index d8bbd41f8..000000000
--- a/hw/bsp/nrf/boards/pca10056/board.mk
+++ /dev/null
@@ -1,5 +0,0 @@
-MCU_VARIANT = nrf52840
-CFLAGS += -DNRF52840_XXAA
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug b/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
deleted file mode 100644
index fa7ab9e23..000000000
--- a/hw/bsp/nrf/boards/pca10056/ozone/nrf52840.jdebug
+++ /dev/null
@@ -1,238 +0,0 @@
-
-/*********************************************************************
-*
-*       OnProjectLoad
-*
-* Function description
-*   Project load routine. Required.
-*
-**********************************************************************
-*/
-void OnProjectLoad (void) {
-  // Dialog-generated settings
-  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M4F.svd");
-  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
-
-  Project.SetDevice ("nRF52840_xxAA");
-  Project.SetHostIF ("USB", "");
-  Project.SetTargetIF ("SWD");
-  Project.SetTIFSpeed ("8 MHz");
-  Project.SetTraceSource ("Trace Pins");
-  Project.SetTracePortWidth (4);
-
-  // User settings
-  File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-pca10056/cdc_msc.elf");
-}
-
-/*********************************************************************
-*
-*      TargetReset
-*
-* Function description
-*   Replaces the default target device reset routine. Optional.
-*
-* Notes
-*   This example demonstrates the usage when
-*   debugging a RAM program on a Cortex-M target device
-*
-**********************************************************************
-*/
-//void TargetReset (void) {
-//
-//  unsigned int SP;
-//  unsigned int PC;
-//  unsigned int VectorTableAddr;
-//
-//  Exec.Reset();
-//
-//  VectorTableAddr = Elf.GetBaseAddr();
-//
-//  if (VectorTableAddr != 0xFFFFFFFF) {
-//
-//    Util.Log("Resetting Program.");
-//
-//    SP = Target.ReadU32(VectorTableAddr);
-//    Target.SetReg("SP", SP);
-//
-//    PC = Target.ReadU32(VectorTableAddr + 4);
-//    Target.SetReg("PC", PC);
-//  }
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetReset
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetReset (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetReset
-*
-* Function description
-*   Event handler routine.
-*    - Sets the PC register to program reset value.
-*    - Sets the SP register to program reset value on Cortex-M.
-*
-**********************************************************************
-*/
-void AfterTargetReset (void) {
-  unsigned int SP;
-  unsigned int PC;
-  unsigned int VectorTableAddr;
-
-  VectorTableAddr = Elf.GetBaseAddr();
-
-  if (VectorTableAddr == 0xFFFFFFFF) {
-    Util.Log("Project file error: failed to get program base");
-  } else {
-    SP = Target.ReadU32(VectorTableAddr);
-    Target.SetReg("SP", SP);
-
-    PC = Target.ReadU32(VectorTableAddr + 4);
-    Target.SetReg("PC", PC);
-  }
-}
-
-/*********************************************************************
-*
-*       DebugStart
-*
-* Function description
-*   Replaces the default debug session startup routine. Optional.
-*
-**********************************************************************
-*/
-//void DebugStart (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetConnect
-*
-* Function description
-*   Replaces the default target IF connection routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-void BeforeTargetConnect (void) {
-}
-
-/*********************************************************************
-*
-*       AfterTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetDownload
-*
-* Function description
-*   Replaces the default program download routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetDownload
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*      AfterTargetDownload
-*
-* Function description
-*   Event handler routine.
-*    - Sets the PC register to program reset value.
-*    - Sets the SP register to program reset value on Cortex-M.
-*
-**********************************************************************
-*/
-void AfterTargetDownload (void) {
-  unsigned int SP;
-  unsigned int PC;
-  unsigned int VectorTableAddr;
-
-  VectorTableAddr = Elf.GetBaseAddr();
-
-  if (VectorTableAddr == 0xFFFFFFFF) {
-    Util.Log("Project file error: failed to get program base");
-  } else {
-    SP = Target.ReadU32(VectorTableAddr);
-    Target.SetReg("SP", SP);
-
-    PC = Target.ReadU32(VectorTableAddr + 4);
-    Target.SetReg("PC", PC);
-  }
-}
-
-/*********************************************************************
-*
-*       BeforeTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetHalt
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetHalt (void) {
-//}
diff --git a/hw/bsp/nrf/boards/pca10059/board.cmake b/hw/bsp/nrf/boards/pca10059/board.cmake
deleted file mode 100644
index c79eb5964..000000000
--- a/hw/bsp/nrf/boards/pca10059/board.cmake
+++ /dev/null
@@ -1,5 +0,0 @@
-set(MCU_VARIANT nrf52840)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/pca10059.ld)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/nrf/boards/pca10059/board.h b/hw/bsp/nrf/boards/pca10059/board.h
deleted file mode 100644
index 3b95481ad..000000000
--- a/hw/bsp/nrf/boards/pca10059/board.h
+++ /dev/null
@@ -1,57 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Nordic nRF52840 Dongle
-   url: https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#define _PINNUM(port, pin)    ((port)*32 + (pin))
-
-// LED
-#define LED_PIN               8
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            _PINNUM(1, 6)
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           8
-#define UART_TX_PIN           6
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/pca10059/board.mk b/hw/bsp/nrf/boards/pca10059/board.mk
deleted file mode 100644
index 0b82ecdbb..000000000
--- a/hw/bsp/nrf/boards/pca10059/board.mk
+++ /dev/null
@@ -1,15 +0,0 @@
-MCU_VARIANT = nrf52840
-CFLAGS += -DNRF52840_XXAA
-
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# flash using Nordic nrfutil (pip2 install nrfutil)
-# 	make BOARD=pca10059 SERIAL=/dev/ttyACM0 all flash
-NRFUTIL = nrfutil
-
-$(BUILD)/$(PROJECT).zip: $(BUILD)/$(PROJECT).hex
-	$(NRFUTIL) pkg generate --hw-version 52 --sd-req 0x0000 --debug-mode --application $^ $@
-
-flash: $(BUILD)/$(PROJECT).zip
-	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
-	$(NRFUTIL) dfu usb-serial --package $^ -p $(SERIAL) -b 115200
diff --git a/hw/bsp/nrf/boards/pca10059/pca10059.ld b/hw/bsp/nrf/boards/pca10059/pca10059.ld
deleted file mode 100644
index 32cc6eada..000000000
--- a/hw/bsp/nrf/boards/pca10059/pca10059.ld
+++ /dev/null
@@ -1,13 +0,0 @@
-/* Linker script to configure memory regions. */
-
-SEARCH_DIR(.)
-/*GROUP(-lgcc -lc -lnosys) not compatible with clang*/
-
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x1000, LENGTH = 0xff000
-  RAM (rwx) :  ORIGIN = 0x20000008, LENGTH = 0x3fff8
-}
-
-
-INCLUDE "nrf_common.ld"
-- 
cgit v1.3.1


From e0ee32ce6a1655de6dbb86178649c0ec878bd0d0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 13 Oct 2025 16:46:02 +0700
Subject: fix build with west zephyr

---
 .github/workflows/build.yml                 |  4 +--
 .idea/debugServers/lpc1769.xml              | 13 ++++++++
 .idea/debugServers/lpc55s69.xml             | 13 ++++++++
 .idea/debugServers/nrf52833.xml             | 13 ++++++++
 .idea/debugServers/nrf5340.xml              | 13 ++++++++
 .idea/debugServers/stm32f411.xml            | 13 ++++++++
 hw/bsp/nrf/family.c                         | 49 ++++++++++++++++-------------
 hw/bsp/nrf/nrfx_config/nrfx_config_common.h |  2 --
 hw/bsp/zephyr_board_aliases.cmake           |  2 +-
 9 files changed, 95 insertions(+), 27 deletions(-)
 create mode 100644 .idea/debugServers/lpc1769.xml
 create mode 100644 .idea/debugServers/lpc55s69.xml
 create mode 100644 .idea/debugServers/nrf52833.xml
 create mode 100644 .idea/debugServers/nrf5340.xml
 create mode 100644 .idea/debugServers/stm32f411.xml

(limited to 'hw')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 16f906632..becbc5069 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -161,8 +161,8 @@ jobs:
 
       - name: Build
         run: |
-          west build -b pca10056 -d examples/device/cdc_msc/build examples/device/cdc_msc -- -DRTOS=zephyr
-          west build -b pca10056 -d examples/device/msc_dual_lun/build examples/device/msc_dual_lun -- -DRTOS=zephyr
+          west build -b nrf52840dk -d examples/device/cdc_msc/build examples/device/cdc_msc -- -DRTOS=zephyr
+          west build -b nrf52840dk -d examples/device/msc_dual_lun/build examples/device/msc_dual_lun -- -DRTOS=zephyr
 
   # ---------------------------------------
   # Hardware in the loop (HIL)
diff --git a/.idea/debugServers/lpc1769.xml b/.idea/debugServers/lpc1769.xml
new file mode 100644
index 000000000..4acfe6afe
--- /dev/null
+++ b/.idea/debugServers/lpc1769.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="lpc1769" uniqueID="8f746157-a0c3-435f-b417-10f26c3b2699">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="LPC1769" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/lpc55s69.xml b/.idea/debugServers/lpc55s69.xml
new file mode 100644
index 000000000..ceedab0af
--- /dev/null
+++ b/.idea/debugServers/lpc55s69.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="lpc55s69" uniqueID="7de47452-94f1-4f1d-b03c-0f4ad3556d01">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="LPC55S69_M33_0" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/nrf52833.xml b/.idea/debugServers/nrf52833.xml
new file mode 100644
index 000000000..09d2ae3d3
--- /dev/null
+++ b/.idea/debugServers/nrf52833.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="nrf52833" uniqueID="19eede9f-2096-4b30-9390-14d415964264">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="nRF52833_xxAA" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/nrf5340.xml b/.idea/debugServers/nrf5340.xml
new file mode 100644
index 000000000..ac3bd59fa
--- /dev/null
+++ b/.idea/debugServers/nrf5340.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="nrf5340" uniqueID="d82e668b-1307-4266-8a5c-3752be6795c9" selected="true">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="nRF5340_xxAA_APP" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32f411.xml b/.idea/debugServers/stm32f411.xml
new file mode 100644
index 000000000..2bcdf3829
--- /dev/null
+++ b/.idea/debugServers/stm32f411.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32f411" uniqueID="c48950a7-634c-49b6-b136-204ed0b71718">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="STM32F411VE" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 6edeacd87..0221da083 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -66,20 +66,6 @@
   #error "Example requires nrfx v3.0.0 or later"
 #endif
 
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-#if defined(NRF54H20_XXAA)
-#define USBD_IRQn  USBHS_IRQn
-void USBHS_IRQHandler(void) {
-  tusb_int_handler(0, true);
-}
-
-#else
-void USBD_IRQHandler(void) {
-  tud_int_handler(0);
-}
-#endif
 
 /*------------------------------------------------------------------*/
 /* MACRO TYPEDEF CONSTANT ENUM
@@ -92,18 +78,37 @@ enum {
   USB_EVT_READY = 2
 };
 
+// Forward USB interrupt events to TinyUSB IRQ Handler
+#if defined(NRF54H20_XXAA)
+#define USBD_IRQn  USBHS_IRQn
+void USBHS_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(120);
+
+#else
+
 #ifdef NRF5340_XXAA
-  #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC
-  #define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk
-  #define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk
-  #define GPIOTE_IRQn GPIOTE1_IRQn
+#define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC
+#define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk
+#define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk
+#define GPIOTE_IRQn GPIOTE1_IRQn
 #else
-  #define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC
-  #define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk
-  #define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
+#define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC
+#define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk
+#define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
 #endif
 
-static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(CFG_NRFX_UARTE_INSTANCE_ID);
+static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
+
+void USBD_IRQHandler(void) {
+  tud_int_handler(0);
+}
+#endif
+
+
+
 
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
diff --git a/hw/bsp/nrf/nrfx_config/nrfx_config_common.h b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
index 1d75e5a66..a5a29bb8e 100644
--- a/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
+++ b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
@@ -61,7 +61,6 @@
 
 #if defined(NRF54H20_XXAA)
 #define NRFX_UARTE120_ENABLED  1
-#define CFG_NRFX_UARTE_INSTANCE_ID 120
 
 #else
 
@@ -69,7 +68,6 @@
 #define NRFX_POWER_DEFAULT_CONFIG_IRQ_PRIORITY  7
 
 #define NRFX_UARTE0_ENABLED  1
-#define CFG_NRFX_UARTE_INSTANCE_ID 0
 
 #define NRFX_GPIOTE_ENABLED  1
 #define NRFX_GPIOTE0_ENABLED 1
diff --git a/hw/bsp/zephyr_board_aliases.cmake b/hw/bsp/zephyr_board_aliases.cmake
index b60e97ef4..a60068208 100644
--- a/hw/bsp/zephyr_board_aliases.cmake
+++ b/hw/bsp/zephyr_board_aliases.cmake
@@ -1,2 +1,2 @@
-set(pca10056_BOARD_ALIAS nrf52840dk/nrf52840)
+set(nrf52840dk_BOARD_ALIAS nrf52840dk/nrf52840)
 set(stm32n657nucleo_BOARD_ALIAS nucleo_n657x0_q)
-- 
cgit v1.3.1


From 9bf18d080b202e8e09bd76f32272b1dbfabfa3b9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 15:14:43 +0700
Subject: move make.mk to hw/bsp/family_support.mk

---
 examples/build_system/make/make.mk                 | 190 ---------------------
 examples/device/audio_4_channel_mic/Makefile       |   2 +-
 .../device/audio_4_channel_mic_freertos/Makefile   |   2 +-
 examples/device/audio_test/Makefile                |   2 +-
 examples/device/audio_test_freertos/Makefile       |   2 +-
 examples/device/audio_test_multi_rate/Makefile     |   2 +-
 examples/device/board_test/Makefile                |   2 +-
 examples/device/cdc_dual_ports/Makefile            |   2 +-
 examples/device/cdc_msc/Makefile                   |   2 +-
 examples/device/cdc_msc_freertos/Makefile          |   2 +-
 examples/device/cdc_uac2/Makefile                  |   2 +-
 examples/device/dfu/Makefile                       |   2 +-
 examples/device/dfu_runtime/Makefile               |   2 +-
 examples/device/dynamic_configuration/Makefile     |   2 +-
 examples/device/hid_boot_interface/Makefile        |   2 +-
 examples/device/hid_composite/Makefile             |   2 +-
 examples/device/hid_composite_freertos/Makefile    |   2 +-
 examples/device/hid_generic_inout/Makefile         |   2 +-
 examples/device/hid_multiple_interface/Makefile    |   2 +-
 examples/device/midi_test/Makefile                 |   2 +-
 examples/device/midi_test_freertos/Makefile        |   2 +-
 examples/device/msc_dual_lun/Makefile              |   2 +-
 examples/device/mtp/Makefile                       |   2 +-
 examples/device/net_lwip_webserver/Makefile        |   2 +-
 examples/device/uac2_headset/Makefile              |   2 +-
 examples/device/uac2_speaker_fb/Makefile           |   2 +-
 examples/device/usbtmc/Makefile                    |   2 +-
 examples/device/video_capture/Makefile             |   2 +-
 examples/device/video_capture_2ch/Makefile         |   2 +-
 examples/device/webusb_serial/Makefile             |   2 +-
 examples/dual/host_hid_to_device_cdc/Makefile      |   2 +-
 examples/dual/host_info_to_device_cdc/Makefile     |   2 +-
 examples/host/bare_api/Makefile                    |   2 +-
 examples/host/cdc_msc_hid/Makefile                 |   2 +-
 examples/host/cdc_msc_hid_freertos/Makefile        |   2 +-
 examples/host/device_info/Makefile                 |   2 +-
 examples/host/hid_controller/Makefile              |   2 +-
 examples/host/midi_rx/Makefile                     |   2 +-
 examples/host/msc_file_explorer/Makefile           |   2 +-
 examples/typec/power_delivery/Makefile             |   2 +-
 hw/bsp/family_support.mk                           | 187 ++++++++++++++++++++
 41 files changed, 226 insertions(+), 229 deletions(-)
 delete mode 100644 examples/build_system/make/make.mk
 create mode 100644 hw/bsp/family_support.mk

(limited to 'hw')

diff --git a/examples/build_system/make/make.mk b/examples/build_system/make/make.mk
deleted file mode 100644
index 4f5d3242e..000000000
--- a/examples/build_system/make/make.mk
+++ /dev/null
@@ -1,190 +0,0 @@
-# ---------------------------------------
-# Common make definition for all examples
-# ---------------------------------------
-
-# upper helper function
-to_upper = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$(subst -,_,$(1))))))))))))))))))))))))))))
-
-#-------------------------------------------------------------
-# Toolchain
-# Can be changed via TOOLCHAIN=gcc|iar or CC=arm-none-eabi-gcc|iccarm|clang
-#-------------------------------------------------------------
-ifneq (,$(findstring clang,$(CC)))
-  TOOLCHAIN = clang
-else ifneq (,$(findstring iccarm,$(CC)))
-  TOOLCHAIN = iar
-else ifneq (,$(findstring gcc,$(CC)))
-  TOOLCHAIN = gcc
-endif
-
-# Default to GCC
-ifndef TOOLCHAIN
-  TOOLCHAIN = gcc
-endif
-
-#-------------- TOP and CURRENT_PATH ------------
-
-# Set TOP to be the path to get from the current directory (where make was invoked) to the top of the tree.
-# $(lastword $(MAKEFILE_LIST)) returns the name of this makefile relative to where make was invoked.
-THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
-
-# strip off /examples/build_system/make to get for example ../../..
-# and Set TOP to an absolute path
-TOP = $(abspath $(subst make.mk,../../..,$(THIS_MAKEFILE)))
-
-# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
-CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
-
-#-------------- Linux/Windows ------------
-
-# Detect whether shell style is windows or not
-# https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
-ifeq '$(findstring ;,$(PATH))' ';'
-# PATH contains semicolon - so we're definitely on Windows.
-CMDEXE := 1
-
-# makefile shell commands should use syntax for DOS CMD, not unix sh
-# Force DOS command shell on Windows.
-SHELL := cmd.exe
-endif
-
-ifeq ($(CMDEXE),1)
-  CP = copy
-  RM = del
-  MKDIR = mkdir
-  PYTHON = python
-else
-  CP = cp
-  RM = rm
-  MKDIR = mkdir
-  PYTHON = python3
-endif
-
-
-# Build directory
-BUILD := _build/$(BOARD)
-
-PROJECT := $(notdir $(CURDIR))
-BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR))
-
-#-------------------------------------------------------------
-# Board / Family
-#-------------------------------------------------------------
-
-# Board without family
-ifneq ($(wildcard $(TOP)/hw/bsp/$(BOARD)/board.mk),)
-  BOARD_PATH := hw/bsp/$(BOARD)
-  FAMILY :=
-endif
-
-# Board within family
-ifeq ($(BOARD_PATH),)
-  BOARD_PATH := $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/*/boards/$(BOARD)))
-  FAMILY := $(word 3, $(subst /, ,$(BOARD_PATH)))
-  FAMILY_PATH = hw/bsp/$(FAMILY)
-endif
-
-ifeq ($(BOARD_PATH),)
-  $(info You must provide a BOARD parameter with 'BOARD=')
-  $(error Invalid BOARD specified)
-endif
-
-ifeq ($(FAMILY),)
-  include $(TOP)/hw/bsp/$(BOARD)/board.mk
-else
-  # Include Family and Board specific defs
-  include $(TOP)/$(FAMILY_PATH)/family.mk
-  SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
-endif
-
-#-------------------------------------------------------------
-# Source files and compiler flags
-#-------------------------------------------------------------
-# tinyusb makefile
-include $(TOP)/src/tinyusb.mk
-SRC_C += $(TINYUSB_SRC_C)
-
-# Include all source C in family & board folder
-SRC_C += hw/bsp/board.c
-SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
-
-INC += \
-  $(TOP)/$(FAMILY_PATH) \
-  $(TOP)/src \
-
-BOARD_UPPER = $(call to_upper,$(BOARD))
-CFLAGS += -DBOARD_$(BOARD_UPPER)
-
-ifdef CFLAGS_CLI
-	CFLAGS += $(CFLAGS_CLI)
-endif
-
-# use max3421 as host controller
-ifeq (${MAX3421_HOST},1)
-  SRC_C += src/portable/analog/max3421/hcd_max3421.c
-  CFLAGS += -DCFG_TUH_MAX3421=1
-endif
-
-# Log level is mapped to TUSB DEBUG option
-ifneq ($(LOG),)
-  CFLAGS += -DCFG_TUSB_DEBUG=$(LOG)
-endif
-
-# Logger: default is uart, can be set to rtt or swo
-ifeq ($(LOGGER),rtt)
-  CFLAGS += -DLOGGER_RTT
-  #CFLAGS += -DSEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
-  INC   += $(TOP)/lib/SEGGER_RTT/RTT
-  SRC_C += lib/SEGGER_RTT/RTT/SEGGER_RTT.c
-endif
-ifeq ($(LOGGER),swo)
-  CFLAGS += -DLOGGER_SWO
-else
-  CFLAGS += -DLOGGER_UART
-endif
-
-# CPU specific flags
-ifdef CPU_CORE
-  include ${TOP}/examples/build_system/make/cpu/$(CPU_CORE).mk
-endif
-
-# toolchain specific
-include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
-
-#---------------------- FreeRTOS -----------------------
-FREERTOS_SRC = lib/FreeRTOS-Kernel
-FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/$(if $(findstring iar,$(TOOLCHAIN)),IAR,GCC)
-
-ifeq ($(RTOS),freertos)
-	SRC_C += \
-		$(FREERTOS_SRC)/list.c \
-		$(FREERTOS_SRC)/queue.c \
-		$(FREERTOS_SRC)/tasks.c \
-		$(FREERTOS_SRC)/timers.c \
-		$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
-
-	SRC_S += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
-	INC += \
-		$(TOP)/hw/bsp/$(FAMILY)/FreeRTOSConfig \
-		$(TOP)/$(FREERTOS_SRC)/include \
-		$(TOP)/$(FREERTOS_PORTABLE_SRC)
-
-	CFLAGS += -DCFG_TUSB_OS=OPT_OS_FREERTOS
-
-	# Suppress FreeRTOSConfig.h warnings
-	CFLAGS_GCC += -Wno-error=redundant-decls
-
-	# Suppress FreeRTOS source warnings
-	CFLAGS_GCC += -Wno-error=cast-qual
-
-	# FreeRTOS (lto + Os) linker issue
-	LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
-endif
-
-#---------------- Helper ----------------
-check_defined = \
-    $(strip $(foreach 1,$1, \
-    $(call __check_defined,$1,$(strip $(value 2)))))
-__check_defined = \
-    $(if $(value $1),, \
-    $(error Undefined make flag: $1$(if $2, ($2))))
diff --git a/examples/device/audio_4_channel_mic/Makefile b/examples/device/audio_4_channel_mic/Makefile
index 2c825bbf7..4cf2d9e49 100644
--- a/examples/device/audio_4_channel_mic/Makefile
+++ b/examples/device/audio_4_channel_mic/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/audio_4_channel_mic_freertos/Makefile b/examples/device/audio_4_channel_mic_freertos/Makefile
index bd625b345..13c637977 100644
--- a/examples/device/audio_4_channel_mic_freertos/Makefile
+++ b/examples/device/audio_4_channel_mic_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/audio_test/Makefile b/examples/device/audio_test/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/audio_test/Makefile
+++ b/examples/device/audio_test/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/audio_test_freertos/Makefile b/examples/device/audio_test_freertos/Makefile
index bd625b345..13c637977 100644
--- a/examples/device/audio_test_freertos/Makefile
+++ b/examples/device/audio_test_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/audio_test_multi_rate/Makefile b/examples/device/audio_test_multi_rate/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/audio_test_multi_rate/Makefile
+++ b/examples/device/audio_test_multi_rate/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/board_test/Makefile b/examples/device/board_test/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/board_test/Makefile
+++ b/examples/device/board_test/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/cdc_dual_ports/Makefile b/examples/device/cdc_dual_ports/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/cdc_dual_ports/Makefile
+++ b/examples/device/cdc_dual_ports/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/cdc_msc/Makefile b/examples/device/cdc_msc/Makefile
index 0c2e37180..eb548f018 100644
--- a/examples/device/cdc_msc/Makefile
+++ b/examples/device/cdc_msc/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 10cff57a0..41960e64c 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/cdc_uac2/Makefile b/examples/device/cdc_uac2/Makefile
index 21dcdb0b2..539077d6c 100644
--- a/examples/device/cdc_uac2/Makefile
+++ b/examples/device/cdc_uac2/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/dfu/Makefile b/examples/device/dfu/Makefile
index 52a24cdb0..ad7a37b79 100644
--- a/examples/device/dfu/Makefile
+++ b/examples/device/dfu/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/dfu_runtime/Makefile b/examples/device/dfu_runtime/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/dfu_runtime/Makefile
+++ b/examples/device/dfu_runtime/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/dynamic_configuration/Makefile b/examples/device/dynamic_configuration/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/dynamic_configuration/Makefile
+++ b/examples/device/dynamic_configuration/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile
index 52a24cdb0..ad7a37b79 100644
--- a/examples/device/hid_boot_interface/Makefile
+++ b/examples/device/hid_boot_interface/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/hid_composite/Makefile b/examples/device/hid_composite/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/hid_composite/Makefile
+++ b/examples/device/hid_composite/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index bd625b345..13c637977 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/hid_generic_inout/Makefile b/examples/device/hid_generic_inout/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/hid_generic_inout/Makefile
+++ b/examples/device/hid_generic_inout/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/hid_multiple_interface/Makefile b/examples/device/hid_multiple_interface/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/hid_multiple_interface/Makefile
+++ b/examples/device/hid_multiple_interface/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/midi_test/Makefile b/examples/device/midi_test/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/midi_test/Makefile
+++ b/examples/device/midi_test/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/midi_test_freertos/Makefile b/examples/device/midi_test_freertos/Makefile
index 26cd83486..704d319d2 100644
--- a/examples/device/midi_test_freertos/Makefile
+++ b/examples/device/midi_test_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/msc_dual_lun/Makefile b/examples/device/msc_dual_lun/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/msc_dual_lun/Makefile
+++ b/examples/device/msc_dual_lun/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/mtp/Makefile b/examples/device/mtp/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/mtp/Makefile
+++ b/examples/device/mtp/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index 4ad110dec..82c946b14 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 # suppress warning caused by lwip
 CFLAGS_GCC += \
diff --git a/examples/device/uac2_headset/Makefile b/examples/device/uac2_headset/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/uac2_headset/Makefile
+++ b/examples/device/uac2_headset/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/uac2_speaker_fb/Makefile b/examples/device/uac2_speaker_fb/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/uac2_speaker_fb/Makefile
+++ b/examples/device/uac2_speaker_fb/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/device/usbtmc/Makefile b/examples/device/usbtmc/Makefile
index 1b4d398cf..72bd56ede 100644
--- a/examples/device/usbtmc/Makefile
+++ b/examples/device/usbtmc/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/device/video_capture/Makefile b/examples/device/video_capture/Makefile
index d698a848d..288e9ffc3 100644
--- a/examples/device/video_capture/Makefile
+++ b/examples/device/video_capture/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 ifeq ($(DISABLE_MJPEG),1)
 CFLAGS += -DCFG_EXAMPLE_VIDEO_DISABLE_MJPEG
diff --git a/examples/device/video_capture_2ch/Makefile b/examples/device/video_capture_2ch/Makefile
index d698a848d..288e9ffc3 100644
--- a/examples/device/video_capture_2ch/Makefile
+++ b/examples/device/video_capture_2ch/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 ifeq ($(DISABLE_MJPEG),1)
 CFLAGS += -DCFG_EXAMPLE_VIDEO_DISABLE_MJPEG
diff --git a/examples/device/webusb_serial/Makefile b/examples/device/webusb_serial/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/device/webusb_serial/Makefile
+++ b/examples/device/webusb_serial/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/examples/dual/host_hid_to_device_cdc/Makefile b/examples/dual/host_hid_to_device_cdc/Makefile
index 474ae9814..76c6db0ac 100644
--- a/examples/dual/host_hid_to_device_cdc/Makefile
+++ b/examples/dual/host_hid_to_device_cdc/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/dual/host_info_to_device_cdc/Makefile b/examples/dual/host_info_to_device_cdc/Makefile
index 083c9169a..071185c88 100644
--- a/examples/dual/host_info_to_device_cdc/Makefile
+++ b/examples/dual/host_info_to_device_cdc/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/bare_api/Makefile b/examples/host/bare_api/Makefile
index 0235e08c3..e6408c77a 100644
--- a/examples/host/bare_api/Makefile
+++ b/examples/host/bare_api/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile
index 213c02f9c..b6036fa26 100644
--- a/examples/host/cdc_msc_hid/Makefile
+++ b/examples/host/cdc_msc_hid/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/cdc_msc_hid_freertos/Makefile b/examples/host/cdc_msc_hid_freertos/Makefile
index 178341f81..4e8c8b116 100644
--- a/examples/host/cdc_msc_hid_freertos/Makefile
+++ b/examples/host/cdc_msc_hid_freertos/Makefile
@@ -1,5 +1,5 @@
 RTOS = freertos
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/device_info/Makefile b/examples/host/device_info/Makefile
index 0235e08c3..e6408c77a 100644
--- a/examples/host/device_info/Makefile
+++ b/examples/host/device_info/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/hid_controller/Makefile b/examples/host/hid_controller/Makefile
index 1377f1f90..f82054e8c 100644
--- a/examples/host/hid_controller/Makefile
+++ b/examples/host/hid_controller/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/midi_rx/Makefile b/examples/host/midi_rx/Makefile
index 0235e08c3..e6408c77a 100644
--- a/examples/host/midi_rx/Makefile
+++ b/examples/host/midi_rx/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
diff --git a/examples/host/msc_file_explorer/Makefile b/examples/host/msc_file_explorer/Makefile
index f0872376f..0f87d848d 100644
--- a/examples/host/msc_file_explorer/Makefile
+++ b/examples/host/msc_file_explorer/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 FATFS_PATH = lib/fatfs/source
 
diff --git a/examples/typec/power_delivery/Makefile b/examples/typec/power_delivery/Makefile
index 7fa475da5..e8cacd359 100644
--- a/examples/typec/power_delivery/Makefile
+++ b/examples/typec/power_delivery/Makefile
@@ -1,4 +1,4 @@
-include ../../build_system/make/make.mk
+include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
new file mode 100644
index 000000000..757982b85
--- /dev/null
+++ b/hw/bsp/family_support.mk
@@ -0,0 +1,187 @@
+# ---------------------------------------
+# Common make definition for all examples
+# ---------------------------------------
+
+# upper helper function
+to_upper = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f,F,$(subst g,G,$(subst h,H,$(subst i,I,$(subst j,J,$(subst k,K,$(subst l,L,$(subst m,M,$(subst n,N,$(subst o,O,$(subst p,P,$(subst q,Q,$(subst r,R,$(subst s,S,$(subst t,T,$(subst u,U,$(subst v,V,$(subst w,W,$(subst x,X,$(subst y,Y,$(subst z,Z,$(subst -,_,$(1))))))))))))))))))))))))))))
+
+#-------------------------------------------------------------
+# Toolchain
+# Can be changed via TOOLCHAIN=gcc|iar or CC=arm-none-eabi-gcc|iccarm|clang
+#-------------------------------------------------------------
+ifneq (,$(findstring clang,$(CC)))
+  TOOLCHAIN = clang
+else ifneq (,$(findstring iccarm,$(CC)))
+  TOOLCHAIN = iar
+else ifneq (,$(findstring gcc,$(CC)))
+  TOOLCHAIN = gcc
+endif
+
+# Default to GCC
+ifndef TOOLCHAIN
+  TOOLCHAIN = gcc
+endif
+
+#-------------- TOP and CURRENT_PATH ------------
+
+# Set TOP to be the path to get from the current directory (where make was invoked) to the top of the tree.
+# $(lastword $(MAKEFILE_LIST)) returns the name of this makefile relative to where make was invoked.
+THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
+
+# Set TOP to an absolute path
+TOP = $(abspath $(subst family_support.mk,../..,$(THIS_MAKEFILE)))
+
+# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
+CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
+
+#-------------- Linux/Windows ------------
+# Detect whether shell style is windows or not
+# https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
+ifeq '$(findstring ;,$(PATH))' ';'
+# PATH contains semicolon - so we're definitely on Windows.
+CMDEXE := 1
+
+# makefile shell commands should use syntax for DOS CMD, not unix sh
+# Force DOS command shell on Windows.
+SHELL := cmd.exe
+endif
+
+ifeq ($(CMDEXE),1)
+  CP = copy
+  RM = del
+  MKDIR = mkdir
+  PYTHON = python
+else
+  CP = cp
+  RM = rm
+  MKDIR = mkdir
+  PYTHON = python3
+endif
+
+# Build directory
+BUILD := _build/$(BOARD)
+
+PROJECT := $(notdir $(CURDIR))
+BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR))
+
+#-------------------------------------------------------------
+# Board / Family
+#-------------------------------------------------------------
+
+# Board without family
+ifneq ($(wildcard $(TOP)/hw/bsp/$(BOARD)/board.mk),)
+  BOARD_PATH := hw/bsp/$(BOARD)
+  FAMILY :=
+endif
+
+# Board within family
+ifeq ($(BOARD_PATH),)
+  BOARD_PATH := $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/*/boards/$(BOARD)))
+  FAMILY := $(word 3, $(subst /, ,$(BOARD_PATH)))
+  FAMILY_PATH = hw/bsp/$(FAMILY)
+endif
+
+ifeq ($(BOARD_PATH),)
+  $(info You must provide a BOARD parameter with 'BOARD=')
+  $(error Invalid BOARD specified)
+endif
+
+ifeq ($(FAMILY),)
+  include $(TOP)/hw/bsp/$(BOARD)/board.mk
+else
+  # Include Family and Board specific defs
+  include $(TOP)/$(FAMILY_PATH)/family.mk
+  SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
+endif
+
+#-------------------------------------------------------------
+# Source files and compiler flags
+#-------------------------------------------------------------
+# tinyusb makefile
+include $(TOP)/src/tinyusb.mk
+SRC_C += $(TINYUSB_SRC_C)
+
+# Include all source C in family & board folder
+SRC_C += hw/bsp/board.c
+SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
+
+INC += \
+  $(TOP)/$(FAMILY_PATH) \
+  $(TOP)/src \
+
+BOARD_UPPER = $(call to_upper,$(BOARD))
+CFLAGS += -DBOARD_$(BOARD_UPPER)
+
+ifdef CFLAGS_CLI
+	CFLAGS += $(CFLAGS_CLI)
+endif
+
+# use max3421 as host controller
+ifeq (${MAX3421_HOST},1)
+  SRC_C += src/portable/analog/max3421/hcd_max3421.c
+  CFLAGS += -DCFG_TUH_MAX3421=1
+endif
+
+# Log level is mapped to TUSB DEBUG option
+ifneq ($(LOG),)
+  CFLAGS += -DCFG_TUSB_DEBUG=$(LOG)
+endif
+
+# Logger: default is uart, can be set to rtt or swo
+ifeq ($(LOGGER),rtt)
+  CFLAGS += -DLOGGER_RTT
+  #CFLAGS += -DSEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL
+  INC   += $(TOP)/lib/SEGGER_RTT/RTT
+  SRC_C += lib/SEGGER_RTT/RTT/SEGGER_RTT.c
+endif
+ifeq ($(LOGGER),swo)
+  CFLAGS += -DLOGGER_SWO
+else
+  CFLAGS += -DLOGGER_UART
+endif
+
+# CPU specific flags
+ifdef CPU_CORE
+  include ${TOP}/examples/build_system/make/cpu/$(CPU_CORE).mk
+endif
+
+# toolchain specific
+include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
+
+#---------------------- FreeRTOS -----------------------
+FREERTOS_SRC = lib/FreeRTOS-Kernel
+FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/$(if $(findstring iar,$(TOOLCHAIN)),IAR,GCC)
+
+ifeq ($(RTOS),freertos)
+	SRC_C += \
+		$(FREERTOS_SRC)/list.c \
+		$(FREERTOS_SRC)/queue.c \
+		$(FREERTOS_SRC)/tasks.c \
+		$(FREERTOS_SRC)/timers.c \
+		$(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.c))
+
+	SRC_S += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FREERTOS_PORTABLE_SRC)/*.s))
+	INC += \
+		$(TOP)/hw/bsp/$(FAMILY)/FreeRTOSConfig \
+		$(TOP)/$(FREERTOS_SRC)/include \
+		$(TOP)/$(FREERTOS_PORTABLE_SRC)
+
+	CFLAGS += -DCFG_TUSB_OS=OPT_OS_FREERTOS
+
+	# Suppress FreeRTOSConfig.h warnings
+	CFLAGS_GCC += -Wno-error=redundant-decls
+
+	# Suppress FreeRTOS source warnings
+	CFLAGS_GCC += -Wno-error=cast-qual
+
+	# FreeRTOS (lto + Os) linker issue
+	LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
+endif
+
+#---------------- Helper ----------------
+check_defined = \
+    $(strip $(foreach 1,$1, \
+    $(call __check_defined,$1,$(strip $(value 2)))))
+__check_defined = \
+    $(if $(value $1),, \
+    $(error Undefined make flag: $1$(if $2, ($2))))
-- 
cgit v1.3.1


From 47b13f6b102ea981b79588158dca436ebc21f1ae Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 17:13:28 +0700
Subject: improve cmake warning flags, fix various warnings in examples

---
 examples/build_system/cmake/toolchain/common.cmake | 17 +-----
 examples/device/cdc_uac2/src/common.h              |  3 ++
 examples/device/cdc_uac2/src/main.c                |  3 --
 examples/device/net_lwip_webserver/src/main.c      |  3 +-
 examples/device/usbtmc/src/main.c                  |  1 +
 examples/device/usbtmc/src/usbtmc_app.c            |  1 +
 examples/device/video_capture_2ch/src/main.c       |  5 +-
 examples/device/webusb_serial/src/main.c           |  2 +-
 examples/host/cdc_msc_hid/src/app.h                | 32 ++++++++++++
 examples/host/cdc_msc_hid/src/cdc_app.c            |  1 +
 examples/host/cdc_msc_hid/src/hid_app.c            |  1 +
 examples/host/cdc_msc_hid/src/main.c               |  3 +-
 examples/host/cdc_msc_hid_freertos/src/app.h       | 33 ++++++++++++
 examples/host/cdc_msc_hid_freertos/src/cdc_app.c   |  1 +
 examples/host/cdc_msc_hid_freertos/src/hid_app.c   |  3 +-
 examples/host/cdc_msc_hid_freertos/src/main.c      |  4 +-
 examples/host/cdc_msc_hid_freertos/src/msc_app.c   |  1 +
 examples/host/hid_controller/src/app.h             | 31 +++++++++++
 examples/host/hid_controller/src/hid_app.c         |  1 +
 examples/host/hid_controller/src/main.c            | 20 ++-----
 hw/bsp/board.c                                     |  6 ++-
 hw/bsp/family_support.cmake                        | 61 ++++++++++++----------
 lib/networking/dhserver.c                          |  4 +-
 lib/networking/rndis_reports.c                     |  7 ++-
 src/class/audio/audio_device.h                     |  1 +
 src/class/net/ecm_rndis_device.c                   |  2 -
 src/class/net/net_device.h                         |  7 +++
 27 files changed, 174 insertions(+), 80 deletions(-)
 create mode 100644 examples/host/cdc_msc_hid/src/app.h
 create mode 100644 examples/host/cdc_msc_hid_freertos/src/app.h
 create mode 100644 examples/host/hid_controller/src/app.h

(limited to 'hw')

diff --git a/examples/build_system/cmake/toolchain/common.cmake b/examples/build_system/cmake/toolchain/common.cmake
index 4c181137b..fa3034e6f 100644
--- a/examples/build_system/cmake/toolchain/common.cmake
+++ b/examples/build_system/cmake/toolchain/common.cmake
@@ -20,11 +20,11 @@ include(${CMAKE_CURRENT_LIST_DIR}/../cpu/${CMAKE_SYSTEM_CPU}.cmake)
 # ----------------------------------------------------------------------------
 # Compile flags
 # ----------------------------------------------------------------------------
-if (TOOLCHAIN STREQUAL "gcc")
+if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
   list(APPEND TOOLCHAIN_COMMON_FLAGS
     -fdata-sections
     -ffunction-sections
-    -fsingle-precision-constant
+#    -fsingle-precision-constant # not supported by clang
     -fno-strict-aliasing
     )
   list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
@@ -34,22 +34,9 @@ if (TOOLCHAIN STREQUAL "gcc")
     )
 
 elseif (TOOLCHAIN STREQUAL "iar")
-  #list(APPEND TOOLCHAIN_COMMON_FLAGS)
   list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
     --diag_suppress=Li065
     )
-
-elseif (TOOLCHAIN STREQUAL "clang")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
-    -fdata-sections
-    -ffunction-sections
-    -fno-strict-aliasing
-    )
-  list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
-    -Wl,--print-memory-usage
-    -Wl,--gc-sections
-    -Wl,--cref
-    )
 endif ()
 
 # join the toolchain flags into a single string
diff --git a/examples/device/cdc_uac2/src/common.h b/examples/device/cdc_uac2/src/common.h
index f281024c7..ff8b7a953 100644
--- a/examples/device/cdc_uac2/src/common.h
+++ b/examples/device/cdc_uac2/src/common.h
@@ -31,4 +31,7 @@ enum
   VOLUME_CTRL_SILENCE = 0x8000,
 };
 
+void led_blinking_task(void);
+void audio_task(void);
+
 #endif
diff --git a/examples/device/cdc_uac2/src/main.c b/examples/device/cdc_uac2/src/main.c
index bc87f6e3c..22c462be7 100644
--- a/examples/device/cdc_uac2/src/main.c
+++ b/examples/device/cdc_uac2/src/main.c
@@ -38,9 +38,6 @@ extern uint32_t blink_interval_ms;
 #include "pico/stdlib.h"
 #endif
 
-void led_blinking_task(void);
-void audio_task(void);
-
 /*------------- MAIN -------------*/
 int main(void)
 {
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index dd9f213ae..867cf2812 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -58,6 +58,7 @@ try changing the first byte of tud_network_mac_address[] below from 0x02 to 0x00
 #include "lwip/ethip6.h"
 #include "lwip/init.h"
 #include "lwip/timeouts.h"
+#include "lwip/sys.h"
 
 #ifdef INCLUDE_IPERF
   #include "lwip/apps/lwiperf.h"
@@ -172,7 +173,7 @@ static void init_lwip(void) {
 }
 
 /* handle any DNS requests from dns-server */
-bool dns_query_proc(const char *name, ip4_addr_t *addr) {
+static bool dns_query_proc(const char *name, ip4_addr_t *addr) {
   if (0 == strcmp(name, "tiny.usb")) {
     *addr = ipaddr;
     return true;
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index f78cce91f..5cbbb85ef 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -29,6 +29,7 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "main.h"
 #include "usbtmc_app.h"
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTYPES
diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index e738f1008..4c3724ac4 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -28,6 +28,7 @@
 #include "tusb.h"
 #include "bsp/board_api.h"
 #include "main.h"
+#include "usbtmc_app.h"
 
 #if (CFG_TUD_USBTMC_ENABLE_488)
 static usbtmc_response_capabilities_488_t const
diff --git a/examples/device/video_capture_2ch/src/main.c b/examples/device/video_capture_2ch/src/main.c
index f56738f67..a63efa82d 100644
--- a/examples/device/video_capture_2ch/src/main.c
+++ b/examples/device/video_capture_2ch/src/main.c
@@ -180,7 +180,7 @@ static void fill_color_bar(uint8_t* buffer, unsigned start_position) {
 }
 #endif
 
-size_t get_framebuf(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, size_t fnum, void **fb) {
+static size_t get_framebuf(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, size_t fnum, void **fb) {
   uint32_t idx = ctl_idx + stm_idx;
 
   if (idx == 0) {
@@ -205,8 +205,7 @@ size_t get_framebuf(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, size_t fnum, voi
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
-
-void video_send_frame(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) {
+static void video_send_frame(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) {
   static unsigned start_ms[CFG_TUD_VIDEO_STREAMING] = {0, };
   static unsigned already_sent = 0;
 
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index 4a724f45e..0c2acd94e 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -107,7 +107,7 @@ int main(void) {
 }
 
 // send characters to both CDC and WebUSB
-void echo_all(const uint8_t buf[], uint32_t count) {
+static void echo_all(const uint8_t buf[], uint32_t count) {
   // echo to web serial
   if (web_serial_connected) {
     tud_vendor_write(buf, count);
diff --git a/examples/host/cdc_msc_hid/src/app.h b/examples/host/cdc_msc_hid/src/app.h
new file mode 100644
index 000000000..bf15c7bea
--- /dev/null
+++ b/examples/host/cdc_msc_hid/src/app.h
@@ -0,0 +1,32 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_TINYUSB_EXAMPLES_APP_H
+#define TUSB_TINYUSB_EXAMPLES_APP_H
+
+void cdc_app_task(void);
+void hid_app_task(void);
+
+#endif
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 97f1a96d6..d3daedffc 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -26,6 +26,7 @@
 
 #include "tusb.h"
 #include "bsp/board_api.h"
+#include "app.h"
 
 static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
   size_t count = 0;
diff --git a/examples/host/cdc_msc_hid/src/hid_app.c b/examples/host/cdc_msc_hid/src/hid_app.c
index 6f01d6f45..f6a83aeed 100644
--- a/examples/host/cdc_msc_hid/src/hid_app.c
+++ b/examples/host/cdc_msc_hid/src/hid_app.c
@@ -25,6 +25,7 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index e2dd6e5d2..c309a7cae 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -29,13 +29,12 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 void led_blinking_task(void);
-extern void cdc_app_task(void);
-extern void hid_app_task(void);
 
 /*------------- MAIN -------------*/
 int main(void) {
diff --git a/examples/host/cdc_msc_hid_freertos/src/app.h b/examples/host/cdc_msc_hid_freertos/src/app.h
new file mode 100644
index 000000000..960f7e8cc
--- /dev/null
+++ b/examples/host/cdc_msc_hid_freertos/src/app.h
@@ -0,0 +1,33 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_TINYUSB_EXAMPLES_APP_H
+#define TUSB_TINYUSB_EXAMPLES_APP_H
+
+void cdc_app_init(void);
+void hid_app_init(void);
+void msc_app_init(void);
+
+#endif
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index d99760a02..279efe7b7 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -26,6 +26,7 @@
 
 #include "tusb.h"
 #include "bsp/board_api.h"
+#include "app.h"
 
 #ifdef ESP_PLATFORM
   #define CDC_STACK_SZIE      2048
diff --git a/examples/host/cdc_msc_hid_freertos/src/hid_app.c b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
index 9ea5c1be0..0b4ee2c78 100644
--- a/examples/host/cdc_msc_hid_freertos/src/hid_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/hid_app.c
@@ -25,6 +25,7 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM DECLARATION
@@ -160,7 +161,7 @@ static void process_kbd_report(hid_keyboard_report_t const *report) {
 // Mouse
 //--------------------------------------------------------------------+
 
-void cursor_movement(int8_t x, int8_t y, int8_t wheel) {
+static void cursor_movement(int8_t x, int8_t y, int8_t wheel) {
 #if USE_ANSI_ESCAPE
   // Move X using ansi escape
   if ( x < 0) {
diff --git a/examples/host/cdc_msc_hid_freertos/src/main.c b/examples/host/cdc_msc_hid_freertos/src/main.c
index d498c1b57..5dab2bed0 100644
--- a/examples/host/cdc_msc_hid_freertos/src/main.c
+++ b/examples/host/cdc_msc_hid_freertos/src/main.c
@@ -29,6 +29,7 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 #ifdef ESP_PLATFORM
   #define USBH_STACK_SIZE     4096
@@ -65,9 +66,6 @@ TimerHandle_t blinky_tm;
 static void led_blinky_cb(TimerHandle_t xTimer);
 static void usb_host_task(void* param);
 
-extern void cdc_app_init(void);
-extern void hid_app_init(void);
-extern void msc_app_init(void);
 
 /*------------- MAIN -------------*/
 int main(void) {
diff --git a/examples/host/cdc_msc_hid_freertos/src/msc_app.c b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
index 6439495a8..a6e3ed4ee 100644
--- a/examples/host/cdc_msc_hid_freertos/src/msc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/msc_app.c
@@ -24,6 +24,7 @@
  */
 
 #include "tusb.h"
+#include "app.h"
 
 // define the buffer to be place in USB/DMA memory with correct alignment/cache line size
 CFG_TUH_MEM_SECTION static struct {
diff --git a/examples/host/hid_controller/src/app.h b/examples/host/hid_controller/src/app.h
new file mode 100644
index 000000000..1f9015cd2
--- /dev/null
+++ b/examples/host/hid_controller/src/app.h
@@ -0,0 +1,31 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+#ifndef TUSB_TINYUSB_EXAMPLES_APP_H
+#define TUSB_TINYUSB_EXAMPLES_APP_H
+
+void hid_app_task(void);
+
+#endif
diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index 1d6ca8b07..f8c3d029b 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -25,6 +25,7 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 /* From https://www.kernel.org/doc/html/latest/input/gamepad.html
           ____________________________              __
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index f3244db95..fa70d7d1a 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -34,18 +34,15 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
+#include "app.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF PROTYPES
 //--------------------------------------------------------------------+
 void led_blinking_task(void);
 
-extern void cdc_task(void);
-extern void hid_app_task(void);
-
 /*------------- MAIN -------------*/
-int main(void)
-{
+int main(void) {
   board_init();
 
   printf("TinyUSB Host HID Controller Example\r\n");
@@ -60,19 +57,11 @@ int main(void)
 
   board_init_after_tusb();
 
-  while (1)
-  {
+  while (1) {
     // tinyusb host task
     tuh_task();
     led_blinking_task();
-
-#if CFG_TUH_CDC
-    cdc_task();
-#endif
-
-#if CFG_TUH_HID
     hid_app_task();
-#endif
   }
 }
 
@@ -83,8 +72,7 @@ int main(void)
 //--------------------------------------------------------------------+
 // Blinking Task
 //--------------------------------------------------------------------+
-void led_blinking_task(void)
-{
+void led_blinking_task(void) {
   const uint32_t interval_ms = 1000;
   static uint32_t start_ms = 0;
 
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index e141664da..a51978479 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -180,9 +180,11 @@ uint32_t tusb_time_millis_api(void) {
 // FreeRTOS hooks
 //--------------------------------------------------------------------
 #if CFG_TUSB_OS == OPT_OS_FREERTOS && !defined(ESP_PLATFORM)
+
 #include "FreeRTOS.h"
 #include "task.h"
 
+void vApplicationMallocFailedHook(void); // missing prototype
 void vApplicationMallocFailedHook(void) {
   taskDISABLE_INTERRUPTS();
   TU_ASSERT(false, );
@@ -199,7 +201,7 @@ void vApplicationStackOverflowHook(xTaskHandle pxTask, char *pcTaskName) {
 /* configSUPPORT_STATIC_ALLOCATION is set to 1, so the application must provide an
  * implementation of vApplicationGetIdleTaskMemory() to provide the memory that is
  * used by the Idle task. */
-void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) {
+void vApplicationGetIdleTaskMemory(StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize) {
   /* If the buffers to be provided to the Idle task are declared inside this
    * function then they must be declared static - otherwise they will be allocated on
    * the stack and so not exists after this function exits. */
@@ -243,6 +245,8 @@ void vApplicationGetTimerTaskMemory( StaticTask_t **ppxTimerTaskTCBBuffer, Stack
 }
 
 #if CFG_TUSB_MCU == OPT_MCU_RX63X || CFG_TUSB_MCU == OPT_MCU_RX65X
+void vApplicationSetupTimerInterrupt(void);
+
 #include "iodefine.h"
 void vApplicationSetupTimerInterrupt(void) {
   /* Enable CMT0 */
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 9ec80df91..daabed81b 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -38,6 +38,35 @@ if (NOT DEFINED TOOLCHAIN)
   set(TOOLCHAIN gcc)
 endif ()
 
+set(WARN_FLAGS_GNU
+  -Wall
+  -Wextra
+  -Werror
+  -Wfatal-errors
+  -Wdouble-promotion
+  -Wstrict-prototypes
+  -Wstrict-overflow
+  -Werror-implicit-function-declaration
+  -Wfloat-equal
+  -Wundef
+  -Wshadow
+  -Wwrite-strings
+  -Wsign-compare
+  -Wmissing-format-attribute
+  -Wunreachable-code
+  -Wcast-align
+  -Wcast-function-type
+  -Wcast-qual
+  -Wnull-dereference
+  -Wuninitialized
+  -Wunused
+  -Wunused-function
+  -Wreturn-type
+  -Wredundant-decls
+  -Wmissing-prototypes
+  )
+set(WARN_FLAGS_Clang ${WARN_FLAGS_GNU})
+
 # Optimization
 if (NOT DEFINED CMAKE_BUILD_TYPE OR CMAKE_BUILD_TYPE STREQUAL "")
   set(CMAKE_BUILD_TYPE MinSizeRel CACHE STRING "Build type" FORCE)
@@ -48,8 +77,8 @@ endif ()
 #-------------------------------------------------------------
 if (NOT DEFINED FAMILY)
   if (NOT DEFINED BOARD)
-    message(FATAL_ERROR "You must set a FAMILY variable for the build (e.g. rp2040, espressif).
-    You can do this via -DFAMILY=xxx on the cmake command line")
+    message(FATAL_ERROR "You must set a BOARD variable for the build (e.g. metro_m4_express, raspberry_pi_pico).
+    You can do this via -DBOARD=xxx on the cmake command line")
   endif ()
 
   # Find path contains BOARD
@@ -226,33 +255,7 @@ function(family_configure_common TARGET RTOS)
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_compile_options(${TARGET} PRIVATE
-      -Wall
-      -Wextra
-      #-Werror
-      -Wfatal-errors
-      -Wdouble-promotion
-      -Wstrict-prototypes
-      -Wstrict-overflow
-      -Werror-implicit-function-declaration
-      -Wfloat-equal
-      -Wundef
-      -Wshadow
-      -Wwrite-strings
-      -Wsign-compare
-      -Wmissing-format-attribute
-      -Wunreachable-code
-      -Wcast-align
-      -Wcast-function-type
-      -Wcast-qual
-      -Wnull-dereference
-      -Wuninitialized
-      -Wunused
-      -Wunused-function
-      -Wreturn-type
-      -Wredundant-decls
-      -Wmissing-prototypes
-      )
+    target_compile_options(${TARGET} PRIVATE ${WARN_FLAGS_${CMAKE_C_COMPILER_ID}})
     target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0
       AND NO_WARN_RWX_SEGMENTS_SUPPORTED AND (NOT RTOS STREQUAL zephyr))
diff --git a/lib/networking/dhserver.c b/lib/networking/dhserver.c
index 9dedf87e2..87a63c5de 100644
--- a/lib/networking/dhserver.c
+++ b/lib/networking/dhserver.c
@@ -145,7 +145,7 @@ static __inline void free_entry(dhcp_entry_t *entry)
 	memset(entry->mac, 0, 6);
 }
 
-uint8_t *find_dhcp_option(uint8_t *attrs, int size, uint8_t attr)
+static uint8_t *find_dhcp_option(uint8_t *attrs, int size, uint8_t attr)
 {
 	int i = 0;
 	while ((i + 1) < size)
@@ -159,7 +159,7 @@ uint8_t *find_dhcp_option(uint8_t *attrs, int size, uint8_t attr)
 	return NULL;
 }
 
-int fill_options(void *dest,
+static int fill_options(void *dest,
 	uint8_t msg_type,
 	const char *domain,
 	ip4_addr_t dns,
diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c
index 451d5405b..e2849fb10 100644
--- a/lib/networking/rndis_reports.c
+++ b/lib/networking/rndis_reports.c
@@ -29,7 +29,10 @@
 
 #include <stdalign.h>
 #include <string.h>
-#include "class/net/net_device.h"
+#include "tusb.h"
+
+#if CFG_TUD_ECM_RNDIS
+
 #include "rndis_protocol.h"
 #include "netif/ethernet.h"
 
@@ -299,3 +302,5 @@ void rndis_class_set_handler(uint8_t *data, int size)
       break;
   }
 }
+
+#endif
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index fd47c649d..00948767e 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -360,6 +360,7 @@ bool tud_audio_feedback_format_correction_cb(uint8_t func_id);
 
 #if CFG_TUD_AUDIO_ENABLE_INTERRUPT_EP
 void tud_audio_int_done_cb(uint8_t rhport);
+void tud_audio_int_xfer_cb(uint8_t rhport);
 #endif
 
 // Invoked when audio set interface request received
diff --git a/src/class/net/ecm_rndis_device.c b/src/class/net/ecm_rndis_device.c
index 299eb97c8..7dff66823 100644
--- a/src/class/net/ecm_rndis_device.c
+++ b/src/class/net/ecm_rndis_device.c
@@ -35,8 +35,6 @@
 #include "net_device.h"
 #include "rndis_protocol.h"
 
-extern void rndis_class_set_handler(uint8_t *data, int size); /* found in ./misc/networking/rndis_reports.c */
-
 #define CFG_TUD_NET_PACKET_PREFIX_LEN sizeof(rndis_data_packet_t)
 #define CFG_TUD_NET_PACKET_SUFFIX_LEN 0
 
diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h
index fff2623b7..ef5ecffc8 100644
--- a/src/class/net/net_device.h
+++ b/src/class/net/net_device.h
@@ -55,6 +55,13 @@ typedef enum
  extern "C" {
 #endif
 
+//--------------------------------------------------------------------+
+// Implemented by Application
+//--------------------------------------------------------------------+
+#if CFG_TUD_ECM_RNDIS
+extern void rndis_class_set_handler(uint8_t *data, int size);
+#endif
+
 //--------------------------------------------------------------------+
 // Application API
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From a5fde08285a10a87a1f374913dfe7edfafbe383d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 17:18:26 +0700
Subject: refactor same7x using codex

---
 hw/bsp/same70_qmtech/board.mk                      |   59 -
 hw/bsp/same70_qmtech/hpl_pmc_config.h              | 1053 -----
 hw/bsp/same70_qmtech/hpl_usart_config.h            |  215 -
 hw/bsp/same70_qmtech/hpl_xdmac_config.h            | 4400 --------------------
 hw/bsp/same70_qmtech/peripheral_clk_config.h       |  126 -
 hw/bsp/same70_qmtech/same70_qmtech.c               |  159 -
 hw/bsp/same70_xplained/board.mk                    |   67 -
 hw/bsp/same70_xplained/hpl_pmc_config.h            | 1053 -----
 hw/bsp/same70_xplained/hpl_usart_config.h          |  215 -
 hw/bsp/same70_xplained/hpl_xdmac_config.h          | 4400 --------------------
 hw/bsp/same70_xplained/peripheral_clk_config.h     |  126 -
 hw/bsp/same70_xplained/same70_xplained.c           |  156 -
 hw/bsp/same7x/boards/same70_qmtech/board.cmake     |    8 +
 hw/bsp/same7x/boards/same70_qmtech/board.h         |   64 +
 hw/bsp/same7x/boards/same70_qmtech/board.mk        |    3 +
 .../same7x/boards/same70_qmtech/hpl_pmc_config.h   | 1053 +++++
 .../same7x/boards/same70_qmtech/hpl_usart_config.h |  215 +
 .../same7x/boards/same70_qmtech/hpl_xdmac_config.h | 4400 ++++++++++++++++++++
 .../boards/same70_qmtech/peripheral_clk_config.h   |  126 +
 hw/bsp/same7x/boards/same70_xplained/board.cmake   |    8 +
 hw/bsp/same7x/boards/same70_xplained/board.h       |   64 +
 hw/bsp/same7x/boards/same70_xplained/board.mk      |    3 +
 .../same7x/boards/same70_xplained/hpl_pmc_config.h | 1053 +++++
 .../boards/same70_xplained/hpl_usart_config.h      |  215 +
 .../boards/same70_xplained/hpl_xdmac_config.h      | 4400 ++++++++++++++++++++
 .../boards/same70_xplained/peripheral_clk_config.h |  126 +
 hw/bsp/same7x/family.c                             |  196 +
 hw/bsp/same7x/family.cmake                         |  121 +
 hw/bsp/same7x/family.mk                            |   56 +
 29 files changed, 12111 insertions(+), 12029 deletions(-)
 delete mode 100644 hw/bsp/same70_qmtech/board.mk
 delete mode 100644 hw/bsp/same70_qmtech/hpl_pmc_config.h
 delete mode 100644 hw/bsp/same70_qmtech/hpl_usart_config.h
 delete mode 100644 hw/bsp/same70_qmtech/hpl_xdmac_config.h
 delete mode 100644 hw/bsp/same70_qmtech/peripheral_clk_config.h
 delete mode 100644 hw/bsp/same70_qmtech/same70_qmtech.c
 delete mode 100644 hw/bsp/same70_xplained/board.mk
 delete mode 100644 hw/bsp/same70_xplained/hpl_pmc_config.h
 delete mode 100644 hw/bsp/same70_xplained/hpl_usart_config.h
 delete mode 100644 hw/bsp/same70_xplained/hpl_xdmac_config.h
 delete mode 100644 hw/bsp/same70_xplained/peripheral_clk_config.h
 delete mode 100644 hw/bsp/same70_xplained/same70_xplained.c
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/board.cmake
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/board.h
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/board.mk
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/hpl_pmc_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/hpl_usart_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/hpl_xdmac_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_qmtech/peripheral_clk_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/board.cmake
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/board.h
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/board.mk
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/hpl_pmc_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/hpl_usart_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/hpl_xdmac_config.h
 create mode 100644 hw/bsp/same7x/boards/same70_xplained/peripheral_clk_config.h
 create mode 100644 hw/bsp/same7x/family.c
 create mode 100644 hw/bsp/same7x/family.cmake
 create mode 100644 hw/bsp/same7x/family.mk

(limited to 'hw')

diff --git a/hw/bsp/same70_qmtech/board.mk b/hw/bsp/same70_qmtech/board.mk
deleted file mode 100644
index 7e949e135..000000000
--- a/hw/bsp/same70_qmtech/board.mk
+++ /dev/null
@@ -1,59 +0,0 @@
-ASF_DIR = hw/mcu/microchip/same70
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m7 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -D__SAME70N19B__ \
-  -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
-
-# suppress following warnings from mcu driver
-CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
-
-# SAM driver is flooded with -Wcast-qual which slow down complication significantly
-CFLAGS_SKIP += -Wcast-qual
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = $(ASF_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
-
-SRC_C += \
-	src/portable/microchip/samx7x/dcd_samx7x.c \
-	$(ASF_DIR)/same70b/gcc/gcc/startup_same70q21b.c \
-	$(ASF_DIR)/same70b/gcc/system_same70q21b.c \
-	$(ASF_DIR)/hpl/core/hpl_init.c \
-	$(ASF_DIR)/hpl/usart/hpl_usart.c \
-	$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
-	$(ASF_DIR)/hal/src/hal_usart_async.c \
-	$(ASF_DIR)/hal/src/hal_io.c \
-	$(ASF_DIR)/hal/src/hal_atomic.c \
-	$(ASF_DIR)/hal/utils/src/utils_ringbuffer.c
-
-INC += \
-  $(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(ASF_DIR) \
-	$(TOP)/$(ASF_DIR)/config \
-	$(TOP)/$(ASF_DIR)/same70b/include \
-	$(TOP)/$(ASF_DIR)/hal/include \
-	$(TOP)/$(ASF_DIR)/hal/utils/include \
-	$(TOP)/$(ASF_DIR)/hpl/core \
-	$(TOP)/$(ASF_DIR)/hpl/pio \
-	$(TOP)/$(ASF_DIR)/hpl/pmc \
-	$(TOP)/$(ASF_DIR)/hri \
-	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
-
-# For flash-jlink target
-JLINK_DEVICE = SAME70N19B
-
-# flash using edbg from https://github.com/ataradov/edbg
-# Note: SAME70's GPNVM1 must be set to 1 to boot from flash with
-# 	edbg -t same70 -F w0,1,1
-flash: $(BUILD)/$(PROJECT).bin
-	edbg --verbose -t same70 -pv -f $<
diff --git a/hw/bsp/same70_qmtech/hpl_pmc_config.h b/hw/bsp/same70_qmtech/hpl_pmc_config.h
deleted file mode 100644
index 387aaa5df..000000000
--- a/hw/bsp/same70_qmtech/hpl_pmc_config.h
+++ /dev/null
@@ -1,1053 +0,0 @@
-/* Auto-generated config file hpl_pmc_config.h */
-#ifndef HPL_PMC_CONFIG_H
-#define HPL_PMC_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-#include <peripheral_clk_config.h>
-
-#define CLK_SRC_OPTION_OSC32K 0
-#define CLK_SRC_OPTION_XOSC32K 1
-#define CLK_SRC_OPTION_OSC12M 2
-#define CLK_SRC_OPTION_XOSC20M 3
-
-#define CLK_SRC_OPTION_SLCK 0
-#define CLK_SRC_OPTION_MAINCK 1
-#define CLK_SRC_OPTION_PLLACK 2
-#define CLK_SRC_OPTION_UPLLCKDIV 3
-#define CLK_SRC_OPTION_MCK 4
-
-#define CLK_SRC_OPTION_UPLLCK 3
-
-#define CONF_RC_4M 0
-#define CONF_RC_8M 1
-#define CONF_RC_12M 2
-
-#define CONF_XOSC32K_NO_BYPASS 0
-#define CONF_XOSC32K_BYPASS 1
-
-#define CONF_XOSC20M_NO_BYPASS 0
-#define CONF_XOSC20M_BYPASS 1
-
-// <e> Clock_SLCK configuration
-// <i> Indicates whether SLCK configuration is enabled or not
-// <id> enable_clk_gen_slck
-#ifndef CONF_CLK_SLCK_CONFIG
-#define CONF_CLK_SLCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SLCK source
-
-// <CLK_SRC_OPTION_OSC32K"> 32kHz High Accuracy Internal Oscillator (OSC32K)
-
-// <CLK_SRC_OPTION_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
-
-// <i> This defines the clock source for SLCK
-// <id> clk_gen_slck_oscillator
-#ifndef CONF_CLK_GEN_SLCK_SRC
-#define CONF_CLK_GEN_SLCK_SRC CLK_SRC_OPTION_OSC32K
-#endif
-
-// <q> Enable Clock_SLCK
-// <i> Indicates whether SLCK is enabled or disable
-// <id> clk_gen_slck_arch_enable
-#ifndef CONF_CLK_SLCK_ENABLE
-#define CONF_CLK_SLCK_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_MAINCK configuration
-// <i> Indicates whether MAINCK configuration is enabled or not
-// <id> enable_clk_gen_mainck
-#ifndef CONF_CLK_MAINCK_CONFIG
-#define CONF_CLK_MAINCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MAINCK source
-
-// <CLK_SRC_OPTION_OSC12M"> Embedded 4/8/12MHz RC Oscillator (OSC12M)
-
-// <CLK_SRC_OPTION_XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
-
-// <i> This defines the clock source for MAINCK
-// <id> clk_gen_mainck_oscillator
-#ifndef CONF_CLK_GEN_MAINCK_SRC
-#define CONF_CLK_GEN_MAINCK_SRC CLK_SRC_OPTION_XOSC20M
-#endif
-
-// <q> Enable Clock_MAINCK
-// <i> Indicates whether MAINCK is enabled or disable
-// <id> clk_gen_mainck_arch_enable
-#ifndef CONF_CLK_MAINCK_ENABLE
-#define CONF_CLK_MAINCK_ENABLE 1
-#endif
-
-// <q> Enable Main Clock Failure Detection
-// <i> Indicates whether Main Clock Failure Detection is enabled or disable.
-// <i> The 4/8/12 MHz RC oscillator must be selected as the source of MAINCK.
-// <id> clk_gen_cfden_enable
-#ifndef CONF_CLK_CFDEN_ENABLE
-#define CONF_CLK_CFDEN_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_MCKR configuration
-// <i> Indicates whether MCKR configuration is enabled or not
-// <id> enable_clk_gen_mckr
-#ifndef CONF_CLK_MCKR_CONFIG
-#define CONF_CLK_MCKR_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MCKR source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <i> This defines the clock source for MCKR
-// <id> clk_gen_mckr_oscillator
-#ifndef CONF_CLK_GEN_MCKR_SRC
-#define CONF_CLK_GEN_MCKR_SRC CLK_SRC_OPTION_PLLACK
-#endif
-
-// <q> Enable Clock_MCKR
-// <i> Indicates whether MCKR is enabled or disable
-// <id> clk_gen_mckr_arch_enable
-#ifndef CONF_CLK_MCKR_ENABLE
-#define CONF_CLK_MCKR_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Master Clock Prescaler
-// <0=> 1
-// <1=> 2
-// <2=> 4
-// <3=> 8
-// <4=> 16
-// <5=> 32
-// <6=> 64
-// <7=> 3
-// <i> Select the clock prescaler.
-// <id> mckr_presc
-#ifndef CONF_MCKR_PRESC
-#define CONF_MCKR_PRESC 0
-#endif
-
-// </h>
-// </e>// <e> Clock_MCK configuration
-// <i> Indicates whether MCK configuration is enabled or not
-// <id> enable_clk_gen_mck
-#ifndef CONF_CLK_MCK_CONFIG
-#define CONF_CLK_MCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MCK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for MCK
-// <id> clk_gen_mck_oscillator
-#ifndef CONF_CLK_GEN_MCK_SRC
-#define CONF_CLK_GEN_MCK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-//<o> Master Clock Controller Divider MCK divider
-// <0=> 1
-// <1=> 2
-// <3=> 3
-// <2=> 4
-// <i> Select the master clock divider.
-// <id> mck_div
-#ifndef CONF_MCK_DIV
-#define CONF_MCK_DIV 1
-#endif
-
-// </h>
-// </e>// <e> Clock_SYSTICK configuration
-// <i> Indicates whether SYSTICK configuration is enabled or not
-// <id> enable_clk_gen_systick
-#ifndef CONF_CLK_SYSTICK_CONFIG
-#define CONF_CLK_SYSTICK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SYSTICK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for SYSTICK
-// <id> clk_gen_systick_oscillator
-#ifndef CONF_CLK_GEN_SYSTICK_SRC
-#define CONF_CLK_GEN_SYSTICK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Systick clock divider
-// <8=> 8
-// <i> Select systick clock divider
-// <id> systick_clock_div
-#ifndef CONF_SYSTICK_DIV
-#define CONF_SYSTICK_DIV 8
-#endif
-
-// </h>
-// </e>// <e> Clock_FCLK configuration
-// <i> Indicates whether FCLK configuration is enabled or not
-// <id> enable_clk_gen_fclk
-#ifndef CONF_CLK_FCLK_CONFIG
-#define CONF_CLK_FCLK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator FCLK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for FCLK
-// <id> clk_gen_fclk_oscillator
-#ifndef CONF_CLK_GEN_FCLK_SRC
-#define CONF_CLK_GEN_FCLK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_GCLK0 configuration
-// <i> Indicates whether GCLK0 configuration is enabled or not
-// <id> enable_clk_gen_gclk0
-#ifndef CONF_CLK_GCLK0_CONFIG
-#define CONF_CLK_GCLK0_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator GCLK0 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for GCLK0
-// <id> clk_gen_gclk0_oscillator
-#ifndef CONF_CLK_GEN_GCLK0_SRC
-#define CONF_CLK_GEN_GCLK0_SRC CLK_SRC_OPTION_MCK
-#endif
-
-// <q> Enable Clock_GCLK0
-// <i> Indicates whether GCLK0 is enabled or disable
-// <id> clk_gen_gclk0_arch_enable
-#ifndef CONF_CLK_GCLK0_ENABLE
-#define CONF_CLK_GCLK0_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-// <q> Enable GCLK0 GCLKEN
-// <i> Indicates whether GCLK0 GCLKEN is enabled or disable
-// <id> gclk0_gclken_enable
-#ifndef CONF_GCLK0_GCLKEN_ENABLE
-#define CONF_GCLK0_GCLKEN_ENABLE 0
-#endif
-
-// <o> Generic Clock GCLK0 divider <1-256>
-// <i> Select the clock divider (divider = GCLKDIV + 1).
-// <id> gclk0_div
-#ifndef CONF_GCLK0_DIV
-#define CONF_GCLK0_DIV 2
-#endif
-
-// </h>
-// </e>// <e> Clock_GCLK1 configuration
-// <i> Indicates whether GCLK1 configuration is enabled or not
-// <id> enable_clk_gen_gclk1
-#ifndef CONF_CLK_GCLK1_CONFIG
-#define CONF_CLK_GCLK1_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator GCLK1 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for GCLK1
-// <id> clk_gen_gclk1_oscillator
-#ifndef CONF_CLK_GEN_GCLK1_SRC
-#define CONF_CLK_GEN_GCLK1_SRC CLK_SRC_OPTION_PLLACK
-#endif
-
-// <q> Enable Clock_GCLK1
-// <i> Indicates whether GCLK1 is enabled or disable
-// <id> clk_gen_gclk1_arch_enable
-#ifndef CONF_CLK_GCLK1_ENABLE
-#define CONF_CLK_GCLK1_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-// <q> Enable GCLK1 GCLKEN
-// <i> Indicates whether GCLK1 GCLKEN is enabled or disable
-// <id> gclk1_gclken_enable
-#ifndef CONF_GCLK1_GCLKEN_ENABLE
-#define CONF_GCLK1_GCLKEN_ENABLE 0
-#endif
-
-// <o> Generic Clock GCLK1 divider <1-256>
-// <i> Select the clock divider (divider = GCLKDIV + 1).
-// <id> gclk1_div
-#ifndef CONF_GCLK1_DIV
-#define CONF_GCLK1_DIV 3
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK0 configuration
-// <i> Indicates whether PCK0 configuration is enabled or not
-// <id> enable_clk_gen_pck0
-#ifndef CONF_CLK_PCK0_CONFIG
-#define CONF_CLK_PCK0_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK0 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK0
-// <id> clk_gen_pck0_oscillator
-#ifndef CONF_CLK_GEN_PCK0_SRC
-#define CONF_CLK_GEN_PCK0_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK0
-// <i> Indicates whether PCK0 is enabled or disable
-// <id> clk_gen_pck0_arch_enable
-#ifndef CONF_CLK_PCK0_ENABLE
-#define CONF_CLK_PCK0_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck0_presc
-#ifndef CONF_PCK0_PRESC
-#define CONF_PCK0_PRESC 1
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK1 configuration
-// <i> Indicates whether PCK1 configuration is enabled or not
-// <id> enable_clk_gen_pck1
-#ifndef CONF_CLK_PCK1_CONFIG
-#define CONF_CLK_PCK1_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK1 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK1
-// <id> clk_gen_pck1_oscillator
-#ifndef CONF_CLK_GEN_PCK1_SRC
-#define CONF_CLK_GEN_PCK1_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK1
-// <i> Indicates whether PCK1 is enabled or disable
-// <id> clk_gen_pck1_arch_enable
-#ifndef CONF_CLK_PCK1_ENABLE
-#define CONF_CLK_PCK1_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck1_presc
-#ifndef CONF_PCK1_PRESC
-#define CONF_PCK1_PRESC 2
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK2 configuration
-// <i> Indicates whether PCK2 configuration is enabled or not
-// <id> enable_clk_gen_pck2
-#ifndef CONF_CLK_PCK2_CONFIG
-#define CONF_CLK_PCK2_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK2 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK2
-// <id> clk_gen_pck2_oscillator
-#ifndef CONF_CLK_GEN_PCK2_SRC
-#define CONF_CLK_GEN_PCK2_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK2
-// <i> Indicates whether PCK2 is enabled or disable
-// <id> clk_gen_pck2_arch_enable
-#ifndef CONF_CLK_PCK2_ENABLE
-#define CONF_CLK_PCK2_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck2_presc
-#ifndef CONF_PCK2_PRESC
-#define CONF_PCK2_PRESC 3
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK3 configuration
-// <i> Indicates whether PCK3 configuration is enabled or not
-// <id> enable_clk_gen_pck3
-#ifndef CONF_CLK_PCK3_CONFIG
-#define CONF_CLK_PCK3_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK3 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK3
-// <id> clk_gen_pck3_oscillator
-#ifndef CONF_CLK_GEN_PCK3_SRC
-#define CONF_CLK_GEN_PCK3_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK3
-// <i> Indicates whether PCK3 is enabled or disable
-// <id> clk_gen_pck3_arch_enable
-#ifndef CONF_CLK_PCK3_ENABLE
-#define CONF_CLK_PCK3_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck3_presc
-#ifndef CONF_PCK3_PRESC
-#define CONF_PCK3_PRESC 4
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK4 configuration
-// <i> Indicates whether PCK4 configuration is enabled or not
-// <id> enable_clk_gen_pck4
-#ifndef CONF_CLK_PCK4_CONFIG
-#define CONF_CLK_PCK4_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK4 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK4
-// <id> clk_gen_pck4_oscillator
-#ifndef CONF_CLK_GEN_PCK4_SRC
-#define CONF_CLK_GEN_PCK4_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK4
-// <i> Indicates whether PCK4 is enabled or disable
-// <id> clk_gen_pck4_arch_enable
-#ifndef CONF_CLK_PCK4_ENABLE
-#define CONF_CLK_PCK4_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck4_presc
-#ifndef CONF_PCK4_PRESC
-#define CONF_PCK4_PRESC 5
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK5 configuration
-// <i> Indicates whether PCK5 configuration is enabled or not
-// <id> enable_clk_gen_pck5
-#ifndef CONF_CLK_PCK5_CONFIG
-#define CONF_CLK_PCK5_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK5 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK5
-// <id> clk_gen_pck5_oscillator
-#ifndef CONF_CLK_GEN_PCK5_SRC
-#define CONF_CLK_GEN_PCK5_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK5
-// <i> Indicates whether PCK5 is enabled or disable
-// <id> clk_gen_pck5_arch_enable
-#ifndef CONF_CLK_PCK5_ENABLE
-#define CONF_CLK_PCK5_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck5_presc
-#ifndef CONF_PCK5_PRESC
-#define CONF_PCK5_PRESC 6
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK6 configuration
-// <i> Indicates whether PCK6 configuration is enabled or not
-// <id> enable_clk_gen_pck6
-#ifndef CONF_CLK_PCK6_CONFIG
-#define CONF_CLK_PCK6_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK6 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK6
-// <id> clk_gen_pck6_oscillator
-#ifndef CONF_CLK_GEN_PCK6_SRC
-#define CONF_CLK_GEN_PCK6_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK6
-// <i> Indicates whether PCK6 is enabled or disable
-// <id> clk_gen_pck6_arch_enable
-#ifndef CONF_CLK_PCK6_ENABLE
-#define CONF_CLK_PCK6_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck6_presc
-#ifndef CONF_PCK6_PRESC
-#define CONF_PCK6_PRESC 7
-#endif
-
-// </h>
-// </e>// <e> Clock_USB_480M configuration
-// <i> Indicates whether USB_480M configuration is enabled or not
-// <id> enable_clk_gen_usb_480m
-#ifndef CONF_CLK_USB_480M_CONFIG
-#define CONF_CLK_USB_480M_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator USB_480M source
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <i> This defines the clock source for USB_480M
-// <id> clk_gen_usb_480m_oscillator
-#ifndef CONF_CLK_GEN_USB_480M_SRC
-#define CONF_CLK_GEN_USB_480M_SRC CLK_SRC_OPTION_UPLLCK
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_USB_48M configuration
-// <i> Indicates whether USB_48M configuration is enabled or not
-// <id> enable_clk_gen_usb_48m
-#ifndef CONF_CLK_USB_48M_CONFIG
-#define CONF_CLK_USB_48M_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator USB_48M source
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <i> This defines the clock source for USB_48M
-// <id> clk_gen_usb_48m_oscillator
-#ifndef CONF_CLK_GEN_USB_48M_SRC
-#define CONF_CLK_GEN_USB_48M_SRC CLK_SRC_OPTION_UPLLCKDIV
-#endif
-
-// <q> Enable Clock_USB_48M
-// <i> Indicates whether USB_48M is enabled or disable
-// <id> clk_gen_usb_48m_arch_enable
-#ifndef CONF_CLK_USB_48M_ENABLE
-#define CONF_CLK_USB_48M_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// <o> USB Clock Controller Divider <1-16>
-// <i> Select the USB clock divider (divider = USBDIV + 1).
-// <id> usb_48m_div
-#ifndef CONF_USB_48M_DIV
-#define CONF_USB_48M_DIV 5
-#endif
-
-// </h>
-// </e>// <e> Clock_SLCK2 configuration
-// <i> Indicates whether SLCK2 configuration is enabled or not
-// <id> enable_clk_gen_slck2
-#ifndef CONF_CLK_SLCK2_CONFIG
-#define CONF_CLK_SLCK2_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SLCK2 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <i> This defines the clock source for SLCK2
-// <id> clk_gen_slck2_oscillator
-#ifndef CONF_CLK_GEN_SLCK2_SRC
-#define CONF_CLK_GEN_SLCK2_SRC CLK_SRC_OPTION_SLCK
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>
-
-// <e> System Configuration
-// <i> Indicates whether configuration for system is enabled or not
-// <id> enable_hclk_clock
-#ifndef CONF_SYSTEM_CONFIG
-#define CONF_SYSTEM_CONFIG 1
-#endif
-
-// <h> Processor Clock Settings
-// <y> Processor Clock source
-// <MCKR"> Master Clock Controller (PMC_MCKR)
-// <i> This defines the clock source for the HCLK (Processor clock)
-// <id> hclk_clock_source
-#ifndef CONF_HCLK_SRC
-#define CONF_HCLK_SRC MCKR
-#endif
-
-// <o> Flash Wait State
-// <0=> 1 cycle
-// <1=> 2 cycles
-// <2=> 3 cycles
-// <3=> 4 cycles
-// <4=> 5 cycles
-// <5=> 6 cycles
-// <6=> 7 cycles
-// <i> This field defines the number of wait states for read and write operations.
-// <id> efc_fws
-#ifndef CONF_EFC_WAIT_STATE
-#define CONF_EFC_WAIT_STATE 5
-#endif
-
-// </h>
-// </e>
-
-// <e> SysTick Clock
-// <id> enable_systick_clk_clock
-#ifndef CONF_SYSTICK_CLK_CONFIG
-#define CONF_SYSTICK_CLK_CONFIG 1
-#endif
-
-// <y> SysTick Clock source
-// <MCKR"> Master Clock Controller (PMC_MCKR)
-// <i> This defines the clock source for the SysTick Clock
-// <id> systick_clk_clock_source
-#ifndef CONF_SYSTICK_CLK_SRC
-#define CONF_SYSTICK_CLK_SRC MCKR
-#endif
-
-// <o> SysTick Clock Divider
-// <8=> 8
-// <i> Fixed to 8 if Systick is not using Processor clock
-// <id> systick_clk_clock_div
-#ifndef CONF_SYSTICK_CLK_DIV
-#define CONF_SYSTICK_CLK_DIV 8
-#endif
-
-// </e>
-
-// <e> OSC32K Oscillator Configuration
-// <i> Indicates whether configuration for OSC32K is enabled or not
-// <id> enable_osc32k
-#ifndef CONF_OSC32K_CONFIG
-#define CONF_OSC32K_CONFIG 1
-#endif
-
-// <h> OSC32K Oscillator Control
-// <q> OSC32K Oscillator Enable
-// <i> Indicates whether OSC32K Oscillator is enabled or not
-// <id> osc32k_arch_enable
-#ifndef CONF_OSC32K_ENABLE
-#define CONF_OSC32K_ENABLE 0
-#endif
-// </h>
-// </e>
-
-// <e> XOSC32K Oscillator Configuration
-// <i> Indicates whether configuration for XOSC32K is enabled or not
-// <id> enable_xosc32k
-#ifndef CONF_XOSC32K_CONFIG
-#define CONF_XOSC32K_CONFIG 0
-#endif
-
-// <h> XOSC32K Oscillator Control
-// <y> Oscillator Bypass Select
-// <CONF_XOSC32K_NO_BYPASS"> The 32kHz crystal oscillator is not bypassed.
-// <CONF_XOSC32K_BYPASS"> The 32kHz crystal oscillator is bypassed.
-// <i> Indicates whether XOSC32K is bypassed.
-// <id> xosc32k_bypass
-#ifndef CONF_XOSC32K
-#define CONF_XOSC32K CONF_XOSC32K_NO_BYPASS
-#endif
-
-// <q> XOSC32K Oscillator Enable
-// <i> Indicates whether XOSC32K Oscillator is enabled or not
-// <id> xosc32k_arch_enable
-#ifndef CONF_XOSC32K_ENABLE
-#define CONF_XOSC32K_ENABLE 0
-#endif
-// </h>
-// </e>
-
-// <e> OSC12M Oscillator Configuration
-// <i> Indicates whether configuration for OSC12M is enabled or not
-// <id> enable_osc12m
-#ifndef CONF_OSC12M_CONFIG
-#define CONF_OSC12M_CONFIG 0
-#endif
-
-// <h> OSC12M Oscillator Control
-// <q> OSC12M Oscillator Enable
-// <i> Indicates whether OSC12M Oscillator is enabled or not.
-// <id> osc12m_arch_enable
-#ifndef CONF_OSC12M_ENABLE
-#define CONF_OSC12M_ENABLE 0
-#endif
-
-// <o> OSC12M selector
-//  <0=> 4000000
-//  <1=> 8000000
-//  <2=> 12000000
-// <i> Select the frequency of embedded fast RC oscillator.
-// <id> osc12m_selector
-#ifndef CONF_OSC12M_SELECTOR
-#define CONF_OSC12M_SELECTOR 2
-#endif
-// </h>
-// </e>
-
-// <e> XOSC20M Oscillator Configuration
-// <i> Indicates whether configuration for XOSC20M is enabled or not.
-// <id> enable_xosc20m
-#ifndef CONF_XOSC20M_CONFIG
-#define CONF_XOSC20M_CONFIG 1
-#endif
-
-// <h> XOSC20M Oscillator Control
-// <o> XOSC20M selector <3000000-20000000>
-// <i> Select the frequency of crystal or ceramic resonator oscillator.
-// <id> xosc20m_selector
-#ifndef CONF_XOSC20M_SELECTOR
-#define CONF_XOSC20M_SELECTOR 12000000
-#endif
-
-// <o> Start up time for the external oscillator (ms): <0-256>
-// <i> Select start-up time.
-// <id> xosc20m_startup_time
-#ifndef CONF_XOSC20M_STARTUP_TIME
-#define CONF_XOSC20M_STARTUP_TIME 62
-#endif
-
-// <y> Oscillator Bypass Select
-// <CONF_XOSC20M_NO_BYPASS"> The external crystal oscillator is not bypassed.
-// <CONF_XOSC20M_BYPASS"> The external crystal oscillator is bypassed.
-// <i> Indicates whether XOSC20M is bypassed.
-// <id> xosc20m_bypass
-#ifndef CONF_XOSC20M
-#define CONF_XOSC20M CONF_XOSC20M_NO_BYPASS
-#endif
-
-// <q> XOSC20M Oscillator Enable
-// <i> Indicates whether XOSC20M Oscillator is enabled or not
-// <id> xosc20m_arch_enable
-#ifndef CONF_XOSC20M_ENABLE
-#define CONF_XOSC20M_ENABLE 1
-#endif
-// </h>
-// </e>
-
-// <e> PLLACK Oscillator Configuration
-// <i> Indicates whether configuration for PLLACK is enabled or not
-// <id> enable_pllack
-#ifndef CONF_PLLACK_CONFIG
-#define CONF_PLLACK_CONFIG 1
-#endif
-
-// <y> PLLACK Reference Clock Source
-// <MAINCK"> Main Clock (MAINCK)
-// <i> Select the clock source.
-// <id> pllack_ref_clock
-#ifndef CONF_PLLACK_CLK
-#define CONF_PLLACK_CLK MAINCK
-#endif
-
-// <h> PLLACK Oscillator Control
-// <q> PLLACK Oscillator Enable
-// <i> Indicates whether PLLACK Oscillator is enabled or not
-// <id> pllack_arch_enable
-#ifndef CONF_PLLACK_ENABLE
-#define CONF_PLLACK_ENABLE 1
-#endif
-
-// <o> PLLA Frontend Divider (DIVA)  <1-255>
-// <i> Select the clock divider
-// <id> pllack_div
-#ifndef CONF_PLLACK_DIV
-#define CONF_PLLACK_DIV 1
-#endif
-
-// <o> PLLACK Muliplier <1-62>
-// <i> Indicates PLLA multiplier (multiplier = MULA + 1).
-// <id> pllack_mul
-#ifndef CONF_PLLACK_MUL
-#define CONF_PLLACK_MUL 25
-#endif
-// </h>
-// </e>
-
-// <e> UPLLCK Oscillator Configuration
-// <i> Indicates whether configuration for UPLLCK is enabled or not
-// <id> enable_upllck
-#ifndef CONF_UPLLCK_CONFIG
-#define CONF_UPLLCK_CONFIG 1
-#endif
-
-// <y> UPLLCK Reference Clock Source
-// <XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
-// <i> Select the clock source,only when the input frequency is 12M or 16M, the upllck output is 480M.
-// <id> upllck_ref_clock
-#ifndef CONF_UPLLCK_CLK
-#define CONF_UPLLCK_CLK XOSC20M
-#endif
-
-// <h> UPLLCK Oscillator Control
-// <q> UPLLCK Oscillator Enable
-// <i> Indicates whether UPLLCK Oscillator is enabled or not
-// <id> upllck_arch_enable
-#ifndef CONF_UPLLCK_ENABLE
-#define CONF_UPLLCK_ENABLE 1
-#endif
-// </h>
-// </e>
-
-// <e> UPLLCKDIV Oscillator Configuration
-// <i> Indicates whether configuration for UPLLCKDIV is enabled or not
-// <id> enable_upllckdiv
-#ifndef CONF_UPLLCKDIV_CONFIG
-#define CONF_UPLLCKDIV_CONFIG 1
-#endif
-
-// <y> UPLLCKDIV Reference Clock Source
-// <UPLLCK"> USB 480M Clock (UPLLCK)
-// <i> Select the clock source.
-// <id> upllckdiv_ref_clock
-#ifndef CONF_UPLLCKDIV_CLK
-#define CONF_UPLLCKDIV_CLK UPLLCK
-#endif
-
-// <h> UPLLCKDIV Oscillator Control
-// <o> UPLLCKDIV Clock Divider
-// <0=> 1
-// <1=> 2
-// <i> Select the clock divider.
-// <id> upllckdiv_div
-#ifndef CONF_UPLLCKDIV_DIV
-#define CONF_UPLLCKDIV_DIV 1
-#endif
-// </h>
-// </e>
-
-// <e> MCK/8
-// <id> enable_mck_div_8
-#ifndef CONF_MCK_DIV_8_CONFIG
-#define CONF_MCK_DIV_8_CONFIG 0
-#endif
-
-// <o> MCK/8 Source
-// <0=> Master Clock (MCK)
-// <id> mck_div_8_src
-#ifndef CONF_MCK_DIV_8_SRC
-#define CONF_MCK_DIV_8_SRC 0
-#endif
-// </e>
-
-// <e> External Clock Input Configuration
-// <id> enable_dummy_ext
-#ifndef CONF_DUMMY_EXT_CONFIG
-#define CONF_DUMMY_EXT_CONFIG 1
-#endif
-
-// <o> External Clock Input Source
-// <i> All here are dummy values
-// <i> Refer to the peripherals settings for actual input information
-// <0=> Specific clock input from specific pin
-// <id> dummy_ext_src
-#ifndef CONF_DUMMY_EXT_SRC
-#define CONF_DUMMY_EXT_SRC 0
-#endif
-// </e>
-
-// <e> External Clock Configuration
-// <id> enable_dummy_ext_clk
-#ifndef CONF_DUMMY_EXT_CLK_CONFIG
-#define CONF_DUMMY_EXT_CLK_CONFIG 1
-#endif
-
-// <o> External Clock Source
-// <i> All here are dummy values
-// <i> Refer to the peripherals settings for actual input information
-// <0=> External Clock Input
-// <id> dummy_ext_clk_src
-#ifndef CONF_DUMMY_EXT_CLK_SRC
-#define CONF_DUMMY_EXT_CLK_SRC 0
-#endif
-// </e>
-
-// <<< end of configuration section >>>
-
-#endif // HPL_PMC_CONFIG_H
diff --git a/hw/bsp/same70_qmtech/hpl_usart_config.h b/hw/bsp/same70_qmtech/hpl_usart_config.h
deleted file mode 100644
index 50ca3f15c..000000000
--- a/hw/bsp/same70_qmtech/hpl_usart_config.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/* Auto-generated config file hpl_usart_config.h */
-#ifndef HPL_USART_CONFIG_H
-#define HPL_USART_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-#include <peripheral_clk_config.h>
-
-#ifndef CONF_USART_1_ENABLE
-#define CONF_USART_1_ENABLE 1
-#endif
-
-// <h> Basic Configuration
-
-// <o> Frame parity
-// <0x0=>Even parity
-// <0x1=>Odd parity
-// <0x2=>Parity forced to 0
-// <0x3=>Parity forced to 1
-// <0x4=>No parity
-// <i> Parity bit mode for USART frame
-// <id> usart_parity
-#ifndef CONF_USART_1_PARITY
-#define CONF_USART_1_PARITY 0x4
-#endif
-
-// <o> Character Size
-// <0x0=>5 bits
-// <0x1=>6 bits
-// <0x2=>7 bits
-// <0x3=>8 bits
-// <i> Data character size in USART frame
-// <id> usart_character_size
-#ifndef CONF_USART_1_CHSIZE
-#define CONF_USART_1_CHSIZE 0x3
-#endif
-
-// <o> Stop Bit
-// <0=>1 stop bit
-// <1=>1.5 stop bits
-// <2=>2 stop bits
-// <i> Number of stop bits in USART frame
-// <id> usart_stop_bit
-#ifndef CONF_USART_1_SBMODE
-#define CONF_USART_1_SBMODE 0
-#endif
-
-// <o> Clock Output Select
-// <0=>The USART does not drive the SCK pin
-// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
-// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
-// <id> usart_clock_output_select
-#ifndef CONF_USART_1_CLKO
-#define CONF_USART_1_CLKO 0
-#endif
-
-// <o> Baud rate <1-3000000>
-// <i> USART baud rate setting
-// <id> usart_baud_rate
-#ifndef CONF_USART_1_BAUD
-#define CONF_USART_1_BAUD 9600
-#endif
-
-// </h>
-
-// <e> Advanced configuration
-// <id> usart_advanced
-#ifndef CONF_USART_1_ADVANCED_CONFIG
-#define CONF_USART_1_ADVANCED_CONFIG 0
-#endif
-
-// <o> Channel Mode
-// <0=>Normal Mode
-// <1=>Automatic Echo
-// <2=>Local Loopback
-// <3=>Remote Loopback
-// <i> Channel mode in USART frame
-// <id> usart_channel_mode
-#ifndef CONF_USART_1_CHMODE
-#define CONF_USART_1_CHMODE 0
-#endif
-
-// <q> 9 bits character enable
-// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
-// <id> usart_9bits_enable
-#ifndef CONF_USART_1_MODE9
-#define CONF_USART_1_MODE9 0
-#endif
-
-// <o> Variable Sync
-// <0=>User defined configuration
-// <1=>sync field is updated when a character is written into US_THR
-// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
-// <id> variable_sync
-#ifndef CONF_USART_1_VAR_SYNC
-#define CONF_USART_1_VAR_SYNC 0
-#endif
-
-// <o> Oversampling Mode
-// <0=>16 Oversampling
-// <1=>8 Oversampling
-// <i> Oversampling Mode in UART mode
-// <id> usart__oversampling_mode
-#ifndef CONF_USART_1_OVER
-#define CONF_USART_1_OVER 0
-#endif
-
-// <o> Inhibit Non Ack
-// <0=>The NACK is generated
-// <1=>The NACK is not generated
-// <i> Inhibit Non Acknowledge
-// <id> usart__inack
-#ifndef CONF_USART_1_INACK
-#define CONF_USART_1_INACK 1
-#endif
-
-// <o> Disable Successive NACK
-// <0=>NACK is sent on the ISO line as soon as a parity error occurs
-// <1=>Many parity errors generate a NACK on the ISO line
-// <i> Disable Successive NACK
-// <id> usart_dsnack
-#ifndef CONF_USART_1_DSNACK
-#define CONF_USART_1_DSNACK 0
-#endif
-
-// <o> Inverted Data
-// <0=>Data isn't inverted, nomal mode
-// <1=>Data is inverted
-// <i> Inverted Data
-// <id> usart_invdata
-#ifndef CONF_USART_1_INVDATA
-#define CONF_USART_1_INVDATA 0
-#endif
-
-// <o> Maximum Number of Automatic Iteration <0-7>
-// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
-// <id> usart_max_iteration
-#ifndef CONF_USART_1_MAX_ITERATION
-#define CONF_USART_1_MAX_ITERATION 0
-#endif
-
-// <q> Receive Line Filter enable
-// <i> whether the USART filters the receive line using a three-sample filter
-// <id> usart_receive_filter_enable
-#ifndef CONF_USART_1_FILTER
-#define CONF_USART_1_FILTER 0
-#endif
-
-// <q> Manchester Encoder/Decoder Enable
-// <i> whether the USART Manchester Encoder/Decoder
-// <id> usart_manchester_filter_enable
-#ifndef CONF_USART_1_MAN
-#define CONF_USART_1_MAN 0
-#endif
-
-// <o> Manchester Synchronization Mode
-// <0=>The Manchester start bit is a 0 to 1 transition
-// <1=>The Manchester start bit is a 1 to 0 transition
-// <i> Manchester Synchronization Mode
-// <id> usart_manchester_synchronization_mode
-#ifndef CONF_USART_1_MODSYNC
-#define CONF_USART_1_MODSYNC 0
-#endif
-
-// <o> Start Frame Delimiter Selector
-// <0=>Start frame delimiter is COMMAND or DATA SYNC
-// <1=>Start frame delimiter is one bit
-// <i> Start Frame Delimiter Selector
-// <id> usart_start_frame_delimiter
-#ifndef CONF_USART_1_ONEBIT
-#define CONF_USART_1_ONEBIT 0
-#endif
-
-// <o> Fractional Part <0-7>
-// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
-// <id> usart_arch_fractional
-#ifndef CONF_USART_1_FRACTIONAL
-#define CONF_USART_1_FRACTIONAL 0x0
-#endif
-
-// <o> Data Order
-// <0=>LSB is transmitted first
-// <1=>MSB is transmitted first
-// <i> Data order of the data bits in the frame
-// <id> usart_arch_msbf
-#ifndef CONF_USART_1_MSBF
-#define CONF_USART_1_MSBF 0
-#endif
-
-// </e>
-
-#define CONF_USART_1_MODE 0x0
-
-// Calculate BAUD register value in UART mode
-#if CONF_USART1_CK_SRC < 3
-#ifndef CONF_USART_1_BAUD_CD
-#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
-#endif
-#ifndef CONF_USART_1_BAUD_FP
-#define CONF_USART_1_BAUD_FP                                                                                           \
-	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
-#endif
-#elif CONF_USART1_CK_SRC == 3
-// No division is active. The value written in US_BRGR has no effect.
-#ifndef CONF_USART_1_BAUD_CD
-#define CONF_USART_1_BAUD_CD 1
-#endif
-#ifndef CONF_USART_1_BAUD_FP
-#define CONF_USART_1_BAUD_FP 1
-#endif
-#endif
-
-// <<< end of configuration section >>>
-
-#endif // HPL_USART_CONFIG_H
diff --git a/hw/bsp/same70_qmtech/hpl_xdmac_config.h b/hw/bsp/same70_qmtech/hpl_xdmac_config.h
deleted file mode 100644
index a3d62c6fc..000000000
--- a/hw/bsp/same70_qmtech/hpl_xdmac_config.h
+++ /dev/null
@@ -1,4400 +0,0 @@
-/* Auto-generated config file hpl_xdmac_config.h */
-#ifndef HPL_XDMAC_CONFIG_H
-#define HPL_XDMAC_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-// <e> XDMAC enable
-// <i> Indicates whether xdmac is enabled or not
-// <id> xdmac_enable
-#ifndef CONF_DMA_ENABLE
-#define CONF_DMA_ENABLE 0
-#endif
-
-// <e> Channel 0 settings
-// <id> dmac_channel_0_settings
-#ifndef CONF_DMAC_CHANNEL_0_SETTINGS
-#define CONF_DMAC_CHANNEL_0_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_0
-#ifndef CONF_DMAC_BURSTSIZE_0
-#define CONF_DMAC_BURSTSIZE_0 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_0
-#ifndef CONF_DMAC_CHUNKSIZE_0
-#define CONF_DMAC_CHUNKSIZE_0 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_0
-#ifndef CONF_DMAC_BEATSIZE_0
-#define CONF_DMAC_BEATSIZE_0 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_0
-#ifndef CONF_DMAC_SRC_INTERFACE_0
-#define CONF_DMAC_SRC_INTERFACE_0 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_0
-#ifndef CONF_DMAC_DES_INTERFACE_0
-#define CONF_DMAC_DES_INTERFACE_0 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_0
-#ifndef CONF_DMAC_SRCINC_0
-#define CONF_DMAC_SRCINC_0 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_0
-#ifndef CONF_DMAC_DSTINC_0
-#define CONF_DMAC_DSTINC_0 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_0
-#ifndef CONF_DMAC_TRANS_TYPE_0
-#define CONF_DMAC_TRANS_TYPE_0 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_0
-#ifndef CONF_DMAC_TRIGSRC_0
-#define CONF_DMAC_TRIGSRC_0 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_0 == 0
-#define CONF_DMAC_TYPE_0 0
-#define CONF_DMAC_DSYNC_0 0
-#elif CONF_DMAC_TRANS_TYPE_0 == 1
-#define CONF_DMAC_TYPE_0 1
-#define CONF_DMAC_DSYNC_0 0
-#elif CONF_DMAC_TRANS_TYPE_0 == 2
-#define CONF_DMAC_TYPE_0 1
-#define CONF_DMAC_DSYNC_0 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_0 == 0xFF
-#define CONF_DMAC_SWREQ_0 1
-#else
-#define CONF_DMAC_SWREQ_0 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_0_SETTINGS == 1 && CONF_DMAC_BEATSIZE_0 != 2 && ((!CONF_DMAC_SRCINC_0) || (!CONF_DMAC_DSTINC_0)))
-#if (!CONF_DMAC_SRCINC_0)
-#define CONF_DMAC_SRC_STRIDE_0 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_0)
-#define CONF_DMAC_DES_STRIDE_0 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_0
-#define CONF_DMAC_SRC_STRIDE_0 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_0
-#define CONF_DMAC_DES_STRIDE_0 0
-#endif
-
-// <e> Channel 1 settings
-// <id> dmac_channel_1_settings
-#ifndef CONF_DMAC_CHANNEL_1_SETTINGS
-#define CONF_DMAC_CHANNEL_1_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_1
-#ifndef CONF_DMAC_BURSTSIZE_1
-#define CONF_DMAC_BURSTSIZE_1 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_1
-#ifndef CONF_DMAC_CHUNKSIZE_1
-#define CONF_DMAC_CHUNKSIZE_1 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_1
-#ifndef CONF_DMAC_BEATSIZE_1
-#define CONF_DMAC_BEATSIZE_1 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_1
-#ifndef CONF_DMAC_SRC_INTERFACE_1
-#define CONF_DMAC_SRC_INTERFACE_1 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_1
-#ifndef CONF_DMAC_DES_INTERFACE_1
-#define CONF_DMAC_DES_INTERFACE_1 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_1
-#ifndef CONF_DMAC_SRCINC_1
-#define CONF_DMAC_SRCINC_1 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_1
-#ifndef CONF_DMAC_DSTINC_1
-#define CONF_DMAC_DSTINC_1 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_1
-#ifndef CONF_DMAC_TRANS_TYPE_1
-#define CONF_DMAC_TRANS_TYPE_1 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_1
-#ifndef CONF_DMAC_TRIGSRC_1
-#define CONF_DMAC_TRIGSRC_1 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_1 == 0
-#define CONF_DMAC_TYPE_1 0
-#define CONF_DMAC_DSYNC_1 0
-#elif CONF_DMAC_TRANS_TYPE_1 == 1
-#define CONF_DMAC_TYPE_1 1
-#define CONF_DMAC_DSYNC_1 0
-#elif CONF_DMAC_TRANS_TYPE_1 == 2
-#define CONF_DMAC_TYPE_1 1
-#define CONF_DMAC_DSYNC_1 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_1 == 0xFF
-#define CONF_DMAC_SWREQ_1 1
-#else
-#define CONF_DMAC_SWREQ_1 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_1_SETTINGS == 1 && CONF_DMAC_BEATSIZE_1 != 2 && ((!CONF_DMAC_SRCINC_1) || (!CONF_DMAC_DSTINC_1)))
-#if (!CONF_DMAC_SRCINC_1)
-#define CONF_DMAC_SRC_STRIDE_1 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_1)
-#define CONF_DMAC_DES_STRIDE_1 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_1
-#define CONF_DMAC_SRC_STRIDE_1 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_1
-#define CONF_DMAC_DES_STRIDE_1 0
-#endif
-
-// <e> Channel 2 settings
-// <id> dmac_channel_2_settings
-#ifndef CONF_DMAC_CHANNEL_2_SETTINGS
-#define CONF_DMAC_CHANNEL_2_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_2
-#ifndef CONF_DMAC_BURSTSIZE_2
-#define CONF_DMAC_BURSTSIZE_2 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_2
-#ifndef CONF_DMAC_CHUNKSIZE_2
-#define CONF_DMAC_CHUNKSIZE_2 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_2
-#ifndef CONF_DMAC_BEATSIZE_2
-#define CONF_DMAC_BEATSIZE_2 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_2
-#ifndef CONF_DMAC_SRC_INTERFACE_2
-#define CONF_DMAC_SRC_INTERFACE_2 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_2
-#ifndef CONF_DMAC_DES_INTERFACE_2
-#define CONF_DMAC_DES_INTERFACE_2 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_2
-#ifndef CONF_DMAC_SRCINC_2
-#define CONF_DMAC_SRCINC_2 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_2
-#ifndef CONF_DMAC_DSTINC_2
-#define CONF_DMAC_DSTINC_2 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_2
-#ifndef CONF_DMAC_TRANS_TYPE_2
-#define CONF_DMAC_TRANS_TYPE_2 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_2
-#ifndef CONF_DMAC_TRIGSRC_2
-#define CONF_DMAC_TRIGSRC_2 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_2 == 0
-#define CONF_DMAC_TYPE_2 0
-#define CONF_DMAC_DSYNC_2 0
-#elif CONF_DMAC_TRANS_TYPE_2 == 1
-#define CONF_DMAC_TYPE_2 1
-#define CONF_DMAC_DSYNC_2 0
-#elif CONF_DMAC_TRANS_TYPE_2 == 2
-#define CONF_DMAC_TYPE_2 1
-#define CONF_DMAC_DSYNC_2 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_2 == 0xFF
-#define CONF_DMAC_SWREQ_2 1
-#else
-#define CONF_DMAC_SWREQ_2 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_2_SETTINGS == 1 && CONF_DMAC_BEATSIZE_2 != 2 && ((!CONF_DMAC_SRCINC_2) || (!CONF_DMAC_DSTINC_2)))
-#if (!CONF_DMAC_SRCINC_2)
-#define CONF_DMAC_SRC_STRIDE_2 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_2)
-#define CONF_DMAC_DES_STRIDE_2 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_2
-#define CONF_DMAC_SRC_STRIDE_2 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_2
-#define CONF_DMAC_DES_STRIDE_2 0
-#endif
-
-// <e> Channel 3 settings
-// <id> dmac_channel_3_settings
-#ifndef CONF_DMAC_CHANNEL_3_SETTINGS
-#define CONF_DMAC_CHANNEL_3_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_3
-#ifndef CONF_DMAC_BURSTSIZE_3
-#define CONF_DMAC_BURSTSIZE_3 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_3
-#ifndef CONF_DMAC_CHUNKSIZE_3
-#define CONF_DMAC_CHUNKSIZE_3 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_3
-#ifndef CONF_DMAC_BEATSIZE_3
-#define CONF_DMAC_BEATSIZE_3 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_3
-#ifndef CONF_DMAC_SRC_INTERFACE_3
-#define CONF_DMAC_SRC_INTERFACE_3 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_3
-#ifndef CONF_DMAC_DES_INTERFACE_3
-#define CONF_DMAC_DES_INTERFACE_3 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_3
-#ifndef CONF_DMAC_SRCINC_3
-#define CONF_DMAC_SRCINC_3 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_3
-#ifndef CONF_DMAC_DSTINC_3
-#define CONF_DMAC_DSTINC_3 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_3
-#ifndef CONF_DMAC_TRANS_TYPE_3
-#define CONF_DMAC_TRANS_TYPE_3 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_3
-#ifndef CONF_DMAC_TRIGSRC_3
-#define CONF_DMAC_TRIGSRC_3 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_3 == 0
-#define CONF_DMAC_TYPE_3 0
-#define CONF_DMAC_DSYNC_3 0
-#elif CONF_DMAC_TRANS_TYPE_3 == 1
-#define CONF_DMAC_TYPE_3 1
-#define CONF_DMAC_DSYNC_3 0
-#elif CONF_DMAC_TRANS_TYPE_3 == 2
-#define CONF_DMAC_TYPE_3 1
-#define CONF_DMAC_DSYNC_3 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_3 == 0xFF
-#define CONF_DMAC_SWREQ_3 1
-#else
-#define CONF_DMAC_SWREQ_3 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_3_SETTINGS == 1 && CONF_DMAC_BEATSIZE_3 != 2 && ((!CONF_DMAC_SRCINC_3) || (!CONF_DMAC_DSTINC_3)))
-#if (!CONF_DMAC_SRCINC_3)
-#define CONF_DMAC_SRC_STRIDE_3 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_3)
-#define CONF_DMAC_DES_STRIDE_3 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_3
-#define CONF_DMAC_SRC_STRIDE_3 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_3
-#define CONF_DMAC_DES_STRIDE_3 0
-#endif
-
-// <e> Channel 4 settings
-// <id> dmac_channel_4_settings
-#ifndef CONF_DMAC_CHANNEL_4_SETTINGS
-#define CONF_DMAC_CHANNEL_4_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_4
-#ifndef CONF_DMAC_BURSTSIZE_4
-#define CONF_DMAC_BURSTSIZE_4 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_4
-#ifndef CONF_DMAC_CHUNKSIZE_4
-#define CONF_DMAC_CHUNKSIZE_4 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_4
-#ifndef CONF_DMAC_BEATSIZE_4
-#define CONF_DMAC_BEATSIZE_4 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_4
-#ifndef CONF_DMAC_SRC_INTERFACE_4
-#define CONF_DMAC_SRC_INTERFACE_4 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_4
-#ifndef CONF_DMAC_DES_INTERFACE_4
-#define CONF_DMAC_DES_INTERFACE_4 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_4
-#ifndef CONF_DMAC_SRCINC_4
-#define CONF_DMAC_SRCINC_4 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_4
-#ifndef CONF_DMAC_DSTINC_4
-#define CONF_DMAC_DSTINC_4 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_4
-#ifndef CONF_DMAC_TRANS_TYPE_4
-#define CONF_DMAC_TRANS_TYPE_4 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_4
-#ifndef CONF_DMAC_TRIGSRC_4
-#define CONF_DMAC_TRIGSRC_4 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_4 == 0
-#define CONF_DMAC_TYPE_4 0
-#define CONF_DMAC_DSYNC_4 0
-#elif CONF_DMAC_TRANS_TYPE_4 == 1
-#define CONF_DMAC_TYPE_4 1
-#define CONF_DMAC_DSYNC_4 0
-#elif CONF_DMAC_TRANS_TYPE_4 == 2
-#define CONF_DMAC_TYPE_4 1
-#define CONF_DMAC_DSYNC_4 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_4 == 0xFF
-#define CONF_DMAC_SWREQ_4 1
-#else
-#define CONF_DMAC_SWREQ_4 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_4_SETTINGS == 1 && CONF_DMAC_BEATSIZE_4 != 2 && ((!CONF_DMAC_SRCINC_4) || (!CONF_DMAC_DSTINC_4)))
-#if (!CONF_DMAC_SRCINC_4)
-#define CONF_DMAC_SRC_STRIDE_4 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_4)
-#define CONF_DMAC_DES_STRIDE_4 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_4
-#define CONF_DMAC_SRC_STRIDE_4 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_4
-#define CONF_DMAC_DES_STRIDE_4 0
-#endif
-
-// <e> Channel 5 settings
-// <id> dmac_channel_5_settings
-#ifndef CONF_DMAC_CHANNEL_5_SETTINGS
-#define CONF_DMAC_CHANNEL_5_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_5
-#ifndef CONF_DMAC_BURSTSIZE_5
-#define CONF_DMAC_BURSTSIZE_5 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_5
-#ifndef CONF_DMAC_CHUNKSIZE_5
-#define CONF_DMAC_CHUNKSIZE_5 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_5
-#ifndef CONF_DMAC_BEATSIZE_5
-#define CONF_DMAC_BEATSIZE_5 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_5
-#ifndef CONF_DMAC_SRC_INTERFACE_5
-#define CONF_DMAC_SRC_INTERFACE_5 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_5
-#ifndef CONF_DMAC_DES_INTERFACE_5
-#define CONF_DMAC_DES_INTERFACE_5 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_5
-#ifndef CONF_DMAC_SRCINC_5
-#define CONF_DMAC_SRCINC_5 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_5
-#ifndef CONF_DMAC_DSTINC_5
-#define CONF_DMAC_DSTINC_5 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_5
-#ifndef CONF_DMAC_TRANS_TYPE_5
-#define CONF_DMAC_TRANS_TYPE_5 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_5
-#ifndef CONF_DMAC_TRIGSRC_5
-#define CONF_DMAC_TRIGSRC_5 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_5 == 0
-#define CONF_DMAC_TYPE_5 0
-#define CONF_DMAC_DSYNC_5 0
-#elif CONF_DMAC_TRANS_TYPE_5 == 1
-#define CONF_DMAC_TYPE_5 1
-#define CONF_DMAC_DSYNC_5 0
-#elif CONF_DMAC_TRANS_TYPE_5 == 2
-#define CONF_DMAC_TYPE_5 1
-#define CONF_DMAC_DSYNC_5 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_5 == 0xFF
-#define CONF_DMAC_SWREQ_5 1
-#else
-#define CONF_DMAC_SWREQ_5 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_5_SETTINGS == 1 && CONF_DMAC_BEATSIZE_5 != 2 && ((!CONF_DMAC_SRCINC_5) || (!CONF_DMAC_DSTINC_5)))
-#if (!CONF_DMAC_SRCINC_5)
-#define CONF_DMAC_SRC_STRIDE_5 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_5)
-#define CONF_DMAC_DES_STRIDE_5 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_5
-#define CONF_DMAC_SRC_STRIDE_5 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_5
-#define CONF_DMAC_DES_STRIDE_5 0
-#endif
-
-// <e> Channel 6 settings
-// <id> dmac_channel_6_settings
-#ifndef CONF_DMAC_CHANNEL_6_SETTINGS
-#define CONF_DMAC_CHANNEL_6_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_6
-#ifndef CONF_DMAC_BURSTSIZE_6
-#define CONF_DMAC_BURSTSIZE_6 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_6
-#ifndef CONF_DMAC_CHUNKSIZE_6
-#define CONF_DMAC_CHUNKSIZE_6 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_6
-#ifndef CONF_DMAC_BEATSIZE_6
-#define CONF_DMAC_BEATSIZE_6 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_6
-#ifndef CONF_DMAC_SRC_INTERFACE_6
-#define CONF_DMAC_SRC_INTERFACE_6 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_6
-#ifndef CONF_DMAC_DES_INTERFACE_6
-#define CONF_DMAC_DES_INTERFACE_6 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_6
-#ifndef CONF_DMAC_SRCINC_6
-#define CONF_DMAC_SRCINC_6 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_6
-#ifndef CONF_DMAC_DSTINC_6
-#define CONF_DMAC_DSTINC_6 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_6
-#ifndef CONF_DMAC_TRANS_TYPE_6
-#define CONF_DMAC_TRANS_TYPE_6 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_6
-#ifndef CONF_DMAC_TRIGSRC_6
-#define CONF_DMAC_TRIGSRC_6 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_6 == 0
-#define CONF_DMAC_TYPE_6 0
-#define CONF_DMAC_DSYNC_6 0
-#elif CONF_DMAC_TRANS_TYPE_6 == 1
-#define CONF_DMAC_TYPE_6 1
-#define CONF_DMAC_DSYNC_6 0
-#elif CONF_DMAC_TRANS_TYPE_6 == 2
-#define CONF_DMAC_TYPE_6 1
-#define CONF_DMAC_DSYNC_6 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_6 == 0xFF
-#define CONF_DMAC_SWREQ_6 1
-#else
-#define CONF_DMAC_SWREQ_6 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_6_SETTINGS == 1 && CONF_DMAC_BEATSIZE_6 != 2 && ((!CONF_DMAC_SRCINC_6) || (!CONF_DMAC_DSTINC_6)))
-#if (!CONF_DMAC_SRCINC_6)
-#define CONF_DMAC_SRC_STRIDE_6 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_6)
-#define CONF_DMAC_DES_STRIDE_6 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_6
-#define CONF_DMAC_SRC_STRIDE_6 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_6
-#define CONF_DMAC_DES_STRIDE_6 0
-#endif
-
-// <e> Channel 7 settings
-// <id> dmac_channel_7_settings
-#ifndef CONF_DMAC_CHANNEL_7_SETTINGS
-#define CONF_DMAC_CHANNEL_7_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_7
-#ifndef CONF_DMAC_BURSTSIZE_7
-#define CONF_DMAC_BURSTSIZE_7 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_7
-#ifndef CONF_DMAC_CHUNKSIZE_7
-#define CONF_DMAC_CHUNKSIZE_7 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_7
-#ifndef CONF_DMAC_BEATSIZE_7
-#define CONF_DMAC_BEATSIZE_7 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_7
-#ifndef CONF_DMAC_SRC_INTERFACE_7
-#define CONF_DMAC_SRC_INTERFACE_7 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_7
-#ifndef CONF_DMAC_DES_INTERFACE_7
-#define CONF_DMAC_DES_INTERFACE_7 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_7
-#ifndef CONF_DMAC_SRCINC_7
-#define CONF_DMAC_SRCINC_7 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_7
-#ifndef CONF_DMAC_DSTINC_7
-#define CONF_DMAC_DSTINC_7 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_7
-#ifndef CONF_DMAC_TRANS_TYPE_7
-#define CONF_DMAC_TRANS_TYPE_7 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_7
-#ifndef CONF_DMAC_TRIGSRC_7
-#define CONF_DMAC_TRIGSRC_7 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_7 == 0
-#define CONF_DMAC_TYPE_7 0
-#define CONF_DMAC_DSYNC_7 0
-#elif CONF_DMAC_TRANS_TYPE_7 == 1
-#define CONF_DMAC_TYPE_7 1
-#define CONF_DMAC_DSYNC_7 0
-#elif CONF_DMAC_TRANS_TYPE_7 == 2
-#define CONF_DMAC_TYPE_7 1
-#define CONF_DMAC_DSYNC_7 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_7 == 0xFF
-#define CONF_DMAC_SWREQ_7 1
-#else
-#define CONF_DMAC_SWREQ_7 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_7_SETTINGS == 1 && CONF_DMAC_BEATSIZE_7 != 2 && ((!CONF_DMAC_SRCINC_7) || (!CONF_DMAC_DSTINC_7)))
-#if (!CONF_DMAC_SRCINC_7)
-#define CONF_DMAC_SRC_STRIDE_7 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_7)
-#define CONF_DMAC_DES_STRIDE_7 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_7
-#define CONF_DMAC_SRC_STRIDE_7 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_7
-#define CONF_DMAC_DES_STRIDE_7 0
-#endif
-
-// <e> Channel 8 settings
-// <id> dmac_channel_8_settings
-#ifndef CONF_DMAC_CHANNEL_8_SETTINGS
-#define CONF_DMAC_CHANNEL_8_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_8
-#ifndef CONF_DMAC_BURSTSIZE_8
-#define CONF_DMAC_BURSTSIZE_8 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_8
-#ifndef CONF_DMAC_CHUNKSIZE_8
-#define CONF_DMAC_CHUNKSIZE_8 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_8
-#ifndef CONF_DMAC_BEATSIZE_8
-#define CONF_DMAC_BEATSIZE_8 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_8
-#ifndef CONF_DMAC_SRC_INTERFACE_8
-#define CONF_DMAC_SRC_INTERFACE_8 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_8
-#ifndef CONF_DMAC_DES_INTERFACE_8
-#define CONF_DMAC_DES_INTERFACE_8 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_8
-#ifndef CONF_DMAC_SRCINC_8
-#define CONF_DMAC_SRCINC_8 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_8
-#ifndef CONF_DMAC_DSTINC_8
-#define CONF_DMAC_DSTINC_8 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_8
-#ifndef CONF_DMAC_TRANS_TYPE_8
-#define CONF_DMAC_TRANS_TYPE_8 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_8
-#ifndef CONF_DMAC_TRIGSRC_8
-#define CONF_DMAC_TRIGSRC_8 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_8 == 0
-#define CONF_DMAC_TYPE_8 0
-#define CONF_DMAC_DSYNC_8 0
-#elif CONF_DMAC_TRANS_TYPE_8 == 1
-#define CONF_DMAC_TYPE_8 1
-#define CONF_DMAC_DSYNC_8 0
-#elif CONF_DMAC_TRANS_TYPE_8 == 2
-#define CONF_DMAC_TYPE_8 1
-#define CONF_DMAC_DSYNC_8 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_8 == 0xFF
-#define CONF_DMAC_SWREQ_8 1
-#else
-#define CONF_DMAC_SWREQ_8 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_8_SETTINGS == 1 && CONF_DMAC_BEATSIZE_8 != 2 && ((!CONF_DMAC_SRCINC_8) || (!CONF_DMAC_DSTINC_8)))
-#if (!CONF_DMAC_SRCINC_8)
-#define CONF_DMAC_SRC_STRIDE_8 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_8)
-#define CONF_DMAC_DES_STRIDE_8 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_8
-#define CONF_DMAC_SRC_STRIDE_8 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_8
-#define CONF_DMAC_DES_STRIDE_8 0
-#endif
-
-// <e> Channel 9 settings
-// <id> dmac_channel_9_settings
-#ifndef CONF_DMAC_CHANNEL_9_SETTINGS
-#define CONF_DMAC_CHANNEL_9_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_9
-#ifndef CONF_DMAC_BURSTSIZE_9
-#define CONF_DMAC_BURSTSIZE_9 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_9
-#ifndef CONF_DMAC_CHUNKSIZE_9
-#define CONF_DMAC_CHUNKSIZE_9 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_9
-#ifndef CONF_DMAC_BEATSIZE_9
-#define CONF_DMAC_BEATSIZE_9 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_9
-#ifndef CONF_DMAC_SRC_INTERFACE_9
-#define CONF_DMAC_SRC_INTERFACE_9 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_9
-#ifndef CONF_DMAC_DES_INTERFACE_9
-#define CONF_DMAC_DES_INTERFACE_9 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_9
-#ifndef CONF_DMAC_SRCINC_9
-#define CONF_DMAC_SRCINC_9 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_9
-#ifndef CONF_DMAC_DSTINC_9
-#define CONF_DMAC_DSTINC_9 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_9
-#ifndef CONF_DMAC_TRANS_TYPE_9
-#define CONF_DMAC_TRANS_TYPE_9 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_9
-#ifndef CONF_DMAC_TRIGSRC_9
-#define CONF_DMAC_TRIGSRC_9 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_9 == 0
-#define CONF_DMAC_TYPE_9 0
-#define CONF_DMAC_DSYNC_9 0
-#elif CONF_DMAC_TRANS_TYPE_9 == 1
-#define CONF_DMAC_TYPE_9 1
-#define CONF_DMAC_DSYNC_9 0
-#elif CONF_DMAC_TRANS_TYPE_9 == 2
-#define CONF_DMAC_TYPE_9 1
-#define CONF_DMAC_DSYNC_9 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_9 == 0xFF
-#define CONF_DMAC_SWREQ_9 1
-#else
-#define CONF_DMAC_SWREQ_9 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_9_SETTINGS == 1 && CONF_DMAC_BEATSIZE_9 != 2 && ((!CONF_DMAC_SRCINC_9) || (!CONF_DMAC_DSTINC_9)))
-#if (!CONF_DMAC_SRCINC_9)
-#define CONF_DMAC_SRC_STRIDE_9 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_9)
-#define CONF_DMAC_DES_STRIDE_9 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_9
-#define CONF_DMAC_SRC_STRIDE_9 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_9
-#define CONF_DMAC_DES_STRIDE_9 0
-#endif
-
-// <e> Channel 10 settings
-// <id> dmac_channel_10_settings
-#ifndef CONF_DMAC_CHANNEL_10_SETTINGS
-#define CONF_DMAC_CHANNEL_10_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_10
-#ifndef CONF_DMAC_BURSTSIZE_10
-#define CONF_DMAC_BURSTSIZE_10 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_10
-#ifndef CONF_DMAC_CHUNKSIZE_10
-#define CONF_DMAC_CHUNKSIZE_10 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_10
-#ifndef CONF_DMAC_BEATSIZE_10
-#define CONF_DMAC_BEATSIZE_10 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_10
-#ifndef CONF_DMAC_SRC_INTERFACE_10
-#define CONF_DMAC_SRC_INTERFACE_10 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_10
-#ifndef CONF_DMAC_DES_INTERFACE_10
-#define CONF_DMAC_DES_INTERFACE_10 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_10
-#ifndef CONF_DMAC_SRCINC_10
-#define CONF_DMAC_SRCINC_10 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_10
-#ifndef CONF_DMAC_DSTINC_10
-#define CONF_DMAC_DSTINC_10 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_10
-#ifndef CONF_DMAC_TRANS_TYPE_10
-#define CONF_DMAC_TRANS_TYPE_10 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_10
-#ifndef CONF_DMAC_TRIGSRC_10
-#define CONF_DMAC_TRIGSRC_10 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_10 == 0
-#define CONF_DMAC_TYPE_10 0
-#define CONF_DMAC_DSYNC_10 0
-#elif CONF_DMAC_TRANS_TYPE_10 == 1
-#define CONF_DMAC_TYPE_10 1
-#define CONF_DMAC_DSYNC_10 0
-#elif CONF_DMAC_TRANS_TYPE_10 == 2
-#define CONF_DMAC_TYPE_10 1
-#define CONF_DMAC_DSYNC_10 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_10 == 0xFF
-#define CONF_DMAC_SWREQ_10 1
-#else
-#define CONF_DMAC_SWREQ_10 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_10_SETTINGS == 1 && CONF_DMAC_BEATSIZE_10 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_10) || (!CONF_DMAC_DSTINC_10)))
-#if (!CONF_DMAC_SRCINC_10)
-#define CONF_DMAC_SRC_STRIDE_10 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_10)
-#define CONF_DMAC_DES_STRIDE_10 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_10
-#define CONF_DMAC_SRC_STRIDE_10 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_10
-#define CONF_DMAC_DES_STRIDE_10 0
-#endif
-
-// <e> Channel 11 settings
-// <id> dmac_channel_11_settings
-#ifndef CONF_DMAC_CHANNEL_11_SETTINGS
-#define CONF_DMAC_CHANNEL_11_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_11
-#ifndef CONF_DMAC_BURSTSIZE_11
-#define CONF_DMAC_BURSTSIZE_11 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_11
-#ifndef CONF_DMAC_CHUNKSIZE_11
-#define CONF_DMAC_CHUNKSIZE_11 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_11
-#ifndef CONF_DMAC_BEATSIZE_11
-#define CONF_DMAC_BEATSIZE_11 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_11
-#ifndef CONF_DMAC_SRC_INTERFACE_11
-#define CONF_DMAC_SRC_INTERFACE_11 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_11
-#ifndef CONF_DMAC_DES_INTERFACE_11
-#define CONF_DMAC_DES_INTERFACE_11 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_11
-#ifndef CONF_DMAC_SRCINC_11
-#define CONF_DMAC_SRCINC_11 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_11
-#ifndef CONF_DMAC_DSTINC_11
-#define CONF_DMAC_DSTINC_11 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_11
-#ifndef CONF_DMAC_TRANS_TYPE_11
-#define CONF_DMAC_TRANS_TYPE_11 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_11
-#ifndef CONF_DMAC_TRIGSRC_11
-#define CONF_DMAC_TRIGSRC_11 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_11 == 0
-#define CONF_DMAC_TYPE_11 0
-#define CONF_DMAC_DSYNC_11 0
-#elif CONF_DMAC_TRANS_TYPE_11 == 1
-#define CONF_DMAC_TYPE_11 1
-#define CONF_DMAC_DSYNC_11 0
-#elif CONF_DMAC_TRANS_TYPE_11 == 2
-#define CONF_DMAC_TYPE_11 1
-#define CONF_DMAC_DSYNC_11 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_11 == 0xFF
-#define CONF_DMAC_SWREQ_11 1
-#else
-#define CONF_DMAC_SWREQ_11 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_11_SETTINGS == 1 && CONF_DMAC_BEATSIZE_11 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_11) || (!CONF_DMAC_DSTINC_11)))
-#if (!CONF_DMAC_SRCINC_11)
-#define CONF_DMAC_SRC_STRIDE_11 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_11)
-#define CONF_DMAC_DES_STRIDE_11 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_11
-#define CONF_DMAC_SRC_STRIDE_11 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_11
-#define CONF_DMAC_DES_STRIDE_11 0
-#endif
-
-// <e> Channel 12 settings
-// <id> dmac_channel_12_settings
-#ifndef CONF_DMAC_CHANNEL_12_SETTINGS
-#define CONF_DMAC_CHANNEL_12_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_12
-#ifndef CONF_DMAC_BURSTSIZE_12
-#define CONF_DMAC_BURSTSIZE_12 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_12
-#ifndef CONF_DMAC_CHUNKSIZE_12
-#define CONF_DMAC_CHUNKSIZE_12 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_12
-#ifndef CONF_DMAC_BEATSIZE_12
-#define CONF_DMAC_BEATSIZE_12 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_12
-#ifndef CONF_DMAC_SRC_INTERFACE_12
-#define CONF_DMAC_SRC_INTERFACE_12 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_12
-#ifndef CONF_DMAC_DES_INTERFACE_12
-#define CONF_DMAC_DES_INTERFACE_12 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_12
-#ifndef CONF_DMAC_SRCINC_12
-#define CONF_DMAC_SRCINC_12 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_12
-#ifndef CONF_DMAC_DSTINC_12
-#define CONF_DMAC_DSTINC_12 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_12
-#ifndef CONF_DMAC_TRANS_TYPE_12
-#define CONF_DMAC_TRANS_TYPE_12 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_12
-#ifndef CONF_DMAC_TRIGSRC_12
-#define CONF_DMAC_TRIGSRC_12 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_12 == 0
-#define CONF_DMAC_TYPE_12 0
-#define CONF_DMAC_DSYNC_12 0
-#elif CONF_DMAC_TRANS_TYPE_12 == 1
-#define CONF_DMAC_TYPE_12 1
-#define CONF_DMAC_DSYNC_12 0
-#elif CONF_DMAC_TRANS_TYPE_12 == 2
-#define CONF_DMAC_TYPE_12 1
-#define CONF_DMAC_DSYNC_12 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_12 == 0xFF
-#define CONF_DMAC_SWREQ_12 1
-#else
-#define CONF_DMAC_SWREQ_12 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_12_SETTINGS == 1 && CONF_DMAC_BEATSIZE_12 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_12) || (!CONF_DMAC_DSTINC_12)))
-#if (!CONF_DMAC_SRCINC_12)
-#define CONF_DMAC_SRC_STRIDE_12 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_12)
-#define CONF_DMAC_DES_STRIDE_12 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_12
-#define CONF_DMAC_SRC_STRIDE_12 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_12
-#define CONF_DMAC_DES_STRIDE_12 0
-#endif
-
-// <e> Channel 13 settings
-// <id> dmac_channel_13_settings
-#ifndef CONF_DMAC_CHANNEL_13_SETTINGS
-#define CONF_DMAC_CHANNEL_13_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_13
-#ifndef CONF_DMAC_BURSTSIZE_13
-#define CONF_DMAC_BURSTSIZE_13 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_13
-#ifndef CONF_DMAC_CHUNKSIZE_13
-#define CONF_DMAC_CHUNKSIZE_13 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_13
-#ifndef CONF_DMAC_BEATSIZE_13
-#define CONF_DMAC_BEATSIZE_13 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_13
-#ifndef CONF_DMAC_SRC_INTERFACE_13
-#define CONF_DMAC_SRC_INTERFACE_13 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_13
-#ifndef CONF_DMAC_DES_INTERFACE_13
-#define CONF_DMAC_DES_INTERFACE_13 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_13
-#ifndef CONF_DMAC_SRCINC_13
-#define CONF_DMAC_SRCINC_13 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_13
-#ifndef CONF_DMAC_DSTINC_13
-#define CONF_DMAC_DSTINC_13 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_13
-#ifndef CONF_DMAC_TRANS_TYPE_13
-#define CONF_DMAC_TRANS_TYPE_13 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_13
-#ifndef CONF_DMAC_TRIGSRC_13
-#define CONF_DMAC_TRIGSRC_13 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_13 == 0
-#define CONF_DMAC_TYPE_13 0
-#define CONF_DMAC_DSYNC_13 0
-#elif CONF_DMAC_TRANS_TYPE_13 == 1
-#define CONF_DMAC_TYPE_13 1
-#define CONF_DMAC_DSYNC_13 0
-#elif CONF_DMAC_TRANS_TYPE_13 == 2
-#define CONF_DMAC_TYPE_13 1
-#define CONF_DMAC_DSYNC_13 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_13 == 0xFF
-#define CONF_DMAC_SWREQ_13 1
-#else
-#define CONF_DMAC_SWREQ_13 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_13_SETTINGS == 1 && CONF_DMAC_BEATSIZE_13 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_13) || (!CONF_DMAC_DSTINC_13)))
-#if (!CONF_DMAC_SRCINC_13)
-#define CONF_DMAC_SRC_STRIDE_13 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_13)
-#define CONF_DMAC_DES_STRIDE_13 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_13
-#define CONF_DMAC_SRC_STRIDE_13 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_13
-#define CONF_DMAC_DES_STRIDE_13 0
-#endif
-
-// <e> Channel 14 settings
-// <id> dmac_channel_14_settings
-#ifndef CONF_DMAC_CHANNEL_14_SETTINGS
-#define CONF_DMAC_CHANNEL_14_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_14
-#ifndef CONF_DMAC_BURSTSIZE_14
-#define CONF_DMAC_BURSTSIZE_14 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_14
-#ifndef CONF_DMAC_CHUNKSIZE_14
-#define CONF_DMAC_CHUNKSIZE_14 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_14
-#ifndef CONF_DMAC_BEATSIZE_14
-#define CONF_DMAC_BEATSIZE_14 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_14
-#ifndef CONF_DMAC_SRC_INTERFACE_14
-#define CONF_DMAC_SRC_INTERFACE_14 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_14
-#ifndef CONF_DMAC_DES_INTERFACE_14
-#define CONF_DMAC_DES_INTERFACE_14 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_14
-#ifndef CONF_DMAC_SRCINC_14
-#define CONF_DMAC_SRCINC_14 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_14
-#ifndef CONF_DMAC_DSTINC_14
-#define CONF_DMAC_DSTINC_14 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_14
-#ifndef CONF_DMAC_TRANS_TYPE_14
-#define CONF_DMAC_TRANS_TYPE_14 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_14
-#ifndef CONF_DMAC_TRIGSRC_14
-#define CONF_DMAC_TRIGSRC_14 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_14 == 0
-#define CONF_DMAC_TYPE_14 0
-#define CONF_DMAC_DSYNC_14 0
-#elif CONF_DMAC_TRANS_TYPE_14 == 1
-#define CONF_DMAC_TYPE_14 1
-#define CONF_DMAC_DSYNC_14 0
-#elif CONF_DMAC_TRANS_TYPE_14 == 2
-#define CONF_DMAC_TYPE_14 1
-#define CONF_DMAC_DSYNC_14 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_14 == 0xFF
-#define CONF_DMAC_SWREQ_14 1
-#else
-#define CONF_DMAC_SWREQ_14 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_14_SETTINGS == 1 && CONF_DMAC_BEATSIZE_14 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_14) || (!CONF_DMAC_DSTINC_14)))
-#if (!CONF_DMAC_SRCINC_14)
-#define CONF_DMAC_SRC_STRIDE_14 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_14)
-#define CONF_DMAC_DES_STRIDE_14 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_14
-#define CONF_DMAC_SRC_STRIDE_14 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_14
-#define CONF_DMAC_DES_STRIDE_14 0
-#endif
-
-// <e> Channel 15 settings
-// <id> dmac_channel_15_settings
-#ifndef CONF_DMAC_CHANNEL_15_SETTINGS
-#define CONF_DMAC_CHANNEL_15_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_15
-#ifndef CONF_DMAC_BURSTSIZE_15
-#define CONF_DMAC_BURSTSIZE_15 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_15
-#ifndef CONF_DMAC_CHUNKSIZE_15
-#define CONF_DMAC_CHUNKSIZE_15 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_15
-#ifndef CONF_DMAC_BEATSIZE_15
-#define CONF_DMAC_BEATSIZE_15 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_15
-#ifndef CONF_DMAC_SRC_INTERFACE_15
-#define CONF_DMAC_SRC_INTERFACE_15 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_15
-#ifndef CONF_DMAC_DES_INTERFACE_15
-#define CONF_DMAC_DES_INTERFACE_15 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_15
-#ifndef CONF_DMAC_SRCINC_15
-#define CONF_DMAC_SRCINC_15 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_15
-#ifndef CONF_DMAC_DSTINC_15
-#define CONF_DMAC_DSTINC_15 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_15
-#ifndef CONF_DMAC_TRANS_TYPE_15
-#define CONF_DMAC_TRANS_TYPE_15 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_15
-#ifndef CONF_DMAC_TRIGSRC_15
-#define CONF_DMAC_TRIGSRC_15 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_15 == 0
-#define CONF_DMAC_TYPE_15 0
-#define CONF_DMAC_DSYNC_15 0
-#elif CONF_DMAC_TRANS_TYPE_15 == 1
-#define CONF_DMAC_TYPE_15 1
-#define CONF_DMAC_DSYNC_15 0
-#elif CONF_DMAC_TRANS_TYPE_15 == 2
-#define CONF_DMAC_TYPE_15 1
-#define CONF_DMAC_DSYNC_15 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_15 == 0xFF
-#define CONF_DMAC_SWREQ_15 1
-#else
-#define CONF_DMAC_SWREQ_15 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_15_SETTINGS == 1 && CONF_DMAC_BEATSIZE_15 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_15) || (!CONF_DMAC_DSTINC_15)))
-#if (!CONF_DMAC_SRCINC_15)
-#define CONF_DMAC_SRC_STRIDE_15 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_15)
-#define CONF_DMAC_DES_STRIDE_15 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_15
-#define CONF_DMAC_SRC_STRIDE_15 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_15
-#define CONF_DMAC_DES_STRIDE_15 0
-#endif
-
-// <e> Channel 16 settings
-// <id> dmac_channel_16_settings
-#ifndef CONF_DMAC_CHANNEL_16_SETTINGS
-#define CONF_DMAC_CHANNEL_16_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_16
-#ifndef CONF_DMAC_BURSTSIZE_16
-#define CONF_DMAC_BURSTSIZE_16 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_16
-#ifndef CONF_DMAC_CHUNKSIZE_16
-#define CONF_DMAC_CHUNKSIZE_16 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_16
-#ifndef CONF_DMAC_BEATSIZE_16
-#define CONF_DMAC_BEATSIZE_16 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_16
-#ifndef CONF_DMAC_SRC_INTERFACE_16
-#define CONF_DMAC_SRC_INTERFACE_16 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_16
-#ifndef CONF_DMAC_DES_INTERFACE_16
-#define CONF_DMAC_DES_INTERFACE_16 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_16
-#ifndef CONF_DMAC_SRCINC_16
-#define CONF_DMAC_SRCINC_16 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_16
-#ifndef CONF_DMAC_DSTINC_16
-#define CONF_DMAC_DSTINC_16 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_16
-#ifndef CONF_DMAC_TRANS_TYPE_16
-#define CONF_DMAC_TRANS_TYPE_16 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_16
-#ifndef CONF_DMAC_TRIGSRC_16
-#define CONF_DMAC_TRIGSRC_16 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_16 == 0
-#define CONF_DMAC_TYPE_16 0
-#define CONF_DMAC_DSYNC_16 0
-#elif CONF_DMAC_TRANS_TYPE_16 == 1
-#define CONF_DMAC_TYPE_16 1
-#define CONF_DMAC_DSYNC_16 0
-#elif CONF_DMAC_TRANS_TYPE_16 == 2
-#define CONF_DMAC_TYPE_16 1
-#define CONF_DMAC_DSYNC_16 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_16 == 0xFF
-#define CONF_DMAC_SWREQ_16 1
-#else
-#define CONF_DMAC_SWREQ_16 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_16_SETTINGS == 1 && CONF_DMAC_BEATSIZE_16 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_16) || (!CONF_DMAC_DSTINC_16)))
-#if (!CONF_DMAC_SRCINC_16)
-#define CONF_DMAC_SRC_STRIDE_16 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_16)
-#define CONF_DMAC_DES_STRIDE_16 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_16
-#define CONF_DMAC_SRC_STRIDE_16 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_16
-#define CONF_DMAC_DES_STRIDE_16 0
-#endif
-
-// <e> Channel 17 settings
-// <id> dmac_channel_17_settings
-#ifndef CONF_DMAC_CHANNEL_17_SETTINGS
-#define CONF_DMAC_CHANNEL_17_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_17
-#ifndef CONF_DMAC_BURSTSIZE_17
-#define CONF_DMAC_BURSTSIZE_17 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_17
-#ifndef CONF_DMAC_CHUNKSIZE_17
-#define CONF_DMAC_CHUNKSIZE_17 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_17
-#ifndef CONF_DMAC_BEATSIZE_17
-#define CONF_DMAC_BEATSIZE_17 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_17
-#ifndef CONF_DMAC_SRC_INTERFACE_17
-#define CONF_DMAC_SRC_INTERFACE_17 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_17
-#ifndef CONF_DMAC_DES_INTERFACE_17
-#define CONF_DMAC_DES_INTERFACE_17 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_17
-#ifndef CONF_DMAC_SRCINC_17
-#define CONF_DMAC_SRCINC_17 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_17
-#ifndef CONF_DMAC_DSTINC_17
-#define CONF_DMAC_DSTINC_17 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_17
-#ifndef CONF_DMAC_TRANS_TYPE_17
-#define CONF_DMAC_TRANS_TYPE_17 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_17
-#ifndef CONF_DMAC_TRIGSRC_17
-#define CONF_DMAC_TRIGSRC_17 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_17 == 0
-#define CONF_DMAC_TYPE_17 0
-#define CONF_DMAC_DSYNC_17 0
-#elif CONF_DMAC_TRANS_TYPE_17 == 1
-#define CONF_DMAC_TYPE_17 1
-#define CONF_DMAC_DSYNC_17 0
-#elif CONF_DMAC_TRANS_TYPE_17 == 2
-#define CONF_DMAC_TYPE_17 1
-#define CONF_DMAC_DSYNC_17 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_17 == 0xFF
-#define CONF_DMAC_SWREQ_17 1
-#else
-#define CONF_DMAC_SWREQ_17 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_17_SETTINGS == 1 && CONF_DMAC_BEATSIZE_17 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_17) || (!CONF_DMAC_DSTINC_17)))
-#if (!CONF_DMAC_SRCINC_17)
-#define CONF_DMAC_SRC_STRIDE_17 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_17)
-#define CONF_DMAC_DES_STRIDE_17 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_17
-#define CONF_DMAC_SRC_STRIDE_17 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_17
-#define CONF_DMAC_DES_STRIDE_17 0
-#endif
-
-// <e> Channel 18 settings
-// <id> dmac_channel_18_settings
-#ifndef CONF_DMAC_CHANNEL_18_SETTINGS
-#define CONF_DMAC_CHANNEL_18_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_18
-#ifndef CONF_DMAC_BURSTSIZE_18
-#define CONF_DMAC_BURSTSIZE_18 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_18
-#ifndef CONF_DMAC_CHUNKSIZE_18
-#define CONF_DMAC_CHUNKSIZE_18 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_18
-#ifndef CONF_DMAC_BEATSIZE_18
-#define CONF_DMAC_BEATSIZE_18 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_18
-#ifndef CONF_DMAC_SRC_INTERFACE_18
-#define CONF_DMAC_SRC_INTERFACE_18 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_18
-#ifndef CONF_DMAC_DES_INTERFACE_18
-#define CONF_DMAC_DES_INTERFACE_18 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_18
-#ifndef CONF_DMAC_SRCINC_18
-#define CONF_DMAC_SRCINC_18 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_18
-#ifndef CONF_DMAC_DSTINC_18
-#define CONF_DMAC_DSTINC_18 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_18
-#ifndef CONF_DMAC_TRANS_TYPE_18
-#define CONF_DMAC_TRANS_TYPE_18 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_18
-#ifndef CONF_DMAC_TRIGSRC_18
-#define CONF_DMAC_TRIGSRC_18 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_18 == 0
-#define CONF_DMAC_TYPE_18 0
-#define CONF_DMAC_DSYNC_18 0
-#elif CONF_DMAC_TRANS_TYPE_18 == 1
-#define CONF_DMAC_TYPE_18 1
-#define CONF_DMAC_DSYNC_18 0
-#elif CONF_DMAC_TRANS_TYPE_18 == 2
-#define CONF_DMAC_TYPE_18 1
-#define CONF_DMAC_DSYNC_18 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_18 == 0xFF
-#define CONF_DMAC_SWREQ_18 1
-#else
-#define CONF_DMAC_SWREQ_18 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_18_SETTINGS == 1 && CONF_DMAC_BEATSIZE_18 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_18) || (!CONF_DMAC_DSTINC_18)))
-#if (!CONF_DMAC_SRCINC_18)
-#define CONF_DMAC_SRC_STRIDE_18 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_18)
-#define CONF_DMAC_DES_STRIDE_18 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_18
-#define CONF_DMAC_SRC_STRIDE_18 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_18
-#define CONF_DMAC_DES_STRIDE_18 0
-#endif
-
-// <e> Channel 19 settings
-// <id> dmac_channel_19_settings
-#ifndef CONF_DMAC_CHANNEL_19_SETTINGS
-#define CONF_DMAC_CHANNEL_19_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_19
-#ifndef CONF_DMAC_BURSTSIZE_19
-#define CONF_DMAC_BURSTSIZE_19 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_19
-#ifndef CONF_DMAC_CHUNKSIZE_19
-#define CONF_DMAC_CHUNKSIZE_19 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_19
-#ifndef CONF_DMAC_BEATSIZE_19
-#define CONF_DMAC_BEATSIZE_19 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_19
-#ifndef CONF_DMAC_SRC_INTERFACE_19
-#define CONF_DMAC_SRC_INTERFACE_19 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_19
-#ifndef CONF_DMAC_DES_INTERFACE_19
-#define CONF_DMAC_DES_INTERFACE_19 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_19
-#ifndef CONF_DMAC_SRCINC_19
-#define CONF_DMAC_SRCINC_19 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_19
-#ifndef CONF_DMAC_DSTINC_19
-#define CONF_DMAC_DSTINC_19 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_19
-#ifndef CONF_DMAC_TRANS_TYPE_19
-#define CONF_DMAC_TRANS_TYPE_19 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_19
-#ifndef CONF_DMAC_TRIGSRC_19
-#define CONF_DMAC_TRIGSRC_19 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_19 == 0
-#define CONF_DMAC_TYPE_19 0
-#define CONF_DMAC_DSYNC_19 0
-#elif CONF_DMAC_TRANS_TYPE_19 == 1
-#define CONF_DMAC_TYPE_19 1
-#define CONF_DMAC_DSYNC_19 0
-#elif CONF_DMAC_TRANS_TYPE_19 == 2
-#define CONF_DMAC_TYPE_19 1
-#define CONF_DMAC_DSYNC_19 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_19 == 0xFF
-#define CONF_DMAC_SWREQ_19 1
-#else
-#define CONF_DMAC_SWREQ_19 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_19_SETTINGS == 1 && CONF_DMAC_BEATSIZE_19 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_19) || (!CONF_DMAC_DSTINC_19)))
-#if (!CONF_DMAC_SRCINC_19)
-#define CONF_DMAC_SRC_STRIDE_19 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_19)
-#define CONF_DMAC_DES_STRIDE_19 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_19
-#define CONF_DMAC_SRC_STRIDE_19 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_19
-#define CONF_DMAC_DES_STRIDE_19 0
-#endif
-
-// <e> Channel 20 settings
-// <id> dmac_channel_20_settings
-#ifndef CONF_DMAC_CHANNEL_20_SETTINGS
-#define CONF_DMAC_CHANNEL_20_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_20
-#ifndef CONF_DMAC_BURSTSIZE_20
-#define CONF_DMAC_BURSTSIZE_20 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_20
-#ifndef CONF_DMAC_CHUNKSIZE_20
-#define CONF_DMAC_CHUNKSIZE_20 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_20
-#ifndef CONF_DMAC_BEATSIZE_20
-#define CONF_DMAC_BEATSIZE_20 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_20
-#ifndef CONF_DMAC_SRC_INTERFACE_20
-#define CONF_DMAC_SRC_INTERFACE_20 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_20
-#ifndef CONF_DMAC_DES_INTERFACE_20
-#define CONF_DMAC_DES_INTERFACE_20 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_20
-#ifndef CONF_DMAC_SRCINC_20
-#define CONF_DMAC_SRCINC_20 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_20
-#ifndef CONF_DMAC_DSTINC_20
-#define CONF_DMAC_DSTINC_20 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_20
-#ifndef CONF_DMAC_TRANS_TYPE_20
-#define CONF_DMAC_TRANS_TYPE_20 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_20
-#ifndef CONF_DMAC_TRIGSRC_20
-#define CONF_DMAC_TRIGSRC_20 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_20 == 0
-#define CONF_DMAC_TYPE_20 0
-#define CONF_DMAC_DSYNC_20 0
-#elif CONF_DMAC_TRANS_TYPE_20 == 1
-#define CONF_DMAC_TYPE_20 1
-#define CONF_DMAC_DSYNC_20 0
-#elif CONF_DMAC_TRANS_TYPE_20 == 2
-#define CONF_DMAC_TYPE_20 1
-#define CONF_DMAC_DSYNC_20 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_20 == 0xFF
-#define CONF_DMAC_SWREQ_20 1
-#else
-#define CONF_DMAC_SWREQ_20 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_20_SETTINGS == 1 && CONF_DMAC_BEATSIZE_20 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_20) || (!CONF_DMAC_DSTINC_20)))
-#if (!CONF_DMAC_SRCINC_20)
-#define CONF_DMAC_SRC_STRIDE_20 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_20)
-#define CONF_DMAC_DES_STRIDE_20 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_20
-#define CONF_DMAC_SRC_STRIDE_20 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_20
-#define CONF_DMAC_DES_STRIDE_20 0
-#endif
-
-// <e> Channel 21 settings
-// <id> dmac_channel_21_settings
-#ifndef CONF_DMAC_CHANNEL_21_SETTINGS
-#define CONF_DMAC_CHANNEL_21_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_21
-#ifndef CONF_DMAC_BURSTSIZE_21
-#define CONF_DMAC_BURSTSIZE_21 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_21
-#ifndef CONF_DMAC_CHUNKSIZE_21
-#define CONF_DMAC_CHUNKSIZE_21 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_21
-#ifndef CONF_DMAC_BEATSIZE_21
-#define CONF_DMAC_BEATSIZE_21 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_21
-#ifndef CONF_DMAC_SRC_INTERFACE_21
-#define CONF_DMAC_SRC_INTERFACE_21 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_21
-#ifndef CONF_DMAC_DES_INTERFACE_21
-#define CONF_DMAC_DES_INTERFACE_21 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_21
-#ifndef CONF_DMAC_SRCINC_21
-#define CONF_DMAC_SRCINC_21 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_21
-#ifndef CONF_DMAC_DSTINC_21
-#define CONF_DMAC_DSTINC_21 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_21
-#ifndef CONF_DMAC_TRANS_TYPE_21
-#define CONF_DMAC_TRANS_TYPE_21 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_21
-#ifndef CONF_DMAC_TRIGSRC_21
-#define CONF_DMAC_TRIGSRC_21 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_21 == 0
-#define CONF_DMAC_TYPE_21 0
-#define CONF_DMAC_DSYNC_21 0
-#elif CONF_DMAC_TRANS_TYPE_21 == 1
-#define CONF_DMAC_TYPE_21 1
-#define CONF_DMAC_DSYNC_21 0
-#elif CONF_DMAC_TRANS_TYPE_21 == 2
-#define CONF_DMAC_TYPE_21 1
-#define CONF_DMAC_DSYNC_21 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_21 == 0xFF
-#define CONF_DMAC_SWREQ_21 1
-#else
-#define CONF_DMAC_SWREQ_21 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_21_SETTINGS == 1 && CONF_DMAC_BEATSIZE_21 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_21) || (!CONF_DMAC_DSTINC_21)))
-#if (!CONF_DMAC_SRCINC_21)
-#define CONF_DMAC_SRC_STRIDE_21 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_21)
-#define CONF_DMAC_DES_STRIDE_21 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_21
-#define CONF_DMAC_SRC_STRIDE_21 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_21
-#define CONF_DMAC_DES_STRIDE_21 0
-#endif
-
-// <e> Channel 22 settings
-// <id> dmac_channel_22_settings
-#ifndef CONF_DMAC_CHANNEL_22_SETTINGS
-#define CONF_DMAC_CHANNEL_22_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_22
-#ifndef CONF_DMAC_BURSTSIZE_22
-#define CONF_DMAC_BURSTSIZE_22 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_22
-#ifndef CONF_DMAC_CHUNKSIZE_22
-#define CONF_DMAC_CHUNKSIZE_22 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_22
-#ifndef CONF_DMAC_BEATSIZE_22
-#define CONF_DMAC_BEATSIZE_22 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_22
-#ifndef CONF_DMAC_SRC_INTERFACE_22
-#define CONF_DMAC_SRC_INTERFACE_22 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_22
-#ifndef CONF_DMAC_DES_INTERFACE_22
-#define CONF_DMAC_DES_INTERFACE_22 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_22
-#ifndef CONF_DMAC_SRCINC_22
-#define CONF_DMAC_SRCINC_22 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_22
-#ifndef CONF_DMAC_DSTINC_22
-#define CONF_DMAC_DSTINC_22 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_22
-#ifndef CONF_DMAC_TRANS_TYPE_22
-#define CONF_DMAC_TRANS_TYPE_22 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_22
-#ifndef CONF_DMAC_TRIGSRC_22
-#define CONF_DMAC_TRIGSRC_22 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_22 == 0
-#define CONF_DMAC_TYPE_22 0
-#define CONF_DMAC_DSYNC_22 0
-#elif CONF_DMAC_TRANS_TYPE_22 == 1
-#define CONF_DMAC_TYPE_22 1
-#define CONF_DMAC_DSYNC_22 0
-#elif CONF_DMAC_TRANS_TYPE_22 == 2
-#define CONF_DMAC_TYPE_22 1
-#define CONF_DMAC_DSYNC_22 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_22 == 0xFF
-#define CONF_DMAC_SWREQ_22 1
-#else
-#define CONF_DMAC_SWREQ_22 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_22_SETTINGS == 1 && CONF_DMAC_BEATSIZE_22 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_22) || (!CONF_DMAC_DSTINC_22)))
-#if (!CONF_DMAC_SRCINC_22)
-#define CONF_DMAC_SRC_STRIDE_22 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_22)
-#define CONF_DMAC_DES_STRIDE_22 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_22
-#define CONF_DMAC_SRC_STRIDE_22 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_22
-#define CONF_DMAC_DES_STRIDE_22 0
-#endif
-
-// <e> Channel 23 settings
-// <id> dmac_channel_23_settings
-#ifndef CONF_DMAC_CHANNEL_23_SETTINGS
-#define CONF_DMAC_CHANNEL_23_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_23
-#ifndef CONF_DMAC_BURSTSIZE_23
-#define CONF_DMAC_BURSTSIZE_23 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_23
-#ifndef CONF_DMAC_CHUNKSIZE_23
-#define CONF_DMAC_CHUNKSIZE_23 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_23
-#ifndef CONF_DMAC_BEATSIZE_23
-#define CONF_DMAC_BEATSIZE_23 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_23
-#ifndef CONF_DMAC_SRC_INTERFACE_23
-#define CONF_DMAC_SRC_INTERFACE_23 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_23
-#ifndef CONF_DMAC_DES_INTERFACE_23
-#define CONF_DMAC_DES_INTERFACE_23 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_23
-#ifndef CONF_DMAC_SRCINC_23
-#define CONF_DMAC_SRCINC_23 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_23
-#ifndef CONF_DMAC_DSTINC_23
-#define CONF_DMAC_DSTINC_23 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_23
-#ifndef CONF_DMAC_TRANS_TYPE_23
-#define CONF_DMAC_TRANS_TYPE_23 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_23
-#ifndef CONF_DMAC_TRIGSRC_23
-#define CONF_DMAC_TRIGSRC_23 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_23 == 0
-#define CONF_DMAC_TYPE_23 0
-#define CONF_DMAC_DSYNC_23 0
-#elif CONF_DMAC_TRANS_TYPE_23 == 1
-#define CONF_DMAC_TYPE_23 1
-#define CONF_DMAC_DSYNC_23 0
-#elif CONF_DMAC_TRANS_TYPE_23 == 2
-#define CONF_DMAC_TYPE_23 1
-#define CONF_DMAC_DSYNC_23 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_23 == 0xFF
-#define CONF_DMAC_SWREQ_23 1
-#else
-#define CONF_DMAC_SWREQ_23 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_23_SETTINGS == 1 && CONF_DMAC_BEATSIZE_23 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_23) || (!CONF_DMAC_DSTINC_23)))
-#if (!CONF_DMAC_SRCINC_23)
-#define CONF_DMAC_SRC_STRIDE_23 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_23)
-#define CONF_DMAC_DES_STRIDE_23 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_23
-#define CONF_DMAC_SRC_STRIDE_23 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_23
-#define CONF_DMAC_DES_STRIDE_23 0
-#endif
-
-// </e>
-
-// <<< end of configuration section >>>
-
-#endif // HPL_XDMAC_CONFIG_H
diff --git a/hw/bsp/same70_qmtech/peripheral_clk_config.h b/hw/bsp/same70_qmtech/peripheral_clk_config.h
deleted file mode 100644
index 84756f5ac..000000000
--- a/hw/bsp/same70_qmtech/peripheral_clk_config.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/* Auto-generated config file peripheral_clk_config.h */
-#ifndef PERIPHERAL_CLK_CONFIG_H
-#define PERIPHERAL_CLK_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-/**
- * \def CONF_HCLK_FREQUENCY
- * \brief HCLK's Clock frequency
- */
-#ifndef CONF_HCLK_FREQUENCY
-#define CONF_HCLK_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_FCLK_FREQUENCY
- * \brief FCLK's Clock frequency
- */
-#ifndef CONF_FCLK_FREQUENCY
-#define CONF_FCLK_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_CPU_FREQUENCY
- * \brief CPU's Clock frequency
- */
-#ifndef CONF_CPU_FREQUENCY
-#define CONF_CPU_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_SLCK_FREQUENCY
- * \brief Slow Clock frequency
- */
-#define CONF_SLCK_FREQUENCY 0
-
-/**
- * \def CONF_MCK_FREQUENCY
- * \brief Master Clock frequency
- */
-#define CONF_MCK_FREQUENCY 150000000
-
-/**
- * \def CONF_PCK6_FREQUENCY
- * \brief Programmable Clock Controller 6 frequency
- */
-#define CONF_PCK6_FREQUENCY 1714285
-
-// <h> USART Clock Settings
-// <o> USART Clock source
-
-// <0=> Master Clock (MCK)
-// <1=> MCK / 8 for USART
-// <2=> Programmable Clock Controller 4 (PMC_PCK4)
-// <3=> External Clock
-// <i> This defines the clock source for the USART
-// <id> usart_clock_source
-#ifndef CONF_USART1_CK_SRC
-#define CONF_USART1_CK_SRC 0
-#endif
-
-// <o> USART External Clock Input on SCK <1-4294967295>
-// <i> Inputs the external clock frequency on SCK
-// <id> usart_clock_freq
-#ifndef CONF_USART1_SCK_FREQ
-#define CONF_USART1_SCK_FREQ 10000000
-#endif
-
-// </h>
-
-/**
- * \def USART FREQUENCY
- * \brief USART's Clock frequency
- */
-#ifndef CONF_USART1_FREQUENCY
-#define CONF_USART1_FREQUENCY 150000000
-#endif
-
-#ifndef CONF_SRC_USB_480M
-#define CONF_SRC_USB_480M 0
-#endif
-
-#ifndef CONF_SRC_USB_48M
-#define CONF_SRC_USB_48M 1
-#endif
-
-// <y> USB Full/Low Speed Clock
-// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
-// <id> usb_fsls_clock_source
-// <i> 48MHz clock source for low speed and full speed.
-// <i> It must be available when low speed is supported by host driver.
-// <i> It must be available when low power mode is selected.
-#ifndef CONF_USBHS_FSLS_SRC
-#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
-#endif
-
-// <y> USB Clock Source(Normal/Low-power Mode Selection)
-// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
-// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
-// <id> usb_clock_source
-// <i> Select the clock source for USB.
-// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
-// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
-#ifndef CONF_USBHS_SRC
-#define CONF_USBHS_SRC CONF_SRC_USB_480M
-#endif
-
-/**
- * \def CONF_USBHS_FSLS_FREQUENCY
- * \brief USBHS's Full/Low Speed Clock Source frequency
- */
-#ifndef CONF_USBHS_FSLS_FREQUENCY
-#define CONF_USBHS_FSLS_FREQUENCY 48000000
-#endif
-
-/**
- * \def CONF_USBHS_FREQUENCY
- * \brief USBHS's Selected Clock Source frequency
- */
-#ifndef CONF_USBHS_FREQUENCY
-#define CONF_USBHS_FREQUENCY 480000000
-#endif
-
-// <<< end of configuration section >>>
-
-#endif // PERIPHERAL_CLK_CONFIG_H
diff --git a/hw/bsp/same70_qmtech/same70_qmtech.c b/hw/bsp/same70_qmtech/same70_qmtech.c
deleted file mode 100644
index e5f0da198..000000000
--- a/hw/bsp/same70_qmtech/same70_qmtech.c
+++ /dev/null
@@ -1,159 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, hathach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- */
-
-#include "sam.h"
-#include "bsp/board_api.h"
-
-#include "peripheral_clk_config.h"
-#include "hpl/usart/hpl_usart_base.h"
-#include "hpl/pmc/hpl_pmc.h"
-#include "hal/include/hal_init.h"
-#include "hal/include/hal_usart_async.h"
-#include "hal/include/hal_gpio.h"
-
-
-// You can get the board here:
-// https://www.aliexpress.com/item/1005003173783268.html
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-
-#define LED_PIN               GPIO(GPIO_PORTA, 15)
-
-#define BUTTON_PIN            GPIO(GPIO_PORTA, 21)
-#define BUTTON_STATE_ACTIVE   0
-
-#define UART_TX_PIN           GPIO(GPIO_PORTB, 1)
-#define UART_RX_PIN           GPIO(GPIO_PORTB, 0)
-
-static struct usart_async_descriptor edbg_com;
-static uint8_t edbg_com_buffer[64];
-static volatile bool uart_busy = false;
-
-static void tx_cb_EDBG_COM(const struct usart_async_descriptor *const io_descr)
-{
-  (void) io_descr;
-  uart_busy = false;
-}
-
-//------------- IMPLEMENTATION -------------//
-void board_init(void)
-{
-  init_mcu();
-
-  /* Disable Watchdog */
-  hri_wdt_set_MR_WDDIS_bit(WDT);
-
-  // LED
-  _pmc_enable_periph_clock(ID_PIOB);
-  gpio_set_pin_level(LED_PIN, false);
-  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
-
-  // Button
-  _pmc_enable_periph_clock(ID_PIOA);
-  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
-  gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
-
-  // Uart via EDBG Com
-  _pmc_enable_periph_clock(ID_USART1);
-  gpio_set_pin_function(UART_RX_PIN, MUX_PA21A_USART1_RXD1);
-  gpio_set_pin_function(UART_TX_PIN, MUX_PB4D_USART1_TXD1);
-
-  usart_async_init(&edbg_com, USART1, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
-  usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
-  usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_cb_EDBG_COM);
-  usart_async_enable(&edbg_com);
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer (samd SystemCoreClock may not correct)
-  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
-#endif
-
-  // Enable USB clock
-  _pmc_enable_periph_clock(ID_USBHS);
-
-}
-
-//--------------------------------------------------------------------+
-// USB Interrupt Handler
-//--------------------------------------------------------------------+
-void USBHS_Handler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  gpio_set_pin_level(LED_PIN, state);
-}
-
-uint32_t board_button_read(void)
-{
-  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  // while until previous transfer is complete
-  while(uart_busy) {}
-  uart_busy = true;
-
-  io_write(&edbg_com.io, buf, len);
-  return len;
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-// Required by __libc_init_array in startup code if we are compiling using
-// -nostdlib/-nostartfiles.
-void _init(void)
-{
-
-}
diff --git a/hw/bsp/same70_xplained/board.mk b/hw/bsp/same70_xplained/board.mk
deleted file mode 100644
index 2d97ecdc1..000000000
--- a/hw/bsp/same70_xplained/board.mk
+++ /dev/null
@@ -1,67 +0,0 @@
-ASF_DIR = hw/mcu/microchip/same70
-
-CFLAGS += \
-  -mthumb \
-  -mabi=aapcs \
-  -mcpu=cortex-m7 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -D__SAME70Q21B__ \
-  -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
-
-# suppress following warnings from mcu driver
-CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
-
-SPEED ?= high
-
-ifeq ($(SPEED), high)
-  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-else
-  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
-endif
-
-# SAM driver is flooded with -Wcast-qual which slow down complication significantly
-CFLAGS_SKIP += -Wcast-qual
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = $(ASF_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
-
-SRC_C += \
-	src/portable/microchip/samx7x/dcd_samx7x.c \
-	$(ASF_DIR)/same70b/gcc/gcc/startup_same70q21b.c \
-	$(ASF_DIR)/same70b/gcc/system_same70q21b.c \
-	$(ASF_DIR)/hpl/core/hpl_init.c \
-	$(ASF_DIR)/hpl/usart/hpl_usart.c \
-	$(ASF_DIR)/hpl/pmc/hpl_pmc.c \
-	$(ASF_DIR)/hal/src/hal_usart_async.c \
-	$(ASF_DIR)/hal/src/hal_io.c \
-	$(ASF_DIR)/hal/src/hal_atomic.c \
-	$(ASF_DIR)/hal/utils/src/utils_ringbuffer.c
-
-INC += \
-  $(TOP)/hw/bsp/$(BOARD) \
-	$(TOP)/$(ASF_DIR) \
-	$(TOP)/$(ASF_DIR)/config \
-	$(TOP)/$(ASF_DIR)/same70b/include \
-	$(TOP)/$(ASF_DIR)/hal/include \
-	$(TOP)/$(ASF_DIR)/hal/utils/include \
-	$(TOP)/$(ASF_DIR)/hpl/core \
-	$(TOP)/$(ASF_DIR)/hpl/pio \
-	$(TOP)/$(ASF_DIR)/hpl/pmc \
-	$(TOP)/$(ASF_DIR)/hri \
-	$(TOP)/$(ASF_DIR)/CMSIS/Core/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
-
-# For flash-jlink target
-JLINK_DEVICE = SAME70Q21B
-
-# flash using edbg from https://github.com/ataradov/edbg
-# Note: SAME70's GPNVM1 must be set to 1 to boot from flash with
-# 	edbg -t same70 -F w0,1,1
-flash: $(BUILD)/$(PROJECT).bin
-	edbg --verbose -t same70 -pv -f $<
diff --git a/hw/bsp/same70_xplained/hpl_pmc_config.h b/hw/bsp/same70_xplained/hpl_pmc_config.h
deleted file mode 100644
index 387aaa5df..000000000
--- a/hw/bsp/same70_xplained/hpl_pmc_config.h
+++ /dev/null
@@ -1,1053 +0,0 @@
-/* Auto-generated config file hpl_pmc_config.h */
-#ifndef HPL_PMC_CONFIG_H
-#define HPL_PMC_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-#include <peripheral_clk_config.h>
-
-#define CLK_SRC_OPTION_OSC32K 0
-#define CLK_SRC_OPTION_XOSC32K 1
-#define CLK_SRC_OPTION_OSC12M 2
-#define CLK_SRC_OPTION_XOSC20M 3
-
-#define CLK_SRC_OPTION_SLCK 0
-#define CLK_SRC_OPTION_MAINCK 1
-#define CLK_SRC_OPTION_PLLACK 2
-#define CLK_SRC_OPTION_UPLLCKDIV 3
-#define CLK_SRC_OPTION_MCK 4
-
-#define CLK_SRC_OPTION_UPLLCK 3
-
-#define CONF_RC_4M 0
-#define CONF_RC_8M 1
-#define CONF_RC_12M 2
-
-#define CONF_XOSC32K_NO_BYPASS 0
-#define CONF_XOSC32K_BYPASS 1
-
-#define CONF_XOSC20M_NO_BYPASS 0
-#define CONF_XOSC20M_BYPASS 1
-
-// <e> Clock_SLCK configuration
-// <i> Indicates whether SLCK configuration is enabled or not
-// <id> enable_clk_gen_slck
-#ifndef CONF_CLK_SLCK_CONFIG
-#define CONF_CLK_SLCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SLCK source
-
-// <CLK_SRC_OPTION_OSC32K"> 32kHz High Accuracy Internal Oscillator (OSC32K)
-
-// <CLK_SRC_OPTION_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
-
-// <i> This defines the clock source for SLCK
-// <id> clk_gen_slck_oscillator
-#ifndef CONF_CLK_GEN_SLCK_SRC
-#define CONF_CLK_GEN_SLCK_SRC CLK_SRC_OPTION_OSC32K
-#endif
-
-// <q> Enable Clock_SLCK
-// <i> Indicates whether SLCK is enabled or disable
-// <id> clk_gen_slck_arch_enable
-#ifndef CONF_CLK_SLCK_ENABLE
-#define CONF_CLK_SLCK_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_MAINCK configuration
-// <i> Indicates whether MAINCK configuration is enabled or not
-// <id> enable_clk_gen_mainck
-#ifndef CONF_CLK_MAINCK_CONFIG
-#define CONF_CLK_MAINCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MAINCK source
-
-// <CLK_SRC_OPTION_OSC12M"> Embedded 4/8/12MHz RC Oscillator (OSC12M)
-
-// <CLK_SRC_OPTION_XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
-
-// <i> This defines the clock source for MAINCK
-// <id> clk_gen_mainck_oscillator
-#ifndef CONF_CLK_GEN_MAINCK_SRC
-#define CONF_CLK_GEN_MAINCK_SRC CLK_SRC_OPTION_XOSC20M
-#endif
-
-// <q> Enable Clock_MAINCK
-// <i> Indicates whether MAINCK is enabled or disable
-// <id> clk_gen_mainck_arch_enable
-#ifndef CONF_CLK_MAINCK_ENABLE
-#define CONF_CLK_MAINCK_ENABLE 1
-#endif
-
-// <q> Enable Main Clock Failure Detection
-// <i> Indicates whether Main Clock Failure Detection is enabled or disable.
-// <i> The 4/8/12 MHz RC oscillator must be selected as the source of MAINCK.
-// <id> clk_gen_cfden_enable
-#ifndef CONF_CLK_CFDEN_ENABLE
-#define CONF_CLK_CFDEN_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_MCKR configuration
-// <i> Indicates whether MCKR configuration is enabled or not
-// <id> enable_clk_gen_mckr
-#ifndef CONF_CLK_MCKR_CONFIG
-#define CONF_CLK_MCKR_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MCKR source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <i> This defines the clock source for MCKR
-// <id> clk_gen_mckr_oscillator
-#ifndef CONF_CLK_GEN_MCKR_SRC
-#define CONF_CLK_GEN_MCKR_SRC CLK_SRC_OPTION_PLLACK
-#endif
-
-// <q> Enable Clock_MCKR
-// <i> Indicates whether MCKR is enabled or disable
-// <id> clk_gen_mckr_arch_enable
-#ifndef CONF_CLK_MCKR_ENABLE
-#define CONF_CLK_MCKR_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Master Clock Prescaler
-// <0=> 1
-// <1=> 2
-// <2=> 4
-// <3=> 8
-// <4=> 16
-// <5=> 32
-// <6=> 64
-// <7=> 3
-// <i> Select the clock prescaler.
-// <id> mckr_presc
-#ifndef CONF_MCKR_PRESC
-#define CONF_MCKR_PRESC 0
-#endif
-
-// </h>
-// </e>// <e> Clock_MCK configuration
-// <i> Indicates whether MCK configuration is enabled or not
-// <id> enable_clk_gen_mck
-#ifndef CONF_CLK_MCK_CONFIG
-#define CONF_CLK_MCK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator MCK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for MCK
-// <id> clk_gen_mck_oscillator
-#ifndef CONF_CLK_GEN_MCK_SRC
-#define CONF_CLK_GEN_MCK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-//<o> Master Clock Controller Divider MCK divider
-// <0=> 1
-// <1=> 2
-// <3=> 3
-// <2=> 4
-// <i> Select the master clock divider.
-// <id> mck_div
-#ifndef CONF_MCK_DIV
-#define CONF_MCK_DIV 1
-#endif
-
-// </h>
-// </e>// <e> Clock_SYSTICK configuration
-// <i> Indicates whether SYSTICK configuration is enabled or not
-// <id> enable_clk_gen_systick
-#ifndef CONF_CLK_SYSTICK_CONFIG
-#define CONF_CLK_SYSTICK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SYSTICK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for SYSTICK
-// <id> clk_gen_systick_oscillator
-#ifndef CONF_CLK_GEN_SYSTICK_SRC
-#define CONF_CLK_GEN_SYSTICK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Systick clock divider
-// <8=> 8
-// <i> Select systick clock divider
-// <id> systick_clock_div
-#ifndef CONF_SYSTICK_DIV
-#define CONF_SYSTICK_DIV 8
-#endif
-
-// </h>
-// </e>// <e> Clock_FCLK configuration
-// <i> Indicates whether FCLK configuration is enabled or not
-// <id> enable_clk_gen_fclk
-#ifndef CONF_CLK_FCLK_CONFIG
-#define CONF_CLK_FCLK_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator FCLK source
-
-// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
-
-// <i> This defines the clock source for FCLK
-// <id> clk_gen_fclk_oscillator
-#ifndef CONF_CLK_GEN_FCLK_SRC
-#define CONF_CLK_GEN_FCLK_SRC CLK_SRC_OPTION_MCKR
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_GCLK0 configuration
-// <i> Indicates whether GCLK0 configuration is enabled or not
-// <id> enable_clk_gen_gclk0
-#ifndef CONF_CLK_GCLK0_CONFIG
-#define CONF_CLK_GCLK0_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator GCLK0 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for GCLK0
-// <id> clk_gen_gclk0_oscillator
-#ifndef CONF_CLK_GEN_GCLK0_SRC
-#define CONF_CLK_GEN_GCLK0_SRC CLK_SRC_OPTION_MCK
-#endif
-
-// <q> Enable Clock_GCLK0
-// <i> Indicates whether GCLK0 is enabled or disable
-// <id> clk_gen_gclk0_arch_enable
-#ifndef CONF_CLK_GCLK0_ENABLE
-#define CONF_CLK_GCLK0_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-// <q> Enable GCLK0 GCLKEN
-// <i> Indicates whether GCLK0 GCLKEN is enabled or disable
-// <id> gclk0_gclken_enable
-#ifndef CONF_GCLK0_GCLKEN_ENABLE
-#define CONF_GCLK0_GCLKEN_ENABLE 0
-#endif
-
-// <o> Generic Clock GCLK0 divider <1-256>
-// <i> Select the clock divider (divider = GCLKDIV + 1).
-// <id> gclk0_div
-#ifndef CONF_GCLK0_DIV
-#define CONF_GCLK0_DIV 2
-#endif
-
-// </h>
-// </e>// <e> Clock_GCLK1 configuration
-// <i> Indicates whether GCLK1 configuration is enabled or not
-// <id> enable_clk_gen_gclk1
-#ifndef CONF_CLK_GCLK1_CONFIG
-#define CONF_CLK_GCLK1_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator GCLK1 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for GCLK1
-// <id> clk_gen_gclk1_oscillator
-#ifndef CONF_CLK_GEN_GCLK1_SRC
-#define CONF_CLK_GEN_GCLK1_SRC CLK_SRC_OPTION_PLLACK
-#endif
-
-// <q> Enable Clock_GCLK1
-// <i> Indicates whether GCLK1 is enabled or disable
-// <id> clk_gen_gclk1_arch_enable
-#ifndef CONF_CLK_GCLK1_ENABLE
-#define CONF_CLK_GCLK1_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-// <q> Enable GCLK1 GCLKEN
-// <i> Indicates whether GCLK1 GCLKEN is enabled or disable
-// <id> gclk1_gclken_enable
-#ifndef CONF_GCLK1_GCLKEN_ENABLE
-#define CONF_GCLK1_GCLKEN_ENABLE 0
-#endif
-
-// <o> Generic Clock GCLK1 divider <1-256>
-// <i> Select the clock divider (divider = GCLKDIV + 1).
-// <id> gclk1_div
-#ifndef CONF_GCLK1_DIV
-#define CONF_GCLK1_DIV 3
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK0 configuration
-// <i> Indicates whether PCK0 configuration is enabled or not
-// <id> enable_clk_gen_pck0
-#ifndef CONF_CLK_PCK0_CONFIG
-#define CONF_CLK_PCK0_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK0 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK0
-// <id> clk_gen_pck0_oscillator
-#ifndef CONF_CLK_GEN_PCK0_SRC
-#define CONF_CLK_GEN_PCK0_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK0
-// <i> Indicates whether PCK0 is enabled or disable
-// <id> clk_gen_pck0_arch_enable
-#ifndef CONF_CLK_PCK0_ENABLE
-#define CONF_CLK_PCK0_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck0_presc
-#ifndef CONF_PCK0_PRESC
-#define CONF_PCK0_PRESC 1
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK1 configuration
-// <i> Indicates whether PCK1 configuration is enabled or not
-// <id> enable_clk_gen_pck1
-#ifndef CONF_CLK_PCK1_CONFIG
-#define CONF_CLK_PCK1_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK1 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK1
-// <id> clk_gen_pck1_oscillator
-#ifndef CONF_CLK_GEN_PCK1_SRC
-#define CONF_CLK_GEN_PCK1_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK1
-// <i> Indicates whether PCK1 is enabled or disable
-// <id> clk_gen_pck1_arch_enable
-#ifndef CONF_CLK_PCK1_ENABLE
-#define CONF_CLK_PCK1_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck1_presc
-#ifndef CONF_PCK1_PRESC
-#define CONF_PCK1_PRESC 2
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK2 configuration
-// <i> Indicates whether PCK2 configuration is enabled or not
-// <id> enable_clk_gen_pck2
-#ifndef CONF_CLK_PCK2_CONFIG
-#define CONF_CLK_PCK2_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK2 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK2
-// <id> clk_gen_pck2_oscillator
-#ifndef CONF_CLK_GEN_PCK2_SRC
-#define CONF_CLK_GEN_PCK2_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK2
-// <i> Indicates whether PCK2 is enabled or disable
-// <id> clk_gen_pck2_arch_enable
-#ifndef CONF_CLK_PCK2_ENABLE
-#define CONF_CLK_PCK2_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck2_presc
-#ifndef CONF_PCK2_PRESC
-#define CONF_PCK2_PRESC 3
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK3 configuration
-// <i> Indicates whether PCK3 configuration is enabled or not
-// <id> enable_clk_gen_pck3
-#ifndef CONF_CLK_PCK3_CONFIG
-#define CONF_CLK_PCK3_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK3 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK3
-// <id> clk_gen_pck3_oscillator
-#ifndef CONF_CLK_GEN_PCK3_SRC
-#define CONF_CLK_GEN_PCK3_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK3
-// <i> Indicates whether PCK3 is enabled or disable
-// <id> clk_gen_pck3_arch_enable
-#ifndef CONF_CLK_PCK3_ENABLE
-#define CONF_CLK_PCK3_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck3_presc
-#ifndef CONF_PCK3_PRESC
-#define CONF_PCK3_PRESC 4
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK4 configuration
-// <i> Indicates whether PCK4 configuration is enabled or not
-// <id> enable_clk_gen_pck4
-#ifndef CONF_CLK_PCK4_CONFIG
-#define CONF_CLK_PCK4_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK4 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK4
-// <id> clk_gen_pck4_oscillator
-#ifndef CONF_CLK_GEN_PCK4_SRC
-#define CONF_CLK_GEN_PCK4_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK4
-// <i> Indicates whether PCK4 is enabled or disable
-// <id> clk_gen_pck4_arch_enable
-#ifndef CONF_CLK_PCK4_ENABLE
-#define CONF_CLK_PCK4_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck4_presc
-#ifndef CONF_PCK4_PRESC
-#define CONF_PCK4_PRESC 5
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK5 configuration
-// <i> Indicates whether PCK5 configuration is enabled or not
-// <id> enable_clk_gen_pck5
-#ifndef CONF_CLK_PCK5_CONFIG
-#define CONF_CLK_PCK5_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK5 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK5
-// <id> clk_gen_pck5_oscillator
-#ifndef CONF_CLK_GEN_PCK5_SRC
-#define CONF_CLK_GEN_PCK5_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK5
-// <i> Indicates whether PCK5 is enabled or disable
-// <id> clk_gen_pck5_arch_enable
-#ifndef CONF_CLK_PCK5_ENABLE
-#define CONF_CLK_PCK5_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck5_presc
-#ifndef CONF_PCK5_PRESC
-#define CONF_PCK5_PRESC 6
-#endif
-
-// </h>
-// </e>// <e> Clock_PCK6 configuration
-// <i> Indicates whether PCK6 configuration is enabled or not
-// <id> enable_clk_gen_pck6
-#ifndef CONF_CLK_PCK6_CONFIG
-#define CONF_CLK_PCK6_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator PCK6 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
-
-// <i> This defines the clock source for PCK6
-// <id> clk_gen_pck6_oscillator
-#ifndef CONF_CLK_GEN_PCK6_SRC
-#define CONF_CLK_GEN_PCK6_SRC CLK_SRC_OPTION_MAINCK
-#endif
-
-// <q> Enable Clock_PCK6
-// <i> Indicates whether PCK6 is enabled or disable
-// <id> clk_gen_pck6_arch_enable
-#ifndef CONF_CLK_PCK6_ENABLE
-#define CONF_CLK_PCK6_ENABLE 0
-#endif
-
-// </h>
-
-// <h>
-
-// <o> Programmable Clock Controller Prescaler <1-256>
-// <i> Select the clock prescaler (prescaler = PRESC + 1).
-// <id> pck6_presc
-#ifndef CONF_PCK6_PRESC
-#define CONF_PCK6_PRESC 7
-#endif
-
-// </h>
-// </e>// <e> Clock_USB_480M configuration
-// <i> Indicates whether USB_480M configuration is enabled or not
-// <id> enable_clk_gen_usb_480m
-#ifndef CONF_CLK_USB_480M_CONFIG
-#define CONF_CLK_USB_480M_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator USB_480M source
-
-// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
-
-// <i> This defines the clock source for USB_480M
-// <id> clk_gen_usb_480m_oscillator
-#ifndef CONF_CLK_GEN_USB_480M_SRC
-#define CONF_CLK_GEN_USB_480M_SRC CLK_SRC_OPTION_UPLLCK
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>// <e> Clock_USB_48M configuration
-// <i> Indicates whether USB_48M configuration is enabled or not
-// <id> enable_clk_gen_usb_48m
-#ifndef CONF_CLK_USB_48M_CONFIG
-#define CONF_CLK_USB_48M_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator USB_48M source
-
-// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
-
-// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
-
-// <i> This defines the clock source for USB_48M
-// <id> clk_gen_usb_48m_oscillator
-#ifndef CONF_CLK_GEN_USB_48M_SRC
-#define CONF_CLK_GEN_USB_48M_SRC CLK_SRC_OPTION_UPLLCKDIV
-#endif
-
-// <q> Enable Clock_USB_48M
-// <i> Indicates whether USB_48M is enabled or disable
-// <id> clk_gen_usb_48m_arch_enable
-#ifndef CONF_CLK_USB_48M_ENABLE
-#define CONF_CLK_USB_48M_ENABLE 1
-#endif
-
-// </h>
-
-// <h>
-
-// <o> USB Clock Controller Divider <1-16>
-// <i> Select the USB clock divider (divider = USBDIV + 1).
-// <id> usb_48m_div
-#ifndef CONF_USB_48M_DIV
-#define CONF_USB_48M_DIV 5
-#endif
-
-// </h>
-// </e>// <e> Clock_SLCK2 configuration
-// <i> Indicates whether SLCK2 configuration is enabled or not
-// <id> enable_clk_gen_slck2
-#ifndef CONF_CLK_SLCK2_CONFIG
-#define CONF_CLK_SLCK2_CONFIG 1
-#endif
-
-//<h> Clock Generator
-// <y> clock generator SLCK2 source
-
-// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
-
-// <i> This defines the clock source for SLCK2
-// <id> clk_gen_slck2_oscillator
-#ifndef CONF_CLK_GEN_SLCK2_SRC
-#define CONF_CLK_GEN_SLCK2_SRC CLK_SRC_OPTION_SLCK
-#endif
-
-// </h>
-
-// <h>
-
-// </h>
-// </e>
-
-// <e> System Configuration
-// <i> Indicates whether configuration for system is enabled or not
-// <id> enable_hclk_clock
-#ifndef CONF_SYSTEM_CONFIG
-#define CONF_SYSTEM_CONFIG 1
-#endif
-
-// <h> Processor Clock Settings
-// <y> Processor Clock source
-// <MCKR"> Master Clock Controller (PMC_MCKR)
-// <i> This defines the clock source for the HCLK (Processor clock)
-// <id> hclk_clock_source
-#ifndef CONF_HCLK_SRC
-#define CONF_HCLK_SRC MCKR
-#endif
-
-// <o> Flash Wait State
-// <0=> 1 cycle
-// <1=> 2 cycles
-// <2=> 3 cycles
-// <3=> 4 cycles
-// <4=> 5 cycles
-// <5=> 6 cycles
-// <6=> 7 cycles
-// <i> This field defines the number of wait states for read and write operations.
-// <id> efc_fws
-#ifndef CONF_EFC_WAIT_STATE
-#define CONF_EFC_WAIT_STATE 5
-#endif
-
-// </h>
-// </e>
-
-// <e> SysTick Clock
-// <id> enable_systick_clk_clock
-#ifndef CONF_SYSTICK_CLK_CONFIG
-#define CONF_SYSTICK_CLK_CONFIG 1
-#endif
-
-// <y> SysTick Clock source
-// <MCKR"> Master Clock Controller (PMC_MCKR)
-// <i> This defines the clock source for the SysTick Clock
-// <id> systick_clk_clock_source
-#ifndef CONF_SYSTICK_CLK_SRC
-#define CONF_SYSTICK_CLK_SRC MCKR
-#endif
-
-// <o> SysTick Clock Divider
-// <8=> 8
-// <i> Fixed to 8 if Systick is not using Processor clock
-// <id> systick_clk_clock_div
-#ifndef CONF_SYSTICK_CLK_DIV
-#define CONF_SYSTICK_CLK_DIV 8
-#endif
-
-// </e>
-
-// <e> OSC32K Oscillator Configuration
-// <i> Indicates whether configuration for OSC32K is enabled or not
-// <id> enable_osc32k
-#ifndef CONF_OSC32K_CONFIG
-#define CONF_OSC32K_CONFIG 1
-#endif
-
-// <h> OSC32K Oscillator Control
-// <q> OSC32K Oscillator Enable
-// <i> Indicates whether OSC32K Oscillator is enabled or not
-// <id> osc32k_arch_enable
-#ifndef CONF_OSC32K_ENABLE
-#define CONF_OSC32K_ENABLE 0
-#endif
-// </h>
-// </e>
-
-// <e> XOSC32K Oscillator Configuration
-// <i> Indicates whether configuration for XOSC32K is enabled or not
-// <id> enable_xosc32k
-#ifndef CONF_XOSC32K_CONFIG
-#define CONF_XOSC32K_CONFIG 0
-#endif
-
-// <h> XOSC32K Oscillator Control
-// <y> Oscillator Bypass Select
-// <CONF_XOSC32K_NO_BYPASS"> The 32kHz crystal oscillator is not bypassed.
-// <CONF_XOSC32K_BYPASS"> The 32kHz crystal oscillator is bypassed.
-// <i> Indicates whether XOSC32K is bypassed.
-// <id> xosc32k_bypass
-#ifndef CONF_XOSC32K
-#define CONF_XOSC32K CONF_XOSC32K_NO_BYPASS
-#endif
-
-// <q> XOSC32K Oscillator Enable
-// <i> Indicates whether XOSC32K Oscillator is enabled or not
-// <id> xosc32k_arch_enable
-#ifndef CONF_XOSC32K_ENABLE
-#define CONF_XOSC32K_ENABLE 0
-#endif
-// </h>
-// </e>
-
-// <e> OSC12M Oscillator Configuration
-// <i> Indicates whether configuration for OSC12M is enabled or not
-// <id> enable_osc12m
-#ifndef CONF_OSC12M_CONFIG
-#define CONF_OSC12M_CONFIG 0
-#endif
-
-// <h> OSC12M Oscillator Control
-// <q> OSC12M Oscillator Enable
-// <i> Indicates whether OSC12M Oscillator is enabled or not.
-// <id> osc12m_arch_enable
-#ifndef CONF_OSC12M_ENABLE
-#define CONF_OSC12M_ENABLE 0
-#endif
-
-// <o> OSC12M selector
-//  <0=> 4000000
-//  <1=> 8000000
-//  <2=> 12000000
-// <i> Select the frequency of embedded fast RC oscillator.
-// <id> osc12m_selector
-#ifndef CONF_OSC12M_SELECTOR
-#define CONF_OSC12M_SELECTOR 2
-#endif
-// </h>
-// </e>
-
-// <e> XOSC20M Oscillator Configuration
-// <i> Indicates whether configuration for XOSC20M is enabled or not.
-// <id> enable_xosc20m
-#ifndef CONF_XOSC20M_CONFIG
-#define CONF_XOSC20M_CONFIG 1
-#endif
-
-// <h> XOSC20M Oscillator Control
-// <o> XOSC20M selector <3000000-20000000>
-// <i> Select the frequency of crystal or ceramic resonator oscillator.
-// <id> xosc20m_selector
-#ifndef CONF_XOSC20M_SELECTOR
-#define CONF_XOSC20M_SELECTOR 12000000
-#endif
-
-// <o> Start up time for the external oscillator (ms): <0-256>
-// <i> Select start-up time.
-// <id> xosc20m_startup_time
-#ifndef CONF_XOSC20M_STARTUP_TIME
-#define CONF_XOSC20M_STARTUP_TIME 62
-#endif
-
-// <y> Oscillator Bypass Select
-// <CONF_XOSC20M_NO_BYPASS"> The external crystal oscillator is not bypassed.
-// <CONF_XOSC20M_BYPASS"> The external crystal oscillator is bypassed.
-// <i> Indicates whether XOSC20M is bypassed.
-// <id> xosc20m_bypass
-#ifndef CONF_XOSC20M
-#define CONF_XOSC20M CONF_XOSC20M_NO_BYPASS
-#endif
-
-// <q> XOSC20M Oscillator Enable
-// <i> Indicates whether XOSC20M Oscillator is enabled or not
-// <id> xosc20m_arch_enable
-#ifndef CONF_XOSC20M_ENABLE
-#define CONF_XOSC20M_ENABLE 1
-#endif
-// </h>
-// </e>
-
-// <e> PLLACK Oscillator Configuration
-// <i> Indicates whether configuration for PLLACK is enabled or not
-// <id> enable_pllack
-#ifndef CONF_PLLACK_CONFIG
-#define CONF_PLLACK_CONFIG 1
-#endif
-
-// <y> PLLACK Reference Clock Source
-// <MAINCK"> Main Clock (MAINCK)
-// <i> Select the clock source.
-// <id> pllack_ref_clock
-#ifndef CONF_PLLACK_CLK
-#define CONF_PLLACK_CLK MAINCK
-#endif
-
-// <h> PLLACK Oscillator Control
-// <q> PLLACK Oscillator Enable
-// <i> Indicates whether PLLACK Oscillator is enabled or not
-// <id> pllack_arch_enable
-#ifndef CONF_PLLACK_ENABLE
-#define CONF_PLLACK_ENABLE 1
-#endif
-
-// <o> PLLA Frontend Divider (DIVA)  <1-255>
-// <i> Select the clock divider
-// <id> pllack_div
-#ifndef CONF_PLLACK_DIV
-#define CONF_PLLACK_DIV 1
-#endif
-
-// <o> PLLACK Muliplier <1-62>
-// <i> Indicates PLLA multiplier (multiplier = MULA + 1).
-// <id> pllack_mul
-#ifndef CONF_PLLACK_MUL
-#define CONF_PLLACK_MUL 25
-#endif
-// </h>
-// </e>
-
-// <e> UPLLCK Oscillator Configuration
-// <i> Indicates whether configuration for UPLLCK is enabled or not
-// <id> enable_upllck
-#ifndef CONF_UPLLCK_CONFIG
-#define CONF_UPLLCK_CONFIG 1
-#endif
-
-// <y> UPLLCK Reference Clock Source
-// <XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
-// <i> Select the clock source,only when the input frequency is 12M or 16M, the upllck output is 480M.
-// <id> upllck_ref_clock
-#ifndef CONF_UPLLCK_CLK
-#define CONF_UPLLCK_CLK XOSC20M
-#endif
-
-// <h> UPLLCK Oscillator Control
-// <q> UPLLCK Oscillator Enable
-// <i> Indicates whether UPLLCK Oscillator is enabled or not
-// <id> upllck_arch_enable
-#ifndef CONF_UPLLCK_ENABLE
-#define CONF_UPLLCK_ENABLE 1
-#endif
-// </h>
-// </e>
-
-// <e> UPLLCKDIV Oscillator Configuration
-// <i> Indicates whether configuration for UPLLCKDIV is enabled or not
-// <id> enable_upllckdiv
-#ifndef CONF_UPLLCKDIV_CONFIG
-#define CONF_UPLLCKDIV_CONFIG 1
-#endif
-
-// <y> UPLLCKDIV Reference Clock Source
-// <UPLLCK"> USB 480M Clock (UPLLCK)
-// <i> Select the clock source.
-// <id> upllckdiv_ref_clock
-#ifndef CONF_UPLLCKDIV_CLK
-#define CONF_UPLLCKDIV_CLK UPLLCK
-#endif
-
-// <h> UPLLCKDIV Oscillator Control
-// <o> UPLLCKDIV Clock Divider
-// <0=> 1
-// <1=> 2
-// <i> Select the clock divider.
-// <id> upllckdiv_div
-#ifndef CONF_UPLLCKDIV_DIV
-#define CONF_UPLLCKDIV_DIV 1
-#endif
-// </h>
-// </e>
-
-// <e> MCK/8
-// <id> enable_mck_div_8
-#ifndef CONF_MCK_DIV_8_CONFIG
-#define CONF_MCK_DIV_8_CONFIG 0
-#endif
-
-// <o> MCK/8 Source
-// <0=> Master Clock (MCK)
-// <id> mck_div_8_src
-#ifndef CONF_MCK_DIV_8_SRC
-#define CONF_MCK_DIV_8_SRC 0
-#endif
-// </e>
-
-// <e> External Clock Input Configuration
-// <id> enable_dummy_ext
-#ifndef CONF_DUMMY_EXT_CONFIG
-#define CONF_DUMMY_EXT_CONFIG 1
-#endif
-
-// <o> External Clock Input Source
-// <i> All here are dummy values
-// <i> Refer to the peripherals settings for actual input information
-// <0=> Specific clock input from specific pin
-// <id> dummy_ext_src
-#ifndef CONF_DUMMY_EXT_SRC
-#define CONF_DUMMY_EXT_SRC 0
-#endif
-// </e>
-
-// <e> External Clock Configuration
-// <id> enable_dummy_ext_clk
-#ifndef CONF_DUMMY_EXT_CLK_CONFIG
-#define CONF_DUMMY_EXT_CLK_CONFIG 1
-#endif
-
-// <o> External Clock Source
-// <i> All here are dummy values
-// <i> Refer to the peripherals settings for actual input information
-// <0=> External Clock Input
-// <id> dummy_ext_clk_src
-#ifndef CONF_DUMMY_EXT_CLK_SRC
-#define CONF_DUMMY_EXT_CLK_SRC 0
-#endif
-// </e>
-
-// <<< end of configuration section >>>
-
-#endif // HPL_PMC_CONFIG_H
diff --git a/hw/bsp/same70_xplained/hpl_usart_config.h b/hw/bsp/same70_xplained/hpl_usart_config.h
deleted file mode 100644
index 50ca3f15c..000000000
--- a/hw/bsp/same70_xplained/hpl_usart_config.h
+++ /dev/null
@@ -1,215 +0,0 @@
-/* Auto-generated config file hpl_usart_config.h */
-#ifndef HPL_USART_CONFIG_H
-#define HPL_USART_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-#include <peripheral_clk_config.h>
-
-#ifndef CONF_USART_1_ENABLE
-#define CONF_USART_1_ENABLE 1
-#endif
-
-// <h> Basic Configuration
-
-// <o> Frame parity
-// <0x0=>Even parity
-// <0x1=>Odd parity
-// <0x2=>Parity forced to 0
-// <0x3=>Parity forced to 1
-// <0x4=>No parity
-// <i> Parity bit mode for USART frame
-// <id> usart_parity
-#ifndef CONF_USART_1_PARITY
-#define CONF_USART_1_PARITY 0x4
-#endif
-
-// <o> Character Size
-// <0x0=>5 bits
-// <0x1=>6 bits
-// <0x2=>7 bits
-// <0x3=>8 bits
-// <i> Data character size in USART frame
-// <id> usart_character_size
-#ifndef CONF_USART_1_CHSIZE
-#define CONF_USART_1_CHSIZE 0x3
-#endif
-
-// <o> Stop Bit
-// <0=>1 stop bit
-// <1=>1.5 stop bits
-// <2=>2 stop bits
-// <i> Number of stop bits in USART frame
-// <id> usart_stop_bit
-#ifndef CONF_USART_1_SBMODE
-#define CONF_USART_1_SBMODE 0
-#endif
-
-// <o> Clock Output Select
-// <0=>The USART does not drive the SCK pin
-// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
-// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
-// <id> usart_clock_output_select
-#ifndef CONF_USART_1_CLKO
-#define CONF_USART_1_CLKO 0
-#endif
-
-// <o> Baud rate <1-3000000>
-// <i> USART baud rate setting
-// <id> usart_baud_rate
-#ifndef CONF_USART_1_BAUD
-#define CONF_USART_1_BAUD 9600
-#endif
-
-// </h>
-
-// <e> Advanced configuration
-// <id> usart_advanced
-#ifndef CONF_USART_1_ADVANCED_CONFIG
-#define CONF_USART_1_ADVANCED_CONFIG 0
-#endif
-
-// <o> Channel Mode
-// <0=>Normal Mode
-// <1=>Automatic Echo
-// <2=>Local Loopback
-// <3=>Remote Loopback
-// <i> Channel mode in USART frame
-// <id> usart_channel_mode
-#ifndef CONF_USART_1_CHMODE
-#define CONF_USART_1_CHMODE 0
-#endif
-
-// <q> 9 bits character enable
-// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
-// <id> usart_9bits_enable
-#ifndef CONF_USART_1_MODE9
-#define CONF_USART_1_MODE9 0
-#endif
-
-// <o> Variable Sync
-// <0=>User defined configuration
-// <1=>sync field is updated when a character is written into US_THR
-// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
-// <id> variable_sync
-#ifndef CONF_USART_1_VAR_SYNC
-#define CONF_USART_1_VAR_SYNC 0
-#endif
-
-// <o> Oversampling Mode
-// <0=>16 Oversampling
-// <1=>8 Oversampling
-// <i> Oversampling Mode in UART mode
-// <id> usart__oversampling_mode
-#ifndef CONF_USART_1_OVER
-#define CONF_USART_1_OVER 0
-#endif
-
-// <o> Inhibit Non Ack
-// <0=>The NACK is generated
-// <1=>The NACK is not generated
-// <i> Inhibit Non Acknowledge
-// <id> usart__inack
-#ifndef CONF_USART_1_INACK
-#define CONF_USART_1_INACK 1
-#endif
-
-// <o> Disable Successive NACK
-// <0=>NACK is sent on the ISO line as soon as a parity error occurs
-// <1=>Many parity errors generate a NACK on the ISO line
-// <i> Disable Successive NACK
-// <id> usart_dsnack
-#ifndef CONF_USART_1_DSNACK
-#define CONF_USART_1_DSNACK 0
-#endif
-
-// <o> Inverted Data
-// <0=>Data isn't inverted, nomal mode
-// <1=>Data is inverted
-// <i> Inverted Data
-// <id> usart_invdata
-#ifndef CONF_USART_1_INVDATA
-#define CONF_USART_1_INVDATA 0
-#endif
-
-// <o> Maximum Number of Automatic Iteration <0-7>
-// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
-// <id> usart_max_iteration
-#ifndef CONF_USART_1_MAX_ITERATION
-#define CONF_USART_1_MAX_ITERATION 0
-#endif
-
-// <q> Receive Line Filter enable
-// <i> whether the USART filters the receive line using a three-sample filter
-// <id> usart_receive_filter_enable
-#ifndef CONF_USART_1_FILTER
-#define CONF_USART_1_FILTER 0
-#endif
-
-// <q> Manchester Encoder/Decoder Enable
-// <i> whether the USART Manchester Encoder/Decoder
-// <id> usart_manchester_filter_enable
-#ifndef CONF_USART_1_MAN
-#define CONF_USART_1_MAN 0
-#endif
-
-// <o> Manchester Synchronization Mode
-// <0=>The Manchester start bit is a 0 to 1 transition
-// <1=>The Manchester start bit is a 1 to 0 transition
-// <i> Manchester Synchronization Mode
-// <id> usart_manchester_synchronization_mode
-#ifndef CONF_USART_1_MODSYNC
-#define CONF_USART_1_MODSYNC 0
-#endif
-
-// <o> Start Frame Delimiter Selector
-// <0=>Start frame delimiter is COMMAND or DATA SYNC
-// <1=>Start frame delimiter is one bit
-// <i> Start Frame Delimiter Selector
-// <id> usart_start_frame_delimiter
-#ifndef CONF_USART_1_ONEBIT
-#define CONF_USART_1_ONEBIT 0
-#endif
-
-// <o> Fractional Part <0-7>
-// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
-// <id> usart_arch_fractional
-#ifndef CONF_USART_1_FRACTIONAL
-#define CONF_USART_1_FRACTIONAL 0x0
-#endif
-
-// <o> Data Order
-// <0=>LSB is transmitted first
-// <1=>MSB is transmitted first
-// <i> Data order of the data bits in the frame
-// <id> usart_arch_msbf
-#ifndef CONF_USART_1_MSBF
-#define CONF_USART_1_MSBF 0
-#endif
-
-// </e>
-
-#define CONF_USART_1_MODE 0x0
-
-// Calculate BAUD register value in UART mode
-#if CONF_USART1_CK_SRC < 3
-#ifndef CONF_USART_1_BAUD_CD
-#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
-#endif
-#ifndef CONF_USART_1_BAUD_FP
-#define CONF_USART_1_BAUD_FP                                                                                           \
-	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
-#endif
-#elif CONF_USART1_CK_SRC == 3
-// No division is active. The value written in US_BRGR has no effect.
-#ifndef CONF_USART_1_BAUD_CD
-#define CONF_USART_1_BAUD_CD 1
-#endif
-#ifndef CONF_USART_1_BAUD_FP
-#define CONF_USART_1_BAUD_FP 1
-#endif
-#endif
-
-// <<< end of configuration section >>>
-
-#endif // HPL_USART_CONFIG_H
diff --git a/hw/bsp/same70_xplained/hpl_xdmac_config.h b/hw/bsp/same70_xplained/hpl_xdmac_config.h
deleted file mode 100644
index a3d62c6fc..000000000
--- a/hw/bsp/same70_xplained/hpl_xdmac_config.h
+++ /dev/null
@@ -1,4400 +0,0 @@
-/* Auto-generated config file hpl_xdmac_config.h */
-#ifndef HPL_XDMAC_CONFIG_H
-#define HPL_XDMAC_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-// <e> XDMAC enable
-// <i> Indicates whether xdmac is enabled or not
-// <id> xdmac_enable
-#ifndef CONF_DMA_ENABLE
-#define CONF_DMA_ENABLE 0
-#endif
-
-// <e> Channel 0 settings
-// <id> dmac_channel_0_settings
-#ifndef CONF_DMAC_CHANNEL_0_SETTINGS
-#define CONF_DMAC_CHANNEL_0_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_0
-#ifndef CONF_DMAC_BURSTSIZE_0
-#define CONF_DMAC_BURSTSIZE_0 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_0
-#ifndef CONF_DMAC_CHUNKSIZE_0
-#define CONF_DMAC_CHUNKSIZE_0 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_0
-#ifndef CONF_DMAC_BEATSIZE_0
-#define CONF_DMAC_BEATSIZE_0 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_0
-#ifndef CONF_DMAC_SRC_INTERFACE_0
-#define CONF_DMAC_SRC_INTERFACE_0 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_0
-#ifndef CONF_DMAC_DES_INTERFACE_0
-#define CONF_DMAC_DES_INTERFACE_0 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_0
-#ifndef CONF_DMAC_SRCINC_0
-#define CONF_DMAC_SRCINC_0 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_0
-#ifndef CONF_DMAC_DSTINC_0
-#define CONF_DMAC_DSTINC_0 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_0
-#ifndef CONF_DMAC_TRANS_TYPE_0
-#define CONF_DMAC_TRANS_TYPE_0 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_0
-#ifndef CONF_DMAC_TRIGSRC_0
-#define CONF_DMAC_TRIGSRC_0 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_0 == 0
-#define CONF_DMAC_TYPE_0 0
-#define CONF_DMAC_DSYNC_0 0
-#elif CONF_DMAC_TRANS_TYPE_0 == 1
-#define CONF_DMAC_TYPE_0 1
-#define CONF_DMAC_DSYNC_0 0
-#elif CONF_DMAC_TRANS_TYPE_0 == 2
-#define CONF_DMAC_TYPE_0 1
-#define CONF_DMAC_DSYNC_0 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_0 == 0xFF
-#define CONF_DMAC_SWREQ_0 1
-#else
-#define CONF_DMAC_SWREQ_0 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_0_SETTINGS == 1 && CONF_DMAC_BEATSIZE_0 != 2 && ((!CONF_DMAC_SRCINC_0) || (!CONF_DMAC_DSTINC_0)))
-#if (!CONF_DMAC_SRCINC_0)
-#define CONF_DMAC_SRC_STRIDE_0 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_0)
-#define CONF_DMAC_DES_STRIDE_0 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_0
-#define CONF_DMAC_SRC_STRIDE_0 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_0
-#define CONF_DMAC_DES_STRIDE_0 0
-#endif
-
-// <e> Channel 1 settings
-// <id> dmac_channel_1_settings
-#ifndef CONF_DMAC_CHANNEL_1_SETTINGS
-#define CONF_DMAC_CHANNEL_1_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_1
-#ifndef CONF_DMAC_BURSTSIZE_1
-#define CONF_DMAC_BURSTSIZE_1 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_1
-#ifndef CONF_DMAC_CHUNKSIZE_1
-#define CONF_DMAC_CHUNKSIZE_1 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_1
-#ifndef CONF_DMAC_BEATSIZE_1
-#define CONF_DMAC_BEATSIZE_1 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_1
-#ifndef CONF_DMAC_SRC_INTERFACE_1
-#define CONF_DMAC_SRC_INTERFACE_1 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_1
-#ifndef CONF_DMAC_DES_INTERFACE_1
-#define CONF_DMAC_DES_INTERFACE_1 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_1
-#ifndef CONF_DMAC_SRCINC_1
-#define CONF_DMAC_SRCINC_1 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_1
-#ifndef CONF_DMAC_DSTINC_1
-#define CONF_DMAC_DSTINC_1 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_1
-#ifndef CONF_DMAC_TRANS_TYPE_1
-#define CONF_DMAC_TRANS_TYPE_1 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_1
-#ifndef CONF_DMAC_TRIGSRC_1
-#define CONF_DMAC_TRIGSRC_1 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_1 == 0
-#define CONF_DMAC_TYPE_1 0
-#define CONF_DMAC_DSYNC_1 0
-#elif CONF_DMAC_TRANS_TYPE_1 == 1
-#define CONF_DMAC_TYPE_1 1
-#define CONF_DMAC_DSYNC_1 0
-#elif CONF_DMAC_TRANS_TYPE_1 == 2
-#define CONF_DMAC_TYPE_1 1
-#define CONF_DMAC_DSYNC_1 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_1 == 0xFF
-#define CONF_DMAC_SWREQ_1 1
-#else
-#define CONF_DMAC_SWREQ_1 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_1_SETTINGS == 1 && CONF_DMAC_BEATSIZE_1 != 2 && ((!CONF_DMAC_SRCINC_1) || (!CONF_DMAC_DSTINC_1)))
-#if (!CONF_DMAC_SRCINC_1)
-#define CONF_DMAC_SRC_STRIDE_1 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_1)
-#define CONF_DMAC_DES_STRIDE_1 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_1
-#define CONF_DMAC_SRC_STRIDE_1 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_1
-#define CONF_DMAC_DES_STRIDE_1 0
-#endif
-
-// <e> Channel 2 settings
-// <id> dmac_channel_2_settings
-#ifndef CONF_DMAC_CHANNEL_2_SETTINGS
-#define CONF_DMAC_CHANNEL_2_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_2
-#ifndef CONF_DMAC_BURSTSIZE_2
-#define CONF_DMAC_BURSTSIZE_2 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_2
-#ifndef CONF_DMAC_CHUNKSIZE_2
-#define CONF_DMAC_CHUNKSIZE_2 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_2
-#ifndef CONF_DMAC_BEATSIZE_2
-#define CONF_DMAC_BEATSIZE_2 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_2
-#ifndef CONF_DMAC_SRC_INTERFACE_2
-#define CONF_DMAC_SRC_INTERFACE_2 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_2
-#ifndef CONF_DMAC_DES_INTERFACE_2
-#define CONF_DMAC_DES_INTERFACE_2 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_2
-#ifndef CONF_DMAC_SRCINC_2
-#define CONF_DMAC_SRCINC_2 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_2
-#ifndef CONF_DMAC_DSTINC_2
-#define CONF_DMAC_DSTINC_2 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_2
-#ifndef CONF_DMAC_TRANS_TYPE_2
-#define CONF_DMAC_TRANS_TYPE_2 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_2
-#ifndef CONF_DMAC_TRIGSRC_2
-#define CONF_DMAC_TRIGSRC_2 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_2 == 0
-#define CONF_DMAC_TYPE_2 0
-#define CONF_DMAC_DSYNC_2 0
-#elif CONF_DMAC_TRANS_TYPE_2 == 1
-#define CONF_DMAC_TYPE_2 1
-#define CONF_DMAC_DSYNC_2 0
-#elif CONF_DMAC_TRANS_TYPE_2 == 2
-#define CONF_DMAC_TYPE_2 1
-#define CONF_DMAC_DSYNC_2 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_2 == 0xFF
-#define CONF_DMAC_SWREQ_2 1
-#else
-#define CONF_DMAC_SWREQ_2 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_2_SETTINGS == 1 && CONF_DMAC_BEATSIZE_2 != 2 && ((!CONF_DMAC_SRCINC_2) || (!CONF_DMAC_DSTINC_2)))
-#if (!CONF_DMAC_SRCINC_2)
-#define CONF_DMAC_SRC_STRIDE_2 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_2)
-#define CONF_DMAC_DES_STRIDE_2 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_2
-#define CONF_DMAC_SRC_STRIDE_2 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_2
-#define CONF_DMAC_DES_STRIDE_2 0
-#endif
-
-// <e> Channel 3 settings
-// <id> dmac_channel_3_settings
-#ifndef CONF_DMAC_CHANNEL_3_SETTINGS
-#define CONF_DMAC_CHANNEL_3_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_3
-#ifndef CONF_DMAC_BURSTSIZE_3
-#define CONF_DMAC_BURSTSIZE_3 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_3
-#ifndef CONF_DMAC_CHUNKSIZE_3
-#define CONF_DMAC_CHUNKSIZE_3 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_3
-#ifndef CONF_DMAC_BEATSIZE_3
-#define CONF_DMAC_BEATSIZE_3 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_3
-#ifndef CONF_DMAC_SRC_INTERFACE_3
-#define CONF_DMAC_SRC_INTERFACE_3 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_3
-#ifndef CONF_DMAC_DES_INTERFACE_3
-#define CONF_DMAC_DES_INTERFACE_3 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_3
-#ifndef CONF_DMAC_SRCINC_3
-#define CONF_DMAC_SRCINC_3 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_3
-#ifndef CONF_DMAC_DSTINC_3
-#define CONF_DMAC_DSTINC_3 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_3
-#ifndef CONF_DMAC_TRANS_TYPE_3
-#define CONF_DMAC_TRANS_TYPE_3 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_3
-#ifndef CONF_DMAC_TRIGSRC_3
-#define CONF_DMAC_TRIGSRC_3 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_3 == 0
-#define CONF_DMAC_TYPE_3 0
-#define CONF_DMAC_DSYNC_3 0
-#elif CONF_DMAC_TRANS_TYPE_3 == 1
-#define CONF_DMAC_TYPE_3 1
-#define CONF_DMAC_DSYNC_3 0
-#elif CONF_DMAC_TRANS_TYPE_3 == 2
-#define CONF_DMAC_TYPE_3 1
-#define CONF_DMAC_DSYNC_3 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_3 == 0xFF
-#define CONF_DMAC_SWREQ_3 1
-#else
-#define CONF_DMAC_SWREQ_3 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_3_SETTINGS == 1 && CONF_DMAC_BEATSIZE_3 != 2 && ((!CONF_DMAC_SRCINC_3) || (!CONF_DMAC_DSTINC_3)))
-#if (!CONF_DMAC_SRCINC_3)
-#define CONF_DMAC_SRC_STRIDE_3 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_3)
-#define CONF_DMAC_DES_STRIDE_3 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_3
-#define CONF_DMAC_SRC_STRIDE_3 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_3
-#define CONF_DMAC_DES_STRIDE_3 0
-#endif
-
-// <e> Channel 4 settings
-// <id> dmac_channel_4_settings
-#ifndef CONF_DMAC_CHANNEL_4_SETTINGS
-#define CONF_DMAC_CHANNEL_4_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_4
-#ifndef CONF_DMAC_BURSTSIZE_4
-#define CONF_DMAC_BURSTSIZE_4 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_4
-#ifndef CONF_DMAC_CHUNKSIZE_4
-#define CONF_DMAC_CHUNKSIZE_4 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_4
-#ifndef CONF_DMAC_BEATSIZE_4
-#define CONF_DMAC_BEATSIZE_4 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_4
-#ifndef CONF_DMAC_SRC_INTERFACE_4
-#define CONF_DMAC_SRC_INTERFACE_4 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_4
-#ifndef CONF_DMAC_DES_INTERFACE_4
-#define CONF_DMAC_DES_INTERFACE_4 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_4
-#ifndef CONF_DMAC_SRCINC_4
-#define CONF_DMAC_SRCINC_4 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_4
-#ifndef CONF_DMAC_DSTINC_4
-#define CONF_DMAC_DSTINC_4 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_4
-#ifndef CONF_DMAC_TRANS_TYPE_4
-#define CONF_DMAC_TRANS_TYPE_4 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_4
-#ifndef CONF_DMAC_TRIGSRC_4
-#define CONF_DMAC_TRIGSRC_4 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_4 == 0
-#define CONF_DMAC_TYPE_4 0
-#define CONF_DMAC_DSYNC_4 0
-#elif CONF_DMAC_TRANS_TYPE_4 == 1
-#define CONF_DMAC_TYPE_4 1
-#define CONF_DMAC_DSYNC_4 0
-#elif CONF_DMAC_TRANS_TYPE_4 == 2
-#define CONF_DMAC_TYPE_4 1
-#define CONF_DMAC_DSYNC_4 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_4 == 0xFF
-#define CONF_DMAC_SWREQ_4 1
-#else
-#define CONF_DMAC_SWREQ_4 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_4_SETTINGS == 1 && CONF_DMAC_BEATSIZE_4 != 2 && ((!CONF_DMAC_SRCINC_4) || (!CONF_DMAC_DSTINC_4)))
-#if (!CONF_DMAC_SRCINC_4)
-#define CONF_DMAC_SRC_STRIDE_4 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_4)
-#define CONF_DMAC_DES_STRIDE_4 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_4
-#define CONF_DMAC_SRC_STRIDE_4 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_4
-#define CONF_DMAC_DES_STRIDE_4 0
-#endif
-
-// <e> Channel 5 settings
-// <id> dmac_channel_5_settings
-#ifndef CONF_DMAC_CHANNEL_5_SETTINGS
-#define CONF_DMAC_CHANNEL_5_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_5
-#ifndef CONF_DMAC_BURSTSIZE_5
-#define CONF_DMAC_BURSTSIZE_5 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_5
-#ifndef CONF_DMAC_CHUNKSIZE_5
-#define CONF_DMAC_CHUNKSIZE_5 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_5
-#ifndef CONF_DMAC_BEATSIZE_5
-#define CONF_DMAC_BEATSIZE_5 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_5
-#ifndef CONF_DMAC_SRC_INTERFACE_5
-#define CONF_DMAC_SRC_INTERFACE_5 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_5
-#ifndef CONF_DMAC_DES_INTERFACE_5
-#define CONF_DMAC_DES_INTERFACE_5 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_5
-#ifndef CONF_DMAC_SRCINC_5
-#define CONF_DMAC_SRCINC_5 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_5
-#ifndef CONF_DMAC_DSTINC_5
-#define CONF_DMAC_DSTINC_5 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_5
-#ifndef CONF_DMAC_TRANS_TYPE_5
-#define CONF_DMAC_TRANS_TYPE_5 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_5
-#ifndef CONF_DMAC_TRIGSRC_5
-#define CONF_DMAC_TRIGSRC_5 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_5 == 0
-#define CONF_DMAC_TYPE_5 0
-#define CONF_DMAC_DSYNC_5 0
-#elif CONF_DMAC_TRANS_TYPE_5 == 1
-#define CONF_DMAC_TYPE_5 1
-#define CONF_DMAC_DSYNC_5 0
-#elif CONF_DMAC_TRANS_TYPE_5 == 2
-#define CONF_DMAC_TYPE_5 1
-#define CONF_DMAC_DSYNC_5 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_5 == 0xFF
-#define CONF_DMAC_SWREQ_5 1
-#else
-#define CONF_DMAC_SWREQ_5 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_5_SETTINGS == 1 && CONF_DMAC_BEATSIZE_5 != 2 && ((!CONF_DMAC_SRCINC_5) || (!CONF_DMAC_DSTINC_5)))
-#if (!CONF_DMAC_SRCINC_5)
-#define CONF_DMAC_SRC_STRIDE_5 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_5)
-#define CONF_DMAC_DES_STRIDE_5 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_5
-#define CONF_DMAC_SRC_STRIDE_5 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_5
-#define CONF_DMAC_DES_STRIDE_5 0
-#endif
-
-// <e> Channel 6 settings
-// <id> dmac_channel_6_settings
-#ifndef CONF_DMAC_CHANNEL_6_SETTINGS
-#define CONF_DMAC_CHANNEL_6_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_6
-#ifndef CONF_DMAC_BURSTSIZE_6
-#define CONF_DMAC_BURSTSIZE_6 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_6
-#ifndef CONF_DMAC_CHUNKSIZE_6
-#define CONF_DMAC_CHUNKSIZE_6 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_6
-#ifndef CONF_DMAC_BEATSIZE_6
-#define CONF_DMAC_BEATSIZE_6 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_6
-#ifndef CONF_DMAC_SRC_INTERFACE_6
-#define CONF_DMAC_SRC_INTERFACE_6 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_6
-#ifndef CONF_DMAC_DES_INTERFACE_6
-#define CONF_DMAC_DES_INTERFACE_6 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_6
-#ifndef CONF_DMAC_SRCINC_6
-#define CONF_DMAC_SRCINC_6 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_6
-#ifndef CONF_DMAC_DSTINC_6
-#define CONF_DMAC_DSTINC_6 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_6
-#ifndef CONF_DMAC_TRANS_TYPE_6
-#define CONF_DMAC_TRANS_TYPE_6 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_6
-#ifndef CONF_DMAC_TRIGSRC_6
-#define CONF_DMAC_TRIGSRC_6 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_6 == 0
-#define CONF_DMAC_TYPE_6 0
-#define CONF_DMAC_DSYNC_6 0
-#elif CONF_DMAC_TRANS_TYPE_6 == 1
-#define CONF_DMAC_TYPE_6 1
-#define CONF_DMAC_DSYNC_6 0
-#elif CONF_DMAC_TRANS_TYPE_6 == 2
-#define CONF_DMAC_TYPE_6 1
-#define CONF_DMAC_DSYNC_6 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_6 == 0xFF
-#define CONF_DMAC_SWREQ_6 1
-#else
-#define CONF_DMAC_SWREQ_6 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_6_SETTINGS == 1 && CONF_DMAC_BEATSIZE_6 != 2 && ((!CONF_DMAC_SRCINC_6) || (!CONF_DMAC_DSTINC_6)))
-#if (!CONF_DMAC_SRCINC_6)
-#define CONF_DMAC_SRC_STRIDE_6 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_6)
-#define CONF_DMAC_DES_STRIDE_6 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_6
-#define CONF_DMAC_SRC_STRIDE_6 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_6
-#define CONF_DMAC_DES_STRIDE_6 0
-#endif
-
-// <e> Channel 7 settings
-// <id> dmac_channel_7_settings
-#ifndef CONF_DMAC_CHANNEL_7_SETTINGS
-#define CONF_DMAC_CHANNEL_7_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_7
-#ifndef CONF_DMAC_BURSTSIZE_7
-#define CONF_DMAC_BURSTSIZE_7 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_7
-#ifndef CONF_DMAC_CHUNKSIZE_7
-#define CONF_DMAC_CHUNKSIZE_7 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_7
-#ifndef CONF_DMAC_BEATSIZE_7
-#define CONF_DMAC_BEATSIZE_7 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_7
-#ifndef CONF_DMAC_SRC_INTERFACE_7
-#define CONF_DMAC_SRC_INTERFACE_7 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_7
-#ifndef CONF_DMAC_DES_INTERFACE_7
-#define CONF_DMAC_DES_INTERFACE_7 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_7
-#ifndef CONF_DMAC_SRCINC_7
-#define CONF_DMAC_SRCINC_7 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_7
-#ifndef CONF_DMAC_DSTINC_7
-#define CONF_DMAC_DSTINC_7 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_7
-#ifndef CONF_DMAC_TRANS_TYPE_7
-#define CONF_DMAC_TRANS_TYPE_7 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_7
-#ifndef CONF_DMAC_TRIGSRC_7
-#define CONF_DMAC_TRIGSRC_7 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_7 == 0
-#define CONF_DMAC_TYPE_7 0
-#define CONF_DMAC_DSYNC_7 0
-#elif CONF_DMAC_TRANS_TYPE_7 == 1
-#define CONF_DMAC_TYPE_7 1
-#define CONF_DMAC_DSYNC_7 0
-#elif CONF_DMAC_TRANS_TYPE_7 == 2
-#define CONF_DMAC_TYPE_7 1
-#define CONF_DMAC_DSYNC_7 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_7 == 0xFF
-#define CONF_DMAC_SWREQ_7 1
-#else
-#define CONF_DMAC_SWREQ_7 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_7_SETTINGS == 1 && CONF_DMAC_BEATSIZE_7 != 2 && ((!CONF_DMAC_SRCINC_7) || (!CONF_DMAC_DSTINC_7)))
-#if (!CONF_DMAC_SRCINC_7)
-#define CONF_DMAC_SRC_STRIDE_7 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_7)
-#define CONF_DMAC_DES_STRIDE_7 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_7
-#define CONF_DMAC_SRC_STRIDE_7 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_7
-#define CONF_DMAC_DES_STRIDE_7 0
-#endif
-
-// <e> Channel 8 settings
-// <id> dmac_channel_8_settings
-#ifndef CONF_DMAC_CHANNEL_8_SETTINGS
-#define CONF_DMAC_CHANNEL_8_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_8
-#ifndef CONF_DMAC_BURSTSIZE_8
-#define CONF_DMAC_BURSTSIZE_8 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_8
-#ifndef CONF_DMAC_CHUNKSIZE_8
-#define CONF_DMAC_CHUNKSIZE_8 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_8
-#ifndef CONF_DMAC_BEATSIZE_8
-#define CONF_DMAC_BEATSIZE_8 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_8
-#ifndef CONF_DMAC_SRC_INTERFACE_8
-#define CONF_DMAC_SRC_INTERFACE_8 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_8
-#ifndef CONF_DMAC_DES_INTERFACE_8
-#define CONF_DMAC_DES_INTERFACE_8 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_8
-#ifndef CONF_DMAC_SRCINC_8
-#define CONF_DMAC_SRCINC_8 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_8
-#ifndef CONF_DMAC_DSTINC_8
-#define CONF_DMAC_DSTINC_8 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_8
-#ifndef CONF_DMAC_TRANS_TYPE_8
-#define CONF_DMAC_TRANS_TYPE_8 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_8
-#ifndef CONF_DMAC_TRIGSRC_8
-#define CONF_DMAC_TRIGSRC_8 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_8 == 0
-#define CONF_DMAC_TYPE_8 0
-#define CONF_DMAC_DSYNC_8 0
-#elif CONF_DMAC_TRANS_TYPE_8 == 1
-#define CONF_DMAC_TYPE_8 1
-#define CONF_DMAC_DSYNC_8 0
-#elif CONF_DMAC_TRANS_TYPE_8 == 2
-#define CONF_DMAC_TYPE_8 1
-#define CONF_DMAC_DSYNC_8 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_8 == 0xFF
-#define CONF_DMAC_SWREQ_8 1
-#else
-#define CONF_DMAC_SWREQ_8 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_8_SETTINGS == 1 && CONF_DMAC_BEATSIZE_8 != 2 && ((!CONF_DMAC_SRCINC_8) || (!CONF_DMAC_DSTINC_8)))
-#if (!CONF_DMAC_SRCINC_8)
-#define CONF_DMAC_SRC_STRIDE_8 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_8)
-#define CONF_DMAC_DES_STRIDE_8 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_8
-#define CONF_DMAC_SRC_STRIDE_8 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_8
-#define CONF_DMAC_DES_STRIDE_8 0
-#endif
-
-// <e> Channel 9 settings
-// <id> dmac_channel_9_settings
-#ifndef CONF_DMAC_CHANNEL_9_SETTINGS
-#define CONF_DMAC_CHANNEL_9_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_9
-#ifndef CONF_DMAC_BURSTSIZE_9
-#define CONF_DMAC_BURSTSIZE_9 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_9
-#ifndef CONF_DMAC_CHUNKSIZE_9
-#define CONF_DMAC_CHUNKSIZE_9 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_9
-#ifndef CONF_DMAC_BEATSIZE_9
-#define CONF_DMAC_BEATSIZE_9 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_9
-#ifndef CONF_DMAC_SRC_INTERFACE_9
-#define CONF_DMAC_SRC_INTERFACE_9 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_9
-#ifndef CONF_DMAC_DES_INTERFACE_9
-#define CONF_DMAC_DES_INTERFACE_9 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_9
-#ifndef CONF_DMAC_SRCINC_9
-#define CONF_DMAC_SRCINC_9 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_9
-#ifndef CONF_DMAC_DSTINC_9
-#define CONF_DMAC_DSTINC_9 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_9
-#ifndef CONF_DMAC_TRANS_TYPE_9
-#define CONF_DMAC_TRANS_TYPE_9 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_9
-#ifndef CONF_DMAC_TRIGSRC_9
-#define CONF_DMAC_TRIGSRC_9 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_9 == 0
-#define CONF_DMAC_TYPE_9 0
-#define CONF_DMAC_DSYNC_9 0
-#elif CONF_DMAC_TRANS_TYPE_9 == 1
-#define CONF_DMAC_TYPE_9 1
-#define CONF_DMAC_DSYNC_9 0
-#elif CONF_DMAC_TRANS_TYPE_9 == 2
-#define CONF_DMAC_TYPE_9 1
-#define CONF_DMAC_DSYNC_9 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_9 == 0xFF
-#define CONF_DMAC_SWREQ_9 1
-#else
-#define CONF_DMAC_SWREQ_9 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_9_SETTINGS == 1 && CONF_DMAC_BEATSIZE_9 != 2 && ((!CONF_DMAC_SRCINC_9) || (!CONF_DMAC_DSTINC_9)))
-#if (!CONF_DMAC_SRCINC_9)
-#define CONF_DMAC_SRC_STRIDE_9 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_9)
-#define CONF_DMAC_DES_STRIDE_9 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_9
-#define CONF_DMAC_SRC_STRIDE_9 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_9
-#define CONF_DMAC_DES_STRIDE_9 0
-#endif
-
-// <e> Channel 10 settings
-// <id> dmac_channel_10_settings
-#ifndef CONF_DMAC_CHANNEL_10_SETTINGS
-#define CONF_DMAC_CHANNEL_10_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_10
-#ifndef CONF_DMAC_BURSTSIZE_10
-#define CONF_DMAC_BURSTSIZE_10 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_10
-#ifndef CONF_DMAC_CHUNKSIZE_10
-#define CONF_DMAC_CHUNKSIZE_10 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_10
-#ifndef CONF_DMAC_BEATSIZE_10
-#define CONF_DMAC_BEATSIZE_10 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_10
-#ifndef CONF_DMAC_SRC_INTERFACE_10
-#define CONF_DMAC_SRC_INTERFACE_10 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_10
-#ifndef CONF_DMAC_DES_INTERFACE_10
-#define CONF_DMAC_DES_INTERFACE_10 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_10
-#ifndef CONF_DMAC_SRCINC_10
-#define CONF_DMAC_SRCINC_10 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_10
-#ifndef CONF_DMAC_DSTINC_10
-#define CONF_DMAC_DSTINC_10 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_10
-#ifndef CONF_DMAC_TRANS_TYPE_10
-#define CONF_DMAC_TRANS_TYPE_10 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_10
-#ifndef CONF_DMAC_TRIGSRC_10
-#define CONF_DMAC_TRIGSRC_10 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_10 == 0
-#define CONF_DMAC_TYPE_10 0
-#define CONF_DMAC_DSYNC_10 0
-#elif CONF_DMAC_TRANS_TYPE_10 == 1
-#define CONF_DMAC_TYPE_10 1
-#define CONF_DMAC_DSYNC_10 0
-#elif CONF_DMAC_TRANS_TYPE_10 == 2
-#define CONF_DMAC_TYPE_10 1
-#define CONF_DMAC_DSYNC_10 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_10 == 0xFF
-#define CONF_DMAC_SWREQ_10 1
-#else
-#define CONF_DMAC_SWREQ_10 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_10_SETTINGS == 1 && CONF_DMAC_BEATSIZE_10 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_10) || (!CONF_DMAC_DSTINC_10)))
-#if (!CONF_DMAC_SRCINC_10)
-#define CONF_DMAC_SRC_STRIDE_10 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_10)
-#define CONF_DMAC_DES_STRIDE_10 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_10
-#define CONF_DMAC_SRC_STRIDE_10 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_10
-#define CONF_DMAC_DES_STRIDE_10 0
-#endif
-
-// <e> Channel 11 settings
-// <id> dmac_channel_11_settings
-#ifndef CONF_DMAC_CHANNEL_11_SETTINGS
-#define CONF_DMAC_CHANNEL_11_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_11
-#ifndef CONF_DMAC_BURSTSIZE_11
-#define CONF_DMAC_BURSTSIZE_11 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_11
-#ifndef CONF_DMAC_CHUNKSIZE_11
-#define CONF_DMAC_CHUNKSIZE_11 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_11
-#ifndef CONF_DMAC_BEATSIZE_11
-#define CONF_DMAC_BEATSIZE_11 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_11
-#ifndef CONF_DMAC_SRC_INTERFACE_11
-#define CONF_DMAC_SRC_INTERFACE_11 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_11
-#ifndef CONF_DMAC_DES_INTERFACE_11
-#define CONF_DMAC_DES_INTERFACE_11 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_11
-#ifndef CONF_DMAC_SRCINC_11
-#define CONF_DMAC_SRCINC_11 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_11
-#ifndef CONF_DMAC_DSTINC_11
-#define CONF_DMAC_DSTINC_11 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_11
-#ifndef CONF_DMAC_TRANS_TYPE_11
-#define CONF_DMAC_TRANS_TYPE_11 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_11
-#ifndef CONF_DMAC_TRIGSRC_11
-#define CONF_DMAC_TRIGSRC_11 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_11 == 0
-#define CONF_DMAC_TYPE_11 0
-#define CONF_DMAC_DSYNC_11 0
-#elif CONF_DMAC_TRANS_TYPE_11 == 1
-#define CONF_DMAC_TYPE_11 1
-#define CONF_DMAC_DSYNC_11 0
-#elif CONF_DMAC_TRANS_TYPE_11 == 2
-#define CONF_DMAC_TYPE_11 1
-#define CONF_DMAC_DSYNC_11 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_11 == 0xFF
-#define CONF_DMAC_SWREQ_11 1
-#else
-#define CONF_DMAC_SWREQ_11 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_11_SETTINGS == 1 && CONF_DMAC_BEATSIZE_11 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_11) || (!CONF_DMAC_DSTINC_11)))
-#if (!CONF_DMAC_SRCINC_11)
-#define CONF_DMAC_SRC_STRIDE_11 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_11)
-#define CONF_DMAC_DES_STRIDE_11 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_11
-#define CONF_DMAC_SRC_STRIDE_11 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_11
-#define CONF_DMAC_DES_STRIDE_11 0
-#endif
-
-// <e> Channel 12 settings
-// <id> dmac_channel_12_settings
-#ifndef CONF_DMAC_CHANNEL_12_SETTINGS
-#define CONF_DMAC_CHANNEL_12_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_12
-#ifndef CONF_DMAC_BURSTSIZE_12
-#define CONF_DMAC_BURSTSIZE_12 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_12
-#ifndef CONF_DMAC_CHUNKSIZE_12
-#define CONF_DMAC_CHUNKSIZE_12 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_12
-#ifndef CONF_DMAC_BEATSIZE_12
-#define CONF_DMAC_BEATSIZE_12 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_12
-#ifndef CONF_DMAC_SRC_INTERFACE_12
-#define CONF_DMAC_SRC_INTERFACE_12 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_12
-#ifndef CONF_DMAC_DES_INTERFACE_12
-#define CONF_DMAC_DES_INTERFACE_12 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_12
-#ifndef CONF_DMAC_SRCINC_12
-#define CONF_DMAC_SRCINC_12 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_12
-#ifndef CONF_DMAC_DSTINC_12
-#define CONF_DMAC_DSTINC_12 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_12
-#ifndef CONF_DMAC_TRANS_TYPE_12
-#define CONF_DMAC_TRANS_TYPE_12 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_12
-#ifndef CONF_DMAC_TRIGSRC_12
-#define CONF_DMAC_TRIGSRC_12 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_12 == 0
-#define CONF_DMAC_TYPE_12 0
-#define CONF_DMAC_DSYNC_12 0
-#elif CONF_DMAC_TRANS_TYPE_12 == 1
-#define CONF_DMAC_TYPE_12 1
-#define CONF_DMAC_DSYNC_12 0
-#elif CONF_DMAC_TRANS_TYPE_12 == 2
-#define CONF_DMAC_TYPE_12 1
-#define CONF_DMAC_DSYNC_12 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_12 == 0xFF
-#define CONF_DMAC_SWREQ_12 1
-#else
-#define CONF_DMAC_SWREQ_12 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_12_SETTINGS == 1 && CONF_DMAC_BEATSIZE_12 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_12) || (!CONF_DMAC_DSTINC_12)))
-#if (!CONF_DMAC_SRCINC_12)
-#define CONF_DMAC_SRC_STRIDE_12 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_12)
-#define CONF_DMAC_DES_STRIDE_12 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_12
-#define CONF_DMAC_SRC_STRIDE_12 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_12
-#define CONF_DMAC_DES_STRIDE_12 0
-#endif
-
-// <e> Channel 13 settings
-// <id> dmac_channel_13_settings
-#ifndef CONF_DMAC_CHANNEL_13_SETTINGS
-#define CONF_DMAC_CHANNEL_13_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_13
-#ifndef CONF_DMAC_BURSTSIZE_13
-#define CONF_DMAC_BURSTSIZE_13 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_13
-#ifndef CONF_DMAC_CHUNKSIZE_13
-#define CONF_DMAC_CHUNKSIZE_13 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_13
-#ifndef CONF_DMAC_BEATSIZE_13
-#define CONF_DMAC_BEATSIZE_13 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_13
-#ifndef CONF_DMAC_SRC_INTERFACE_13
-#define CONF_DMAC_SRC_INTERFACE_13 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_13
-#ifndef CONF_DMAC_DES_INTERFACE_13
-#define CONF_DMAC_DES_INTERFACE_13 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_13
-#ifndef CONF_DMAC_SRCINC_13
-#define CONF_DMAC_SRCINC_13 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_13
-#ifndef CONF_DMAC_DSTINC_13
-#define CONF_DMAC_DSTINC_13 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_13
-#ifndef CONF_DMAC_TRANS_TYPE_13
-#define CONF_DMAC_TRANS_TYPE_13 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_13
-#ifndef CONF_DMAC_TRIGSRC_13
-#define CONF_DMAC_TRIGSRC_13 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_13 == 0
-#define CONF_DMAC_TYPE_13 0
-#define CONF_DMAC_DSYNC_13 0
-#elif CONF_DMAC_TRANS_TYPE_13 == 1
-#define CONF_DMAC_TYPE_13 1
-#define CONF_DMAC_DSYNC_13 0
-#elif CONF_DMAC_TRANS_TYPE_13 == 2
-#define CONF_DMAC_TYPE_13 1
-#define CONF_DMAC_DSYNC_13 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_13 == 0xFF
-#define CONF_DMAC_SWREQ_13 1
-#else
-#define CONF_DMAC_SWREQ_13 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_13_SETTINGS == 1 && CONF_DMAC_BEATSIZE_13 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_13) || (!CONF_DMAC_DSTINC_13)))
-#if (!CONF_DMAC_SRCINC_13)
-#define CONF_DMAC_SRC_STRIDE_13 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_13)
-#define CONF_DMAC_DES_STRIDE_13 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_13
-#define CONF_DMAC_SRC_STRIDE_13 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_13
-#define CONF_DMAC_DES_STRIDE_13 0
-#endif
-
-// <e> Channel 14 settings
-// <id> dmac_channel_14_settings
-#ifndef CONF_DMAC_CHANNEL_14_SETTINGS
-#define CONF_DMAC_CHANNEL_14_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_14
-#ifndef CONF_DMAC_BURSTSIZE_14
-#define CONF_DMAC_BURSTSIZE_14 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_14
-#ifndef CONF_DMAC_CHUNKSIZE_14
-#define CONF_DMAC_CHUNKSIZE_14 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_14
-#ifndef CONF_DMAC_BEATSIZE_14
-#define CONF_DMAC_BEATSIZE_14 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_14
-#ifndef CONF_DMAC_SRC_INTERFACE_14
-#define CONF_DMAC_SRC_INTERFACE_14 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_14
-#ifndef CONF_DMAC_DES_INTERFACE_14
-#define CONF_DMAC_DES_INTERFACE_14 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_14
-#ifndef CONF_DMAC_SRCINC_14
-#define CONF_DMAC_SRCINC_14 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_14
-#ifndef CONF_DMAC_DSTINC_14
-#define CONF_DMAC_DSTINC_14 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_14
-#ifndef CONF_DMAC_TRANS_TYPE_14
-#define CONF_DMAC_TRANS_TYPE_14 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_14
-#ifndef CONF_DMAC_TRIGSRC_14
-#define CONF_DMAC_TRIGSRC_14 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_14 == 0
-#define CONF_DMAC_TYPE_14 0
-#define CONF_DMAC_DSYNC_14 0
-#elif CONF_DMAC_TRANS_TYPE_14 == 1
-#define CONF_DMAC_TYPE_14 1
-#define CONF_DMAC_DSYNC_14 0
-#elif CONF_DMAC_TRANS_TYPE_14 == 2
-#define CONF_DMAC_TYPE_14 1
-#define CONF_DMAC_DSYNC_14 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_14 == 0xFF
-#define CONF_DMAC_SWREQ_14 1
-#else
-#define CONF_DMAC_SWREQ_14 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_14_SETTINGS == 1 && CONF_DMAC_BEATSIZE_14 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_14) || (!CONF_DMAC_DSTINC_14)))
-#if (!CONF_DMAC_SRCINC_14)
-#define CONF_DMAC_SRC_STRIDE_14 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_14)
-#define CONF_DMAC_DES_STRIDE_14 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_14
-#define CONF_DMAC_SRC_STRIDE_14 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_14
-#define CONF_DMAC_DES_STRIDE_14 0
-#endif
-
-// <e> Channel 15 settings
-// <id> dmac_channel_15_settings
-#ifndef CONF_DMAC_CHANNEL_15_SETTINGS
-#define CONF_DMAC_CHANNEL_15_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_15
-#ifndef CONF_DMAC_BURSTSIZE_15
-#define CONF_DMAC_BURSTSIZE_15 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_15
-#ifndef CONF_DMAC_CHUNKSIZE_15
-#define CONF_DMAC_CHUNKSIZE_15 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_15
-#ifndef CONF_DMAC_BEATSIZE_15
-#define CONF_DMAC_BEATSIZE_15 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_15
-#ifndef CONF_DMAC_SRC_INTERFACE_15
-#define CONF_DMAC_SRC_INTERFACE_15 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_15
-#ifndef CONF_DMAC_DES_INTERFACE_15
-#define CONF_DMAC_DES_INTERFACE_15 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_15
-#ifndef CONF_DMAC_SRCINC_15
-#define CONF_DMAC_SRCINC_15 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_15
-#ifndef CONF_DMAC_DSTINC_15
-#define CONF_DMAC_DSTINC_15 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_15
-#ifndef CONF_DMAC_TRANS_TYPE_15
-#define CONF_DMAC_TRANS_TYPE_15 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_15
-#ifndef CONF_DMAC_TRIGSRC_15
-#define CONF_DMAC_TRIGSRC_15 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_15 == 0
-#define CONF_DMAC_TYPE_15 0
-#define CONF_DMAC_DSYNC_15 0
-#elif CONF_DMAC_TRANS_TYPE_15 == 1
-#define CONF_DMAC_TYPE_15 1
-#define CONF_DMAC_DSYNC_15 0
-#elif CONF_DMAC_TRANS_TYPE_15 == 2
-#define CONF_DMAC_TYPE_15 1
-#define CONF_DMAC_DSYNC_15 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_15 == 0xFF
-#define CONF_DMAC_SWREQ_15 1
-#else
-#define CONF_DMAC_SWREQ_15 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_15_SETTINGS == 1 && CONF_DMAC_BEATSIZE_15 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_15) || (!CONF_DMAC_DSTINC_15)))
-#if (!CONF_DMAC_SRCINC_15)
-#define CONF_DMAC_SRC_STRIDE_15 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_15)
-#define CONF_DMAC_DES_STRIDE_15 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_15
-#define CONF_DMAC_SRC_STRIDE_15 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_15
-#define CONF_DMAC_DES_STRIDE_15 0
-#endif
-
-// <e> Channel 16 settings
-// <id> dmac_channel_16_settings
-#ifndef CONF_DMAC_CHANNEL_16_SETTINGS
-#define CONF_DMAC_CHANNEL_16_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_16
-#ifndef CONF_DMAC_BURSTSIZE_16
-#define CONF_DMAC_BURSTSIZE_16 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_16
-#ifndef CONF_DMAC_CHUNKSIZE_16
-#define CONF_DMAC_CHUNKSIZE_16 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_16
-#ifndef CONF_DMAC_BEATSIZE_16
-#define CONF_DMAC_BEATSIZE_16 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_16
-#ifndef CONF_DMAC_SRC_INTERFACE_16
-#define CONF_DMAC_SRC_INTERFACE_16 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_16
-#ifndef CONF_DMAC_DES_INTERFACE_16
-#define CONF_DMAC_DES_INTERFACE_16 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_16
-#ifndef CONF_DMAC_SRCINC_16
-#define CONF_DMAC_SRCINC_16 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_16
-#ifndef CONF_DMAC_DSTINC_16
-#define CONF_DMAC_DSTINC_16 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_16
-#ifndef CONF_DMAC_TRANS_TYPE_16
-#define CONF_DMAC_TRANS_TYPE_16 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_16
-#ifndef CONF_DMAC_TRIGSRC_16
-#define CONF_DMAC_TRIGSRC_16 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_16 == 0
-#define CONF_DMAC_TYPE_16 0
-#define CONF_DMAC_DSYNC_16 0
-#elif CONF_DMAC_TRANS_TYPE_16 == 1
-#define CONF_DMAC_TYPE_16 1
-#define CONF_DMAC_DSYNC_16 0
-#elif CONF_DMAC_TRANS_TYPE_16 == 2
-#define CONF_DMAC_TYPE_16 1
-#define CONF_DMAC_DSYNC_16 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_16 == 0xFF
-#define CONF_DMAC_SWREQ_16 1
-#else
-#define CONF_DMAC_SWREQ_16 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_16_SETTINGS == 1 && CONF_DMAC_BEATSIZE_16 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_16) || (!CONF_DMAC_DSTINC_16)))
-#if (!CONF_DMAC_SRCINC_16)
-#define CONF_DMAC_SRC_STRIDE_16 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_16)
-#define CONF_DMAC_DES_STRIDE_16 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_16
-#define CONF_DMAC_SRC_STRIDE_16 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_16
-#define CONF_DMAC_DES_STRIDE_16 0
-#endif
-
-// <e> Channel 17 settings
-// <id> dmac_channel_17_settings
-#ifndef CONF_DMAC_CHANNEL_17_SETTINGS
-#define CONF_DMAC_CHANNEL_17_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_17
-#ifndef CONF_DMAC_BURSTSIZE_17
-#define CONF_DMAC_BURSTSIZE_17 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_17
-#ifndef CONF_DMAC_CHUNKSIZE_17
-#define CONF_DMAC_CHUNKSIZE_17 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_17
-#ifndef CONF_DMAC_BEATSIZE_17
-#define CONF_DMAC_BEATSIZE_17 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_17
-#ifndef CONF_DMAC_SRC_INTERFACE_17
-#define CONF_DMAC_SRC_INTERFACE_17 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_17
-#ifndef CONF_DMAC_DES_INTERFACE_17
-#define CONF_DMAC_DES_INTERFACE_17 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_17
-#ifndef CONF_DMAC_SRCINC_17
-#define CONF_DMAC_SRCINC_17 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_17
-#ifndef CONF_DMAC_DSTINC_17
-#define CONF_DMAC_DSTINC_17 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_17
-#ifndef CONF_DMAC_TRANS_TYPE_17
-#define CONF_DMAC_TRANS_TYPE_17 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_17
-#ifndef CONF_DMAC_TRIGSRC_17
-#define CONF_DMAC_TRIGSRC_17 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_17 == 0
-#define CONF_DMAC_TYPE_17 0
-#define CONF_DMAC_DSYNC_17 0
-#elif CONF_DMAC_TRANS_TYPE_17 == 1
-#define CONF_DMAC_TYPE_17 1
-#define CONF_DMAC_DSYNC_17 0
-#elif CONF_DMAC_TRANS_TYPE_17 == 2
-#define CONF_DMAC_TYPE_17 1
-#define CONF_DMAC_DSYNC_17 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_17 == 0xFF
-#define CONF_DMAC_SWREQ_17 1
-#else
-#define CONF_DMAC_SWREQ_17 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_17_SETTINGS == 1 && CONF_DMAC_BEATSIZE_17 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_17) || (!CONF_DMAC_DSTINC_17)))
-#if (!CONF_DMAC_SRCINC_17)
-#define CONF_DMAC_SRC_STRIDE_17 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_17)
-#define CONF_DMAC_DES_STRIDE_17 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_17
-#define CONF_DMAC_SRC_STRIDE_17 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_17
-#define CONF_DMAC_DES_STRIDE_17 0
-#endif
-
-// <e> Channel 18 settings
-// <id> dmac_channel_18_settings
-#ifndef CONF_DMAC_CHANNEL_18_SETTINGS
-#define CONF_DMAC_CHANNEL_18_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_18
-#ifndef CONF_DMAC_BURSTSIZE_18
-#define CONF_DMAC_BURSTSIZE_18 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_18
-#ifndef CONF_DMAC_CHUNKSIZE_18
-#define CONF_DMAC_CHUNKSIZE_18 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_18
-#ifndef CONF_DMAC_BEATSIZE_18
-#define CONF_DMAC_BEATSIZE_18 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_18
-#ifndef CONF_DMAC_SRC_INTERFACE_18
-#define CONF_DMAC_SRC_INTERFACE_18 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_18
-#ifndef CONF_DMAC_DES_INTERFACE_18
-#define CONF_DMAC_DES_INTERFACE_18 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_18
-#ifndef CONF_DMAC_SRCINC_18
-#define CONF_DMAC_SRCINC_18 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_18
-#ifndef CONF_DMAC_DSTINC_18
-#define CONF_DMAC_DSTINC_18 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_18
-#ifndef CONF_DMAC_TRANS_TYPE_18
-#define CONF_DMAC_TRANS_TYPE_18 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_18
-#ifndef CONF_DMAC_TRIGSRC_18
-#define CONF_DMAC_TRIGSRC_18 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_18 == 0
-#define CONF_DMAC_TYPE_18 0
-#define CONF_DMAC_DSYNC_18 0
-#elif CONF_DMAC_TRANS_TYPE_18 == 1
-#define CONF_DMAC_TYPE_18 1
-#define CONF_DMAC_DSYNC_18 0
-#elif CONF_DMAC_TRANS_TYPE_18 == 2
-#define CONF_DMAC_TYPE_18 1
-#define CONF_DMAC_DSYNC_18 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_18 == 0xFF
-#define CONF_DMAC_SWREQ_18 1
-#else
-#define CONF_DMAC_SWREQ_18 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_18_SETTINGS == 1 && CONF_DMAC_BEATSIZE_18 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_18) || (!CONF_DMAC_DSTINC_18)))
-#if (!CONF_DMAC_SRCINC_18)
-#define CONF_DMAC_SRC_STRIDE_18 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_18)
-#define CONF_DMAC_DES_STRIDE_18 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_18
-#define CONF_DMAC_SRC_STRIDE_18 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_18
-#define CONF_DMAC_DES_STRIDE_18 0
-#endif
-
-// <e> Channel 19 settings
-// <id> dmac_channel_19_settings
-#ifndef CONF_DMAC_CHANNEL_19_SETTINGS
-#define CONF_DMAC_CHANNEL_19_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_19
-#ifndef CONF_DMAC_BURSTSIZE_19
-#define CONF_DMAC_BURSTSIZE_19 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_19
-#ifndef CONF_DMAC_CHUNKSIZE_19
-#define CONF_DMAC_CHUNKSIZE_19 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_19
-#ifndef CONF_DMAC_BEATSIZE_19
-#define CONF_DMAC_BEATSIZE_19 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_19
-#ifndef CONF_DMAC_SRC_INTERFACE_19
-#define CONF_DMAC_SRC_INTERFACE_19 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_19
-#ifndef CONF_DMAC_DES_INTERFACE_19
-#define CONF_DMAC_DES_INTERFACE_19 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_19
-#ifndef CONF_DMAC_SRCINC_19
-#define CONF_DMAC_SRCINC_19 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_19
-#ifndef CONF_DMAC_DSTINC_19
-#define CONF_DMAC_DSTINC_19 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_19
-#ifndef CONF_DMAC_TRANS_TYPE_19
-#define CONF_DMAC_TRANS_TYPE_19 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_19
-#ifndef CONF_DMAC_TRIGSRC_19
-#define CONF_DMAC_TRIGSRC_19 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_19 == 0
-#define CONF_DMAC_TYPE_19 0
-#define CONF_DMAC_DSYNC_19 0
-#elif CONF_DMAC_TRANS_TYPE_19 == 1
-#define CONF_DMAC_TYPE_19 1
-#define CONF_DMAC_DSYNC_19 0
-#elif CONF_DMAC_TRANS_TYPE_19 == 2
-#define CONF_DMAC_TYPE_19 1
-#define CONF_DMAC_DSYNC_19 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_19 == 0xFF
-#define CONF_DMAC_SWREQ_19 1
-#else
-#define CONF_DMAC_SWREQ_19 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_19_SETTINGS == 1 && CONF_DMAC_BEATSIZE_19 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_19) || (!CONF_DMAC_DSTINC_19)))
-#if (!CONF_DMAC_SRCINC_19)
-#define CONF_DMAC_SRC_STRIDE_19 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_19)
-#define CONF_DMAC_DES_STRIDE_19 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_19
-#define CONF_DMAC_SRC_STRIDE_19 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_19
-#define CONF_DMAC_DES_STRIDE_19 0
-#endif
-
-// <e> Channel 20 settings
-// <id> dmac_channel_20_settings
-#ifndef CONF_DMAC_CHANNEL_20_SETTINGS
-#define CONF_DMAC_CHANNEL_20_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_20
-#ifndef CONF_DMAC_BURSTSIZE_20
-#define CONF_DMAC_BURSTSIZE_20 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_20
-#ifndef CONF_DMAC_CHUNKSIZE_20
-#define CONF_DMAC_CHUNKSIZE_20 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_20
-#ifndef CONF_DMAC_BEATSIZE_20
-#define CONF_DMAC_BEATSIZE_20 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_20
-#ifndef CONF_DMAC_SRC_INTERFACE_20
-#define CONF_DMAC_SRC_INTERFACE_20 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_20
-#ifndef CONF_DMAC_DES_INTERFACE_20
-#define CONF_DMAC_DES_INTERFACE_20 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_20
-#ifndef CONF_DMAC_SRCINC_20
-#define CONF_DMAC_SRCINC_20 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_20
-#ifndef CONF_DMAC_DSTINC_20
-#define CONF_DMAC_DSTINC_20 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_20
-#ifndef CONF_DMAC_TRANS_TYPE_20
-#define CONF_DMAC_TRANS_TYPE_20 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_20
-#ifndef CONF_DMAC_TRIGSRC_20
-#define CONF_DMAC_TRIGSRC_20 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_20 == 0
-#define CONF_DMAC_TYPE_20 0
-#define CONF_DMAC_DSYNC_20 0
-#elif CONF_DMAC_TRANS_TYPE_20 == 1
-#define CONF_DMAC_TYPE_20 1
-#define CONF_DMAC_DSYNC_20 0
-#elif CONF_DMAC_TRANS_TYPE_20 == 2
-#define CONF_DMAC_TYPE_20 1
-#define CONF_DMAC_DSYNC_20 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_20 == 0xFF
-#define CONF_DMAC_SWREQ_20 1
-#else
-#define CONF_DMAC_SWREQ_20 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_20_SETTINGS == 1 && CONF_DMAC_BEATSIZE_20 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_20) || (!CONF_DMAC_DSTINC_20)))
-#if (!CONF_DMAC_SRCINC_20)
-#define CONF_DMAC_SRC_STRIDE_20 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_20)
-#define CONF_DMAC_DES_STRIDE_20 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_20
-#define CONF_DMAC_SRC_STRIDE_20 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_20
-#define CONF_DMAC_DES_STRIDE_20 0
-#endif
-
-// <e> Channel 21 settings
-// <id> dmac_channel_21_settings
-#ifndef CONF_DMAC_CHANNEL_21_SETTINGS
-#define CONF_DMAC_CHANNEL_21_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_21
-#ifndef CONF_DMAC_BURSTSIZE_21
-#define CONF_DMAC_BURSTSIZE_21 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_21
-#ifndef CONF_DMAC_CHUNKSIZE_21
-#define CONF_DMAC_CHUNKSIZE_21 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_21
-#ifndef CONF_DMAC_BEATSIZE_21
-#define CONF_DMAC_BEATSIZE_21 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_21
-#ifndef CONF_DMAC_SRC_INTERFACE_21
-#define CONF_DMAC_SRC_INTERFACE_21 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_21
-#ifndef CONF_DMAC_DES_INTERFACE_21
-#define CONF_DMAC_DES_INTERFACE_21 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_21
-#ifndef CONF_DMAC_SRCINC_21
-#define CONF_DMAC_SRCINC_21 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_21
-#ifndef CONF_DMAC_DSTINC_21
-#define CONF_DMAC_DSTINC_21 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_21
-#ifndef CONF_DMAC_TRANS_TYPE_21
-#define CONF_DMAC_TRANS_TYPE_21 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_21
-#ifndef CONF_DMAC_TRIGSRC_21
-#define CONF_DMAC_TRIGSRC_21 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_21 == 0
-#define CONF_DMAC_TYPE_21 0
-#define CONF_DMAC_DSYNC_21 0
-#elif CONF_DMAC_TRANS_TYPE_21 == 1
-#define CONF_DMAC_TYPE_21 1
-#define CONF_DMAC_DSYNC_21 0
-#elif CONF_DMAC_TRANS_TYPE_21 == 2
-#define CONF_DMAC_TYPE_21 1
-#define CONF_DMAC_DSYNC_21 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_21 == 0xFF
-#define CONF_DMAC_SWREQ_21 1
-#else
-#define CONF_DMAC_SWREQ_21 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_21_SETTINGS == 1 && CONF_DMAC_BEATSIZE_21 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_21) || (!CONF_DMAC_DSTINC_21)))
-#if (!CONF_DMAC_SRCINC_21)
-#define CONF_DMAC_SRC_STRIDE_21 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_21)
-#define CONF_DMAC_DES_STRIDE_21 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_21
-#define CONF_DMAC_SRC_STRIDE_21 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_21
-#define CONF_DMAC_DES_STRIDE_21 0
-#endif
-
-// <e> Channel 22 settings
-// <id> dmac_channel_22_settings
-#ifndef CONF_DMAC_CHANNEL_22_SETTINGS
-#define CONF_DMAC_CHANNEL_22_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_22
-#ifndef CONF_DMAC_BURSTSIZE_22
-#define CONF_DMAC_BURSTSIZE_22 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_22
-#ifndef CONF_DMAC_CHUNKSIZE_22
-#define CONF_DMAC_CHUNKSIZE_22 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_22
-#ifndef CONF_DMAC_BEATSIZE_22
-#define CONF_DMAC_BEATSIZE_22 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_22
-#ifndef CONF_DMAC_SRC_INTERFACE_22
-#define CONF_DMAC_SRC_INTERFACE_22 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_22
-#ifndef CONF_DMAC_DES_INTERFACE_22
-#define CONF_DMAC_DES_INTERFACE_22 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_22
-#ifndef CONF_DMAC_SRCINC_22
-#define CONF_DMAC_SRCINC_22 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_22
-#ifndef CONF_DMAC_DSTINC_22
-#define CONF_DMAC_DSTINC_22 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_22
-#ifndef CONF_DMAC_TRANS_TYPE_22
-#define CONF_DMAC_TRANS_TYPE_22 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_22
-#ifndef CONF_DMAC_TRIGSRC_22
-#define CONF_DMAC_TRIGSRC_22 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_22 == 0
-#define CONF_DMAC_TYPE_22 0
-#define CONF_DMAC_DSYNC_22 0
-#elif CONF_DMAC_TRANS_TYPE_22 == 1
-#define CONF_DMAC_TYPE_22 1
-#define CONF_DMAC_DSYNC_22 0
-#elif CONF_DMAC_TRANS_TYPE_22 == 2
-#define CONF_DMAC_TYPE_22 1
-#define CONF_DMAC_DSYNC_22 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_22 == 0xFF
-#define CONF_DMAC_SWREQ_22 1
-#else
-#define CONF_DMAC_SWREQ_22 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_22_SETTINGS == 1 && CONF_DMAC_BEATSIZE_22 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_22) || (!CONF_DMAC_DSTINC_22)))
-#if (!CONF_DMAC_SRCINC_22)
-#define CONF_DMAC_SRC_STRIDE_22 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_22)
-#define CONF_DMAC_DES_STRIDE_22 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_22
-#define CONF_DMAC_SRC_STRIDE_22 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_22
-#define CONF_DMAC_DES_STRIDE_22 0
-#endif
-
-// <e> Channel 23 settings
-// <id> dmac_channel_23_settings
-#ifndef CONF_DMAC_CHANNEL_23_SETTINGS
-#define CONF_DMAC_CHANNEL_23_SETTINGS 0
-#endif
-
-// <o> Burst Size
-// <0x0=> 1 burst size
-// <0x1=> 4 burst size
-// <0x2=> 8 burst size
-// <0x3=> 16 burst size
-// <i> Define the memory burst size
-// <id> dmac_burstsize_23
-#ifndef CONF_DMAC_BURSTSIZE_23
-#define CONF_DMAC_BURSTSIZE_23 0x0
-#endif
-
-// <o> Chunk Size
-// <0x0=> 1 data transferred
-// <0x1=> 2 data transferred
-// <0x2=> 4 data transferred
-// <0x3=> 8 data transferred
-// <0x4=> 16 data transferred
-// <i> Define the peripheral chunk size
-// <id> dmac_chunksize_23
-#ifndef CONF_DMAC_CHUNKSIZE_23
-#define CONF_DMAC_CHUNKSIZE_23 0x0
-#endif
-
-// <o> Beat Size
-// <0=> 8-bit bus transfer
-// <1=> 16-bit bus transfer
-// <2=> 32-bit bus transfer
-// <i> Defines the size of one beat
-// <id> dmac_beatsize_23
-#ifndef CONF_DMAC_BEATSIZE_23
-#define CONF_DMAC_BEATSIZE_23 0x0
-#endif
-
-// <o> Source Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is read through the system bus interface 0 or 1
-// <id> dma_src_interface_23
-#ifndef CONF_DMAC_SRC_INTERFACE_23
-#define CONF_DMAC_SRC_INTERFACE_23 0x0
-#endif
-
-// <o> Destination Interface Identifier
-// <0x0=> AHB_IF0
-// <0x1=> AHB_IF1
-// <i> Define the data is written through the system bus interface 0 or 1
-// <id> dma_des_interface_23
-#ifndef CONF_DMAC_DES_INTERFACE_23
-#define CONF_DMAC_DES_INTERFACE_23 0x0
-#endif
-
-// <q> Source Address Increment
-// <i> Indicates whether the source address incremented as beat size or not
-// <id> dmac_srcinc_23
-#ifndef CONF_DMAC_SRCINC_23
-#define CONF_DMAC_SRCINC_23 0
-#endif
-
-// <q> Destination Address Increment
-// <i> Indicates whether the destination address incremented as beat size or not
-// <id> dmac_dstinc_23
-#ifndef CONF_DMAC_DSTINC_23
-#define CONF_DMAC_DSTINC_23 0
-#endif
-
-// <o> Transfer Type
-// <0x0=> Memory to Memory Transfer
-// <0x1=> Peripheral to Memory Transfer
-// <0x2=> Memory to Peripheral Transfer
-// <i> Define the data transfer type
-// <id> dma_trans_type_23
-#ifndef CONF_DMAC_TRANS_TYPE_23
-#define CONF_DMAC_TRANS_TYPE_23 0x0
-#endif
-
-// <o> Trigger source
-// <0xFF=> Software Trigger
-// <0x00=> HSMCI TX/RX Trigger
-// <0x01=> SPI0 TX Trigger
-// <0x02=> SPI0 RX Trigger
-// <0x03=> SPI1 TX Trigger
-// <0x04=> SPI1 RX Trigger
-// <0x05=> QSPI TX Trigger
-// <0x06=> QSPI RX Trigger
-// <0x07=> USART0 TX Trigger
-// <0x08=> USART0 RX Trigger
-// <0x09=> USART1 TX Trigger
-// <0x0A=> USART1 RX Trigger
-// <0x0B=> USART2 TX Trigger
-// <0x0C=> USART2 RX Trigger
-// <0x0D=> PWM0 TX Trigger
-// <0x0E=> TWIHS0 TX Trigger
-// <0x0F=> TWIHS0 RX Trigger
-// <0x10=> TWIHS1 TX Trigger
-// <0x11=> TWIHS1 RX Trigger
-// <0x12=> TWIHS2 TX Trigger
-// <0x13=> TWIHS2 RX Trigger
-// <0x14=> UART0 TX Trigger
-// <0x15=> UART0 RX Trigger
-// <0x16=> UART1 TX Trigger
-// <0x17=> UART1 RX Trigger
-// <0x18=> UART2 TX Trigger
-// <0x19=> UART2 RX Trigger
-// <0x1A=> UART3 TX Trigger
-// <0x1B=> UART3 RX Trigger
-// <0x1C=> UART4 TX Trigger
-// <0x1D=> UART4 RX Trigger
-// <0x1E=> DACC TX Trigger
-// <0x20=> SSC TX Trigger
-// <0x21=> SSC RX Trigger
-// <0x22=> PIOA RX Trigger
-// <0x23=> AFEC0 RX Trigger
-// <0x24=> AFEC1 RX Trigger
-// <0x25=> AES TX Trigger
-// <0x26=> AES RX Trigger
-// <0x27=> PWM1 TX Trigger
-// <0x28=> TC0 RX Trigger
-// <0x29=> TC3 RX Trigger
-// <0x2A=> TC6 RX Trigger
-// <0x2B=> TC9 RX Trigger
-// <0x2C=> I2SC0 TX Left Trigger
-// <0x2D=> I2SC0 RX Left Trigger
-// <0x2E=> I2SC1 TX Left Trigger
-// <0x2F=> I2SC1 RX Left Trigger
-// <0x30=> I2SC0 TX Right Trigger
-// <0x31=> I2SC0 RX Right Trigger
-// <0x32=> I2SC1 TX Right Trigger
-// <0x33=> I2SC1 RX Right Trigger
-// <i> Define the DMA trigger source
-// <id> dmac_trifsrc_23
-#ifndef CONF_DMAC_TRIGSRC_23
-#define CONF_DMAC_TRIGSRC_23 0xff
-#endif
-
-// </e>
-
-#if CONF_DMAC_TRANS_TYPE_23 == 0
-#define CONF_DMAC_TYPE_23 0
-#define CONF_DMAC_DSYNC_23 0
-#elif CONF_DMAC_TRANS_TYPE_23 == 1
-#define CONF_DMAC_TYPE_23 1
-#define CONF_DMAC_DSYNC_23 0
-#elif CONF_DMAC_TRANS_TYPE_23 == 2
-#define CONF_DMAC_TYPE_23 1
-#define CONF_DMAC_DSYNC_23 1
-#endif
-
-#if CONF_DMAC_TRIGSRC_23 == 0xFF
-#define CONF_DMAC_SWREQ_23 1
-#else
-#define CONF_DMAC_SWREQ_23 0
-#endif
-
-/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
- * or fixed destination address mode, source and destination addresses are incremented
- * by 8-bit or 16-bit.
- * Workaround: The user can fix the problem by setting the source addressing mode to
- * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
- */
-#if (CONF_DMAC_CHANNEL_23_SETTINGS == 1 && CONF_DMAC_BEATSIZE_23 != 2                                                  \
-     && ((!CONF_DMAC_SRCINC_23) || (!CONF_DMAC_DSTINC_23)))
-#if (!CONF_DMAC_SRCINC_23)
-#define CONF_DMAC_SRC_STRIDE_23 ((int16_t)(-1))
-#endif
-#if (!CONF_DMAC_DSTINC_23)
-#define CONF_DMAC_DES_STRIDE_23 ((int16_t)(-1))
-#endif
-#endif
-
-#ifndef CONF_DMAC_SRC_STRIDE_23
-#define CONF_DMAC_SRC_STRIDE_23 0
-#endif
-
-#ifndef CONF_DMAC_DES_STRIDE_23
-#define CONF_DMAC_DES_STRIDE_23 0
-#endif
-
-// </e>
-
-// <<< end of configuration section >>>
-
-#endif // HPL_XDMAC_CONFIG_H
diff --git a/hw/bsp/same70_xplained/peripheral_clk_config.h b/hw/bsp/same70_xplained/peripheral_clk_config.h
deleted file mode 100644
index 84756f5ac..000000000
--- a/hw/bsp/same70_xplained/peripheral_clk_config.h
+++ /dev/null
@@ -1,126 +0,0 @@
-/* Auto-generated config file peripheral_clk_config.h */
-#ifndef PERIPHERAL_CLK_CONFIG_H
-#define PERIPHERAL_CLK_CONFIG_H
-
-// <<< Use Configuration Wizard in Context Menu >>>
-
-/**
- * \def CONF_HCLK_FREQUENCY
- * \brief HCLK's Clock frequency
- */
-#ifndef CONF_HCLK_FREQUENCY
-#define CONF_HCLK_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_FCLK_FREQUENCY
- * \brief FCLK's Clock frequency
- */
-#ifndef CONF_FCLK_FREQUENCY
-#define CONF_FCLK_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_CPU_FREQUENCY
- * \brief CPU's Clock frequency
- */
-#ifndef CONF_CPU_FREQUENCY
-#define CONF_CPU_FREQUENCY 300000000
-#endif
-
-/**
- * \def CONF_SLCK_FREQUENCY
- * \brief Slow Clock frequency
- */
-#define CONF_SLCK_FREQUENCY 0
-
-/**
- * \def CONF_MCK_FREQUENCY
- * \brief Master Clock frequency
- */
-#define CONF_MCK_FREQUENCY 150000000
-
-/**
- * \def CONF_PCK6_FREQUENCY
- * \brief Programmable Clock Controller 6 frequency
- */
-#define CONF_PCK6_FREQUENCY 1714285
-
-// <h> USART Clock Settings
-// <o> USART Clock source
-
-// <0=> Master Clock (MCK)
-// <1=> MCK / 8 for USART
-// <2=> Programmable Clock Controller 4 (PMC_PCK4)
-// <3=> External Clock
-// <i> This defines the clock source for the USART
-// <id> usart_clock_source
-#ifndef CONF_USART1_CK_SRC
-#define CONF_USART1_CK_SRC 0
-#endif
-
-// <o> USART External Clock Input on SCK <1-4294967295>
-// <i> Inputs the external clock frequency on SCK
-// <id> usart_clock_freq
-#ifndef CONF_USART1_SCK_FREQ
-#define CONF_USART1_SCK_FREQ 10000000
-#endif
-
-// </h>
-
-/**
- * \def USART FREQUENCY
- * \brief USART's Clock frequency
- */
-#ifndef CONF_USART1_FREQUENCY
-#define CONF_USART1_FREQUENCY 150000000
-#endif
-
-#ifndef CONF_SRC_USB_480M
-#define CONF_SRC_USB_480M 0
-#endif
-
-#ifndef CONF_SRC_USB_48M
-#define CONF_SRC_USB_48M 1
-#endif
-
-// <y> USB Full/Low Speed Clock
-// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
-// <id> usb_fsls_clock_source
-// <i> 48MHz clock source for low speed and full speed.
-// <i> It must be available when low speed is supported by host driver.
-// <i> It must be available when low power mode is selected.
-#ifndef CONF_USBHS_FSLS_SRC
-#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
-#endif
-
-// <y> USB Clock Source(Normal/Low-power Mode Selection)
-// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
-// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
-// <id> usb_clock_source
-// <i> Select the clock source for USB.
-// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
-// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
-#ifndef CONF_USBHS_SRC
-#define CONF_USBHS_SRC CONF_SRC_USB_480M
-#endif
-
-/**
- * \def CONF_USBHS_FSLS_FREQUENCY
- * \brief USBHS's Full/Low Speed Clock Source frequency
- */
-#ifndef CONF_USBHS_FSLS_FREQUENCY
-#define CONF_USBHS_FSLS_FREQUENCY 48000000
-#endif
-
-/**
- * \def CONF_USBHS_FREQUENCY
- * \brief USBHS's Selected Clock Source frequency
- */
-#ifndef CONF_USBHS_FREQUENCY
-#define CONF_USBHS_FREQUENCY 480000000
-#endif
-
-// <<< end of configuration section >>>
-
-#endif // PERIPHERAL_CLK_CONFIG_H
diff --git a/hw/bsp/same70_xplained/same70_xplained.c b/hw/bsp/same70_xplained/same70_xplained.c
deleted file mode 100644
index f532c6927..000000000
--- a/hw/bsp/same70_xplained/same70_xplained.c
+++ /dev/null
@@ -1,156 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, hathach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- */
-
-#include "sam.h"
-#include "bsp/board_api.h"
-
-#include "peripheral_clk_config.h"
-#include "hpl/usart/hpl_usart_base.h"
-#include "hpl/pmc/hpl_pmc.h"
-#include "hal/include/hal_init.h"
-#include "hal/include/hal_usart_async.h"
-#include "hal/include/hal_gpio.h"
-
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-
-#define LED_PIN               GPIO(GPIO_PORTC, 8)
-
-#define BUTTON_PIN            GPIO(GPIO_PORTA, 11)
-#define BUTTON_STATE_ACTIVE   0
-
-#define UART_TX_PIN           GPIO(GPIO_PORTB, 4)
-#define UART_RX_PIN           GPIO(GPIO_PORTA, 21)
-
-static struct usart_async_descriptor edbg_com;
-static uint8_t edbg_com_buffer[64];
-static volatile bool uart_busy = false;
-
-static void tx_cb_EDBG_COM(const struct usart_async_descriptor *const io_descr)
-{
-  (void) io_descr;
-  uart_busy = false;
-}
-
-//------------- IMPLEMENTATION -------------//
-void board_init(void)
-{
-  init_mcu();
-
-  /* Disable Watchdog */
-  hri_wdt_set_MR_WDDIS_bit(WDT);
-
-  // LED
-  _pmc_enable_periph_clock(ID_PIOC);
-  gpio_set_pin_level(LED_PIN, false);
-  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
-
-  // Button
-  _pmc_enable_periph_clock(ID_PIOA);
-  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(BUTTON_PIN, GPIO_PULL_UP);
-  gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
-
-  // Uart via EDBG Com
-  _pmc_enable_periph_clock(ID_USART1);
-  gpio_set_pin_function(UART_RX_PIN, MUX_PA21A_USART1_RXD1);
-  gpio_set_pin_function(UART_TX_PIN, MUX_PB4D_USART1_TXD1);
-
-  usart_async_init(&edbg_com, USART1, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
-  usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
-  usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_cb_EDBG_COM);
-  usart_async_enable(&edbg_com);
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer (samd SystemCoreClock may not correct)
-  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
-#endif
-
-  // Enable USB clock
-  _pmc_enable_periph_clock(ID_USBHS);
-
-}
-
-//--------------------------------------------------------------------+
-// USB Interrupt Handler
-//--------------------------------------------------------------------+
-void USBHS_Handler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  gpio_set_pin_level(LED_PIN, state);
-}
-
-uint32_t board_button_read(void)
-{
-  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  // while until previous transfer is complete
-  while(uart_busy) {}
-  uart_busy = true;
-
-  io_write(&edbg_com.io, buf, len);
-  return len;
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-// Required by __libc_init_array in startup code if we are compiling using
-// -nostdlib/-nostartfiles.
-void _init(void)
-{
-
-}
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.cmake b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
new file mode 100644
index 000000000..cde4c3da6
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE SAME70N19B)
+set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAME70N19B__
+    )
+endfunction()
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.h b/hw/bsp/same7x/boards/same70_qmtech/board.h
new file mode 100644
index 000000000..09c2c93a9
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.h
@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAME70 QMTech
+   manufacturer: Microchip
+   url: https://www.aliexpress.com/item/1005003173783268.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PIN GPIO(GPIO_PORTA, 15)
+#define LED_STATE_ON 1
+#define LED_PORT_CLOCK ID_PIOB
+
+#define BUTTON_PIN GPIO(GPIO_PORTA, 21)
+#define BUTTON_STATE_ACTIVE 0
+#define BUTTON_PORT_CLOCK ID_PIOA
+
+#define UART_TX_PIN GPIO(GPIO_PORTB, 1)
+#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#define UART_RX_PIN GPIO(GPIO_PORTB, 0)
+#define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
+#define UART_PORT_CLOCK ID_USART1
+#define BOARD_USART USART1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.mk b/hw/bsp/same7x/boards/same70_qmtech/board.mk
new file mode 100644
index 000000000..09ae98860
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.mk
@@ -0,0 +1,3 @@
+CFLAGS += -D__SAME70N19B__
+
+JLINK_DEVICE = SAME70N19B
diff --git a/hw/bsp/same7x/boards/same70_qmtech/hpl_pmc_config.h b/hw/bsp/same7x/boards/same70_qmtech/hpl_pmc_config.h
new file mode 100644
index 000000000..387aaa5df
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/hpl_pmc_config.h
@@ -0,0 +1,1053 @@
+/* Auto-generated config file hpl_pmc_config.h */
+#ifndef HPL_PMC_CONFIG_H
+#define HPL_PMC_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#define CLK_SRC_OPTION_OSC32K 0
+#define CLK_SRC_OPTION_XOSC32K 1
+#define CLK_SRC_OPTION_OSC12M 2
+#define CLK_SRC_OPTION_XOSC20M 3
+
+#define CLK_SRC_OPTION_SLCK 0
+#define CLK_SRC_OPTION_MAINCK 1
+#define CLK_SRC_OPTION_PLLACK 2
+#define CLK_SRC_OPTION_UPLLCKDIV 3
+#define CLK_SRC_OPTION_MCK 4
+
+#define CLK_SRC_OPTION_UPLLCK 3
+
+#define CONF_RC_4M 0
+#define CONF_RC_8M 1
+#define CONF_RC_12M 2
+
+#define CONF_XOSC32K_NO_BYPASS 0
+#define CONF_XOSC32K_BYPASS 1
+
+#define CONF_XOSC20M_NO_BYPASS 0
+#define CONF_XOSC20M_BYPASS 1
+
+// <e> Clock_SLCK configuration
+// <i> Indicates whether SLCK configuration is enabled or not
+// <id> enable_clk_gen_slck
+#ifndef CONF_CLK_SLCK_CONFIG
+#define CONF_CLK_SLCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SLCK source
+
+// <CLK_SRC_OPTION_OSC32K"> 32kHz High Accuracy Internal Oscillator (OSC32K)
+
+// <CLK_SRC_OPTION_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
+
+// <i> This defines the clock source for SLCK
+// <id> clk_gen_slck_oscillator
+#ifndef CONF_CLK_GEN_SLCK_SRC
+#define CONF_CLK_GEN_SLCK_SRC CLK_SRC_OPTION_OSC32K
+#endif
+
+// <q> Enable Clock_SLCK
+// <i> Indicates whether SLCK is enabled or disable
+// <id> clk_gen_slck_arch_enable
+#ifndef CONF_CLK_SLCK_ENABLE
+#define CONF_CLK_SLCK_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_MAINCK configuration
+// <i> Indicates whether MAINCK configuration is enabled or not
+// <id> enable_clk_gen_mainck
+#ifndef CONF_CLK_MAINCK_CONFIG
+#define CONF_CLK_MAINCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MAINCK source
+
+// <CLK_SRC_OPTION_OSC12M"> Embedded 4/8/12MHz RC Oscillator (OSC12M)
+
+// <CLK_SRC_OPTION_XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
+
+// <i> This defines the clock source for MAINCK
+// <id> clk_gen_mainck_oscillator
+#ifndef CONF_CLK_GEN_MAINCK_SRC
+#define CONF_CLK_GEN_MAINCK_SRC CLK_SRC_OPTION_XOSC20M
+#endif
+
+// <q> Enable Clock_MAINCK
+// <i> Indicates whether MAINCK is enabled or disable
+// <id> clk_gen_mainck_arch_enable
+#ifndef CONF_CLK_MAINCK_ENABLE
+#define CONF_CLK_MAINCK_ENABLE 1
+#endif
+
+// <q> Enable Main Clock Failure Detection
+// <i> Indicates whether Main Clock Failure Detection is enabled or disable.
+// <i> The 4/8/12 MHz RC oscillator must be selected as the source of MAINCK.
+// <id> clk_gen_cfden_enable
+#ifndef CONF_CLK_CFDEN_ENABLE
+#define CONF_CLK_CFDEN_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_MCKR configuration
+// <i> Indicates whether MCKR configuration is enabled or not
+// <id> enable_clk_gen_mckr
+#ifndef CONF_CLK_MCKR_CONFIG
+#define CONF_CLK_MCKR_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MCKR source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <i> This defines the clock source for MCKR
+// <id> clk_gen_mckr_oscillator
+#ifndef CONF_CLK_GEN_MCKR_SRC
+#define CONF_CLK_GEN_MCKR_SRC CLK_SRC_OPTION_PLLACK
+#endif
+
+// <q> Enable Clock_MCKR
+// <i> Indicates whether MCKR is enabled or disable
+// <id> clk_gen_mckr_arch_enable
+#ifndef CONF_CLK_MCKR_ENABLE
+#define CONF_CLK_MCKR_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Master Clock Prescaler
+// <0=> 1
+// <1=> 2
+// <2=> 4
+// <3=> 8
+// <4=> 16
+// <5=> 32
+// <6=> 64
+// <7=> 3
+// <i> Select the clock prescaler.
+// <id> mckr_presc
+#ifndef CONF_MCKR_PRESC
+#define CONF_MCKR_PRESC 0
+#endif
+
+// </h>
+// </e>// <e> Clock_MCK configuration
+// <i> Indicates whether MCK configuration is enabled or not
+// <id> enable_clk_gen_mck
+#ifndef CONF_CLK_MCK_CONFIG
+#define CONF_CLK_MCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MCK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for MCK
+// <id> clk_gen_mck_oscillator
+#ifndef CONF_CLK_GEN_MCK_SRC
+#define CONF_CLK_GEN_MCK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+//<o> Master Clock Controller Divider MCK divider
+// <0=> 1
+// <1=> 2
+// <3=> 3
+// <2=> 4
+// <i> Select the master clock divider.
+// <id> mck_div
+#ifndef CONF_MCK_DIV
+#define CONF_MCK_DIV 1
+#endif
+
+// </h>
+// </e>// <e> Clock_SYSTICK configuration
+// <i> Indicates whether SYSTICK configuration is enabled or not
+// <id> enable_clk_gen_systick
+#ifndef CONF_CLK_SYSTICK_CONFIG
+#define CONF_CLK_SYSTICK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SYSTICK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for SYSTICK
+// <id> clk_gen_systick_oscillator
+#ifndef CONF_CLK_GEN_SYSTICK_SRC
+#define CONF_CLK_GEN_SYSTICK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Systick clock divider
+// <8=> 8
+// <i> Select systick clock divider
+// <id> systick_clock_div
+#ifndef CONF_SYSTICK_DIV
+#define CONF_SYSTICK_DIV 8
+#endif
+
+// </h>
+// </e>// <e> Clock_FCLK configuration
+// <i> Indicates whether FCLK configuration is enabled or not
+// <id> enable_clk_gen_fclk
+#ifndef CONF_CLK_FCLK_CONFIG
+#define CONF_CLK_FCLK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator FCLK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for FCLK
+// <id> clk_gen_fclk_oscillator
+#ifndef CONF_CLK_GEN_FCLK_SRC
+#define CONF_CLK_GEN_FCLK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_GCLK0 configuration
+// <i> Indicates whether GCLK0 configuration is enabled or not
+// <id> enable_clk_gen_gclk0
+#ifndef CONF_CLK_GCLK0_CONFIG
+#define CONF_CLK_GCLK0_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator GCLK0 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for GCLK0
+// <id> clk_gen_gclk0_oscillator
+#ifndef CONF_CLK_GEN_GCLK0_SRC
+#define CONF_CLK_GEN_GCLK0_SRC CLK_SRC_OPTION_MCK
+#endif
+
+// <q> Enable Clock_GCLK0
+// <i> Indicates whether GCLK0 is enabled or disable
+// <id> clk_gen_gclk0_arch_enable
+#ifndef CONF_CLK_GCLK0_ENABLE
+#define CONF_CLK_GCLK0_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+// <q> Enable GCLK0 GCLKEN
+// <i> Indicates whether GCLK0 GCLKEN is enabled or disable
+// <id> gclk0_gclken_enable
+#ifndef CONF_GCLK0_GCLKEN_ENABLE
+#define CONF_GCLK0_GCLKEN_ENABLE 0
+#endif
+
+// <o> Generic Clock GCLK0 divider <1-256>
+// <i> Select the clock divider (divider = GCLKDIV + 1).
+// <id> gclk0_div
+#ifndef CONF_GCLK0_DIV
+#define CONF_GCLK0_DIV 2
+#endif
+
+// </h>
+// </e>// <e> Clock_GCLK1 configuration
+// <i> Indicates whether GCLK1 configuration is enabled or not
+// <id> enable_clk_gen_gclk1
+#ifndef CONF_CLK_GCLK1_CONFIG
+#define CONF_CLK_GCLK1_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator GCLK1 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for GCLK1
+// <id> clk_gen_gclk1_oscillator
+#ifndef CONF_CLK_GEN_GCLK1_SRC
+#define CONF_CLK_GEN_GCLK1_SRC CLK_SRC_OPTION_PLLACK
+#endif
+
+// <q> Enable Clock_GCLK1
+// <i> Indicates whether GCLK1 is enabled or disable
+// <id> clk_gen_gclk1_arch_enable
+#ifndef CONF_CLK_GCLK1_ENABLE
+#define CONF_CLK_GCLK1_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+// <q> Enable GCLK1 GCLKEN
+// <i> Indicates whether GCLK1 GCLKEN is enabled or disable
+// <id> gclk1_gclken_enable
+#ifndef CONF_GCLK1_GCLKEN_ENABLE
+#define CONF_GCLK1_GCLKEN_ENABLE 0
+#endif
+
+// <o> Generic Clock GCLK1 divider <1-256>
+// <i> Select the clock divider (divider = GCLKDIV + 1).
+// <id> gclk1_div
+#ifndef CONF_GCLK1_DIV
+#define CONF_GCLK1_DIV 3
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK0 configuration
+// <i> Indicates whether PCK0 configuration is enabled or not
+// <id> enable_clk_gen_pck0
+#ifndef CONF_CLK_PCK0_CONFIG
+#define CONF_CLK_PCK0_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK0 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK0
+// <id> clk_gen_pck0_oscillator
+#ifndef CONF_CLK_GEN_PCK0_SRC
+#define CONF_CLK_GEN_PCK0_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK0
+// <i> Indicates whether PCK0 is enabled or disable
+// <id> clk_gen_pck0_arch_enable
+#ifndef CONF_CLK_PCK0_ENABLE
+#define CONF_CLK_PCK0_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck0_presc
+#ifndef CONF_PCK0_PRESC
+#define CONF_PCK0_PRESC 1
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK1 configuration
+// <i> Indicates whether PCK1 configuration is enabled or not
+// <id> enable_clk_gen_pck1
+#ifndef CONF_CLK_PCK1_CONFIG
+#define CONF_CLK_PCK1_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK1 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK1
+// <id> clk_gen_pck1_oscillator
+#ifndef CONF_CLK_GEN_PCK1_SRC
+#define CONF_CLK_GEN_PCK1_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK1
+// <i> Indicates whether PCK1 is enabled or disable
+// <id> clk_gen_pck1_arch_enable
+#ifndef CONF_CLK_PCK1_ENABLE
+#define CONF_CLK_PCK1_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck1_presc
+#ifndef CONF_PCK1_PRESC
+#define CONF_PCK1_PRESC 2
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK2 configuration
+// <i> Indicates whether PCK2 configuration is enabled or not
+// <id> enable_clk_gen_pck2
+#ifndef CONF_CLK_PCK2_CONFIG
+#define CONF_CLK_PCK2_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK2 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK2
+// <id> clk_gen_pck2_oscillator
+#ifndef CONF_CLK_GEN_PCK2_SRC
+#define CONF_CLK_GEN_PCK2_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK2
+// <i> Indicates whether PCK2 is enabled or disable
+// <id> clk_gen_pck2_arch_enable
+#ifndef CONF_CLK_PCK2_ENABLE
+#define CONF_CLK_PCK2_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck2_presc
+#ifndef CONF_PCK2_PRESC
+#define CONF_PCK2_PRESC 3
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK3 configuration
+// <i> Indicates whether PCK3 configuration is enabled or not
+// <id> enable_clk_gen_pck3
+#ifndef CONF_CLK_PCK3_CONFIG
+#define CONF_CLK_PCK3_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK3 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK3
+// <id> clk_gen_pck3_oscillator
+#ifndef CONF_CLK_GEN_PCK3_SRC
+#define CONF_CLK_GEN_PCK3_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK3
+// <i> Indicates whether PCK3 is enabled or disable
+// <id> clk_gen_pck3_arch_enable
+#ifndef CONF_CLK_PCK3_ENABLE
+#define CONF_CLK_PCK3_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck3_presc
+#ifndef CONF_PCK3_PRESC
+#define CONF_PCK3_PRESC 4
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK4 configuration
+// <i> Indicates whether PCK4 configuration is enabled or not
+// <id> enable_clk_gen_pck4
+#ifndef CONF_CLK_PCK4_CONFIG
+#define CONF_CLK_PCK4_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK4 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK4
+// <id> clk_gen_pck4_oscillator
+#ifndef CONF_CLK_GEN_PCK4_SRC
+#define CONF_CLK_GEN_PCK4_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK4
+// <i> Indicates whether PCK4 is enabled or disable
+// <id> clk_gen_pck4_arch_enable
+#ifndef CONF_CLK_PCK4_ENABLE
+#define CONF_CLK_PCK4_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck4_presc
+#ifndef CONF_PCK4_PRESC
+#define CONF_PCK4_PRESC 5
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK5 configuration
+// <i> Indicates whether PCK5 configuration is enabled or not
+// <id> enable_clk_gen_pck5
+#ifndef CONF_CLK_PCK5_CONFIG
+#define CONF_CLK_PCK5_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK5 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK5
+// <id> clk_gen_pck5_oscillator
+#ifndef CONF_CLK_GEN_PCK5_SRC
+#define CONF_CLK_GEN_PCK5_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK5
+// <i> Indicates whether PCK5 is enabled or disable
+// <id> clk_gen_pck5_arch_enable
+#ifndef CONF_CLK_PCK5_ENABLE
+#define CONF_CLK_PCK5_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck5_presc
+#ifndef CONF_PCK5_PRESC
+#define CONF_PCK5_PRESC 6
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK6 configuration
+// <i> Indicates whether PCK6 configuration is enabled or not
+// <id> enable_clk_gen_pck6
+#ifndef CONF_CLK_PCK6_CONFIG
+#define CONF_CLK_PCK6_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK6 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK6
+// <id> clk_gen_pck6_oscillator
+#ifndef CONF_CLK_GEN_PCK6_SRC
+#define CONF_CLK_GEN_PCK6_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK6
+// <i> Indicates whether PCK6 is enabled or disable
+// <id> clk_gen_pck6_arch_enable
+#ifndef CONF_CLK_PCK6_ENABLE
+#define CONF_CLK_PCK6_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck6_presc
+#ifndef CONF_PCK6_PRESC
+#define CONF_PCK6_PRESC 7
+#endif
+
+// </h>
+// </e>// <e> Clock_USB_480M configuration
+// <i> Indicates whether USB_480M configuration is enabled or not
+// <id> enable_clk_gen_usb_480m
+#ifndef CONF_CLK_USB_480M_CONFIG
+#define CONF_CLK_USB_480M_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator USB_480M source
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <i> This defines the clock source for USB_480M
+// <id> clk_gen_usb_480m_oscillator
+#ifndef CONF_CLK_GEN_USB_480M_SRC
+#define CONF_CLK_GEN_USB_480M_SRC CLK_SRC_OPTION_UPLLCK
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_USB_48M configuration
+// <i> Indicates whether USB_48M configuration is enabled or not
+// <id> enable_clk_gen_usb_48m
+#ifndef CONF_CLK_USB_48M_CONFIG
+#define CONF_CLK_USB_48M_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator USB_48M source
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <i> This defines the clock source for USB_48M
+// <id> clk_gen_usb_48m_oscillator
+#ifndef CONF_CLK_GEN_USB_48M_SRC
+#define CONF_CLK_GEN_USB_48M_SRC CLK_SRC_OPTION_UPLLCKDIV
+#endif
+
+// <q> Enable Clock_USB_48M
+// <i> Indicates whether USB_48M is enabled or disable
+// <id> clk_gen_usb_48m_arch_enable
+#ifndef CONF_CLK_USB_48M_ENABLE
+#define CONF_CLK_USB_48M_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// <o> USB Clock Controller Divider <1-16>
+// <i> Select the USB clock divider (divider = USBDIV + 1).
+// <id> usb_48m_div
+#ifndef CONF_USB_48M_DIV
+#define CONF_USB_48M_DIV 5
+#endif
+
+// </h>
+// </e>// <e> Clock_SLCK2 configuration
+// <i> Indicates whether SLCK2 configuration is enabled or not
+// <id> enable_clk_gen_slck2
+#ifndef CONF_CLK_SLCK2_CONFIG
+#define CONF_CLK_SLCK2_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SLCK2 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <i> This defines the clock source for SLCK2
+// <id> clk_gen_slck2_oscillator
+#ifndef CONF_CLK_GEN_SLCK2_SRC
+#define CONF_CLK_GEN_SLCK2_SRC CLK_SRC_OPTION_SLCK
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>
+
+// <e> System Configuration
+// <i> Indicates whether configuration for system is enabled or not
+// <id> enable_hclk_clock
+#ifndef CONF_SYSTEM_CONFIG
+#define CONF_SYSTEM_CONFIG 1
+#endif
+
+// <h> Processor Clock Settings
+// <y> Processor Clock source
+// <MCKR"> Master Clock Controller (PMC_MCKR)
+// <i> This defines the clock source for the HCLK (Processor clock)
+// <id> hclk_clock_source
+#ifndef CONF_HCLK_SRC
+#define CONF_HCLK_SRC MCKR
+#endif
+
+// <o> Flash Wait State
+// <0=> 1 cycle
+// <1=> 2 cycles
+// <2=> 3 cycles
+// <3=> 4 cycles
+// <4=> 5 cycles
+// <5=> 6 cycles
+// <6=> 7 cycles
+// <i> This field defines the number of wait states for read and write operations.
+// <id> efc_fws
+#ifndef CONF_EFC_WAIT_STATE
+#define CONF_EFC_WAIT_STATE 5
+#endif
+
+// </h>
+// </e>
+
+// <e> SysTick Clock
+// <id> enable_systick_clk_clock
+#ifndef CONF_SYSTICK_CLK_CONFIG
+#define CONF_SYSTICK_CLK_CONFIG 1
+#endif
+
+// <y> SysTick Clock source
+// <MCKR"> Master Clock Controller (PMC_MCKR)
+// <i> This defines the clock source for the SysTick Clock
+// <id> systick_clk_clock_source
+#ifndef CONF_SYSTICK_CLK_SRC
+#define CONF_SYSTICK_CLK_SRC MCKR
+#endif
+
+// <o> SysTick Clock Divider
+// <8=> 8
+// <i> Fixed to 8 if Systick is not using Processor clock
+// <id> systick_clk_clock_div
+#ifndef CONF_SYSTICK_CLK_DIV
+#define CONF_SYSTICK_CLK_DIV 8
+#endif
+
+// </e>
+
+// <e> OSC32K Oscillator Configuration
+// <i> Indicates whether configuration for OSC32K is enabled or not
+// <id> enable_osc32k
+#ifndef CONF_OSC32K_CONFIG
+#define CONF_OSC32K_CONFIG 1
+#endif
+
+// <h> OSC32K Oscillator Control
+// <q> OSC32K Oscillator Enable
+// <i> Indicates whether OSC32K Oscillator is enabled or not
+// <id> osc32k_arch_enable
+#ifndef CONF_OSC32K_ENABLE
+#define CONF_OSC32K_ENABLE 0
+#endif
+// </h>
+// </e>
+
+// <e> XOSC32K Oscillator Configuration
+// <i> Indicates whether configuration for XOSC32K is enabled or not
+// <id> enable_xosc32k
+#ifndef CONF_XOSC32K_CONFIG
+#define CONF_XOSC32K_CONFIG 0
+#endif
+
+// <h> XOSC32K Oscillator Control
+// <y> Oscillator Bypass Select
+// <CONF_XOSC32K_NO_BYPASS"> The 32kHz crystal oscillator is not bypassed.
+// <CONF_XOSC32K_BYPASS"> The 32kHz crystal oscillator is bypassed.
+// <i> Indicates whether XOSC32K is bypassed.
+// <id> xosc32k_bypass
+#ifndef CONF_XOSC32K
+#define CONF_XOSC32K CONF_XOSC32K_NO_BYPASS
+#endif
+
+// <q> XOSC32K Oscillator Enable
+// <i> Indicates whether XOSC32K Oscillator is enabled or not
+// <id> xosc32k_arch_enable
+#ifndef CONF_XOSC32K_ENABLE
+#define CONF_XOSC32K_ENABLE 0
+#endif
+// </h>
+// </e>
+
+// <e> OSC12M Oscillator Configuration
+// <i> Indicates whether configuration for OSC12M is enabled or not
+// <id> enable_osc12m
+#ifndef CONF_OSC12M_CONFIG
+#define CONF_OSC12M_CONFIG 0
+#endif
+
+// <h> OSC12M Oscillator Control
+// <q> OSC12M Oscillator Enable
+// <i> Indicates whether OSC12M Oscillator is enabled or not.
+// <id> osc12m_arch_enable
+#ifndef CONF_OSC12M_ENABLE
+#define CONF_OSC12M_ENABLE 0
+#endif
+
+// <o> OSC12M selector
+//  <0=> 4000000
+//  <1=> 8000000
+//  <2=> 12000000
+// <i> Select the frequency of embedded fast RC oscillator.
+// <id> osc12m_selector
+#ifndef CONF_OSC12M_SELECTOR
+#define CONF_OSC12M_SELECTOR 2
+#endif
+// </h>
+// </e>
+
+// <e> XOSC20M Oscillator Configuration
+// <i> Indicates whether configuration for XOSC20M is enabled or not.
+// <id> enable_xosc20m
+#ifndef CONF_XOSC20M_CONFIG
+#define CONF_XOSC20M_CONFIG 1
+#endif
+
+// <h> XOSC20M Oscillator Control
+// <o> XOSC20M selector <3000000-20000000>
+// <i> Select the frequency of crystal or ceramic resonator oscillator.
+// <id> xosc20m_selector
+#ifndef CONF_XOSC20M_SELECTOR
+#define CONF_XOSC20M_SELECTOR 12000000
+#endif
+
+// <o> Start up time for the external oscillator (ms): <0-256>
+// <i> Select start-up time.
+// <id> xosc20m_startup_time
+#ifndef CONF_XOSC20M_STARTUP_TIME
+#define CONF_XOSC20M_STARTUP_TIME 62
+#endif
+
+// <y> Oscillator Bypass Select
+// <CONF_XOSC20M_NO_BYPASS"> The external crystal oscillator is not bypassed.
+// <CONF_XOSC20M_BYPASS"> The external crystal oscillator is bypassed.
+// <i> Indicates whether XOSC20M is bypassed.
+// <id> xosc20m_bypass
+#ifndef CONF_XOSC20M
+#define CONF_XOSC20M CONF_XOSC20M_NO_BYPASS
+#endif
+
+// <q> XOSC20M Oscillator Enable
+// <i> Indicates whether XOSC20M Oscillator is enabled or not
+// <id> xosc20m_arch_enable
+#ifndef CONF_XOSC20M_ENABLE
+#define CONF_XOSC20M_ENABLE 1
+#endif
+// </h>
+// </e>
+
+// <e> PLLACK Oscillator Configuration
+// <i> Indicates whether configuration for PLLACK is enabled or not
+// <id> enable_pllack
+#ifndef CONF_PLLACK_CONFIG
+#define CONF_PLLACK_CONFIG 1
+#endif
+
+// <y> PLLACK Reference Clock Source
+// <MAINCK"> Main Clock (MAINCK)
+// <i> Select the clock source.
+// <id> pllack_ref_clock
+#ifndef CONF_PLLACK_CLK
+#define CONF_PLLACK_CLK MAINCK
+#endif
+
+// <h> PLLACK Oscillator Control
+// <q> PLLACK Oscillator Enable
+// <i> Indicates whether PLLACK Oscillator is enabled or not
+// <id> pllack_arch_enable
+#ifndef CONF_PLLACK_ENABLE
+#define CONF_PLLACK_ENABLE 1
+#endif
+
+// <o> PLLA Frontend Divider (DIVA)  <1-255>
+// <i> Select the clock divider
+// <id> pllack_div
+#ifndef CONF_PLLACK_DIV
+#define CONF_PLLACK_DIV 1
+#endif
+
+// <o> PLLACK Muliplier <1-62>
+// <i> Indicates PLLA multiplier (multiplier = MULA + 1).
+// <id> pllack_mul
+#ifndef CONF_PLLACK_MUL
+#define CONF_PLLACK_MUL 25
+#endif
+// </h>
+// </e>
+
+// <e> UPLLCK Oscillator Configuration
+// <i> Indicates whether configuration for UPLLCK is enabled or not
+// <id> enable_upllck
+#ifndef CONF_UPLLCK_CONFIG
+#define CONF_UPLLCK_CONFIG 1
+#endif
+
+// <y> UPLLCK Reference Clock Source
+// <XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
+// <i> Select the clock source,only when the input frequency is 12M or 16M, the upllck output is 480M.
+// <id> upllck_ref_clock
+#ifndef CONF_UPLLCK_CLK
+#define CONF_UPLLCK_CLK XOSC20M
+#endif
+
+// <h> UPLLCK Oscillator Control
+// <q> UPLLCK Oscillator Enable
+// <i> Indicates whether UPLLCK Oscillator is enabled or not
+// <id> upllck_arch_enable
+#ifndef CONF_UPLLCK_ENABLE
+#define CONF_UPLLCK_ENABLE 1
+#endif
+// </h>
+// </e>
+
+// <e> UPLLCKDIV Oscillator Configuration
+// <i> Indicates whether configuration for UPLLCKDIV is enabled or not
+// <id> enable_upllckdiv
+#ifndef CONF_UPLLCKDIV_CONFIG
+#define CONF_UPLLCKDIV_CONFIG 1
+#endif
+
+// <y> UPLLCKDIV Reference Clock Source
+// <UPLLCK"> USB 480M Clock (UPLLCK)
+// <i> Select the clock source.
+// <id> upllckdiv_ref_clock
+#ifndef CONF_UPLLCKDIV_CLK
+#define CONF_UPLLCKDIV_CLK UPLLCK
+#endif
+
+// <h> UPLLCKDIV Oscillator Control
+// <o> UPLLCKDIV Clock Divider
+// <0=> 1
+// <1=> 2
+// <i> Select the clock divider.
+// <id> upllckdiv_div
+#ifndef CONF_UPLLCKDIV_DIV
+#define CONF_UPLLCKDIV_DIV 1
+#endif
+// </h>
+// </e>
+
+// <e> MCK/8
+// <id> enable_mck_div_8
+#ifndef CONF_MCK_DIV_8_CONFIG
+#define CONF_MCK_DIV_8_CONFIG 0
+#endif
+
+// <o> MCK/8 Source
+// <0=> Master Clock (MCK)
+// <id> mck_div_8_src
+#ifndef CONF_MCK_DIV_8_SRC
+#define CONF_MCK_DIV_8_SRC 0
+#endif
+// </e>
+
+// <e> External Clock Input Configuration
+// <id> enable_dummy_ext
+#ifndef CONF_DUMMY_EXT_CONFIG
+#define CONF_DUMMY_EXT_CONFIG 1
+#endif
+
+// <o> External Clock Input Source
+// <i> All here are dummy values
+// <i> Refer to the peripherals settings for actual input information
+// <0=> Specific clock input from specific pin
+// <id> dummy_ext_src
+#ifndef CONF_DUMMY_EXT_SRC
+#define CONF_DUMMY_EXT_SRC 0
+#endif
+// </e>
+
+// <e> External Clock Configuration
+// <id> enable_dummy_ext_clk
+#ifndef CONF_DUMMY_EXT_CLK_CONFIG
+#define CONF_DUMMY_EXT_CLK_CONFIG 1
+#endif
+
+// <o> External Clock Source
+// <i> All here are dummy values
+// <i> Refer to the peripherals settings for actual input information
+// <0=> External Clock Input
+// <id> dummy_ext_clk_src
+#ifndef CONF_DUMMY_EXT_CLK_SRC
+#define CONF_DUMMY_EXT_CLK_SRC 0
+#endif
+// </e>
+
+// <<< end of configuration section >>>
+
+#endif // HPL_PMC_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_qmtech/hpl_usart_config.h b/hw/bsp/same7x/boards/same70_qmtech/hpl_usart_config.h
new file mode 100644
index 000000000..50ca3f15c
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/hpl_usart_config.h
@@ -0,0 +1,215 @@
+/* Auto-generated config file hpl_usart_config.h */
+#ifndef HPL_USART_CONFIG_H
+#define HPL_USART_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#ifndef CONF_USART_1_ENABLE
+#define CONF_USART_1_ENABLE 1
+#endif
+
+// <h> Basic Configuration
+
+// <o> Frame parity
+// <0x0=>Even parity
+// <0x1=>Odd parity
+// <0x2=>Parity forced to 0
+// <0x3=>Parity forced to 1
+// <0x4=>No parity
+// <i> Parity bit mode for USART frame
+// <id> usart_parity
+#ifndef CONF_USART_1_PARITY
+#define CONF_USART_1_PARITY 0x4
+#endif
+
+// <o> Character Size
+// <0x0=>5 bits
+// <0x1=>6 bits
+// <0x2=>7 bits
+// <0x3=>8 bits
+// <i> Data character size in USART frame
+// <id> usart_character_size
+#ifndef CONF_USART_1_CHSIZE
+#define CONF_USART_1_CHSIZE 0x3
+#endif
+
+// <o> Stop Bit
+// <0=>1 stop bit
+// <1=>1.5 stop bits
+// <2=>2 stop bits
+// <i> Number of stop bits in USART frame
+// <id> usart_stop_bit
+#ifndef CONF_USART_1_SBMODE
+#define CONF_USART_1_SBMODE 0
+#endif
+
+// <o> Clock Output Select
+// <0=>The USART does not drive the SCK pin
+// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
+// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
+// <id> usart_clock_output_select
+#ifndef CONF_USART_1_CLKO
+#define CONF_USART_1_CLKO 0
+#endif
+
+// <o> Baud rate <1-3000000>
+// <i> USART baud rate setting
+// <id> usart_baud_rate
+#ifndef CONF_USART_1_BAUD
+#define CONF_USART_1_BAUD 9600
+#endif
+
+// </h>
+
+// <e> Advanced configuration
+// <id> usart_advanced
+#ifndef CONF_USART_1_ADVANCED_CONFIG
+#define CONF_USART_1_ADVANCED_CONFIG 0
+#endif
+
+// <o> Channel Mode
+// <0=>Normal Mode
+// <1=>Automatic Echo
+// <2=>Local Loopback
+// <3=>Remote Loopback
+// <i> Channel mode in USART frame
+// <id> usart_channel_mode
+#ifndef CONF_USART_1_CHMODE
+#define CONF_USART_1_CHMODE 0
+#endif
+
+// <q> 9 bits character enable
+// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
+// <id> usart_9bits_enable
+#ifndef CONF_USART_1_MODE9
+#define CONF_USART_1_MODE9 0
+#endif
+
+// <o> Variable Sync
+// <0=>User defined configuration
+// <1=>sync field is updated when a character is written into US_THR
+// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
+// <id> variable_sync
+#ifndef CONF_USART_1_VAR_SYNC
+#define CONF_USART_1_VAR_SYNC 0
+#endif
+
+// <o> Oversampling Mode
+// <0=>16 Oversampling
+// <1=>8 Oversampling
+// <i> Oversampling Mode in UART mode
+// <id> usart__oversampling_mode
+#ifndef CONF_USART_1_OVER
+#define CONF_USART_1_OVER 0
+#endif
+
+// <o> Inhibit Non Ack
+// <0=>The NACK is generated
+// <1=>The NACK is not generated
+// <i> Inhibit Non Acknowledge
+// <id> usart__inack
+#ifndef CONF_USART_1_INACK
+#define CONF_USART_1_INACK 1
+#endif
+
+// <o> Disable Successive NACK
+// <0=>NACK is sent on the ISO line as soon as a parity error occurs
+// <1=>Many parity errors generate a NACK on the ISO line
+// <i> Disable Successive NACK
+// <id> usart_dsnack
+#ifndef CONF_USART_1_DSNACK
+#define CONF_USART_1_DSNACK 0
+#endif
+
+// <o> Inverted Data
+// <0=>Data isn't inverted, nomal mode
+// <1=>Data is inverted
+// <i> Inverted Data
+// <id> usart_invdata
+#ifndef CONF_USART_1_INVDATA
+#define CONF_USART_1_INVDATA 0
+#endif
+
+// <o> Maximum Number of Automatic Iteration <0-7>
+// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
+// <id> usart_max_iteration
+#ifndef CONF_USART_1_MAX_ITERATION
+#define CONF_USART_1_MAX_ITERATION 0
+#endif
+
+// <q> Receive Line Filter enable
+// <i> whether the USART filters the receive line using a three-sample filter
+// <id> usart_receive_filter_enable
+#ifndef CONF_USART_1_FILTER
+#define CONF_USART_1_FILTER 0
+#endif
+
+// <q> Manchester Encoder/Decoder Enable
+// <i> whether the USART Manchester Encoder/Decoder
+// <id> usart_manchester_filter_enable
+#ifndef CONF_USART_1_MAN
+#define CONF_USART_1_MAN 0
+#endif
+
+// <o> Manchester Synchronization Mode
+// <0=>The Manchester start bit is a 0 to 1 transition
+// <1=>The Manchester start bit is a 1 to 0 transition
+// <i> Manchester Synchronization Mode
+// <id> usart_manchester_synchronization_mode
+#ifndef CONF_USART_1_MODSYNC
+#define CONF_USART_1_MODSYNC 0
+#endif
+
+// <o> Start Frame Delimiter Selector
+// <0=>Start frame delimiter is COMMAND or DATA SYNC
+// <1=>Start frame delimiter is one bit
+// <i> Start Frame Delimiter Selector
+// <id> usart_start_frame_delimiter
+#ifndef CONF_USART_1_ONEBIT
+#define CONF_USART_1_ONEBIT 0
+#endif
+
+// <o> Fractional Part <0-7>
+// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
+// <id> usart_arch_fractional
+#ifndef CONF_USART_1_FRACTIONAL
+#define CONF_USART_1_FRACTIONAL 0x0
+#endif
+
+// <o> Data Order
+// <0=>LSB is transmitted first
+// <1=>MSB is transmitted first
+// <i> Data order of the data bits in the frame
+// <id> usart_arch_msbf
+#ifndef CONF_USART_1_MSBF
+#define CONF_USART_1_MSBF 0
+#endif
+
+// </e>
+
+#define CONF_USART_1_MODE 0x0
+
+// Calculate BAUD register value in UART mode
+#if CONF_USART1_CK_SRC < 3
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP                                                                                           \
+	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
+#endif
+#elif CONF_USART1_CK_SRC == 3
+// No division is active. The value written in US_BRGR has no effect.
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD 1
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP 1
+#endif
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // HPL_USART_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_qmtech/hpl_xdmac_config.h b/hw/bsp/same7x/boards/same70_qmtech/hpl_xdmac_config.h
new file mode 100644
index 000000000..a3d62c6fc
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/hpl_xdmac_config.h
@@ -0,0 +1,4400 @@
+/* Auto-generated config file hpl_xdmac_config.h */
+#ifndef HPL_XDMAC_CONFIG_H
+#define HPL_XDMAC_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+// <e> XDMAC enable
+// <i> Indicates whether xdmac is enabled or not
+// <id> xdmac_enable
+#ifndef CONF_DMA_ENABLE
+#define CONF_DMA_ENABLE 0
+#endif
+
+// <e> Channel 0 settings
+// <id> dmac_channel_0_settings
+#ifndef CONF_DMAC_CHANNEL_0_SETTINGS
+#define CONF_DMAC_CHANNEL_0_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_0
+#ifndef CONF_DMAC_BURSTSIZE_0
+#define CONF_DMAC_BURSTSIZE_0 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_0
+#ifndef CONF_DMAC_CHUNKSIZE_0
+#define CONF_DMAC_CHUNKSIZE_0 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_0
+#ifndef CONF_DMAC_BEATSIZE_0
+#define CONF_DMAC_BEATSIZE_0 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_0
+#ifndef CONF_DMAC_SRC_INTERFACE_0
+#define CONF_DMAC_SRC_INTERFACE_0 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_0
+#ifndef CONF_DMAC_DES_INTERFACE_0
+#define CONF_DMAC_DES_INTERFACE_0 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_0
+#ifndef CONF_DMAC_SRCINC_0
+#define CONF_DMAC_SRCINC_0 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_0
+#ifndef CONF_DMAC_DSTINC_0
+#define CONF_DMAC_DSTINC_0 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_0
+#ifndef CONF_DMAC_TRANS_TYPE_0
+#define CONF_DMAC_TRANS_TYPE_0 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_0
+#ifndef CONF_DMAC_TRIGSRC_0
+#define CONF_DMAC_TRIGSRC_0 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_0 == 0
+#define CONF_DMAC_TYPE_0 0
+#define CONF_DMAC_DSYNC_0 0
+#elif CONF_DMAC_TRANS_TYPE_0 == 1
+#define CONF_DMAC_TYPE_0 1
+#define CONF_DMAC_DSYNC_0 0
+#elif CONF_DMAC_TRANS_TYPE_0 == 2
+#define CONF_DMAC_TYPE_0 1
+#define CONF_DMAC_DSYNC_0 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_0 == 0xFF
+#define CONF_DMAC_SWREQ_0 1
+#else
+#define CONF_DMAC_SWREQ_0 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_0_SETTINGS == 1 && CONF_DMAC_BEATSIZE_0 != 2 && ((!CONF_DMAC_SRCINC_0) || (!CONF_DMAC_DSTINC_0)))
+#if (!CONF_DMAC_SRCINC_0)
+#define CONF_DMAC_SRC_STRIDE_0 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_0)
+#define CONF_DMAC_DES_STRIDE_0 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_0
+#define CONF_DMAC_SRC_STRIDE_0 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_0
+#define CONF_DMAC_DES_STRIDE_0 0
+#endif
+
+// <e> Channel 1 settings
+// <id> dmac_channel_1_settings
+#ifndef CONF_DMAC_CHANNEL_1_SETTINGS
+#define CONF_DMAC_CHANNEL_1_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_1
+#ifndef CONF_DMAC_BURSTSIZE_1
+#define CONF_DMAC_BURSTSIZE_1 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_1
+#ifndef CONF_DMAC_CHUNKSIZE_1
+#define CONF_DMAC_CHUNKSIZE_1 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_1
+#ifndef CONF_DMAC_BEATSIZE_1
+#define CONF_DMAC_BEATSIZE_1 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_1
+#ifndef CONF_DMAC_SRC_INTERFACE_1
+#define CONF_DMAC_SRC_INTERFACE_1 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_1
+#ifndef CONF_DMAC_DES_INTERFACE_1
+#define CONF_DMAC_DES_INTERFACE_1 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_1
+#ifndef CONF_DMAC_SRCINC_1
+#define CONF_DMAC_SRCINC_1 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_1
+#ifndef CONF_DMAC_DSTINC_1
+#define CONF_DMAC_DSTINC_1 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_1
+#ifndef CONF_DMAC_TRANS_TYPE_1
+#define CONF_DMAC_TRANS_TYPE_1 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_1
+#ifndef CONF_DMAC_TRIGSRC_1
+#define CONF_DMAC_TRIGSRC_1 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_1 == 0
+#define CONF_DMAC_TYPE_1 0
+#define CONF_DMAC_DSYNC_1 0
+#elif CONF_DMAC_TRANS_TYPE_1 == 1
+#define CONF_DMAC_TYPE_1 1
+#define CONF_DMAC_DSYNC_1 0
+#elif CONF_DMAC_TRANS_TYPE_1 == 2
+#define CONF_DMAC_TYPE_1 1
+#define CONF_DMAC_DSYNC_1 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_1 == 0xFF
+#define CONF_DMAC_SWREQ_1 1
+#else
+#define CONF_DMAC_SWREQ_1 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_1_SETTINGS == 1 && CONF_DMAC_BEATSIZE_1 != 2 && ((!CONF_DMAC_SRCINC_1) || (!CONF_DMAC_DSTINC_1)))
+#if (!CONF_DMAC_SRCINC_1)
+#define CONF_DMAC_SRC_STRIDE_1 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_1)
+#define CONF_DMAC_DES_STRIDE_1 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_1
+#define CONF_DMAC_SRC_STRIDE_1 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_1
+#define CONF_DMAC_DES_STRIDE_1 0
+#endif
+
+// <e> Channel 2 settings
+// <id> dmac_channel_2_settings
+#ifndef CONF_DMAC_CHANNEL_2_SETTINGS
+#define CONF_DMAC_CHANNEL_2_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_2
+#ifndef CONF_DMAC_BURSTSIZE_2
+#define CONF_DMAC_BURSTSIZE_2 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_2
+#ifndef CONF_DMAC_CHUNKSIZE_2
+#define CONF_DMAC_CHUNKSIZE_2 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_2
+#ifndef CONF_DMAC_BEATSIZE_2
+#define CONF_DMAC_BEATSIZE_2 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_2
+#ifndef CONF_DMAC_SRC_INTERFACE_2
+#define CONF_DMAC_SRC_INTERFACE_2 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_2
+#ifndef CONF_DMAC_DES_INTERFACE_2
+#define CONF_DMAC_DES_INTERFACE_2 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_2
+#ifndef CONF_DMAC_SRCINC_2
+#define CONF_DMAC_SRCINC_2 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_2
+#ifndef CONF_DMAC_DSTINC_2
+#define CONF_DMAC_DSTINC_2 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_2
+#ifndef CONF_DMAC_TRANS_TYPE_2
+#define CONF_DMAC_TRANS_TYPE_2 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_2
+#ifndef CONF_DMAC_TRIGSRC_2
+#define CONF_DMAC_TRIGSRC_2 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_2 == 0
+#define CONF_DMAC_TYPE_2 0
+#define CONF_DMAC_DSYNC_2 0
+#elif CONF_DMAC_TRANS_TYPE_2 == 1
+#define CONF_DMAC_TYPE_2 1
+#define CONF_DMAC_DSYNC_2 0
+#elif CONF_DMAC_TRANS_TYPE_2 == 2
+#define CONF_DMAC_TYPE_2 1
+#define CONF_DMAC_DSYNC_2 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_2 == 0xFF
+#define CONF_DMAC_SWREQ_2 1
+#else
+#define CONF_DMAC_SWREQ_2 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_2_SETTINGS == 1 && CONF_DMAC_BEATSIZE_2 != 2 && ((!CONF_DMAC_SRCINC_2) || (!CONF_DMAC_DSTINC_2)))
+#if (!CONF_DMAC_SRCINC_2)
+#define CONF_DMAC_SRC_STRIDE_2 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_2)
+#define CONF_DMAC_DES_STRIDE_2 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_2
+#define CONF_DMAC_SRC_STRIDE_2 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_2
+#define CONF_DMAC_DES_STRIDE_2 0
+#endif
+
+// <e> Channel 3 settings
+// <id> dmac_channel_3_settings
+#ifndef CONF_DMAC_CHANNEL_3_SETTINGS
+#define CONF_DMAC_CHANNEL_3_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_3
+#ifndef CONF_DMAC_BURSTSIZE_3
+#define CONF_DMAC_BURSTSIZE_3 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_3
+#ifndef CONF_DMAC_CHUNKSIZE_3
+#define CONF_DMAC_CHUNKSIZE_3 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_3
+#ifndef CONF_DMAC_BEATSIZE_3
+#define CONF_DMAC_BEATSIZE_3 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_3
+#ifndef CONF_DMAC_SRC_INTERFACE_3
+#define CONF_DMAC_SRC_INTERFACE_3 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_3
+#ifndef CONF_DMAC_DES_INTERFACE_3
+#define CONF_DMAC_DES_INTERFACE_3 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_3
+#ifndef CONF_DMAC_SRCINC_3
+#define CONF_DMAC_SRCINC_3 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_3
+#ifndef CONF_DMAC_DSTINC_3
+#define CONF_DMAC_DSTINC_3 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_3
+#ifndef CONF_DMAC_TRANS_TYPE_3
+#define CONF_DMAC_TRANS_TYPE_3 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_3
+#ifndef CONF_DMAC_TRIGSRC_3
+#define CONF_DMAC_TRIGSRC_3 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_3 == 0
+#define CONF_DMAC_TYPE_3 0
+#define CONF_DMAC_DSYNC_3 0
+#elif CONF_DMAC_TRANS_TYPE_3 == 1
+#define CONF_DMAC_TYPE_3 1
+#define CONF_DMAC_DSYNC_3 0
+#elif CONF_DMAC_TRANS_TYPE_3 == 2
+#define CONF_DMAC_TYPE_3 1
+#define CONF_DMAC_DSYNC_3 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_3 == 0xFF
+#define CONF_DMAC_SWREQ_3 1
+#else
+#define CONF_DMAC_SWREQ_3 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_3_SETTINGS == 1 && CONF_DMAC_BEATSIZE_3 != 2 && ((!CONF_DMAC_SRCINC_3) || (!CONF_DMAC_DSTINC_3)))
+#if (!CONF_DMAC_SRCINC_3)
+#define CONF_DMAC_SRC_STRIDE_3 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_3)
+#define CONF_DMAC_DES_STRIDE_3 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_3
+#define CONF_DMAC_SRC_STRIDE_3 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_3
+#define CONF_DMAC_DES_STRIDE_3 0
+#endif
+
+// <e> Channel 4 settings
+// <id> dmac_channel_4_settings
+#ifndef CONF_DMAC_CHANNEL_4_SETTINGS
+#define CONF_DMAC_CHANNEL_4_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_4
+#ifndef CONF_DMAC_BURSTSIZE_4
+#define CONF_DMAC_BURSTSIZE_4 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_4
+#ifndef CONF_DMAC_CHUNKSIZE_4
+#define CONF_DMAC_CHUNKSIZE_4 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_4
+#ifndef CONF_DMAC_BEATSIZE_4
+#define CONF_DMAC_BEATSIZE_4 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_4
+#ifndef CONF_DMAC_SRC_INTERFACE_4
+#define CONF_DMAC_SRC_INTERFACE_4 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_4
+#ifndef CONF_DMAC_DES_INTERFACE_4
+#define CONF_DMAC_DES_INTERFACE_4 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_4
+#ifndef CONF_DMAC_SRCINC_4
+#define CONF_DMAC_SRCINC_4 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_4
+#ifndef CONF_DMAC_DSTINC_4
+#define CONF_DMAC_DSTINC_4 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_4
+#ifndef CONF_DMAC_TRANS_TYPE_4
+#define CONF_DMAC_TRANS_TYPE_4 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_4
+#ifndef CONF_DMAC_TRIGSRC_4
+#define CONF_DMAC_TRIGSRC_4 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_4 == 0
+#define CONF_DMAC_TYPE_4 0
+#define CONF_DMAC_DSYNC_4 0
+#elif CONF_DMAC_TRANS_TYPE_4 == 1
+#define CONF_DMAC_TYPE_4 1
+#define CONF_DMAC_DSYNC_4 0
+#elif CONF_DMAC_TRANS_TYPE_4 == 2
+#define CONF_DMAC_TYPE_4 1
+#define CONF_DMAC_DSYNC_4 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_4 == 0xFF
+#define CONF_DMAC_SWREQ_4 1
+#else
+#define CONF_DMAC_SWREQ_4 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_4_SETTINGS == 1 && CONF_DMAC_BEATSIZE_4 != 2 && ((!CONF_DMAC_SRCINC_4) || (!CONF_DMAC_DSTINC_4)))
+#if (!CONF_DMAC_SRCINC_4)
+#define CONF_DMAC_SRC_STRIDE_4 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_4)
+#define CONF_DMAC_DES_STRIDE_4 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_4
+#define CONF_DMAC_SRC_STRIDE_4 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_4
+#define CONF_DMAC_DES_STRIDE_4 0
+#endif
+
+// <e> Channel 5 settings
+// <id> dmac_channel_5_settings
+#ifndef CONF_DMAC_CHANNEL_5_SETTINGS
+#define CONF_DMAC_CHANNEL_5_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_5
+#ifndef CONF_DMAC_BURSTSIZE_5
+#define CONF_DMAC_BURSTSIZE_5 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_5
+#ifndef CONF_DMAC_CHUNKSIZE_5
+#define CONF_DMAC_CHUNKSIZE_5 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_5
+#ifndef CONF_DMAC_BEATSIZE_5
+#define CONF_DMAC_BEATSIZE_5 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_5
+#ifndef CONF_DMAC_SRC_INTERFACE_5
+#define CONF_DMAC_SRC_INTERFACE_5 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_5
+#ifndef CONF_DMAC_DES_INTERFACE_5
+#define CONF_DMAC_DES_INTERFACE_5 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_5
+#ifndef CONF_DMAC_SRCINC_5
+#define CONF_DMAC_SRCINC_5 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_5
+#ifndef CONF_DMAC_DSTINC_5
+#define CONF_DMAC_DSTINC_5 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_5
+#ifndef CONF_DMAC_TRANS_TYPE_5
+#define CONF_DMAC_TRANS_TYPE_5 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_5
+#ifndef CONF_DMAC_TRIGSRC_5
+#define CONF_DMAC_TRIGSRC_5 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_5 == 0
+#define CONF_DMAC_TYPE_5 0
+#define CONF_DMAC_DSYNC_5 0
+#elif CONF_DMAC_TRANS_TYPE_5 == 1
+#define CONF_DMAC_TYPE_5 1
+#define CONF_DMAC_DSYNC_5 0
+#elif CONF_DMAC_TRANS_TYPE_5 == 2
+#define CONF_DMAC_TYPE_5 1
+#define CONF_DMAC_DSYNC_5 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_5 == 0xFF
+#define CONF_DMAC_SWREQ_5 1
+#else
+#define CONF_DMAC_SWREQ_5 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_5_SETTINGS == 1 && CONF_DMAC_BEATSIZE_5 != 2 && ((!CONF_DMAC_SRCINC_5) || (!CONF_DMAC_DSTINC_5)))
+#if (!CONF_DMAC_SRCINC_5)
+#define CONF_DMAC_SRC_STRIDE_5 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_5)
+#define CONF_DMAC_DES_STRIDE_5 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_5
+#define CONF_DMAC_SRC_STRIDE_5 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_5
+#define CONF_DMAC_DES_STRIDE_5 0
+#endif
+
+// <e> Channel 6 settings
+// <id> dmac_channel_6_settings
+#ifndef CONF_DMAC_CHANNEL_6_SETTINGS
+#define CONF_DMAC_CHANNEL_6_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_6
+#ifndef CONF_DMAC_BURSTSIZE_6
+#define CONF_DMAC_BURSTSIZE_6 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_6
+#ifndef CONF_DMAC_CHUNKSIZE_6
+#define CONF_DMAC_CHUNKSIZE_6 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_6
+#ifndef CONF_DMAC_BEATSIZE_6
+#define CONF_DMAC_BEATSIZE_6 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_6
+#ifndef CONF_DMAC_SRC_INTERFACE_6
+#define CONF_DMAC_SRC_INTERFACE_6 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_6
+#ifndef CONF_DMAC_DES_INTERFACE_6
+#define CONF_DMAC_DES_INTERFACE_6 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_6
+#ifndef CONF_DMAC_SRCINC_6
+#define CONF_DMAC_SRCINC_6 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_6
+#ifndef CONF_DMAC_DSTINC_6
+#define CONF_DMAC_DSTINC_6 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_6
+#ifndef CONF_DMAC_TRANS_TYPE_6
+#define CONF_DMAC_TRANS_TYPE_6 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_6
+#ifndef CONF_DMAC_TRIGSRC_6
+#define CONF_DMAC_TRIGSRC_6 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_6 == 0
+#define CONF_DMAC_TYPE_6 0
+#define CONF_DMAC_DSYNC_6 0
+#elif CONF_DMAC_TRANS_TYPE_6 == 1
+#define CONF_DMAC_TYPE_6 1
+#define CONF_DMAC_DSYNC_6 0
+#elif CONF_DMAC_TRANS_TYPE_6 == 2
+#define CONF_DMAC_TYPE_6 1
+#define CONF_DMAC_DSYNC_6 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_6 == 0xFF
+#define CONF_DMAC_SWREQ_6 1
+#else
+#define CONF_DMAC_SWREQ_6 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_6_SETTINGS == 1 && CONF_DMAC_BEATSIZE_6 != 2 && ((!CONF_DMAC_SRCINC_6) || (!CONF_DMAC_DSTINC_6)))
+#if (!CONF_DMAC_SRCINC_6)
+#define CONF_DMAC_SRC_STRIDE_6 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_6)
+#define CONF_DMAC_DES_STRIDE_6 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_6
+#define CONF_DMAC_SRC_STRIDE_6 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_6
+#define CONF_DMAC_DES_STRIDE_6 0
+#endif
+
+// <e> Channel 7 settings
+// <id> dmac_channel_7_settings
+#ifndef CONF_DMAC_CHANNEL_7_SETTINGS
+#define CONF_DMAC_CHANNEL_7_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_7
+#ifndef CONF_DMAC_BURSTSIZE_7
+#define CONF_DMAC_BURSTSIZE_7 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_7
+#ifndef CONF_DMAC_CHUNKSIZE_7
+#define CONF_DMAC_CHUNKSIZE_7 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_7
+#ifndef CONF_DMAC_BEATSIZE_7
+#define CONF_DMAC_BEATSIZE_7 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_7
+#ifndef CONF_DMAC_SRC_INTERFACE_7
+#define CONF_DMAC_SRC_INTERFACE_7 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_7
+#ifndef CONF_DMAC_DES_INTERFACE_7
+#define CONF_DMAC_DES_INTERFACE_7 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_7
+#ifndef CONF_DMAC_SRCINC_7
+#define CONF_DMAC_SRCINC_7 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_7
+#ifndef CONF_DMAC_DSTINC_7
+#define CONF_DMAC_DSTINC_7 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_7
+#ifndef CONF_DMAC_TRANS_TYPE_7
+#define CONF_DMAC_TRANS_TYPE_7 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_7
+#ifndef CONF_DMAC_TRIGSRC_7
+#define CONF_DMAC_TRIGSRC_7 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_7 == 0
+#define CONF_DMAC_TYPE_7 0
+#define CONF_DMAC_DSYNC_7 0
+#elif CONF_DMAC_TRANS_TYPE_7 == 1
+#define CONF_DMAC_TYPE_7 1
+#define CONF_DMAC_DSYNC_7 0
+#elif CONF_DMAC_TRANS_TYPE_7 == 2
+#define CONF_DMAC_TYPE_7 1
+#define CONF_DMAC_DSYNC_7 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_7 == 0xFF
+#define CONF_DMAC_SWREQ_7 1
+#else
+#define CONF_DMAC_SWREQ_7 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_7_SETTINGS == 1 && CONF_DMAC_BEATSIZE_7 != 2 && ((!CONF_DMAC_SRCINC_7) || (!CONF_DMAC_DSTINC_7)))
+#if (!CONF_DMAC_SRCINC_7)
+#define CONF_DMAC_SRC_STRIDE_7 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_7)
+#define CONF_DMAC_DES_STRIDE_7 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_7
+#define CONF_DMAC_SRC_STRIDE_7 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_7
+#define CONF_DMAC_DES_STRIDE_7 0
+#endif
+
+// <e> Channel 8 settings
+// <id> dmac_channel_8_settings
+#ifndef CONF_DMAC_CHANNEL_8_SETTINGS
+#define CONF_DMAC_CHANNEL_8_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_8
+#ifndef CONF_DMAC_BURSTSIZE_8
+#define CONF_DMAC_BURSTSIZE_8 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_8
+#ifndef CONF_DMAC_CHUNKSIZE_8
+#define CONF_DMAC_CHUNKSIZE_8 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_8
+#ifndef CONF_DMAC_BEATSIZE_8
+#define CONF_DMAC_BEATSIZE_8 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_8
+#ifndef CONF_DMAC_SRC_INTERFACE_8
+#define CONF_DMAC_SRC_INTERFACE_8 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_8
+#ifndef CONF_DMAC_DES_INTERFACE_8
+#define CONF_DMAC_DES_INTERFACE_8 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_8
+#ifndef CONF_DMAC_SRCINC_8
+#define CONF_DMAC_SRCINC_8 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_8
+#ifndef CONF_DMAC_DSTINC_8
+#define CONF_DMAC_DSTINC_8 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_8
+#ifndef CONF_DMAC_TRANS_TYPE_8
+#define CONF_DMAC_TRANS_TYPE_8 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_8
+#ifndef CONF_DMAC_TRIGSRC_8
+#define CONF_DMAC_TRIGSRC_8 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_8 == 0
+#define CONF_DMAC_TYPE_8 0
+#define CONF_DMAC_DSYNC_8 0
+#elif CONF_DMAC_TRANS_TYPE_8 == 1
+#define CONF_DMAC_TYPE_8 1
+#define CONF_DMAC_DSYNC_8 0
+#elif CONF_DMAC_TRANS_TYPE_8 == 2
+#define CONF_DMAC_TYPE_8 1
+#define CONF_DMAC_DSYNC_8 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_8 == 0xFF
+#define CONF_DMAC_SWREQ_8 1
+#else
+#define CONF_DMAC_SWREQ_8 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_8_SETTINGS == 1 && CONF_DMAC_BEATSIZE_8 != 2 && ((!CONF_DMAC_SRCINC_8) || (!CONF_DMAC_DSTINC_8)))
+#if (!CONF_DMAC_SRCINC_8)
+#define CONF_DMAC_SRC_STRIDE_8 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_8)
+#define CONF_DMAC_DES_STRIDE_8 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_8
+#define CONF_DMAC_SRC_STRIDE_8 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_8
+#define CONF_DMAC_DES_STRIDE_8 0
+#endif
+
+// <e> Channel 9 settings
+// <id> dmac_channel_9_settings
+#ifndef CONF_DMAC_CHANNEL_9_SETTINGS
+#define CONF_DMAC_CHANNEL_9_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_9
+#ifndef CONF_DMAC_BURSTSIZE_9
+#define CONF_DMAC_BURSTSIZE_9 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_9
+#ifndef CONF_DMAC_CHUNKSIZE_9
+#define CONF_DMAC_CHUNKSIZE_9 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_9
+#ifndef CONF_DMAC_BEATSIZE_9
+#define CONF_DMAC_BEATSIZE_9 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_9
+#ifndef CONF_DMAC_SRC_INTERFACE_9
+#define CONF_DMAC_SRC_INTERFACE_9 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_9
+#ifndef CONF_DMAC_DES_INTERFACE_9
+#define CONF_DMAC_DES_INTERFACE_9 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_9
+#ifndef CONF_DMAC_SRCINC_9
+#define CONF_DMAC_SRCINC_9 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_9
+#ifndef CONF_DMAC_DSTINC_9
+#define CONF_DMAC_DSTINC_9 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_9
+#ifndef CONF_DMAC_TRANS_TYPE_9
+#define CONF_DMAC_TRANS_TYPE_9 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_9
+#ifndef CONF_DMAC_TRIGSRC_9
+#define CONF_DMAC_TRIGSRC_9 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_9 == 0
+#define CONF_DMAC_TYPE_9 0
+#define CONF_DMAC_DSYNC_9 0
+#elif CONF_DMAC_TRANS_TYPE_9 == 1
+#define CONF_DMAC_TYPE_9 1
+#define CONF_DMAC_DSYNC_9 0
+#elif CONF_DMAC_TRANS_TYPE_9 == 2
+#define CONF_DMAC_TYPE_9 1
+#define CONF_DMAC_DSYNC_9 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_9 == 0xFF
+#define CONF_DMAC_SWREQ_9 1
+#else
+#define CONF_DMAC_SWREQ_9 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_9_SETTINGS == 1 && CONF_DMAC_BEATSIZE_9 != 2 && ((!CONF_DMAC_SRCINC_9) || (!CONF_DMAC_DSTINC_9)))
+#if (!CONF_DMAC_SRCINC_9)
+#define CONF_DMAC_SRC_STRIDE_9 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_9)
+#define CONF_DMAC_DES_STRIDE_9 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_9
+#define CONF_DMAC_SRC_STRIDE_9 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_9
+#define CONF_DMAC_DES_STRIDE_9 0
+#endif
+
+// <e> Channel 10 settings
+// <id> dmac_channel_10_settings
+#ifndef CONF_DMAC_CHANNEL_10_SETTINGS
+#define CONF_DMAC_CHANNEL_10_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_10
+#ifndef CONF_DMAC_BURSTSIZE_10
+#define CONF_DMAC_BURSTSIZE_10 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_10
+#ifndef CONF_DMAC_CHUNKSIZE_10
+#define CONF_DMAC_CHUNKSIZE_10 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_10
+#ifndef CONF_DMAC_BEATSIZE_10
+#define CONF_DMAC_BEATSIZE_10 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_10
+#ifndef CONF_DMAC_SRC_INTERFACE_10
+#define CONF_DMAC_SRC_INTERFACE_10 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_10
+#ifndef CONF_DMAC_DES_INTERFACE_10
+#define CONF_DMAC_DES_INTERFACE_10 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_10
+#ifndef CONF_DMAC_SRCINC_10
+#define CONF_DMAC_SRCINC_10 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_10
+#ifndef CONF_DMAC_DSTINC_10
+#define CONF_DMAC_DSTINC_10 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_10
+#ifndef CONF_DMAC_TRANS_TYPE_10
+#define CONF_DMAC_TRANS_TYPE_10 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_10
+#ifndef CONF_DMAC_TRIGSRC_10
+#define CONF_DMAC_TRIGSRC_10 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_10 == 0
+#define CONF_DMAC_TYPE_10 0
+#define CONF_DMAC_DSYNC_10 0
+#elif CONF_DMAC_TRANS_TYPE_10 == 1
+#define CONF_DMAC_TYPE_10 1
+#define CONF_DMAC_DSYNC_10 0
+#elif CONF_DMAC_TRANS_TYPE_10 == 2
+#define CONF_DMAC_TYPE_10 1
+#define CONF_DMAC_DSYNC_10 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_10 == 0xFF
+#define CONF_DMAC_SWREQ_10 1
+#else
+#define CONF_DMAC_SWREQ_10 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_10_SETTINGS == 1 && CONF_DMAC_BEATSIZE_10 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_10) || (!CONF_DMAC_DSTINC_10)))
+#if (!CONF_DMAC_SRCINC_10)
+#define CONF_DMAC_SRC_STRIDE_10 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_10)
+#define CONF_DMAC_DES_STRIDE_10 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_10
+#define CONF_DMAC_SRC_STRIDE_10 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_10
+#define CONF_DMAC_DES_STRIDE_10 0
+#endif
+
+// <e> Channel 11 settings
+// <id> dmac_channel_11_settings
+#ifndef CONF_DMAC_CHANNEL_11_SETTINGS
+#define CONF_DMAC_CHANNEL_11_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_11
+#ifndef CONF_DMAC_BURSTSIZE_11
+#define CONF_DMAC_BURSTSIZE_11 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_11
+#ifndef CONF_DMAC_CHUNKSIZE_11
+#define CONF_DMAC_CHUNKSIZE_11 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_11
+#ifndef CONF_DMAC_BEATSIZE_11
+#define CONF_DMAC_BEATSIZE_11 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_11
+#ifndef CONF_DMAC_SRC_INTERFACE_11
+#define CONF_DMAC_SRC_INTERFACE_11 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_11
+#ifndef CONF_DMAC_DES_INTERFACE_11
+#define CONF_DMAC_DES_INTERFACE_11 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_11
+#ifndef CONF_DMAC_SRCINC_11
+#define CONF_DMAC_SRCINC_11 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_11
+#ifndef CONF_DMAC_DSTINC_11
+#define CONF_DMAC_DSTINC_11 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_11
+#ifndef CONF_DMAC_TRANS_TYPE_11
+#define CONF_DMAC_TRANS_TYPE_11 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_11
+#ifndef CONF_DMAC_TRIGSRC_11
+#define CONF_DMAC_TRIGSRC_11 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_11 == 0
+#define CONF_DMAC_TYPE_11 0
+#define CONF_DMAC_DSYNC_11 0
+#elif CONF_DMAC_TRANS_TYPE_11 == 1
+#define CONF_DMAC_TYPE_11 1
+#define CONF_DMAC_DSYNC_11 0
+#elif CONF_DMAC_TRANS_TYPE_11 == 2
+#define CONF_DMAC_TYPE_11 1
+#define CONF_DMAC_DSYNC_11 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_11 == 0xFF
+#define CONF_DMAC_SWREQ_11 1
+#else
+#define CONF_DMAC_SWREQ_11 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_11_SETTINGS == 1 && CONF_DMAC_BEATSIZE_11 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_11) || (!CONF_DMAC_DSTINC_11)))
+#if (!CONF_DMAC_SRCINC_11)
+#define CONF_DMAC_SRC_STRIDE_11 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_11)
+#define CONF_DMAC_DES_STRIDE_11 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_11
+#define CONF_DMAC_SRC_STRIDE_11 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_11
+#define CONF_DMAC_DES_STRIDE_11 0
+#endif
+
+// <e> Channel 12 settings
+// <id> dmac_channel_12_settings
+#ifndef CONF_DMAC_CHANNEL_12_SETTINGS
+#define CONF_DMAC_CHANNEL_12_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_12
+#ifndef CONF_DMAC_BURSTSIZE_12
+#define CONF_DMAC_BURSTSIZE_12 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_12
+#ifndef CONF_DMAC_CHUNKSIZE_12
+#define CONF_DMAC_CHUNKSIZE_12 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_12
+#ifndef CONF_DMAC_BEATSIZE_12
+#define CONF_DMAC_BEATSIZE_12 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_12
+#ifndef CONF_DMAC_SRC_INTERFACE_12
+#define CONF_DMAC_SRC_INTERFACE_12 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_12
+#ifndef CONF_DMAC_DES_INTERFACE_12
+#define CONF_DMAC_DES_INTERFACE_12 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_12
+#ifndef CONF_DMAC_SRCINC_12
+#define CONF_DMAC_SRCINC_12 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_12
+#ifndef CONF_DMAC_DSTINC_12
+#define CONF_DMAC_DSTINC_12 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_12
+#ifndef CONF_DMAC_TRANS_TYPE_12
+#define CONF_DMAC_TRANS_TYPE_12 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_12
+#ifndef CONF_DMAC_TRIGSRC_12
+#define CONF_DMAC_TRIGSRC_12 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_12 == 0
+#define CONF_DMAC_TYPE_12 0
+#define CONF_DMAC_DSYNC_12 0
+#elif CONF_DMAC_TRANS_TYPE_12 == 1
+#define CONF_DMAC_TYPE_12 1
+#define CONF_DMAC_DSYNC_12 0
+#elif CONF_DMAC_TRANS_TYPE_12 == 2
+#define CONF_DMAC_TYPE_12 1
+#define CONF_DMAC_DSYNC_12 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_12 == 0xFF
+#define CONF_DMAC_SWREQ_12 1
+#else
+#define CONF_DMAC_SWREQ_12 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_12_SETTINGS == 1 && CONF_DMAC_BEATSIZE_12 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_12) || (!CONF_DMAC_DSTINC_12)))
+#if (!CONF_DMAC_SRCINC_12)
+#define CONF_DMAC_SRC_STRIDE_12 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_12)
+#define CONF_DMAC_DES_STRIDE_12 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_12
+#define CONF_DMAC_SRC_STRIDE_12 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_12
+#define CONF_DMAC_DES_STRIDE_12 0
+#endif
+
+// <e> Channel 13 settings
+// <id> dmac_channel_13_settings
+#ifndef CONF_DMAC_CHANNEL_13_SETTINGS
+#define CONF_DMAC_CHANNEL_13_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_13
+#ifndef CONF_DMAC_BURSTSIZE_13
+#define CONF_DMAC_BURSTSIZE_13 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_13
+#ifndef CONF_DMAC_CHUNKSIZE_13
+#define CONF_DMAC_CHUNKSIZE_13 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_13
+#ifndef CONF_DMAC_BEATSIZE_13
+#define CONF_DMAC_BEATSIZE_13 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_13
+#ifndef CONF_DMAC_SRC_INTERFACE_13
+#define CONF_DMAC_SRC_INTERFACE_13 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_13
+#ifndef CONF_DMAC_DES_INTERFACE_13
+#define CONF_DMAC_DES_INTERFACE_13 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_13
+#ifndef CONF_DMAC_SRCINC_13
+#define CONF_DMAC_SRCINC_13 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_13
+#ifndef CONF_DMAC_DSTINC_13
+#define CONF_DMAC_DSTINC_13 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_13
+#ifndef CONF_DMAC_TRANS_TYPE_13
+#define CONF_DMAC_TRANS_TYPE_13 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_13
+#ifndef CONF_DMAC_TRIGSRC_13
+#define CONF_DMAC_TRIGSRC_13 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_13 == 0
+#define CONF_DMAC_TYPE_13 0
+#define CONF_DMAC_DSYNC_13 0
+#elif CONF_DMAC_TRANS_TYPE_13 == 1
+#define CONF_DMAC_TYPE_13 1
+#define CONF_DMAC_DSYNC_13 0
+#elif CONF_DMAC_TRANS_TYPE_13 == 2
+#define CONF_DMAC_TYPE_13 1
+#define CONF_DMAC_DSYNC_13 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_13 == 0xFF
+#define CONF_DMAC_SWREQ_13 1
+#else
+#define CONF_DMAC_SWREQ_13 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_13_SETTINGS == 1 && CONF_DMAC_BEATSIZE_13 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_13) || (!CONF_DMAC_DSTINC_13)))
+#if (!CONF_DMAC_SRCINC_13)
+#define CONF_DMAC_SRC_STRIDE_13 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_13)
+#define CONF_DMAC_DES_STRIDE_13 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_13
+#define CONF_DMAC_SRC_STRIDE_13 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_13
+#define CONF_DMAC_DES_STRIDE_13 0
+#endif
+
+// <e> Channel 14 settings
+// <id> dmac_channel_14_settings
+#ifndef CONF_DMAC_CHANNEL_14_SETTINGS
+#define CONF_DMAC_CHANNEL_14_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_14
+#ifndef CONF_DMAC_BURSTSIZE_14
+#define CONF_DMAC_BURSTSIZE_14 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_14
+#ifndef CONF_DMAC_CHUNKSIZE_14
+#define CONF_DMAC_CHUNKSIZE_14 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_14
+#ifndef CONF_DMAC_BEATSIZE_14
+#define CONF_DMAC_BEATSIZE_14 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_14
+#ifndef CONF_DMAC_SRC_INTERFACE_14
+#define CONF_DMAC_SRC_INTERFACE_14 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_14
+#ifndef CONF_DMAC_DES_INTERFACE_14
+#define CONF_DMAC_DES_INTERFACE_14 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_14
+#ifndef CONF_DMAC_SRCINC_14
+#define CONF_DMAC_SRCINC_14 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_14
+#ifndef CONF_DMAC_DSTINC_14
+#define CONF_DMAC_DSTINC_14 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_14
+#ifndef CONF_DMAC_TRANS_TYPE_14
+#define CONF_DMAC_TRANS_TYPE_14 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_14
+#ifndef CONF_DMAC_TRIGSRC_14
+#define CONF_DMAC_TRIGSRC_14 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_14 == 0
+#define CONF_DMAC_TYPE_14 0
+#define CONF_DMAC_DSYNC_14 0
+#elif CONF_DMAC_TRANS_TYPE_14 == 1
+#define CONF_DMAC_TYPE_14 1
+#define CONF_DMAC_DSYNC_14 0
+#elif CONF_DMAC_TRANS_TYPE_14 == 2
+#define CONF_DMAC_TYPE_14 1
+#define CONF_DMAC_DSYNC_14 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_14 == 0xFF
+#define CONF_DMAC_SWREQ_14 1
+#else
+#define CONF_DMAC_SWREQ_14 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_14_SETTINGS == 1 && CONF_DMAC_BEATSIZE_14 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_14) || (!CONF_DMAC_DSTINC_14)))
+#if (!CONF_DMAC_SRCINC_14)
+#define CONF_DMAC_SRC_STRIDE_14 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_14)
+#define CONF_DMAC_DES_STRIDE_14 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_14
+#define CONF_DMAC_SRC_STRIDE_14 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_14
+#define CONF_DMAC_DES_STRIDE_14 0
+#endif
+
+// <e> Channel 15 settings
+// <id> dmac_channel_15_settings
+#ifndef CONF_DMAC_CHANNEL_15_SETTINGS
+#define CONF_DMAC_CHANNEL_15_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_15
+#ifndef CONF_DMAC_BURSTSIZE_15
+#define CONF_DMAC_BURSTSIZE_15 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_15
+#ifndef CONF_DMAC_CHUNKSIZE_15
+#define CONF_DMAC_CHUNKSIZE_15 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_15
+#ifndef CONF_DMAC_BEATSIZE_15
+#define CONF_DMAC_BEATSIZE_15 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_15
+#ifndef CONF_DMAC_SRC_INTERFACE_15
+#define CONF_DMAC_SRC_INTERFACE_15 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_15
+#ifndef CONF_DMAC_DES_INTERFACE_15
+#define CONF_DMAC_DES_INTERFACE_15 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_15
+#ifndef CONF_DMAC_SRCINC_15
+#define CONF_DMAC_SRCINC_15 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_15
+#ifndef CONF_DMAC_DSTINC_15
+#define CONF_DMAC_DSTINC_15 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_15
+#ifndef CONF_DMAC_TRANS_TYPE_15
+#define CONF_DMAC_TRANS_TYPE_15 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_15
+#ifndef CONF_DMAC_TRIGSRC_15
+#define CONF_DMAC_TRIGSRC_15 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_15 == 0
+#define CONF_DMAC_TYPE_15 0
+#define CONF_DMAC_DSYNC_15 0
+#elif CONF_DMAC_TRANS_TYPE_15 == 1
+#define CONF_DMAC_TYPE_15 1
+#define CONF_DMAC_DSYNC_15 0
+#elif CONF_DMAC_TRANS_TYPE_15 == 2
+#define CONF_DMAC_TYPE_15 1
+#define CONF_DMAC_DSYNC_15 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_15 == 0xFF
+#define CONF_DMAC_SWREQ_15 1
+#else
+#define CONF_DMAC_SWREQ_15 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_15_SETTINGS == 1 && CONF_DMAC_BEATSIZE_15 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_15) || (!CONF_DMAC_DSTINC_15)))
+#if (!CONF_DMAC_SRCINC_15)
+#define CONF_DMAC_SRC_STRIDE_15 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_15)
+#define CONF_DMAC_DES_STRIDE_15 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_15
+#define CONF_DMAC_SRC_STRIDE_15 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_15
+#define CONF_DMAC_DES_STRIDE_15 0
+#endif
+
+// <e> Channel 16 settings
+// <id> dmac_channel_16_settings
+#ifndef CONF_DMAC_CHANNEL_16_SETTINGS
+#define CONF_DMAC_CHANNEL_16_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_16
+#ifndef CONF_DMAC_BURSTSIZE_16
+#define CONF_DMAC_BURSTSIZE_16 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_16
+#ifndef CONF_DMAC_CHUNKSIZE_16
+#define CONF_DMAC_CHUNKSIZE_16 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_16
+#ifndef CONF_DMAC_BEATSIZE_16
+#define CONF_DMAC_BEATSIZE_16 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_16
+#ifndef CONF_DMAC_SRC_INTERFACE_16
+#define CONF_DMAC_SRC_INTERFACE_16 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_16
+#ifndef CONF_DMAC_DES_INTERFACE_16
+#define CONF_DMAC_DES_INTERFACE_16 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_16
+#ifndef CONF_DMAC_SRCINC_16
+#define CONF_DMAC_SRCINC_16 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_16
+#ifndef CONF_DMAC_DSTINC_16
+#define CONF_DMAC_DSTINC_16 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_16
+#ifndef CONF_DMAC_TRANS_TYPE_16
+#define CONF_DMAC_TRANS_TYPE_16 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_16
+#ifndef CONF_DMAC_TRIGSRC_16
+#define CONF_DMAC_TRIGSRC_16 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_16 == 0
+#define CONF_DMAC_TYPE_16 0
+#define CONF_DMAC_DSYNC_16 0
+#elif CONF_DMAC_TRANS_TYPE_16 == 1
+#define CONF_DMAC_TYPE_16 1
+#define CONF_DMAC_DSYNC_16 0
+#elif CONF_DMAC_TRANS_TYPE_16 == 2
+#define CONF_DMAC_TYPE_16 1
+#define CONF_DMAC_DSYNC_16 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_16 == 0xFF
+#define CONF_DMAC_SWREQ_16 1
+#else
+#define CONF_DMAC_SWREQ_16 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_16_SETTINGS == 1 && CONF_DMAC_BEATSIZE_16 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_16) || (!CONF_DMAC_DSTINC_16)))
+#if (!CONF_DMAC_SRCINC_16)
+#define CONF_DMAC_SRC_STRIDE_16 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_16)
+#define CONF_DMAC_DES_STRIDE_16 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_16
+#define CONF_DMAC_SRC_STRIDE_16 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_16
+#define CONF_DMAC_DES_STRIDE_16 0
+#endif
+
+// <e> Channel 17 settings
+// <id> dmac_channel_17_settings
+#ifndef CONF_DMAC_CHANNEL_17_SETTINGS
+#define CONF_DMAC_CHANNEL_17_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_17
+#ifndef CONF_DMAC_BURSTSIZE_17
+#define CONF_DMAC_BURSTSIZE_17 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_17
+#ifndef CONF_DMAC_CHUNKSIZE_17
+#define CONF_DMAC_CHUNKSIZE_17 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_17
+#ifndef CONF_DMAC_BEATSIZE_17
+#define CONF_DMAC_BEATSIZE_17 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_17
+#ifndef CONF_DMAC_SRC_INTERFACE_17
+#define CONF_DMAC_SRC_INTERFACE_17 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_17
+#ifndef CONF_DMAC_DES_INTERFACE_17
+#define CONF_DMAC_DES_INTERFACE_17 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_17
+#ifndef CONF_DMAC_SRCINC_17
+#define CONF_DMAC_SRCINC_17 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_17
+#ifndef CONF_DMAC_DSTINC_17
+#define CONF_DMAC_DSTINC_17 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_17
+#ifndef CONF_DMAC_TRANS_TYPE_17
+#define CONF_DMAC_TRANS_TYPE_17 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_17
+#ifndef CONF_DMAC_TRIGSRC_17
+#define CONF_DMAC_TRIGSRC_17 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_17 == 0
+#define CONF_DMAC_TYPE_17 0
+#define CONF_DMAC_DSYNC_17 0
+#elif CONF_DMAC_TRANS_TYPE_17 == 1
+#define CONF_DMAC_TYPE_17 1
+#define CONF_DMAC_DSYNC_17 0
+#elif CONF_DMAC_TRANS_TYPE_17 == 2
+#define CONF_DMAC_TYPE_17 1
+#define CONF_DMAC_DSYNC_17 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_17 == 0xFF
+#define CONF_DMAC_SWREQ_17 1
+#else
+#define CONF_DMAC_SWREQ_17 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_17_SETTINGS == 1 && CONF_DMAC_BEATSIZE_17 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_17) || (!CONF_DMAC_DSTINC_17)))
+#if (!CONF_DMAC_SRCINC_17)
+#define CONF_DMAC_SRC_STRIDE_17 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_17)
+#define CONF_DMAC_DES_STRIDE_17 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_17
+#define CONF_DMAC_SRC_STRIDE_17 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_17
+#define CONF_DMAC_DES_STRIDE_17 0
+#endif
+
+// <e> Channel 18 settings
+// <id> dmac_channel_18_settings
+#ifndef CONF_DMAC_CHANNEL_18_SETTINGS
+#define CONF_DMAC_CHANNEL_18_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_18
+#ifndef CONF_DMAC_BURSTSIZE_18
+#define CONF_DMAC_BURSTSIZE_18 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_18
+#ifndef CONF_DMAC_CHUNKSIZE_18
+#define CONF_DMAC_CHUNKSIZE_18 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_18
+#ifndef CONF_DMAC_BEATSIZE_18
+#define CONF_DMAC_BEATSIZE_18 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_18
+#ifndef CONF_DMAC_SRC_INTERFACE_18
+#define CONF_DMAC_SRC_INTERFACE_18 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_18
+#ifndef CONF_DMAC_DES_INTERFACE_18
+#define CONF_DMAC_DES_INTERFACE_18 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_18
+#ifndef CONF_DMAC_SRCINC_18
+#define CONF_DMAC_SRCINC_18 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_18
+#ifndef CONF_DMAC_DSTINC_18
+#define CONF_DMAC_DSTINC_18 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_18
+#ifndef CONF_DMAC_TRANS_TYPE_18
+#define CONF_DMAC_TRANS_TYPE_18 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_18
+#ifndef CONF_DMAC_TRIGSRC_18
+#define CONF_DMAC_TRIGSRC_18 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_18 == 0
+#define CONF_DMAC_TYPE_18 0
+#define CONF_DMAC_DSYNC_18 0
+#elif CONF_DMAC_TRANS_TYPE_18 == 1
+#define CONF_DMAC_TYPE_18 1
+#define CONF_DMAC_DSYNC_18 0
+#elif CONF_DMAC_TRANS_TYPE_18 == 2
+#define CONF_DMAC_TYPE_18 1
+#define CONF_DMAC_DSYNC_18 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_18 == 0xFF
+#define CONF_DMAC_SWREQ_18 1
+#else
+#define CONF_DMAC_SWREQ_18 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_18_SETTINGS == 1 && CONF_DMAC_BEATSIZE_18 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_18) || (!CONF_DMAC_DSTINC_18)))
+#if (!CONF_DMAC_SRCINC_18)
+#define CONF_DMAC_SRC_STRIDE_18 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_18)
+#define CONF_DMAC_DES_STRIDE_18 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_18
+#define CONF_DMAC_SRC_STRIDE_18 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_18
+#define CONF_DMAC_DES_STRIDE_18 0
+#endif
+
+// <e> Channel 19 settings
+// <id> dmac_channel_19_settings
+#ifndef CONF_DMAC_CHANNEL_19_SETTINGS
+#define CONF_DMAC_CHANNEL_19_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_19
+#ifndef CONF_DMAC_BURSTSIZE_19
+#define CONF_DMAC_BURSTSIZE_19 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_19
+#ifndef CONF_DMAC_CHUNKSIZE_19
+#define CONF_DMAC_CHUNKSIZE_19 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_19
+#ifndef CONF_DMAC_BEATSIZE_19
+#define CONF_DMAC_BEATSIZE_19 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_19
+#ifndef CONF_DMAC_SRC_INTERFACE_19
+#define CONF_DMAC_SRC_INTERFACE_19 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_19
+#ifndef CONF_DMAC_DES_INTERFACE_19
+#define CONF_DMAC_DES_INTERFACE_19 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_19
+#ifndef CONF_DMAC_SRCINC_19
+#define CONF_DMAC_SRCINC_19 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_19
+#ifndef CONF_DMAC_DSTINC_19
+#define CONF_DMAC_DSTINC_19 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_19
+#ifndef CONF_DMAC_TRANS_TYPE_19
+#define CONF_DMAC_TRANS_TYPE_19 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_19
+#ifndef CONF_DMAC_TRIGSRC_19
+#define CONF_DMAC_TRIGSRC_19 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_19 == 0
+#define CONF_DMAC_TYPE_19 0
+#define CONF_DMAC_DSYNC_19 0
+#elif CONF_DMAC_TRANS_TYPE_19 == 1
+#define CONF_DMAC_TYPE_19 1
+#define CONF_DMAC_DSYNC_19 0
+#elif CONF_DMAC_TRANS_TYPE_19 == 2
+#define CONF_DMAC_TYPE_19 1
+#define CONF_DMAC_DSYNC_19 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_19 == 0xFF
+#define CONF_DMAC_SWREQ_19 1
+#else
+#define CONF_DMAC_SWREQ_19 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_19_SETTINGS == 1 && CONF_DMAC_BEATSIZE_19 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_19) || (!CONF_DMAC_DSTINC_19)))
+#if (!CONF_DMAC_SRCINC_19)
+#define CONF_DMAC_SRC_STRIDE_19 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_19)
+#define CONF_DMAC_DES_STRIDE_19 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_19
+#define CONF_DMAC_SRC_STRIDE_19 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_19
+#define CONF_DMAC_DES_STRIDE_19 0
+#endif
+
+// <e> Channel 20 settings
+// <id> dmac_channel_20_settings
+#ifndef CONF_DMAC_CHANNEL_20_SETTINGS
+#define CONF_DMAC_CHANNEL_20_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_20
+#ifndef CONF_DMAC_BURSTSIZE_20
+#define CONF_DMAC_BURSTSIZE_20 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_20
+#ifndef CONF_DMAC_CHUNKSIZE_20
+#define CONF_DMAC_CHUNKSIZE_20 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_20
+#ifndef CONF_DMAC_BEATSIZE_20
+#define CONF_DMAC_BEATSIZE_20 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_20
+#ifndef CONF_DMAC_SRC_INTERFACE_20
+#define CONF_DMAC_SRC_INTERFACE_20 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_20
+#ifndef CONF_DMAC_DES_INTERFACE_20
+#define CONF_DMAC_DES_INTERFACE_20 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_20
+#ifndef CONF_DMAC_SRCINC_20
+#define CONF_DMAC_SRCINC_20 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_20
+#ifndef CONF_DMAC_DSTINC_20
+#define CONF_DMAC_DSTINC_20 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_20
+#ifndef CONF_DMAC_TRANS_TYPE_20
+#define CONF_DMAC_TRANS_TYPE_20 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_20
+#ifndef CONF_DMAC_TRIGSRC_20
+#define CONF_DMAC_TRIGSRC_20 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_20 == 0
+#define CONF_DMAC_TYPE_20 0
+#define CONF_DMAC_DSYNC_20 0
+#elif CONF_DMAC_TRANS_TYPE_20 == 1
+#define CONF_DMAC_TYPE_20 1
+#define CONF_DMAC_DSYNC_20 0
+#elif CONF_DMAC_TRANS_TYPE_20 == 2
+#define CONF_DMAC_TYPE_20 1
+#define CONF_DMAC_DSYNC_20 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_20 == 0xFF
+#define CONF_DMAC_SWREQ_20 1
+#else
+#define CONF_DMAC_SWREQ_20 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_20_SETTINGS == 1 && CONF_DMAC_BEATSIZE_20 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_20) || (!CONF_DMAC_DSTINC_20)))
+#if (!CONF_DMAC_SRCINC_20)
+#define CONF_DMAC_SRC_STRIDE_20 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_20)
+#define CONF_DMAC_DES_STRIDE_20 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_20
+#define CONF_DMAC_SRC_STRIDE_20 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_20
+#define CONF_DMAC_DES_STRIDE_20 0
+#endif
+
+// <e> Channel 21 settings
+// <id> dmac_channel_21_settings
+#ifndef CONF_DMAC_CHANNEL_21_SETTINGS
+#define CONF_DMAC_CHANNEL_21_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_21
+#ifndef CONF_DMAC_BURSTSIZE_21
+#define CONF_DMAC_BURSTSIZE_21 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_21
+#ifndef CONF_DMAC_CHUNKSIZE_21
+#define CONF_DMAC_CHUNKSIZE_21 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_21
+#ifndef CONF_DMAC_BEATSIZE_21
+#define CONF_DMAC_BEATSIZE_21 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_21
+#ifndef CONF_DMAC_SRC_INTERFACE_21
+#define CONF_DMAC_SRC_INTERFACE_21 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_21
+#ifndef CONF_DMAC_DES_INTERFACE_21
+#define CONF_DMAC_DES_INTERFACE_21 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_21
+#ifndef CONF_DMAC_SRCINC_21
+#define CONF_DMAC_SRCINC_21 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_21
+#ifndef CONF_DMAC_DSTINC_21
+#define CONF_DMAC_DSTINC_21 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_21
+#ifndef CONF_DMAC_TRANS_TYPE_21
+#define CONF_DMAC_TRANS_TYPE_21 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_21
+#ifndef CONF_DMAC_TRIGSRC_21
+#define CONF_DMAC_TRIGSRC_21 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_21 == 0
+#define CONF_DMAC_TYPE_21 0
+#define CONF_DMAC_DSYNC_21 0
+#elif CONF_DMAC_TRANS_TYPE_21 == 1
+#define CONF_DMAC_TYPE_21 1
+#define CONF_DMAC_DSYNC_21 0
+#elif CONF_DMAC_TRANS_TYPE_21 == 2
+#define CONF_DMAC_TYPE_21 1
+#define CONF_DMAC_DSYNC_21 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_21 == 0xFF
+#define CONF_DMAC_SWREQ_21 1
+#else
+#define CONF_DMAC_SWREQ_21 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_21_SETTINGS == 1 && CONF_DMAC_BEATSIZE_21 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_21) || (!CONF_DMAC_DSTINC_21)))
+#if (!CONF_DMAC_SRCINC_21)
+#define CONF_DMAC_SRC_STRIDE_21 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_21)
+#define CONF_DMAC_DES_STRIDE_21 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_21
+#define CONF_DMAC_SRC_STRIDE_21 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_21
+#define CONF_DMAC_DES_STRIDE_21 0
+#endif
+
+// <e> Channel 22 settings
+// <id> dmac_channel_22_settings
+#ifndef CONF_DMAC_CHANNEL_22_SETTINGS
+#define CONF_DMAC_CHANNEL_22_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_22
+#ifndef CONF_DMAC_BURSTSIZE_22
+#define CONF_DMAC_BURSTSIZE_22 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_22
+#ifndef CONF_DMAC_CHUNKSIZE_22
+#define CONF_DMAC_CHUNKSIZE_22 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_22
+#ifndef CONF_DMAC_BEATSIZE_22
+#define CONF_DMAC_BEATSIZE_22 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_22
+#ifndef CONF_DMAC_SRC_INTERFACE_22
+#define CONF_DMAC_SRC_INTERFACE_22 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_22
+#ifndef CONF_DMAC_DES_INTERFACE_22
+#define CONF_DMAC_DES_INTERFACE_22 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_22
+#ifndef CONF_DMAC_SRCINC_22
+#define CONF_DMAC_SRCINC_22 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_22
+#ifndef CONF_DMAC_DSTINC_22
+#define CONF_DMAC_DSTINC_22 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_22
+#ifndef CONF_DMAC_TRANS_TYPE_22
+#define CONF_DMAC_TRANS_TYPE_22 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_22
+#ifndef CONF_DMAC_TRIGSRC_22
+#define CONF_DMAC_TRIGSRC_22 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_22 == 0
+#define CONF_DMAC_TYPE_22 0
+#define CONF_DMAC_DSYNC_22 0
+#elif CONF_DMAC_TRANS_TYPE_22 == 1
+#define CONF_DMAC_TYPE_22 1
+#define CONF_DMAC_DSYNC_22 0
+#elif CONF_DMAC_TRANS_TYPE_22 == 2
+#define CONF_DMAC_TYPE_22 1
+#define CONF_DMAC_DSYNC_22 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_22 == 0xFF
+#define CONF_DMAC_SWREQ_22 1
+#else
+#define CONF_DMAC_SWREQ_22 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_22_SETTINGS == 1 && CONF_DMAC_BEATSIZE_22 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_22) || (!CONF_DMAC_DSTINC_22)))
+#if (!CONF_DMAC_SRCINC_22)
+#define CONF_DMAC_SRC_STRIDE_22 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_22)
+#define CONF_DMAC_DES_STRIDE_22 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_22
+#define CONF_DMAC_SRC_STRIDE_22 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_22
+#define CONF_DMAC_DES_STRIDE_22 0
+#endif
+
+// <e> Channel 23 settings
+// <id> dmac_channel_23_settings
+#ifndef CONF_DMAC_CHANNEL_23_SETTINGS
+#define CONF_DMAC_CHANNEL_23_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_23
+#ifndef CONF_DMAC_BURSTSIZE_23
+#define CONF_DMAC_BURSTSIZE_23 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_23
+#ifndef CONF_DMAC_CHUNKSIZE_23
+#define CONF_DMAC_CHUNKSIZE_23 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_23
+#ifndef CONF_DMAC_BEATSIZE_23
+#define CONF_DMAC_BEATSIZE_23 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_23
+#ifndef CONF_DMAC_SRC_INTERFACE_23
+#define CONF_DMAC_SRC_INTERFACE_23 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_23
+#ifndef CONF_DMAC_DES_INTERFACE_23
+#define CONF_DMAC_DES_INTERFACE_23 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_23
+#ifndef CONF_DMAC_SRCINC_23
+#define CONF_DMAC_SRCINC_23 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_23
+#ifndef CONF_DMAC_DSTINC_23
+#define CONF_DMAC_DSTINC_23 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_23
+#ifndef CONF_DMAC_TRANS_TYPE_23
+#define CONF_DMAC_TRANS_TYPE_23 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_23
+#ifndef CONF_DMAC_TRIGSRC_23
+#define CONF_DMAC_TRIGSRC_23 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_23 == 0
+#define CONF_DMAC_TYPE_23 0
+#define CONF_DMAC_DSYNC_23 0
+#elif CONF_DMAC_TRANS_TYPE_23 == 1
+#define CONF_DMAC_TYPE_23 1
+#define CONF_DMAC_DSYNC_23 0
+#elif CONF_DMAC_TRANS_TYPE_23 == 2
+#define CONF_DMAC_TYPE_23 1
+#define CONF_DMAC_DSYNC_23 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_23 == 0xFF
+#define CONF_DMAC_SWREQ_23 1
+#else
+#define CONF_DMAC_SWREQ_23 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_23_SETTINGS == 1 && CONF_DMAC_BEATSIZE_23 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_23) || (!CONF_DMAC_DSTINC_23)))
+#if (!CONF_DMAC_SRCINC_23)
+#define CONF_DMAC_SRC_STRIDE_23 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_23)
+#define CONF_DMAC_DES_STRIDE_23 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_23
+#define CONF_DMAC_SRC_STRIDE_23 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_23
+#define CONF_DMAC_DES_STRIDE_23 0
+#endif
+
+// </e>
+
+// <<< end of configuration section >>>
+
+#endif // HPL_XDMAC_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_qmtech/peripheral_clk_config.h b/hw/bsp/same7x/boards/same70_qmtech/peripheral_clk_config.h
new file mode 100644
index 000000000..84756f5ac
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_qmtech/peripheral_clk_config.h
@@ -0,0 +1,126 @@
+/* Auto-generated config file peripheral_clk_config.h */
+#ifndef PERIPHERAL_CLK_CONFIG_H
+#define PERIPHERAL_CLK_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+/**
+ * \def CONF_HCLK_FREQUENCY
+ * \brief HCLK's Clock frequency
+ */
+#ifndef CONF_HCLK_FREQUENCY
+#define CONF_HCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_FCLK_FREQUENCY
+ * \brief FCLK's Clock frequency
+ */
+#ifndef CONF_FCLK_FREQUENCY
+#define CONF_FCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_CPU_FREQUENCY
+ * \brief CPU's Clock frequency
+ */
+#ifndef CONF_CPU_FREQUENCY
+#define CONF_CPU_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_SLCK_FREQUENCY
+ * \brief Slow Clock frequency
+ */
+#define CONF_SLCK_FREQUENCY 0
+
+/**
+ * \def CONF_MCK_FREQUENCY
+ * \brief Master Clock frequency
+ */
+#define CONF_MCK_FREQUENCY 150000000
+
+/**
+ * \def CONF_PCK6_FREQUENCY
+ * \brief Programmable Clock Controller 6 frequency
+ */
+#define CONF_PCK6_FREQUENCY 1714285
+
+// <h> USART Clock Settings
+// <o> USART Clock source
+
+// <0=> Master Clock (MCK)
+// <1=> MCK / 8 for USART
+// <2=> Programmable Clock Controller 4 (PMC_PCK4)
+// <3=> External Clock
+// <i> This defines the clock source for the USART
+// <id> usart_clock_source
+#ifndef CONF_USART1_CK_SRC
+#define CONF_USART1_CK_SRC 0
+#endif
+
+// <o> USART External Clock Input on SCK <1-4294967295>
+// <i> Inputs the external clock frequency on SCK
+// <id> usart_clock_freq
+#ifndef CONF_USART1_SCK_FREQ
+#define CONF_USART1_SCK_FREQ 10000000
+#endif
+
+// </h>
+
+/**
+ * \def USART FREQUENCY
+ * \brief USART's Clock frequency
+ */
+#ifndef CONF_USART1_FREQUENCY
+#define CONF_USART1_FREQUENCY 150000000
+#endif
+
+#ifndef CONF_SRC_USB_480M
+#define CONF_SRC_USB_480M 0
+#endif
+
+#ifndef CONF_SRC_USB_48M
+#define CONF_SRC_USB_48M 1
+#endif
+
+// <y> USB Full/Low Speed Clock
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_fsls_clock_source
+// <i> 48MHz clock source for low speed and full speed.
+// <i> It must be available when low speed is supported by host driver.
+// <i> It must be available when low power mode is selected.
+#ifndef CONF_USBHS_FSLS_SRC
+#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
+#endif
+
+// <y> USB Clock Source(Normal/Low-power Mode Selection)
+// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_clock_source
+// <i> Select the clock source for USB.
+// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
+// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
+#ifndef CONF_USBHS_SRC
+#define CONF_USBHS_SRC CONF_SRC_USB_480M
+#endif
+
+/**
+ * \def CONF_USBHS_FSLS_FREQUENCY
+ * \brief USBHS's Full/Low Speed Clock Source frequency
+ */
+#ifndef CONF_USBHS_FSLS_FREQUENCY
+#define CONF_USBHS_FSLS_FREQUENCY 48000000
+#endif
+
+/**
+ * \def CONF_USBHS_FREQUENCY
+ * \brief USBHS's Selected Clock Source frequency
+ */
+#ifndef CONF_USBHS_FREQUENCY
+#define CONF_USBHS_FREQUENCY 480000000
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // PERIPHERAL_CLK_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.cmake b/hw/bsp/same7x/boards/same70_xplained/board.cmake
new file mode 100644
index 000000000..b226b6c4f
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/board.cmake
@@ -0,0 +1,8 @@
+set(JLINK_DEVICE SAME70Q21B)
+set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAME70Q21B__
+    )
+endfunction()
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.h b/hw/bsp/same7x/boards/same70_xplained/board.h
new file mode 100644
index 000000000..85e23deb8
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/board.h
@@ -0,0 +1,64 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to do so, subject to the
+ * following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAME70 Xplained
+   manufacturer: Microchip
+   url: https://www.microchip.com/en-us/development-tool/atsame70-xpld
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PIN GPIO(GPIO_PORTC, 8)
+#define LED_STATE_ON 1
+#define LED_PORT_CLOCK ID_PIOC
+
+#define BUTTON_PIN GPIO(GPIO_PORTA, 11)
+#define BUTTON_STATE_ACTIVE 0
+#define BUTTON_PORT_CLOCK ID_PIOA
+
+#define UART_TX_PIN GPIO(GPIO_PORTB, 4)
+#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#define UART_RX_PIN GPIO(GPIO_PORTA, 21)
+#define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
+#define UART_PORT_CLOCK ID_USART1
+#define BOARD_USART USART1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.mk b/hw/bsp/same7x/boards/same70_xplained/board.mk
new file mode 100644
index 000000000..ca23a9be5
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/board.mk
@@ -0,0 +1,3 @@
+CFLAGS += -D__SAME70Q21B__
+
+JLINK_DEVICE = SAME70Q21B
diff --git a/hw/bsp/same7x/boards/same70_xplained/hpl_pmc_config.h b/hw/bsp/same7x/boards/same70_xplained/hpl_pmc_config.h
new file mode 100644
index 000000000..387aaa5df
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/hpl_pmc_config.h
@@ -0,0 +1,1053 @@
+/* Auto-generated config file hpl_pmc_config.h */
+#ifndef HPL_PMC_CONFIG_H
+#define HPL_PMC_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#define CLK_SRC_OPTION_OSC32K 0
+#define CLK_SRC_OPTION_XOSC32K 1
+#define CLK_SRC_OPTION_OSC12M 2
+#define CLK_SRC_OPTION_XOSC20M 3
+
+#define CLK_SRC_OPTION_SLCK 0
+#define CLK_SRC_OPTION_MAINCK 1
+#define CLK_SRC_OPTION_PLLACK 2
+#define CLK_SRC_OPTION_UPLLCKDIV 3
+#define CLK_SRC_OPTION_MCK 4
+
+#define CLK_SRC_OPTION_UPLLCK 3
+
+#define CONF_RC_4M 0
+#define CONF_RC_8M 1
+#define CONF_RC_12M 2
+
+#define CONF_XOSC32K_NO_BYPASS 0
+#define CONF_XOSC32K_BYPASS 1
+
+#define CONF_XOSC20M_NO_BYPASS 0
+#define CONF_XOSC20M_BYPASS 1
+
+// <e> Clock_SLCK configuration
+// <i> Indicates whether SLCK configuration is enabled or not
+// <id> enable_clk_gen_slck
+#ifndef CONF_CLK_SLCK_CONFIG
+#define CONF_CLK_SLCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SLCK source
+
+// <CLK_SRC_OPTION_OSC32K"> 32kHz High Accuracy Internal Oscillator (OSC32K)
+
+// <CLK_SRC_OPTION_XOSC32K"> 32kHz External Crystal Oscillator (XOSC32K)
+
+// <i> This defines the clock source for SLCK
+// <id> clk_gen_slck_oscillator
+#ifndef CONF_CLK_GEN_SLCK_SRC
+#define CONF_CLK_GEN_SLCK_SRC CLK_SRC_OPTION_OSC32K
+#endif
+
+// <q> Enable Clock_SLCK
+// <i> Indicates whether SLCK is enabled or disable
+// <id> clk_gen_slck_arch_enable
+#ifndef CONF_CLK_SLCK_ENABLE
+#define CONF_CLK_SLCK_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_MAINCK configuration
+// <i> Indicates whether MAINCK configuration is enabled or not
+// <id> enable_clk_gen_mainck
+#ifndef CONF_CLK_MAINCK_CONFIG
+#define CONF_CLK_MAINCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MAINCK source
+
+// <CLK_SRC_OPTION_OSC12M"> Embedded 4/8/12MHz RC Oscillator (OSC12M)
+
+// <CLK_SRC_OPTION_XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
+
+// <i> This defines the clock source for MAINCK
+// <id> clk_gen_mainck_oscillator
+#ifndef CONF_CLK_GEN_MAINCK_SRC
+#define CONF_CLK_GEN_MAINCK_SRC CLK_SRC_OPTION_XOSC20M
+#endif
+
+// <q> Enable Clock_MAINCK
+// <i> Indicates whether MAINCK is enabled or disable
+// <id> clk_gen_mainck_arch_enable
+#ifndef CONF_CLK_MAINCK_ENABLE
+#define CONF_CLK_MAINCK_ENABLE 1
+#endif
+
+// <q> Enable Main Clock Failure Detection
+// <i> Indicates whether Main Clock Failure Detection is enabled or disable.
+// <i> The 4/8/12 MHz RC oscillator must be selected as the source of MAINCK.
+// <id> clk_gen_cfden_enable
+#ifndef CONF_CLK_CFDEN_ENABLE
+#define CONF_CLK_CFDEN_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_MCKR configuration
+// <i> Indicates whether MCKR configuration is enabled or not
+// <id> enable_clk_gen_mckr
+#ifndef CONF_CLK_MCKR_CONFIG
+#define CONF_CLK_MCKR_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MCKR source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <i> This defines the clock source for MCKR
+// <id> clk_gen_mckr_oscillator
+#ifndef CONF_CLK_GEN_MCKR_SRC
+#define CONF_CLK_GEN_MCKR_SRC CLK_SRC_OPTION_PLLACK
+#endif
+
+// <q> Enable Clock_MCKR
+// <i> Indicates whether MCKR is enabled or disable
+// <id> clk_gen_mckr_arch_enable
+#ifndef CONF_CLK_MCKR_ENABLE
+#define CONF_CLK_MCKR_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Master Clock Prescaler
+// <0=> 1
+// <1=> 2
+// <2=> 4
+// <3=> 8
+// <4=> 16
+// <5=> 32
+// <6=> 64
+// <7=> 3
+// <i> Select the clock prescaler.
+// <id> mckr_presc
+#ifndef CONF_MCKR_PRESC
+#define CONF_MCKR_PRESC 0
+#endif
+
+// </h>
+// </e>// <e> Clock_MCK configuration
+// <i> Indicates whether MCK configuration is enabled or not
+// <id> enable_clk_gen_mck
+#ifndef CONF_CLK_MCK_CONFIG
+#define CONF_CLK_MCK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator MCK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for MCK
+// <id> clk_gen_mck_oscillator
+#ifndef CONF_CLK_GEN_MCK_SRC
+#define CONF_CLK_GEN_MCK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+//<o> Master Clock Controller Divider MCK divider
+// <0=> 1
+// <1=> 2
+// <3=> 3
+// <2=> 4
+// <i> Select the master clock divider.
+// <id> mck_div
+#ifndef CONF_MCK_DIV
+#define CONF_MCK_DIV 1
+#endif
+
+// </h>
+// </e>// <e> Clock_SYSTICK configuration
+// <i> Indicates whether SYSTICK configuration is enabled or not
+// <id> enable_clk_gen_systick
+#ifndef CONF_CLK_SYSTICK_CONFIG
+#define CONF_CLK_SYSTICK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SYSTICK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for SYSTICK
+// <id> clk_gen_systick_oscillator
+#ifndef CONF_CLK_GEN_SYSTICK_SRC
+#define CONF_CLK_GEN_SYSTICK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Systick clock divider
+// <8=> 8
+// <i> Select systick clock divider
+// <id> systick_clock_div
+#ifndef CONF_SYSTICK_DIV
+#define CONF_SYSTICK_DIV 8
+#endif
+
+// </h>
+// </e>// <e> Clock_FCLK configuration
+// <i> Indicates whether FCLK configuration is enabled or not
+// <id> enable_clk_gen_fclk
+#ifndef CONF_CLK_FCLK_CONFIG
+#define CONF_CLK_FCLK_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator FCLK source
+
+// <CLK_SRC_OPTION_MCKR"> Master Clock Controller (PMC_MCKR)
+
+// <i> This defines the clock source for FCLK
+// <id> clk_gen_fclk_oscillator
+#ifndef CONF_CLK_GEN_FCLK_SRC
+#define CONF_CLK_GEN_FCLK_SRC CLK_SRC_OPTION_MCKR
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_GCLK0 configuration
+// <i> Indicates whether GCLK0 configuration is enabled or not
+// <id> enable_clk_gen_gclk0
+#ifndef CONF_CLK_GCLK0_CONFIG
+#define CONF_CLK_GCLK0_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator GCLK0 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for GCLK0
+// <id> clk_gen_gclk0_oscillator
+#ifndef CONF_CLK_GEN_GCLK0_SRC
+#define CONF_CLK_GEN_GCLK0_SRC CLK_SRC_OPTION_MCK
+#endif
+
+// <q> Enable Clock_GCLK0
+// <i> Indicates whether GCLK0 is enabled or disable
+// <id> clk_gen_gclk0_arch_enable
+#ifndef CONF_CLK_GCLK0_ENABLE
+#define CONF_CLK_GCLK0_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+// <q> Enable GCLK0 GCLKEN
+// <i> Indicates whether GCLK0 GCLKEN is enabled or disable
+// <id> gclk0_gclken_enable
+#ifndef CONF_GCLK0_GCLKEN_ENABLE
+#define CONF_GCLK0_GCLKEN_ENABLE 0
+#endif
+
+// <o> Generic Clock GCLK0 divider <1-256>
+// <i> Select the clock divider (divider = GCLKDIV + 1).
+// <id> gclk0_div
+#ifndef CONF_GCLK0_DIV
+#define CONF_GCLK0_DIV 2
+#endif
+
+// </h>
+// </e>// <e> Clock_GCLK1 configuration
+// <i> Indicates whether GCLK1 configuration is enabled or not
+// <id> enable_clk_gen_gclk1
+#ifndef CONF_CLK_GCLK1_CONFIG
+#define CONF_CLK_GCLK1_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator GCLK1 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for GCLK1
+// <id> clk_gen_gclk1_oscillator
+#ifndef CONF_CLK_GEN_GCLK1_SRC
+#define CONF_CLK_GEN_GCLK1_SRC CLK_SRC_OPTION_PLLACK
+#endif
+
+// <q> Enable Clock_GCLK1
+// <i> Indicates whether GCLK1 is enabled or disable
+// <id> clk_gen_gclk1_arch_enable
+#ifndef CONF_CLK_GCLK1_ENABLE
+#define CONF_CLK_GCLK1_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+// <q> Enable GCLK1 GCLKEN
+// <i> Indicates whether GCLK1 GCLKEN is enabled or disable
+// <id> gclk1_gclken_enable
+#ifndef CONF_GCLK1_GCLKEN_ENABLE
+#define CONF_GCLK1_GCLKEN_ENABLE 0
+#endif
+
+// <o> Generic Clock GCLK1 divider <1-256>
+// <i> Select the clock divider (divider = GCLKDIV + 1).
+// <id> gclk1_div
+#ifndef CONF_GCLK1_DIV
+#define CONF_GCLK1_DIV 3
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK0 configuration
+// <i> Indicates whether PCK0 configuration is enabled or not
+// <id> enable_clk_gen_pck0
+#ifndef CONF_CLK_PCK0_CONFIG
+#define CONF_CLK_PCK0_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK0 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK0
+// <id> clk_gen_pck0_oscillator
+#ifndef CONF_CLK_GEN_PCK0_SRC
+#define CONF_CLK_GEN_PCK0_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK0
+// <i> Indicates whether PCK0 is enabled or disable
+// <id> clk_gen_pck0_arch_enable
+#ifndef CONF_CLK_PCK0_ENABLE
+#define CONF_CLK_PCK0_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck0_presc
+#ifndef CONF_PCK0_PRESC
+#define CONF_PCK0_PRESC 1
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK1 configuration
+// <i> Indicates whether PCK1 configuration is enabled or not
+// <id> enable_clk_gen_pck1
+#ifndef CONF_CLK_PCK1_CONFIG
+#define CONF_CLK_PCK1_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK1 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK1
+// <id> clk_gen_pck1_oscillator
+#ifndef CONF_CLK_GEN_PCK1_SRC
+#define CONF_CLK_GEN_PCK1_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK1
+// <i> Indicates whether PCK1 is enabled or disable
+// <id> clk_gen_pck1_arch_enable
+#ifndef CONF_CLK_PCK1_ENABLE
+#define CONF_CLK_PCK1_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck1_presc
+#ifndef CONF_PCK1_PRESC
+#define CONF_PCK1_PRESC 2
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK2 configuration
+// <i> Indicates whether PCK2 configuration is enabled or not
+// <id> enable_clk_gen_pck2
+#ifndef CONF_CLK_PCK2_CONFIG
+#define CONF_CLK_PCK2_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK2 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK2
+// <id> clk_gen_pck2_oscillator
+#ifndef CONF_CLK_GEN_PCK2_SRC
+#define CONF_CLK_GEN_PCK2_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK2
+// <i> Indicates whether PCK2 is enabled or disable
+// <id> clk_gen_pck2_arch_enable
+#ifndef CONF_CLK_PCK2_ENABLE
+#define CONF_CLK_PCK2_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck2_presc
+#ifndef CONF_PCK2_PRESC
+#define CONF_PCK2_PRESC 3
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK3 configuration
+// <i> Indicates whether PCK3 configuration is enabled or not
+// <id> enable_clk_gen_pck3
+#ifndef CONF_CLK_PCK3_CONFIG
+#define CONF_CLK_PCK3_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK3 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK3
+// <id> clk_gen_pck3_oscillator
+#ifndef CONF_CLK_GEN_PCK3_SRC
+#define CONF_CLK_GEN_PCK3_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK3
+// <i> Indicates whether PCK3 is enabled or disable
+// <id> clk_gen_pck3_arch_enable
+#ifndef CONF_CLK_PCK3_ENABLE
+#define CONF_CLK_PCK3_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck3_presc
+#ifndef CONF_PCK3_PRESC
+#define CONF_PCK3_PRESC 4
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK4 configuration
+// <i> Indicates whether PCK4 configuration is enabled or not
+// <id> enable_clk_gen_pck4
+#ifndef CONF_CLK_PCK4_CONFIG
+#define CONF_CLK_PCK4_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK4 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK4
+// <id> clk_gen_pck4_oscillator
+#ifndef CONF_CLK_GEN_PCK4_SRC
+#define CONF_CLK_GEN_PCK4_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK4
+// <i> Indicates whether PCK4 is enabled or disable
+// <id> clk_gen_pck4_arch_enable
+#ifndef CONF_CLK_PCK4_ENABLE
+#define CONF_CLK_PCK4_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck4_presc
+#ifndef CONF_PCK4_PRESC
+#define CONF_PCK4_PRESC 5
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK5 configuration
+// <i> Indicates whether PCK5 configuration is enabled or not
+// <id> enable_clk_gen_pck5
+#ifndef CONF_CLK_PCK5_CONFIG
+#define CONF_CLK_PCK5_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK5 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK5
+// <id> clk_gen_pck5_oscillator
+#ifndef CONF_CLK_GEN_PCK5_SRC
+#define CONF_CLK_GEN_PCK5_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK5
+// <i> Indicates whether PCK5 is enabled or disable
+// <id> clk_gen_pck5_arch_enable
+#ifndef CONF_CLK_PCK5_ENABLE
+#define CONF_CLK_PCK5_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck5_presc
+#ifndef CONF_PCK5_PRESC
+#define CONF_PCK5_PRESC 6
+#endif
+
+// </h>
+// </e>// <e> Clock_PCK6 configuration
+// <i> Indicates whether PCK6 configuration is enabled or not
+// <id> enable_clk_gen_pck6
+#ifndef CONF_CLK_PCK6_CONFIG
+#define CONF_CLK_PCK6_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator PCK6 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <CLK_SRC_OPTION_MAINCK"> Main Clock (MAINCK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_MCK"> Master Clock (MCK)
+
+// <i> This defines the clock source for PCK6
+// <id> clk_gen_pck6_oscillator
+#ifndef CONF_CLK_GEN_PCK6_SRC
+#define CONF_CLK_GEN_PCK6_SRC CLK_SRC_OPTION_MAINCK
+#endif
+
+// <q> Enable Clock_PCK6
+// <i> Indicates whether PCK6 is enabled or disable
+// <id> clk_gen_pck6_arch_enable
+#ifndef CONF_CLK_PCK6_ENABLE
+#define CONF_CLK_PCK6_ENABLE 0
+#endif
+
+// </h>
+
+// <h>
+
+// <o> Programmable Clock Controller Prescaler <1-256>
+// <i> Select the clock prescaler (prescaler = PRESC + 1).
+// <id> pck6_presc
+#ifndef CONF_PCK6_PRESC
+#define CONF_PCK6_PRESC 7
+#endif
+
+// </h>
+// </e>// <e> Clock_USB_480M configuration
+// <i> Indicates whether USB_480M configuration is enabled or not
+// <id> enable_clk_gen_usb_480m
+#ifndef CONF_CLK_USB_480M_CONFIG
+#define CONF_CLK_USB_480M_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator USB_480M source
+
+// <CLK_SRC_OPTION_UPLLCK"> USB 480M Clock (UPLLCK)
+
+// <i> This defines the clock source for USB_480M
+// <id> clk_gen_usb_480m_oscillator
+#ifndef CONF_CLK_GEN_USB_480M_SRC
+#define CONF_CLK_GEN_USB_480M_SRC CLK_SRC_OPTION_UPLLCK
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>// <e> Clock_USB_48M configuration
+// <i> Indicates whether USB_48M configuration is enabled or not
+// <id> enable_clk_gen_usb_48m
+#ifndef CONF_CLK_USB_48M_CONFIG
+#define CONF_CLK_USB_48M_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator USB_48M source
+
+// <CLK_SRC_OPTION_PLLACK"> PLLA Clock (PLLACK)
+
+// <CLK_SRC_OPTION_UPLLCKDIV"> UDPLL with Divider (MCKR UPLLDIV2)
+
+// <i> This defines the clock source for USB_48M
+// <id> clk_gen_usb_48m_oscillator
+#ifndef CONF_CLK_GEN_USB_48M_SRC
+#define CONF_CLK_GEN_USB_48M_SRC CLK_SRC_OPTION_UPLLCKDIV
+#endif
+
+// <q> Enable Clock_USB_48M
+// <i> Indicates whether USB_48M is enabled or disable
+// <id> clk_gen_usb_48m_arch_enable
+#ifndef CONF_CLK_USB_48M_ENABLE
+#define CONF_CLK_USB_48M_ENABLE 1
+#endif
+
+// </h>
+
+// <h>
+
+// <o> USB Clock Controller Divider <1-16>
+// <i> Select the USB clock divider (divider = USBDIV + 1).
+// <id> usb_48m_div
+#ifndef CONF_USB_48M_DIV
+#define CONF_USB_48M_DIV 5
+#endif
+
+// </h>
+// </e>// <e> Clock_SLCK2 configuration
+// <i> Indicates whether SLCK2 configuration is enabled or not
+// <id> enable_clk_gen_slck2
+#ifndef CONF_CLK_SLCK2_CONFIG
+#define CONF_CLK_SLCK2_CONFIG 1
+#endif
+
+//<h> Clock Generator
+// <y> clock generator SLCK2 source
+
+// <CLK_SRC_OPTION_SLCK"> Slow Clock (SLCK)
+
+// <i> This defines the clock source for SLCK2
+// <id> clk_gen_slck2_oscillator
+#ifndef CONF_CLK_GEN_SLCK2_SRC
+#define CONF_CLK_GEN_SLCK2_SRC CLK_SRC_OPTION_SLCK
+#endif
+
+// </h>
+
+// <h>
+
+// </h>
+// </e>
+
+// <e> System Configuration
+// <i> Indicates whether configuration for system is enabled or not
+// <id> enable_hclk_clock
+#ifndef CONF_SYSTEM_CONFIG
+#define CONF_SYSTEM_CONFIG 1
+#endif
+
+// <h> Processor Clock Settings
+// <y> Processor Clock source
+// <MCKR"> Master Clock Controller (PMC_MCKR)
+// <i> This defines the clock source for the HCLK (Processor clock)
+// <id> hclk_clock_source
+#ifndef CONF_HCLK_SRC
+#define CONF_HCLK_SRC MCKR
+#endif
+
+// <o> Flash Wait State
+// <0=> 1 cycle
+// <1=> 2 cycles
+// <2=> 3 cycles
+// <3=> 4 cycles
+// <4=> 5 cycles
+// <5=> 6 cycles
+// <6=> 7 cycles
+// <i> This field defines the number of wait states for read and write operations.
+// <id> efc_fws
+#ifndef CONF_EFC_WAIT_STATE
+#define CONF_EFC_WAIT_STATE 5
+#endif
+
+// </h>
+// </e>
+
+// <e> SysTick Clock
+// <id> enable_systick_clk_clock
+#ifndef CONF_SYSTICK_CLK_CONFIG
+#define CONF_SYSTICK_CLK_CONFIG 1
+#endif
+
+// <y> SysTick Clock source
+// <MCKR"> Master Clock Controller (PMC_MCKR)
+// <i> This defines the clock source for the SysTick Clock
+// <id> systick_clk_clock_source
+#ifndef CONF_SYSTICK_CLK_SRC
+#define CONF_SYSTICK_CLK_SRC MCKR
+#endif
+
+// <o> SysTick Clock Divider
+// <8=> 8
+// <i> Fixed to 8 if Systick is not using Processor clock
+// <id> systick_clk_clock_div
+#ifndef CONF_SYSTICK_CLK_DIV
+#define CONF_SYSTICK_CLK_DIV 8
+#endif
+
+// </e>
+
+// <e> OSC32K Oscillator Configuration
+// <i> Indicates whether configuration for OSC32K is enabled or not
+// <id> enable_osc32k
+#ifndef CONF_OSC32K_CONFIG
+#define CONF_OSC32K_CONFIG 1
+#endif
+
+// <h> OSC32K Oscillator Control
+// <q> OSC32K Oscillator Enable
+// <i> Indicates whether OSC32K Oscillator is enabled or not
+// <id> osc32k_arch_enable
+#ifndef CONF_OSC32K_ENABLE
+#define CONF_OSC32K_ENABLE 0
+#endif
+// </h>
+// </e>
+
+// <e> XOSC32K Oscillator Configuration
+// <i> Indicates whether configuration for XOSC32K is enabled or not
+// <id> enable_xosc32k
+#ifndef CONF_XOSC32K_CONFIG
+#define CONF_XOSC32K_CONFIG 0
+#endif
+
+// <h> XOSC32K Oscillator Control
+// <y> Oscillator Bypass Select
+// <CONF_XOSC32K_NO_BYPASS"> The 32kHz crystal oscillator is not bypassed.
+// <CONF_XOSC32K_BYPASS"> The 32kHz crystal oscillator is bypassed.
+// <i> Indicates whether XOSC32K is bypassed.
+// <id> xosc32k_bypass
+#ifndef CONF_XOSC32K
+#define CONF_XOSC32K CONF_XOSC32K_NO_BYPASS
+#endif
+
+// <q> XOSC32K Oscillator Enable
+// <i> Indicates whether XOSC32K Oscillator is enabled or not
+// <id> xosc32k_arch_enable
+#ifndef CONF_XOSC32K_ENABLE
+#define CONF_XOSC32K_ENABLE 0
+#endif
+// </h>
+// </e>
+
+// <e> OSC12M Oscillator Configuration
+// <i> Indicates whether configuration for OSC12M is enabled or not
+// <id> enable_osc12m
+#ifndef CONF_OSC12M_CONFIG
+#define CONF_OSC12M_CONFIG 0
+#endif
+
+// <h> OSC12M Oscillator Control
+// <q> OSC12M Oscillator Enable
+// <i> Indicates whether OSC12M Oscillator is enabled or not.
+// <id> osc12m_arch_enable
+#ifndef CONF_OSC12M_ENABLE
+#define CONF_OSC12M_ENABLE 0
+#endif
+
+// <o> OSC12M selector
+//  <0=> 4000000
+//  <1=> 8000000
+//  <2=> 12000000
+// <i> Select the frequency of embedded fast RC oscillator.
+// <id> osc12m_selector
+#ifndef CONF_OSC12M_SELECTOR
+#define CONF_OSC12M_SELECTOR 2
+#endif
+// </h>
+// </e>
+
+// <e> XOSC20M Oscillator Configuration
+// <i> Indicates whether configuration for XOSC20M is enabled or not.
+// <id> enable_xosc20m
+#ifndef CONF_XOSC20M_CONFIG
+#define CONF_XOSC20M_CONFIG 1
+#endif
+
+// <h> XOSC20M Oscillator Control
+// <o> XOSC20M selector <3000000-20000000>
+// <i> Select the frequency of crystal or ceramic resonator oscillator.
+// <id> xosc20m_selector
+#ifndef CONF_XOSC20M_SELECTOR
+#define CONF_XOSC20M_SELECTOR 12000000
+#endif
+
+// <o> Start up time for the external oscillator (ms): <0-256>
+// <i> Select start-up time.
+// <id> xosc20m_startup_time
+#ifndef CONF_XOSC20M_STARTUP_TIME
+#define CONF_XOSC20M_STARTUP_TIME 62
+#endif
+
+// <y> Oscillator Bypass Select
+// <CONF_XOSC20M_NO_BYPASS"> The external crystal oscillator is not bypassed.
+// <CONF_XOSC20M_BYPASS"> The external crystal oscillator is bypassed.
+// <i> Indicates whether XOSC20M is bypassed.
+// <id> xosc20m_bypass
+#ifndef CONF_XOSC20M
+#define CONF_XOSC20M CONF_XOSC20M_NO_BYPASS
+#endif
+
+// <q> XOSC20M Oscillator Enable
+// <i> Indicates whether XOSC20M Oscillator is enabled or not
+// <id> xosc20m_arch_enable
+#ifndef CONF_XOSC20M_ENABLE
+#define CONF_XOSC20M_ENABLE 1
+#endif
+// </h>
+// </e>
+
+// <e> PLLACK Oscillator Configuration
+// <i> Indicates whether configuration for PLLACK is enabled or not
+// <id> enable_pllack
+#ifndef CONF_PLLACK_CONFIG
+#define CONF_PLLACK_CONFIG 1
+#endif
+
+// <y> PLLACK Reference Clock Source
+// <MAINCK"> Main Clock (MAINCK)
+// <i> Select the clock source.
+// <id> pllack_ref_clock
+#ifndef CONF_PLLACK_CLK
+#define CONF_PLLACK_CLK MAINCK
+#endif
+
+// <h> PLLACK Oscillator Control
+// <q> PLLACK Oscillator Enable
+// <i> Indicates whether PLLACK Oscillator is enabled or not
+// <id> pllack_arch_enable
+#ifndef CONF_PLLACK_ENABLE
+#define CONF_PLLACK_ENABLE 1
+#endif
+
+// <o> PLLA Frontend Divider (DIVA)  <1-255>
+// <i> Select the clock divider
+// <id> pllack_div
+#ifndef CONF_PLLACK_DIV
+#define CONF_PLLACK_DIV 1
+#endif
+
+// <o> PLLACK Muliplier <1-62>
+// <i> Indicates PLLA multiplier (multiplier = MULA + 1).
+// <id> pllack_mul
+#ifndef CONF_PLLACK_MUL
+#define CONF_PLLACK_MUL 25
+#endif
+// </h>
+// </e>
+
+// <e> UPLLCK Oscillator Configuration
+// <i> Indicates whether configuration for UPLLCK is enabled or not
+// <id> enable_upllck
+#ifndef CONF_UPLLCK_CONFIG
+#define CONF_UPLLCK_CONFIG 1
+#endif
+
+// <y> UPLLCK Reference Clock Source
+// <XOSC20M"> External 3-20MHz Oscillator (XOSC20M)
+// <i> Select the clock source,only when the input frequency is 12M or 16M, the upllck output is 480M.
+// <id> upllck_ref_clock
+#ifndef CONF_UPLLCK_CLK
+#define CONF_UPLLCK_CLK XOSC20M
+#endif
+
+// <h> UPLLCK Oscillator Control
+// <q> UPLLCK Oscillator Enable
+// <i> Indicates whether UPLLCK Oscillator is enabled or not
+// <id> upllck_arch_enable
+#ifndef CONF_UPLLCK_ENABLE
+#define CONF_UPLLCK_ENABLE 1
+#endif
+// </h>
+// </e>
+
+// <e> UPLLCKDIV Oscillator Configuration
+// <i> Indicates whether configuration for UPLLCKDIV is enabled or not
+// <id> enable_upllckdiv
+#ifndef CONF_UPLLCKDIV_CONFIG
+#define CONF_UPLLCKDIV_CONFIG 1
+#endif
+
+// <y> UPLLCKDIV Reference Clock Source
+// <UPLLCK"> USB 480M Clock (UPLLCK)
+// <i> Select the clock source.
+// <id> upllckdiv_ref_clock
+#ifndef CONF_UPLLCKDIV_CLK
+#define CONF_UPLLCKDIV_CLK UPLLCK
+#endif
+
+// <h> UPLLCKDIV Oscillator Control
+// <o> UPLLCKDIV Clock Divider
+// <0=> 1
+// <1=> 2
+// <i> Select the clock divider.
+// <id> upllckdiv_div
+#ifndef CONF_UPLLCKDIV_DIV
+#define CONF_UPLLCKDIV_DIV 1
+#endif
+// </h>
+// </e>
+
+// <e> MCK/8
+// <id> enable_mck_div_8
+#ifndef CONF_MCK_DIV_8_CONFIG
+#define CONF_MCK_DIV_8_CONFIG 0
+#endif
+
+// <o> MCK/8 Source
+// <0=> Master Clock (MCK)
+// <id> mck_div_8_src
+#ifndef CONF_MCK_DIV_8_SRC
+#define CONF_MCK_DIV_8_SRC 0
+#endif
+// </e>
+
+// <e> External Clock Input Configuration
+// <id> enable_dummy_ext
+#ifndef CONF_DUMMY_EXT_CONFIG
+#define CONF_DUMMY_EXT_CONFIG 1
+#endif
+
+// <o> External Clock Input Source
+// <i> All here are dummy values
+// <i> Refer to the peripherals settings for actual input information
+// <0=> Specific clock input from specific pin
+// <id> dummy_ext_src
+#ifndef CONF_DUMMY_EXT_SRC
+#define CONF_DUMMY_EXT_SRC 0
+#endif
+// </e>
+
+// <e> External Clock Configuration
+// <id> enable_dummy_ext_clk
+#ifndef CONF_DUMMY_EXT_CLK_CONFIG
+#define CONF_DUMMY_EXT_CLK_CONFIG 1
+#endif
+
+// <o> External Clock Source
+// <i> All here are dummy values
+// <i> Refer to the peripherals settings for actual input information
+// <0=> External Clock Input
+// <id> dummy_ext_clk_src
+#ifndef CONF_DUMMY_EXT_CLK_SRC
+#define CONF_DUMMY_EXT_CLK_SRC 0
+#endif
+// </e>
+
+// <<< end of configuration section >>>
+
+#endif // HPL_PMC_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_xplained/hpl_usart_config.h b/hw/bsp/same7x/boards/same70_xplained/hpl_usart_config.h
new file mode 100644
index 000000000..50ca3f15c
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/hpl_usart_config.h
@@ -0,0 +1,215 @@
+/* Auto-generated config file hpl_usart_config.h */
+#ifndef HPL_USART_CONFIG_H
+#define HPL_USART_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+#include <peripheral_clk_config.h>
+
+#ifndef CONF_USART_1_ENABLE
+#define CONF_USART_1_ENABLE 1
+#endif
+
+// <h> Basic Configuration
+
+// <o> Frame parity
+// <0x0=>Even parity
+// <0x1=>Odd parity
+// <0x2=>Parity forced to 0
+// <0x3=>Parity forced to 1
+// <0x4=>No parity
+// <i> Parity bit mode for USART frame
+// <id> usart_parity
+#ifndef CONF_USART_1_PARITY
+#define CONF_USART_1_PARITY 0x4
+#endif
+
+// <o> Character Size
+// <0x0=>5 bits
+// <0x1=>6 bits
+// <0x2=>7 bits
+// <0x3=>8 bits
+// <i> Data character size in USART frame
+// <id> usart_character_size
+#ifndef CONF_USART_1_CHSIZE
+#define CONF_USART_1_CHSIZE 0x3
+#endif
+
+// <o> Stop Bit
+// <0=>1 stop bit
+// <1=>1.5 stop bits
+// <2=>2 stop bits
+// <i> Number of stop bits in USART frame
+// <id> usart_stop_bit
+#ifndef CONF_USART_1_SBMODE
+#define CONF_USART_1_SBMODE 0
+#endif
+
+// <o> Clock Output Select
+// <0=>The USART does not drive the SCK pin
+// <1=>The USART drives the SCK pin if USCLKS does not select the external clock SCK
+// <i> Clock Output Select in USART sck, if in usrt master mode, please drive SCK.
+// <id> usart_clock_output_select
+#ifndef CONF_USART_1_CLKO
+#define CONF_USART_1_CLKO 0
+#endif
+
+// <o> Baud rate <1-3000000>
+// <i> USART baud rate setting
+// <id> usart_baud_rate
+#ifndef CONF_USART_1_BAUD
+#define CONF_USART_1_BAUD 9600
+#endif
+
+// </h>
+
+// <e> Advanced configuration
+// <id> usart_advanced
+#ifndef CONF_USART_1_ADVANCED_CONFIG
+#define CONF_USART_1_ADVANCED_CONFIG 0
+#endif
+
+// <o> Channel Mode
+// <0=>Normal Mode
+// <1=>Automatic Echo
+// <2=>Local Loopback
+// <3=>Remote Loopback
+// <i> Channel mode in USART frame
+// <id> usart_channel_mode
+#ifndef CONF_USART_1_CHMODE
+#define CONF_USART_1_CHMODE 0
+#endif
+
+// <q> 9 bits character enable
+// <i> Enable 9 bits character, this has high priority than 5/6/7/8 bits.
+// <id> usart_9bits_enable
+#ifndef CONF_USART_1_MODE9
+#define CONF_USART_1_MODE9 0
+#endif
+
+// <o> Variable Sync
+// <0=>User defined configuration
+// <1=>sync field is updated when a character is written into US_THR
+// <i> Variable Synchronization of Command/Data Sync Start Frarm Delimiter
+// <id> variable_sync
+#ifndef CONF_USART_1_VAR_SYNC
+#define CONF_USART_1_VAR_SYNC 0
+#endif
+
+// <o> Oversampling Mode
+// <0=>16 Oversampling
+// <1=>8 Oversampling
+// <i> Oversampling Mode in UART mode
+// <id> usart__oversampling_mode
+#ifndef CONF_USART_1_OVER
+#define CONF_USART_1_OVER 0
+#endif
+
+// <o> Inhibit Non Ack
+// <0=>The NACK is generated
+// <1=>The NACK is not generated
+// <i> Inhibit Non Acknowledge
+// <id> usart__inack
+#ifndef CONF_USART_1_INACK
+#define CONF_USART_1_INACK 1
+#endif
+
+// <o> Disable Successive NACK
+// <0=>NACK is sent on the ISO line as soon as a parity error occurs
+// <1=>Many parity errors generate a NACK on the ISO line
+// <i> Disable Successive NACK
+// <id> usart_dsnack
+#ifndef CONF_USART_1_DSNACK
+#define CONF_USART_1_DSNACK 0
+#endif
+
+// <o> Inverted Data
+// <0=>Data isn't inverted, nomal mode
+// <1=>Data is inverted
+// <i> Inverted Data
+// <id> usart_invdata
+#ifndef CONF_USART_1_INVDATA
+#define CONF_USART_1_INVDATA 0
+#endif
+
+// <o> Maximum Number of Automatic Iteration <0-7>
+// <i> Defines the maximum number of iterations in mode ISO7816, protocol T = 0.
+// <id> usart_max_iteration
+#ifndef CONF_USART_1_MAX_ITERATION
+#define CONF_USART_1_MAX_ITERATION 0
+#endif
+
+// <q> Receive Line Filter enable
+// <i> whether the USART filters the receive line using a three-sample filter
+// <id> usart_receive_filter_enable
+#ifndef CONF_USART_1_FILTER
+#define CONF_USART_1_FILTER 0
+#endif
+
+// <q> Manchester Encoder/Decoder Enable
+// <i> whether the USART Manchester Encoder/Decoder
+// <id> usart_manchester_filter_enable
+#ifndef CONF_USART_1_MAN
+#define CONF_USART_1_MAN 0
+#endif
+
+// <o> Manchester Synchronization Mode
+// <0=>The Manchester start bit is a 0 to 1 transition
+// <1=>The Manchester start bit is a 1 to 0 transition
+// <i> Manchester Synchronization Mode
+// <id> usart_manchester_synchronization_mode
+#ifndef CONF_USART_1_MODSYNC
+#define CONF_USART_1_MODSYNC 0
+#endif
+
+// <o> Start Frame Delimiter Selector
+// <0=>Start frame delimiter is COMMAND or DATA SYNC
+// <1=>Start frame delimiter is one bit
+// <i> Start Frame Delimiter Selector
+// <id> usart_start_frame_delimiter
+#ifndef CONF_USART_1_ONEBIT
+#define CONF_USART_1_ONEBIT 0
+#endif
+
+// <o> Fractional Part <0-7>
+// <i> Fractional part of the baud rate if baud rate generator is in fractional mode
+// <id> usart_arch_fractional
+#ifndef CONF_USART_1_FRACTIONAL
+#define CONF_USART_1_FRACTIONAL 0x0
+#endif
+
+// <o> Data Order
+// <0=>LSB is transmitted first
+// <1=>MSB is transmitted first
+// <i> Data order of the data bits in the frame
+// <id> usart_arch_msbf
+#ifndef CONF_USART_1_MSBF
+#define CONF_USART_1_MSBF 0
+#endif
+
+// </e>
+
+#define CONF_USART_1_MODE 0x0
+
+// Calculate BAUD register value in UART mode
+#if CONF_USART1_CK_SRC < 3
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD ((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / 8 / (2 - CONF_USART_1_OVER))
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP                                                                                           \
+	((CONF_USART1_FREQUENCY) / CONF_USART_1_BAUD / (2 - CONF_USART_1_OVER) - 8 * CONF_USART_1_BAUD_CD)
+#endif
+#elif CONF_USART1_CK_SRC == 3
+// No division is active. The value written in US_BRGR has no effect.
+#ifndef CONF_USART_1_BAUD_CD
+#define CONF_USART_1_BAUD_CD 1
+#endif
+#ifndef CONF_USART_1_BAUD_FP
+#define CONF_USART_1_BAUD_FP 1
+#endif
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // HPL_USART_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_xplained/hpl_xdmac_config.h b/hw/bsp/same7x/boards/same70_xplained/hpl_xdmac_config.h
new file mode 100644
index 000000000..a3d62c6fc
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/hpl_xdmac_config.h
@@ -0,0 +1,4400 @@
+/* Auto-generated config file hpl_xdmac_config.h */
+#ifndef HPL_XDMAC_CONFIG_H
+#define HPL_XDMAC_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+// <e> XDMAC enable
+// <i> Indicates whether xdmac is enabled or not
+// <id> xdmac_enable
+#ifndef CONF_DMA_ENABLE
+#define CONF_DMA_ENABLE 0
+#endif
+
+// <e> Channel 0 settings
+// <id> dmac_channel_0_settings
+#ifndef CONF_DMAC_CHANNEL_0_SETTINGS
+#define CONF_DMAC_CHANNEL_0_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_0
+#ifndef CONF_DMAC_BURSTSIZE_0
+#define CONF_DMAC_BURSTSIZE_0 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_0
+#ifndef CONF_DMAC_CHUNKSIZE_0
+#define CONF_DMAC_CHUNKSIZE_0 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_0
+#ifndef CONF_DMAC_BEATSIZE_0
+#define CONF_DMAC_BEATSIZE_0 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_0
+#ifndef CONF_DMAC_SRC_INTERFACE_0
+#define CONF_DMAC_SRC_INTERFACE_0 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_0
+#ifndef CONF_DMAC_DES_INTERFACE_0
+#define CONF_DMAC_DES_INTERFACE_0 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_0
+#ifndef CONF_DMAC_SRCINC_0
+#define CONF_DMAC_SRCINC_0 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_0
+#ifndef CONF_DMAC_DSTINC_0
+#define CONF_DMAC_DSTINC_0 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_0
+#ifndef CONF_DMAC_TRANS_TYPE_0
+#define CONF_DMAC_TRANS_TYPE_0 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_0
+#ifndef CONF_DMAC_TRIGSRC_0
+#define CONF_DMAC_TRIGSRC_0 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_0 == 0
+#define CONF_DMAC_TYPE_0 0
+#define CONF_DMAC_DSYNC_0 0
+#elif CONF_DMAC_TRANS_TYPE_0 == 1
+#define CONF_DMAC_TYPE_0 1
+#define CONF_DMAC_DSYNC_0 0
+#elif CONF_DMAC_TRANS_TYPE_0 == 2
+#define CONF_DMAC_TYPE_0 1
+#define CONF_DMAC_DSYNC_0 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_0 == 0xFF
+#define CONF_DMAC_SWREQ_0 1
+#else
+#define CONF_DMAC_SWREQ_0 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_0_SETTINGS == 1 && CONF_DMAC_BEATSIZE_0 != 2 && ((!CONF_DMAC_SRCINC_0) || (!CONF_DMAC_DSTINC_0)))
+#if (!CONF_DMAC_SRCINC_0)
+#define CONF_DMAC_SRC_STRIDE_0 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_0)
+#define CONF_DMAC_DES_STRIDE_0 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_0
+#define CONF_DMAC_SRC_STRIDE_0 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_0
+#define CONF_DMAC_DES_STRIDE_0 0
+#endif
+
+// <e> Channel 1 settings
+// <id> dmac_channel_1_settings
+#ifndef CONF_DMAC_CHANNEL_1_SETTINGS
+#define CONF_DMAC_CHANNEL_1_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_1
+#ifndef CONF_DMAC_BURSTSIZE_1
+#define CONF_DMAC_BURSTSIZE_1 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_1
+#ifndef CONF_DMAC_CHUNKSIZE_1
+#define CONF_DMAC_CHUNKSIZE_1 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_1
+#ifndef CONF_DMAC_BEATSIZE_1
+#define CONF_DMAC_BEATSIZE_1 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_1
+#ifndef CONF_DMAC_SRC_INTERFACE_1
+#define CONF_DMAC_SRC_INTERFACE_1 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_1
+#ifndef CONF_DMAC_DES_INTERFACE_1
+#define CONF_DMAC_DES_INTERFACE_1 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_1
+#ifndef CONF_DMAC_SRCINC_1
+#define CONF_DMAC_SRCINC_1 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_1
+#ifndef CONF_DMAC_DSTINC_1
+#define CONF_DMAC_DSTINC_1 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_1
+#ifndef CONF_DMAC_TRANS_TYPE_1
+#define CONF_DMAC_TRANS_TYPE_1 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_1
+#ifndef CONF_DMAC_TRIGSRC_1
+#define CONF_DMAC_TRIGSRC_1 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_1 == 0
+#define CONF_DMAC_TYPE_1 0
+#define CONF_DMAC_DSYNC_1 0
+#elif CONF_DMAC_TRANS_TYPE_1 == 1
+#define CONF_DMAC_TYPE_1 1
+#define CONF_DMAC_DSYNC_1 0
+#elif CONF_DMAC_TRANS_TYPE_1 == 2
+#define CONF_DMAC_TYPE_1 1
+#define CONF_DMAC_DSYNC_1 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_1 == 0xFF
+#define CONF_DMAC_SWREQ_1 1
+#else
+#define CONF_DMAC_SWREQ_1 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_1_SETTINGS == 1 && CONF_DMAC_BEATSIZE_1 != 2 && ((!CONF_DMAC_SRCINC_1) || (!CONF_DMAC_DSTINC_1)))
+#if (!CONF_DMAC_SRCINC_1)
+#define CONF_DMAC_SRC_STRIDE_1 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_1)
+#define CONF_DMAC_DES_STRIDE_1 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_1
+#define CONF_DMAC_SRC_STRIDE_1 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_1
+#define CONF_DMAC_DES_STRIDE_1 0
+#endif
+
+// <e> Channel 2 settings
+// <id> dmac_channel_2_settings
+#ifndef CONF_DMAC_CHANNEL_2_SETTINGS
+#define CONF_DMAC_CHANNEL_2_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_2
+#ifndef CONF_DMAC_BURSTSIZE_2
+#define CONF_DMAC_BURSTSIZE_2 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_2
+#ifndef CONF_DMAC_CHUNKSIZE_2
+#define CONF_DMAC_CHUNKSIZE_2 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_2
+#ifndef CONF_DMAC_BEATSIZE_2
+#define CONF_DMAC_BEATSIZE_2 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_2
+#ifndef CONF_DMAC_SRC_INTERFACE_2
+#define CONF_DMAC_SRC_INTERFACE_2 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_2
+#ifndef CONF_DMAC_DES_INTERFACE_2
+#define CONF_DMAC_DES_INTERFACE_2 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_2
+#ifndef CONF_DMAC_SRCINC_2
+#define CONF_DMAC_SRCINC_2 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_2
+#ifndef CONF_DMAC_DSTINC_2
+#define CONF_DMAC_DSTINC_2 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_2
+#ifndef CONF_DMAC_TRANS_TYPE_2
+#define CONF_DMAC_TRANS_TYPE_2 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_2
+#ifndef CONF_DMAC_TRIGSRC_2
+#define CONF_DMAC_TRIGSRC_2 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_2 == 0
+#define CONF_DMAC_TYPE_2 0
+#define CONF_DMAC_DSYNC_2 0
+#elif CONF_DMAC_TRANS_TYPE_2 == 1
+#define CONF_DMAC_TYPE_2 1
+#define CONF_DMAC_DSYNC_2 0
+#elif CONF_DMAC_TRANS_TYPE_2 == 2
+#define CONF_DMAC_TYPE_2 1
+#define CONF_DMAC_DSYNC_2 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_2 == 0xFF
+#define CONF_DMAC_SWREQ_2 1
+#else
+#define CONF_DMAC_SWREQ_2 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_2_SETTINGS == 1 && CONF_DMAC_BEATSIZE_2 != 2 && ((!CONF_DMAC_SRCINC_2) || (!CONF_DMAC_DSTINC_2)))
+#if (!CONF_DMAC_SRCINC_2)
+#define CONF_DMAC_SRC_STRIDE_2 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_2)
+#define CONF_DMAC_DES_STRIDE_2 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_2
+#define CONF_DMAC_SRC_STRIDE_2 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_2
+#define CONF_DMAC_DES_STRIDE_2 0
+#endif
+
+// <e> Channel 3 settings
+// <id> dmac_channel_3_settings
+#ifndef CONF_DMAC_CHANNEL_3_SETTINGS
+#define CONF_DMAC_CHANNEL_3_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_3
+#ifndef CONF_DMAC_BURSTSIZE_3
+#define CONF_DMAC_BURSTSIZE_3 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_3
+#ifndef CONF_DMAC_CHUNKSIZE_3
+#define CONF_DMAC_CHUNKSIZE_3 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_3
+#ifndef CONF_DMAC_BEATSIZE_3
+#define CONF_DMAC_BEATSIZE_3 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_3
+#ifndef CONF_DMAC_SRC_INTERFACE_3
+#define CONF_DMAC_SRC_INTERFACE_3 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_3
+#ifndef CONF_DMAC_DES_INTERFACE_3
+#define CONF_DMAC_DES_INTERFACE_3 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_3
+#ifndef CONF_DMAC_SRCINC_3
+#define CONF_DMAC_SRCINC_3 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_3
+#ifndef CONF_DMAC_DSTINC_3
+#define CONF_DMAC_DSTINC_3 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_3
+#ifndef CONF_DMAC_TRANS_TYPE_3
+#define CONF_DMAC_TRANS_TYPE_3 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_3
+#ifndef CONF_DMAC_TRIGSRC_3
+#define CONF_DMAC_TRIGSRC_3 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_3 == 0
+#define CONF_DMAC_TYPE_3 0
+#define CONF_DMAC_DSYNC_3 0
+#elif CONF_DMAC_TRANS_TYPE_3 == 1
+#define CONF_DMAC_TYPE_3 1
+#define CONF_DMAC_DSYNC_3 0
+#elif CONF_DMAC_TRANS_TYPE_3 == 2
+#define CONF_DMAC_TYPE_3 1
+#define CONF_DMAC_DSYNC_3 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_3 == 0xFF
+#define CONF_DMAC_SWREQ_3 1
+#else
+#define CONF_DMAC_SWREQ_3 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_3_SETTINGS == 1 && CONF_DMAC_BEATSIZE_3 != 2 && ((!CONF_DMAC_SRCINC_3) || (!CONF_DMAC_DSTINC_3)))
+#if (!CONF_DMAC_SRCINC_3)
+#define CONF_DMAC_SRC_STRIDE_3 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_3)
+#define CONF_DMAC_DES_STRIDE_3 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_3
+#define CONF_DMAC_SRC_STRIDE_3 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_3
+#define CONF_DMAC_DES_STRIDE_3 0
+#endif
+
+// <e> Channel 4 settings
+// <id> dmac_channel_4_settings
+#ifndef CONF_DMAC_CHANNEL_4_SETTINGS
+#define CONF_DMAC_CHANNEL_4_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_4
+#ifndef CONF_DMAC_BURSTSIZE_4
+#define CONF_DMAC_BURSTSIZE_4 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_4
+#ifndef CONF_DMAC_CHUNKSIZE_4
+#define CONF_DMAC_CHUNKSIZE_4 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_4
+#ifndef CONF_DMAC_BEATSIZE_4
+#define CONF_DMAC_BEATSIZE_4 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_4
+#ifndef CONF_DMAC_SRC_INTERFACE_4
+#define CONF_DMAC_SRC_INTERFACE_4 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_4
+#ifndef CONF_DMAC_DES_INTERFACE_4
+#define CONF_DMAC_DES_INTERFACE_4 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_4
+#ifndef CONF_DMAC_SRCINC_4
+#define CONF_DMAC_SRCINC_4 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_4
+#ifndef CONF_DMAC_DSTINC_4
+#define CONF_DMAC_DSTINC_4 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_4
+#ifndef CONF_DMAC_TRANS_TYPE_4
+#define CONF_DMAC_TRANS_TYPE_4 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_4
+#ifndef CONF_DMAC_TRIGSRC_4
+#define CONF_DMAC_TRIGSRC_4 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_4 == 0
+#define CONF_DMAC_TYPE_4 0
+#define CONF_DMAC_DSYNC_4 0
+#elif CONF_DMAC_TRANS_TYPE_4 == 1
+#define CONF_DMAC_TYPE_4 1
+#define CONF_DMAC_DSYNC_4 0
+#elif CONF_DMAC_TRANS_TYPE_4 == 2
+#define CONF_DMAC_TYPE_4 1
+#define CONF_DMAC_DSYNC_4 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_4 == 0xFF
+#define CONF_DMAC_SWREQ_4 1
+#else
+#define CONF_DMAC_SWREQ_4 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_4_SETTINGS == 1 && CONF_DMAC_BEATSIZE_4 != 2 && ((!CONF_DMAC_SRCINC_4) || (!CONF_DMAC_DSTINC_4)))
+#if (!CONF_DMAC_SRCINC_4)
+#define CONF_DMAC_SRC_STRIDE_4 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_4)
+#define CONF_DMAC_DES_STRIDE_4 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_4
+#define CONF_DMAC_SRC_STRIDE_4 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_4
+#define CONF_DMAC_DES_STRIDE_4 0
+#endif
+
+// <e> Channel 5 settings
+// <id> dmac_channel_5_settings
+#ifndef CONF_DMAC_CHANNEL_5_SETTINGS
+#define CONF_DMAC_CHANNEL_5_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_5
+#ifndef CONF_DMAC_BURSTSIZE_5
+#define CONF_DMAC_BURSTSIZE_5 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_5
+#ifndef CONF_DMAC_CHUNKSIZE_5
+#define CONF_DMAC_CHUNKSIZE_5 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_5
+#ifndef CONF_DMAC_BEATSIZE_5
+#define CONF_DMAC_BEATSIZE_5 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_5
+#ifndef CONF_DMAC_SRC_INTERFACE_5
+#define CONF_DMAC_SRC_INTERFACE_5 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_5
+#ifndef CONF_DMAC_DES_INTERFACE_5
+#define CONF_DMAC_DES_INTERFACE_5 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_5
+#ifndef CONF_DMAC_SRCINC_5
+#define CONF_DMAC_SRCINC_5 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_5
+#ifndef CONF_DMAC_DSTINC_5
+#define CONF_DMAC_DSTINC_5 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_5
+#ifndef CONF_DMAC_TRANS_TYPE_5
+#define CONF_DMAC_TRANS_TYPE_5 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_5
+#ifndef CONF_DMAC_TRIGSRC_5
+#define CONF_DMAC_TRIGSRC_5 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_5 == 0
+#define CONF_DMAC_TYPE_5 0
+#define CONF_DMAC_DSYNC_5 0
+#elif CONF_DMAC_TRANS_TYPE_5 == 1
+#define CONF_DMAC_TYPE_5 1
+#define CONF_DMAC_DSYNC_5 0
+#elif CONF_DMAC_TRANS_TYPE_5 == 2
+#define CONF_DMAC_TYPE_5 1
+#define CONF_DMAC_DSYNC_5 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_5 == 0xFF
+#define CONF_DMAC_SWREQ_5 1
+#else
+#define CONF_DMAC_SWREQ_5 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_5_SETTINGS == 1 && CONF_DMAC_BEATSIZE_5 != 2 && ((!CONF_DMAC_SRCINC_5) || (!CONF_DMAC_DSTINC_5)))
+#if (!CONF_DMAC_SRCINC_5)
+#define CONF_DMAC_SRC_STRIDE_5 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_5)
+#define CONF_DMAC_DES_STRIDE_5 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_5
+#define CONF_DMAC_SRC_STRIDE_5 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_5
+#define CONF_DMAC_DES_STRIDE_5 0
+#endif
+
+// <e> Channel 6 settings
+// <id> dmac_channel_6_settings
+#ifndef CONF_DMAC_CHANNEL_6_SETTINGS
+#define CONF_DMAC_CHANNEL_6_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_6
+#ifndef CONF_DMAC_BURSTSIZE_6
+#define CONF_DMAC_BURSTSIZE_6 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_6
+#ifndef CONF_DMAC_CHUNKSIZE_6
+#define CONF_DMAC_CHUNKSIZE_6 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_6
+#ifndef CONF_DMAC_BEATSIZE_6
+#define CONF_DMAC_BEATSIZE_6 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_6
+#ifndef CONF_DMAC_SRC_INTERFACE_6
+#define CONF_DMAC_SRC_INTERFACE_6 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_6
+#ifndef CONF_DMAC_DES_INTERFACE_6
+#define CONF_DMAC_DES_INTERFACE_6 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_6
+#ifndef CONF_DMAC_SRCINC_6
+#define CONF_DMAC_SRCINC_6 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_6
+#ifndef CONF_DMAC_DSTINC_6
+#define CONF_DMAC_DSTINC_6 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_6
+#ifndef CONF_DMAC_TRANS_TYPE_6
+#define CONF_DMAC_TRANS_TYPE_6 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_6
+#ifndef CONF_DMAC_TRIGSRC_6
+#define CONF_DMAC_TRIGSRC_6 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_6 == 0
+#define CONF_DMAC_TYPE_6 0
+#define CONF_DMAC_DSYNC_6 0
+#elif CONF_DMAC_TRANS_TYPE_6 == 1
+#define CONF_DMAC_TYPE_6 1
+#define CONF_DMAC_DSYNC_6 0
+#elif CONF_DMAC_TRANS_TYPE_6 == 2
+#define CONF_DMAC_TYPE_6 1
+#define CONF_DMAC_DSYNC_6 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_6 == 0xFF
+#define CONF_DMAC_SWREQ_6 1
+#else
+#define CONF_DMAC_SWREQ_6 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_6_SETTINGS == 1 && CONF_DMAC_BEATSIZE_6 != 2 && ((!CONF_DMAC_SRCINC_6) || (!CONF_DMAC_DSTINC_6)))
+#if (!CONF_DMAC_SRCINC_6)
+#define CONF_DMAC_SRC_STRIDE_6 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_6)
+#define CONF_DMAC_DES_STRIDE_6 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_6
+#define CONF_DMAC_SRC_STRIDE_6 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_6
+#define CONF_DMAC_DES_STRIDE_6 0
+#endif
+
+// <e> Channel 7 settings
+// <id> dmac_channel_7_settings
+#ifndef CONF_DMAC_CHANNEL_7_SETTINGS
+#define CONF_DMAC_CHANNEL_7_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_7
+#ifndef CONF_DMAC_BURSTSIZE_7
+#define CONF_DMAC_BURSTSIZE_7 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_7
+#ifndef CONF_DMAC_CHUNKSIZE_7
+#define CONF_DMAC_CHUNKSIZE_7 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_7
+#ifndef CONF_DMAC_BEATSIZE_7
+#define CONF_DMAC_BEATSIZE_7 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_7
+#ifndef CONF_DMAC_SRC_INTERFACE_7
+#define CONF_DMAC_SRC_INTERFACE_7 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_7
+#ifndef CONF_DMAC_DES_INTERFACE_7
+#define CONF_DMAC_DES_INTERFACE_7 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_7
+#ifndef CONF_DMAC_SRCINC_7
+#define CONF_DMAC_SRCINC_7 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_7
+#ifndef CONF_DMAC_DSTINC_7
+#define CONF_DMAC_DSTINC_7 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_7
+#ifndef CONF_DMAC_TRANS_TYPE_7
+#define CONF_DMAC_TRANS_TYPE_7 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_7
+#ifndef CONF_DMAC_TRIGSRC_7
+#define CONF_DMAC_TRIGSRC_7 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_7 == 0
+#define CONF_DMAC_TYPE_7 0
+#define CONF_DMAC_DSYNC_7 0
+#elif CONF_DMAC_TRANS_TYPE_7 == 1
+#define CONF_DMAC_TYPE_7 1
+#define CONF_DMAC_DSYNC_7 0
+#elif CONF_DMAC_TRANS_TYPE_7 == 2
+#define CONF_DMAC_TYPE_7 1
+#define CONF_DMAC_DSYNC_7 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_7 == 0xFF
+#define CONF_DMAC_SWREQ_7 1
+#else
+#define CONF_DMAC_SWREQ_7 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_7_SETTINGS == 1 && CONF_DMAC_BEATSIZE_7 != 2 && ((!CONF_DMAC_SRCINC_7) || (!CONF_DMAC_DSTINC_7)))
+#if (!CONF_DMAC_SRCINC_7)
+#define CONF_DMAC_SRC_STRIDE_7 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_7)
+#define CONF_DMAC_DES_STRIDE_7 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_7
+#define CONF_DMAC_SRC_STRIDE_7 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_7
+#define CONF_DMAC_DES_STRIDE_7 0
+#endif
+
+// <e> Channel 8 settings
+// <id> dmac_channel_8_settings
+#ifndef CONF_DMAC_CHANNEL_8_SETTINGS
+#define CONF_DMAC_CHANNEL_8_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_8
+#ifndef CONF_DMAC_BURSTSIZE_8
+#define CONF_DMAC_BURSTSIZE_8 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_8
+#ifndef CONF_DMAC_CHUNKSIZE_8
+#define CONF_DMAC_CHUNKSIZE_8 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_8
+#ifndef CONF_DMAC_BEATSIZE_8
+#define CONF_DMAC_BEATSIZE_8 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_8
+#ifndef CONF_DMAC_SRC_INTERFACE_8
+#define CONF_DMAC_SRC_INTERFACE_8 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_8
+#ifndef CONF_DMAC_DES_INTERFACE_8
+#define CONF_DMAC_DES_INTERFACE_8 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_8
+#ifndef CONF_DMAC_SRCINC_8
+#define CONF_DMAC_SRCINC_8 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_8
+#ifndef CONF_DMAC_DSTINC_8
+#define CONF_DMAC_DSTINC_8 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_8
+#ifndef CONF_DMAC_TRANS_TYPE_8
+#define CONF_DMAC_TRANS_TYPE_8 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_8
+#ifndef CONF_DMAC_TRIGSRC_8
+#define CONF_DMAC_TRIGSRC_8 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_8 == 0
+#define CONF_DMAC_TYPE_8 0
+#define CONF_DMAC_DSYNC_8 0
+#elif CONF_DMAC_TRANS_TYPE_8 == 1
+#define CONF_DMAC_TYPE_8 1
+#define CONF_DMAC_DSYNC_8 0
+#elif CONF_DMAC_TRANS_TYPE_8 == 2
+#define CONF_DMAC_TYPE_8 1
+#define CONF_DMAC_DSYNC_8 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_8 == 0xFF
+#define CONF_DMAC_SWREQ_8 1
+#else
+#define CONF_DMAC_SWREQ_8 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_8_SETTINGS == 1 && CONF_DMAC_BEATSIZE_8 != 2 && ((!CONF_DMAC_SRCINC_8) || (!CONF_DMAC_DSTINC_8)))
+#if (!CONF_DMAC_SRCINC_8)
+#define CONF_DMAC_SRC_STRIDE_8 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_8)
+#define CONF_DMAC_DES_STRIDE_8 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_8
+#define CONF_DMAC_SRC_STRIDE_8 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_8
+#define CONF_DMAC_DES_STRIDE_8 0
+#endif
+
+// <e> Channel 9 settings
+// <id> dmac_channel_9_settings
+#ifndef CONF_DMAC_CHANNEL_9_SETTINGS
+#define CONF_DMAC_CHANNEL_9_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_9
+#ifndef CONF_DMAC_BURSTSIZE_9
+#define CONF_DMAC_BURSTSIZE_9 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_9
+#ifndef CONF_DMAC_CHUNKSIZE_9
+#define CONF_DMAC_CHUNKSIZE_9 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_9
+#ifndef CONF_DMAC_BEATSIZE_9
+#define CONF_DMAC_BEATSIZE_9 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_9
+#ifndef CONF_DMAC_SRC_INTERFACE_9
+#define CONF_DMAC_SRC_INTERFACE_9 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_9
+#ifndef CONF_DMAC_DES_INTERFACE_9
+#define CONF_DMAC_DES_INTERFACE_9 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_9
+#ifndef CONF_DMAC_SRCINC_9
+#define CONF_DMAC_SRCINC_9 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_9
+#ifndef CONF_DMAC_DSTINC_9
+#define CONF_DMAC_DSTINC_9 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_9
+#ifndef CONF_DMAC_TRANS_TYPE_9
+#define CONF_DMAC_TRANS_TYPE_9 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_9
+#ifndef CONF_DMAC_TRIGSRC_9
+#define CONF_DMAC_TRIGSRC_9 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_9 == 0
+#define CONF_DMAC_TYPE_9 0
+#define CONF_DMAC_DSYNC_9 0
+#elif CONF_DMAC_TRANS_TYPE_9 == 1
+#define CONF_DMAC_TYPE_9 1
+#define CONF_DMAC_DSYNC_9 0
+#elif CONF_DMAC_TRANS_TYPE_9 == 2
+#define CONF_DMAC_TYPE_9 1
+#define CONF_DMAC_DSYNC_9 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_9 == 0xFF
+#define CONF_DMAC_SWREQ_9 1
+#else
+#define CONF_DMAC_SWREQ_9 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_9_SETTINGS == 1 && CONF_DMAC_BEATSIZE_9 != 2 && ((!CONF_DMAC_SRCINC_9) || (!CONF_DMAC_DSTINC_9)))
+#if (!CONF_DMAC_SRCINC_9)
+#define CONF_DMAC_SRC_STRIDE_9 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_9)
+#define CONF_DMAC_DES_STRIDE_9 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_9
+#define CONF_DMAC_SRC_STRIDE_9 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_9
+#define CONF_DMAC_DES_STRIDE_9 0
+#endif
+
+// <e> Channel 10 settings
+// <id> dmac_channel_10_settings
+#ifndef CONF_DMAC_CHANNEL_10_SETTINGS
+#define CONF_DMAC_CHANNEL_10_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_10
+#ifndef CONF_DMAC_BURSTSIZE_10
+#define CONF_DMAC_BURSTSIZE_10 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_10
+#ifndef CONF_DMAC_CHUNKSIZE_10
+#define CONF_DMAC_CHUNKSIZE_10 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_10
+#ifndef CONF_DMAC_BEATSIZE_10
+#define CONF_DMAC_BEATSIZE_10 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_10
+#ifndef CONF_DMAC_SRC_INTERFACE_10
+#define CONF_DMAC_SRC_INTERFACE_10 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_10
+#ifndef CONF_DMAC_DES_INTERFACE_10
+#define CONF_DMAC_DES_INTERFACE_10 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_10
+#ifndef CONF_DMAC_SRCINC_10
+#define CONF_DMAC_SRCINC_10 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_10
+#ifndef CONF_DMAC_DSTINC_10
+#define CONF_DMAC_DSTINC_10 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_10
+#ifndef CONF_DMAC_TRANS_TYPE_10
+#define CONF_DMAC_TRANS_TYPE_10 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_10
+#ifndef CONF_DMAC_TRIGSRC_10
+#define CONF_DMAC_TRIGSRC_10 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_10 == 0
+#define CONF_DMAC_TYPE_10 0
+#define CONF_DMAC_DSYNC_10 0
+#elif CONF_DMAC_TRANS_TYPE_10 == 1
+#define CONF_DMAC_TYPE_10 1
+#define CONF_DMAC_DSYNC_10 0
+#elif CONF_DMAC_TRANS_TYPE_10 == 2
+#define CONF_DMAC_TYPE_10 1
+#define CONF_DMAC_DSYNC_10 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_10 == 0xFF
+#define CONF_DMAC_SWREQ_10 1
+#else
+#define CONF_DMAC_SWREQ_10 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_10_SETTINGS == 1 && CONF_DMAC_BEATSIZE_10 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_10) || (!CONF_DMAC_DSTINC_10)))
+#if (!CONF_DMAC_SRCINC_10)
+#define CONF_DMAC_SRC_STRIDE_10 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_10)
+#define CONF_DMAC_DES_STRIDE_10 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_10
+#define CONF_DMAC_SRC_STRIDE_10 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_10
+#define CONF_DMAC_DES_STRIDE_10 0
+#endif
+
+// <e> Channel 11 settings
+// <id> dmac_channel_11_settings
+#ifndef CONF_DMAC_CHANNEL_11_SETTINGS
+#define CONF_DMAC_CHANNEL_11_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_11
+#ifndef CONF_DMAC_BURSTSIZE_11
+#define CONF_DMAC_BURSTSIZE_11 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_11
+#ifndef CONF_DMAC_CHUNKSIZE_11
+#define CONF_DMAC_CHUNKSIZE_11 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_11
+#ifndef CONF_DMAC_BEATSIZE_11
+#define CONF_DMAC_BEATSIZE_11 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_11
+#ifndef CONF_DMAC_SRC_INTERFACE_11
+#define CONF_DMAC_SRC_INTERFACE_11 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_11
+#ifndef CONF_DMAC_DES_INTERFACE_11
+#define CONF_DMAC_DES_INTERFACE_11 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_11
+#ifndef CONF_DMAC_SRCINC_11
+#define CONF_DMAC_SRCINC_11 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_11
+#ifndef CONF_DMAC_DSTINC_11
+#define CONF_DMAC_DSTINC_11 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_11
+#ifndef CONF_DMAC_TRANS_TYPE_11
+#define CONF_DMAC_TRANS_TYPE_11 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_11
+#ifndef CONF_DMAC_TRIGSRC_11
+#define CONF_DMAC_TRIGSRC_11 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_11 == 0
+#define CONF_DMAC_TYPE_11 0
+#define CONF_DMAC_DSYNC_11 0
+#elif CONF_DMAC_TRANS_TYPE_11 == 1
+#define CONF_DMAC_TYPE_11 1
+#define CONF_DMAC_DSYNC_11 0
+#elif CONF_DMAC_TRANS_TYPE_11 == 2
+#define CONF_DMAC_TYPE_11 1
+#define CONF_DMAC_DSYNC_11 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_11 == 0xFF
+#define CONF_DMAC_SWREQ_11 1
+#else
+#define CONF_DMAC_SWREQ_11 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_11_SETTINGS == 1 && CONF_DMAC_BEATSIZE_11 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_11) || (!CONF_DMAC_DSTINC_11)))
+#if (!CONF_DMAC_SRCINC_11)
+#define CONF_DMAC_SRC_STRIDE_11 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_11)
+#define CONF_DMAC_DES_STRIDE_11 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_11
+#define CONF_DMAC_SRC_STRIDE_11 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_11
+#define CONF_DMAC_DES_STRIDE_11 0
+#endif
+
+// <e> Channel 12 settings
+// <id> dmac_channel_12_settings
+#ifndef CONF_DMAC_CHANNEL_12_SETTINGS
+#define CONF_DMAC_CHANNEL_12_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_12
+#ifndef CONF_DMAC_BURSTSIZE_12
+#define CONF_DMAC_BURSTSIZE_12 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_12
+#ifndef CONF_DMAC_CHUNKSIZE_12
+#define CONF_DMAC_CHUNKSIZE_12 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_12
+#ifndef CONF_DMAC_BEATSIZE_12
+#define CONF_DMAC_BEATSIZE_12 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_12
+#ifndef CONF_DMAC_SRC_INTERFACE_12
+#define CONF_DMAC_SRC_INTERFACE_12 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_12
+#ifndef CONF_DMAC_DES_INTERFACE_12
+#define CONF_DMAC_DES_INTERFACE_12 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_12
+#ifndef CONF_DMAC_SRCINC_12
+#define CONF_DMAC_SRCINC_12 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_12
+#ifndef CONF_DMAC_DSTINC_12
+#define CONF_DMAC_DSTINC_12 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_12
+#ifndef CONF_DMAC_TRANS_TYPE_12
+#define CONF_DMAC_TRANS_TYPE_12 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_12
+#ifndef CONF_DMAC_TRIGSRC_12
+#define CONF_DMAC_TRIGSRC_12 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_12 == 0
+#define CONF_DMAC_TYPE_12 0
+#define CONF_DMAC_DSYNC_12 0
+#elif CONF_DMAC_TRANS_TYPE_12 == 1
+#define CONF_DMAC_TYPE_12 1
+#define CONF_DMAC_DSYNC_12 0
+#elif CONF_DMAC_TRANS_TYPE_12 == 2
+#define CONF_DMAC_TYPE_12 1
+#define CONF_DMAC_DSYNC_12 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_12 == 0xFF
+#define CONF_DMAC_SWREQ_12 1
+#else
+#define CONF_DMAC_SWREQ_12 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_12_SETTINGS == 1 && CONF_DMAC_BEATSIZE_12 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_12) || (!CONF_DMAC_DSTINC_12)))
+#if (!CONF_DMAC_SRCINC_12)
+#define CONF_DMAC_SRC_STRIDE_12 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_12)
+#define CONF_DMAC_DES_STRIDE_12 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_12
+#define CONF_DMAC_SRC_STRIDE_12 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_12
+#define CONF_DMAC_DES_STRIDE_12 0
+#endif
+
+// <e> Channel 13 settings
+// <id> dmac_channel_13_settings
+#ifndef CONF_DMAC_CHANNEL_13_SETTINGS
+#define CONF_DMAC_CHANNEL_13_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_13
+#ifndef CONF_DMAC_BURSTSIZE_13
+#define CONF_DMAC_BURSTSIZE_13 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_13
+#ifndef CONF_DMAC_CHUNKSIZE_13
+#define CONF_DMAC_CHUNKSIZE_13 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_13
+#ifndef CONF_DMAC_BEATSIZE_13
+#define CONF_DMAC_BEATSIZE_13 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_13
+#ifndef CONF_DMAC_SRC_INTERFACE_13
+#define CONF_DMAC_SRC_INTERFACE_13 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_13
+#ifndef CONF_DMAC_DES_INTERFACE_13
+#define CONF_DMAC_DES_INTERFACE_13 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_13
+#ifndef CONF_DMAC_SRCINC_13
+#define CONF_DMAC_SRCINC_13 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_13
+#ifndef CONF_DMAC_DSTINC_13
+#define CONF_DMAC_DSTINC_13 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_13
+#ifndef CONF_DMAC_TRANS_TYPE_13
+#define CONF_DMAC_TRANS_TYPE_13 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_13
+#ifndef CONF_DMAC_TRIGSRC_13
+#define CONF_DMAC_TRIGSRC_13 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_13 == 0
+#define CONF_DMAC_TYPE_13 0
+#define CONF_DMAC_DSYNC_13 0
+#elif CONF_DMAC_TRANS_TYPE_13 == 1
+#define CONF_DMAC_TYPE_13 1
+#define CONF_DMAC_DSYNC_13 0
+#elif CONF_DMAC_TRANS_TYPE_13 == 2
+#define CONF_DMAC_TYPE_13 1
+#define CONF_DMAC_DSYNC_13 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_13 == 0xFF
+#define CONF_DMAC_SWREQ_13 1
+#else
+#define CONF_DMAC_SWREQ_13 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_13_SETTINGS == 1 && CONF_DMAC_BEATSIZE_13 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_13) || (!CONF_DMAC_DSTINC_13)))
+#if (!CONF_DMAC_SRCINC_13)
+#define CONF_DMAC_SRC_STRIDE_13 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_13)
+#define CONF_DMAC_DES_STRIDE_13 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_13
+#define CONF_DMAC_SRC_STRIDE_13 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_13
+#define CONF_DMAC_DES_STRIDE_13 0
+#endif
+
+// <e> Channel 14 settings
+// <id> dmac_channel_14_settings
+#ifndef CONF_DMAC_CHANNEL_14_SETTINGS
+#define CONF_DMAC_CHANNEL_14_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_14
+#ifndef CONF_DMAC_BURSTSIZE_14
+#define CONF_DMAC_BURSTSIZE_14 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_14
+#ifndef CONF_DMAC_CHUNKSIZE_14
+#define CONF_DMAC_CHUNKSIZE_14 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_14
+#ifndef CONF_DMAC_BEATSIZE_14
+#define CONF_DMAC_BEATSIZE_14 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_14
+#ifndef CONF_DMAC_SRC_INTERFACE_14
+#define CONF_DMAC_SRC_INTERFACE_14 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_14
+#ifndef CONF_DMAC_DES_INTERFACE_14
+#define CONF_DMAC_DES_INTERFACE_14 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_14
+#ifndef CONF_DMAC_SRCINC_14
+#define CONF_DMAC_SRCINC_14 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_14
+#ifndef CONF_DMAC_DSTINC_14
+#define CONF_DMAC_DSTINC_14 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_14
+#ifndef CONF_DMAC_TRANS_TYPE_14
+#define CONF_DMAC_TRANS_TYPE_14 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_14
+#ifndef CONF_DMAC_TRIGSRC_14
+#define CONF_DMAC_TRIGSRC_14 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_14 == 0
+#define CONF_DMAC_TYPE_14 0
+#define CONF_DMAC_DSYNC_14 0
+#elif CONF_DMAC_TRANS_TYPE_14 == 1
+#define CONF_DMAC_TYPE_14 1
+#define CONF_DMAC_DSYNC_14 0
+#elif CONF_DMAC_TRANS_TYPE_14 == 2
+#define CONF_DMAC_TYPE_14 1
+#define CONF_DMAC_DSYNC_14 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_14 == 0xFF
+#define CONF_DMAC_SWREQ_14 1
+#else
+#define CONF_DMAC_SWREQ_14 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_14_SETTINGS == 1 && CONF_DMAC_BEATSIZE_14 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_14) || (!CONF_DMAC_DSTINC_14)))
+#if (!CONF_DMAC_SRCINC_14)
+#define CONF_DMAC_SRC_STRIDE_14 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_14)
+#define CONF_DMAC_DES_STRIDE_14 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_14
+#define CONF_DMAC_SRC_STRIDE_14 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_14
+#define CONF_DMAC_DES_STRIDE_14 0
+#endif
+
+// <e> Channel 15 settings
+// <id> dmac_channel_15_settings
+#ifndef CONF_DMAC_CHANNEL_15_SETTINGS
+#define CONF_DMAC_CHANNEL_15_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_15
+#ifndef CONF_DMAC_BURSTSIZE_15
+#define CONF_DMAC_BURSTSIZE_15 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_15
+#ifndef CONF_DMAC_CHUNKSIZE_15
+#define CONF_DMAC_CHUNKSIZE_15 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_15
+#ifndef CONF_DMAC_BEATSIZE_15
+#define CONF_DMAC_BEATSIZE_15 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_15
+#ifndef CONF_DMAC_SRC_INTERFACE_15
+#define CONF_DMAC_SRC_INTERFACE_15 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_15
+#ifndef CONF_DMAC_DES_INTERFACE_15
+#define CONF_DMAC_DES_INTERFACE_15 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_15
+#ifndef CONF_DMAC_SRCINC_15
+#define CONF_DMAC_SRCINC_15 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_15
+#ifndef CONF_DMAC_DSTINC_15
+#define CONF_DMAC_DSTINC_15 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_15
+#ifndef CONF_DMAC_TRANS_TYPE_15
+#define CONF_DMAC_TRANS_TYPE_15 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_15
+#ifndef CONF_DMAC_TRIGSRC_15
+#define CONF_DMAC_TRIGSRC_15 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_15 == 0
+#define CONF_DMAC_TYPE_15 0
+#define CONF_DMAC_DSYNC_15 0
+#elif CONF_DMAC_TRANS_TYPE_15 == 1
+#define CONF_DMAC_TYPE_15 1
+#define CONF_DMAC_DSYNC_15 0
+#elif CONF_DMAC_TRANS_TYPE_15 == 2
+#define CONF_DMAC_TYPE_15 1
+#define CONF_DMAC_DSYNC_15 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_15 == 0xFF
+#define CONF_DMAC_SWREQ_15 1
+#else
+#define CONF_DMAC_SWREQ_15 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_15_SETTINGS == 1 && CONF_DMAC_BEATSIZE_15 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_15) || (!CONF_DMAC_DSTINC_15)))
+#if (!CONF_DMAC_SRCINC_15)
+#define CONF_DMAC_SRC_STRIDE_15 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_15)
+#define CONF_DMAC_DES_STRIDE_15 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_15
+#define CONF_DMAC_SRC_STRIDE_15 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_15
+#define CONF_DMAC_DES_STRIDE_15 0
+#endif
+
+// <e> Channel 16 settings
+// <id> dmac_channel_16_settings
+#ifndef CONF_DMAC_CHANNEL_16_SETTINGS
+#define CONF_DMAC_CHANNEL_16_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_16
+#ifndef CONF_DMAC_BURSTSIZE_16
+#define CONF_DMAC_BURSTSIZE_16 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_16
+#ifndef CONF_DMAC_CHUNKSIZE_16
+#define CONF_DMAC_CHUNKSIZE_16 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_16
+#ifndef CONF_DMAC_BEATSIZE_16
+#define CONF_DMAC_BEATSIZE_16 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_16
+#ifndef CONF_DMAC_SRC_INTERFACE_16
+#define CONF_DMAC_SRC_INTERFACE_16 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_16
+#ifndef CONF_DMAC_DES_INTERFACE_16
+#define CONF_DMAC_DES_INTERFACE_16 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_16
+#ifndef CONF_DMAC_SRCINC_16
+#define CONF_DMAC_SRCINC_16 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_16
+#ifndef CONF_DMAC_DSTINC_16
+#define CONF_DMAC_DSTINC_16 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_16
+#ifndef CONF_DMAC_TRANS_TYPE_16
+#define CONF_DMAC_TRANS_TYPE_16 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_16
+#ifndef CONF_DMAC_TRIGSRC_16
+#define CONF_DMAC_TRIGSRC_16 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_16 == 0
+#define CONF_DMAC_TYPE_16 0
+#define CONF_DMAC_DSYNC_16 0
+#elif CONF_DMAC_TRANS_TYPE_16 == 1
+#define CONF_DMAC_TYPE_16 1
+#define CONF_DMAC_DSYNC_16 0
+#elif CONF_DMAC_TRANS_TYPE_16 == 2
+#define CONF_DMAC_TYPE_16 1
+#define CONF_DMAC_DSYNC_16 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_16 == 0xFF
+#define CONF_DMAC_SWREQ_16 1
+#else
+#define CONF_DMAC_SWREQ_16 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_16_SETTINGS == 1 && CONF_DMAC_BEATSIZE_16 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_16) || (!CONF_DMAC_DSTINC_16)))
+#if (!CONF_DMAC_SRCINC_16)
+#define CONF_DMAC_SRC_STRIDE_16 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_16)
+#define CONF_DMAC_DES_STRIDE_16 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_16
+#define CONF_DMAC_SRC_STRIDE_16 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_16
+#define CONF_DMAC_DES_STRIDE_16 0
+#endif
+
+// <e> Channel 17 settings
+// <id> dmac_channel_17_settings
+#ifndef CONF_DMAC_CHANNEL_17_SETTINGS
+#define CONF_DMAC_CHANNEL_17_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_17
+#ifndef CONF_DMAC_BURSTSIZE_17
+#define CONF_DMAC_BURSTSIZE_17 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_17
+#ifndef CONF_DMAC_CHUNKSIZE_17
+#define CONF_DMAC_CHUNKSIZE_17 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_17
+#ifndef CONF_DMAC_BEATSIZE_17
+#define CONF_DMAC_BEATSIZE_17 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_17
+#ifndef CONF_DMAC_SRC_INTERFACE_17
+#define CONF_DMAC_SRC_INTERFACE_17 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_17
+#ifndef CONF_DMAC_DES_INTERFACE_17
+#define CONF_DMAC_DES_INTERFACE_17 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_17
+#ifndef CONF_DMAC_SRCINC_17
+#define CONF_DMAC_SRCINC_17 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_17
+#ifndef CONF_DMAC_DSTINC_17
+#define CONF_DMAC_DSTINC_17 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_17
+#ifndef CONF_DMAC_TRANS_TYPE_17
+#define CONF_DMAC_TRANS_TYPE_17 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_17
+#ifndef CONF_DMAC_TRIGSRC_17
+#define CONF_DMAC_TRIGSRC_17 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_17 == 0
+#define CONF_DMAC_TYPE_17 0
+#define CONF_DMAC_DSYNC_17 0
+#elif CONF_DMAC_TRANS_TYPE_17 == 1
+#define CONF_DMAC_TYPE_17 1
+#define CONF_DMAC_DSYNC_17 0
+#elif CONF_DMAC_TRANS_TYPE_17 == 2
+#define CONF_DMAC_TYPE_17 1
+#define CONF_DMAC_DSYNC_17 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_17 == 0xFF
+#define CONF_DMAC_SWREQ_17 1
+#else
+#define CONF_DMAC_SWREQ_17 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_17_SETTINGS == 1 && CONF_DMAC_BEATSIZE_17 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_17) || (!CONF_DMAC_DSTINC_17)))
+#if (!CONF_DMAC_SRCINC_17)
+#define CONF_DMAC_SRC_STRIDE_17 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_17)
+#define CONF_DMAC_DES_STRIDE_17 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_17
+#define CONF_DMAC_SRC_STRIDE_17 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_17
+#define CONF_DMAC_DES_STRIDE_17 0
+#endif
+
+// <e> Channel 18 settings
+// <id> dmac_channel_18_settings
+#ifndef CONF_DMAC_CHANNEL_18_SETTINGS
+#define CONF_DMAC_CHANNEL_18_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_18
+#ifndef CONF_DMAC_BURSTSIZE_18
+#define CONF_DMAC_BURSTSIZE_18 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_18
+#ifndef CONF_DMAC_CHUNKSIZE_18
+#define CONF_DMAC_CHUNKSIZE_18 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_18
+#ifndef CONF_DMAC_BEATSIZE_18
+#define CONF_DMAC_BEATSIZE_18 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_18
+#ifndef CONF_DMAC_SRC_INTERFACE_18
+#define CONF_DMAC_SRC_INTERFACE_18 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_18
+#ifndef CONF_DMAC_DES_INTERFACE_18
+#define CONF_DMAC_DES_INTERFACE_18 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_18
+#ifndef CONF_DMAC_SRCINC_18
+#define CONF_DMAC_SRCINC_18 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_18
+#ifndef CONF_DMAC_DSTINC_18
+#define CONF_DMAC_DSTINC_18 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_18
+#ifndef CONF_DMAC_TRANS_TYPE_18
+#define CONF_DMAC_TRANS_TYPE_18 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_18
+#ifndef CONF_DMAC_TRIGSRC_18
+#define CONF_DMAC_TRIGSRC_18 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_18 == 0
+#define CONF_DMAC_TYPE_18 0
+#define CONF_DMAC_DSYNC_18 0
+#elif CONF_DMAC_TRANS_TYPE_18 == 1
+#define CONF_DMAC_TYPE_18 1
+#define CONF_DMAC_DSYNC_18 0
+#elif CONF_DMAC_TRANS_TYPE_18 == 2
+#define CONF_DMAC_TYPE_18 1
+#define CONF_DMAC_DSYNC_18 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_18 == 0xFF
+#define CONF_DMAC_SWREQ_18 1
+#else
+#define CONF_DMAC_SWREQ_18 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_18_SETTINGS == 1 && CONF_DMAC_BEATSIZE_18 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_18) || (!CONF_DMAC_DSTINC_18)))
+#if (!CONF_DMAC_SRCINC_18)
+#define CONF_DMAC_SRC_STRIDE_18 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_18)
+#define CONF_DMAC_DES_STRIDE_18 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_18
+#define CONF_DMAC_SRC_STRIDE_18 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_18
+#define CONF_DMAC_DES_STRIDE_18 0
+#endif
+
+// <e> Channel 19 settings
+// <id> dmac_channel_19_settings
+#ifndef CONF_DMAC_CHANNEL_19_SETTINGS
+#define CONF_DMAC_CHANNEL_19_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_19
+#ifndef CONF_DMAC_BURSTSIZE_19
+#define CONF_DMAC_BURSTSIZE_19 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_19
+#ifndef CONF_DMAC_CHUNKSIZE_19
+#define CONF_DMAC_CHUNKSIZE_19 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_19
+#ifndef CONF_DMAC_BEATSIZE_19
+#define CONF_DMAC_BEATSIZE_19 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_19
+#ifndef CONF_DMAC_SRC_INTERFACE_19
+#define CONF_DMAC_SRC_INTERFACE_19 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_19
+#ifndef CONF_DMAC_DES_INTERFACE_19
+#define CONF_DMAC_DES_INTERFACE_19 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_19
+#ifndef CONF_DMAC_SRCINC_19
+#define CONF_DMAC_SRCINC_19 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_19
+#ifndef CONF_DMAC_DSTINC_19
+#define CONF_DMAC_DSTINC_19 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_19
+#ifndef CONF_DMAC_TRANS_TYPE_19
+#define CONF_DMAC_TRANS_TYPE_19 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_19
+#ifndef CONF_DMAC_TRIGSRC_19
+#define CONF_DMAC_TRIGSRC_19 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_19 == 0
+#define CONF_DMAC_TYPE_19 0
+#define CONF_DMAC_DSYNC_19 0
+#elif CONF_DMAC_TRANS_TYPE_19 == 1
+#define CONF_DMAC_TYPE_19 1
+#define CONF_DMAC_DSYNC_19 0
+#elif CONF_DMAC_TRANS_TYPE_19 == 2
+#define CONF_DMAC_TYPE_19 1
+#define CONF_DMAC_DSYNC_19 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_19 == 0xFF
+#define CONF_DMAC_SWREQ_19 1
+#else
+#define CONF_DMAC_SWREQ_19 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_19_SETTINGS == 1 && CONF_DMAC_BEATSIZE_19 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_19) || (!CONF_DMAC_DSTINC_19)))
+#if (!CONF_DMAC_SRCINC_19)
+#define CONF_DMAC_SRC_STRIDE_19 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_19)
+#define CONF_DMAC_DES_STRIDE_19 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_19
+#define CONF_DMAC_SRC_STRIDE_19 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_19
+#define CONF_DMAC_DES_STRIDE_19 0
+#endif
+
+// <e> Channel 20 settings
+// <id> dmac_channel_20_settings
+#ifndef CONF_DMAC_CHANNEL_20_SETTINGS
+#define CONF_DMAC_CHANNEL_20_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_20
+#ifndef CONF_DMAC_BURSTSIZE_20
+#define CONF_DMAC_BURSTSIZE_20 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_20
+#ifndef CONF_DMAC_CHUNKSIZE_20
+#define CONF_DMAC_CHUNKSIZE_20 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_20
+#ifndef CONF_DMAC_BEATSIZE_20
+#define CONF_DMAC_BEATSIZE_20 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_20
+#ifndef CONF_DMAC_SRC_INTERFACE_20
+#define CONF_DMAC_SRC_INTERFACE_20 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_20
+#ifndef CONF_DMAC_DES_INTERFACE_20
+#define CONF_DMAC_DES_INTERFACE_20 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_20
+#ifndef CONF_DMAC_SRCINC_20
+#define CONF_DMAC_SRCINC_20 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_20
+#ifndef CONF_DMAC_DSTINC_20
+#define CONF_DMAC_DSTINC_20 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_20
+#ifndef CONF_DMAC_TRANS_TYPE_20
+#define CONF_DMAC_TRANS_TYPE_20 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_20
+#ifndef CONF_DMAC_TRIGSRC_20
+#define CONF_DMAC_TRIGSRC_20 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_20 == 0
+#define CONF_DMAC_TYPE_20 0
+#define CONF_DMAC_DSYNC_20 0
+#elif CONF_DMAC_TRANS_TYPE_20 == 1
+#define CONF_DMAC_TYPE_20 1
+#define CONF_DMAC_DSYNC_20 0
+#elif CONF_DMAC_TRANS_TYPE_20 == 2
+#define CONF_DMAC_TYPE_20 1
+#define CONF_DMAC_DSYNC_20 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_20 == 0xFF
+#define CONF_DMAC_SWREQ_20 1
+#else
+#define CONF_DMAC_SWREQ_20 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_20_SETTINGS == 1 && CONF_DMAC_BEATSIZE_20 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_20) || (!CONF_DMAC_DSTINC_20)))
+#if (!CONF_DMAC_SRCINC_20)
+#define CONF_DMAC_SRC_STRIDE_20 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_20)
+#define CONF_DMAC_DES_STRIDE_20 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_20
+#define CONF_DMAC_SRC_STRIDE_20 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_20
+#define CONF_DMAC_DES_STRIDE_20 0
+#endif
+
+// <e> Channel 21 settings
+// <id> dmac_channel_21_settings
+#ifndef CONF_DMAC_CHANNEL_21_SETTINGS
+#define CONF_DMAC_CHANNEL_21_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_21
+#ifndef CONF_DMAC_BURSTSIZE_21
+#define CONF_DMAC_BURSTSIZE_21 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_21
+#ifndef CONF_DMAC_CHUNKSIZE_21
+#define CONF_DMAC_CHUNKSIZE_21 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_21
+#ifndef CONF_DMAC_BEATSIZE_21
+#define CONF_DMAC_BEATSIZE_21 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_21
+#ifndef CONF_DMAC_SRC_INTERFACE_21
+#define CONF_DMAC_SRC_INTERFACE_21 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_21
+#ifndef CONF_DMAC_DES_INTERFACE_21
+#define CONF_DMAC_DES_INTERFACE_21 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_21
+#ifndef CONF_DMAC_SRCINC_21
+#define CONF_DMAC_SRCINC_21 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_21
+#ifndef CONF_DMAC_DSTINC_21
+#define CONF_DMAC_DSTINC_21 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_21
+#ifndef CONF_DMAC_TRANS_TYPE_21
+#define CONF_DMAC_TRANS_TYPE_21 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_21
+#ifndef CONF_DMAC_TRIGSRC_21
+#define CONF_DMAC_TRIGSRC_21 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_21 == 0
+#define CONF_DMAC_TYPE_21 0
+#define CONF_DMAC_DSYNC_21 0
+#elif CONF_DMAC_TRANS_TYPE_21 == 1
+#define CONF_DMAC_TYPE_21 1
+#define CONF_DMAC_DSYNC_21 0
+#elif CONF_DMAC_TRANS_TYPE_21 == 2
+#define CONF_DMAC_TYPE_21 1
+#define CONF_DMAC_DSYNC_21 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_21 == 0xFF
+#define CONF_DMAC_SWREQ_21 1
+#else
+#define CONF_DMAC_SWREQ_21 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_21_SETTINGS == 1 && CONF_DMAC_BEATSIZE_21 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_21) || (!CONF_DMAC_DSTINC_21)))
+#if (!CONF_DMAC_SRCINC_21)
+#define CONF_DMAC_SRC_STRIDE_21 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_21)
+#define CONF_DMAC_DES_STRIDE_21 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_21
+#define CONF_DMAC_SRC_STRIDE_21 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_21
+#define CONF_DMAC_DES_STRIDE_21 0
+#endif
+
+// <e> Channel 22 settings
+// <id> dmac_channel_22_settings
+#ifndef CONF_DMAC_CHANNEL_22_SETTINGS
+#define CONF_DMAC_CHANNEL_22_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_22
+#ifndef CONF_DMAC_BURSTSIZE_22
+#define CONF_DMAC_BURSTSIZE_22 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_22
+#ifndef CONF_DMAC_CHUNKSIZE_22
+#define CONF_DMAC_CHUNKSIZE_22 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_22
+#ifndef CONF_DMAC_BEATSIZE_22
+#define CONF_DMAC_BEATSIZE_22 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_22
+#ifndef CONF_DMAC_SRC_INTERFACE_22
+#define CONF_DMAC_SRC_INTERFACE_22 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_22
+#ifndef CONF_DMAC_DES_INTERFACE_22
+#define CONF_DMAC_DES_INTERFACE_22 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_22
+#ifndef CONF_DMAC_SRCINC_22
+#define CONF_DMAC_SRCINC_22 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_22
+#ifndef CONF_DMAC_DSTINC_22
+#define CONF_DMAC_DSTINC_22 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_22
+#ifndef CONF_DMAC_TRANS_TYPE_22
+#define CONF_DMAC_TRANS_TYPE_22 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_22
+#ifndef CONF_DMAC_TRIGSRC_22
+#define CONF_DMAC_TRIGSRC_22 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_22 == 0
+#define CONF_DMAC_TYPE_22 0
+#define CONF_DMAC_DSYNC_22 0
+#elif CONF_DMAC_TRANS_TYPE_22 == 1
+#define CONF_DMAC_TYPE_22 1
+#define CONF_DMAC_DSYNC_22 0
+#elif CONF_DMAC_TRANS_TYPE_22 == 2
+#define CONF_DMAC_TYPE_22 1
+#define CONF_DMAC_DSYNC_22 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_22 == 0xFF
+#define CONF_DMAC_SWREQ_22 1
+#else
+#define CONF_DMAC_SWREQ_22 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_22_SETTINGS == 1 && CONF_DMAC_BEATSIZE_22 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_22) || (!CONF_DMAC_DSTINC_22)))
+#if (!CONF_DMAC_SRCINC_22)
+#define CONF_DMAC_SRC_STRIDE_22 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_22)
+#define CONF_DMAC_DES_STRIDE_22 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_22
+#define CONF_DMAC_SRC_STRIDE_22 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_22
+#define CONF_DMAC_DES_STRIDE_22 0
+#endif
+
+// <e> Channel 23 settings
+// <id> dmac_channel_23_settings
+#ifndef CONF_DMAC_CHANNEL_23_SETTINGS
+#define CONF_DMAC_CHANNEL_23_SETTINGS 0
+#endif
+
+// <o> Burst Size
+// <0x0=> 1 burst size
+// <0x1=> 4 burst size
+// <0x2=> 8 burst size
+// <0x3=> 16 burst size
+// <i> Define the memory burst size
+// <id> dmac_burstsize_23
+#ifndef CONF_DMAC_BURSTSIZE_23
+#define CONF_DMAC_BURSTSIZE_23 0x0
+#endif
+
+// <o> Chunk Size
+// <0x0=> 1 data transferred
+// <0x1=> 2 data transferred
+// <0x2=> 4 data transferred
+// <0x3=> 8 data transferred
+// <0x4=> 16 data transferred
+// <i> Define the peripheral chunk size
+// <id> dmac_chunksize_23
+#ifndef CONF_DMAC_CHUNKSIZE_23
+#define CONF_DMAC_CHUNKSIZE_23 0x0
+#endif
+
+// <o> Beat Size
+// <0=> 8-bit bus transfer
+// <1=> 16-bit bus transfer
+// <2=> 32-bit bus transfer
+// <i> Defines the size of one beat
+// <id> dmac_beatsize_23
+#ifndef CONF_DMAC_BEATSIZE_23
+#define CONF_DMAC_BEATSIZE_23 0x0
+#endif
+
+// <o> Source Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is read through the system bus interface 0 or 1
+// <id> dma_src_interface_23
+#ifndef CONF_DMAC_SRC_INTERFACE_23
+#define CONF_DMAC_SRC_INTERFACE_23 0x0
+#endif
+
+// <o> Destination Interface Identifier
+// <0x0=> AHB_IF0
+// <0x1=> AHB_IF1
+// <i> Define the data is written through the system bus interface 0 or 1
+// <id> dma_des_interface_23
+#ifndef CONF_DMAC_DES_INTERFACE_23
+#define CONF_DMAC_DES_INTERFACE_23 0x0
+#endif
+
+// <q> Source Address Increment
+// <i> Indicates whether the source address incremented as beat size or not
+// <id> dmac_srcinc_23
+#ifndef CONF_DMAC_SRCINC_23
+#define CONF_DMAC_SRCINC_23 0
+#endif
+
+// <q> Destination Address Increment
+// <i> Indicates whether the destination address incremented as beat size or not
+// <id> dmac_dstinc_23
+#ifndef CONF_DMAC_DSTINC_23
+#define CONF_DMAC_DSTINC_23 0
+#endif
+
+// <o> Transfer Type
+// <0x0=> Memory to Memory Transfer
+// <0x1=> Peripheral to Memory Transfer
+// <0x2=> Memory to Peripheral Transfer
+// <i> Define the data transfer type
+// <id> dma_trans_type_23
+#ifndef CONF_DMAC_TRANS_TYPE_23
+#define CONF_DMAC_TRANS_TYPE_23 0x0
+#endif
+
+// <o> Trigger source
+// <0xFF=> Software Trigger
+// <0x00=> HSMCI TX/RX Trigger
+// <0x01=> SPI0 TX Trigger
+// <0x02=> SPI0 RX Trigger
+// <0x03=> SPI1 TX Trigger
+// <0x04=> SPI1 RX Trigger
+// <0x05=> QSPI TX Trigger
+// <0x06=> QSPI RX Trigger
+// <0x07=> USART0 TX Trigger
+// <0x08=> USART0 RX Trigger
+// <0x09=> USART1 TX Trigger
+// <0x0A=> USART1 RX Trigger
+// <0x0B=> USART2 TX Trigger
+// <0x0C=> USART2 RX Trigger
+// <0x0D=> PWM0 TX Trigger
+// <0x0E=> TWIHS0 TX Trigger
+// <0x0F=> TWIHS0 RX Trigger
+// <0x10=> TWIHS1 TX Trigger
+// <0x11=> TWIHS1 RX Trigger
+// <0x12=> TWIHS2 TX Trigger
+// <0x13=> TWIHS2 RX Trigger
+// <0x14=> UART0 TX Trigger
+// <0x15=> UART0 RX Trigger
+// <0x16=> UART1 TX Trigger
+// <0x17=> UART1 RX Trigger
+// <0x18=> UART2 TX Trigger
+// <0x19=> UART2 RX Trigger
+// <0x1A=> UART3 TX Trigger
+// <0x1B=> UART3 RX Trigger
+// <0x1C=> UART4 TX Trigger
+// <0x1D=> UART4 RX Trigger
+// <0x1E=> DACC TX Trigger
+// <0x20=> SSC TX Trigger
+// <0x21=> SSC RX Trigger
+// <0x22=> PIOA RX Trigger
+// <0x23=> AFEC0 RX Trigger
+// <0x24=> AFEC1 RX Trigger
+// <0x25=> AES TX Trigger
+// <0x26=> AES RX Trigger
+// <0x27=> PWM1 TX Trigger
+// <0x28=> TC0 RX Trigger
+// <0x29=> TC3 RX Trigger
+// <0x2A=> TC6 RX Trigger
+// <0x2B=> TC9 RX Trigger
+// <0x2C=> I2SC0 TX Left Trigger
+// <0x2D=> I2SC0 RX Left Trigger
+// <0x2E=> I2SC1 TX Left Trigger
+// <0x2F=> I2SC1 RX Left Trigger
+// <0x30=> I2SC0 TX Right Trigger
+// <0x31=> I2SC0 RX Right Trigger
+// <0x32=> I2SC1 TX Right Trigger
+// <0x33=> I2SC1 RX Right Trigger
+// <i> Define the DMA trigger source
+// <id> dmac_trifsrc_23
+#ifndef CONF_DMAC_TRIGSRC_23
+#define CONF_DMAC_TRIGSRC_23 0xff
+#endif
+
+// </e>
+
+#if CONF_DMAC_TRANS_TYPE_23 == 0
+#define CONF_DMAC_TYPE_23 0
+#define CONF_DMAC_DSYNC_23 0
+#elif CONF_DMAC_TRANS_TYPE_23 == 1
+#define CONF_DMAC_TYPE_23 1
+#define CONF_DMAC_DSYNC_23 0
+#elif CONF_DMAC_TRANS_TYPE_23 == 2
+#define CONF_DMAC_TYPE_23 1
+#define CONF_DMAC_DSYNC_23 1
+#endif
+
+#if CONF_DMAC_TRIGSRC_23 == 0xFF
+#define CONF_DMAC_SWREQ_23 1
+#else
+#define CONF_DMAC_SWREQ_23 0
+#endif
+
+/* Errata: If XDMA is used to transfer 8-bit or 16-bit data in fixed source address
+ * or fixed destination address mode, source and destination addresses are incremented
+ * by 8-bit or 16-bit.
+ * Workaround: The user can fix the problem by setting the source addressing mode to
+ * use microblock and data striding with microblock stride set to 0 and data stride set to -1.
+ */
+#if (CONF_DMAC_CHANNEL_23_SETTINGS == 1 && CONF_DMAC_BEATSIZE_23 != 2                                                  \
+     && ((!CONF_DMAC_SRCINC_23) || (!CONF_DMAC_DSTINC_23)))
+#if (!CONF_DMAC_SRCINC_23)
+#define CONF_DMAC_SRC_STRIDE_23 ((int16_t)(-1))
+#endif
+#if (!CONF_DMAC_DSTINC_23)
+#define CONF_DMAC_DES_STRIDE_23 ((int16_t)(-1))
+#endif
+#endif
+
+#ifndef CONF_DMAC_SRC_STRIDE_23
+#define CONF_DMAC_SRC_STRIDE_23 0
+#endif
+
+#ifndef CONF_DMAC_DES_STRIDE_23
+#define CONF_DMAC_DES_STRIDE_23 0
+#endif
+
+// </e>
+
+// <<< end of configuration section >>>
+
+#endif // HPL_XDMAC_CONFIG_H
diff --git a/hw/bsp/same7x/boards/same70_xplained/peripheral_clk_config.h b/hw/bsp/same7x/boards/same70_xplained/peripheral_clk_config.h
new file mode 100644
index 000000000..84756f5ac
--- /dev/null
+++ b/hw/bsp/same7x/boards/same70_xplained/peripheral_clk_config.h
@@ -0,0 +1,126 @@
+/* Auto-generated config file peripheral_clk_config.h */
+#ifndef PERIPHERAL_CLK_CONFIG_H
+#define PERIPHERAL_CLK_CONFIG_H
+
+// <<< Use Configuration Wizard in Context Menu >>>
+
+/**
+ * \def CONF_HCLK_FREQUENCY
+ * \brief HCLK's Clock frequency
+ */
+#ifndef CONF_HCLK_FREQUENCY
+#define CONF_HCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_FCLK_FREQUENCY
+ * \brief FCLK's Clock frequency
+ */
+#ifndef CONF_FCLK_FREQUENCY
+#define CONF_FCLK_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_CPU_FREQUENCY
+ * \brief CPU's Clock frequency
+ */
+#ifndef CONF_CPU_FREQUENCY
+#define CONF_CPU_FREQUENCY 300000000
+#endif
+
+/**
+ * \def CONF_SLCK_FREQUENCY
+ * \brief Slow Clock frequency
+ */
+#define CONF_SLCK_FREQUENCY 0
+
+/**
+ * \def CONF_MCK_FREQUENCY
+ * \brief Master Clock frequency
+ */
+#define CONF_MCK_FREQUENCY 150000000
+
+/**
+ * \def CONF_PCK6_FREQUENCY
+ * \brief Programmable Clock Controller 6 frequency
+ */
+#define CONF_PCK6_FREQUENCY 1714285
+
+// <h> USART Clock Settings
+// <o> USART Clock source
+
+// <0=> Master Clock (MCK)
+// <1=> MCK / 8 for USART
+// <2=> Programmable Clock Controller 4 (PMC_PCK4)
+// <3=> External Clock
+// <i> This defines the clock source for the USART
+// <id> usart_clock_source
+#ifndef CONF_USART1_CK_SRC
+#define CONF_USART1_CK_SRC 0
+#endif
+
+// <o> USART External Clock Input on SCK <1-4294967295>
+// <i> Inputs the external clock frequency on SCK
+// <id> usart_clock_freq
+#ifndef CONF_USART1_SCK_FREQ
+#define CONF_USART1_SCK_FREQ 10000000
+#endif
+
+// </h>
+
+/**
+ * \def USART FREQUENCY
+ * \brief USART's Clock frequency
+ */
+#ifndef CONF_USART1_FREQUENCY
+#define CONF_USART1_FREQUENCY 150000000
+#endif
+
+#ifndef CONF_SRC_USB_480M
+#define CONF_SRC_USB_480M 0
+#endif
+
+#ifndef CONF_SRC_USB_48M
+#define CONF_SRC_USB_48M 1
+#endif
+
+// <y> USB Full/Low Speed Clock
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_fsls_clock_source
+// <i> 48MHz clock source for low speed and full speed.
+// <i> It must be available when low speed is supported by host driver.
+// <i> It must be available when low power mode is selected.
+#ifndef CONF_USBHS_FSLS_SRC
+#define CONF_USBHS_FSLS_SRC CONF_SRC_USB_48M
+#endif
+
+// <y> USB Clock Source(Normal/Low-power Mode Selection)
+// <CONF_SRC_USB_480M"> USB High Speed Clock (USB_480M)
+// <CONF_SRC_USB_48M"> USB Clock Controller (USB_48M)
+// <id> usb_clock_source
+// <i> Select the clock source for USB.
+// <i> In normal mode, use "USB High Speed Clock (USB_480M)".
+// <i> In low-power mode, use "USB Clock Controller (USB_48M)".
+#ifndef CONF_USBHS_SRC
+#define CONF_USBHS_SRC CONF_SRC_USB_480M
+#endif
+
+/**
+ * \def CONF_USBHS_FSLS_FREQUENCY
+ * \brief USBHS's Full/Low Speed Clock Source frequency
+ */
+#ifndef CONF_USBHS_FSLS_FREQUENCY
+#define CONF_USBHS_FSLS_FREQUENCY 48000000
+#endif
+
+/**
+ * \def CONF_USBHS_FREQUENCY
+ * \brief USBHS's Selected Clock Source frequency
+ */
+#ifndef CONF_USBHS_FREQUENCY
+#define CONF_USBHS_FREQUENCY 480000000
+#endif
+
+// <<< end of configuration section >>>
+
+#endif // PERIPHERAL_CLK_CONFIG_H
diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c
new file mode 100644
index 000000000..572c83588
--- /dev/null
+++ b/hw/bsp/same7x/family.c
@@ -0,0 +1,196 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to do so, subject to the
+ * following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: Microchip
+*/
+
+#include "bsp/board_api.h"
+#include "sam.h"
+
+#include "hal/include/hal_gpio.h"
+#include "hal/include/hal_init.h"
+#include "hal/include/hal_usart_async.h"
+#include "hpl/pmc/hpl_pmc.h"
+#include "hpl/usart/hpl_usart_base.h"
+#include "peripheral_clk_config.h"
+
+static inline void board_vbus_set(uint8_t rhport, bool state);
+void _init(void);
+#include "board.h"
+
+#ifndef LED_STATE_ON
+  #define LED_STATE_ON 1
+#endif
+
+#ifndef LED_PORT_CLOCK
+  #define LED_PORT_CLOCK ID_PIOA
+#endif
+
+#ifndef BUTTON_PORT_CLOCK
+  #define BUTTON_PORT_CLOCK ID_PIOA
+#endif
+
+#ifndef UART_PORT_CLOCK
+  #define UART_PORT_CLOCK ID_USART1
+#endif
+
+#ifndef BOARD_USART
+  #define BOARD_USART USART1
+#endif
+
+#ifndef BOARD_UART_DESCRIPTOR
+  #define BOARD_UART_DESCRIPTOR edbg_com
+#endif
+
+#ifndef BOARD_UART_BUFFER
+  #define BOARD_UART_BUFFER edbg_com_buffer
+#endif
+
+#ifndef BUTTON_STATE_ACTIVE
+  #define BUTTON_STATE_ACTIVE 0
+#endif
+
+#ifndef UART_TX_FUNCTION
+  #define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#endif
+
+#ifndef UART_RX_FUNCTION
+  #define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
+#endif
+
+#ifndef UART_BUFFER_SIZE
+  #define UART_BUFFER_SIZE 64
+#endif
+
+#define LED_STATE_OFF (1 - LED_STATE_ON)
+
+static struct usart_async_descriptor BOARD_UART_DESCRIPTOR;
+static uint8_t BOARD_UART_BUFFER[UART_BUFFER_SIZE];
+static volatile bool uart_busy = false;
+
+static void tx_complete_cb(const struct usart_async_descriptor *const io_descr) {
+  (void) io_descr;
+  uart_busy = false;
+}
+
+void board_init(void) {
+  init_mcu();
+
+  /* Disable Watchdog */
+  hri_wdt_set_MR_WDDIS_bit(WDT);
+
+#ifdef LED_PIN
+  _pmc_enable_periph_clock(LED_PORT_CLOCK);
+  gpio_set_pin_level(LED_PIN, LED_STATE_OFF);
+  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_function(LED_PIN, GPIO_PIN_FUNCTION_OFF);
+#endif
+
+#ifdef BUTTON_PIN
+  _pmc_enable_periph_clock(BUTTON_PORT_CLOCK);
+  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
+  gpio_set_pin_function(BUTTON_PIN, GPIO_PIN_FUNCTION_OFF);
+#endif
+
+  _pmc_enable_periph_clock(UART_PORT_CLOCK);
+  gpio_set_pin_function(UART_RX_PIN, UART_RX_FUNCTION);
+  gpio_set_pin_function(UART_TX_PIN, UART_TX_FUNCTION);
+
+  usart_async_init(&BOARD_UART_DESCRIPTOR, BOARD_USART, BOARD_UART_BUFFER, sizeof(BOARD_UART_BUFFER), _usart_get_usart_async());
+  usart_async_set_baud_rate(&BOARD_UART_DESCRIPTOR, CFG_BOARD_UART_BAUDRATE);
+  usart_async_register_callback(&BOARD_UART_DESCRIPTOR, USART_ASYNC_TXC_CB, tx_complete_cb);
+  usart_async_enable(&BOARD_UART_DESCRIPTOR);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer (SystemCoreClock may not be correct after init)
+  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#endif
+
+  // Enable USB clock
+  _pmc_enable_periph_clock(ID_USBHS);
+
+#if CFG_TUH_ENABLED
+  board_vbus_set(0, true);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// USB Interrupt Handler
+//--------------------------------------------------------------------+
+void USBHS_Handler(void) {
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#ifdef LED_PIN
+  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : LED_STATE_OFF);
+#else
+  (void) state;
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
+#else
+  return 0;
+#endif
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+  while (uart_busy) {}
+  uart_busy = true;
+
+  io_write(&BOARD_UART_DESCRIPTOR.io, buf, len);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+void _init(void) {
+}
diff --git a/hw/bsp/same7x/family.cmake b/hw/bsp/same7x/family.cmake
new file mode 100644
index 000000000..a1eb197a3
--- /dev/null
+++ b/hw/bsp/same7x/family.cmake
@@ -0,0 +1,121 @@
+include_guard()
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/microchip/same70)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m7 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMX7X CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/same70b/gcc/gcc/startup_same70q21b.c)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  if (NOT DEFINED LD_FILE_Clang)
+    set(LD_FILE_Clang ${LD_FILE_GNU})
+  endif ()
+
+  if (NOT DEFINED LD_FILE_IAR)
+    set(LD_FILE_IAR ${LD_FILE_GNU})
+  endif ()
+
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/same70b/gcc/system_same70q21b.c
+    ${SDK_DIR}/hpl/core/hpl_init.c
+    ${SDK_DIR}/hpl/usart/hpl_usart.c
+    ${SDK_DIR}/hpl/pmc/hpl_pmc.c
+    ${SDK_DIR}/hal/src/hal_usart_async.c
+    ${SDK_DIR}/hal/src/hal_io.c
+    ${SDK_DIR}/hal/src/hal_atomic.c
+    ${SDK_DIR}/hal/utils/src/utils_ringbuffer.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}
+    ${SDK_DIR}/config
+    ${SDK_DIR}/same70b/include
+    ${SDK_DIR}/hal/include
+    ${SDK_DIR}/hal/utils/include
+    ${SDK_DIR}/hpl/core
+    ${SDK_DIR}/hpl/pio
+    ${SDK_DIR}/hpl/pmc
+    ${SDK_DIR}/hri
+    ${SDK_DIR}/CMSIS/Core/Include
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -Wno-error=unused-parameter
+    -Wno-error=cast-align
+    -Wno-error=redundant-decls
+    -Wno-error=cast-qual
+    )
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  add_board_target(board_${BOARD})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMX7X)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/microchip/samx7x/dcd_samx7x.c
+    )
+
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  target_compile_options(${TARGET} PUBLIC
+    -Wno-error=unused-parameter
+    -Wno-error=cast-align
+    -Wno-error=redundant-decls
+    -Wno-error=cast-qual
+    )
+
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/same7x/family.mk b/hw/bsp/same7x/family.mk
new file mode 100644
index 000000000..c8fa74d71
--- /dev/null
+++ b/hw/bsp/same7x/family.mk
@@ -0,0 +1,56 @@
+SDK_DIR = hw/mcu/microchip/same70
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m7
+
+CFLAGS += \
+  -mthumb \
+  -mabi=aapcs \
+  -mcpu=cortex-m7 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -DCFG_TUSB_MCU=OPT_MCU_SAMX7X
+
+# suppress following warnings from mcu driver
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slows down compilation significantly
+CFLAGS_SKIP += -Wcast-qual
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# All source paths should be relative to the top level.
+LD_FILE = $(SDK_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
+
+SRC_C += \
+	src/portable/microchip/samx7x/dcd_samx7x.c \
+	$(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c \
+	$(SDK_DIR)/same70b/gcc/system_same70q21b.c \
+	$(SDK_DIR)/hpl/core/hpl_init.c \
+	$(SDK_DIR)/hpl/usart/hpl_usart.c \
+	$(SDK_DIR)/hpl/pmc/hpl_pmc.c \
+	$(SDK_DIR)/hal/src/hal_usart_async.c \
+	$(SDK_DIR)/hal/src/hal_io.c \
+	$(SDK_DIR)/hal/src/hal_atomic.c \
+	$(SDK_DIR)/hal/utils/src/utils_ringbuffer.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_DIR) \
+	$(TOP)/$(SDK_DIR)/config \
+	$(TOP)/$(SDK_DIR)/same70b/include \
+	$(TOP)/$(SDK_DIR)/hal/include \
+	$(TOP)/$(SDK_DIR)/hal/utils/include \
+	$(TOP)/$(SDK_DIR)/hpl/core \
+	$(TOP)/$(SDK_DIR)/hpl/pio \
+	$(TOP)/$(SDK_DIR)/hpl/pmc \
+	$(TOP)/$(SDK_DIR)/hri \
+	$(TOP)/$(SDK_DIR)/CMSIS/Core/Include
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
+
+# For flash-jlink target
+flash: $(BUILD)/$(PROJECT).bin
+	edbg --verbose -t same70 -pv -f $<
-- 
cgit v1.3.1


From c48bbfab5e9ae9a417e30b0f9c0280d6f662b01c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 17:53:55 +0700
Subject: more make refactor

---
 examples/build_system/make/rules.mk                | 195 ---------------------
 examples/device/audio_4_channel_mic/Makefile       |   6 +-
 .../device/audio_4_channel_mic_freertos/Makefile   |   6 +-
 examples/device/audio_test/Makefile                |   6 +-
 examples/device/audio_test_freertos/Makefile       |   6 +-
 examples/device/audio_test_multi_rate/Makefile     |   6 +-
 examples/device/board_test/Makefile                |   6 +-
 examples/device/cdc_dual_ports/Makefile            |   6 +-
 examples/device/cdc_msc/Makefile                   |   6 +-
 examples/device/cdc_msc_freertos/Makefile          |   6 +-
 examples/device/cdc_uac2/Makefile                  |   6 +-
 examples/device/dfu/Makefile                       |   6 +-
 examples/device/dfu_runtime/Makefile               |   6 +-
 examples/device/dynamic_configuration/Makefile     |   6 +-
 examples/device/hid_boot_interface/Makefile        |   6 +-
 examples/device/hid_composite/Makefile             |   6 +-
 examples/device/hid_composite_freertos/Makefile    |   6 +-
 examples/device/hid_generic_inout/Makefile         |   6 +-
 examples/device/hid_multiple_interface/Makefile    |   6 +-
 examples/device/midi_test/Makefile                 |   6 +-
 examples/device/midi_test_freertos/Makefile        |   6 +-
 examples/device/msc_dual_lun/Makefile              |   6 +-
 examples/device/mtp/Makefile                       |   6 +-
 examples/device/net_lwip_webserver/Makefile        |   5 +-
 examples/device/uac2_headset/Makefile              |   6 +-
 examples/device/uac2_speaker_fb/Makefile           |   6 +-
 examples/device/usbtmc/Makefile                    |   6 +-
 examples/device/video_capture/Makefile             |   6 +-
 examples/device/video_capture_2ch/Makefile         |   6 +-
 examples/device/webusb_serial/Makefile             |   6 +-
 examples/dual/host_hid_to_device_cdc/Makefile      |   6 +-
 examples/dual/host_info_to_device_cdc/Makefile     |   6 +-
 examples/host/bare_api/Makefile                    |   6 +-
 examples/host/cdc_msc_hid/Makefile                 |   6 +-
 examples/host/cdc_msc_hid_freertos/Makefile        |   6 +-
 examples/host/device_info/Makefile                 |   6 +-
 examples/host/hid_controller/Makefile              |   6 +-
 examples/host/midi_rx/Makefile                     |   6 +-
 examples/host/msc_file_explorer/Makefile           |   5 +-
 examples/typec/power_delivery/Makefile             |  10 +-
 hw/bsp/family_rules.mk                             | 177 +++++++++++++++++++
 hw/bsp/family_support.mk                           |   8 +-
 test/fuzz/device/cdc/Makefile                      |   6 +-
 test/fuzz/device/msc/Makefile                      |   6 +-
 test/fuzz/device/net/Makefile                      |   5 +-
 test/fuzz/make.mk                                  |   6 +-
 46 files changed, 310 insertions(+), 329 deletions(-)
 delete mode 100644 examples/build_system/make/rules.mk
 create mode 100644 hw/bsp/family_rules.mk

(limited to 'hw')

diff --git a/examples/build_system/make/rules.mk b/examples/build_system/make/rules.mk
deleted file mode 100644
index 86de17b6c..000000000
--- a/examples/build_system/make/rules.mk
+++ /dev/null
@@ -1,195 +0,0 @@
-# ---------------------------------------
-# Common make rules for all examples
-# ---------------------------------------
-
-# Set all as default goal
-.DEFAULT_GOAL := all
-
-# ---------------- GNU Make Start -----------------------
-# ESP32-Sx and RP2040 has its own CMake build system
-ifeq (,$(findstring $(FAMILY),espressif rp2040))
-
-# ---------------------------------------
-# Rules
-# ---------------------------------------
-
-all: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex size
-
-uf2: $(BUILD)/$(PROJECT).uf2
-
-# We set vpath to point to the top of the tree so that the source files
-# can be located. By following this scheme, it allows a single build rule
-# to be used to compile all .c files.
-vpath %.c . $(TOP)
-vpath %.s . $(TOP)
-vpath %.S . $(TOP)
-
-include ${TOP}/examples/build_system/make/toolchain/$(TOOLCHAIN)_rules.mk
-
-# ---------------------------------------
-# Compiler Flags
-# ---------------------------------------
-
-CFLAGS += $(addprefix -I,$(INC))
-
-# Verbose mode
-ifeq ("$(V)","1")
-$(info CFLAGS  $(CFLAGS) ) $(info )
-$(info LDFLAGS $(LDFLAGS)) $(info )
-$(info ASFLAGS $(ASFLAGS)) $(info )
-endif
-
-
-OBJ_DIRS = $(sort $(dir $(OBJ)))
-$(OBJ): | $(OBJ_DIRS)
-$(OBJ_DIRS):
-ifeq ($(CMDEXE),1)
-	-@$(MKDIR) $(subst /,\,$@)
-else
-	@$(MKDIR) -p $@
-endif
-
-# UF2 generation, iMXRT need to strip to text only before conversion
-ifneq ($(FAMILY),imxrt)
-$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).hex
-	@echo CREATE $@
-	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $^
-endif
-
-copy-artifact: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex $(BUILD)/$(PROJECT).uf2
-
-endif
-# ---------------- GNU Make End -----------------------
-
-.PHONY: clean
-clean:
-ifeq ($(CMDEXE),1)
-	rd /S /Q $(subst /,\,$(BUILD))
-else
-	$(RM) -rf $(BUILD)
-endif
-
-# get depenecies
-.PHONY: get-deps
-get-deps:
-	$(PYTHON) $(TOP)/tools/get_deps.py ${FAMILY}
-
-.PHONY: size
-size: $(BUILD)/$(PROJECT).elf
-	-@echo ''
-	@$(SIZE) $<
-	-@echo ''
-
-# linkermap must be install previously at https://github.com/hathach/linkermap
-linkermap: $(BUILD)/$(PROJECT).elf
-	@linkermap -v $<.map
-
-# ---------------------------------------
-# Flash Targets
-# ---------------------------------------
-
-# --------------- Jlink -----------------
-ifeq ($(OS),Windows_NT)
-  JLINKEXE = JLink.exe
-else
-  JLINKEXE = JLinkExe
-endif
-
-# Jlink Interface
-JLINK_IF ?= swd
-
-# Jlink script
-$(BUILD)/$(BOARD).jlink: $(BUILD)/$(PROJECT).hex
-	@echo halt > $@
-	@echo loadfile $^ >> $@
-	@echo r >> $@
-	@echo go >> $@
-	@echo exit >> $@
-
-# Flash using jlink
-flash-jlink: $(BUILD)/$(BOARD).jlink
-	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $<
-
-# --------------- stm32 cube programmer -----------------
-# Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
-flash-stlink: $(BUILD)/$(PROJECT).elf
-	STM32_Programmer_CLI --connect port=swd --write $< --go
-
-# --------------- xfel -----------------
-$(BUILD)/$(PROJECT)-sunxi.bin: $(BUILD)/$(PROJECT).bin
-	$(PYTHON) $(TOP)/tools/mksunxi.py $< $@
-
-flash-xfel: $(BUILD)/$(PROJECT)-sunxi.bin
-	xfel spinor write 0 $<
-	xfel reset
-
-# --------------- pyocd -----------------
-PYOCD_OPTION ?=
-flash-pyocd: $(BUILD)/$(PROJECT).hex
-	pyocd flash -t $(PYOCD_TARGET) $(PYOCD_OPTION) $<
-	#pyocd reset -t $(PYOCD_TARGET)
-
-# --------------- openocd -----------------
-OPENOCD_OPTION ?=
-flash-openocd: $(BUILD)/$(PROJECT).elf
-	openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
-
-# --------------- openocd-wch -----------------
-# wch-linke is not supported yet in official openOCD yet. We need to either use
-# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
-# 2. compiled from https://github.com/hathach/riscv-openocd-wch or
-#    https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
-#    with  ./configure --disable-werror --enable-wlinke --enable-ch347=no
-OPENOCD_WCH ?= /home/${USER}/app/riscv-openocd-wch/src/openocd
-OPENOCD_WCH_OPTION ?=
-flash-openocd-wch: $(BUILD)/$(PROJECT).elf
-	$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit
-
-# --------------- wlink-rs -----------------
-# flash with https://github.com/ch32-rs/wlink
-WLINK_RS ?= wlink
-flash-wlink-rs: $(BUILD)/$(PROJECT).elf
-	$(WLINK_RS) flash $<
-
-# --------------- dfu-util -----------------
-DFU_UTIL_OPTION ?= -a 0
-flash-dfu-util: $(BUILD)/$(PROJECT).bin
-	dfu-util -R $(DFU_UTIL_OPTION) -D $<
-
-# --------------- Black Magic -----------------
-# This symlink is created by https://github.com/blacksphere/blackmagic/blob/master/driver/99-blackmagic.rules
-BMP ?= /dev/ttyBmpGdb
-
-flash-bmp: $(BUILD)/$(PROJECT).elf
-	$(GDB) --batch -ex 'target extended-remote $(BMP)' -ex 'monitor swdp_scan' -ex 'attach 1' -ex load  $<
-
-debug-bmp: $(BUILD)/$(PROJECT).elf
-	$(GDB) -ex 'target extended-remote $(BMP)' -ex 'monitor swdp_scan' -ex 'attach 1' $<
-
-# --------------- TI Uniflash -----------------
-DSLITE ?= dslite.sh
-flash-uniflash: $(BUILD)/$(PROJECT).hex
-	${DSLITE} ${UNIFLASH_OPTION} -f $<
-
-#-------------- Artifacts --------------
-
-# Create binary directory
-$(BIN):
-ifeq ($(CMDEXE),1)
-	@$(MKDIR) $(subst /,\,$@)
-else
-	@$(MKDIR) -p $@
-endif
-
-# Copy binaries .elf, .bin, .hex, .uf2 to BIN for upload
-# due to large size of combined artifacts, only uf2 is uploaded for now
-copy-artifact: $(BIN)
-	@$(CP) $(BUILD)/$(PROJECT).uf2 $(BIN)
-	#@$(CP) $(BUILD)/$(PROJECT).bin $(BIN)
-	#@$(CP) $(BUILD)/$(PROJECT).hex $(BIN)
-	#@$(CP) $(BUILD)/$(PROJECT).elf $(BIN)
-
-# Print out the value of a make variable.
-# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile
-print-%:
-	@echo $* = $($*)
diff --git a/examples/device/audio_4_channel_mic/Makefile b/examples/device/audio_4_channel_mic/Makefile
index 4cf2d9e49..31e2c6f44 100644
--- a/examples/device/audio_4_channel_mic/Makefile
+++ b/examples/device/audio_4_channel_mic/Makefile
@@ -2,13 +2,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
   src/main.c \
   src/usb_descriptors.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/audio_4_channel_mic_freertos/Makefile b/examples/device/audio_4_channel_mic_freertos/Makefile
index 13c637977..3c421af74 100644
--- a/examples/device/audio_4_channel_mic_freertos/Makefile
+++ b/examples/device/audio_4_channel_mic_freertos/Makefile
@@ -3,13 +3,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/audio_test/Makefile b/examples/device/audio_test/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/audio_test/Makefile
+++ b/examples/device/audio_test/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/audio_test_freertos/Makefile b/examples/device/audio_test_freertos/Makefile
index 13c637977..3c421af74 100644
--- a/examples/device/audio_test_freertos/Makefile
+++ b/examples/device/audio_test_freertos/Makefile
@@ -3,13 +3,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/audio_test_multi_rate/Makefile b/examples/device/audio_test_multi_rate/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/audio_test_multi_rate/Makefile
+++ b/examples/device/audio_test_multi_rate/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/board_test/Makefile b/examples/device/board_test/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/board_test/Makefile
+++ b/examples/device/board_test/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/cdc_dual_ports/Makefile b/examples/device/cdc_dual_ports/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/cdc_dual_ports/Makefile
+++ b/examples/device/cdc_dual_ports/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/cdc_msc/Makefile b/examples/device/cdc_msc/Makefile
index eb548f018..de50d118f 100644
--- a/examples/device/cdc_msc/Makefile
+++ b/examples/device/cdc_msc/Makefile
@@ -2,7 +2,7 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
@@ -10,6 +10,6 @@ EXAMPLE_SOURCE += \
   src/msc_disk.c \
   src/usb_descriptors.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/cdc_msc_freertos/Makefile b/examples/device/cdc_msc_freertos/Makefile
index 41960e64c..dbab13395 100644
--- a/examples/device/cdc_msc_freertos/Makefile
+++ b/examples/device/cdc_msc_freertos/Makefile
@@ -3,7 +3,7 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
@@ -11,6 +11,6 @@ EXAMPLE_SOURCE = \
 	src/msc_disk.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/cdc_uac2/Makefile b/examples/device/cdc_uac2/Makefile
index 539077d6c..6276be8d0 100644
--- a/examples/device/cdc_uac2/Makefile
+++ b/examples/device/cdc_uac2/Makefile
@@ -2,7 +2,7 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
@@ -11,6 +11,6 @@ EXAMPLE_SOURCE += \
   src/uac2_app.c \
   src/usb_descriptors.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/dfu/Makefile b/examples/device/dfu/Makefile
index ad7a37b79..9e1eab4a2 100644
--- a/examples/device/dfu/Makefile
+++ b/examples/device/dfu/Makefile
@@ -2,13 +2,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/dfu_runtime/Makefile b/examples/device/dfu_runtime/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/dfu_runtime/Makefile
+++ b/examples/device/dfu_runtime/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/dynamic_configuration/Makefile b/examples/device/dynamic_configuration/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/dynamic_configuration/Makefile
+++ b/examples/device/dynamic_configuration/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/hid_boot_interface/Makefile b/examples/device/hid_boot_interface/Makefile
index ad7a37b79..9e1eab4a2 100644
--- a/examples/device/hid_boot_interface/Makefile
+++ b/examples/device/hid_boot_interface/Makefile
@@ -2,13 +2,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/hid_composite/Makefile b/examples/device/hid_composite/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/hid_composite/Makefile
+++ b/examples/device/hid_composite/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/hid_composite_freertos/Makefile b/examples/device/hid_composite_freertos/Makefile
index 13c637977..3c421af74 100644
--- a/examples/device/hid_composite_freertos/Makefile
+++ b/examples/device/hid_composite_freertos/Makefile
@@ -3,13 +3,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
 	src/main.c \
 	src/usb_descriptors.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/hid_generic_inout/Makefile b/examples/device/hid_generic_inout/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/hid_generic_inout/Makefile
+++ b/examples/device/hid_generic_inout/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/hid_multiple_interface/Makefile b/examples/device/hid_multiple_interface/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/hid_multiple_interface/Makefile
+++ b/examples/device/hid_multiple_interface/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/midi_test/Makefile b/examples/device/midi_test/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/midi_test/Makefile
+++ b/examples/device/midi_test/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/midi_test_freertos/Makefile b/examples/device/midi_test_freertos/Makefile
index 704d319d2..ebacfecdf 100644
--- a/examples/device/midi_test_freertos/Makefile
+++ b/examples/device/midi_test_freertos/Makefile
@@ -3,13 +3,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
   src/main.c \
   src/usb_descriptors.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/msc_dual_lun/Makefile b/examples/device/msc_dual_lun/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/msc_dual_lun/Makefile
+++ b/examples/device/msc_dual_lun/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/mtp/Makefile b/examples/device/mtp/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/mtp/Makefile
+++ b/examples/device/mtp/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index 82c946b14..9d8e8ec77 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -8,7 +8,6 @@ CFLAGS_GCC += \
 
 INC += \
   src \
-  $(TOP)/hw \
   $(TOP)/lib/lwip/src/include \
   $(TOP)/lib/lwip/src/include/ipv4 \
   $(TOP)/lib/lwip/src/include/lwip/apps \
@@ -16,7 +15,7 @@ INC += \
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
 # lwip sources
 SRC_C += \
@@ -66,4 +65,4 @@ SRC_C += \
   lib/networking/dnserver.c \
   lib/networking/rndis_reports.c
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/uac2_headset/Makefile b/examples/device/uac2_headset/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/uac2_headset/Makefile
+++ b/examples/device/uac2_headset/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/uac2_speaker_fb/Makefile b/examples/device/uac2_speaker_fb/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/uac2_speaker_fb/Makefile
+++ b/examples/device/uac2_speaker_fb/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/usbtmc/Makefile b/examples/device/usbtmc/Makefile
index 72bd56ede..1a4b428dc 100644
--- a/examples/device/usbtmc/Makefile
+++ b/examples/device/usbtmc/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/video_capture/Makefile b/examples/device/video_capture/Makefile
index 288e9ffc3..6c248ab7b 100644
--- a/examples/device/video_capture/Makefile
+++ b/examples/device/video_capture/Makefile
@@ -9,10 +9,10 @@ endif
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/video_capture_2ch/Makefile b/examples/device/video_capture_2ch/Makefile
index 288e9ffc3..6c248ab7b 100644
--- a/examples/device/video_capture_2ch/Makefile
+++ b/examples/device/video_capture_2ch/Makefile
@@ -9,10 +9,10 @@ endif
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/device/webusb_serial/Makefile b/examples/device/webusb_serial/Makefile
index e8cacd359..035e90308 100644
--- a/examples/device/webusb_serial/Makefile
+++ b/examples/device/webusb_serial/Makefile
@@ -2,10 +2,10 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/dual/host_hid_to_device_cdc/Makefile b/examples/dual/host_hid_to_device_cdc/Makefile
index 76c6db0ac..a51251bf9 100644
--- a/examples/dual/host_hid_to_device_cdc/Makefile
+++ b/examples/dual/host_hid_to_device_cdc/Makefile
@@ -2,11 +2,11 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
 CFLAGS_GCC += -Wno-error=cast-align -Wno-error=null-dereference
 
@@ -15,4 +15,4 @@ SRC_C += \
 	src/host/hub.c \
 	src/host/usbh.c
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/dual/host_info_to_device_cdc/Makefile b/examples/dual/host_info_to_device_cdc/Makefile
index 071185c88..659cf6ff9 100644
--- a/examples/dual/host_info_to_device_cdc/Makefile
+++ b/examples/dual/host_info_to_device_cdc/Makefile
@@ -2,11 +2,11 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
 CFLAGS_GCC += -Wno-error=cast-align -Wno-error=null-dereference
 
@@ -14,4 +14,4 @@ SRC_C += \
 	src/host/hub.c \
 	src/host/usbh.c
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/bare_api/Makefile b/examples/host/bare_api/Makefile
index e6408c77a..f8292385e 100644
--- a/examples/host/bare_api/Makefile
+++ b/examples/host/bare_api/Makefile
@@ -2,12 +2,12 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
 	src/main.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/cdc_msc_hid/Makefile b/examples/host/cdc_msc_hid/Makefile
index b6036fa26..d72e91e74 100644
--- a/examples/host/cdc_msc_hid/Makefile
+++ b/examples/host/cdc_msc_hid/Makefile
@@ -2,7 +2,7 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
@@ -11,6 +11,6 @@ EXAMPLE_SOURCE = \
   src/main.c \
   src/msc_app.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/cdc_msc_hid_freertos/Makefile b/examples/host/cdc_msc_hid_freertos/Makefile
index 4e8c8b116..2e323ed56 100644
--- a/examples/host/cdc_msc_hid_freertos/Makefile
+++ b/examples/host/cdc_msc_hid_freertos/Makefile
@@ -3,7 +3,7 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE = \
@@ -12,6 +12,6 @@ EXAMPLE_SOURCE = \
   src/main.c \
   src/msc_app.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/device_info/Makefile b/examples/host/device_info/Makefile
index e6408c77a..f8292385e 100644
--- a/examples/host/device_info/Makefile
+++ b/examples/host/device_info/Makefile
@@ -2,12 +2,12 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
 	src/main.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/hid_controller/Makefile b/examples/host/hid_controller/Makefile
index f82054e8c..732520c63 100644
--- a/examples/host/hid_controller/Makefile
+++ b/examples/host/hid_controller/Makefile
@@ -2,13 +2,13 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
 	src/hid_app.c \
 	src/main.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/midi_rx/Makefile b/examples/host/midi_rx/Makefile
index e6408c77a..f8292385e 100644
--- a/examples/host/midi_rx/Makefile
+++ b/examples/host/midi_rx/Makefile
@@ -2,12 +2,12 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
 EXAMPLE_SOURCE += \
 	src/main.c
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/msc_file_explorer/Makefile b/examples/host/msc_file_explorer/Makefile
index 0f87d848d..39d00d982 100644
--- a/examples/host/msc_file_explorer/Makefile
+++ b/examples/host/msc_file_explorer/Makefile
@@ -4,7 +4,6 @@ FATFS_PATH = lib/fatfs/source
 
 INC += \
 	src \
-	$(TOP)/hw \
 	$(TOP)/$(FATFS_PATH) \
 	$(TOP)/lib/embedded-cli \
 
@@ -13,7 +12,7 @@ EXAMPLE_SOURCE = \
   src/main.c \
   src/msc_app.c \
 
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
 # FatFS source
 SRC_C += \
@@ -24,4 +23,4 @@ SRC_C += \
 # suppress warning caused by fatfs
 CFLAGS_GCC += -Wno-error=cast-qual
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/typec/power_delivery/Makefile b/examples/typec/power_delivery/Makefile
index e8cacd359..7f65c689a 100644
--- a/examples/typec/power_delivery/Makefile
+++ b/examples/typec/power_delivery/Makefile
@@ -2,10 +2,12 @@ include ../../../hw/bsp/family_support.mk
 
 INC += \
   src \
-  $(TOP)/hw \
+
 
 # Example source
-EXAMPLE_SOURCE += $(wildcard src/*.c)
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(EXAMPLE_SOURCE))
+EXAMPLE_SOURCE += \
+  src/main.c
+
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-include ../../build_system/make/rules.mk
+include ../../../hw/bsp/family_rules.mk
diff --git a/hw/bsp/family_rules.mk b/hw/bsp/family_rules.mk
new file mode 100644
index 000000000..ccf49dd0e
--- /dev/null
+++ b/hw/bsp/family_rules.mk
@@ -0,0 +1,177 @@
+# ---------------------------------------
+# Common make rules for all examples
+# ---------------------------------------
+
+# Set all as default goal
+.DEFAULT_GOAL := all
+
+# ---------------- GNU Make Start -----------------------
+# ESP32-Sx and RP2040 has its own CMake build system
+ifeq (,$(findstring $(FAMILY),espressif rp2040))
+
+# ---------------------------------------
+# Rules
+# ---------------------------------------
+
+all: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex size
+
+uf2: $(BUILD)/$(PROJECT).uf2
+
+# We set vpath to point to the top of the tree so that the source files
+# can be located. By following this scheme, it allows a single build rule
+# to be used to compile all .c files.
+vpath %.c . $(TOP)
+vpath %.s . $(TOP)
+vpath %.S . $(TOP)
+
+include ${TOP}/examples/build_system/make/toolchain/$(TOOLCHAIN)_rules.mk
+
+# ---------------------------------------
+# Compiler Flags
+# ---------------------------------------
+
+CFLAGS += $(addprefix -I,$(INC))
+
+# Verbose mode
+ifeq ("$(V)","1")
+$(info CFLAGS  $(CFLAGS) ) $(info )
+$(info LDFLAGS $(LDFLAGS)) $(info )
+$(info ASFLAGS $(ASFLAGS)) $(info )
+endif
+
+
+OBJ_DIRS = $(sort $(dir $(OBJ)))
+$(OBJ): | $(OBJ_DIRS)
+$(OBJ_DIRS):
+ifeq ($(CMDEXE),1)
+	-@$(MKDIR) $(subst /,\,$@)
+else
+	@$(MKDIR) -p $@
+endif
+
+# UF2 generation, iMXRT need to strip to text only before conversion
+ifneq ($(FAMILY),imxrt)
+$(BUILD)/$(PROJECT).uf2: $(BUILD)/$(PROJECT).hex
+	@echo CREATE $@
+	$(PYTHON) $(TOP)/tools/uf2/utils/uf2conv.py -f $(UF2_FAMILY_ID) -c -o $@ $^
+endif
+
+copy-artifact: $(BUILD)/$(PROJECT).bin $(BUILD)/$(PROJECT).hex $(BUILD)/$(PROJECT).uf2
+
+endif
+# ---------------- GNU Make End -----------------------
+
+.PHONY: clean
+clean:
+ifeq ($(CMDEXE),1)
+	rd /S /Q $(subst /,\,$(BUILD))
+else
+	$(RM) -rf $(BUILD)
+endif
+
+# get depenecies
+.PHONY: get-deps
+get-deps:
+	$(PYTHON) $(TOP)/tools/get_deps.py ${FAMILY}
+
+.PHONY: size
+size: $(BUILD)/$(PROJECT).elf
+	-@echo ''
+	@$(SIZE) $<
+	-@echo ''
+
+# linkermap must be install previously at https://github.com/hathach/linkermap
+linkermap: $(BUILD)/$(PROJECT).elf
+	@linkermap -v $<.map
+
+# ---------------------------------------
+# Flash Targets
+# ---------------------------------------
+
+# --------------- Jlink -----------------
+ifeq ($(OS),Windows_NT)
+  JLINKEXE = JLink.exe
+else
+  JLINKEXE = JLinkExe
+endif
+
+# Jlink Interface
+JLINK_IF ?= swd
+
+# Jlink script
+$(BUILD)/$(BOARD).jlink: $(BUILD)/$(PROJECT).hex
+	@echo halt > $@
+	@echo loadfile $^ >> $@
+	@echo r >> $@
+	@echo go >> $@
+	@echo exit >> $@
+
+# Flash using jlink
+flash-jlink: $(BUILD)/$(BOARD).jlink
+	$(JLINKEXE) -device $(JLINK_DEVICE) -if $(JLINK_IF) -JTAGConf -1,-1 -speed auto -CommandFile $<
+
+# --------------- stm32 cube programmer -----------------
+# Flash STM32 MCU using stlink with STM32 Cube Programmer CLI
+flash-stlink: $(BUILD)/$(PROJECT).elf
+	STM32_Programmer_CLI --connect port=swd --write $< --go
+
+# --------------- xfel -----------------
+$(BUILD)/$(PROJECT)-sunxi.bin: $(BUILD)/$(PROJECT).bin
+	$(PYTHON) $(TOP)/tools/mksunxi.py $< $@
+
+flash-xfel: $(BUILD)/$(PROJECT)-sunxi.bin
+	xfel spinor write 0 $<
+	xfel reset
+
+# --------------- pyocd -----------------
+PYOCD_OPTION ?=
+flash-pyocd: $(BUILD)/$(PROJECT).hex
+	pyocd flash -t $(PYOCD_TARGET) $(PYOCD_OPTION) $<
+	#pyocd reset -t $(PYOCD_TARGET)
+
+# --------------- openocd -----------------
+OPENOCD_OPTION ?=
+flash-openocd: $(BUILD)/$(PROJECT).elf
+	openocd $(OPENOCD_OPTION) -c "program $< verify reset exit"
+
+# --------------- openocd-wch -----------------
+# wch-linke is not supported yet in official openOCD yet. We need to either use
+# 1. download openocd as part of mounriver studio http://www.mounriver.com/download or
+# 2. compiled from https://github.com/hathach/riscv-openocd-wch or
+#    https://github.com/dragonlock2/miscboards/blob/main/wch/SDK/riscv-openocd.tar.xz
+#    with  ./configure --disable-werror --enable-wlinke --enable-ch347=no
+OPENOCD_WCH ?= /home/${USER}/app/riscv-openocd-wch/src/openocd
+OPENOCD_WCH_OPTION ?=
+flash-openocd-wch: $(BUILD)/$(PROJECT).elf
+	$(OPENOCD_WCH) $(OPENOCD_WCH_OPTION) -c init -c halt -c "flash write_image $<" -c reset -c exit
+
+# --------------- wlink-rs -----------------
+# flash with https://github.com/ch32-rs/wlink
+WLINK_RS ?= wlink
+flash-wlink-rs: $(BUILD)/$(PROJECT).elf
+	$(WLINK_RS) flash $<
+
+# --------------- dfu-util -----------------
+DFU_UTIL_OPTION ?= -a 0
+flash-dfu-util: $(BUILD)/$(PROJECT).bin
+	dfu-util -R $(DFU_UTIL_OPTION) -D $<
+
+# --------------- Black Magic -----------------
+# This symlink is created by https://github.com/blacksphere/blackmagic/blob/master/driver/99-blackmagic.rules
+BMP ?= /dev/ttyBmpGdb
+
+flash-bmp: $(BUILD)/$(PROJECT).elf
+	$(GDB) --batch -ex 'target extended-remote $(BMP)' -ex 'monitor swdp_scan' -ex 'attach 1' -ex load  $<
+
+debug-bmp: $(BUILD)/$(PROJECT).elf
+	$(GDB) -ex 'target extended-remote $(BMP)' -ex 'monitor swdp_scan' -ex 'attach 1' $<
+
+# --------------- TI Uniflash -----------------
+DSLITE ?= dslite.sh
+flash-uniflash: $(BUILD)/$(PROJECT).hex
+	${DSLITE} ${UNIFLASH_OPTION} -f $<
+
+# Print out the value of a make variable.
+# https://stackoverflow.com/questions/16467718/how-to-print-out-a-variable-in-makefile
+print-%:
+	@echo $* = $($*)
diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
index 757982b85..2e236dc4a 100644
--- a/hw/bsp/family_support.mk
+++ b/hw/bsp/family_support.mk
@@ -22,7 +22,7 @@ ifndef TOOLCHAIN
   TOOLCHAIN = gcc
 endif
 
-#-------------- TOP and CURRENT_PATH ------------
+#-------------- TOP and EXAMPLE_PATH ------------
 
 # Set TOP to be the path to get from the current directory (where make was invoked) to the top of the tree.
 # $(lastword $(MAKEFILE_LIST)) returns the name of this makefile relative to where make was invoked.
@@ -31,8 +31,8 @@ THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
 # Set TOP to an absolute path
 TOP = $(abspath $(subst family_support.mk,../..,$(THIS_MAKEFILE)))
 
-# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
-CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
+# Set EXAMPLE_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc
+EXAMPLE_PATH = $(subst $(TOP)/,,$(abspath .))
 
 #-------------- Linux/Windows ------------
 # Detect whether shell style is windows or not
@@ -62,7 +62,6 @@ endif
 BUILD := _build/$(BOARD)
 
 PROJECT := $(notdir $(CURDIR))
-BIN := $(TOP)/_bin/$(BOARD)/$(notdir $(CURDIR))
 
 #-------------------------------------------------------------
 # Board / Family
@@ -108,6 +107,7 @@ SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(BOARD_PATH)/*.c))
 INC += \
   $(TOP)/$(FAMILY_PATH) \
   $(TOP)/src \
+  $(TOP)/hw \
 
 BOARD_UPPER = $(call to_upper,$(BOARD))
 CFLAGS += -DBOARD_$(BOARD_UPPER)
diff --git a/test/fuzz/device/cdc/Makefile b/test/fuzz/device/cdc/Makefile
index 7071df057..d448907f0 100644
--- a/test/fuzz/device/cdc/Makefile
+++ b/test/fuzz/device/cdc/Makefile
@@ -2,10 +2,10 @@ include ../../make.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.c))
-SRC_CXX += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.cc))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.c))
+SRC_CXX += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.cc))
 
 include ../../rules.mk
diff --git a/test/fuzz/device/msc/Makefile b/test/fuzz/device/msc/Makefile
index 7071df057..d448907f0 100644
--- a/test/fuzz/device/msc/Makefile
+++ b/test/fuzz/device/msc/Makefile
@@ -2,10 +2,10 @@ include ../../make.mk
 
 INC += \
 	src \
-	$(TOP)/hw \
+
 
 # Example source
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.c))
-SRC_CXX += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.cc))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.c))
+SRC_CXX += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.cc))
 
 include ../../rules.mk
diff --git a/test/fuzz/device/net/Makefile b/test/fuzz/device/net/Makefile
index 2161ad3f1..45c684eec 100644
--- a/test/fuzz/device/net/Makefile
+++ b/test/fuzz/device/net/Makefile
@@ -8,15 +8,14 @@ CFLAGS += \
 
 INC += \
   src \
-  $(TOP)/hw \
   $(TOP)/lib/lwip/src/include \
   $(TOP)/lib/lwip/src/include/ipv4 \
   $(TOP)/lib/lwip/src/include/lwip/apps \
   $(TOP)/lib/networking
 
 # Example source
-SRC_C += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.c))
-SRC_CXX += $(addprefix $(CURRENT_PATH)/, $(wildcard src/*.cc))
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.c))
+SRC_CXX += $(addprefix $(EXAMPLE_PATH)/, $(wildcard src/*.cc))
 
 # lwip sources
 SRC_C += \
diff --git a/test/fuzz/make.mk b/test/fuzz/make.mk
index e9aa80bf1..733a57134 100644
--- a/test/fuzz/make.mk
+++ b/test/fuzz/make.mk
@@ -2,7 +2,7 @@
 # Common make definition for all examples
 # ---------------------------------------
 
-#-------------- TOP and CURRENT_PATH ------------
+#-------------- TOP and EXAMPLE_PATH ------------
 
 # Set TOP to be the path to get from the current directory (where make was
 # invoked) to the top of the tree. $(lastword $(MAKEFILE_LIST)) returns
@@ -13,8 +13,8 @@ THIS_MAKEFILE := $(lastword $(MAKEFILE_LIST))
 # and Set TOP to an absolute path
 TOP = $(abspath $(subst make.mk,../..,$(THIS_MAKEFILE)))
 
-# Set CURRENT_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
-CURRENT_PATH = $(subst $(TOP)/,,$(abspath .))
+# Set EXAMPLE_PATH to the relative path from TOP to the current directory, ie examples/device/cdc_msc_freertos
+EXAMPLE_PATH = $(subst $(TOP)/,,$(abspath .))
 
 # Detect whether shell style is windows or not
 # https://stackoverflow.com/questions/714100/os-detecting-makefile/52062069#52062069
-- 
cgit v1.3.1


From 4bdd08ed2dacaf22ce2a442f8e13c97b03dfc2cb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 19:41:04 +0700
Subject: fix missing prototypes

---
 hw/bsp/at32f402_405/at32f402_405_int.h   |  6 ++++++
 hw/bsp/at32f402_405/family.c             | 15 +++++++--------
 hw/bsp/at32f403a_407/at32f403a_407_int.h |  6 ++++++
 hw/bsp/at32f403a_407/family.c            |  2 ++
 hw/bsp/at32f413/at32f413_int.h           |  6 ++++++
 hw/bsp/at32f413/family.c                 |  2 ++
 hw/bsp/at32f415/at32f415_int.h           |  3 +++
 hw/bsp/at32f415/family.c                 |  2 ++
 hw/bsp/at32f423/at32f423_int.h           |  3 +++
 hw/bsp/at32f423/family.c                 |  2 ++
 hw/bsp/at32f425/at32f425_int.h           |  3 +++
 hw/bsp/at32f425/family.c                 |  2 ++
 hw/bsp/at32f435_437/at32f435_437_int.h   |  5 +++++
 hw/bsp/at32f435_437/family.c             |  2 ++
 hw/bsp/nrf/family.c                      |  2 --
 hw/bsp/nrf/family.cmake                  | 11 ++++++++---
 16 files changed, 59 insertions(+), 13 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/at32f402_405_int.h b/hw/bsp/at32f402_405/at32f402_405_int.h
index 207a7d6df..82f924b61 100644
--- a/hw/bsp/at32f402_405/at32f402_405_int.h
+++ b/hw/bsp/at32f402_405/at32f402_405_int.h
@@ -48,6 +48,12 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void OTGFS1_IRQHandler(void);
+void OTGHS_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+void OTGHS_WKUP_IRQHandler(void);
+
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index cb5987cd4..6f3196744 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -29,6 +29,8 @@
 */
 
 #include "at32f402_405_clock.h"
+#include "at32f402_405_int.h"
+#include "at32f403a_407_usb.h"
 #include "bsp/board_api.h"
 #include "board.h"
 
@@ -40,20 +42,16 @@ void usb_gpio_config(void);
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void OTGFS1_IRQHandler(void)
-{
+void OTGFS1_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
-void OTGHS_IRQHandler(void)
-{
+void OTGHS_IRQHandler(void) {
   tusb_int_handler(1, true);
 }
-void OTGFS1_WKUP_IRQHandler(void)
-{
+void OTGFS1_WKUP_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
-void OTGHS_WKUP_IRQHandler(void)
-{
+void OTGHS_WKUP_IRQHandler(void) {
   tusb_int_handler(1, true);
 }
 
@@ -278,6 +276,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f403a_407/at32f403a_407_int.h b/hw/bsp/at32f403a_407/at32f403a_407_int.h
index 6d85c70ca..242a4abe1 100644
--- a/hw/bsp/at32f403a_407/at32f403a_407_int.h
+++ b/hw/bsp/at32f403a_407/at32f403a_407_int.h
@@ -48,6 +48,12 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void USBFS_H_CAN1_TX_IRQHandler(void);
+void USBFS_L_CAN1_RX0_IRQHandler(void);
+void USBFS_MAPH_IRQHandler(void);
+void USBFS_MAPL_IRQHandler(void);
+void USBFSWakeUp_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f403a_407/family.c b/hw/bsp/at32f403a_407/family.c
index 8c8329323..dd9b85dc5 100644
--- a/hw/bsp/at32f403a_407/family.c
+++ b/hw/bsp/at32f403a_407/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f403a_407_clock.h"
+#include "at32f403a_407_int.h"
 #include "bsp/board_api.h"
 #include "board.h"
 
@@ -266,6 +267,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f413/at32f413_int.h b/hw/bsp/at32f413/at32f413_int.h
index fbbf30dbc..46ce271e5 100644
--- a/hw/bsp/at32f413/at32f413_int.h
+++ b/hw/bsp/at32f413/at32f413_int.h
@@ -48,6 +48,12 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void USBFS_H_CAN1_TX_IRQHandler(void);
+void USBFS_L_CAN1_RX0_IRQHandler(void);
+void USBFS_MAPH_IRQHandler(void);
+void USBFS_MAPL_IRQHandler(void);
+void USBFSWakeUp_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f413/family.c b/hw/bsp/at32f413/family.c
index bb16d4d5b..bdaed523c 100644
--- a/hw/bsp/at32f413/family.c
+++ b/hw/bsp/at32f413/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f413_clock.h"
+#include "at32f413_int.h"
 #include "board.h"
 #include "bsp/board_api.h"
 
@@ -266,6 +267,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f415/at32f415_int.h b/hw/bsp/at32f415/at32f415_int.h
index 2106538b6..c6df83835 100644
--- a/hw/bsp/at32f415/at32f415_int.h
+++ b/hw/bsp/at32f415/at32f415_int.h
@@ -48,6 +48,9 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void OTGFS1_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f415/family.c b/hw/bsp/at32f415/family.c
index 381b79eeb..2fbd4c821 100644
--- a/hw/bsp/at32f415/family.c
+++ b/hw/bsp/at32f415/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f415_clock.h"
+#include "at32f415_int.h"
 #include "board.h"
 #include "bsp/board_api.h"
 
@@ -262,6 +263,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f423/at32f423_int.h b/hw/bsp/at32f423/at32f423_int.h
index 28550331e..bf73ae6c0 100644
--- a/hw/bsp/at32f423/at32f423_int.h
+++ b/hw/bsp/at32f423/at32f423_int.h
@@ -48,6 +48,9 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void OTGFS1_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f423/family.c b/hw/bsp/at32f423/family.c
index 723a8a2c9..f30c6a83f 100644
--- a/hw/bsp/at32f423/family.c
+++ b/hw/bsp/at32f423/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f423_clock.h"
+#include "at32f423_int.h"
 #include "board.h"
 #include "bsp/board_api.h"
 
@@ -266,6 +267,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f425/at32f425_int.h b/hw/bsp/at32f425/at32f425_int.h
index ad9dc308b..56bb52d87 100644
--- a/hw/bsp/at32f425/at32f425_int.h
+++ b/hw/bsp/at32f425/at32f425_int.h
@@ -48,6 +48,9 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void OTGFS1_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f425/family.c b/hw/bsp/at32f425/family.c
index 963e1485f..4ff4c8d6a 100644
--- a/hw/bsp/at32f425/family.c
+++ b/hw/bsp/at32f425/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f425_clock.h"
+#include "at32f425_int.h"
 #include "board.h"
 #include "bsp/board_api.h"
 
@@ -270,6 +271,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/at32f435_437/at32f435_437_int.h b/hw/bsp/at32f435_437/at32f435_437_int.h
index 76bfaaae4..1fa34419f 100644
--- a/hw/bsp/at32f435_437/at32f435_437_int.h
+++ b/hw/bsp/at32f435_437/at32f435_437_int.h
@@ -48,6 +48,11 @@ void DebugMon_Handler(void);
 void PendSV_Handler(void);
 void SysTick_Handler(void);
 
+void OTGFS1_IRQHandler(void);
+void OTGFS2_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+void OTGFS2_WKUP_IRQHandler(void);
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c
index a65116729..4bd6ee73c 100644
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -29,6 +29,7 @@
 */
 
 #include "at32f435_437_clock.h"
+#include "at32f435_437_int.h"
 #include "board.h"
 #include "bsp/board_api.h"
 
@@ -332,6 +333,7 @@ void HardFault_Handler(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 }
 
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 0221da083..25062b18f 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -108,8 +108,6 @@ void USBD_IRQHandler(void) {
 #endif
 
 
-
-
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
 extern void tusb_hal_nrf_power_event(uint32_t event);
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 8cebcbedd..cc2b7a2e5 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -46,13 +46,13 @@ function(add_board_target BOARD_TARGET)
 
   if (MCU_VARIANT STREQUAL nrf54h20)
     set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
-    target_sources(${BOARD_TARGET} PUBLIC
+    target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_nrf54h.c
       ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
     )
   elseif (MCU_VARIANT STREQUAL nrf5340)
     set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
-    target_sources(${BOARD_TARGET} PUBLIC
+    target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_${MCU_VARIANT}_application.c
       ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
       ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
@@ -60,7 +60,7 @@ function(add_board_target BOARD_TARGET)
     target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA_APPLICATION)
   else()
     set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa.ld)
-    target_sources(${BOARD_TARGET} PUBLIC
+    target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_${MCU_VARIANT}.c
       ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}.S
       )
@@ -141,6 +141,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-- 
cgit v1.3.1


From 367044e4873fc9ca9cdac918cee684e1e08216e0 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 20:51:49 +0700
Subject: fix lots of warnings for missing-prototypes for irqhandler

---
 examples/host/msc_file_explorer/CMakeLists.txt |  4 +---
 hw/bsp/at32f402_405/family.c                   |  1 -
 hw/bsp/at32f423/at32f423_int.h                 |  2 +-
 hw/bsp/broadcom_32bit/family.cmake             |  4 ++++
 hw/bsp/broadcom_64bit/family.cmake             |  4 ++++
 hw/bsp/ch32f20x/ch32f20x_it.h                  | 12 +++++++-----
 hw/bsp/ch32f20x/family.c                       |  1 +
 hw/bsp/ch32v10x/ch32v10x_it.h                  | 14 ++++++++++++++
 hw/bsp/ch32v10x/family.c                       |  3 ++-
 hw/bsp/ch32v20x/ch32v20x_it.h                  | 17 +++++++++++++++++
 hw/bsp/ch32v20x/family.c                       |  3 ++-
 hw/bsp/ch32v30x/ch32v30x_it.h                  | 14 +++++++++++++-
 hw/bsp/ch32v30x/debug_uart.c                   |  3 ++-
 hw/bsp/ch32v30x/family.c                       |  3 ++-
 hw/bsp/da1469x/family.cmake                    |  5 +++++
 hw/bsp/fomu/family.c                           |  1 -
 hw/bsp/fomu/family.cmake                       |  4 ++++
 hw/bsp/gd32vf103/family.cmake                  | 12 ++++++++++++
 hw/bsp/imxrt/family.cmake                      |  5 ++++-
 hw/bsp/kinetis_k/family.cmake                  |  4 ++++
 hw/bsp/kinetis_k32l2/family.cmake              |  4 ++++
 hw/bsp/kinetis_kl/family.cmake                 |  4 ++++
 hw/bsp/lpc13/family.cmake                      |  5 +++++
 hw/bsp/lpc15/family.cmake                      |  5 +++++
 hw/bsp/lpc17/family.cmake                      |  5 +++++
 hw/bsp/lpc40/family.cmake                      |  5 +++++
 hw/bsp/lpc51/family.cmake                      |  4 ++++
 hw/bsp/lpc54/family.cmake                      |  4 ++++
 hw/bsp/lpc55/family.cmake                      |  9 +++++----
 hw/bsp/maxim/family.c                          |  2 ++
 hw/bsp/maxim/family.cmake                      |  4 ++++
 hw/bsp/mcx/family.cmake                        |  4 ++++
 hw/bsp/mm32/family.cmake                       |  4 ++++
 hw/bsp/msp430/family.c                         |  9 +++++----
 hw/bsp/msp432e4/family.cmake                   |  5 +++++
 hw/bsp/nrf/family.cmake                        |  1 -
 hw/bsp/ra/family.cmake                         |  5 +++++
 hw/bsp/samd11/family.c                         |  5 ++---
 hw/bsp/samg/family.c                           |  1 +
 hw/bsp/saml2x/family.c                         |  1 +
 hw/bsp/stm32c0/family.cmake                    |  5 +++++
 hw/bsp/stm32f0/family.cmake                    |  5 +++++
 hw/bsp/stm32f1/family.cmake                    |  5 +++++
 hw/bsp/stm32f2/family.cmake                    |  5 +++++
 hw/bsp/stm32f3/family.cmake                    |  5 +++++
 hw/bsp/stm32f4/family.cmake                    |  5 +++++
 hw/bsp/stm32f7/family.cmake                    |  5 +++++
 hw/bsp/stm32g0/family.cmake                    |  5 +++++
 hw/bsp/stm32g4/family.cmake                    |  5 +++++
 hw/bsp/stm32h5/family.cmake                    |  5 +++++
 hw/bsp/stm32h7/family.cmake                    |  5 +++++
 hw/bsp/stm32h7rs/family.cmake                  |  5 +++++
 hw/bsp/stm32l0/family.cmake                    |  5 +++++
 hw/bsp/stm32l4/family.cmake                    |  5 +++++
 hw/bsp/stm32n6/boards/stm32n6570dk/board.h     | 10 +++++-----
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h  |  2 +-
 hw/bsp/stm32n6/family.cmake                    |  8 +++++++-
 hw/bsp/stm32u0/family.cmake                    |  5 +++++
 hw/bsp/stm32u5/family.cmake                    |  5 +++++
 hw/bsp/stm32wb/family.cmake                    |  5 +++++
 hw/bsp/stm32wba/family.cmake                   |  5 +++++
 hw/bsp/tm4c/family.cmake                       |  4 ++++
 hw/bsp/xmc4000/family.cmake                    |  4 ++++
 src/portable/mentor/musb/musb_max32.h          | 10 ++++++++++
 src/portable/sunxi/dcd_sunxi_musb.c            |  4 ++--
 src/portable/synopsys/dwc2/dcd_dwc2.c          |  1 +
 src/portable/wch/hcd_ch32_usbfs.c              | 10 ++++++++++
 tools/get_deps.py                              |  6 +++---
 68 files changed, 310 insertions(+), 41 deletions(-)

(limited to 'hw')

diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 95d532fc9..e9c15b7c1 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -28,9 +28,7 @@ target_sources(${PROJECT} PUBLIC
 
 # Suppress warnings on fatfs
 if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-  set_source_files_properties(
-    ${TOP}/lib/fatfs/source/ff.c
-    PROPERTIES
+  set_source_files_properties(${TOP}/lib/fatfs/source/ff.c PROPERTIES
     COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
     )
 endif ()
diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index 6f3196744..beac1a7f8 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -30,7 +30,6 @@
 
 #include "at32f402_405_clock.h"
 #include "at32f402_405_int.h"
-#include "at32f403a_407_usb.h"
 #include "bsp/board_api.h"
 #include "board.h"
 
diff --git a/hw/bsp/at32f423/at32f423_int.h b/hw/bsp/at32f423/at32f423_int.h
index bf73ae6c0..aa707346d 100644
--- a/hw/bsp/at32f423/at32f423_int.h
+++ b/hw/bsp/at32f423/at32f423_int.h
@@ -39,7 +39,7 @@ extern "C" {
 /* exported functions ------------------------------------------------------- */
 
 void NMI_Handler(void);
-//void HardFault_Handler(void);
+void HardFault_Handler(void);
 void MemManage_Handler(void);
 void BusFault_Handler(void);
 void UsageFault_Handler(void);
diff --git a/hw/bsp/broadcom_32bit/family.cmake b/hw/bsp/broadcom_32bit/family.cmake
index 5e57d8b1e..1ec54b06f 100644
--- a/hw/bsp/broadcom_32bit/family.cmake
+++ b/hw/bsp/broadcom_32bit/family.cmake
@@ -86,6 +86,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/broadcom_64bit/family.cmake b/hw/bsp/broadcom_64bit/family.cmake
index 1a088c2c0..e87aaa3a4 100644
--- a/hw/bsp/broadcom_64bit/family.cmake
+++ b/hw/bsp/broadcom_64bit/family.cmake
@@ -93,6 +93,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/ch32f20x/ch32f20x_it.h b/hw/bsp/ch32f20x/ch32f20x_it.h
index 34f3bbf96..7daf0d76e 100644
--- a/hw/bsp/ch32f20x/ch32f20x_it.h
+++ b/hw/bsp/ch32f20x/ch32f20x_it.h
@@ -1,9 +1,9 @@
 /********************************** (C) COPYRIGHT *******************************
-* File Name          : ch32f20x_it.h
-* Author             : WCH
-* Version            : V1.0.0
-* Date               : 2021/08/08
-* Description        : This file contains the headers of the interrupt handlers.
+ * File Name          : ch32f20x_it.h
+ * Author             : WCH
+ * Version            : V1.0.0
+ * Date               : 2021/08/08
+ * Description        : This file contains the headers of the interrupt handlers.
 *********************************************************************************
 * Copyright (c) 2021 Nanjing Qinheng Microelectronics Co., Ltd.
 * Attention: This software (modified or not) and binary are used for
@@ -21,5 +21,7 @@ void BusFault_Handler(void);
 void UsageFault_Handler(void);
 void DebugMon_Handler(void);
 
+void USBHS_IRQHandler(void);
+void SysTick_Handler(void);
 
 #endif /* __CH32F20xIT_H */
diff --git a/hw/bsp/ch32f20x/family.c b/hw/bsp/ch32f20x/family.c
index 7fef71d47..7eae62fa4 100644
--- a/hw/bsp/ch32f20x/family.c
+++ b/hw/bsp/ch32f20x/family.c
@@ -32,6 +32,7 @@
 #include "debug_uart.h"
 
 #include "ch32f20x.h"
+#include "ch32f20x_it.h"
 
 #include "bsp/board_api.h"
 #include "board.h"
diff --git a/hw/bsp/ch32v10x/ch32v10x_it.h b/hw/bsp/ch32v10x/ch32v10x_it.h
index 13afc2412..34615bb69 100644
--- a/hw/bsp/ch32v10x/ch32v10x_it.h
+++ b/hw/bsp/ch32v10x/ch32v10x_it.h
@@ -12,4 +12,18 @@
 #ifndef __CH32V10x_IT_H
 #define __CH32V10x_IT_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ch32v10x.h"
+
+void USBHD_IRQHandler(void);
+void USBWakeUp_IRQHandler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __CH32V10x_IT_H */
diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index f25102494..dfc041462 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -12,6 +12,7 @@
 #endif
 
 #include "ch32v10x.h"
+#include "ch32v10x_it.h"
 
 #ifdef __GNUC__
 #pragma GCC diagnostic pop
@@ -44,7 +45,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t SysTick_Config(uint32_t ticks) {
+static uint32_t SysTick_Config(uint32_t ticks) {
   NVIC_EnableIRQ(SysTicK_IRQn);
   SysTick->CTLR = 0;
   SysTick->CNTL0 = SysTick->CNTL1 = SysTick->CNTL2 = SysTick->CNTL3 = 0;
diff --git a/hw/bsp/ch32v20x/ch32v20x_it.h b/hw/bsp/ch32v20x/ch32v20x_it.h
index e49c61ae2..d1e8db255 100644
--- a/hw/bsp/ch32v20x/ch32v20x_it.h
+++ b/hw/bsp/ch32v20x/ch32v20x_it.h
@@ -12,4 +12,21 @@
 #ifndef __CH32V20x_IT_H
 #define __CH32V20x_IT_H
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ch32v20x.h"
+
+void USB_LP_CAN1_RX0_IRQHandler(void);
+void USB_HP_CAN1_TX_IRQHandler(void);
+void USBWakeUp_IRQHandler(void);
+void USBHD_IRQHandler(void);
+void USBHDWakeUp_IRQHandler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* __CH32V20x_IT_H */
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index 510f82981..690acee1e 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -12,6 +12,7 @@ manufacturer: WCH
 #endif
 
 #include "ch32v20x.h"
+#include "ch32v20x_it.h"
 
 #ifdef __GNUC__
 #pragma GCC diagnostic pop
@@ -74,7 +75,7 @@ __attribute__((interrupt)) void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t SysTick_Config(uint32_t ticks) {
+static uint32_t SysTick_Config(uint32_t ticks) {
   NVIC_EnableIRQ(SysTicK_IRQn);
   SysTick->CTLR = 0;
   SysTick->SR = 0;
diff --git a/hw/bsp/ch32v30x/ch32v30x_it.h b/hw/bsp/ch32v30x/ch32v30x_it.h
index f3977a8be..b9bf0b82e 100644
--- a/hw/bsp/ch32v30x/ch32v30x_it.h
+++ b/hw/bsp/ch32v30x/ch32v30x_it.h
@@ -10,7 +10,19 @@
 #ifndef __CH32V30x_IT_H
 #define __CH32V30x_IT_H
 
-// #include "debug.h"
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "ch32v30x.h"
+
+void USBHS_IRQHandler(void);
+void OTG_FS_IRQHandler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
 
 
 #endif /* __CH32V30x_IT_H */
diff --git a/hw/bsp/ch32v30x/debug_uart.c b/hw/bsp/ch32v30x/debug_uart.c
index 2fd3a9d64..4d2992c58 100644
--- a/hw/bsp/ch32v30x/debug_uart.c
+++ b/hw/bsp/ch32v30x/debug_uart.c
@@ -49,7 +49,8 @@ void USART1_IRQHandler(void) {
       __asm volatile ("call USART1_IRQHandler_impl; mret");
 }
 
-__attribute__((used)) void USART1_IRQHandler_impl(void)
+void USART1_IRQHandler_impl(void) __attribute__((used)) ;
+void USART1_IRQHandler_impl(void)
 {
 	if(USART_GetITStatus(USART1, USART_IT_TC) != RESET)
     {
diff --git a/hw/bsp/ch32v30x/family.c b/hw/bsp/ch32v30x/family.c
index bd01f4f46..c694f1a08 100644
--- a/hw/bsp/ch32v30x/family.c
+++ b/hw/bsp/ch32v30x/family.c
@@ -40,6 +40,7 @@
 
 #include "debug_uart.h"
 #include "ch32v30x.h"
+#include "ch32v30x_it.h"
 
 #ifdef __GNUC__
 #pragma GCC diagnostic pop
@@ -70,7 +71,7 @@ __attribute__((interrupt)) void OTG_FS_IRQHandler(void) {
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-uint32_t SysTick_Config(uint32_t ticks) {
+static uint32_t SysTick_Config(uint32_t ticks) {
   NVIC_EnableIRQ(SysTicK_IRQn);
   SysTick->CTLR = 0;
   SysTick->SR = 0;
diff --git a/hw/bsp/da1469x/family.cmake b/hw/bsp/da1469x/family.cmake
index 20d6cbc44..b5bec52c8 100644
--- a/hw/bsp/da1469x/family.cmake
+++ b/hw/bsp/da1469x/family.cmake
@@ -118,6 +118,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/fomu/family.c b/hw/bsp/fomu/family.c
index 61943cb01..9d7977bea 100644
--- a/hw/bsp/fomu/family.c
+++ b/hw/bsp/fomu/family.c
@@ -38,7 +38,6 @@
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
-
 void fomu_error(uint32_t line)
 {
   (void)line;
diff --git a/hw/bsp/fomu/family.cmake b/hw/bsp/fomu/family.cmake
index 639373695..0c7eae90e 100644
--- a/hw/bsp/fomu/family.cmake
+++ b/hw/bsp/fomu/family.cmake
@@ -69,6 +69,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/gd32vf103/family.cmake b/hw/bsp/gd32vf103/family.cmake
index a47871b38..4f5a945e8 100644
--- a/hw/bsp/gd32vf103/family.cmake
+++ b/hw/bsp/gd32vf103/family.cmake
@@ -97,6 +97,18 @@ function(family_configure_example TARGET RTOS)
     ${SOC_DIR}/Common/Source/Stubs/lseek.c
     ${SOC_DIR}/Common/Source/Stubs/read.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      ${SOC_DIR}/Common/Source/Stubs/sbrk.c
+      ${SOC_DIR}/Common/Source/Stubs/close.c
+      ${SOC_DIR}/Common/Source/Stubs/isatty.c
+      ${SOC_DIR}/Common/Source/Stubs/fstat.c
+      ${SOC_DIR}/Common/Source/Stubs/lseek.c
+      ${SOC_DIR}/Common/Source/Stubs/read.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index feec4973f..37acab06d 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -122,10 +122,13 @@ function(family_configure_example TARGET RTOS)
   add_board_target(board_${BOARD})
 
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/kinetis_k/family.cmake b/hw/bsp/kinetis_k/family.cmake
index ce91777c9..426004b4e 100644
--- a/hw/bsp/kinetis_k/family.cmake
+++ b/hw/bsp/kinetis_k/family.cmake
@@ -89,6 +89,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
index 946614a03..8e1b25a95 100644
--- a/hw/bsp/kinetis_k32l2/family.cmake
+++ b/hw/bsp/kinetis_k32l2/family.cmake
@@ -84,6 +84,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 51a646258..335e67375 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -88,6 +88,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc13/family.cmake b/hw/bsp/lpc13/family.cmake
index e3c0b18c7..4ced216cb 100644
--- a/hw/bsp/lpc13/family.cmake
+++ b/hw/bsp/lpc13/family.cmake
@@ -79,6 +79,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc15/family.cmake b/hw/bsp/lpc15/family.cmake
index 761c5a619..f07044c24 100644
--- a/hw/bsp/lpc15/family.cmake
+++ b/hw/bsp/lpc15/family.cmake
@@ -81,6 +81,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc17/family.cmake b/hw/bsp/lpc17/family.cmake
index 771a0f405..2cbb261ca 100644
--- a/hw/bsp/lpc17/family.cmake
+++ b/hw/bsp/lpc17/family.cmake
@@ -78,6 +78,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index 3a680eae6..21ed18057 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -79,6 +79,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc51/family.cmake b/hw/bsp/lpc51/family.cmake
index 09d97d256..615fab6b8 100644
--- a/hw/bsp/lpc51/family.cmake
+++ b/hw/bsp/lpc51/family.cmake
@@ -98,6 +98,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index 66320870a..3a0de4648 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -126,6 +126,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   # https://github.com/gsteiert/sct_neopixel/pull/1
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index a89548635..08c186ca1 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -126,10 +126,11 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/lib/sct_neopixel/sct_neopixel.c
     )
 
-  # https://github.com/gsteiert/sct_neopixel/pull/1
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
-      COMPILE_FLAGS "-Wno-unused-parameter")
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-unused-parameter")
   endif ()
 
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/maxim/family.c b/hw/bsp/maxim/family.c
index 0ef6b8c4d..92b5adb6d 100644
--- a/hw/bsp/maxim/family.c
+++ b/hw/bsp/maxim/family.c
@@ -31,6 +31,7 @@
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wstrict-prototypes" // _mxc_crit_get_state()
+#pragma GCC diagnostic ignored "-Wredundant-decls"
 #endif
 
 #include "gpio.h"
@@ -154,6 +155,7 @@ uint32_t board_button_read(void) {
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 #if defined(MAX32650)
   // USN is 13 bytes on this device
+  (void) max_len;
   MXC_SYS_GetUSN(id, 13);
   return 13;
 #else
diff --git a/hw/bsp/maxim/family.cmake b/hw/bsp/maxim/family.cmake
index 75daec753..e4b1b2c46 100644
--- a/hw/bsp/maxim/family.cmake
+++ b/hw/bsp/maxim/family.cmake
@@ -160,6 +160,10 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   # Board target
   add_board_target(board_${BOARD})
 
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index f857ed31a..a8f50773d 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -105,6 +105,10 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   # Board target
   add_board_target(board_${BOARD})
 
diff --git a/hw/bsp/mm32/family.cmake b/hw/bsp/mm32/family.cmake
index 0561a63a0..d5e62a2da 100644
--- a/hw/bsp/mm32/family.cmake
+++ b/hw/bsp/mm32/family.cmake
@@ -79,6 +79,10 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/msp430/family.c b/hw/bsp/msp430/family.c
index a45bd5f93..390a9915e 100644
--- a/hw/bsp/msp430/family.c
+++ b/hw/bsp/msp430/family.c
@@ -35,8 +35,8 @@
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
-void __attribute__ ((interrupt(USB_UBM_VECTOR))) USB_UBM_ISR(void)
-{
+void USB_UBM_ISR(void) __attribute__ ((interrupt(USB_UBM_VECTOR)));
+void USB_UBM_ISR(void) {
   tud_int_handler(0);
 }
 
@@ -200,8 +200,9 @@ int board_uart_write(void const * buf, int len)
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
-void __attribute__ ((interrupt(TIMER0_A0_VECTOR))) TIMER0_A0_ISR (void)
-{
+
+void TIMER0_A0_ISR (void) __attribute__ ((interrupt(TIMER0_A0_VECTOR)));
+void TIMER0_A0_ISR (void) {
   system_ticks++;
   // TAxCCR0 CCIFG resets itself as soon as interrupt is invoked.
 }
diff --git a/hw/bsp/msp432e4/family.cmake b/hw/bsp/msp432e4/family.cmake
index f6939ecfe..62ab83866 100644
--- a/hw/bsp/msp432e4/family.cmake
+++ b/hw/bsp/msp432e4/family.cmake
@@ -77,6 +77,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index cc2b7a2e5..3384aeaf3 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -141,7 +141,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
-
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index 42a32631c..bf6bcfb4a 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -127,6 +127,11 @@ function(family_configure_example TARGET RTOS)
     # Explicitly added bsp_rom_registers here, otherwise MCU can be bricked if g_bsp_rom_registers is dropped by linker
     ${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c
     )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c PROPERTIES COMPILE_FLAGS "-Wno-undef")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 79ca9de02..62e060c8e 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -155,12 +155,11 @@ uint32_t board_millis(void)
   return system_ticks;
 }
 
-void _init(void)
-{
+void _init(void);
+void _init(void) {
   // This _init() standin makes certain GCC environments happier.
   // They expect the main binary to have a constructor called _init; but don't provide a weak default.
   // Providing an empty constructor satisfies this odd case, and doesn't harm anything.
 }
 
-
 #endif
diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c
index 8db429e79..234dc0ec0 100644
--- a/hw/bsp/samg/family.c
+++ b/hw/bsp/samg/family.c
@@ -154,6 +154,7 @@ uint32_t board_millis(void) {
 
 // Required by __libc_init_array in startup code if we are compiling using
 // -nostdlib/-nostartfiles.
+void _init(void);
 void _init(void) {
 
 }
diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c
index cdc65baf1..275dbbd2e 100644
--- a/hw/bsp/saml2x/family.c
+++ b/hw/bsp/saml2x/family.c
@@ -167,6 +167,7 @@ uint32_t board_millis(void) {
 
 #endif
 
+void _init(void);
 void _init(void) {
 
 }
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index c6a90fff6..85562d474 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -94,6 +94,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 12c7b592c..8d584a8e1 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -92,6 +92,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index cbb9c3568..72fe17482 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -91,6 +91,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f2/family.cmake b/hw/bsp/stm32f2/family.cmake
index dc6bc2885..30ee23eb9 100644
--- a/hw/bsp/stm32f2/family.cmake
+++ b/hw/bsp/stm32f2/family.cmake
@@ -91,6 +91,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f3/family.cmake b/hw/bsp/stm32f3/family.cmake
index 0ba2920d5..b708c667f 100644
--- a/hw/bsp/stm32f3/family.cmake
+++ b/hw/bsp/stm32f3/family.cmake
@@ -89,6 +89,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index db5736192..18e8676c5 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -117,6 +117,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 1a3365332..48c0edae6 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -119,6 +119,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 4da26f27e..d489a40b5 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -93,6 +93,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 5ec9926fe..3a4c8ae32 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -89,6 +89,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index 1df6bcb90..1240901e8 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -93,6 +93,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index b4f0bebbf..a1e49d1fd 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -124,6 +124,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32h7rs/family.cmake b/hw/bsp/stm32h7rs/family.cmake
index 40230ef12..e67cabd4b 100644
--- a/hw/bsp/stm32h7rs/family.cmake
+++ b/hw/bsp/stm32h7rs/family.cmake
@@ -127,6 +127,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32l0/family.cmake b/hw/bsp/stm32l0/family.cmake
index 954bdb158..3278d2645 100644
--- a/hw/bsp/stm32l0/family.cmake
+++ b/hw/bsp/stm32l0/family.cmake
@@ -93,6 +93,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index eebcff4f3..8d44f2506 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -93,6 +93,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
index a3d945f76..bbcad6340 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
@@ -97,7 +97,7 @@ static board_pindef_t board_pindef[] = {
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
-void SystemClock_Config(void) {
+static void SystemClock_Config(void) {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
   /* Configure the power domain */
@@ -214,7 +214,7 @@ static I2C_HandleTypeDef i2c_handle = {
     }};
 static TCPP0203_Object_t tcpp0203_obj = {0};
 
-int32_t board_tcpp0203_init(void) {
+static int32_t board_tcpp0203_init(void) {
   board_pindef_t *pindef = &board_pindef[PINID_TCPP0203_EN];
   HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, GPIO_PIN_SET);
 
@@ -231,16 +231,16 @@ int32_t board_tcpp0203_init(void) {
   return 0;
 }
 
-int32_t board_tcpp0203_deinit(void) {
+static int32_t board_tcpp0203_deinit(void) {
   return 0;
 }
 
-int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+static int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
   TU_ASSERT(HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
   return 0;
 }
 
-int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
   TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
   return 0;
 }
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
index 963ecad61..33c68f7cf 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
@@ -97,7 +97,7 @@ static board_pindef_t board_pindef[] = {
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
-void SystemClock_Config(void) {
+static void SystemClock_Config(void) {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
   /* Configure the power domain */
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index 76763937e..e1b8524bf 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -76,7 +76,7 @@ function(add_board_target BOARD_TARGET)
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMSIS_5}/CMSIS/Core/Include
+    ${TOP}/lib/CMSIS_6/CMSIS/Core/Include
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
@@ -125,6 +125,12 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
index fefaea9de..535b4716f 100644
--- a/hw/bsp/stm32u0/family.cmake
+++ b/hw/bsp/stm32u0/family.cmake
@@ -94,6 +94,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 7a5935961..f1f9f6502 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -93,6 +93,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32wb/family.cmake b/hw/bsp/stm32wb/family.cmake
index 0ea937257..e749e2fcc 100644
--- a/hw/bsp/stm32wb/family.cmake
+++ b/hw/bsp/stm32wb/family.cmake
@@ -96,6 +96,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/stm32wba/family.cmake b/hw/bsp/stm32wba/family.cmake
index 3f42879be..391989a6d 100644
--- a/hw/bsp/stm32wba/family.cmake
+++ b/hw/bsp/stm32wba/family.cmake
@@ -111,6 +111,11 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index e1cf94e96..7fe256fb6 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -61,6 +61,10 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   # Board target
   add_board_target(board_${BOARD})
 
diff --git a/hw/bsp/xmc4000/family.cmake b/hw/bsp/xmc4000/family.cmake
index 6edd72caf..594bd1116 100644
--- a/hw/bsp/xmc4000/family.cmake
+++ b/hw/bsp/xmc4000/family.cmake
@@ -64,6 +64,10 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
   # Board target
   add_board_target(board_${BOARD})
 
diff --git a/src/portable/mentor/musb/musb_max32.h b/src/portable/mentor/musb/musb_max32.h
index 35849b5f8..599de2ca1 100644
--- a/src/portable/mentor/musb/musb_max32.h
+++ b/src/portable/mentor/musb/musb_max32.h
@@ -31,7 +31,17 @@
 extern "C" {
 #endif
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "mxc_device.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "usbhs_regs.h"
 
 #define MUSB_CFG_SHARED_FIFO   1 // shared FIFO for TX and RX endpoints
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index 9801a485f..f1f4897cb 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -176,7 +176,7 @@ static void USBC_ForceVbusValidToHigh(void)
 	USBC_Writel(reg_val, USBC_REG_ISCR(USBC0_BASE));
 }
 
-void USBC_SelectBus(u32 io_type, u32 ep_type, u32 ep_index)
+static void USBC_SelectBus(u32 io_type, u32 ep_type, u32 ep_index)
 {
 	u32 reg_val = 0;
 
@@ -952,7 +952,7 @@ void dcd_remote_wakeup(uint8_t rhport)
 {
   (void)rhport;
   USBC_REG_set_bit_b(USBC_BP_POWER_D_RESUME, USBC_REG_PCTL(USBC0_BASE));
-  delay_ms(10);
+  tusb_time_delay_ms_api(10);
   USBC_REG_clear_bit_b(USBC_BP_POWER_D_RESUME, USBC_REG_PCTL(USBC0_BASE));
 }
 
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index e3c21a86d..f1e4dbd77 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -77,6 +77,7 @@ CFG_TUD_MEM_SECTION static struct {
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) {
   #if TU_CHECK_MCU(OPT_MCU_GD32VF103)
+  (void) dwc2;
   return DWC2_EP_MAX;
   #else
   const dwc2_ghwcfg2_t ghwcfg2 = {.value = dwc2->ghwcfg2};
diff --git a/src/portable/wch/hcd_ch32_usbfs.c b/src/portable/wch/hcd_ch32_usbfs.c
index 200136906..7bbf122dd 100644
--- a/src/portable/wch/hcd_ch32_usbfs.c
+++ b/src/portable/wch/hcd_ch32_usbfs.c
@@ -36,7 +36,17 @@
 
 #include "bsp/board_api.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wstrict-prototypes"
+#endif
+
 #include "ch32v20x.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #include "ch32v20x_usb.h"
 
 #define USBFS_RX_BUF_LEN 64
diff --git a/tools/get_deps.py b/tools/get_deps.py
index c243137fa..c1e2c075d 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -246,12 +246,12 @@ deps_optional = {
                     'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
-                    'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32n6 stm32u0 stm32u5 stm32wb stm32wba'
+                    'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba'
                     'sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg '
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
-                    'b0bbb0423b278ca632cfe1474eb227961d835fd2',
-                    'ra'],
+                    '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
+                    'ra stm32n6'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From 6f93feee0957ea343cfc376d99d7d2922777d74f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Oct 2025 23:23:23 +0700
Subject: suppress some warnings in zephyr build

---
 hw/bsp/family_support.cmake | 5 +++++
 hw/bsp/stm32n6/family.mk    | 2 +-
 2 files changed, 6 insertions(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index daabed81b..d8ef79f60 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -121,6 +121,11 @@ if (RTOS STREQUAL zephyr)
   set(BOARD_ROOT ${TOP}/hw/bsp/${FAMILY})
   set(ZEPHYR_BOARD_ALIASES ${CMAKE_CURRENT_LIST_DIR}/zephyr_board_aliases.cmake)
   find_package(Zephyr REQUIRED HINTS ${TOP}/zephyr)
+  list(REMOVE_ITEM WARN_FLAGS_GNU
+    -Wredundant-decls
+    -Wundef
+    -Wcast-align
+    )
 endif ()
 
 #-------------------------------------------------------------
diff --git a/hw/bsp/stm32n6/family.mk b/hw/bsp/stm32n6/family.mk
index 37087ed42..45554e251 100644
--- a/hw/bsp/stm32n6/family.mk
+++ b/hw/bsp/stm32n6/family.mk
@@ -76,7 +76,7 @@ SRC_C += \
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
 	$(TOP)/$(ST_CMSIS)/Include \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
-- 
cgit v1.3.1


From 2a8811ebb0213297dedb34c33f29c9035a516600 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 00:15:46 +0700
Subject: merge samd2x and saml2x bsp, add OPT_MCU_SAML2X to replace
 OPT_MCU_SAML21 & OPT_MCU_SAML22

---
 .../device/net_lwip_webserver/src/tusb_config.h    |   2 +-
 hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h      | 153 ------
 hw/bsp/samd21/boards/atsamd21_xpro/board.cmake     |   9 -
 hw/bsp/samd21/boards/atsamd21_xpro/board.h         |  60 ---
 hw/bsp/samd21/boards/atsamd21_xpro/board.mk        |  10 -
 .../boards/atsamd21_xpro/samd21j18a_flash.ld       | 144 ------
 .../boards/circuitplayground_express/board.cmake   |   9 -
 .../boards/circuitplayground_express/board.h       |  59 ---
 .../boards/circuitplayground_express/board.mk      |   9 -
 .../circuitplayground_express.ld                   | 146 ------
 hw/bsp/samd21/boards/curiosity_nano/board.cmake    |  10 -
 hw/bsp/samd21/boards/curiosity_nano/board.h        |  59 ---
 hw/bsp/samd21/boards/curiosity_nano/board.mk       |  14 -
 .../boards/curiosity_nano/samd21g17a_flash.ld      | 144 ------
 hw/bsp/samd21/boards/cynthion_d21/board.cmake      |  12 -
 hw/bsp/samd21/boards/cynthion_d21/board.h          |  55 ---
 hw/bsp/samd21/boards/cynthion_d21/board.mk         |  16 -
 .../samd21/boards/cynthion_d21/samd21g18a_flash.ld | 144 ------
 .../samd21/boards/feather_m0_express/board.cmake   |   9 -
 hw/bsp/samd21/boards/feather_m0_express/board.h    |  74 ---
 hw/bsp/samd21/boards/feather_m0_express/board.mk   |   9 -
 .../feather_m0_express/feather_m0_express.ld       | 146 ------
 hw/bsp/samd21/boards/itsybitsy_m0/board.cmake      |   9 -
 hw/bsp/samd21/boards/itsybitsy_m0/board.h          |  59 ---
 hw/bsp/samd21/boards/itsybitsy_m0/board.mk         |   9 -
 hw/bsp/samd21/boards/itsybitsy_m0/itsybitsy_m0.ld  | 146 ------
 hw/bsp/samd21/boards/metro_m0_express/board.cmake  |   9 -
 hw/bsp/samd21/boards/metro_m0_express/board.h      |  74 ---
 hw/bsp/samd21/boards/metro_m0_express/board.mk     |   9 -
 .../boards/metro_m0_express/metro_m0_express.ld    | 146 ------
 hw/bsp/samd21/boards/qtpy/board.cmake              |   9 -
 hw/bsp/samd21/boards/qtpy/board.h                  |  55 ---
 hw/bsp/samd21/boards/qtpy/board.mk                 |  11 -
 hw/bsp/samd21/boards/qtpy/qtpy.ld                  | 146 ------
 hw/bsp/samd21/boards/seeeduino_xiao/board.cmake    |   9 -
 hw/bsp/samd21/boards/seeeduino_xiao/board.h        |  59 ---
 hw/bsp/samd21/boards/seeeduino_xiao/board.mk       |   9 -
 .../samd21/boards/seeeduino_xiao/seeeduino_xiao.ld | 146 ------
 .../boards/sparkfun_samd21_mini_usb/board.cmake    |   9 -
 .../samd21/boards/sparkfun_samd21_mini_usb/board.h |  62 ---
 .../boards/sparkfun_samd21_mini_usb/board.mk       |   9 -
 .../sparkfun_samd21_mini_usb.ld                    | 146 ------
 hw/bsp/samd21/boards/trinket_m0/board.cmake        |   9 -
 hw/bsp/samd21/boards/trinket_m0/board.h            |  44 --
 hw/bsp/samd21/boards/trinket_m0/board.mk           |   4 -
 hw/bsp/samd21/boards/trinket_m0/trinket_m0.ld      | 146 ------
 hw/bsp/samd21/family.c                             | 453 -----------------
 hw/bsp/samd21/family.cmake                         | 110 -----
 hw/bsp/samd21/family.mk                            |  53 --
 hw/bsp/samd2x_l2x/FreeRTOSConfig/FreeRTOSConfig.h  | 153 ++++++
 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.cmake |  10 +
 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.h     |  60 +++
 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.mk    |  12 +
 .../boards/atsamd21_xpro/samd21j18a_flash.ld       | 144 ++++++
 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.cmake |   9 +
 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.h     |  55 +++
 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.mk    |  12 +
 .../boards/atsaml21_xpro/saml21j18b_flash.ld       | 155 ++++++
 .../boards/circuitplayground_express/board.cmake   |  10 +
 .../boards/circuitplayground_express/board.h       |  59 +++
 .../boards/circuitplayground_express/board.mk      |  11 +
 .../circuitplayground_express.ld                   | 146 ++++++
 .../samd2x_l2x/boards/curiosity_nano/board.cmake   |  11 +
 hw/bsp/samd2x_l2x/boards/curiosity_nano/board.h    |  59 +++
 hw/bsp/samd2x_l2x/boards/curiosity_nano/board.mk   |  16 +
 .../boards/curiosity_nano/samd21g17a_flash.ld      | 144 ++++++
 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.cmake  |  13 +
 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.h      |  55 +++
 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.mk     |  18 +
 .../boards/cynthion_d21/samd21g18a_flash.ld        | 144 ++++++
 .../boards/feather_m0_express/board.cmake          |  10 +
 .../samd2x_l2x/boards/feather_m0_express/board.h   |  74 +++
 .../samd2x_l2x/boards/feather_m0_express/board.mk  |  11 +
 .../feather_m0_express/feather_m0_express.ld       | 146 ++++++
 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.cmake  |  10 +
 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.h      |  59 +++
 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.mk     |  11 +
 .../samd2x_l2x/boards/itsybitsy_m0/itsybitsy_m0.ld | 146 ++++++
 .../samd2x_l2x/boards/metro_m0_express/board.cmake |  10 +
 hw/bsp/samd2x_l2x/boards/metro_m0_express/board.h  |  74 +++
 hw/bsp/samd2x_l2x/boards/metro_m0_express/board.mk |  11 +
 .../boards/metro_m0_express/metro_m0_express.ld    | 146 ++++++
 hw/bsp/samd2x_l2x/boards/qtpy/board.cmake          |  10 +
 hw/bsp/samd2x_l2x/boards/qtpy/board.h              |  55 +++
 hw/bsp/samd2x_l2x/boards/qtpy/board.mk             |  13 +
 hw/bsp/samd2x_l2x/boards/qtpy/qtpy.ld              | 146 ++++++
 .../samd2x_l2x/boards/saml22_feather/board.cmake   |   9 +
 hw/bsp/samd2x_l2x/boards/saml22_feather/board.h    |  52 ++
 hw/bsp/samd2x_l2x/boards/saml22_feather/board.mk   |  11 +
 .../boards/saml22_feather/saml22_feather.ld        | 146 ++++++
 .../samd2x_l2x/boards/seeeduino_xiao/board.cmake   |  10 +
 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.h    |  59 +++
 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.mk   |  11 +
 .../boards/seeeduino_xiao/seeeduino_xiao.ld        | 146 ++++++
 .../samd2x_l2x/boards/sensorwatch_m0/board.cmake   |   9 +
 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.h    |  52 ++
 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.mk   |  11 +
 .../boards/sensorwatch_m0/sensorwatch_m0.ld        | 146 ++++++
 .../boards/sparkfun_samd21_mini_usb/board.cmake    |  10 +
 .../boards/sparkfun_samd21_mini_usb/board.h        |  62 +++
 .../boards/sparkfun_samd21_mini_usb/board.mk       |  11 +
 .../sparkfun_samd21_mini_usb.ld                    | 146 ++++++
 hw/bsp/samd2x_l2x/boards/trinket_m0/board.cmake    |  10 +
 hw/bsp/samd2x_l2x/boards/trinket_m0/board.h        |  44 ++
 hw/bsp/samd2x_l2x/boards/trinket_m0/board.mk       |   6 +
 hw/bsp/samd2x_l2x/boards/trinket_m0/trinket_m0.ld  | 146 ++++++
 hw/bsp/samd2x_l2x/family.c                         | 550 +++++++++++++++++++++
 hw/bsp/samd2x_l2x/family.cmake                     | 164 ++++++
 hw/bsp/samd2x_l2x/family.mk                        |  92 ++++
 hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h      | 153 ------
 hw/bsp/saml2x/boards/atsaml21_xpro/board.cmake     |   9 -
 hw/bsp/saml2x/boards/atsaml21_xpro/board.h         |  55 ---
 hw/bsp/saml2x/boards/atsaml21_xpro/board.mk        |  12 -
 .../boards/atsaml21_xpro/saml21j18b_flash.ld       | 155 ------
 hw/bsp/saml2x/boards/saml22_feather/board.cmake    |   9 -
 hw/bsp/saml2x/boards/saml22_feather/board.h        |  52 --
 hw/bsp/saml2x/boards/saml22_feather/board.mk       |  11 -
 .../saml2x/boards/saml22_feather/saml22_feather.ld | 146 ------
 hw/bsp/saml2x/boards/sensorwatch_m0/board.cmake    |   9 -
 hw/bsp/saml2x/boards/sensorwatch_m0/board.h        |  52 --
 hw/bsp/saml2x/boards/sensorwatch_m0/board.mk       |  11 -
 .../saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld | 146 ------
 hw/bsp/saml2x/family.c                             | 173 -------
 hw/bsp/saml2x/family.cmake                         | 115 -----
 hw/bsp/saml2x/family.mk                            |  53 --
 src/common/tusb_mcu.h                              |   4 +-
 src/portable/microchip/samd/dcd_samd.c             |  24 +-
 src/portable/microchip/samd/hcd_samd.c             |  12 +-
 src/tusb_option.h                                  |   5 +-
 129 files changed, 4148 insertions(+), 4432 deletions(-)
 delete mode 100644 hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
 delete mode 100644 hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/atsamd21_xpro/board.h
 delete mode 100644 hw/bsp/samd21/boards/atsamd21_xpro/board.mk
 delete mode 100644 hw/bsp/samd21/boards/atsamd21_xpro/samd21j18a_flash.ld
 delete mode 100644 hw/bsp/samd21/boards/circuitplayground_express/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/circuitplayground_express/board.h
 delete mode 100644 hw/bsp/samd21/boards/circuitplayground_express/board.mk
 delete mode 100644 hw/bsp/samd21/boards/circuitplayground_express/circuitplayground_express.ld
 delete mode 100644 hw/bsp/samd21/boards/curiosity_nano/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/curiosity_nano/board.h
 delete mode 100644 hw/bsp/samd21/boards/curiosity_nano/board.mk
 delete mode 100644 hw/bsp/samd21/boards/curiosity_nano/samd21g17a_flash.ld
 delete mode 100644 hw/bsp/samd21/boards/cynthion_d21/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/cynthion_d21/board.h
 delete mode 100644 hw/bsp/samd21/boards/cynthion_d21/board.mk
 delete mode 100644 hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
 delete mode 100644 hw/bsp/samd21/boards/feather_m0_express/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/feather_m0_express/board.h
 delete mode 100644 hw/bsp/samd21/boards/feather_m0_express/board.mk
 delete mode 100644 hw/bsp/samd21/boards/feather_m0_express/feather_m0_express.ld
 delete mode 100644 hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/itsybitsy_m0/board.h
 delete mode 100644 hw/bsp/samd21/boards/itsybitsy_m0/board.mk
 delete mode 100644 hw/bsp/samd21/boards/itsybitsy_m0/itsybitsy_m0.ld
 delete mode 100644 hw/bsp/samd21/boards/metro_m0_express/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/metro_m0_express/board.h
 delete mode 100644 hw/bsp/samd21/boards/metro_m0_express/board.mk
 delete mode 100644 hw/bsp/samd21/boards/metro_m0_express/metro_m0_express.ld
 delete mode 100644 hw/bsp/samd21/boards/qtpy/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/qtpy/board.h
 delete mode 100644 hw/bsp/samd21/boards/qtpy/board.mk
 delete mode 100644 hw/bsp/samd21/boards/qtpy/qtpy.ld
 delete mode 100644 hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/seeeduino_xiao/board.h
 delete mode 100644 hw/bsp/samd21/boards/seeeduino_xiao/board.mk
 delete mode 100644 hw/bsp/samd21/boards/seeeduino_xiao/seeeduino_xiao.ld
 delete mode 100644 hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
 delete mode 100644 hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.mk
 delete mode 100644 hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
 delete mode 100644 hw/bsp/samd21/boards/trinket_m0/board.cmake
 delete mode 100644 hw/bsp/samd21/boards/trinket_m0/board.h
 delete mode 100644 hw/bsp/samd21/boards/trinket_m0/board.mk
 delete mode 100644 hw/bsp/samd21/boards/trinket_m0/trinket_m0.ld
 delete mode 100644 hw/bsp/samd21/family.c
 delete mode 100644 hw/bsp/samd21/family.cmake
 delete mode 100644 hw/bsp/samd21/family.mk
 create mode 100644 hw/bsp/samd2x_l2x/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsamd21_xpro/samd21j18a_flash.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/atsaml21_xpro/saml21j18b_flash.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/circuitplayground_express/circuitplayground_express.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/curiosity_nano/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/curiosity_nano/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/curiosity_nano/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/curiosity_nano/samd21g17a_flash.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/cynthion_d21/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/cynthion_d21/samd21g18a_flash.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/feather_m0_express/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/feather_m0_express/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/feather_m0_express/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/feather_m0_express/feather_m0_express.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/itsybitsy_m0/itsybitsy_m0.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/metro_m0_express/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/metro_m0_express/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/metro_m0_express/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/metro_m0_express/metro_m0_express.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/qtpy/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/qtpy/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/qtpy/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/qtpy/qtpy.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/saml22_feather/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/saml22_feather/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/saml22_feather/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/saml22_feather/saml22_feather.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/seeeduino_xiao/seeeduino_xiao.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/sensorwatch_m0/sensorwatch_m0.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
 create mode 100644 hw/bsp/samd2x_l2x/boards/trinket_m0/board.cmake
 create mode 100644 hw/bsp/samd2x_l2x/boards/trinket_m0/board.h
 create mode 100644 hw/bsp/samd2x_l2x/boards/trinket_m0/board.mk
 create mode 100644 hw/bsp/samd2x_l2x/boards/trinket_m0/trinket_m0.ld
 create mode 100644 hw/bsp/samd2x_l2x/family.c
 create mode 100644 hw/bsp/samd2x_l2x/family.cmake
 create mode 100644 hw/bsp/samd2x_l2x/family.mk
 delete mode 100644 hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h
 delete mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/board.cmake
 delete mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/board.h
 delete mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/board.mk
 delete mode 100644 hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld
 delete mode 100644 hw/bsp/saml2x/boards/saml22_feather/board.cmake
 delete mode 100644 hw/bsp/saml2x/boards/saml22_feather/board.h
 delete mode 100644 hw/bsp/saml2x/boards/saml22_feather/board.mk
 delete mode 100644 hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
 delete mode 100644 hw/bsp/saml2x/boards/sensorwatch_m0/board.cmake
 delete mode 100644 hw/bsp/saml2x/boards/sensorwatch_m0/board.h
 delete mode 100644 hw/bsp/saml2x/boards/sensorwatch_m0/board.mk
 delete mode 100644 hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
 delete mode 100644 hw/bsp/saml2x/family.c
 delete mode 100644 hw/bsp/saml2x/family.cmake
 delete mode 100644 hw/bsp/saml2x/family.mk

(limited to 'hw')

diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h
index c774f59ff..31731ac1b 100644
--- a/examples/device/net_lwip_webserver/src/tusb_config.h
+++ b/examples/device/net_lwip_webserver/src/tusb_config.h
@@ -88,7 +88,7 @@ extern "C" {
 #ifndef USE_ECM
 #if TU_CHECK_MCU(OPT_MCU_LPC15XX, OPT_MCU_LPC40XX, OPT_MCU_LPC51UXX, OPT_MCU_LPC54)
   #define USE_ECM 1
-#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAML21, OPT_MCU_SAML22)
+#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAML2X)
   #define USE_ECM 1
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32F1)
   #define USE_ECM 1
diff --git a/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
deleted file mode 100644
index 6c9ecae2d..000000000
--- a/hw/bsp/samd21/FreeRTOSConfig/FreeRTOSConfig.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * FreeRTOS Kernel V10.0.0
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software. If you wish to use our Amazon
- * FreeRTOS name, please do so in a fair use way that does not cause confusion.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *
- * See http://www.freertos.org/a00110.html.
- *----------------------------------------------------------*/
-
-// skip if included from IAR assembler
-#ifndef __IASMARM__
-  #include "sam.h"
-#endif
-
-/* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU                        0
-#if defined(__ARM_FP) && __ARM_FP >= 4
-  #define configENABLE_FPU                      1
-#else
-  #define configENABLE_FPU                      0
-#endif
-#define configENABLE_TRUSTZONE                  0
-#define configMINIMAL_SECURE_STACK_SIZE         (1024)
-
-#define configUSE_PREEMPTION                    1
-#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
-#define configCPU_CLOCK_HZ                      SystemCoreClock
-#define configTICK_RATE_HZ                      ( 1000 )
-#define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
-#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
-#define configMAX_TASK_NAME_LEN                 16
-#define configUSE_16_BIT_TICKS                  0
-#define configIDLE_SHOULD_YIELD                 1
-#define configUSE_MUTEXES                       1
-#define configUSE_RECURSIVE_MUTEXES             1
-#define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               4
-#define configUSE_QUEUE_SETS                    0
-#define configUSE_TIME_SLICING                  0
-#define configUSE_NEWLIB_REENTRANT              0
-#define configENABLE_BACKWARD_COMPATIBILITY     1
-#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
-
-#define configSUPPORT_STATIC_ALLOCATION         1
-#define configSUPPORT_DYNAMIC_ALLOCATION        0
-
-/* Hook function related definitions. */
-#define configUSE_IDLE_HOOK                    0
-#define configUSE_TICK_HOOK                    0
-#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
-#define configCHECK_FOR_STACK_OVERFLOW         2
-#define configCHECK_HANDLER_INSTALLATION       0
-
-/* Run time and task stats gathering related definitions. */
-#define configGENERATE_RUN_TIME_STATS          0
-#define configRECORD_STACK_HIGH_ADDRESS        1
-#define configUSE_TRACE_FACILITY               1 // legacy trace
-#define configUSE_STATS_FORMATTING_FUNCTIONS   0
-
-/* Co-routine definitions. */
-#define configUSE_CO_ROUTINES                  0
-#define configMAX_CO_ROUTINE_PRIORITIES        2
-
-/* Software timer related definitions. */
-#define configUSE_TIMERS                       1
-#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
-#define configTIMER_QUEUE_LENGTH               32
-#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
-
-/* Optional functions - most linkers will remove unused functions anyway. */
-#define INCLUDE_vTaskPrioritySet               0
-#define INCLUDE_uxTaskPriorityGet              0
-#define INCLUDE_vTaskDelete                    0
-#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
-#define INCLUDE_xResumeFromISR                 0
-#define INCLUDE_vTaskDelayUntil                1
-#define INCLUDE_vTaskDelay                     1
-#define INCLUDE_xTaskGetSchedulerState         0
-#define INCLUDE_xTaskGetCurrentTaskHandle      1
-#define INCLUDE_uxTaskGetStackHighWaterMark    0
-#define INCLUDE_xTaskGetIdleTaskHandle         0
-#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
-#define INCLUDE_pcTaskGetTaskName              0
-#define INCLUDE_eTaskGetState                  0
-#define INCLUDE_xEventGroupSetBitFromISR       0
-#define INCLUDE_xTimerPendFunctionCall         0
-
-/* FreeRTOS hooks to NVIC vectors */
-#define xPortPendSVHandler    PendSV_Handler
-#define xPortSysTickHandler   SysTick_Handler
-#define vPortSVCHandler       SVC_Handler
-
-//--------------------------------------------------------------------+
-// Interrupt nesting behavior configuration.
-//--------------------------------------------------------------------+
-
-// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
-#define configPRIO_BITS       2
-
-/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
-
-/* The highest interrupt priority that can be used by any interrupt service
-routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
-INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
-PRIORITY THAN THIS! (higher priorities are lower numeric values. */
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
-
-/* Interrupt priorities used by the kernel port layer itself.  These are generic
-to all Cortex-M ports, and do not rely on any particular library functions. */
-#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
-See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-#endif
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake b/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
deleted file mode 100644
index 46a3880ed..000000000
--- a/hw/bsp/samd21/boards/atsamd21_xpro/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21J18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21j18a_flash.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21J18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.h b/hw/bsp/samd21/boards/atsamd21_xpro/board.h
deleted file mode 100644
index 82ab321cf..000000000
--- a/hw/bsp/samd21/boards/atsamd21_xpro/board.h
+++ /dev/null
@@ -1,60 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SAMD21 Xplained Pro
-   url: https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMD21-XPRO
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               (32 + 30) // PB30
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            (0  + 15) // PA15
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/board.mk b/hw/bsp/samd21/boards/atsamd21_xpro/board.mk
deleted file mode 100644
index 4be547a1b..000000000
--- a/hw/bsp/samd21/boards/atsamd21_xpro/board.mk
+++ /dev/null
@@ -1,10 +0,0 @@
-CFLAGS += -D__SAMD21J18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/samd21j18a_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21J18
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/samd21/boards/atsamd21_xpro/samd21j18a_flash.ld b/hw/bsp/samd21/boards/atsamd21_xpro/samd21j18a_flash.ld
deleted file mode 100644
index d9b086f9c..000000000
--- a/hw/bsp/samd21/boards/atsamd21_xpro/samd21j18a_flash.ld
+++ /dev/null
@@ -1,144 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21J18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.cmake b/hw/bsp/samd21/boards/circuitplayground_express/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/circuitplayground_express/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.h b/hw/bsp/samd21/boards/circuitplayground_express/board.h
deleted file mode 100644
index bfe2d9951..000000000
--- a/hw/bsp/samd21/boards/circuitplayground_express/board.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit Circuit Playground Express
-   url: https://www.adafruit.com/product/3333
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            28
-#define BUTTON_STATE_ACTIVE   1
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/board.mk b/hw/bsp/samd21/boards/circuitplayground_express/board.mk
deleted file mode 100644
index d6c9150b3..000000000
--- a/hw/bsp/samd21/boards/circuitplayground_express/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/circuitplayground_express/circuitplayground_express.ld b/hw/bsp/samd21/boards/circuitplayground_express/circuitplayground_express.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/circuitplayground_express/circuitplayground_express.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.cmake b/hw/bsp/samd21/boards/curiosity_nano/board.cmake
deleted file mode 100644
index ff779c0fd..000000000
--- a/hw/bsp/samd21/boards/curiosity_nano/board.cmake
+++ /dev/null
@@ -1,10 +0,0 @@
-set(JLINK_DEVICE atsamd21g17a)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g17a_flash.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G17A__
-    CFG_EXAMPLE_MSC_READONLY
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.h b/hw/bsp/samd21/boards/curiosity_nano/board.h
deleted file mode 100644
index a2a7385a4..000000000
--- a/hw/bsp/samd21/boards/curiosity_nano/board.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SAMD21 Curiosty Nano
-   url: https://www.microchip.com/en-us/development-tool/dm320119
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               (32 + 10) // PB10
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            (0  + 11) // PB11
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           31	// CDC5_RX
-#define UART_TX_PIN           37	// CDC5_TX
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/curiosity_nano/board.mk b/hw/bsp/samd21/boards/curiosity_nano/board.mk
deleted file mode 100644
index 112fb6946..000000000
--- a/hw/bsp/samd21/boards/curiosity_nano/board.mk
+++ /dev/null
@@ -1,14 +0,0 @@
-CFLAGS += -D__SAMD21G17A__ -DCFG_EXAMPLE_MSC_READONLY -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/samd21g17a_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = atsamd21g17a
-
-# flash using jlink (options are: jlink/cmsisdap/stlink/dfu)
-#flash: flash-jlink
-
-PYOCD_TARGET = atsamd21g17a
-PYOCD_OPTION = -O dap_protocol=swd
-flash: flash-pyocd
diff --git a/hw/bsp/samd21/boards/curiosity_nano/samd21g17a_flash.ld b/hw/bsp/samd21/boards/curiosity_nano/samd21g17a_flash.ld
deleted file mode 100644
index e03a4ce60..000000000
--- a/hw/bsp/samd21/boards/curiosity_nano/samd21g17a_flash.ld
+++ /dev/null
@@ -1,144 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G17A/D
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
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-
-        . = ALIGN(4);
-        __init_array_start = .;
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-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
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-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.cmake b/hw/bsp/samd21/boards/cynthion_d21/board.cmake
deleted file mode 100644
index fb54b7561..000000000
--- a/hw/bsp/samd21/boards/cynthion_d21/board.cmake
+++ /dev/null
@@ -1,12 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g18a_flash.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-  target_link_options(${TARGET} PUBLIC
-    "LINKER:--defsym=BOOTLOADER_SIZE=0x800"
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.h b/hw/bsp/samd21/boards/cynthion_d21/board.h
deleted file mode 100644
index 83782bc65..000000000
--- a/hw/bsp/samd21/boards/cynthion_d21/board.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Great Scott Gadgets Cynthion
-   url: https://greatscottgadgets.com/cynthion/
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               PIN_PA22
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            PIN_PB22
-#define BUTTON_STATE_ACTIVE   0
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/cynthion_d21/board.mk b/hw/bsp/samd21/boards/cynthion_d21/board.mk
deleted file mode 100644
index 52c9d60cb..000000000
--- a/hw/bsp/samd21/boards/cynthion_d21/board.mk
+++ /dev/null
@@ -1,16 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-LD_FILE = $(BOARD_PATH)/samd21g18a_flash.ld
-
-# Default bootloader size is now 2K, allow to specify other
-ifeq ($(BOOTLOADER_SIZE), )
-	BOOTLOADER_SIZE := 0x800
-endif
-LDFLAGS += -Wl,--defsym=BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-# flash using dfu-util
-flash: $(BUILD)/$(PROJECT).bin
-	dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $<
diff --git a/hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld b/hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
deleted file mode 100644
index 95d71b9e3..000000000
--- a/hw/bsp/samd21/boards/cynthion_d21/samd21g18a_flash.ld
+++ /dev/null
@@ -1,144 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + BOOTLOADER_SIZE, LENGTH = 0x00040000 - BOOTLOADER_SIZE
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
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-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.cmake b/hw/bsp/samd21/boards/feather_m0_express/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/feather_m0_express/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.h b/hw/bsp/samd21/boards/feather_m0_express/board.h
deleted file mode 100644
index 6fe13eb30..000000000
--- a/hw/bsp/samd21/boards/feather_m0_express/board.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit Feather M0 Express
-   url: https://www.adafruit.com/product/3403
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            15
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-// SPI for USB host shield
-#define MAX3421_SERCOM_ID       4       // SERCOM4
-#define MAX3421_SERCOM_FUNCTION 3       // function D (Sercom Alt)
-
-#define MAX3421_SCK_PIN         (32+11)
-#define MAX3421_MOSI_PIN        (32+10)
-#define MAX3421_MISO_PIN        12
-#define MAX3421_TX_PAD          1 // MOSI = PAD_2, SCK = PAD_3
-#define MAX3421_RX_PAD          0 // MISO = PAD_2
-
-#define MAX3421_CS_PIN          18     // D10
-
-#define MAX3421_INTR_PIN        7      // D10
-#define MAX3421_INTR_EIC_ID     7      // EIC7
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/feather_m0_express/board.mk b/hw/bsp/samd21/boards/feather_m0_express/board.mk
deleted file mode 100644
index d6c9150b3..000000000
--- a/hw/bsp/samd21/boards/feather_m0_express/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/feather_m0_express/feather_m0_express.ld b/hw/bsp/samd21/boards/feather_m0_express/feather_m0_express.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/feather_m0_express/feather_m0_express.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
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-        *(.ARM.extab* .gnu.linkonce.armextab.*)
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-           and the C library. This also provides support for C++ code. */
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-
-        . = ALIGN(4);
-        KEEP(*(.fini))
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-        . = ALIGN(4);
-        __fini_array_start = .;
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-        __fini_array_end = .;
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-        . = ALIGN(4);
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-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
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-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
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-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake b/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/itsybitsy_m0/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.h b/hw/bsp/samd21/boards/itsybitsy_m0/board.h
deleted file mode 100644
index d901b2ea4..000000000
--- a/hw/bsp/samd21/boards/itsybitsy_m0/board.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit ItsyBitsy M0
-   url: https://www.adafruit.com/product/3727
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            21
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/board.mk b/hw/bsp/samd21/boards/itsybitsy_m0/board.mk
deleted file mode 100644
index d6c9150b3..000000000
--- a/hw/bsp/samd21/boards/itsybitsy_m0/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/itsybitsy_m0/itsybitsy_m0.ld b/hw/bsp/samd21/boards/itsybitsy_m0/itsybitsy_m0.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/itsybitsy_m0/itsybitsy_m0.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.cmake b/hw/bsp/samd21/boards/metro_m0_express/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/metro_m0_express/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.h b/hw/bsp/samd21/boards/metro_m0_express/board.h
deleted file mode 100644
index 726de3259..000000000
--- a/hw/bsp/samd21/boards/metro_m0_express/board.h
+++ /dev/null
@@ -1,74 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit Metro M0 Express
-   url: https://www.adafruit.com/product/3505
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17
-#define LED_STATE_ON          1
-
-// Button: D5
-#define BUTTON_PIN            15
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-// SPI for USB host shield
-#define MAX3421_SERCOM_ID       4       // SERCOM4
-#define MAX3421_SERCOM_FUNCTION 3       // function D (Sercom Alt)
-
-#define MAX3421_SCK_PIN         (32+11)
-#define MAX3421_MOSI_PIN        (32+10)
-#define MAX3421_MISO_PIN        12
-#define MAX3421_TX_PAD          1 // MOSI = PAD_2, SCK = PAD_3
-#define MAX3421_RX_PAD          0 // MISO = PAD_2
-
-#define MAX3421_CS_PIN          18      // D10
-
-#define MAX3421_INTR_PIN        7       // D9
-#define MAX3421_INTR_EIC_ID     7       // EIC7
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/metro_m0_express/board.mk b/hw/bsp/samd21/boards/metro_m0_express/board.mk
deleted file mode 100644
index d6c9150b3..000000000
--- a/hw/bsp/samd21/boards/metro_m0_express/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/metro_m0_express/metro_m0_express.ld b/hw/bsp/samd21/boards/metro_m0_express/metro_m0_express.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/metro_m0_express/metro_m0_express.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/qtpy/board.cmake b/hw/bsp/samd21/boards/qtpy/board.cmake
deleted file mode 100644
index f6cd446dd..000000000
--- a/hw/bsp/samd21/boards/qtpy/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21E18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21E18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/qtpy/board.h b/hw/bsp/samd21/boards/qtpy/board.h
deleted file mode 100644
index b1cf338e4..000000000
--- a/hw/bsp/samd21/boards/qtpy/board.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit QT Py
-   url: https://www.adafruit.com/product/4600
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED is neopixel, leave unset for now
-
-// Button is wired to reset
-
-// UART
-#define UART_RX_PIN           8
-#define UART_TX_PIN           7
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/qtpy/board.mk b/hw/bsp/samd21/boards/qtpy/board.mk
deleted file mode 100644
index 6cefa84c3..000000000
--- a/hw/bsp/samd21/boards/qtpy/board.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-# For Adafruit QT Py board
-
-CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21E18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/qtpy/qtpy.ld b/hw/bsp/samd21/boards/qtpy/qtpy.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/qtpy/qtpy.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
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-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake b/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/seeeduino_xiao/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.h b/hw/bsp/samd21/boards/seeeduino_xiao/board.h
deleted file mode 100644
index 1c434c68c..000000000
--- a/hw/bsp/samd21/boards/seeeduino_xiao/board.h
+++ /dev/null
@@ -1,59 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Seeeduino XIAO
-   url: https://wiki.seeedstudio.com/Seeeduino-XIAO/
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            9 // PA4 pin D1 on seed input
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
- (void) rhport; (void) state;
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/board.mk b/hw/bsp/samd21/boards/seeeduino_xiao/board.mk
deleted file mode 100644
index 1c888da3a..000000000
--- a/hw/bsp/samd21/boards/seeeduino_xiao/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/samd21/boards/seeeduino_xiao/seeeduino_xiao.ld b/hw/bsp/samd21/boards/seeeduino_xiao/seeeduino_xiao.ld
deleted file mode 100644
index 0d0c4e6c4..000000000
--- a/hw/bsp/samd21/boards/seeeduino_xiao/seeeduino_xiao.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K  /* 8K offset to preserve bootloader */
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.cmake b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.cmake
deleted file mode 100644
index c1a612936..000000000
--- a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21G18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21G18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
deleted file mode 100644
index a05cf5e4e..000000000
--- a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.h
+++ /dev/null
@@ -1,62 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SparkFun SAMD21 Mini
-   url: https://www.sparkfun.com/products/13664
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               17 // PA17 (D13)
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            14 // PA14 (D2)
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_SERCOM           0
-#define UART_RX_PIN           11 // PA11 D0
-#define UART_TX_PIN           10 // PA10 D1
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
-  (void) rhport;
-  gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(PIN_PA28, state);
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.mk b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.mk
deleted file mode 100644
index d6c9150b3..000000000
--- a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/board.mk
+++ /dev/null
@@ -1,9 +0,0 @@
-CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAMD21G18
-
-flash: flash-bossac
diff --git a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld b/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
deleted file mode 100644
index 0754a8e9c..000000000
--- a/hw/bsp/samd21/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000-0x0004 /* 4 bytes used by bootloader to keep data between resets */
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.cmake b/hw/bsp/samd21/boards/trinket_m0/board.cmake
deleted file mode 100644
index f6cd446dd..000000000
--- a/hw/bsp/samd21/boards/trinket_m0/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(JLINK_DEVICE ATSAMD21E18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAMD21E18A__
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.h b/hw/bsp/samd21/boards/trinket_m0/board.h
deleted file mode 100644
index 01ad83089..000000000
--- a/hw/bsp/samd21/boards/trinket_m0/board.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Jean Gressmann <jean@0x42.de>
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- */
-
-/* metadata:
-   name: Adafruit Trinket M0
-   url: https://www.adafruit.com/product/3500
-*/
-
-#pragma once
-
-// LED
-#define LED_PIN               10 // PA10
-#define LED_STATE_ON          1
-
-// UART
-#define UART_SERCOM           0
-#define UART_RX_PIN           7
-#define UART_TX_PIN           6
-
-static inline void board_vbus_set(uint8_t rhport, bool state) {
-  (void) rhport; (void) state;
-}
diff --git a/hw/bsp/samd21/boards/trinket_m0/board.mk b/hw/bsp/samd21/boards/trinket_m0/board.mk
deleted file mode 100644
index 6addf13b7..000000000
--- a/hw/bsp/samd21/boards/trinket_m0/board.mk
+++ /dev/null
@@ -1,4 +0,0 @@
-CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/trinket_m0.ld
diff --git a/hw/bsp/samd21/boards/trinket_m0/trinket_m0.ld b/hw/bsp/samd21/boards/trinket_m0/trinket_m0.ld
deleted file mode 100644
index ce7aff80b..000000000
--- a/hw/bsp/samd21/boards/trinket_m0/trinket_m0.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAMD21G18A
- *
- * Copyright (c) 2017 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-ENTRY(Reset_Handler)
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/samd21/family.c b/hw/bsp/samd21/family.c
deleted file mode 100644
index 14e60e917..000000000
--- a/hw/bsp/samd21/family.c
+++ /dev/null
@@ -1,453 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   manufacturer: Microchip
-*/
-
-#include "sam.h"
-#include "bsp/board_api.h"
-
-// Suppress warning caused by mcu driver
-#ifdef __GNUC__
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wcast-qual"
-#endif
-
-#include "hal/include/hal_gpio.h"
-#include "hal/include/hal_init.h"
-#include "hri/hri_nvmctrl_d21.h"
-
-#include "hpl/gclk/hpl_gclk_base.h"
-#include "hpl_pm_config.h"
-#include "hpl/pm/hpl_pm_base.h"
-
-#ifdef __GNUC__
-#pragma GCC diagnostic pop
-#endif
-
-static inline void board_vbus_set(uint8_t rhport, bool state) TU_ATTR_UNUSED;
-#include "board.h"
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-
-/* Referenced GCLKs, should be initialized firstly */
-#define _GCLK_INIT_1ST (1 << 0 | 1 << 1)
-
-/* Not referenced GCLKs, initialized last */
-#define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_Handler(void) {
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-
-#if CFG_TUH_ENABLED && !CFG_TUH_MAX3421
-  tuh_int_handler(0);
-#endif
-}
-
-//--------------------------------------------------------------------+
-// Implementation
-//--------------------------------------------------------------------+
-static void uart_init(void);
-
-#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
-#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
-static void max3421_init(void);
-#endif
-
-void board_init(void) {
-  // Clock init ( follow hpl_init.c )
-  hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
-
-  _pm_init();
-  _sysctrl_init_sources();
-#if _GCLK_INIT_1ST
-  _gclk_init_generators_by_fref(_GCLK_INIT_1ST);
-#endif
-  _sysctrl_init_referenced_generators();
-  _gclk_init_generators_by_fref(_GCLK_INIT_LAST);
-
-  // Update SystemCoreClock since it is hard coded with asf4 and not correct
-  // Init 1ms tick timer (samd SystemCoreClock may not correct)
-  SystemCoreClock = CONF_CPU_FREQUENCY;
-#if CFG_TUSB_OS == OPT_OS_NONE
-  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
-#endif
-
-  // Led init
-#ifdef LED_PIN
-  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
-  board_led_write(false);
-#endif
-
-  // Button init
-#ifdef BUTTON_PIN
-  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
-#endif
-
-  uart_init();
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-#endif
-
-  /* USB Clock init
-   * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
-   * for low speed and full speed operation. */
-  _pm_enable_bus_clock(PM_BUS_APBB, USB);
-  _pm_enable_bus_clock(PM_BUS_AHB, USB);
-  _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
-
-  // USB Pin Init
-  gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(PIN_PA24, false);
-  gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
-  gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(PIN_PA25, false);
-  gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
-
-  gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
-  gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
-
-  // Output 500hz PWM on D12 (PA19 - TCC0 WO[3]) so we can validate the GCLK0 clock speed with a Saleae.
-  _pm_enable_bus_clock(PM_BUS_APBC, TCC0);
-  TCC0->PER.bit.PER = 48000000 / 1000;
-  TCC0->CC[3].bit.CC = 48000000 / 2000;
-  TCC0->CTRLA.bit.ENABLE = true;
-
-  gpio_set_pin_function(PIN_PA19, PINMUX_PA19F_TCC0_WO3);
-  _gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
-
-#if CFG_TUH_ENABLED
-  #if CFG_TUH_MAX3421
-    max3421_init();
-  #else
-    // VBUS Power
-    board_vbus_set(0, true);
-  #endif
-#endif
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state) {
-  (void) state;
-#ifdef LED_PIN
-  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
-#endif
-}
-
-uint32_t board_button_read(void) {
-#ifdef BUTTON_PIN
-  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
-#else
-  return 0;
-#endif
-}
-
-#if defined(UART_SERCOM)
-
-#define BOARD_SERCOM2(n)  SERCOM ## n
-#define BOARD_SERCOM(n) BOARD_SERCOM2(n)
-
-static void uart_init(void)
-{
-#if UART_SERCOM == 0
-  #if UART_TX_PIN == 6
-    gpio_set_pin_function(PIN_PA06, PINMUX_PA06D_SERCOM0_PAD2);
-  #elif UART_TX_PIN == 10
-    gpio_set_pin_function(PIN_PA10, PINMUX_PA10C_SERCOM0_PAD2);
-  #else
-    #error "UART_TX_PIN not supported"
-  #endif
-
-  #if UART_RX_PIN == 7
-    gpio_set_pin_function(PIN_PA07, PINMUX_PA07D_SERCOM0_PAD3);
-  #elif UART_RX_PIN == 11
-    gpio_set_pin_function(PIN_PA11, PINMUX_PA11C_SERCOM0_PAD3);
-  #else
-    #error "UART_RX_PIN not supported"
-#endif
-
-  // setup clock (48MHz)
-  _pm_enable_bus_clock(PM_BUS_APBC, SERCOM0);
-  _gclk_enable_channel(SERCOM0_GCLK_ID_CORE, GCLK_CLKCTRL_GEN_GCLK0_Val);
-
-  SERCOM0->USART.CTRLA.bit.SWRST = 1; /* reset SERCOM & enable config */
-  while(SERCOM0->USART.SYNCBUSY.bit.SWRST);
-
-  SERCOM0->USART.CTRLA.reg  =  /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
-    SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
-//    SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
-    SERCOM_USART_CTRLA_DORD | /* LSB first */
-    SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
-    SERCOM_USART_CTRLA_RXPO(3) | /* pad 3 */
-    SERCOM_USART_CTRLA_TXPO(1);  /* pad 2 */
-
-  SERCOM0->USART.CTRLB.reg =
-    SERCOM_USART_CTRLB_TXEN | /* tx enabled */
-    SERCOM_USART_CTRLB_RXEN;  /* rx enabled */
-
-  /* 115200 */
-  SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(0) | SERCOM_USART_BAUD_FRAC_BAUD(26);
-
-  SERCOM0->USART.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
-  while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
-#endif
-}
-
-static inline void uart_send_buffer(uint8_t const *text, size_t len)
-{
-  for (size_t i = 0; i < len; ++i) {
-    BOARD_SERCOM(UART_SERCOM)->USART.DATA.reg = text[i];
-    while((BOARD_SERCOM(UART_SERCOM)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0);
-  }
-}
-
-static inline void uart_send_str(const char* text)
-{
-  while (*text) {
-    BOARD_SERCOM(UART_SERCOM)->USART.DATA.reg = *text++;
-    while((BOARD_SERCOM(UART_SERCOM)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0);
-  }
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  if (len < 0) {
-    uart_send_str(buf);
-  } else {
-    uart_send_buffer(buf, len);
-  }
-  return len;
-}
-
-#else // ! defined(UART_SERCOM)
-
-static void uart_init(void) {
-}
-
-int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-int board_uart_write(void const* buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-#endif
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-
-void SysTick_Handler(void) {
-  system_ticks++;
-}
-
-uint32_t board_millis(void) {
-  return system_ticks;
-}
-
-#endif
-
-//--------------------------------------------------------------------+
-//
-//--------------------------------------------------------------------+
-#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
-
-static void max3421_init(void) {
-  //------------- SPI Init -------------//
-  // MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
-  uint32_t const baudrate = 12000000u;
-
-  // Enable the APB clock for SERCOM
-  PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
-
-  // Configure GCLK for SERCOM
-//  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_SERCOM4_CORE | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
-  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val + MAX3421_SERCOM_ID) |
-                      GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
-  while (GCLK->STATUS.bit.SYNCBUSY);
-
-  Sercom* sercom = MAX3421_SERCOM;
-
-  // Disable the SPI module
-  sercom->SPI.CTRLA.bit.ENABLE = 0;
-
-  // Reset the SPI module
-  sercom->SPI.CTRLA.bit.SWRST = 1;
-  while (sercom->SPI.SYNCBUSY.bit.SWRST);
-
-  // Set up SPI in master mode, MSB first, SPI mode 0
-  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
-                          SERCOM_SPI_CTRLA_MODE(3);
-
-  sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
-  while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
-
-  // Set the baud rate
-  sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
-
-  // Configure PA12 as MOSI (PAD0), PA13 as SCK (PAD1), PA14 as MISO (PAD2), function C (sercom)
-  gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_SCK_PIN, MAX3421_SERCOM_FUNCTION);
-
-  gpio_set_pin_direction(MAX3421_MOSI_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_pull_mode(MAX3421_MOSI_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_MOSI_PIN, MAX3421_SERCOM_FUNCTION);
-
-  gpio_set_pin_direction(MAX3421_MISO_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
-  gpio_set_pin_function(MAX3421_MISO_PIN, MAX3421_SERCOM_FUNCTION);
-
-  // CS pin
-  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(MAX3421_CS_PIN, 1);
-
-  // Enable the SPI module
-  sercom->SPI.CTRLA.bit.ENABLE = 1;
-  while (sercom->SPI.SYNCBUSY.bit.ENABLE);
-
-  //------------- External Interrupt -------------//
-
-  // Enable the APB clock for EIC (External Interrupt Controller)
-  PM->APBAMASK.reg |= PM_APBAMASK_EIC;
-
-  // Configure GCLK for EIC
-  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
-  while (GCLK->STATUS.bit.SYNCBUSY);
-
-  // Configure PA20 as an input with function A (external interrupt)
-  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
-  gpio_set_pin_function(MAX3421_INTR_PIN, 0);
-
-  // Disable EIC
-  EIC->CTRL.bit.ENABLE = 0;
-  while (EIC->STATUS.bit.SYNCBUSY);
-
-  // Configure EIC to trigger on falling edge
-  uint8_t const sense_shift = MAX3421_INTR_EIC_ID * 4;
-  EIC->CONFIG[0].reg &= ~(7 << sense_shift);
-  EIC->CONFIG[0].reg |= 2 << sense_shift;
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(EIC_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-#endif
-
-  // Enable External Interrupt
-  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
-
-  // Enable EIC
-  EIC->CTRL.bit.ENABLE = 1;
-  while (EIC->STATUS.bit.SYNCBUSY);
-}
-
-void EIC_Handler(void) {
-  // Clear the interrupt flag
-  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
-
-  // Call the TinyUSB interrupt handler
-  tuh_int_handler(1, true);
-}
-
-// API to enable/disable MAX3421 INTR pin interrupt
-void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
-  (void) rhport;
-
-  if (enabled) {
-    NVIC_EnableIRQ(EIC_IRQn);
-  } else {
-    NVIC_DisableIRQ(EIC_IRQn);
-  }
-}
-
-// API to control MAX3421 SPI CS
-void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
-  (void) rhport;
-  gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
-}
-
-// API to transfer data with MAX3421 SPI
-// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
-bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
-  (void) rhport;
-
-  Sercom* sercom = MAX3421_SERCOM;
-
-  for (size_t count = 0; count < xfer_bytes; count++) {
-    // Wait for the transmit buffer to be empty
-    while (!sercom->SPI.INTFLAG.bit.DRE);
-
-    // Write data to be transmitted
-    uint8_t data = 0x00;
-    if (tx_buf) {
-      data = tx_buf[count];
-    }
-
-    sercom->SPI.DATA.reg = (uint32_t) data;
-
-    // Wait for the receive buffer to be filled
-    while (!sercom->SPI.INTFLAG.bit.RXC);
-
-    // Read received data
-    data = (uint8_t) sercom->SPI.DATA.reg;
-    if (rx_buf) {
-      rx_buf[count] = data;
-    }
-  }
-
-  // wait for bus idle and clear flags
-  while (!(sercom->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
-  sercom->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
-
-  return true;
-}
-
-#endif
diff --git a/hw/bsp/samd21/family.cmake b/hw/bsp/samd21/family.cmake
deleted file mode 100644
index 3c600318e..000000000
--- a/hw/bsp/samd21/family.cmake
+++ /dev/null
@@ -1,110 +0,0 @@
-include_guard()
-
-set(SDK_DIR ${TOP}/hw/mcu/microchip/samd21)
-
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-# toolchain set up
-set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS SAMD21 CACHE INTERNAL "")
-set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
-
-#------------------------------------
-# BOARD_TARGET
-#------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_samd21.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/gcc/system_samd21.c
-    ${SDK_DIR}/hpl/gclk/hpl_gclk.c
-    ${SDK_DIR}/hpl/pm/hpl_pm.c
-    ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
-    ${SDK_DIR}/hal/src/hal_atomic.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${SDK_DIR}
-    ${SDK_DIR}/config
-    ${SDK_DIR}/include
-    ${SDK_DIR}/hal/include
-    ${SDK_DIR}/hal/utils/include
-    ${SDK_DIR}/hpl/pm
-    ${SDK_DIR}/hpl/port
-    ${SDK_DIR}/hri
-    ${SDK_DIR}/CMSIS/Include
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CONF_DFLL_OVERWRITE_CALIBRATION=0
-    )
-
-  update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
-endfunction()
-
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PUBLIC
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_SAMD21)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    ${TOP}/src/portable/microchip/samd/hcd_samd.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-  # Flashing
-  family_add_bin_hex(${TARGET})
-  family_flash_jlink(${TARGET})
-  #family_flash_openocd(${TARGET})
-endfunction()
diff --git a/hw/bsp/samd21/family.mk b/hw/bsp/samd21/family.mk
deleted file mode 100644
index a2c37b2b6..000000000
--- a/hw/bsp/samd21/family.mk
+++ /dev/null
@@ -1,53 +0,0 @@
-UF2_FAMILY_ID = 0x68ed2b88
-SDK_DIR = hw/mcu/microchip/samd21
-
-include $(TOP)/$(BOARD_PATH)/board.mk
-CPU_CORE ?= cortex-m0plus
-
-CFLAGS += \
-  -flto \
-  -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
-  -DCFG_TUSB_MCU=OPT_MCU_SAMD21
-
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=redundant-decls
-
-# SAM driver is flooded with -Wcast-qual which slow down complication significantly
-CFLAGS_SKIP += -Wcast-qual
-
-LDFLAGS_GCC += \
-  -nostdlib -nostartfiles \
-  --specs=nosys.specs --specs=nano.specs \
-
-LDFLAGS_CLANG +=
-
-SRC_C += \
-	src/portable/microchip/samd/dcd_samd.c \
-	src/portable/microchip/samd/hcd_samd.c \
-	${SDK_DIR}/gcc/gcc/startup_samd21.c \
-	${SDK_DIR}/gcc/system_samd21.c \
-	${SDK_DIR}/hal/src/hal_atomic.c \
-	${SDK_DIR}/hpl/gclk/hpl_gclk.c \
-	${SDK_DIR}/hpl/pm/hpl_pm.c \
-	${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c \
-
-INC += \
-	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/${SDK_DIR} \
-	$(TOP)/${SDK_DIR}/config \
-	$(TOP)/${SDK_DIR}/include \
-	$(TOP)/${SDK_DIR}/hal/include \
-	$(TOP)/${SDK_DIR}/hal/utils/include \
-	$(TOP)/${SDK_DIR}/hpl/pm/ \
-	$(TOP)/${SDK_DIR}/hpl/port \
-	$(TOP)/${SDK_DIR}/hri \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-
-# flash using bossac at least version 1.8
-# can be found in arduino15/packages/arduino/tools/bossac/
-# Add it to your PATH or change BOSSAC variable to match your installation
-BOSSAC = bossac
-
-flash-bossac: $(BUILD)/$(PROJECT).bin
-	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
-	$(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R
diff --git a/hw/bsp/samd2x_l2x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/samd2x_l2x/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..6c9ecae2d
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,153 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "sam.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.cmake b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.cmake
new file mode 100644
index 000000000..1f6dd9e4f
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21J18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21j18a_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21J18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.h b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.h
new file mode 100644
index 000000000..82ab321cf
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.h
@@ -0,0 +1,60 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAMD21 Xplained Pro
+   url: https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMD21-XPRO
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               (32 + 30) // PB30
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            (0  + 15) // PA15
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.mk b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.mk
new file mode 100644
index 000000000..9127a79e7
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/board.mk
@@ -0,0 +1,12 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21J18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/samd21j18a_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21J18
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/samd21j18a_flash.ld b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/samd21j18a_flash.ld
new file mode 100644
index 000000000..d9b086f9c
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsamd21_xpro/samd21j18a_flash.ld
@@ -0,0 +1,144 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21J18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.cmake b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.cmake
new file mode 100644
index 000000000..874b741cc
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.cmake
@@ -0,0 +1,9 @@
+set(SAM_FAMILY saml21)
+set(JLINK_DEVICE ATSAML21J18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/saml21j18b_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAML21J18B__
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.h b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.h
new file mode 100644
index 000000000..b93b4e591
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.h
@@ -0,0 +1,55 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAML21 Xplained Pro
+   url: https://www.microchip.com/en-us/development-tool/atsaml21-xpro-b
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               (32 + 30) // PB30
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            (0  + 15) // PA15
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.mk b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.mk
new file mode 100644
index 000000000..4ebfa7e71
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/board.mk
@@ -0,0 +1,12 @@
+SAM_FAMILY = saml21
+
+CFLAGS += -D__SAML21J18B__
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/saml21j18b_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAML21J18
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/saml21j18b_flash.ld b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/saml21j18b_flash.ld
new file mode 100644
index 000000000..f9523451b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/atsaml21_xpro/saml21j18b_flash.ld
@@ -0,0 +1,155 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAML21J18B
+ *
+ * Copyright (c) 2016 Atmel Corporation,
+ *                    a wholly owned subsidiary of Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+ENTRY(Reset_Handler)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+  lpram    (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00002000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    .lpram (NOLOAD):
+    {
+        . = ALIGN(8);
+        _slpram = .;
+        *(.lpram .lpram.*);
+        . = ALIGN(8);
+        _elpram = .;
+    } > lpram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.cmake b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.h b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.h
new file mode 100644
index 000000000..bfe2d9951
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.h
@@ -0,0 +1,59 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Adafruit Circuit Playground Express
+   url: https://www.adafruit.com/product/3333
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            28
+#define BUTTON_STATE_ACTIVE   1
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.mk b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.mk
new file mode 100644
index 000000000..f4211e6c8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/circuitplayground_express/circuitplayground_express.ld b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/circuitplayground_express.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/circuitplayground_express/circuitplayground_express.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.cmake b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.cmake
new file mode 100644
index 000000000..be744a130
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.cmake
@@ -0,0 +1,11 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE atsamd21g17a)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g17a_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G17A__
+    CFG_EXAMPLE_MSC_READONLY
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.h b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.h
new file mode 100644
index 000000000..a2a7385a4
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.h
@@ -0,0 +1,59 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAMD21 Curiosty Nano
+   url: https://www.microchip.com/en-us/development-tool/dm320119
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               (32 + 10) // PB10
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            (0  + 11) // PB11
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           31	// CDC5_RX
+#define UART_TX_PIN           37	// CDC5_TX
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.mk b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.mk
new file mode 100644
index 000000000..b7ebc867e
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/curiosity_nano/board.mk
@@ -0,0 +1,16 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G17A__ -DCFG_EXAMPLE_MSC_READONLY -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/samd21g17a_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = atsamd21g17a
+
+# flash using jlink (options are: jlink/cmsisdap/stlink/dfu)
+#flash: flash-jlink
+
+PYOCD_TARGET = atsamd21g17a
+PYOCD_OPTION = -O dap_protocol=swd
+flash: flash-pyocd
diff --git a/hw/bsp/samd2x_l2x/boards/curiosity_nano/samd21g17a_flash.ld b/hw/bsp/samd2x_l2x/boards/curiosity_nano/samd21g17a_flash.ld
new file mode 100644
index 000000000..e03a4ce60
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/curiosity_nano/samd21g17a_flash.ld
@@ -0,0 +1,144 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G17A/D
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00004000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x1000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.cmake b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.cmake
new file mode 100644
index 000000000..ae739b215
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.cmake
@@ -0,0 +1,13 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/samd21g18a_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+  target_link_options(${TARGET} PUBLIC
+    "LINKER:--defsym=BOOTLOADER_SIZE=0x800"
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.h b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.h
new file mode 100644
index 000000000..83782bc65
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.h
@@ -0,0 +1,55 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Great Scott Gadgets Cynthion
+   url: https://greatscottgadgets.com/cynthion/
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               PIN_PA22
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            PIN_PB22
+#define BUTTON_STATE_ACTIVE   0
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.mk b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.mk
new file mode 100644
index 000000000..05ca9cb5d
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/cynthion_d21/board.mk
@@ -0,0 +1,18 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+LD_FILE = $(BOARD_PATH)/samd21g18a_flash.ld
+
+# Default bootloader size is now 2K, allow to specify other
+ifeq ($(BOOTLOADER_SIZE), )
+	BOOTLOADER_SIZE := 0x800
+endif
+LDFLAGS += -Wl,--defsym=BOOTLOADER_SIZE=$(BOOTLOADER_SIZE)
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+# flash using dfu-util
+flash: $(BUILD)/$(PROJECT).bin
+	dfu-util -a 0 -d 1d50:615c -D $< || dfu-util -a 0 -d 16d0:05a5 -D $<
diff --git a/hw/bsp/samd2x_l2x/boards/cynthion_d21/samd21g18a_flash.ld b/hw/bsp/samd2x_l2x/boards/cynthion_d21/samd21g18a_flash.ld
new file mode 100644
index 000000000..95d71b9e3
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/cynthion_d21/samd21g18a_flash.ld
@@ -0,0 +1,144 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + BOOTLOADER_SIZE, LENGTH = 0x00040000 - BOOTLOADER_SIZE
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.cmake b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.h b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.h
new file mode 100644
index 000000000..6fe13eb30
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.h
@@ -0,0 +1,74 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Adafruit Feather M0 Express
+   url: https://www.adafruit.com/product/3403
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            15
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+// SPI for USB host shield
+#define MAX3421_SERCOM_ID       4       // SERCOM4
+#define MAX3421_SERCOM_FUNCTION 3       // function D (Sercom Alt)
+
+#define MAX3421_SCK_PIN         (32+11)
+#define MAX3421_MOSI_PIN        (32+10)
+#define MAX3421_MISO_PIN        12
+#define MAX3421_TX_PAD          1 // MOSI = PAD_2, SCK = PAD_3
+#define MAX3421_RX_PAD          0 // MISO = PAD_2
+
+#define MAX3421_CS_PIN          18     // D10
+
+#define MAX3421_INTR_PIN        7      // D10
+#define MAX3421_INTR_EIC_ID     7      // EIC7
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.mk b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.mk
new file mode 100644
index 000000000..f4211e6c8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/feather_m0_express/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/feather_m0_express/feather_m0_express.ld b/hw/bsp/samd2x_l2x/boards/feather_m0_express/feather_m0_express.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/feather_m0_express/feather_m0_express.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.cmake b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.h b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.h
new file mode 100644
index 000000000..d901b2ea4
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.h
@@ -0,0 +1,59 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Adafruit ItsyBitsy M0
+   url: https://www.adafruit.com/product/3727
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            21
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.mk b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.mk
new file mode 100644
index 000000000..f4211e6c8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/itsybitsy_m0.ld b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/itsybitsy_m0.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/itsybitsy_m0/itsybitsy_m0.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.cmake b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.h b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.h
new file mode 100644
index 000000000..726de3259
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.h
@@ -0,0 +1,74 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Adafruit Metro M0 Express
+   url: https://www.adafruit.com/product/3505
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17
+#define LED_STATE_ON          1
+
+// Button: D5
+#define BUTTON_PIN            15
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+// SPI for USB host shield
+#define MAX3421_SERCOM_ID       4       // SERCOM4
+#define MAX3421_SERCOM_FUNCTION 3       // function D (Sercom Alt)
+
+#define MAX3421_SCK_PIN         (32+11)
+#define MAX3421_MOSI_PIN        (32+10)
+#define MAX3421_MISO_PIN        12
+#define MAX3421_TX_PAD          1 // MOSI = PAD_2, SCK = PAD_3
+#define MAX3421_RX_PAD          0 // MISO = PAD_2
+
+#define MAX3421_CS_PIN          18      // D10
+
+#define MAX3421_INTR_PIN        7       // D9
+#define MAX3421_INTR_EIC_ID     7       // EIC7
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.mk b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.mk
new file mode 100644
index 000000000..f4211e6c8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/metro_m0_express/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/metro_m0_express/metro_m0_express.ld b/hw/bsp/samd2x_l2x/boards/metro_m0_express/metro_m0_express.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/metro_m0_express/metro_m0_express.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/qtpy/board.cmake b/hw/bsp/samd2x_l2x/boards/qtpy/board.cmake
new file mode 100644
index 000000000..958944620
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/qtpy/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21E18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21E18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/qtpy/board.h b/hw/bsp/samd2x_l2x/boards/qtpy/board.h
new file mode 100644
index 000000000..b1cf338e4
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/qtpy/board.h
@@ -0,0 +1,55 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Adafruit QT Py
+   url: https://www.adafruit.com/product/4600
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED is neopixel, leave unset for now
+
+// Button is wired to reset
+
+// UART
+#define UART_RX_PIN           8
+#define UART_TX_PIN           7
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/qtpy/board.mk b/hw/bsp/samd2x_l2x/boards/qtpy/board.mk
new file mode 100644
index 000000000..4009c8a38
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/qtpy/board.mk
@@ -0,0 +1,13 @@
+SAM_FAMILY = samd21
+
+# For Adafruit QT Py board
+
+CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21E18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/qtpy/qtpy.ld b/hw/bsp/samd2x_l2x/boards/qtpy/qtpy.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/qtpy/qtpy.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/saml22_feather/board.cmake b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.cmake
new file mode 100644
index 000000000..7fd79d2ce
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.cmake
@@ -0,0 +1,9 @@
+set(SAM_FAMILY saml22)
+set(JLINK_DEVICE ATSAML22J18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAML22J18A__
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/saml22_feather/board.h b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.h
new file mode 100644
index 000000000..f8660c3f8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SAML22 Feather
+   url: https://github.com/joeycastillo/Feather-Projects/tree/main/SAML22%20Feather
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               PIN_PA08
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            PIN_PA06
+#define BUTTON_STATE_ACTIVE   0
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/saml22_feather/board.mk b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.mk
new file mode 100644
index 000000000..c7817ff70
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/saml22_feather/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = saml22
+
+CFLAGS += -D__SAML22J18A__
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAML22J18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/saml22_feather/saml22_feather.ld b/hw/bsp/samd2x_l2x/boards/saml22_feather/saml22_feather.ld
new file mode 100644
index 000000000..a04305be7
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/saml22_feather/saml22_feather.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAML22J18A
+ *
+ * Copyright (c) 2018 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+ENTRY(Reset_Handler)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.h b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.h
new file mode 100644
index 000000000..1c434c68c
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.h
@@ -0,0 +1,59 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Seeeduino XIAO
+   url: https://wiki.seeedstudio.com/Seeeduino-XIAO/
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17
+#define LED_STATE_ON          0
+
+// Button
+#define BUTTON_PIN            9 // PA4 pin D1 on seed input
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_RX_PIN           4
+#define UART_TX_PIN           5
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+ (void) rhport; (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.mk b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.mk
new file mode 100644
index 000000000..0afe37f12
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+# flash using jlink
+flash: flash-jlink
diff --git a/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/seeeduino_xiao.ld b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/seeeduino_xiao.ld
new file mode 100644
index 000000000..0d0c4e6c4
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/seeeduino_xiao/seeeduino_xiao.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K  /* 8K offset to preserve bootloader */
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.cmake b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.cmake
new file mode 100644
index 000000000..67d26475f
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.cmake
@@ -0,0 +1,9 @@
+set(SAM_FAMILY saml22)
+set(JLINK_DEVICE ATSAML21J18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAML22J18A__
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.h b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.h
new file mode 100644
index 000000000..502c799db
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.h
@@ -0,0 +1,52 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SensorWatch
+   url: https://github.com/joeycastillo/Sensor-Watch
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               PIN_PA21
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            PIN_PA22
+#define BUTTON_STATE_ACTIVE   1
+
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.mk b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.mk
new file mode 100644
index 000000000..c7817ff70
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = saml22
+
+CFLAGS += -D__SAML22J18A__
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAML22J18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/sensorwatch_m0.ld
new file mode 100644
index 000000000..a04305be7
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sensorwatch_m0/sensorwatch_m0.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAML22J18A
+ *
+ * Copyright (c) 2018 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+ENTRY(Reset_Handler)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.cmake b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.cmake
new file mode 100644
index 000000000..dedc07594
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21G18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21G18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.h b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.h
new file mode 100644
index 000000000..a05cf5e4e
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.h
@@ -0,0 +1,62 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: SparkFun SAMD21 Mini
+   url: https://www.sparkfun.com/products/13664
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED
+#define LED_PIN               17 // PA17 (D13)
+#define LED_STATE_ON          1
+
+// Button
+#define BUTTON_PIN            14 // PA14 (D2)
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_SERCOM           0
+#define UART_RX_PIN           11 // PA11 D0
+#define UART_TX_PIN           10 // PA10 D1
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  gpio_set_pin_direction(PIN_PA28, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(PIN_PA28, state);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk
new file mode 100644
index 000000000..f4211e6c8
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/board.mk
@@ -0,0 +1,11 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21G18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/$(BOARD).ld
+
+# For flash-jlink target
+JLINK_DEVICE = ATSAMD21G18
+
+flash: flash-bossac
diff --git a/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
new file mode 100644
index 000000000..0754a8e9c
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/sparkfun_samd21_mini_usb/sparkfun_samd21_mini_usb.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000-0x0004 /* 4 bytes used by bootloader to keep data between resets */
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/trinket_m0/board.cmake b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.cmake
new file mode 100644
index 000000000..958944620
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.cmake
@@ -0,0 +1,10 @@
+set(SAM_FAMILY samd21)
+set(JLINK_DEVICE ATSAMD21E18)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __SAMD21E18A__
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/boards/trinket_m0/board.h b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.h
new file mode 100644
index 000000000..01ad83089
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.h
@@ -0,0 +1,44 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Jean Gressmann <jean@0x42.de>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+/* metadata:
+   name: Adafruit Trinket M0
+   url: https://www.adafruit.com/product/3500
+*/
+
+#pragma once
+
+// LED
+#define LED_PIN               10 // PA10
+#define LED_STATE_ON          1
+
+// UART
+#define UART_SERCOM           0
+#define UART_RX_PIN           7
+#define UART_TX_PIN           6
+
+static inline void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport; (void) state;
+}
diff --git a/hw/bsp/samd2x_l2x/boards/trinket_m0/board.mk b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.mk
new file mode 100644
index 000000000..201259288
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/trinket_m0/board.mk
@@ -0,0 +1,6 @@
+SAM_FAMILY = samd21
+
+CFLAGS += -D__SAMD21E18A__ -DCFG_EXAMPLE_VIDEO_READONLY
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/trinket_m0.ld
diff --git a/hw/bsp/samd2x_l2x/boards/trinket_m0/trinket_m0.ld b/hw/bsp/samd2x_l2x/boards/trinket_m0/trinket_m0.ld
new file mode 100644
index 000000000..ce7aff80b
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/boards/trinket_m0/trinket_m0.ld
@@ -0,0 +1,146 @@
+/**
+ * \file
+ *
+ * \brief Linker script for running in internal FLASH on the SAMD21G18A
+ *
+ * Copyright (c) 2017 Microchip Technology Inc.
+ *
+ * \asf_license_start
+ *
+ * \page License
+ *
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License"); you may
+ * not use this file except in compliance with the License.
+ * You may obtain a copy of the Licence at
+ *
+ * http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an AS IS BASIS, WITHOUT
+ * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ *
+ * \asf_license_stop
+ *
+ */
+
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+SEARCH_DIR(.)
+
+/* Memory Spaces Definitions */
+MEMORY
+{
+  rom      (rx)  : ORIGIN = 0x00000000 + 8K, LENGTH = 0x00040000 - 8K
+  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
+}
+
+/* The stack size used by the application. NOTE: you need to adjust according to your application. */
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
+
+ENTRY(Reset_Handler)
+
+/* Section Definitions */
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4);
+        _sfixed = .;
+        KEEP(*(.vectors .vectors.*))
+        *(.text .text.* .gnu.linkonce.t.*)
+        *(.glue_7t) *(.glue_7)
+        *(.rodata .rodata* .gnu.linkonce.r.*)
+        *(.ARM.extab* .gnu.linkonce.armextab.*)
+
+        /* Support C constructors, and C destructors in both user code
+           and the C library. This also provides support for C++ code. */
+        . = ALIGN(4);
+        KEEP(*(.init))
+        . = ALIGN(4);
+        __preinit_array_start = .;
+        KEEP (*(.preinit_array))
+        __preinit_array_end = .;
+
+        . = ALIGN(4);
+        __init_array_start = .;
+        KEEP (*(SORT(.init_array.*)))
+        KEEP (*(.init_array))
+        __init_array_end = .;
+
+        . = ALIGN(4);
+        KEEP (*crtbegin.o(.ctors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
+        KEEP (*(SORT(.ctors.*)))
+        KEEP (*crtend.o(.ctors))
+
+        . = ALIGN(4);
+        KEEP(*(.fini))
+
+        . = ALIGN(4);
+        __fini_array_start = .;
+        KEEP (*(.fini_array))
+        KEEP (*(SORT(.fini_array.*)))
+        __fini_array_end = .;
+
+        KEEP (*crtbegin.o(.dtors))
+        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
+        KEEP (*(SORT(.dtors.*)))
+        KEEP (*crtend.o(.dtors))
+
+        . = ALIGN(4);
+        _efixed = .;            /* End of text section */
+    } > rom
+
+    /* .ARM.exidx is sorted, so has to go in its own output section.  */
+    PROVIDE_HIDDEN (__exidx_start = .);
+    .ARM.exidx :
+    {
+      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
+    } > rom
+    PROVIDE_HIDDEN (__exidx_end = .);
+
+    . = ALIGN(4);
+    _etext = .;
+
+    .relocate : AT (_etext)
+    {
+        . = ALIGN(4);
+        _srelocate = .;
+        *(.ramfunc .ramfunc.*);
+        *(.data .data.*);
+        . = ALIGN(4);
+        _erelocate = .;
+    } > ram
+
+    /* .bss section which is used for uninitialized data */
+    .bss (NOLOAD) :
+    {
+        . = ALIGN(4);
+        _sbss = . ;
+        _szero = .;
+        *(.bss .bss.*)
+        *(COMMON)
+        . = ALIGN(4);
+        _ebss = . ;
+        _ezero = .;
+        end = .;
+    } > ram
+
+    /* stack section */
+    .stack (NOLOAD):
+    {
+        . = ALIGN(8);
+        _sstack = .;
+        . = . + STACK_SIZE;
+        . = ALIGN(8);
+        _estack = .;
+    } > ram
+
+    . = ALIGN(4);
+    _end = . ;
+}
diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c
new file mode 100644
index 000000000..67da1294e
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/family.c
@@ -0,0 +1,550 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: Microchip
+*/
+
+#include "sam.h"
+#include "bsp/board_api.h"
+
+// Suppress warning caused by mcu driver
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual"
+#endif
+
+#include "hal/include/hal_gpio.h"
+#include "hal/include/hal_init.h"
+#include "hpl/gclk/hpl_gclk_base.h"
+
+// SAMD21 specific includes
+#if defined(__SAMD21E15A__) || defined(__SAMD21E16A__) || defined(__SAMD21E17A__) || defined(__SAMD21E18A__) || \
+    defined(__SAMD21G15A__) || defined(__SAMD21G16A__) || defined(__SAMD21G17A__) || defined(__SAMD21G18A__) || \
+    defined(__SAMD21J15A__) || defined(__SAMD21J16A__) || defined(__SAMD21J17A__) || defined(__SAMD21J18A__)
+  #define SAMD21_FAMILY
+  #include "hri/hri_nvmctrl_d21.h"
+  #include "hpl_pm_config.h"
+  #include "hpl/pm/hpl_pm_base.h"
+#endif
+
+// SAML21/22 specific includes
+#if defined(__SAML21E15B__) || defined(__SAML21E16B__) || defined(__SAML21E17B__) || defined(__SAML21E18B__) || \
+    defined(__SAML21G16B__) || defined(__SAML21G17B__) || defined(__SAML21G18B__) || \
+    defined(__SAML21J16B__) || defined(__SAML21J17B__) || defined(__SAML21J18B__) || \
+    defined(__SAML22G16A__) || defined(__SAML22G17A__) || defined(__SAML22G18A__) || \
+    defined(__SAML22J16A__) || defined(__SAML22J17A__) || defined(__SAML22J18A__) || \
+    defined(__SAML22N16A__) || defined(__SAML22N17A__) || defined(__SAML22N18A__)
+  #define SAML2X_FAMILY
+  #include "hpl_mclk_config.h"
+#endif
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "board.h"
+
+// board_vbus_set is defined in board.h for boards that support it
+#if !defined(board_vbus_set)
+  #define board_vbus_set(rhport, state) do { (void)(rhport); (void)(state); } while(0)
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM DECLARATION
+//--------------------------------------------------------------------+
+
+#ifdef SAMD21_FAMILY
+/* Referenced GCLKs, should be initialized firstly */
+#define _GCLK_INIT_1ST (1 << 0 | 1 << 1)
+/* Not referenced GCLKs, initialized last */
+#define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
+#endif
+
+#ifdef SAML2X_FAMILY
+/* Referenced GCLKs (out of 0~4), should be initialized firstly */
+#define _GCLK_INIT_1ST 0x00000000
+/* Not referenced GCLKs, initialized last */
+#define _GCLK_INIT_LAST 0x0000001F
+#endif
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_Handler(void) {
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+
+#if CFG_TUH_ENABLED && !CFG_TUH_MAX3421
+  tuh_int_handler(0);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Implementation
+//--------------------------------------------------------------------+
+static void uart_init(void);
+
+#if CFG_TUH_ENABLED && CFG_TUH_MAX3421
+#define MAX3421_SERCOM TU_XSTRCAT(SERCOM, MAX3421_SERCOM_ID)
+static void max3421_init(void);
+#endif
+
+void board_init(void) {
+#ifdef SAMD21_FAMILY
+  // Clock init for SAMD21 ( follow hpl_init.c )
+  hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, 2);
+
+  _pm_init();
+  _sysctrl_init_sources();
+#if _GCLK_INIT_1ST
+  _gclk_init_generators_by_fref(_GCLK_INIT_1ST);
+#endif
+  _sysctrl_init_referenced_generators();
+  _gclk_init_generators_by_fref(_GCLK_INIT_LAST);
+#endif
+
+#ifdef SAML2X_FAMILY
+  // Clock init for SAML2x ( follow hpl_init.c )
+  hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
+
+  _set_performance_level(2);
+
+  _osc32kctrl_init_sources();
+  _oscctrl_init_sources();
+  _mclk_init();
+#if _GCLK_INIT_1ST
+  _gclk_init_generators_by_fref(_GCLK_INIT_1ST);
+#endif
+  _oscctrl_init_referenced_generators();
+  _gclk_init_generators_by_fref(_GCLK_INIT_LAST);
+
+#if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3)
+  hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL);
+  hri_port_set_EVCTRL_reg(PORT, 1, CONF_PORTB_EVCTRL);
+#endif
+#endif
+
+  // Update SystemCoreClock since it is hard coded with asf4 and not correct
+  // Init 1ms tick timer (samd SystemCoreClock may not correct)
+  SystemCoreClock = CONF_CPU_FREQUENCY;
+#if CFG_TUSB_OS == OPT_OS_NONE
+  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#endif
+
+  // Led init
+#ifdef LED_PIN
+  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
+  board_led_write(false);
+#endif
+
+  // Button init
+#ifdef BUTTON_PIN
+  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
+#endif
+
+  uart_init();
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+  /* USB Clock init
+   * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
+   * for low speed and full speed operation. */
+#ifdef SAMD21_FAMILY
+  _pm_enable_bus_clock(PM_BUS_APBB, USB);
+  _pm_enable_bus_clock(PM_BUS_AHB, USB);
+  _gclk_enable_channel(USB_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
+#endif
+
+#ifdef SAML2X_FAMILY
+  hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
+  hri_mclk_set_AHBMASK_USB_bit(MCLK);
+  hri_mclk_set_APBBMASK_USB_bit(MCLK);
+#endif
+
+  // USB Pin Init
+  gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(PIN_PA24, false);
+  gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
+  gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(PIN_PA25, false);
+  gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
+
+  gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
+  gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
+
+#ifdef SAMD21_FAMILY
+  // Output 500hz PWM on D12 (PA19 - TCC0 WO[3]) so we can validate the GCLK0 clock speed with a Saleae.
+  _pm_enable_bus_clock(PM_BUS_APBC, TCC0);
+  TCC0->PER.bit.PER = 48000000 / 1000;
+  TCC0->CC[3].bit.CC = 48000000 / 2000;
+  TCC0->CTRLA.bit.ENABLE = true;
+
+  gpio_set_pin_function(PIN_PA19, PINMUX_PA19F_TCC0_WO3);
+  _gclk_enable_channel(TCC0_GCLK_ID, GCLK_CLKCTRL_GEN_GCLK0_Val);
+#endif
+
+#if CFG_TUH_ENABLED
+  #if CFG_TUH_MAX3421
+    max3421_init();
+  #else
+    // VBUS Power
+    board_vbus_set(0, true);
+  #endif
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  (void) state;
+#ifdef LED_PIN
+  gpio_set_pin_level(LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  return BUTTON_STATE_ACTIVE == gpio_get_pin_level(BUTTON_PIN);
+#else
+  return 0;
+#endif
+}
+
+#if defined(UART_SERCOM)
+
+#define BOARD_SERCOM2(n)  SERCOM ## n
+#define BOARD_SERCOM(n) BOARD_SERCOM2(n)
+
+static void uart_init(void)
+{
+#if UART_SERCOM == 0
+  #if UART_TX_PIN == 6
+    gpio_set_pin_function(PIN_PA06, PINMUX_PA06D_SERCOM0_PAD2);
+  #elif UART_TX_PIN == 10
+    gpio_set_pin_function(PIN_PA10, PINMUX_PA10C_SERCOM0_PAD2);
+  #else
+    #error "UART_TX_PIN not supported"
+  #endif
+
+  #if UART_RX_PIN == 7
+    gpio_set_pin_function(PIN_PA07, PINMUX_PA07D_SERCOM0_PAD3);
+  #elif UART_RX_PIN == 11
+    gpio_set_pin_function(PIN_PA11, PINMUX_PA11C_SERCOM0_PAD3);
+  #else
+    #error "UART_RX_PIN not supported"
+#endif
+
+#ifdef SAMD21_FAMILY
+  // setup clock (48MHz)
+  _pm_enable_bus_clock(PM_BUS_APBC, SERCOM0);
+  _gclk_enable_channel(SERCOM0_GCLK_ID_CORE, GCLK_CLKCTRL_GEN_GCLK0_Val);
+#endif
+
+#ifdef SAML2X_FAMILY
+  // setup clock (48MHz)
+  hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
+  hri_mclk_set_APBCMASK_SERCOM0_bit(MCLK);
+#endif
+
+  SERCOM0->USART.CTRLA.bit.SWRST = 1; /* reset SERCOM & enable config */
+  while(SERCOM0->USART.SYNCBUSY.bit.SWRST);
+
+  SERCOM0->USART.CTRLA.reg  =  /* CMODE = 0 -> async, SAMPA = 0, FORM = 0 -> USART frame, SMPR = 0 -> arithmetic baud rate */
+    SERCOM_USART_CTRLA_SAMPR(1) | /* 0 = 16x / arithmetic baud rate, 1 = 16x / fractional baud rate */
+//    SERCOM_USART_CTRLA_FORM(0) | /* 0 = USART Frame, 2 = LIN Master */
+    SERCOM_USART_CTRLA_DORD | /* LSB first */
+    SERCOM_USART_CTRLA_MODE(1) | /* 0 = Asynchronous, 1 = USART with internal clock */
+    SERCOM_USART_CTRLA_RXPO(3) | /* pad 3 */
+    SERCOM_USART_CTRLA_TXPO(1);  /* pad 2 */
+
+  SERCOM0->USART.CTRLB.reg =
+    SERCOM_USART_CTRLB_TXEN | /* tx enabled */
+    SERCOM_USART_CTRLB_RXEN;  /* rx enabled */
+
+  /* 115200 */
+  SERCOM0->USART.BAUD.reg = SERCOM_USART_BAUD_FRAC_FP(0) | SERCOM_USART_BAUD_FRAC_BAUD(26);
+
+  SERCOM0->USART.CTRLA.bit.ENABLE = 1; /* activate SERCOM */
+  while(SERCOM0->USART.SYNCBUSY.bit.ENABLE); /* wait for SERCOM to be ready */
+#endif
+}
+
+static inline void uart_send_buffer(uint8_t const *text, size_t len)
+{
+  for (size_t i = 0; i < len; ++i) {
+    BOARD_SERCOM(UART_SERCOM)->USART.DATA.reg = text[i];
+    while((BOARD_SERCOM(UART_SERCOM)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0);
+  }
+}
+
+static inline void uart_send_str(const char* text)
+{
+  while (*text) {
+    BOARD_SERCOM(UART_SERCOM)->USART.DATA.reg = *text++;
+    while((BOARD_SERCOM(UART_SERCOM)->USART.INTFLAG.reg & SERCOM_USART_INTFLAG_TXC) == 0);
+  }
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  if (len < 0) {
+    uart_send_str(buf);
+  } else {
+    uart_send_buffer(buf, len);
+  }
+  return len;
+}
+
+#else // ! defined(UART_SERCOM)
+
+static void uart_init(void) {
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+#if CFG_TUH_ENABLED && defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421
+
+static void max3421_init(void) {
+  //------------- SPI Init -------------//
+  // MAX3421E max SPI clock is 26MHz however SAMD can only work reliably at 12 Mhz
+  uint32_t const baudrate = 12000000u;
+
+#ifdef SAMD21_FAMILY
+  // Enable the APB clock for SERCOM
+  PM->APBCMASK.reg |= 1u << (PM_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID);
+
+  // Configure GCLK for SERCOM
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID(GCLK_CLKCTRL_ID_SERCOM0_CORE_Val + MAX3421_SERCOM_ID) |
+                      GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  while (GCLK->STATUS.bit.SYNCBUSY);
+#endif
+
+#ifdef SAML2X_FAMILY
+  // Enable the APB clock for SERCOM
+  hri_mclk_set_APBCMASK_reg(MCLK, 1u << (MCLK_APBCMASK_SERCOM0_Pos + MAX3421_SERCOM_ID));
+
+  // Configure GCLK for SERCOM
+  hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM0_GCLK_ID_CORE + MAX3421_SERCOM_ID,
+                             GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
+#endif
+
+  Sercom* sercom = MAX3421_SERCOM;
+
+  // Disable the SPI module
+  sercom->SPI.CTRLA.bit.ENABLE = 0;
+
+  // Reset the SPI module
+  sercom->SPI.CTRLA.bit.SWRST = 1;
+  while (sercom->SPI.SYNCBUSY.bit.SWRST);
+
+  // Set up SPI in master mode, MSB first, SPI mode 0
+  sercom->SPI.CTRLA.reg = SERCOM_SPI_CTRLA_DOPO(MAX3421_TX_PAD) | SERCOM_SPI_CTRLA_DIPO(MAX3421_RX_PAD) |
+                          SERCOM_SPI_CTRLA_MODE(3);
+
+  sercom->SPI.CTRLB.reg = SERCOM_SPI_CTRLB_CHSIZE(0) | SERCOM_SPI_CTRLB_RXEN;
+  while (sercom->SPI.SYNCBUSY.bit.CTRLB == 1);
+
+  // Set the baud rate
+  sercom->SPI.BAUD.reg = (uint8_t) (SystemCoreClock / (2 * baudrate) - 1);
+
+  // Configure SPI pins
+  gpio_set_pin_direction(MAX3421_SCK_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_SCK_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_SCK_PIN, MAX3421_SERCOM_FUNCTION);
+
+  gpio_set_pin_direction(MAX3421_MOSI_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_pull_mode(MAX3421_MOSI_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MOSI_PIN, MAX3421_SERCOM_FUNCTION);
+
+  gpio_set_pin_direction(MAX3421_MISO_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_MISO_PIN, GPIO_PULL_OFF);
+  gpio_set_pin_function(MAX3421_MISO_PIN, MAX3421_SERCOM_FUNCTION);
+
+  // CS pin
+  gpio_set_pin_direction(MAX3421_CS_PIN, GPIO_DIRECTION_OUT);
+  gpio_set_pin_level(MAX3421_CS_PIN, 1);
+
+  // Enable the SPI module
+  sercom->SPI.CTRLA.bit.ENABLE = 1;
+  while (sercom->SPI.SYNCBUSY.bit.ENABLE);
+
+  //------------- External Interrupt -------------//
+
+#ifdef SAMD21_FAMILY
+  // Enable the APB clock for EIC (External Interrupt Controller)
+  PM->APBAMASK.reg |= PM_APBAMASK_EIC;
+
+  // Configure GCLK for EIC
+  GCLK->CLKCTRL.reg = GCLK_CLKCTRL_ID_EIC | GCLK_CLKCTRL_GEN_GCLK0 | GCLK_CLKCTRL_CLKEN;
+  while (GCLK->STATUS.bit.SYNCBUSY);
+#endif
+
+#ifdef SAML2X_FAMILY
+  // Enable the APB clock for EIC
+  hri_mclk_set_APBAMASK_EIC_bit(MCLK);
+
+  // Configure GCLK for EIC
+  hri_gclk_write_PCHCTRL_reg(GCLK, EIC_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
+#endif
+
+  // Configure interrupt pin as an input with function A (external interrupt)
+  gpio_set_pin_direction(MAX3421_INTR_PIN, GPIO_DIRECTION_IN);
+  gpio_set_pin_pull_mode(MAX3421_INTR_PIN, GPIO_PULL_UP);
+  gpio_set_pin_function(MAX3421_INTR_PIN, 0);
+
+  // Disable EIC
+  EIC->CTRL.bit.ENABLE = 0;
+  while (EIC->STATUS.bit.SYNCBUSY);
+
+  // Configure EIC to trigger on falling edge
+  uint8_t const sense_shift = MAX3421_INTR_EIC_ID * 4;
+  EIC->CONFIG[0].reg &= ~(7 << sense_shift);
+  EIC->CONFIG[0].reg |= 2 << sense_shift;
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(EIC_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+  // Enable External Interrupt
+  EIC->INTENSET.reg = EIC_INTENSET_EXTINT(1 << MAX3421_INTR_EIC_ID);
+
+  // Enable EIC
+  EIC->CTRL.bit.ENABLE = 1;
+  while (EIC->STATUS.bit.SYNCBUSY);
+}
+
+void EIC_Handler(void) {
+  // Clear the interrupt flag
+  EIC->INTFLAG.reg = EIC_INTFLAG_EXTINT(1 << MAX3421_INTR_EIC_ID);
+
+  // Call the TinyUSB interrupt handler
+  tuh_int_handler(1, true);
+}
+
+// API to enable/disable MAX3421 INTR pin interrupt
+void tuh_max3421_int_api(uint8_t rhport, bool enabled) {
+  (void) rhport;
+
+  if (enabled) {
+    NVIC_EnableIRQ(EIC_IRQn);
+  } else {
+    NVIC_DisableIRQ(EIC_IRQn);
+  }
+}
+
+// API to control MAX3421 SPI CS
+void tuh_max3421_spi_cs_api(uint8_t rhport, bool active) {
+  (void) rhport;
+  gpio_set_pin_level(MAX3421_CS_PIN, active ? 0 : 1);
+}
+
+// API to transfer data with MAX3421 SPI
+// Either tx_buf or rx_buf can be NULL, which means transfer is write or read only
+bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx_buf, size_t xfer_bytes) {
+  (void) rhport;
+
+  Sercom* sercom = MAX3421_SERCOM;
+
+  for (size_t count = 0; count < xfer_bytes; count++) {
+    // Wait for the transmit buffer to be empty
+    while (!sercom->SPI.INTFLAG.bit.DRE);
+
+    // Write data to be transmitted
+    uint8_t data = 0x00;
+    if (tx_buf) {
+      data = tx_buf[count];
+    }
+
+    sercom->SPI.DATA.reg = (uint32_t) data;
+
+    // Wait for the receive buffer to be filled
+    while (!sercom->SPI.INTFLAG.bit.RXC);
+
+    // Read received data
+    data = (uint8_t) sercom->SPI.DATA.reg;
+    if (rx_buf) {
+      rx_buf[count] = data;
+    }
+  }
+
+  // wait for bus idle and clear flags
+  while (!(sercom->SPI.INTFLAG.reg & (SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE)));
+  sercom->SPI.INTFLAG.reg = SERCOM_SPI_INTFLAG_TXC | SERCOM_SPI_INTFLAG_DRE;
+
+  return true;
+}
+
+#endif
+
+// Stub for libc init array (required by SAML21/SAML22)
+#ifdef SAML2X_FAMILY
+void _init(void);
+void _init(void) {
+}
+#endif
diff --git a/hw/bsp/samd2x_l2x/family.cmake b/hw/bsp/samd2x_l2x/family.cmake
new file mode 100644
index 000000000..9f1b20800
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/family.cmake
@@ -0,0 +1,164 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# Determine which SAM family based on board configuration
+# SAM_FAMILY should be set by board.cmake (samd21, saml21, or saml22)
+if(NOT DEFINED SAM_FAMILY)
+  # Default to samd21 if not specified for backward compatibility
+  set(SAM_FAMILY samd21)
+endif()
+
+set(SDK_DIR ${TOP}/hw/mcu/microchip/${SAM_FAMILY})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS SAMD21 SAML2X CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  # Common sources for all SAM families
+  set(COMMON_SOURCES
+    ${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
+    ${SDK_DIR}/hal/src/hal_atomic.c
+    ${SDK_DIR}/hpl/gclk/hpl_gclk.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  )
+
+  # Family-specific sources
+  if(SAM_FAMILY STREQUAL "samd21")
+    list(APPEND COMMON_SOURCES
+      ${SDK_DIR}/hpl/pm/hpl_pm.c
+      ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
+    )
+  else()
+    # SAML21/SAML22
+    list(APPEND COMMON_SOURCES
+      ${SDK_DIR}/hpl/mclk/hpl_mclk.c
+      ${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
+      ${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
+      ${SDK_DIR}/hpl/pm/hpl_pm.c
+    )
+  endif()
+
+  add_library(${BOARD_TARGET} STATIC ${COMMON_SOURCES})
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}
+    ${SDK_DIR}/config
+    ${SDK_DIR}/include
+    ${SDK_DIR}/hal/include
+    ${SDK_DIR}/hal/utils/include
+    ${SDK_DIR}/hpl/pm
+    ${SDK_DIR}/hpl/port
+    ${SDK_DIR}/hri
+    ${CMSIS_5}/CMSIS/Core/Include
+  )
+
+  # Family-specific compile definitions
+  if(SAM_FAMILY STREQUAL "samd21")
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CONF_DFLL_OVERWRITE_CALIBRATION=0
+    )
+  else()
+    # SAML21/SAML22
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      CONF_OSC32K_CALIB_ENABLE=0
+      CFG_EXAMPLE_VIDEO_READONLY
+    )
+  endif()
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Determine MCU option based on SAM_FAMILY
+  if(SAM_FAMILY STREQUAL "samd21")
+    set(MCU_OPTION OPT_MCU_SAMD21)
+  elseif(SAM_FAMILY STREQUAL "saml21")
+    set(MCU_OPTION OPT_MCU_SAML21)
+  elseif(SAM_FAMILY STREQUAL "saml22")
+    set(MCU_OPTION OPT_MCU_SAML22)
+  else()
+    message(FATAL_ERROR "Unknown SAM_FAMILY: ${SAM_FAMILY}")
+  endif()
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} ${MCU_OPTION})
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+  )
+
+  # Add HCD support for SAMD21 (has host capability)
+  if(SAM_FAMILY STREQUAL "samd21")
+    target_sources(${TARGET} PUBLIC
+      ${TOP}/src/portable/microchip/samd/hcd_samd.c
+    )
+  endif()
+
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+  #family_flash_openocd(${TARGET})
+endfunction()
diff --git a/hw/bsp/samd2x_l2x/family.mk b/hw/bsp/samd2x_l2x/family.mk
new file mode 100644
index 000000000..dca440ddd
--- /dev/null
+++ b/hw/bsp/samd2x_l2x/family.mk
@@ -0,0 +1,92 @@
+UF2_FAMILY_ID = 0x68ed2b88
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# SAM_FAMILY should be set by board.mk (samd21, saml21, or saml22)
+ifeq ($(SAM_FAMILY),)
+  # Default to samd21 if not specified for backward compatibility
+  SAM_FAMILY = samd21
+endif
+
+SDK_DIR = hw/mcu/microchip/$(SAM_FAMILY)
+CPU_CORE ?= cortex-m0plus
+
+# Common CFLAGS
+CFLAGS += \
+  -flto \
+
+# Family-specific CFLAGS
+ifeq ($(SAM_FAMILY),samd21)
+  CFLAGS += \
+    -DCONF_DFLL_OVERWRITE_CALIBRATION=0 \
+    -DCFG_TUSB_MCU=OPT_MCU_SAMD21
+else
+  # SAML21/SAML22
+  CFLAGS += \
+    -DCONF_OSC32K_CALIB_ENABLE=0 \
+    -DCFG_EXAMPLE_VIDEO_READONLY \
+
+  ifeq ($(SAM_FAMILY),saml21)
+    CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAML21
+  else ifeq ($(SAM_FAMILY),saml22)
+    CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_SAML22
+  endif
+endif
+
+# suppress warning caused by vendor mcu driver
+CFLAGS += -Wno-error=redundant-decls
+
+# SAM driver is flooded with -Wcast-qual which slow down complication significantly
+CFLAGS_SKIP += -Wcast-qual
+
+LDFLAGS_GCC += \
+  -nostdlib -nostartfiles \
+  --specs=nosys.specs --specs=nano.specs \
+
+LDFLAGS_CLANG +=
+
+# Common source files
+SRC_C += \
+	src/portable/microchip/samd/dcd_samd.c \
+	${SDK_DIR}/gcc/gcc/startup_$(SAM_FAMILY).c \
+	${SDK_DIR}/gcc/system_$(SAM_FAMILY).c \
+	${SDK_DIR}/hal/src/hal_atomic.c \
+	${SDK_DIR}/hpl/gclk/hpl_gclk.c \
+
+# Family-specific source files
+ifeq ($(SAM_FAMILY),samd21)
+  SRC_C += \
+    src/portable/microchip/samd/hcd_samd.c \
+    ${SDK_DIR}/hpl/pm/hpl_pm.c \
+    ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c \
+
+else
+  # SAML21/SAML22
+  SRC_C += \
+    ${SDK_DIR}/hpl/mclk/hpl_mclk.c \
+    ${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c \
+    ${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c \
+    ${SDK_DIR}/hpl/pm/hpl_pm.c \
+
+endif
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/${SDK_DIR} \
+	$(TOP)/${SDK_DIR}/config \
+	$(TOP)/${SDK_DIR}/include \
+	$(TOP)/${SDK_DIR}/hal/include \
+	$(TOP)/${SDK_DIR}/hal/utils/include \
+	$(TOP)/${SDK_DIR}/hpl/pm/ \
+	$(TOP)/${SDK_DIR}/hpl/port \
+	$(TOP)/${SDK_DIR}/hri \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+
+# flash using bossac at least version 1.8
+# can be found in arduino15/packages/arduino/tools/bossac/
+# Add it to your PATH or change BOSSAC variable to match your installation
+BOSSAC = bossac
+
+flash-bossac: $(BUILD)/$(PROJECT).bin
+	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
+	$(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R
diff --git a/hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h
deleted file mode 100644
index 6c9ecae2d..000000000
--- a/hw/bsp/saml2x/FreeRTOSConfig/FreeRTOSConfig.h
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * FreeRTOS Kernel V10.0.0
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software. If you wish to use our Amazon
- * FreeRTOS name, please do so in a fair use way that does not cause confusion.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *
- * See http://www.freertos.org/a00110.html.
- *----------------------------------------------------------*/
-
-// skip if included from IAR assembler
-#ifndef __IASMARM__
-  #include "sam.h"
-#endif
-
-/* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU                        0
-#if defined(__ARM_FP) && __ARM_FP >= 4
-  #define configENABLE_FPU                      1
-#else
-  #define configENABLE_FPU                      0
-#endif
-#define configENABLE_TRUSTZONE                  0
-#define configMINIMAL_SECURE_STACK_SIZE         (1024)
-
-#define configUSE_PREEMPTION                    1
-#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
-#define configCPU_CLOCK_HZ                      SystemCoreClock
-#define configTICK_RATE_HZ                      ( 1000 )
-#define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
-#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
-#define configMAX_TASK_NAME_LEN                 16
-#define configUSE_16_BIT_TICKS                  0
-#define configIDLE_SHOULD_YIELD                 1
-#define configUSE_MUTEXES                       1
-#define configUSE_RECURSIVE_MUTEXES             1
-#define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               4
-#define configUSE_QUEUE_SETS                    0
-#define configUSE_TIME_SLICING                  0
-#define configUSE_NEWLIB_REENTRANT              0
-#define configENABLE_BACKWARD_COMPATIBILITY     1
-#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
-
-#define configSUPPORT_STATIC_ALLOCATION         1
-#define configSUPPORT_DYNAMIC_ALLOCATION        0
-
-/* Hook function related definitions. */
-#define configUSE_IDLE_HOOK                    0
-#define configUSE_TICK_HOOK                    0
-#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
-#define configCHECK_FOR_STACK_OVERFLOW         2
-#define configCHECK_HANDLER_INSTALLATION       0
-
-/* Run time and task stats gathering related definitions. */
-#define configGENERATE_RUN_TIME_STATS          0
-#define configRECORD_STACK_HIGH_ADDRESS        1
-#define configUSE_TRACE_FACILITY               1 // legacy trace
-#define configUSE_STATS_FORMATTING_FUNCTIONS   0
-
-/* Co-routine definitions. */
-#define configUSE_CO_ROUTINES                  0
-#define configMAX_CO_ROUTINE_PRIORITIES        2
-
-/* Software timer related definitions. */
-#define configUSE_TIMERS                       1
-#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
-#define configTIMER_QUEUE_LENGTH               32
-#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
-
-/* Optional functions - most linkers will remove unused functions anyway. */
-#define INCLUDE_vTaskPrioritySet               0
-#define INCLUDE_uxTaskPriorityGet              0
-#define INCLUDE_vTaskDelete                    0
-#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
-#define INCLUDE_xResumeFromISR                 0
-#define INCLUDE_vTaskDelayUntil                1
-#define INCLUDE_vTaskDelay                     1
-#define INCLUDE_xTaskGetSchedulerState         0
-#define INCLUDE_xTaskGetCurrentTaskHandle      1
-#define INCLUDE_uxTaskGetStackHighWaterMark    0
-#define INCLUDE_xTaskGetIdleTaskHandle         0
-#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
-#define INCLUDE_pcTaskGetTaskName              0
-#define INCLUDE_eTaskGetState                  0
-#define INCLUDE_xEventGroupSetBitFromISR       0
-#define INCLUDE_xTimerPendFunctionCall         0
-
-/* FreeRTOS hooks to NVIC vectors */
-#define xPortPendSVHandler    PendSV_Handler
-#define xPortSysTickHandler   SysTick_Handler
-#define vPortSVCHandler       SVC_Handler
-
-//--------------------------------------------------------------------+
-// Interrupt nesting behavior configuration.
-//--------------------------------------------------------------------+
-
-// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
-#define configPRIO_BITS       2
-
-/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
-
-/* The highest interrupt priority that can be used by any interrupt service
-routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
-INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
-PRIORITY THAN THIS! (higher priorities are lower numeric values. */
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
-
-/* Interrupt priorities used by the kernel port layer itself.  These are generic
-to all Cortex-M ports, and do not rely on any particular library functions. */
-#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
-See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-#endif
diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.cmake b/hw/bsp/saml2x/boards/atsaml21_xpro/board.cmake
deleted file mode 100644
index 874b741cc..000000000
--- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(SAM_FAMILY saml21)
-set(JLINK_DEVICE ATSAML21J18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/saml21j18b_flash.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAML21J18B__
-    )
-endfunction()
diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h b/hw/bsp/saml2x/boards/atsaml21_xpro/board.h
deleted file mode 100644
index b93b4e591..000000000
--- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SAML21 Xplained Pro
-   url: https://www.microchip.com/en-us/development-tool/atsaml21-xpro-b
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               (32 + 30) // PB30
-#define LED_STATE_ON          0
-
-// Button
-#define BUTTON_PIN            (0  + 15) // PA15
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_RX_PIN           4
-#define UART_TX_PIN           5
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk b/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk
deleted file mode 100644
index 4ebfa7e71..000000000
--- a/hw/bsp/saml2x/boards/atsaml21_xpro/board.mk
+++ /dev/null
@@ -1,12 +0,0 @@
-SAM_FAMILY = saml21
-
-CFLAGS += -D__SAML21J18B__
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/saml21j18b_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAML21J18
-
-# flash using jlink
-flash: flash-jlink
diff --git a/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld b/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld
deleted file mode 100644
index f9523451b..000000000
--- a/hw/bsp/saml2x/boards/atsaml21_xpro/saml21j18b_flash.ld
+++ /dev/null
@@ -1,155 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAML21J18B
- *
- * Copyright (c) 2016 Atmel Corporation,
- *                    a wholly owned subsidiary of Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * Licensed under the Apache License, Version 2.0 (the "License");
- * you may not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- *     http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an "AS IS" BASIS,
- * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-ENTRY(Reset_Handler)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-  lpram    (rwx) : ORIGIN = 0x30000000, LENGTH = 0x00002000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    .lpram (NOLOAD):
-    {
-        . = ALIGN(8);
-        _slpram = .;
-        *(.lpram .lpram.*);
-        . = ALIGN(8);
-        _elpram = .;
-    } > lpram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.cmake b/hw/bsp/saml2x/boards/saml22_feather/board.cmake
deleted file mode 100644
index 7fd79d2ce..000000000
--- a/hw/bsp/saml2x/boards/saml22_feather/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(SAM_FAMILY saml22)
-set(JLINK_DEVICE ATSAML22J18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAML22J18A__
-    )
-endfunction()
diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.h b/hw/bsp/saml2x/boards/saml22_feather/board.h
deleted file mode 100644
index f8660c3f8..000000000
--- a/hw/bsp/saml2x/boards/saml22_feather/board.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SAML22 Feather
-   url: https://github.com/joeycastillo/Feather-Projects/tree/main/SAML22%20Feather
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               PIN_PA08
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            PIN_PA06
-#define BUTTON_STATE_ACTIVE   0
-
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/saml2x/boards/saml22_feather/board.mk b/hw/bsp/saml2x/boards/saml22_feather/board.mk
deleted file mode 100644
index c7817ff70..000000000
--- a/hw/bsp/saml2x/boards/saml22_feather/board.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-SAM_FAMILY = saml22
-
-CFLAGS += -D__SAML22J18A__
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAML22J18
-
-flash: flash-bossac
diff --git a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld b/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
deleted file mode 100644
index a04305be7..000000000
--- a/hw/bsp/saml2x/boards/saml22_feather/saml22_feather.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAML22J18A
- *
- * Copyright (c) 2018 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-ENTRY(Reset_Handler)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.cmake b/hw/bsp/saml2x/boards/sensorwatch_m0/board.cmake
deleted file mode 100644
index 67d26475f..000000000
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.cmake
+++ /dev/null
@@ -1,9 +0,0 @@
-set(SAM_FAMILY saml22)
-set(JLINK_DEVICE ATSAML21J18)
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
-
-function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    __SAML22J18A__
-    )
-endfunction()
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h b/hw/bsp/saml2x/boards/sensorwatch_m0/board.h
deleted file mode 100644
index 502c799db..000000000
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.h
+++ /dev/null
@@ -1,52 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2020, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: SensorWatch
-   url: https://github.com/joeycastillo/Sensor-Watch
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// LED
-#define LED_PIN               PIN_PA21
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PIN            PIN_PA22
-#define BUTTON_STATE_ACTIVE   1
-
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk b/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk
deleted file mode 100644
index c7817ff70..000000000
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/board.mk
+++ /dev/null
@@ -1,11 +0,0 @@
-SAM_FAMILY = saml22
-
-CFLAGS += -D__SAML22J18A__
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = ATSAML22J18
-
-flash: flash-bossac
diff --git a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld b/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
deleted file mode 100644
index a04305be7..000000000
--- a/hw/bsp/saml2x/boards/sensorwatch_m0/sensorwatch_m0.ld
+++ /dev/null
@@ -1,146 +0,0 @@
-/**
- * \file
- *
- * \brief Linker script for running in internal FLASH on the SAML22J18A
- *
- * Copyright (c) 2018 Microchip Technology Inc.
- *
- * \asf_license_start
- *
- * \page License
- *
- * SPDX-License-Identifier: Apache-2.0
- *
- * Licensed under the Apache License, Version 2.0 (the "License"); you may
- * not use this file except in compliance with the License.
- * You may obtain a copy of the Licence at
- *
- * http://www.apache.org/licenses/LICENSE-2.0
- *
- * Unless required by applicable law or agreed to in writing, software
- * distributed under the License is distributed on an AS IS BASIS, WITHOUT
- * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
- * See the License for the specific language governing permissions and
- * limitations under the License.
- *
- * \asf_license_stop
- *
- */
-
-
-OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
-OUTPUT_ARCH(arm)
-SEARCH_DIR(.)
-
-ENTRY(Reset_Handler)
-
-/* Memory Spaces Definitions */
-MEMORY
-{
-  rom      (rx)  : ORIGIN = 0x00000000, LENGTH = 0x00040000
-  ram      (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00008000
-}
-
-/* The stack size used by the application. NOTE: you need to adjust according to your application. */
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x2000;
-
-/* Section Definitions */
-SECTIONS
-{
-    .text :
-    {
-        . = ALIGN(4);
-        _sfixed = .;
-        KEEP(*(.vectors .vectors.*))
-        *(.text .text.* .gnu.linkonce.t.*)
-        *(.glue_7t) *(.glue_7)
-        *(.rodata .rodata* .gnu.linkonce.r.*)
-        *(.ARM.extab* .gnu.linkonce.armextab.*)
-
-        /* Support C constructors, and C destructors in both user code
-           and the C library. This also provides support for C++ code. */
-        . = ALIGN(4);
-        KEEP(*(.init))
-        . = ALIGN(4);
-        __preinit_array_start = .;
-        KEEP (*(.preinit_array))
-        __preinit_array_end = .;
-
-        . = ALIGN(4);
-        __init_array_start = .;
-        KEEP (*(SORT(.init_array.*)))
-        KEEP (*(.init_array))
-        __init_array_end = .;
-
-        . = ALIGN(4);
-        KEEP (*crtbegin.o(.ctors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
-        KEEP (*(SORT(.ctors.*)))
-        KEEP (*crtend.o(.ctors))
-
-        . = ALIGN(4);
-        KEEP(*(.fini))
-
-        . = ALIGN(4);
-        __fini_array_start = .;
-        KEEP (*(.fini_array))
-        KEEP (*(SORT(.fini_array.*)))
-        __fini_array_end = .;
-
-        KEEP (*crtbegin.o(.dtors))
-        KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
-        KEEP (*(SORT(.dtors.*)))
-        KEEP (*crtend.o(.dtors))
-
-        . = ALIGN(4);
-        _efixed = .;            /* End of text section */
-    } > rom
-
-    /* .ARM.exidx is sorted, so has to go in its own output section.  */
-    PROVIDE_HIDDEN (__exidx_start = .);
-    .ARM.exidx :
-    {
-      *(.ARM.exidx* .gnu.linkonce.armexidx.*)
-    } > rom
-    PROVIDE_HIDDEN (__exidx_end = .);
-
-    . = ALIGN(4);
-    _etext = .;
-
-    .relocate : AT (_etext)
-    {
-        . = ALIGN(4);
-        _srelocate = .;
-        *(.ramfunc .ramfunc.*);
-        *(.data .data.*);
-        . = ALIGN(4);
-        _erelocate = .;
-    } > ram
-
-    /* .bss section which is used for uninitialized data */
-    .bss (NOLOAD) :
-    {
-        . = ALIGN(4);
-        _sbss = . ;
-        _szero = .;
-        *(.bss .bss.*)
-        *(COMMON)
-        . = ALIGN(4);
-        _ebss = . ;
-        _ezero = .;
-        end = .;
-    } > ram
-
-    /* stack section */
-    .stack (NOLOAD):
-    {
-        . = ALIGN(8);
-        _sstack = .;
-        . = . + STACK_SIZE;
-        . = ALIGN(8);
-        _estack = .;
-    } > ram
-
-    . = ALIGN(4);
-    _end = . ;
-}
diff --git a/hw/bsp/saml2x/family.c b/hw/bsp/saml2x/family.c
deleted file mode 100644
index 275dbbd2e..000000000
--- a/hw/bsp/saml2x/family.c
+++ /dev/null
@@ -1,173 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   manufacturer: Microchip
-*/
-
-#include "sam.h"
-
-// Suppress warning caused by mcu driver
-#ifdef __GNUC__
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wcast-qual"
-#endif
-
-#include "hal/include/hal_gpio.h"
-#include "hal/include/hal_init.h"
-#include "hpl/gclk/hpl_gclk_base.h"
-#include "hpl_mclk_config.h"
-
-#ifdef __GNUC__
-#pragma GCC diagnostic pop
-#endif
-
-#include "bsp/board_api.h"
-#include "board.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB_Handler(void) {
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM DECLARATION
-//--------------------------------------------------------------------+
-
-/* Referenced GCLKs (out of 0~4), should be initialized firstly */
-#define _GCLK_INIT_1ST 0x00000000
-/* Not referenced GCLKs, initialized last */
-#define _GCLK_INIT_LAST 0x0000001F
-
-void board_init(void) {
-  // Clock init ( follow hpl_init.c )
-  hri_nvmctrl_set_CTRLB_RWS_bf(NVMCTRL, CONF_NVM_WAIT_STATE);
-
-  _set_performance_level(2);
-
-  _osc32kctrl_init_sources();
-  _oscctrl_init_sources();
-  _mclk_init();
-#if _GCLK_INIT_1ST
-  _gclk_init_generators_by_fref(_GCLK_INIT_1ST);
-#endif
-  _oscctrl_init_referenced_generators();
-  _gclk_init_generators_by_fref(_GCLK_INIT_LAST);
-
-#if (CONF_PORT_EVCTRL_PORT_0 | CONF_PORT_EVCTRL_PORT_1 | CONF_PORT_EVCTRL_PORT_2 | CONF_PORT_EVCTRL_PORT_3)
-  hri_port_set_EVCTRL_reg(PORT, 0, CONF_PORTA_EVCTRL);
-  hri_port_set_EVCTRL_reg(PORT, 1, CONF_PORTB_EVCTRL);
-#endif
-
-  // Update SystemCoreClock since it is hard coded with asf4 and not correct
-  // Init 1ms tick timer (samd SystemCoreClock may not correct)
-  SystemCoreClock = CONF_CPU_FREQUENCY;
-  SysTick_Config(CONF_CPU_FREQUENCY / 1000);
-
-  // Led init
-  gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(LED_PIN, !LED_STATE_ON);
-
-  // Button init
-  gpio_set_pin_direction(BUTTON_PIN, GPIO_DIRECTION_IN);
-  gpio_set_pin_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULL_DOWN : GPIO_PULL_UP);
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-#endif
-
-  /* USB Clock init
-   * The USB module requires a GCLK_USB of 48 MHz ~ 0.25% clock
-   * for low speed and full speed operation. */
-  hri_gclk_write_PCHCTRL_reg(GCLK, USB_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
-  hri_mclk_set_AHBMASK_USB_bit(MCLK);
-  hri_mclk_set_APBBMASK_USB_bit(MCLK);
-
-  // USB Pin Init
-  gpio_set_pin_direction(PIN_PA24, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(PIN_PA24, false);
-  gpio_set_pin_pull_mode(PIN_PA24, GPIO_PULL_OFF);
-  gpio_set_pin_direction(PIN_PA25, GPIO_DIRECTION_OUT);
-  gpio_set_pin_level(PIN_PA25, false);
-  gpio_set_pin_pull_mode(PIN_PA25, GPIO_PULL_OFF);
-
-  gpio_set_pin_function(PIN_PA24, PINMUX_PA24G_USB_DM);
-  gpio_set_pin_function(PIN_PA25, PINMUX_PA25G_USB_DP);
-
-  // Output 500hz PWM on PB23 (TCC0 WO[3]) so we can validate the GCLK1 clock speed
-//  hri_mclk_set_APBCMASK_TCC0_bit(MCLK);
-//  TCC0->PER.bit.PER = 48000000 / 1000;
-//  TCC0->CC[3].bit.CC = 48000000 / 2000;
-//  TCC0->CTRLA.bit.ENABLE = true;
-//
-//  gpio_set_pin_function(PIN_PB23, PINMUX_PB23F_TCC0_WO3);
-//  hri_gclk_write_PCHCTRL_reg(GCLK, TCC0_GCLK_ID, GCLK_PCHCTRL_GEN_GCLK1_Val | GCLK_PCHCTRL_CHEN);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state) {
-  gpio_set_pin_level(LED_PIN, state);
-}
-
-uint32_t board_button_read(void) {
-  // button is active low
-  return gpio_get_pin_level(BUTTON_PIN) ? 0 : 1;
-}
-
-int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-int board_uart_write(void const* buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void) {
-  system_ticks++;
-}
-
-uint32_t board_millis(void) {
-  return system_ticks;
-}
-
-#endif
-
-void _init(void);
-void _init(void) {
-
-}
diff --git a/hw/bsp/saml2x/family.cmake b/hw/bsp/saml2x/family.cmake
deleted file mode 100644
index 49f2e3e75..000000000
--- a/hw/bsp/saml2x/family.cmake
+++ /dev/null
@@ -1,115 +0,0 @@
-include_guard()
-
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-set(SDK_DIR ${TOP}/hw/mcu/microchip/${SAM_FAMILY})
-set(CMSIS_5 ${TOP}/lib/CMSIS_5)
-
-# toolchain set up
-set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS SAML21 SAML22 CACHE INTERNAL "")
-set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
-
-#------------------------------------
-# BOARD_TARGET
-#------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
-    ${SDK_DIR}/hal/src/hal_atomic.c
-    ${SDK_DIR}/hpl/gclk/hpl_gclk.c
-    ${SDK_DIR}/hpl/mclk/hpl_mclk.c
-    ${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
-    ${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
-    ${SDK_DIR}/hpl/pm/hpl_pm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${SDK_DIR}
-    ${SDK_DIR}/config
-    ${SDK_DIR}/include
-    ${SDK_DIR}/hal/include
-    ${SDK_DIR}/hal/utils/include
-    ${SDK_DIR}/hpl/pm
-    ${SDK_DIR}/hpl/port
-    ${SDK_DIR}/hri
-    ${CMSIS_5}/CMSIS/Core/Include
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CONF_OSC32K_CALIB_ENABLE=0
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-
-  update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
-endfunction()
-
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PUBLIC
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_SAML22)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-
-
-  # Flashing
-  family_add_bin_hex(${TARGET})
-  family_flash_jlink(${TARGET})
-  #family_flash_openocd(${TARGET})
-endfunction()
diff --git a/hw/bsp/saml2x/family.mk b/hw/bsp/saml2x/family.mk
deleted file mode 100644
index 65dfe5032..000000000
--- a/hw/bsp/saml2x/family.mk
+++ /dev/null
@@ -1,53 +0,0 @@
-UF2_FAMILY_ID = 0x68ed2b88
-SDK_DIR = hw/mcu/microchip/$(SAM_FAMILY)
-
-include $(TOP)/$(BOARD_PATH)/board.mk
-CPU_CORE ?= cortex-m0plus
-
-CFLAGS += \
-  -flto \
-  -DCONF_OSC32K_CALIB_ENABLE=0 \
-  -DCFG_TUSB_MCU=OPT_MCU_SAML22 \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-
-# suppress warning caused by vendor mcu driver
-CFLAGS += -Wno-error=redundant-decls
-
-# SAM driver is flooded with -Wcast-qual which slow down complication significantly
-CFLAGS_SKIP += -Wcast-qual
-
-LDFLAGS_GCC += \
-  -nostdlib -nostartfiles \
-  --specs=nosys.specs --specs=nano.specs \
-
-SRC_C += \
-	src/portable/microchip/samd/dcd_samd.c \
-	$(SDK_DIR)/gcc/gcc/startup_$(SAM_FAMILY).c \
-	$(SDK_DIR)/gcc/system_$(SAM_FAMILY).c \
-	$(SDK_DIR)/hal/src/hal_atomic.c \
-	$(SDK_DIR)/hpl/gclk/hpl_gclk.c \
-	$(SDK_DIR)/hpl/mclk/hpl_mclk.c \
-	$(SDK_DIR)/hpl/osc32kctrl/hpl_osc32kctrl.c \
-	$(SDK_DIR)/hpl/oscctrl/hpl_oscctrl.c \
-	$(SDK_DIR)/hpl/pm/hpl_pm.c \
-
-INC += \
-	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/${SDK_DIR} \
-	$(TOP)/${SDK_DIR}/config \
-	$(TOP)/${SDK_DIR}/include \
-	$(TOP)/${SDK_DIR}/hal/include \
-	$(TOP)/${SDK_DIR}/hal/utils/include \
-	$(TOP)/${SDK_DIR}/hpl/pm/ \
-	$(TOP)/${SDK_DIR}/hpl/port \
-	$(TOP)/${SDK_DIR}/hri \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-
-# flash using bossac at least version 1.8
-# can be found in arduino15/packages/arduino/tools/bossac/
-# Add it to your PATH or change BOSSAC variable to match your installation
-BOSSAC = bossac
-
-flash-bossac: $(BUILD)/$(PROJECT).bin
-	@:$(call check_defined, SERIAL, example: SERIAL=/dev/ttyACM0)
-	$(BOSSAC) --port=$(SERIAL) -U -i --offset=0x2000 -e -w $^ -R
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1f8975e55..bb3ac4d76 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -146,8 +146,8 @@
 //--------------------------------------------------------------------+
 // Microchip
 //--------------------------------------------------------------------+
-#elif TU_CHECK_MCU(OPT_MCU_SAMD21, OPT_MCU_SAMD51, OPT_MCU_SAME5X) || \
-      TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML21, OPT_MCU_SAML22)
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAML2X, OPT_MCU_SAMD21) || \
+      TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
   #define TUP_DCD_ENDPOINT_MAX    8
 
 #elif TU_CHECK_MCU(OPT_MCU_SAMG)
diff --git a/src/portable/microchip/samd/dcd_samd.c b/src/portable/microchip/samd/dcd_samd.c
index 357aa1549..e43439f2a 100644
--- a/src/portable/microchip/samd/dcd_samd.c
+++ b/src/portable/microchip/samd/dcd_samd.c
@@ -26,10 +26,7 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUD_ENABLED && \
-    (CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-     CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X || \
-     CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
+#if CFG_TUD_ENABLED && TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 #include "sam.h"
 #include "device/dcd.h"
@@ -106,10 +103,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   return true;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
-
-void dcd_int_enable(uint8_t rhport)
-{
+#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
+void dcd_int_enable(uint8_t rhport) {
   (void) rhport;
   NVIC_EnableIRQ(USB_0_IRQn);
   NVIC_EnableIRQ(USB_1_IRQn);
@@ -117,8 +112,7 @@ void dcd_int_enable(uint8_t rhport)
   NVIC_EnableIRQ(USB_3_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   (void) rhport;
   NVIC_DisableIRQ(USB_3_IRQn);
   NVIC_DisableIRQ(USB_2_IRQn);
@@ -126,17 +120,13 @@ void dcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_0_IRQn);
 }
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-      CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21
-
-void dcd_int_enable(uint8_t rhport)
-{
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
+void dcd_int_enable(uint8_t rhport) {
   (void) rhport;
   NVIC_EnableIRQ(USB_IRQn);
 }
 
-void dcd_int_disable(uint8_t rhport)
-{
+void dcd_int_disable(uint8_t rhport) {
   (void) rhport;
   NVIC_DisableIRQ(USB_IRQn);
 }
diff --git a/src/portable/microchip/samd/hcd_samd.c b/src/portable/microchip/samd/hcd_samd.c
index 1f4b2b233..0de7ddeb6 100644
--- a/src/portable/microchip/samd/hcd_samd.c
+++ b/src/portable/microchip/samd/hcd_samd.c
@@ -26,11 +26,8 @@
 
 #include "tusb_option.h"
 
-#if CFG_TUH_ENABLED && \
-    !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) &&                     \
-    (CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21  || \
-     CFG_TUSB_MCU == OPT_MCU_SAMD51 ||  CFG_TUSB_MCU == OPT_MCU_SAME5X || \
-     CFG_TUSB_MCU == OPT_MCU_SAML22 || CFG_TUSB_MCU == OPT_MCU_SAML21)
+#if CFG_TUH_ENABLED && !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421) && \
+    TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X, OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 #include "host/hcd.h"
 #include "sam.h"
@@ -428,7 +425,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   return true;
 }
 
-#if CFG_TUSB_MCU == OPT_MCU_SAMD51 || CFG_TUSB_MCU == OPT_MCU_SAME5X
+#if TU_CHECK_MCU(OPT_MCU_SAMD51, OPT_MCU_SAME5X)
 
 // Enable USB interrupt
 void hcd_int_enable(uint8_t rhport)
@@ -450,8 +447,7 @@ void hcd_int_disable(uint8_t rhport)
   NVIC_DisableIRQ(USB_0_IRQn);
 }
 
-#elif CFG_TUSB_MCU == OPT_MCU_SAMD11 || CFG_TUSB_MCU == OPT_MCU_SAMD21 || \
-      CFG_TUSB_MCU == OPT_MCU_SAML22 ||  CFG_TUSB_MCU == OPT_MCU_SAML21
+#elif TU_CHECK_MCU(OPT_MCU_SAMD11, OPT_MCU_SAMD21, OPT_MCU_SAML2X)
 
 // Enable USB interrupt
 void hcd_int_enable(uint8_t rhport)
diff --git a/src/tusb_option.h b/src/tusb_option.h
index dd57f6296..9d5aed252 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -71,8 +71,9 @@
 #define OPT_MCU_SAMG              202 ///< MicroChip SAMDG series
 #define OPT_MCU_SAME5X            203 ///< MicroChip SAM E5x
 #define OPT_MCU_SAMD11            204 ///< MicroChip SAMD11
-#define OPT_MCU_SAML22            205 ///< MicroChip SAML22
-#define OPT_MCU_SAML21            206 ///< MicroChip SAML21
+#define OPT_MCU_SAML2X            205 ///< MicroChip SAML2x
+#define OPT_MCU_SAML21            OPT_MCU_SAML2X ///< SAML21 backward compatibility
+#define OPT_MCU_SAML22            OPT_MCU_SAML2X ///< SAML22 backward compatibility
 #define OPT_MCU_SAMX7X            207 ///< MicroChip SAME70, S70, V70, V71 family
 
 // STM32
-- 
cgit v1.3.1


From 6a1117a8d85a6c029808a22ae53be1387ff2ce92 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 00:32:55 +0700
Subject: refactor sltb009a to family efm32

---
 hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h | 150 ++++++
 hw/bsp/efm32/boards/sltb009a/board.cmake     |   8 +
 hw/bsp/efm32/boards/sltb009a/board.h         |  49 ++
 hw/bsp/efm32/boards/sltb009a/board.mk        |   9 +
 hw/bsp/efm32/family.c                        | 713 ++++++++++++++++++++++++++
 hw/bsp/efm32/family.cmake                    | 107 ++++
 hw/bsp/efm32/family.mk                       |  39 ++
 hw/bsp/sltb009a/board.mk                     |  44 --
 hw/bsp/sltb009a/sltb009a.c                   | 721 ---------------------------
 9 files changed, 1075 insertions(+), 765 deletions(-)
 create mode 100644 hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/efm32/boards/sltb009a/board.cmake
 create mode 100644 hw/bsp/efm32/boards/sltb009a/board.h
 create mode 100644 hw/bsp/efm32/boards/sltb009a/board.mk
 create mode 100644 hw/bsp/efm32/family.c
 create mode 100644 hw/bsp/efm32/family.cmake
 create mode 100644 hw/bsp/efm32/family.mk
 delete mode 100644 hw/bsp/sltb009a/board.mk
 delete mode 100644 hw/bsp/sltb009a/sltb009a.c

(limited to 'hw')

diff --git a/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..0b3e7cd2d
--- /dev/null
+++ b/hw/bsp/efm32/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "em_device.h"
+#endif
+
+/* Cortex-M4F port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*8*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// EFM32GG12B has 3 priority bits
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/efm32/boards/sltb009a/board.cmake b/hw/bsp/efm32/boards/sltb009a/board.cmake
new file mode 100644
index 000000000..7a84950b6
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.cmake
@@ -0,0 +1,8 @@
+set(EFM32_FAMILY efm32gg12b)
+set(EFM32_MCU EFM32GG12B810F1024GM64)
+set(JLINK_DEVICE ${EFM32_MCU})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/efm32/boards/sltb009a/board.h b/hw/bsp/efm32/boards/sltb009a/board.h
new file mode 100644
index 000000000..8ed6abe9f
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.h
@@ -0,0 +1,49 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Rafael Silva (@perigoso)
+ * Copyright (c) 2021 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT              0     // A
+#define LED_PIN_R             12    // 12
+#define LED_PIN_B             13    // 13
+#define LED_PIN_G             14    // 14
+#define LED_STATE_ON          0     // active-low
+
+#define BUTTON_PORT           3     // D
+#define BUTTON_PIN            5     // 5
+#define BUTTON_STATE_ACTIVE   0     // active-low
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/efm32/boards/sltb009a/board.mk b/hw/bsp/efm32/boards/sltb009a/board.mk
new file mode 100644
index 000000000..4b3e2a4e5
--- /dev/null
+++ b/hw/bsp/efm32/boards/sltb009a/board.mk
@@ -0,0 +1,9 @@
+EFM32_FAMILY = efm32gg12b
+EFM32_MCU = EFM32GG12B810F1024GM64
+JLINK_DEVICE = $(EFM32_MCU)
+
+CFLAGS += \
+  -D$(EFM32_MCU) \
+
+# For flash-jlink target
+flash: flash-jlink
diff --git a/hw/bsp/efm32/family.c b/hw/bsp/efm32/family.c
new file mode 100644
index 000000000..39166bc4d
--- /dev/null
+++ b/hw/bsp/efm32/family.c
@@ -0,0 +1,713 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021 Rafael Silva (@perigoso)
+ * Copyright (c) 2021 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+#include "em_device.h"
+
+/*--------------------------------------------------------------------*/
+/* MACRO TYPEDEF CONSTANT ENUM                                        */
+/*--------------------------------------------------------------------*/
+
+/*--------------------------------------------------------------------*/
+/* Forward USB interrupt events to TinyUSB IRQ Handler                */
+/*--------------------------------------------------------------------*/
+
+void USB_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+/*--------------------------------------------------------------------*/
+/* Fault Handlers                                                     */
+/*--------------------------------------------------------------------*/
+
+void HardFault_Handler(void)
+{
+  asm("bkpt");
+}
+
+void MemManage_Handler(void)
+{
+  asm("bkpt");
+}
+
+void BusFault_Handler(void)
+{
+  asm("bkpt");
+}
+
+void UsageFault_Handler(void)
+{
+  asm("bkpt");
+}
+
+/*--------------------------------------------------------------------*/
+/* Startup                                                            */
+/*--------------------------------------------------------------------*/
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void);
+void _init(void)
+{
+
+}
+
+/*--------------------------------------------------------------------*/
+/* Initing Funcs                                                      */
+/*--------------------------------------------------------------------*/
+
+static void emu_init(uint8_t immediate_switch)
+{
+  EMU->PWRCTRL = (immediate_switch ? EMU_PWRCTRL_IMMEDIATEPWRSWITCH : 0) | EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
+}
+
+static void emu_reg_init(float target_voltage)
+{
+    if(target_voltage < 2300.f || target_voltage >= 3800.f)
+        return;
+
+    uint8_t level = ((target_voltage - 2300.f) / 100.f);
+
+    EMU->R5VCTRL = EMU_R5VCTRL_INPUTMODE_AUTO;
+
+    EMU->R5VOUTLEVEL = level; /* Reg output to 3.3V*/
+}
+
+static void emu_dcdc_init(float target_voltage, float max_ln_current, float max_lp_current, float max_reverse_current)
+{
+    if(target_voltage < 1800.f || target_voltage >= 3000.f)
+        return;
+
+    if(max_ln_current <= 0.f || max_ln_current > 200.f)
+        return;
+
+    if(max_lp_current <= 0.f || max_lp_current > 10000.f)
+        return;
+
+    if(max_reverse_current < 0.f || max_reverse_current > 160.f)
+        return;
+
+    // Low Power & Low Noise current limit
+    uint8_t lp_bias = 0;
+
+    if(max_lp_current < 75.f)
+        lp_bias = 0;
+    else if(max_lp_current < 500.f)
+        lp_bias = 1;
+    else if(max_lp_current < 2500.f)
+        lp_bias = 2;
+    else
+        lp_bias = 3;
+
+    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) | ((uint32_t)lp_bias << _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT);
+    EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LNFORCECCM; // Force CCM to prevent reverse current
+    EMU->DCDCLPCTRL |= EMU_DCDCLPCTRL_LPVREFDUTYEN; // Enable duty cycling of the bias for LP mode
+    EMU->DCDCLNFREQCTRL = (EMU->DCDCLNFREQCTRL & ~_EMU_DCDCLNFREQCTRL_RCOBAND_MASK) | 4; // Set RCO Band to 7MHz
+
+    uint8_t fet_count = 0;
+
+    if(max_ln_current < 20.f)
+        fet_count = 4;
+    else if(max_ln_current >= 20.f && max_ln_current < 40.f)
+        fet_count = 8;
+    else
+        fet_count = 16;
+
+    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_NFETCNT_MASK) | ((uint32_t)(fet_count - 1) << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT);
+    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_PFETCNT_MASK) | ((uint32_t)(fet_count - 1) << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT);
+
+    uint8_t ln_current_limit = (((max_ln_current + 40.f) * 1.5f) / (5.f * fet_count)) - 1;
+    uint8_t lp_current_limit = 1; // Recommended value
+
+    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK | _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK)) | ((uint32_t)ln_current_limit << _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT) | ((uint32_t)lp_current_limit << _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_SHIFT);
+
+    uint8_t z_det_limit = ((max_reverse_current + 40.f) * 1.5f) / (2.5f * fet_count);
+
+    EMU->DCDCZDETCTRL = (EMU->DCDCZDETCTRL & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) | ((uint32_t)z_det_limit << _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT);
+
+    EMU->DCDCCLIMCTRL |= EMU_DCDCCLIMCTRL_BYPLIMEN; // Enable bypass current limiter to prevent overcurrent when switching modes
+
+    // Output Voltage
+    if(target_voltage > 1800.f)
+    {
+        float max_vout = 3000.f;
+        float min_vout = 1800.f;
+        float diff_vout = max_vout - min_vout;
+
+        uint8_t ln_vref_high = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) >> _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_SHIFT;
+        uint8_t ln_vref_low = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_SHIFT;
+
+        uint8_t ln_vref = ((target_voltage - min_vout) * (float)(ln_vref_high - ln_vref_low)) / diff_vout;
+        ln_vref += ln_vref_low;
+
+        EMU->DCDCLNVCTRL = (ln_vref << _EMU_DCDCLNVCTRL_LNVREF_SHIFT) | EMU_DCDCLNVCTRL_LNATT;
+
+        uint8_t lp_vref_low = 0;
+        uint8_t lp_vref_high = 0;
+
+        switch(lp_bias)
+        {
+            case 0:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT;
+            }
+            break;
+            case 1:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT;
+            }
+            break;
+            case 2:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT;
+            }
+            break;
+            case 3:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT;
+            }
+            break;
+        }
+
+        uint8_t lp_vref = ((target_voltage - min_vout) * (float)(lp_vref_high - lp_vref_low)) / diff_vout;
+        lp_vref += lp_vref_low;
+
+        EMU->DCDCLPVCTRL = (lp_vref << _EMU_DCDCLPVCTRL_LPVREF_SHIFT) | EMU_DCDCLPVCTRL_LPATT;
+    }
+    else
+    {
+        float max_vout = 1800.f;
+        float min_vout = 1200.f;
+        float diff_vout = max_vout - min_vout;
+
+        uint8_t ln_vref_high = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_SHIFT;
+        uint8_t ln_vref_low = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_SHIFT;
+
+        uint8_t ln_vref = ((target_voltage - min_vout) * (float)(ln_vref_high - ln_vref_low)) / diff_vout;
+        ln_vref += ln_vref_low;
+
+        EMU->DCDCLNVCTRL = ln_vref << _EMU_DCDCLNVCTRL_LNVREF_SHIFT;
+
+        uint8_t lp_vref_low = 0;
+        uint8_t lp_vref_high = 0;
+
+        switch(lp_bias)
+        {
+            case 0:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT;
+            }
+            break;
+            case 1:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT;
+            }
+            break;
+            case 2:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT;
+            }
+            break;
+            case 3:
+            {
+                lp_vref_high = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT;
+                lp_vref_low = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT;
+            }
+            break;
+        }
+
+        uint8_t lp_vref = ((target_voltage - min_vout) * (float)(lp_vref_high - lp_vref_low)) / diff_vout;
+        lp_vref += lp_vref_low;
+
+        EMU->DCDCLPVCTRL = lp_vref << _EMU_DCDCLPVCTRL_LPVREF_SHIFT;
+    }
+
+    EMU->DCDCLPCTRL = (EMU->DCDCLPCTRL & ~_EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) | (((DEVINFO->DCDCLPCMPHYSSEL1 & (((uint32_t)0xFF) << (lp_bias * 8))) >> (lp_bias * 8)) << _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT);
+
+    while(EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY); // Wait for configuration to write
+
+    // Calibration
+    //EMU->DCDCLNCOMPCTRL = 0x57204077; // Compensation for 1uF DCDC capacitor
+    EMU->DCDCLNCOMPCTRL = 0xB7102137; // Compensation for 4.7uF DCDC capacitor
+
+    // Enable DCDC converter
+    EMU->DCDCCTRL = EMU_DCDCCTRL_DCDCMODEEM4_EM4LOWPOWER | EMU_DCDCCTRL_DCDCMODEEM23_EM23LOWPOWER | EMU_DCDCCTRL_DCDCMODE_LOWNOISE;
+
+    // Switch digital domain to DVDD
+    EMU->PWRCTRL = EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
+}
+
+static void cmu_hfxo_startup_calib(uint16_t ib_trim, uint16_t c_tune)
+{
+  if(CMU->STATUS & CMU_STATUS_HFXOENS)
+      return;
+
+  CMU->HFXOSTARTUPCTRL = (CMU->HFXOSTARTUPCTRL & ~(_CMU_HFXOSTARTUPCTRL_CTUNE_MASK | _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) & _CMU_HFXOSTARTUPCTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK);
+}
+
+static void cmu_hfxo_steady_calib(uint16_t ib_trim, uint16_t c_tune)
+{
+  if(CMU->STATUS & CMU_STATUS_HFXOENS)
+      return;
+
+  CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK);
+}
+
+static void cmu_hfrco_calib(uint32_t calibration)
+{
+    if(CMU->STATUS & CMU_STATUS_DPLLENS)
+        return;
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY);
+
+    CMU->HFRCOCTRL = calibration;
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY);
+}
+
+static void cmu_ushfrco_calib(uint8_t enable, uint32_t calibration)
+{
+    if(CMU->USBCRCTRL & CMU_USBCRCTRL_USBCREN)
+        return;
+
+    if(!enable)
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_USHFRCODIS;
+        while(CMU->STATUS & CMU_STATUS_USHFRCOENS);
+
+        return;
+    }
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_USHFRCOBSY);
+
+    CMU->USHFRCOCTRL = calibration | CMU_USHFRCOCTRL_FINETUNINGEN;
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_USHFRCOBSY);
+
+    if(enable && !(CMU->STATUS & CMU_STATUS_USHFRCOENS))
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_USHFRCOEN;
+
+        while(!(CMU->STATUS & CMU_STATUS_USHFRCORDY));
+    }
+}
+
+static void cmu_auxhfrco_calib(uint8_t enable, uint32_t calibration)
+{
+    if(!enable)
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCODIS;
+        while(CMU->STATUS & CMU_STATUS_AUXHFRCOENS);
+
+        return;
+    }
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_AUXHFRCOBSY);
+
+    CMU->AUXHFRCOCTRL = calibration;
+
+    while(CMU->SYNCBUSY & CMU_SYNCBUSY_AUXHFRCOBSY);
+
+    if(enable && !(CMU->STATUS & CMU_STATUS_AUXHFRCOENS))
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
+
+        while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
+    }
+}
+
+
+static void cmu_init(void)
+{
+    // Change SDIO clock to HFXO if HFRCO selected and disable it
+    CMU->SDIOCTRL = CMU_SDIOCTRL_SDIOCLKDIS | CMU_SDIOCTRL_SDIOCLKSEL_HFXO;
+    while(CMU->STATUS & CMU_STATUS_SDIOCLKENS);
+
+    // Change QSPI clock to HFXO if HFRCO selected and disable it
+    CMU->QSPICTRL = CMU_QSPICTRL_QSPI0CLKDIS | CMU_QSPICTRL_QSPI0CLKSEL_HFXO;
+    while(CMU->STATUS & CMU_STATUS_QSPI0CLKENS);
+
+    // Disable DPLL if enabled
+    if(CMU->STATUS & CMU_STATUS_DPLLENS)
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_DPLLDIS;
+        while(CMU->STATUS & CMU_STATUS_DPLLENS);
+    }
+
+    // Disable HFXO if enabled
+    if(CMU->STATUS & CMU_STATUS_HFXOENS)
+    {
+        CMU->OSCENCMD = CMU_OSCENCMD_HFXODIS;
+        while(CMU->STATUS & CMU_STATUS_HFXOENS);
+    }
+
+    // Setup HFXO
+    CMU->HFXOCTRL = CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD | CMU_HFXOCTRL_MODE_XTAL;
+    CMU->HFXOCTRL1 = CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT;
+    CMU->HFXOSTEADYSTATECTRL |= CMU_HFXOSTEADYSTATECTRL_PEAKMONEN;
+    CMU->HFXOTIMEOUTCTRL = (7 << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) | (8 << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) | (12 << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT);
+
+    // Enable HFXO and wait for it to be ready
+    CMU->OSCENCMD = CMU_OSCENCMD_HFXOEN;
+    while(!(CMU->STATUS & CMU_STATUS_HFXORDY));
+
+    // Switch main clock to HFXO and wait for it to be selected
+    CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFXO;
+    while((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) != CMU_HFCLKSTATUS_SELECTED_HFXO);
+
+    // Calibrate HFRCO for 72MHz and enable tuning by PLL
+    cmu_hfrco_calib((DEVINFO->HFRCOCAL16) | CMU_HFRCOCTRL_FINETUNINGEN);
+
+    // Setup the PLL
+    CMU->DPLLCTRL = CMU_DPLLCTRL_REFSEL_HFXO | CMU_DPLLCTRL_AUTORECOVER | CMU_DPLLCTRL_EDGESEL_RISE | CMU_DPLLCTRL_MODE_FREQLL;
+    // 72MHz = 50MHz (HFXO) * 1.44 (144/100)
+    CMU->DPLLCTRL1 = (143 << _CMU_DPLLCTRL1_N_SHIFT) | (99 << _CMU_DPLLCTRL1_M_SHIFT); // fHFRCO = fHFXO * (N + 1) / (M + 1)
+
+    // Enable the DPLL and wait for it to be ready
+    CMU->OSCENCMD = CMU_OSCENCMD_DPLLEN;
+    while(!(CMU->STATUS & CMU_STATUS_DPLLRDY));
+
+    // Config peripherals for the new frequency (freq > 32MHz)
+    CMU->CTRL |= CMU_CTRL_WSHFLE;
+
+    // Set prescalers
+    CMU->HFPRESC = CMU_HFPRESC_HFCLKLEPRESC_DIV2 | CMU_HFPRESC_PRESC_NODIVISION;
+    CMU->HFBUSPRESC = 1 << _CMU_HFBUSPRESC_PRESC_SHIFT;
+    CMU->HFCOREPRESC = 0 << _CMU_HFCOREPRESC_PRESC_SHIFT;
+    CMU->HFPERPRESC = 1 << _CMU_HFPERPRESC_PRESC_SHIFT;
+    CMU->HFEXPPRESC = 0 << _CMU_HFEXPPRESC_PRESC_SHIFT;
+    CMU->HFPERPRESCB = 0 << _CMU_HFPERPRESCB_PRESC_SHIFT;
+    CMU->HFPERPRESCC = 1 << _CMU_HFPERPRESCC_PRESC_SHIFT;
+
+    // Enable clock to peripherals
+    CMU->CTRL |= CMU_CTRL_HFPERCLKEN;
+
+    // Switch main clock to HFRCO and wait for it to be selected
+    CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO;
+    while((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) != CMU_HFCLKSTATUS_SELECTED_HFRCO);
+
+    // LFA Clock
+    CMU->LFACLKSEL = CMU_LFACLKSEL_LFA_LFRCO;
+
+    // LFB Clock
+    CMU->LFBCLKSEL = CMU_LFBCLKSEL_LFB_LFRCO;
+
+    // LFC Clock
+    CMU->LFCCLKSEL = CMU_LFCCLKSEL_LFC_LFRCO;
+
+    // LFE Clock
+    CMU->LFECLKSEL = CMU_LFECLKSEL_LFE_ULFRCO;
+}
+
+static void systick_init(void)
+{
+    SysTick->LOAD = (72000000 / 1000) - 1;
+    SysTick->VAL = 0;
+    SysTick->CTRL = SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
+
+    SCB->SHP[11] = 7 << (8 - __NVIC_PRIO_BITS); // Set priority 3,1 (min)
+}
+
+static void gpio_init(void)
+{
+    CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
+
+    // NC - Not Connected (not available in mcu package)
+    // NR - Not routed (no routing to pin on pcb, floating)
+    // NU - Not used (not currently in use)
+
+    // Port A
+    GPIO->P[0].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[0].MODEL  = GPIO_P_MODEL_MODE0_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE1_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE2_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE3_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE4_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE5_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE6_DISABLED          // NU
+                      | GPIO_P_MODEL_MODE7_DISABLED;         // NC
+    GPIO->P[0].MODEH  = GPIO_P_MODEH_MODE8_DISABLED          // GPIO - MIC_ENABLE
+                      | GPIO_P_MODEH_MODE9_DISABLED          // NC
+                      | GPIO_P_MODEH_MODE10_DISABLED         // NC
+                      | GPIO_P_MODEH_MODE11_DISABLED         // NC
+                      | GPIO_P_MODEH_MODE12_WIREDAND         // LED0R
+                      | GPIO_P_MODEH_MODE13_WIREDAND         // LED0B
+                      | GPIO_P_MODEH_MODE14_WIREDAND         // LED0G
+                      | GPIO_P_MODEH_MODE15_DISABLED;        // NU
+    GPIO->P[0].DOUT   = 0x7000; // Leds off By default
+    GPIO->P[0].OVTDIS = 0;
+
+    // Port B
+    GPIO->P[1].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[1].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE3_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE6_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE7_DISABLED;                // MAIN_LFXTAL_P
+    GPIO->P[1].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // MAIN_LFXTAL_N
+                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE11_DISABLED                // PDM_DAT0 - MIC_DATA
+                      | GPIO_P_MODEH_MODE12_DISABLED                // PDM_CLK - MIC_CLOCK
+                      | GPIO_P_MODEH_MODE13_DISABLED                // MAIN_HFXTAL_P
+                      | GPIO_P_MODEH_MODE14_DISABLED                // MAIN_HFXTAL_N
+                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
+    GPIO->P[1].DOUT   = 0;
+    GPIO->P[1].OVTDIS = 0;
+
+    // Port C
+    GPIO->P[2].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (7 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[2].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE6_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE7_DISABLED;                // NC
+    GPIO->P[2].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE11_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE12_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
+    GPIO->P[2].DOUT   = 0;
+    GPIO->P[2].OVTDIS = 0;
+
+    // Port D
+    GPIO->P[3].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[3].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE1_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE2_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE3_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE5_INPUT                    // GPIO - BTN0
+                      | GPIO_P_MODEL_MODE6_WIREDAND                 // LED1R
+                      | GPIO_P_MODEL_MODE7_DISABLED;                // NU
+    GPIO->P[3].MODEH  = GPIO_P_MODEH_MODE8_INPUT                    // GPIO - BTN1
+                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE11_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE12_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
+    GPIO->P[3].DOUT   = 0;
+    GPIO->P[3].OVTDIS = 0;
+
+    // Port E
+    GPIO->P[4].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[4].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE6_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE7_DISABLED;                // NU
+    GPIO->P[4].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NU
+                      | GPIO_P_MODEH_MODE9_DISABLED                 // NU
+                      | GPIO_P_MODEH_MODE10_DISABLED                // NU
+                      | GPIO_P_MODEH_MODE11_DISABLED                // NU
+                      | GPIO_P_MODEH_MODE12_WIREDAND                // LED1B
+                      | GPIO_P_MODEH_MODE13_DISABLED                // NU
+                      | GPIO_P_MODEH_MODE14_DISABLED                // NU
+                      | GPIO_P_MODEH_MODE15_DISABLED;               // NU
+    GPIO->P[4].DOUT   = 0;
+    GPIO->P[4].OVTDIS = 0;
+
+    // Port F
+    GPIO->P[5].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
+                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
+    GPIO->P[5].MODEL  = GPIO_P_MODEL_MODE0_PUSHPULL                 // SWCLK
+                      | GPIO_P_MODEL_MODE1_PUSHPULL                 // SWDIO
+                      | GPIO_P_MODEL_MODE2_PUSHPULL                 // SWO
+                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE4_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
+                      | GPIO_P_MODEL_MODE6_DISABLED                 // NC
+                      | GPIO_P_MODEL_MODE7_DISABLED;                // NC
+    GPIO->P[5].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
+                      | GPIO_P_MODEH_MODE10_DISABLED                // USB N
+                      | GPIO_P_MODEH_MODE11_DISABLED                // USB P
+                      | GPIO_P_MODEH_MODE12_WIREDAND                // LED1G
+                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
+                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
+    GPIO->P[5].DOUT   = 0;
+
+    GPIO->P[5].OVTDIS = 0;
+
+    // Debugger Route
+    GPIO->ROUTEPEN &= ~(GPIO_ROUTEPEN_TDIPEN | GPIO_ROUTEPEN_TDOPEN);   // Disable JTAG
+    GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN;                             // Enable SWO
+    GPIO->ROUTELOC0 = GPIO_ROUTELOC0_SWVLOC_LOC0;                       // SWO on PF2
+
+    // External interrupts
+    GPIO->EXTIPSELL = GPIO_EXTIPSELL_EXTIPSEL0_PORTE            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL1_PORTB            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL2_PORTB            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL3_PORTB            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL4_PORTA            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL5_PORTA            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL6_PORTC            // NU
+                    | GPIO_EXTIPSELL_EXTIPSEL7_PORTC;           // NU
+    GPIO->EXTIPSELH = GPIO_EXTIPSELH_EXTIPSEL8_PORTA            // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL9_PORTE            // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL10_PORTF           // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL11_PORTA           // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL12_PORTA           // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL13_PORTE           // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL14_PORTF           // NU
+                    | GPIO_EXTIPSELH_EXTIPSEL15_PORTA;          // NU
+
+    GPIO->EXTIPINSELL = GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL4_PIN6       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL5_PIN7       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL6_PIN4       // NU
+                      | GPIO_EXTIPINSELL_EXTIPINSEL7_PIN7;      // NU
+    GPIO->EXTIPINSELH = GPIO_EXTIPINSELH_EXTIPINSEL8_PIN8       // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL9_PIN9       // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL10_PIN11     // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL11_PIN8      // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL12_PIN13     // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL13_PIN15     // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL14_PIN12     // NU
+                      | GPIO_EXTIPINSELH_EXTIPINSEL15_PIN12;    // NU
+
+}
+
+/*--------------------------------------------------------------------*/
+/* Board Init                                                         */
+/*--------------------------------------------------------------------*/
+
+void board_init(void)
+{
+
+  emu_dcdc_init(1800.f, 50.f, 100.f, 0.f); // Init DC-DC converter (1.8 V, 50 mA active, 100 uA sleep, 0 mA reverse limit)
+  emu_init(0);
+  emu_reg_init(3300.f); // set output regulator to 3.3V
+
+  cmu_hfxo_startup_calib(0x200, 0x145); // Config HFXO Startup for 1280 uA, 36 pF (18 pF + 2 pF CLOAD)
+  cmu_hfxo_steady_calib(0x009, 0x145); // Config HFXO Steady for 12 uA, 36 pF (18 pF + 2 pF CLOAD)
+
+  cmu_init(); // Init Clock Management Unit
+
+  cmu_ushfrco_calib(1, DEVINFO->USHFRCOCAL13); // Enable and calibrate USHFRCO for 48 MHz
+  cmu_auxhfrco_calib(1, DEVINFO->AUXHFRCOCAL11); // Enable and calibrate AUXHFRCO for 32 MHz
+
+  CMU->USBCRCTRL = CMU_USBCRCTRL_USBCREN; // enable USB clock recovery
+  CMU->USBCTRL = CMU_USBCTRL_USBCLKSEL_USHFRCO | CMU_USBCTRL_USBCLKEN;  // select USHFRCO as USB Phy clock source and enable it
+
+  CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_USB;  // enable USB peripheral clock
+
+  systick_init(); // Init system tick
+
+  gpio_init(); // Init IOs
+
+}
+
+/*--------------------------------------------------------------------*/
+/* Board porting API                                                  */
+/*--------------------------------------------------------------------*/
+
+void board_led_write(bool state)
+{
+  // Combine red and blue for pink Because it looks good :)
+  GPIO->P[LED_PORT].DOUT = (GPIO->P[LED_PORT].DOUT & ~((1 << LED_PIN_R) | (1 << LED_PIN_B))) | (state << LED_PIN_R) | (state << LED_PIN_B);
+}
+
+uint32_t board_button_read(void)
+{
+  return !!(GPIO->P[BUTTON_PORT].DIN & (1 << BUTTON_PIN));
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+#ifdef  USE_FULL_ASSERT
+/**
+  * @brief  Reports the name of the source file and the source line number
+  *         where the assert_param error has occurred.
+  * @param  file: pointer to the source file name
+  * @param  line: assert_param error line source number
+  * @retval None
+  */
+void assert_failed(char *file, uint32_t line)
+{
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/hw/bsp/efm32/family.cmake b/hw/bsp/efm32/family.cmake
new file mode 100644
index 000000000..f5afd6fe4
--- /dev/null
+++ b/hw/bsp/efm32/family.cmake
@@ -0,0 +1,107 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# EFM32_FAMILY should be set by board.cmake (e.g. efm32gg12b)
+string(TOUPPER ${EFM32_FAMILY} EFM32_FAMILY_UPPER)
+set(SILABS_CMSIS ${TOP}/hw/mcu/silabs/cmsis-dfp-${EFM32_FAMILY}/Device/SiliconLabs/${EFM32_FAMILY_UPPER})
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS EFM32GG CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_GNU ${SILABS_CMSIS}/Source/GCC/${EFM32_FAMILY}.ld)
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SILABS_CMSIS}/Source/GCC/startup_${EFM32_FAMILY}.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SILABS_CMSIS}/Source/system_${EFM32_FAMILY}.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${SILABS_CMSIS}/Include
+    )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __STARTUP_CLEAR_BSS
+    __START=main
+    ${EFM32_MCU}
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_EFM32GG)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/efm32/family.mk b/hw/bsp/efm32/family.mk
new file mode 100644
index 000000000..f115b6bd4
--- /dev/null
+++ b/hw/bsp/efm32/family.mk
@@ -0,0 +1,39 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mcpu=cortex-m4 \
+  -mfloat-abi=hard \
+  -mfpu=fpv4-sp-d16 \
+  -nostdlib -nostartfiles \
+  -D__STARTUP_CLEAR_BSS \
+  -D__START=main \
+  -DCFG_TUSB_MCU=OPT_MCU_EFM32GG
+
+CPU_CORE ?= cortex-m4
+
+# EFM32_FAMILY should be set by board.mk (e.g. efm32gg12b)
+SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(EFM32_FAMILY)/Device/SiliconLabs/$(shell echo $(EFM32_FAMILY) | tr a-z A-Z)
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# All source paths should be relative to the top level.
+LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(EFM32_FAMILY).ld
+
+SRC_C += \
+  $(SILABS_CMSIS)/Source/system_$(EFM32_FAMILY).c \
+	src/portable/synopsys/dwc2/dcd_dwc2.c \
+	src/portable/synopsys/dwc2/hcd_dwc2.c \
+	src/portable/synopsys/dwc2/dwc2_common.c \
+
+SRC_S += \
+  $(SILABS_CMSIS)/Source/GCC/startup_$(EFM32_FAMILY).S
+
+INC += \
+  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+  $(TOP)/$(SILABS_CMSIS)/Include \
+  $(TOP)/$(BOARD_PATH)
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/sltb009a/board.mk b/hw/bsp/sltb009a/board.mk
deleted file mode 100644
index 5dd7a158f..000000000
--- a/hw/bsp/sltb009a/board.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -nostdlib -nostartfiles \
-  -D__STARTUP_CLEAR_BSS \
-  -D__START=main \
-  -DEFM32GG12B810F1024GM64 \
-  -DCFG_TUSB_MCU=OPT_MCU_EFM32GG
-
-# mcu driver cause following warnings
-#CFLAGS += -Wno-error=unused-parameter
-
-SILABS_FAMILY = efm32gg12b
-SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(SILABS_FAMILY)/Device/SiliconLabs/$(shell echo $(SILABS_FAMILY) | tr a-z A-Z)
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(SILABS_FAMILY).ld
-
-SRC_C += \
-  $(SILABS_CMSIS)/Source/system_$(SILABS_FAMILY).c \
-	src/portable/synopsys/dwc2/dcd_dwc2.c \
-	src/portable/synopsys/dwc2/hcd_dwc2.c \
-	src/portable/synopsys/dwc2/dwc2_common.c \
-
-SRC_S += \
-  $(SILABS_CMSIS)/Source/GCC/startup_$(SILABS_FAMILY).S
-
-INC += \
-  $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-  $(TOP)/$(SILABS_CMSIS)/Include \
-  $(TOP)/hw/bsp/$(BOARD)
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = EFM32GG12B810F1024
-
-flash: flash-jlink
diff --git a/hw/bsp/sltb009a/sltb009a.c b/hw/bsp/sltb009a/sltb009a.c
deleted file mode 100644
index 23ef6d7cd..000000000
--- a/hw/bsp/sltb009a/sltb009a.c
+++ /dev/null
@@ -1,721 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2021 Rafael Silva (@perigoso)
- * Copyright (c) 2021 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "../board_api.h"
-
-#include "em_device.h"
-
-/*--------------------------------------------------------------------*/
-/* MACRO TYPEDEF CONSTANT ENUM                                        */
-/*--------------------------------------------------------------------*/
-
-#define LED_PORT              0     // A
-#define LED_PIN_R             12    // 12
-#define LED_PIN_B             13    // 13
-#define LED_PIN_G             14    // 14
-#define LED_STATE_ON          0     // active-low
-
-#define BUTTON_PORT           3     // D
-#define BUTTON_PIN            5     // 5
-#define BUTTON_STATE_ACTIVE   0     // active-low
-
-/*--------------------------------------------------------------------*/
-/* Forward USB interrupt events to TinyUSB IRQ Handler                */
-/*--------------------------------------------------------------------*/
-
-void USB_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-/*--------------------------------------------------------------------*/
-/* Fault Handlers                                                     */
-/*--------------------------------------------------------------------*/
-
-void HardFault_Handler(void)
-{
-  asm("bkpt");
-}
-
-void MemManage_Handler(void)
-{
-  asm("bkpt");
-}
-
-void BusFault_Handler(void)
-{
-  asm("bkpt");
-}
-
-void UsageFault_Handler(void)
-{
-  asm("bkpt");
-}
-
-/*--------------------------------------------------------------------*/
-/* Startup                                                            */
-/*--------------------------------------------------------------------*/
-
-// Required by __libc_init_array in startup code if we are compiling using
-// -nostdlib/-nostartfiles.
-void _init(void)
-{
-
-}
-
-/*--------------------------------------------------------------------*/
-/* Initing Funcs                                                      */
-/*--------------------------------------------------------------------*/
-
-void emu_init(uint8_t immediate_switch)
-{
-  EMU->PWRCTRL = (immediate_switch ? EMU_PWRCTRL_IMMEDIATEPWRSWITCH : 0) | EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
-}
-
-void emu_reg_init(float target_voltage)
-{
-    if(target_voltage < 2300.f || target_voltage >= 3800.f)
-        return;
-
-    uint8_t level = ((target_voltage - 2300.f) / 100.f);
-
-    EMU->R5VCTRL = EMU_R5VCTRL_INPUTMODE_AUTO;
-
-    EMU->R5VOUTLEVEL = level; /* Reg output to 3.3V*/
-}
-
-void emu_dcdc_init(float target_voltage, float max_ln_current, float max_lp_current, float max_reverse_current)
-{
-    if(target_voltage < 1800.f || target_voltage >= 3000.f)
-        return;
-
-    if(max_ln_current <= 0.f || max_ln_current > 200.f)
-        return;
-
-    if(max_lp_current <= 0.f || max_lp_current > 10000.f)
-        return;
-
-    if(max_reverse_current < 0.f || max_reverse_current > 160.f)
-        return;
-
-    // Low Power & Low Noise current limit
-    uint8_t lp_bias = 0;
-
-    if(max_lp_current < 75.f)
-        lp_bias = 0;
-    else if(max_lp_current < 500.f)
-        lp_bias = 1;
-    else if(max_lp_current < 2500.f)
-        lp_bias = 2;
-    else
-        lp_bias = 3;
-
-    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_LPCMPBIASEM234H_MASK) | ((uint32_t)lp_bias << _EMU_DCDCMISCCTRL_LPCMPBIASEM234H_SHIFT);
-    EMU->DCDCMISCCTRL |= EMU_DCDCMISCCTRL_LNFORCECCM; // Force CCM to prevent reverse current
-    EMU->DCDCLPCTRL |= EMU_DCDCLPCTRL_LPVREFDUTYEN; // Enable duty cycling of the bias for LP mode
-    EMU->DCDCLNFREQCTRL = (EMU->DCDCLNFREQCTRL & ~_EMU_DCDCLNFREQCTRL_RCOBAND_MASK) | 4; // Set RCO Band to 7MHz
-
-    uint8_t fet_count = 0;
-
-    if(max_ln_current < 20.f)
-        fet_count = 4;
-    else if(max_ln_current >= 20.f && max_ln_current < 40.f)
-        fet_count = 8;
-    else
-        fet_count = 16;
-
-    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_NFETCNT_MASK) | ((uint32_t)(fet_count - 1) << _EMU_DCDCMISCCTRL_NFETCNT_SHIFT);
-    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~_EMU_DCDCMISCCTRL_PFETCNT_MASK) | ((uint32_t)(fet_count - 1) << _EMU_DCDCMISCCTRL_PFETCNT_SHIFT);
-
-    uint8_t ln_current_limit = (((max_ln_current + 40.f) * 1.5f) / (5.f * fet_count)) - 1;
-    uint8_t lp_current_limit = 1; // Recommended value
-
-    EMU->DCDCMISCCTRL = (EMU->DCDCMISCCTRL & ~(_EMU_DCDCMISCCTRL_LNCLIMILIMSEL_MASK | _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_MASK)) | ((uint32_t)ln_current_limit << _EMU_DCDCMISCCTRL_LNCLIMILIMSEL_SHIFT) | ((uint32_t)lp_current_limit << _EMU_DCDCMISCCTRL_LPCLIMILIMSEL_SHIFT);
-
-    uint8_t z_det_limit = ((max_reverse_current + 40.f) * 1.5f) / (2.5f * fet_count);
-
-    EMU->DCDCZDETCTRL = (EMU->DCDCZDETCTRL & ~_EMU_DCDCZDETCTRL_ZDETILIMSEL_MASK) | ((uint32_t)z_det_limit << _EMU_DCDCZDETCTRL_ZDETILIMSEL_SHIFT);
-
-    EMU->DCDCCLIMCTRL |= EMU_DCDCCLIMCTRL_BYPLIMEN; // Enable bypass current limiter to prevent overcurrent when switching modes
-
-    // Output Voltage
-    if(target_voltage > 1800.f)
-    {
-        float max_vout = 3000.f;
-        float min_vout = 1800.f;
-        float diff_vout = max_vout - min_vout;
-
-        uint8_t ln_vref_high = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_MASK) >> _DEVINFO_DCDCLNVCTRL0_3V0LNATT1_SHIFT;
-        uint8_t ln_vref_low = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT1_SHIFT;
-
-        uint8_t ln_vref = ((target_voltage - min_vout) * (float)(ln_vref_high - ln_vref_low)) / diff_vout;
-        ln_vref += ln_vref_low;
-
-        EMU->DCDCLNVCTRL = (ln_vref << _EMU_DCDCLNVCTRL_LNVREF_SHIFT) | EMU_DCDCLNVCTRL_LNATT;
-
-        uint8_t lp_vref_low = 0;
-        uint8_t lp_vref_high = 0;
-
-        switch(lp_bias)
-        {
-            case 0:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT;
-            }
-            break;
-            case 1:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL2 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT;
-            }
-            break;
-            case 2:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT;
-            }
-            break;
-            case 3:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL3 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT;
-            }
-            break;
-        }
-
-        uint8_t lp_vref = ((target_voltage - min_vout) * (float)(lp_vref_high - lp_vref_low)) / diff_vout;
-        lp_vref += lp_vref_low;
-
-        EMU->DCDCLPVCTRL = (lp_vref << _EMU_DCDCLPVCTRL_LPVREF_SHIFT) | EMU_DCDCLPVCTRL_LPATT;
-    }
-    else
-    {
-        float max_vout = 1800.f;
-        float min_vout = 1200.f;
-        float diff_vout = max_vout - min_vout;
-
-        uint8_t ln_vref_high = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V8LNATT0_SHIFT;
-        uint8_t ln_vref_low = (DEVINFO->DCDCLNVCTRL0 & _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_MASK) >> _DEVINFO_DCDCLNVCTRL0_1V2LNATT0_SHIFT;
-
-        uint8_t ln_vref = ((target_voltage - min_vout) * (float)(ln_vref_high - ln_vref_low)) / diff_vout;
-        ln_vref += ln_vref_low;
-
-        EMU->DCDCLNVCTRL = ln_vref << _EMU_DCDCLNVCTRL_LNVREF_SHIFT;
-
-        uint8_t lp_vref_low = 0;
-        uint8_t lp_vref_high = 0;
-
-        switch(lp_bias)
-        {
-            case 0:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS0_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS0_SHIFT;
-            }
-            break;
-            case 1:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_3V0LPATT1LPCMPBIAS1_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL0 & _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_MASK) >> _DEVINFO_DCDCLPVCTRL2_1V8LPATT1LPCMPBIAS1_SHIFT;
-            }
-            break;
-            case 2:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS2_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS2_SHIFT;
-            }
-            break;
-            case 3:
-            {
-                lp_vref_high = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_3V0LPATT1LPCMPBIAS3_SHIFT;
-                lp_vref_low = (DEVINFO->DCDCLPVCTRL1 & _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_MASK) >> _DEVINFO_DCDCLPVCTRL3_1V8LPATT1LPCMPBIAS3_SHIFT;
-            }
-            break;
-        }
-
-        uint8_t lp_vref = ((target_voltage - min_vout) * (float)(lp_vref_high - lp_vref_low)) / diff_vout;
-        lp_vref += lp_vref_low;
-
-        EMU->DCDCLPVCTRL = lp_vref << _EMU_DCDCLPVCTRL_LPVREF_SHIFT;
-    }
-
-    EMU->DCDCLPCTRL = (EMU->DCDCLPCTRL & ~_EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_MASK) | (((DEVINFO->DCDCLPCMPHYSSEL1 & (((uint32_t)0xFF) << (lp_bias * 8))) >> (lp_bias * 8)) << _EMU_DCDCLPCTRL_LPCMPHYSSELEM234H_SHIFT);
-
-    while(EMU->DCDCSYNC & EMU_DCDCSYNC_DCDCCTRLBUSY); // Wait for configuration to write
-
-    // Calibration
-    //EMU->DCDCLNCOMPCTRL = 0x57204077; // Compensation for 1uF DCDC capacitor
-    EMU->DCDCLNCOMPCTRL = 0xB7102137; // Compensation for 4.7uF DCDC capacitor
-
-    // Enable DCDC converter
-    EMU->DCDCCTRL = EMU_DCDCCTRL_DCDCMODEEM4_EM4LOWPOWER | EMU_DCDCCTRL_DCDCMODEEM23_EM23LOWPOWER | EMU_DCDCCTRL_DCDCMODE_LOWNOISE;
-
-    // Switch digital domain to DVDD
-    EMU->PWRCTRL = EMU_PWRCTRL_REGPWRSEL_DVDD | EMU_PWRCTRL_ANASW_AVDD;
-}
-
-void cmu_hfxo_startup_calib(uint16_t ib_trim, uint16_t c_tune)
-{
-  if(CMU->STATUS & CMU_STATUS_HFXOENS)
-      return;
-
-  CMU->HFXOSTARTUPCTRL = (CMU->HFXOSTARTUPCTRL & ~(_CMU_HFXOSTARTUPCTRL_CTUNE_MASK | _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTARTUPCTRL_CTUNE_SHIFT) & _CMU_HFXOSTARTUPCTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTARTUPCTRL_IBTRIMXOCORE_MASK);
-}
-
-void cmu_hfxo_steady_calib(uint16_t ib_trim, uint16_t c_tune)
-{
-  if(CMU->STATUS & CMU_STATUS_HFXOENS)
-      return;
-
-  CMU->HFXOSTEADYSTATECTRL = (CMU->HFXOSTEADYSTATECTRL & ~(_CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK | _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK)) | (((uint32_t)c_tune << _CMU_HFXOSTEADYSTATECTRL_CTUNE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_CTUNE_MASK) | (((uint32_t)ib_trim << _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_SHIFT) & _CMU_HFXOSTEADYSTATECTRL_IBTRIMXOCORE_MASK);
-}
-
-void cmu_hfrco_calib(uint32_t calibration)
-{
-    if(CMU->STATUS & CMU_STATUS_DPLLENS)
-        return;
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY);
-
-    CMU->HFRCOCTRL = calibration;
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_HFRCOBSY);
-}
-
-void cmu_ushfrco_calib(uint8_t enable, uint32_t calibration)
-{
-    if(CMU->USBCRCTRL & CMU_USBCRCTRL_USBCREN)
-        return;
-
-    if(!enable)
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_USHFRCODIS;
-        while(CMU->STATUS & CMU_STATUS_USHFRCOENS);
-
-        return;
-    }
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_USHFRCOBSY);
-
-    CMU->USHFRCOCTRL = calibration | CMU_USHFRCOCTRL_FINETUNINGEN;
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_USHFRCOBSY);
-
-    if(enable && !(CMU->STATUS & CMU_STATUS_USHFRCOENS))
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_USHFRCOEN;
-
-        while(!(CMU->STATUS & CMU_STATUS_USHFRCORDY));
-    }
-}
-
-void cmu_auxhfrco_calib(uint8_t enable, uint32_t calibration)
-{
-    if(!enable)
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCODIS;
-        while(CMU->STATUS & CMU_STATUS_AUXHFRCOENS);
-
-        return;
-    }
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_AUXHFRCOBSY);
-
-    CMU->AUXHFRCOCTRL = calibration;
-
-    while(CMU->SYNCBUSY & CMU_SYNCBUSY_AUXHFRCOBSY);
-
-    if(enable && !(CMU->STATUS & CMU_STATUS_AUXHFRCOENS))
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_AUXHFRCOEN;
-
-        while(!(CMU->STATUS & CMU_STATUS_AUXHFRCORDY));
-    }
-}
-
-
-void cmu_init(void)
-{
-    // Change SDIO clock to HFXO if HFRCO selected and disable it
-    CMU->SDIOCTRL = CMU_SDIOCTRL_SDIOCLKDIS | CMU_SDIOCTRL_SDIOCLKSEL_HFXO;
-    while(CMU->STATUS & CMU_STATUS_SDIOCLKENS);
-
-    // Change QSPI clock to HFXO if HFRCO selected and disable it
-    CMU->QSPICTRL = CMU_QSPICTRL_QSPI0CLKDIS | CMU_QSPICTRL_QSPI0CLKSEL_HFXO;
-    while(CMU->STATUS & CMU_STATUS_QSPI0CLKENS);
-
-    // Disable DPLL if enabled
-    if(CMU->STATUS & CMU_STATUS_DPLLENS)
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_DPLLDIS;
-        while(CMU->STATUS & CMU_STATUS_DPLLENS);
-    }
-
-    // Disable HFXO if enabled
-    if(CMU->STATUS & CMU_STATUS_HFXOENS)
-    {
-        CMU->OSCENCMD = CMU_OSCENCMD_HFXODIS;
-        while(CMU->STATUS & CMU_STATUS_HFXOENS);
-    }
-
-    // Setup HFXO
-    CMU->HFXOCTRL = CMU_HFXOCTRL_PEAKDETMODE_AUTOCMD | CMU_HFXOCTRL_MODE_XTAL;
-    CMU->HFXOCTRL1 = CMU_HFXOCTRL1_PEAKDETTHR_DEFAULT;
-    CMU->HFXOSTEADYSTATECTRL |= CMU_HFXOSTEADYSTATECTRL_PEAKMONEN;
-    CMU->HFXOTIMEOUTCTRL = (7 << _CMU_HFXOTIMEOUTCTRL_PEAKDETTIMEOUT_SHIFT) | (8 << _CMU_HFXOTIMEOUTCTRL_STEADYTIMEOUT_SHIFT) | (12 << _CMU_HFXOTIMEOUTCTRL_STARTUPTIMEOUT_SHIFT);
-
-    // Enable HFXO and wait for it to be ready
-    CMU->OSCENCMD = CMU_OSCENCMD_HFXOEN;
-    while(!(CMU->STATUS & CMU_STATUS_HFXORDY));
-
-    // Switch main clock to HFXO and wait for it to be selected
-    CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFXO;
-    while((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) != CMU_HFCLKSTATUS_SELECTED_HFXO);
-
-    // Calibrate HFRCO for 72MHz and enable tuning by PLL
-    cmu_hfrco_calib((DEVINFO->HFRCOCAL16) | CMU_HFRCOCTRL_FINETUNINGEN);
-
-    // Setup the PLL
-    CMU->DPLLCTRL = CMU_DPLLCTRL_REFSEL_HFXO | CMU_DPLLCTRL_AUTORECOVER | CMU_DPLLCTRL_EDGESEL_RISE | CMU_DPLLCTRL_MODE_FREQLL;
-    // 72MHz = 50MHz (HFXO) * 1.44 (144/100)
-    CMU->DPLLCTRL1 = (143 << _CMU_DPLLCTRL1_N_SHIFT) | (99 << _CMU_DPLLCTRL1_M_SHIFT); // fHFRCO = fHFXO * (N + 1) / (M + 1)
-
-    // Enable the DPLL and wait for it to be ready
-    CMU->OSCENCMD = CMU_OSCENCMD_DPLLEN;
-    while(!(CMU->STATUS & CMU_STATUS_DPLLRDY));
-
-    // Config peripherals for the new frequency (freq > 32MHz)
-    CMU->CTRL |= CMU_CTRL_WSHFLE;
-
-    // Set prescalers
-    CMU->HFPRESC = CMU_HFPRESC_HFCLKLEPRESC_DIV2 | CMU_HFPRESC_PRESC_NODIVISION;
-    CMU->HFBUSPRESC = 1 << _CMU_HFBUSPRESC_PRESC_SHIFT;
-    CMU->HFCOREPRESC = 0 << _CMU_HFCOREPRESC_PRESC_SHIFT;
-    CMU->HFPERPRESC = 1 << _CMU_HFPERPRESC_PRESC_SHIFT;
-    CMU->HFEXPPRESC = 0 << _CMU_HFEXPPRESC_PRESC_SHIFT;
-    CMU->HFPERPRESCB = 0 << _CMU_HFPERPRESCB_PRESC_SHIFT;
-    CMU->HFPERPRESCC = 1 << _CMU_HFPERPRESCC_PRESC_SHIFT;
-
-    // Enable clock to peripherals
-    CMU->CTRL |= CMU_CTRL_HFPERCLKEN;
-
-    // Switch main clock to HFRCO and wait for it to be selected
-    CMU->HFCLKSEL = CMU_HFCLKSEL_HF_HFRCO;
-    while((CMU->HFCLKSTATUS & _CMU_HFCLKSTATUS_SELECTED_MASK) != CMU_HFCLKSTATUS_SELECTED_HFRCO);
-
-    // LFA Clock
-    CMU->LFACLKSEL = CMU_LFACLKSEL_LFA_LFRCO;
-
-    // LFB Clock
-    CMU->LFBCLKSEL = CMU_LFBCLKSEL_LFB_LFRCO;
-
-    // LFC Clock
-    CMU->LFCCLKSEL = CMU_LFCCLKSEL_LFC_LFRCO;
-
-    // LFE Clock
-    CMU->LFECLKSEL = CMU_LFECLKSEL_LFE_ULFRCO;
-}
-
-void systick_init(void)
-{
-    SysTick->LOAD = (72000000 / 1000) - 1;
-    SysTick->VAL = 0;
-    SysTick->CTRL = SysTick_CTRL_TICKINT_Msk | SysTick_CTRL_ENABLE_Msk | SysTick_CTRL_CLKSOURCE_Msk;
-
-    SCB->SHP[11] = 7 << (8 - __NVIC_PRIO_BITS); // Set priority 3,1 (min)
-}
-
-void gpio_init(void)
-{
-    CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_GPIO;
-
-    // NC - Not Connected (not available in mcu package)
-    // NR - Not routed (no routing to pin on pcb, floating)
-    // NU - Not used (not currently in use)
-
-    // Port A
-    GPIO->P[0].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[0].MODEL  = GPIO_P_MODEL_MODE0_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE1_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE2_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE3_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE4_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE5_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE6_DISABLED          // NU
-                      | GPIO_P_MODEL_MODE7_DISABLED;         // NC
-    GPIO->P[0].MODEH  = GPIO_P_MODEH_MODE8_DISABLED          // GPIO - MIC_ENABLE
-                      | GPIO_P_MODEH_MODE9_DISABLED          // NC
-                      | GPIO_P_MODEH_MODE10_DISABLED         // NC
-                      | GPIO_P_MODEH_MODE11_DISABLED         // NC
-                      | GPIO_P_MODEH_MODE12_WIREDAND         // LED0R
-                      | GPIO_P_MODEH_MODE13_WIREDAND         // LED0B
-                      | GPIO_P_MODEH_MODE14_WIREDAND         // LED0G
-                      | GPIO_P_MODEH_MODE15_DISABLED;        // NU
-    GPIO->P[0].DOUT   = 0x7000; // Leds off By default
-    GPIO->P[0].OVTDIS = 0;
-
-    // Port B
-    GPIO->P[1].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[1].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE3_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE6_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE7_DISABLED;                // MAIN_LFXTAL_P
-    GPIO->P[1].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // MAIN_LFXTAL_N
-                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE11_DISABLED                // PDM_DAT0 - MIC_DATA
-                      | GPIO_P_MODEH_MODE12_DISABLED                // PDM_CLK - MIC_CLOCK
-                      | GPIO_P_MODEH_MODE13_DISABLED                // MAIN_HFXTAL_P
-                      | GPIO_P_MODEH_MODE14_DISABLED                // MAIN_HFXTAL_N
-                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
-    GPIO->P[1].DOUT   = 0;
-    GPIO->P[1].OVTDIS = 0;
-
-    // Port C
-    GPIO->P[2].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (7 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[2].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE6_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE7_DISABLED;                // NC
-    GPIO->P[2].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE11_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE12_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
-    GPIO->P[2].DOUT   = 0;
-    GPIO->P[2].OVTDIS = 0;
-
-    // Port D
-    GPIO->P[3].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[3].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE1_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE2_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE3_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE5_INPUT                    // GPIO - BTN0
-                      | GPIO_P_MODEL_MODE6_WIREDAND                 // LED1R
-                      | GPIO_P_MODEL_MODE7_DISABLED;                // NU
-    GPIO->P[3].MODEH  = GPIO_P_MODEH_MODE8_INPUT                    // GPIO - BTN1
-                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE10_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE11_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE12_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
-    GPIO->P[3].DOUT   = 0;
-    GPIO->P[3].OVTDIS = 0;
-
-    // Port E
-    GPIO->P[4].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[4].MODEL  = GPIO_P_MODEL_MODE0_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE1_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE2_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE4_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE6_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE7_DISABLED;                // NU
-    GPIO->P[4].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NU
-                      | GPIO_P_MODEH_MODE9_DISABLED                 // NU
-                      | GPIO_P_MODEH_MODE10_DISABLED                // NU
-                      | GPIO_P_MODEH_MODE11_DISABLED                // NU
-                      | GPIO_P_MODEH_MODE12_WIREDAND                // LED1B
-                      | GPIO_P_MODEH_MODE13_DISABLED                // NU
-                      | GPIO_P_MODEH_MODE14_DISABLED                // NU
-                      | GPIO_P_MODEH_MODE15_DISABLED;               // NU
-    GPIO->P[4].DOUT   = 0;
-    GPIO->P[4].OVTDIS = 0;
-
-    // Port F
-    GPIO->P[5].CTRL   = GPIO_P_CTRL_DRIVESTRENGTHALT_STRONG | (6 << _GPIO_P_CTRL_SLEWRATEALT_SHIFT)
-                      | GPIO_P_CTRL_DRIVESTRENGTH_STRONG | (6 << _GPIO_P_CTRL_SLEWRATE_SHIFT);
-    GPIO->P[5].MODEL  = GPIO_P_MODEL_MODE0_PUSHPULL                 // SWCLK
-                      | GPIO_P_MODEL_MODE1_PUSHPULL                 // SWDIO
-                      | GPIO_P_MODEL_MODE2_PUSHPULL                 // SWO
-                      | GPIO_P_MODEL_MODE3_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE4_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE5_DISABLED                 // NU
-                      | GPIO_P_MODEL_MODE6_DISABLED                 // NC
-                      | GPIO_P_MODEL_MODE7_DISABLED;                // NC
-    GPIO->P[5].MODEH  = GPIO_P_MODEH_MODE8_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE9_DISABLED                 // NC
-                      | GPIO_P_MODEH_MODE10_DISABLED                // USB N
-                      | GPIO_P_MODEH_MODE11_DISABLED                // USB P
-                      | GPIO_P_MODEH_MODE12_WIREDAND                // LED1G
-                      | GPIO_P_MODEH_MODE13_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE14_DISABLED                // NC
-                      | GPIO_P_MODEH_MODE15_DISABLED;               // NC
-    GPIO->P[5].DOUT   = 0;
-
-    GPIO->P[5].OVTDIS = 0;
-
-    // Debugger Route
-    GPIO->ROUTEPEN &= ~(GPIO_ROUTEPEN_TDIPEN | GPIO_ROUTEPEN_TDOPEN);   // Disable JTAG
-    GPIO->ROUTEPEN |= GPIO_ROUTEPEN_SWVPEN;                             // Enable SWO
-    GPIO->ROUTELOC0 = GPIO_ROUTELOC0_SWVLOC_LOC0;                       // SWO on PF2
-
-    // External interrupts
-    GPIO->EXTIPSELL = GPIO_EXTIPSELL_EXTIPSEL0_PORTE            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL1_PORTB            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL2_PORTB            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL3_PORTB            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL4_PORTA            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL5_PORTA            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL6_PORTC            // NU
-                    | GPIO_EXTIPSELL_EXTIPSEL7_PORTC;           // NU
-    GPIO->EXTIPSELH = GPIO_EXTIPSELH_EXTIPSEL8_PORTA            // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL9_PORTE            // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL10_PORTF           // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL11_PORTA           // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL12_PORTA           // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL13_PORTE           // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL14_PORTF           // NU
-                    | GPIO_EXTIPSELH_EXTIPSEL15_PORTA;          // NU
-
-    GPIO->EXTIPINSELL = GPIO_EXTIPINSELL_EXTIPINSEL0_PIN3       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL1_PIN1       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL2_PIN2       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL3_PIN3       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL4_PIN6       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL5_PIN7       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL6_PIN4       // NU
-                      | GPIO_EXTIPINSELL_EXTIPINSEL7_PIN7;      // NU
-    GPIO->EXTIPINSELH = GPIO_EXTIPINSELH_EXTIPINSEL8_PIN8       // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL9_PIN9       // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL10_PIN11     // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL11_PIN8      // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL12_PIN13     // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL13_PIN15     // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL14_PIN12     // NU
-                      | GPIO_EXTIPINSELH_EXTIPINSEL15_PIN12;    // NU
-
-}
-
-/*--------------------------------------------------------------------*/
-/* Board Init                                                         */
-/*--------------------------------------------------------------------*/
-
-void board_init(void)
-{
-
-  emu_dcdc_init(1800.f, 50.f, 100.f, 0.f); // Init DC-DC converter (1.8 V, 50 mA active, 100 uA sleep, 0 mA reverse limit)
-  emu_init(0);
-  emu_reg_init(3300.f); // set output regulator to 3.3V
-
-  cmu_hfxo_startup_calib(0x200, 0x145); // Config HFXO Startup for 1280 uA, 36 pF (18 pF + 2 pF CLOAD)
-  cmu_hfxo_steady_calib(0x009, 0x145); // Config HFXO Steady for 12 uA, 36 pF (18 pF + 2 pF CLOAD)
-
-  cmu_init(); // Init Clock Management Unit
-
-  cmu_ushfrco_calib(1, DEVINFO->USHFRCOCAL13); // Enable and calibrate USHFRCO for 48 MHz
-  cmu_auxhfrco_calib(1, DEVINFO->AUXHFRCOCAL11); // Enable and calibrate AUXHFRCO for 32 MHz
-
-  CMU->USBCRCTRL = CMU_USBCRCTRL_USBCREN; // enable USB clock recovery
-  CMU->USBCTRL = CMU_USBCTRL_USBCLKSEL_USHFRCO | CMU_USBCTRL_USBCLKEN;  // select USHFRCO as USB Phy clock source and enable it
-
-  CMU->HFBUSCLKEN0 |= CMU_HFBUSCLKEN0_USB;  // enable USB peripheral clock
-
-  systick_init(); // Init system tick
-
-  gpio_init(); // Init IOs
-
-}
-
-/*--------------------------------------------------------------------*/
-/* Board porting API                                                  */
-/*--------------------------------------------------------------------*/
-
-void board_led_write(bool state)
-{
-  // Combine red and blue for pink Because it looks good :)
-  GPIO->P[LED_PORT].DOUT = (GPIO->P[LED_PORT].DOUT & ~((1 << LED_PIN_R) | (1 << LED_PIN_B))) | (state << LED_PIN_R) | (state << LED_PIN_B);
-}
-
-uint32_t board_button_read(void)
-{
-  return !!(GPIO->P[BUTTON_PORT].DIN & (1 << BUTTON_PIN));
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler(void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  Reports the name of the source file and the source line number
-  *         where the assert_param error has occurred.
-  * @param  file: pointer to the source file name
-  * @param  line: assert_param error line source number
-  * @retval None
-  */
-void assert_failed(char *file, uint32_t line)
-{
-  /* USER CODE BEGIN 6 */
-  /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
-  /* USER CODE END 6 */
-}
-#endif /* USE_FULL_ASSERT */
-- 
cgit v1.3.1


From ce2dab7fb3a2572fd63e8fdf6682d95d41f59116 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 10:00:14 +0700
Subject: more warning fix

---
 .github/workflows/ci_set_matrix.py |  3 +--
 hw/bsp/maxim/family.cmake          | 10 +++++++---
 2 files changed, 8 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index e53998c66..46108a847 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -34,8 +34,7 @@ family_list = {
     "ra": ["arm-gcc"],
     "rp2040": ["arm-gcc"],
     "rx": ["rx-gcc"],
-    "samd11 saml2x": ["arm-gcc", "arm-clang"],
-    "samd21": ["arm-gcc", "arm-clang"],
+    "samd11 samd2x_l2x": ["arm-gcc", "arm-clang"],
     "samd5x_e5x samg": ["arm-gcc", "arm-clang"],
     "stm32c0 stm32f0 stm32f1 stm32f2 stm32f3": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f4": ["arm-gcc", "arm-clang", "arm-iar"],
diff --git a/hw/bsp/maxim/family.cmake b/hw/bsp/maxim/family.cmake
index e4b1b2c46..cbfe7c84e 100644
--- a/hw/bsp/maxim/family.cmake
+++ b/hw/bsp/maxim/family.cmake
@@ -186,9 +186,13 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/mentor/musb/dcd_musb.c
     )
-  target_compile_options(${TARGET} PRIVATE
-    -Wno-error=strict-prototypes
-    )
+
+  # warnings caused by MSDK headers
+  target_compile_options(${TARGET} PRIVATE -Wno-error=strict-prototypes)
+  if (${MAX_DEVICE} STREQUAL "max78002")
+    target_compile_options(${TARGET} PRIVATE -Wno-error=redundant-decls)
+  endif ()
+
   target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
   # Flashing
-- 
cgit v1.3.1


From 9bd3622fc796544e0cde440966a16bf38e5b1e1f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 12:24:45 +0700
Subject: merge nuc121 and 125

---
 hw/bsp/board.c                                     |   2 +-
 hw/bsp/family_support.cmake                        |  30 ++--
 .../boards/nutiny_sdk_nuc121/board.cmake           |  15 ++
 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.h |  43 +++++
 .../nuc121_125/boards/nutiny_sdk_nuc121/board.mk   |  14 ++
 .../boards/nutiny_sdk_nuc121/nuc121_flash.ld       | 195 +++++++++++++++++++++
 .../boards/nutiny_sdk_nuc125/board.cmake           |   8 +
 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.h |  43 +++++
 .../nuc121_125/boards/nutiny_sdk_nuc125/board.mk   |   8 +
 .../boards/nutiny_sdk_nuc125/nuc125_flash.ld       | 195 +++++++++++++++++++++
 hw/bsp/nuc121_125/family.c                         | 119 +++++++++++++
 hw/bsp/nuc121_125/family.cmake                     | 108 ++++++++++++
 hw/bsp/nuc121_125/family.mk                        |  43 +++++
 hw/bsp/nutiny_nuc121s/board.mk                     |  46 -----
 hw/bsp/nutiny_nuc121s/nuc121_flash.ld              | 195 ---------------------
 hw/bsp/nutiny_nuc121s/nutiny_nuc121.c              | 121 -------------
 hw/bsp/nutiny_nuc125s/board.mk                     |  42 -----
 hw/bsp/nutiny_nuc125s/nuc125_flash.ld              | 195 ---------------------
 hw/bsp/nutiny_nuc125s/nutiny_nuc125.c              | 121 -------------
 19 files changed, 812 insertions(+), 731 deletions(-)
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.h
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/nuc121_flash.ld
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.h
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
 create mode 100644 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/nuc125_flash.ld
 create mode 100644 hw/bsp/nuc121_125/family.c
 create mode 100644 hw/bsp/nuc121_125/family.cmake
 create mode 100644 hw/bsp/nuc121_125/family.mk
 delete mode 100644 hw/bsp/nutiny_nuc121s/board.mk
 delete mode 100644 hw/bsp/nutiny_nuc121s/nuc121_flash.ld
 delete mode 100644 hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
 delete mode 100644 hw/bsp/nutiny_nuc125s/board.mk
 delete mode 100644 hw/bsp/nutiny_nuc125s/nuc125_flash.ld
 delete mode 100644 hw/bsp/nutiny_nuc125s/nutiny_nuc125.c

(limited to 'hw')

diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index a51978479..03d09c353 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -31,7 +31,7 @@
 #ifdef __ICCARM__
   #define sys_write   __write
   #define sys_read    __read
-#elif defined(__MSP430__) || defined(__RX__)
+#elif defined(__MSP430__) || defined(__RX__) || TU_CHECK_MCU(OPT_MCU_NUC121)
   #define sys_write   write
   #define sys_read    read
 #else
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d8ef79f60..23f63e759 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -1,6 +1,7 @@
 include_guard(GLOBAL)
 
 include(CMakePrintHelpers)
+set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 
 # TOP is path to root directory
 set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
@@ -8,13 +9,6 @@ get_filename_component(TOP ${TOP} ABSOLUTE)
 
 set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
 
-#-------------------------------------------------------------
-# RTOS
-#-------------------------------------------------------------
-if (NOT DEFINED RTOS)
-  set(RTOS noos CACHE STRING "RTOS")
-endif ()
-
 #-------------------------------------------------------------
 # Toolchain
 # Can be changed via -DTOOLCHAIN=gcc|iar or -DCMAKE_C_COMPILER=
@@ -62,8 +56,8 @@ set(WARN_FLAGS_GNU
   -Wunused
   -Wunused-function
   -Wreturn-type
-  -Wredundant-decls
-  -Wmissing-prototypes
+  #-Wredundant-decls
+  #-Wmissing-prototypes
   )
 set(WARN_FLAGS_Clang ${WARN_FLAGS_GNU})
 
@@ -115,8 +109,12 @@ if (NOT NO_WARN_RWX_SEGMENTS_SUPPORTED)
 endif()
 
 #----------------------------------
-# Zephyr
+# RTOS
 #----------------------------------
+if (NOT DEFINED RTOS)
+  set(RTOS noos CACHE STRING "RTOS")
+endif ()
+
 if (RTOS STREQUAL zephyr)
   set(BOARD_ROOT ${TOP}/hw/bsp/${FAMILY})
   set(ZEPHYR_BOARD_ALIASES ${CMAKE_CURRENT_LIST_DIR}/zephyr_board_aliases.cmake)
@@ -540,6 +538,18 @@ function(family_flash_openocd_adi TARGET)
   family_flash_openocd(${TARGET})
 endfunction()
 
+# Add flash openocd-nuvoton target
+# compiled from https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+function(family_flash_openocd_nuvoton TARGET)
+  if (NOT DEFINED OPENOCD)
+    set(OPENOCD $ENV{HOME}/app/OpenOCD-Nuvoton/src/openocd)
+    set(OPENOCD_OPTION2 "-s $ENV{HOME}/app/OpenOCD-Nuvoton/tcl")
+  endif ()
+
+  family_flash_openocd(${TARGET})
+endfunction()
+
+
 # Add flash with https://github.com/ch32-rs/wlink
 function(family_flash_wlink_rs TARGET)
   if (NOT DEFINED WLINK_RS)
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
new file mode 100644
index 000000000..320ce5a6e
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
@@ -0,0 +1,15 @@
+set(NUC_SERIES nuc121)
+set(JLINK_DEVICE NUC121SC2AE)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc121_flash.ld)
+
+# Extra StdDriver sources for NUC121
+set(BOARD_SOURCES
+  ${SDK_DIR}/StdDriver/src/fmc.c
+  ${SDK_DIR}/StdDriver/src/sys.c
+  ${SDK_DIR}/StdDriver/src/timer.c
+)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.h b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.h
new file mode 100644
index 000000000..73e73d5b3
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT              PB
+#define LED_PIN               4
+#define LED_PIN_IO            PB4
+#define LED_STATE_ON          0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
new file mode 100644
index 000000000..78d2f0ff4
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
@@ -0,0 +1,14 @@
+NUC_SERIES = nuc121
+JLINK_DEVICE = NUC121SC2AE
+LD_FILE = $(BOARD_PATH)/nuc121_flash.ld
+
+# Extra StdDriver sources for NUC121
+SRC_C += \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+flash: $(BUILD)/$(PROJECT).elf
+	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/nuc121_flash.ld b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/nuc121_flash.ld
new file mode 100644
index 000000000..0c599a561
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/nuc121_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000    /* 32k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x2000    /* 8k  */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
new file mode 100644
index 000000000..d9bbebfba
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
@@ -0,0 +1,8 @@
+set(NUC_SERIES nuc125)
+set(JLINK_DEVICE NUC125SC2AE)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc125_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.h b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.h
new file mode 100644
index 000000000..73e73d5b3
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT              PB
+#define LED_PIN               4
+#define LED_PIN_IO            PB4
+#define LED_STATE_ON          0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
new file mode 100644
index 000000000..04541ab6f
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
@@ -0,0 +1,8 @@
+NUC_SERIES = nuc125
+JLINK_DEVICE = NUC125SC2AE
+LD_FILE = $(BOARD_PATH)/nuc125_flash.ld
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+flash: $(BUILD)/$(PROJECT).elf
+	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/nuc125_flash.ld b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/nuc125_flash.ld
new file mode 100644
index 000000000..0c599a561
--- /dev/null
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/nuc125_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000    /* 32k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x2000    /* 8k  */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nuc121_125/family.c b/hw/bsp/nuc121_125/family.c
new file mode 100644
index 000000000..089855207
--- /dev/null
+++ b/hw/bsp/nuc121_125/family.c
@@ -0,0 +1,119 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+#include "NuMicro.h"
+#include "clk.h"
+#include "sys.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USBD_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// Board Initialization
+//--------------------------------------------------------------------+
+
+void board_init(void)
+{
+  /* Unlock protected registers */
+  SYS_UnlockReg();
+
+  /*---------------------------------------------------------------------------------------------------------*/
+  /* Init System Clock                                                                                       */
+  /*---------------------------------------------------------------------------------------------------------*/
+
+  /* Enable Internal HIRC 48 MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
+
+  /* Waiting for Internal RC clock ready */
+  CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+  /* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
+  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
+
+  /* Enable module clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+  /* Select module clock source */
+  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
+
+  /* Enable module clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(48000000 / 1000);
+#endif
+
+  // LED
+  GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
new file mode 100644
index 000000000..42f24c116
--- /dev/null
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -0,0 +1,108 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/nuvoton/nuc121_125)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m0 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
+
+set(FAMILY_MCUS NUC121 NUC125 CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  # Common sources for all NUC12x
+  set(COMMON_SOURCES
+    ${SDK_DIR}/Device/Nuvoton/NUC121/Source/system_NUC121.c
+    ${SDK_DIR}/StdDriver/src/clk.c
+    ${SDK_DIR}/StdDriver/src/gpio.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+  )
+
+  # Add board-specific sources if defined
+  if(DEFINED BOARD_SOURCES)
+    list(APPEND COMMON_SOURCES ${BOARD_SOURCES})
+  endif()
+
+  add_library(${BOARD_TARGET} STATIC ${COMMON_SOURCES})
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/Device/Nuvoton/NUC121/Include
+    ${SDK_DIR}/StdDriver/inc
+    ${SDK_DIR}/CMSIS/Include
+  )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __ARM_FEATURE_DSP=0
+    USE_ASSERT=0
+    CFG_EXAMPLE_MSC_READONLY
+  )
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  # These files are built for each example since it depends on example's tusb_config.h
+  target_sources(${TARGET} PUBLIC
+    # BSP
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    # family, hw, board
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC121)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  family_flash_openocd_nuvoton(${TARGET})
+endfunction()
diff --git a/hw/bsp/nuc121_125/family.mk b/hw/bsp/nuc121_125/family.mk
new file mode 100644
index 000000000..c3a72b2f7
--- /dev/null
+++ b/hw/bsp/nuc121_125/family.mk
@@ -0,0 +1,43 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -mthumb \
+  -mabi=aapcs-linux \
+  -mcpu=cortex-m0 \
+  -D__ARM_FEATURE_DSP=0 \
+  -DUSE_ASSERT=0 \
+  -DCFG_EXAMPLE_MSC_READONLY \
+  -DCFG_TUSB_MCU=OPT_MCU_NUC121
+
+CPU_CORE ?= cortex-m0
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=redundant-decls
+
+LDFLAGS_GCC += \
+  --specs=nosys.specs --specs=nano.specs
+
+# All source paths should be relative to the top level.
+# LD_FILE is defined in board.mk
+
+# Common sources for all NUC12x variants
+SRC_C += \
+  src/portable/nuvoton/nuc121/dcd_nuc121.c \
+  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c
+
+# Additional sources are added in board.mk if needed (e.g., fmc, sys, timer, uart for NUC121)
+
+SRC_S += \
+  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
+
+INC += \
+  $(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
+  $(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
+  $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include \
+  $(TOP)/$(BOARD_PATH)
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
diff --git a/hw/bsp/nutiny_nuc121s/board.mk b/hw/bsp/nutiny_nuc121s/board.mk
deleted file mode 100644
index 06c47d544..000000000
--- a/hw/bsp/nutiny_nuc121s/board.mk
+++ /dev/null
@@ -1,46 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m0 \
-  -D__ARM_FEATURE_DSP=0 \
-  -DUSE_ASSERT=0 \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_NUC121
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=redundant-decls
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/nuc121_flash.ld
-
-SRC_C += \
-  src/portable/nuvoton/nuc121/dcd_nuc121.c \
-  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/uart.c
-
-SRC_S += \
-  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
-
-INC += \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = NUC121SC2AE
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld b/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
deleted file mode 100644
index 0c599a561..000000000
--- a/hw/bsp/nutiny_nuc121s/nuc121_flash.ld
+++ /dev/null
@@ -1,195 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000    /* 32k */
-  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x2000    /* 8k  */
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c b/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
deleted file mode 100644
index 7cb9b2e69..000000000
--- a/hw/bsp/nutiny_nuc121s/nutiny_nuc121.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "NuMicro.h"
-#include "clk.h"
-#include "sys.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-#define LED_PORT              PB
-#define LED_PIN               4
-#define LED_PIN_IO            PB4
-#define LED_STATE_ON          0
-
-void board_init(void)
-{
-  /* Unlock protected registers */
-  SYS_UnlockReg();
-
-  /*---------------------------------------------------------------------------------------------------------*/
-  /* Init System Clock                                                                                       */
-  /*---------------------------------------------------------------------------------------------------------*/
-
-  /* Enable Internal HIRC 48 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
-
-  /* Waiting for Internal RC clock ready */
-  CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
-
-  /* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
-  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-  /* Select module clock source */
-  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(48000000 / 1000);
-#endif
-
-  // LED
-  GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
diff --git a/hw/bsp/nutiny_nuc125s/board.mk b/hw/bsp/nutiny_nuc125s/board.mk
deleted file mode 100644
index 50b9d866a..000000000
--- a/hw/bsp/nutiny_nuc125s/board.mk
+++ /dev/null
@@ -1,42 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m0 \
-  -D__ARM_FEATURE_DSP=0 \
-  -DUSE_ASSERT=0 \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_NUC121
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=redundant-decls
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/nuc125_flash.ld
-
-SRC_C += \
-  src/portable/nuvoton/nuc121/dcd_nuc121.c \
-  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c
-
-SRC_S += \
-  hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S
-
-INC += \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Include \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/StdDriver/inc \
-  $(TOP)/hw/mcu/nuvoton/nuc121_125/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = NUC125SC2AE
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld b/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
deleted file mode 100644
index 0c599a561..000000000
--- a/hw/bsp/nutiny_nuc125s/nuc125_flash.ld
+++ /dev/null
@@ -1,195 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x8000    /* 32k */
-  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x2000    /* 8k  */
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c b/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
deleted file mode 100644
index 7cb9b2e69..000000000
--- a/hw/bsp/nutiny_nuc125s/nutiny_nuc125.c
+++ /dev/null
@@ -1,121 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "NuMicro.h"
-#include "clk.h"
-#include "sys.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-#define LED_PORT              PB
-#define LED_PIN               4
-#define LED_PIN_IO            PB4
-#define LED_STATE_ON          0
-
-void board_init(void)
-{
-  /* Unlock protected registers */
-  SYS_UnlockReg();
-
-  /*---------------------------------------------------------------------------------------------------------*/
-  /* Init System Clock                                                                                       */
-  /*---------------------------------------------------------------------------------------------------------*/
-
-  /* Enable Internal HIRC 48 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN);
-
-  /* Waiting for Internal RC clock ready */
-  CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
-
-  /* Switch HCLK clock source to Internal HIRC and HCLK source divide 1 */
-  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-  /* Select module clock source */
-  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC, CLK_CLKDIV0_USB(1));
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(48000000 / 1000);
-#endif
-
-  // LED
-  GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-- 
cgit v1.3.1


From 0d690c8b801da36b0d06490648c1110da06edc19 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 12:49:36 +0700
Subject: update nuc121/125

---
 .../device/audio_4_channel_mic_freertos/skip.txt   |   1 +
 examples/device/audio_test_freertos/skip.txt       |   1 +
 examples/device/cdc_msc_freertos/skip.txt          |   1 +
 hw/bsp/nuc121_125/FreeRTOSConfig/FreeRTOSConfig.h  | 150 +++++++++++++++++++++
 .../boards/nutiny_sdk_nuc121/board.cmake           |   7 -
 .../nuc121_125/boards/nutiny_sdk_nuc121/board.mk   |  11 --
 .../nuc121_125/boards/nutiny_sdk_nuc125/board.mk   |   5 -
 hw/bsp/nuc121_125/family.cmake                     |  14 +-
 hw/bsp/nuc121_125/family.mk                        |  11 +-
 src/common/tusb_mcu.h                              |   1 +
 src/portable/nuvoton/nuc121/dcd_nuc121.c           |  16 ++-
 11 files changed, 184 insertions(+), 34 deletions(-)
 create mode 100644 hw/bsp/nuc121_125/FreeRTOSConfig/FreeRTOSConfig.h

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index 30cd46e7e..65925b32c 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -17,3 +17,4 @@ board:lpcxpresso11u37
 board:lpcxpresso1347
 family:broadcom_32bit
 family:broadcom_64bit
+family:nuc121_125
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 1f3d4281a..c9cdacad7 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -15,3 +15,4 @@ mcu:RAXXX
 family:broadcom_32bit
 family:broadcom_64bit
 board:stm32l0538disco
+family:nuc121_125
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index b73a6d8dd..69fc883e6 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -15,3 +15,4 @@ mcu:RAXXX
 mcu:STM32L0
 family:broadcom_32bit
 family:broadcom_64bit
+family:nuc121_125
diff --git a/hw/bsp/nuc121_125/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nuc121_125/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..e8f120553
--- /dev/null
+++ b/hw/bsp/nuc121_125/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "NuMicro.h"
+#endif
+
+/* Cortex-M0 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        0
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// NUC121/125 has 2 priority bits
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
index 320ce5a6e..f910b128f 100644
--- a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
@@ -2,13 +2,6 @@ set(NUC_SERIES nuc121)
 set(JLINK_DEVICE NUC121SC2AE)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc121_flash.ld)
 
-# Extra StdDriver sources for NUC121
-set(BOARD_SOURCES
-  ${SDK_DIR}/StdDriver/src/fmc.c
-  ${SDK_DIR}/StdDriver/src/sys.c
-  ${SDK_DIR}/StdDriver/src/timer.c
-)
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     )
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
index 78d2f0ff4..8c8b4aa11 100644
--- a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.mk
@@ -1,14 +1,3 @@
 NUC_SERIES = nuc121
 JLINK_DEVICE = NUC121SC2AE
 LD_FILE = $(BOARD_PATH)/nuc121_flash.ld
-
-# Extra StdDriver sources for NUC121
-SRC_C += \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
index 04541ab6f..7f61b94f3 100644
--- a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.mk
@@ -1,8 +1,3 @@
 NUC_SERIES = nuc125
 JLINK_DEVICE = NUC125SC2AE
 LD_FILE = $(BOARD_PATH)/nuc125_flash.ld
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
index 42f24c116..5b95c9d9c 100644
--- a/hw/bsp/nuc121_125/family.cmake
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -11,7 +11,7 @@ set(CMAKE_SYSTEM_CPU cortex-m0 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
 
-set(FAMILY_MCUS NUC121 NUC125 CACHE INTERNAL "")
+set(FAMILY_MCUS NUC121 CACHE INTERNAL "")
 
 #------------------------------------
 # BOARD_TARGET
@@ -31,20 +31,16 @@ function(add_board_target BOARD_TARGET)
   set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
   # Common sources for all NUC12x
-  set(COMMON_SOURCES
+  add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Device/Nuvoton/NUC121/Source/system_NUC121.c
     ${SDK_DIR}/StdDriver/src/clk.c
     ${SDK_DIR}/StdDriver/src/gpio.c
+    ${SDK_DIR}/StdDriver/src/fmc.c
+    ${SDK_DIR}/StdDriver/src/sys.c
+    ${SDK_DIR}/StdDriver/src/timer.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
   )
 
-  # Add board-specific sources if defined
-  if(DEFINED BOARD_SOURCES)
-    list(APPEND COMMON_SOURCES ${BOARD_SOURCES})
-  endif()
-
-  add_library(${BOARD_TARGET} STATIC ${COMMON_SOURCES})
-
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/Device/Nuvoton/NUC121/Include
     ${SDK_DIR}/StdDriver/inc
diff --git a/hw/bsp/nuc121_125/family.mk b/hw/bsp/nuc121_125/family.mk
index c3a72b2f7..9e2430d13 100644
--- a/hw/bsp/nuc121_125/family.mk
+++ b/hw/bsp/nuc121_125/family.mk
@@ -26,7 +26,10 @@ SRC_C += \
   src/portable/nuvoton/nuc121/dcd_nuc121.c \
   hw/mcu/nuvoton/nuc121_125/Device/Nuvoton/NUC121/Source/system_NUC121.c \
   hw/mcu/nuvoton/nuc121_125/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/gpio.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/fmc.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc121_125/StdDriver/src/timer.c
 
 # Additional sources are added in board.mk if needed (e.g., fmc, sys, timer, uart for NUC121)
 
@@ -41,3 +44,9 @@ INC += \
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+OPENOCD_NUVOTON_PATH ?= $(HOME)/app/OpenOCD-Nuvoton
+flash: $(BUILD)/$(PROJECT).elf
+	$(OPENOCD_NUVOTON_PATH)/src/openocd -s $(OPENOCD_NUVOTON_PATH)/tcl -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index bb3ac4d76..5e1a6aafd 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -382,6 +382,7 @@
 //--------------------------------------------------------------------+
 #elif TU_CHECK_MCU(OPT_MCU_NUC121, OPT_MCU_NUC126)
   #define TUP_DCD_ENDPOINT_MAX    8
+  #define TUP_DCD_EDPT_ISO_ALLOC
 
 #elif TU_CHECK_MCU(OPT_MCU_NUC120)
   #define TUP_DCD_ENDPOINT_MAX    6
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index f4af97ca7..37210ea34 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -293,8 +293,9 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   /* construct USB Configuration Register value and then write it */
   uint32_t cfg = tu_edpt_number(p_endpoint_desc->bEndpointAddress);
   cfg |= (TUSB_DIR_IN == dir) ? USBD_CFG_EPMODE_IN : USBD_CFG_EPMODE_OUT;
-  if (TUSB_XFER_ISOCHRONOUS == type)
+  if (TUSB_XFER_ISOCHRONOUS == type) {
     cfg |= USBD_CFG_TYPE_ISO;
+  }
   ep->CFG = cfg;
 
   /* make a note of the endpoint size */
@@ -303,6 +304,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
-- 
cgit v1.3.1


From 8199ed6fd0329e63c45352816973a6632d635c69 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 13:37:21 +0700
Subject: refactor all nuc to family

---
 examples/device/net_lwip_webserver/skip.txt        |   1 +
 hw/bsp/board.c                                     |   2 +-
 hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h  | 150 ++++++++++++++++
 .../boards/nutiny_sdk_nuc120/board.cmake           |   7 +
 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.h |  43 +++++
 .../nuc100_120/boards/nutiny_sdk_nuc120/board.mk   |   2 +
 .../boards/nutiny_sdk_nuc120/nuc120_flash.ld       | 195 ++++++++++++++++++++
 hw/bsp/nuc100_120/family.c                         | 127 +++++++++++++
 hw/bsp/nuc100_120/family.cmake                     |  87 +++++++++
 hw/bsp/nuc100_120/family.mk                        |  39 ++++
 hw/bsp/nuc121_125/family.mk                        |   3 -
 hw/bsp/nuc126/FreeRTOSConfig/FreeRTOSConfig.h      | 150 ++++++++++++++++
 hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake    |   7 +
 hw/bsp/nuc126/boards/nutiny_nuc126v/board.h        |  46 +++++
 hw/bsp/nuc126/boards/nutiny_nuc126v/board.mk       |   2 +
 .../nuc126/boards/nutiny_nuc126v/nuc126_flash.ld   | 195 ++++++++++++++++++++
 hw/bsp/nuc126/family.c                             | 144 +++++++++++++++
 hw/bsp/nuc126/family.cmake                         | 104 +++++++++++
 hw/bsp/nuc126/family.mk                            |  48 +++++
 hw/bsp/nuc505/FreeRTOSConfig/FreeRTOSConfig.h      | 150 ++++++++++++++++
 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake |   7 +
 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.h     |  42 +++++
 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.mk    |   2 +
 .../boards/nutiny_sdk_nuc505/nuc505_flashtoram.ld  | 199 +++++++++++++++++++++
 hw/bsp/nuc505/family.c                             | 127 +++++++++++++
 hw/bsp/nuc505/family.cmake                         |  91 ++++++++++
 hw/bsp/nuc505/family.mk                            |  55 ++++++
 hw/bsp/nutiny_nuc126v/board.mk                     |  48 -----
 hw/bsp/nutiny_nuc126v/nuc126_flash.ld              | 195 --------------------
 hw/bsp/nutiny_nuc126v/nutiny_nuc126.c              | 153 ----------------
 hw/bsp/nutiny_sdk_nuc120/board.mk                  |  41 -----
 hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld           | 195 --------------------
 hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c       | 133 --------------
 hw/bsp/nutiny_sdk_nuc505/board.mk                  |  63 -------
 hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld      | 199 ---------------------
 hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c       | 129 -------------
 src/common/tusb_mcu.h                              |   2 +
 src/portable/nuvoton/nuc505/dcd_nuc505.c           |  13 ++
 38 files changed, 2036 insertions(+), 1160 deletions(-)
 create mode 100644 hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
 create mode 100644 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.h
 create mode 100644 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.mk
 create mode 100644 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/nuc120_flash.ld
 create mode 100644 hw/bsp/nuc100_120/family.c
 create mode 100644 hw/bsp/nuc100_120/family.cmake
 create mode 100644 hw/bsp/nuc100_120/family.mk
 create mode 100644 hw/bsp/nuc126/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
 create mode 100644 hw/bsp/nuc126/boards/nutiny_nuc126v/board.h
 create mode 100644 hw/bsp/nuc126/boards/nutiny_nuc126v/board.mk
 create mode 100644 hw/bsp/nuc126/boards/nutiny_nuc126v/nuc126_flash.ld
 create mode 100644 hw/bsp/nuc126/family.c
 create mode 100644 hw/bsp/nuc126/family.cmake
 create mode 100644 hw/bsp/nuc126/family.mk
 create mode 100644 hw/bsp/nuc505/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
 create mode 100644 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.h
 create mode 100644 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.mk
 create mode 100644 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/nuc505_flashtoram.ld
 create mode 100644 hw/bsp/nuc505/family.c
 create mode 100644 hw/bsp/nuc505/family.cmake
 create mode 100644 hw/bsp/nuc505/family.mk
 delete mode 100644 hw/bsp/nutiny_nuc126v/board.mk
 delete mode 100644 hw/bsp/nutiny_nuc126v/nuc126_flash.ld
 delete mode 100644 hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
 delete mode 100644 hw/bsp/nutiny_sdk_nuc120/board.mk
 delete mode 100644 hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld
 delete mode 100644 hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
 delete mode 100644 hw/bsp/nutiny_sdk_nuc505/board.mk
 delete mode 100644 hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld
 delete mode 100644 hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c

(limited to 'hw')

diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index 6121f1f9d..1b5482a57 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -20,3 +20,4 @@ board:curiosity_nano
 board:frdm_kl25z
 # lpc55 has weird error 'ncm_interface' causes a section type conflict with 'ntb_parameters'
 family:lpc55
+family:nuc126
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 03d09c353..41e6eb1b8 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -31,7 +31,7 @@
 #ifdef __ICCARM__
   #define sys_write   __write
   #define sys_read    __read
-#elif defined(__MSP430__) || defined(__RX__) || TU_CHECK_MCU(OPT_MCU_NUC121)
+#elif defined(__MSP430__) || defined(__RX__) || TU_CHECK_MCU(OPT_MCU_NUC120, OPT_MCU_NUC121, OPT_MCU_NUC126, OPT_MCU_NUC505)
   #define sys_write   write
   #define sys_read    read
 #else
diff --git a/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..e8f120553
--- /dev/null
+++ b/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "NuMicro.h"
+#endif
+
+/* Cortex-M0 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        0
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// NUC121/125 has 2 priority bits
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
new file mode 100644
index 000000000..79c0d61ca
--- /dev/null
+++ b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
@@ -0,0 +1,7 @@
+set(JLINK_DEVICE NUC120LE3)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc120_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.h b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.h
new file mode 100644
index 000000000..b6f1adf30
--- /dev/null
+++ b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT     PB
+#define LED_PIN      0
+#define LED_PIN_IO   PB0
+#define LED_STATE_ON 0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.mk b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.mk
new file mode 100644
index 000000000..5f8fa6d0b
--- /dev/null
+++ b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.mk
@@ -0,0 +1,2 @@
+JLINK_DEVICE = NUC120LE3
+LD_FILE = $(BOARD_PATH)/nuc120_flash.ld
diff --git a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/nuc120_flash.ld b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/nuc120_flash.ld
new file mode 100644
index 000000000..cab12c8b9
--- /dev/null
+++ b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/nuc120_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000   /* 128k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x4000    /*  16k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nuc100_120/family.c b/hw/bsp/nuc100_120/family.c
new file mode 100644
index 000000000..d04dc6657
--- /dev/null
+++ b/hw/bsp/nuc100_120/family.c
@@ -0,0 +1,127 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+#include "NUC100Series.h"
+#include "clk.h"
+#include "sys.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USBD_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+void board_init(void)
+{
+  SYS_UnlockReg();
+
+  /* Enable Internal RC 22.1184 MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
+
+  /* Waiting for Internal RC clock ready */
+  CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
+
+  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
+  CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));
+
+  /* Enable external XTAL 12 MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);
+
+  /* Waiting for external XTAL clock ready */
+  CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);
+
+  /* Set core clock */
+  CLK_SetCoreClock(48000000);
+
+  /* Enable module clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+  /* Select module clock source */
+  CLK_SetModuleClock(USBD_MODULE, 0, CLK_CLKDIV_USB(1));
+
+  SYS_LockReg();
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(48000000 / 1000);
+#endif
+
+  GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_PMD_OUTPUT);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+#if 0
+  /* this would be the simplest solution... *IF* the part supported the pin data interface */
+  LED_PIN_IO = (state) ? LED_STATE_ON : (1-LED_STATE_ON);
+#else
+  /* if the part's *PDIO pin data registers don't work, a more elaborate approach is needed */
+  uint32_t irq_state = __get_PRIMASK();
+  __disable_irq();
+  uint32_t current = LED_PORT->DOUT & ~(1UL << LED_PIN);
+  LED_PORT->DOUT = current | (((state) ? LED_STATE_ON : (1UL-LED_STATE_ON)) << LED_PIN);
+  __set_PRIMASK(irq_state);
+#endif
+}
+
+uint32_t board_button_read(void)
+{
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
diff --git a/hw/bsp/nuc100_120/family.cmake b/hw/bsp/nuc100_120/family.cmake
new file mode 100644
index 000000000..06501b526
--- /dev/null
+++ b/hw/bsp/nuc100_120/family.cmake
@@ -0,0 +1,87 @@
+include_guard()
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/nuvoton/nuc100_120)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+set(CMAKE_SYSTEM_CPU cortex-m0 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
+
+set(FAMILY_MCUS NUC100 NUC120 CACHE INTERNAL "")
+
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC100Series/Source/GCC/startup_NUC100Series.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/Device/Nuvoton/NUC100Series/Source/system_NUC100Series.c
+    ${SDK_DIR}/StdDriver/src/clk.c
+    ${SDK_DIR}/StdDriver/src/gpio.c
+    ${SDK_DIR}/StdDriver/src/sys.c
+    ${SDK_DIR}/StdDriver/src/timer.c
+    ${SDK_DIR}/StdDriver/src/uart.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/Device/Nuvoton/NUC100Series/Include
+    ${SDK_DIR}/StdDriver/inc
+    ${SDK_DIR}/CMSIS/Include
+  )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_EXAMPLE_MSC_READONLY
+    CFG_EXAMPLE_VIDEO_READONLY
+  )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  add_board_target(board_${BOARD})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC120)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/nuvoton/nuc120/dcd_nuc120.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  family_flash_openocd_nuvoton(${TARGET})
+endfunction()
diff --git a/hw/bsp/nuc100_120/family.mk b/hw/bsp/nuc100_120/family.mk
new file mode 100644
index 000000000..f9afb4f72
--- /dev/null
+++ b/hw/bsp/nuc100_120/family.mk
@@ -0,0 +1,39 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -DCFG_EXAMPLE_MSC_READONLY \
+  -DCFG_EXAMPLE_VIDEO_READONLY \
+  -DCFG_TUSB_MCU=OPT_MCU_NUC120
+
+CPU_CORE ?= cortex-m0
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# LD_FILE is defined in board.mk
+
+SRC_C += \
+  src/portable/nuvoton/nuc120/dcd_nuc120.c \
+  hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Source/system_NUC100Series.c \
+  hw/mcu/nuvoton/nuc100_120/StdDriver/src/clk.c \
+  hw/mcu/nuvoton/nuc100_120/StdDriver/src/gpio.c \
+  hw/mcu/nuvoton/nuc100_120/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc100_120/StdDriver/src/timer.c \
+  hw/mcu/nuvoton/nuc100_120/StdDriver/src/uart.c
+
+SRC_S += \
+  hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Source/GCC/startup_NUC100Series.S
+
+INC += \
+  $(TOP)/hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Include \
+  $(TOP)/hw/mcu/nuvoton/nuc100_120/StdDriver/inc \
+  $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include \
+  $(TOP)/$(BOARD_PATH)
+
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+OPENOCD_NUVOTON_PATH ?= $(HOME)/app/OpenOCD-Nuvoton
+flash: $(BUILD)/$(PROJECT).elf
+	$(OPENOCD_NUVOTON_PATH)/src/openocd -s $(OPENOCD_NUVOTON_PATH)/tcl -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc121_125/family.mk b/hw/bsp/nuc121_125/family.mk
index 9e2430d13..f46dac6e4 100644
--- a/hw/bsp/nuc121_125/family.mk
+++ b/hw/bsp/nuc121_125/family.mk
@@ -2,9 +2,6 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CFLAGS += \
   -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m0 \
   -D__ARM_FEATURE_DSP=0 \
   -DUSE_ASSERT=0 \
   -DCFG_EXAMPLE_MSC_READONLY \
diff --git a/hw/bsp/nuc126/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nuc126/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..e8f120553
--- /dev/null
+++ b/hw/bsp/nuc126/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "NuMicro.h"
+#endif
+
+/* Cortex-M0 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        0
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// NUC121/125 has 2 priority bits
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
new file mode 100644
index 000000000..ece3e774a
--- /dev/null
+++ b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
@@ -0,0 +1,7 @@
+set(JLINK_DEVICE NUC126VG4AE)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc126_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/nuc126/boards/nutiny_nuc126v/board.h b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.h
new file mode 100644
index 000000000..82b2c1bd5
--- /dev/null
+++ b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.h
@@ -0,0 +1,46 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT              PC
+#define LED_PIN               9
+#define LED_PIN_IO            PC9
+#define LED_STATE_ON          0
+
+#define CRYSTAL_LESS /* system will be 48MHz when defined, otherwise, system is 72MHz */
+#define HIRC48_AUTO_TRIM    SYS_IRCTCTL1_REFCKSEL_Msk | (1UL << SYS_IRCTCTL1_LOOPSEL_Pos) | (2UL << SYS_IRCTCTL1_FREQSEL_Pos)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/nuc126/boards/nutiny_nuc126v/board.mk b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.mk
new file mode 100644
index 000000000..3050ea162
--- /dev/null
+++ b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.mk
@@ -0,0 +1,2 @@
+JLINK_DEVICE = NUC126VG4AE
+LD_FILE = $(BOARD_PATH)/nuc126_flash.ld
diff --git a/hw/bsp/nuc126/boards/nutiny_nuc126v/nuc126_flash.ld b/hw/bsp/nuc126/boards/nutiny_nuc126v/nuc126_flash.ld
new file mode 100644
index 000000000..b23890b4b
--- /dev/null
+++ b/hw/bsp/nuc126/boards/nutiny_nuc126v/nuc126_flash.ld
@@ -0,0 +1,195 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000   /* 256k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x5000    /*  20k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.text :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		*(.text*)
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nuc126/family.c b/hw/bsp/nuc126/family.c
new file mode 100644
index 000000000..f992fcab4
--- /dev/null
+++ b/hw/bsp/nuc126/family.c
@@ -0,0 +1,144 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+#include "NuMicro.h"
+#include "clk.h"
+#include "sys.h"
+
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USBD_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+#define TRIM_INIT           (SYS_BASE+0x118)
+
+void board_init(void)
+{
+  /* Unlock protected registers */
+  SYS_UnlockReg();
+
+  /*---------------------------------------------------------------------------------------------------------*/
+  /* Init System Clock                                                                                       */
+  /*---------------------------------------------------------------------------------------------------------*/
+
+  /* Enable Internal RC 22.1184 MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
+
+  /* Waiting for Internal RC clock ready */
+  CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
+
+  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
+  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
+
+#ifndef CRYSTAL_LESS
+  /* Enable external XTAL 12 MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
+
+  /* Waiting for external XTAL clock ready */
+  CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
+
+  /* Set core clock */
+  CLK_SetCoreClock(72000000);
+
+  /* Use HIRC as UART clock source */
+  CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
+
+  /* Use PLL as USB clock source */
+  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_PLL, CLK_CLKDIV0_USB(3));
+
+#else
+  /* Enable Internal RC 48MHz clock */
+  CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
+
+  /* Waiting for Internal RC clock ready */
+  CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
+
+  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
+  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1));
+
+  /* Use HIRC as UART clock source */
+  CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
+
+  /* Use HIRC48 as USB clock source */
+  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC48, CLK_CLKDIV0_USB(1));
+#endif
+
+  /* Enable module clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(48000000 / 1000);
+#endif
+
+  // LED
+  GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
+}
+
+uint32_t board_button_read(void)
+{
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
diff --git a/hw/bsp/nuc126/family.cmake b/hw/bsp/nuc126/family.cmake
new file mode 100644
index 000000000..00725d725
--- /dev/null
+++ b/hw/bsp/nuc126/family.cmake
@@ -0,0 +1,104 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/nuvoton/nuc126)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m0 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
+
+set(FAMILY_MCUS NUC126 CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/Device/Nuvoton/NUC126/Source/system_NUC126.c
+    ${SDK_DIR}/StdDriver/src/clk.c
+    ${SDK_DIR}/StdDriver/src/crc.c
+    ${SDK_DIR}/StdDriver/src/gpio.c
+    ${SDK_DIR}/StdDriver/src/rtc.c
+    ${SDK_DIR}/StdDriver/src/sys.c
+    ${SDK_DIR}/StdDriver/src/timer.c
+    ${SDK_DIR}/StdDriver/src/uart.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/Device/Nuvoton/NUC126/Include
+    ${SDK_DIR}/StdDriver/inc
+    ${SDK_DIR}/CMSIS/Include
+  )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __ARM_FEATURE_DSP=0
+    USE_ASSERT=0
+    CFG_EXAMPLE_VIDEO_READONLY
+    __CORTEX_SC=0
+  )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC126)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  family_flash_openocd_nuvoton(${TARGET})
+endfunction()
diff --git a/hw/bsp/nuc126/family.mk b/hw/bsp/nuc126/family.mk
new file mode 100644
index 000000000..37df7aaab
--- /dev/null
+++ b/hw/bsp/nuc126/family.mk
@@ -0,0 +1,48 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -D__ARM_FEATURE_DSP=0 \
+  -DUSE_ASSERT=0 \
+  -DCFG_EXAMPLE_VIDEO_READONLY \
+  -D__CORTEX_SC=0 \
+  -DCFG_TUSB_MCU=OPT_MCU_NUC126
+
+CPU_CORE ?= cortex-m0
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=redundant-decls
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# All source paths should be relative to the top level.
+# LD_FILE is defined in board.mk
+
+SRC_C += \
+  src/portable/nuvoton/nuc121/dcd_nuc121.c \
+  hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/system_NUC126.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/clk.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/crc.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/gpio.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/rtc.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/timer.c \
+  hw/mcu/nuvoton/nuc126/StdDriver/src/uart.c
+
+SRC_S += \
+  hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S
+
+INC += \
+  $(TOP)/hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Include \
+  $(TOP)/hw/mcu/nuvoton/nuc126/StdDriver/inc \
+  $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include \
+  $(TOP)/$(BOARD_PATH)
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+OPENOCD_NUVOTON_PATH ?= $(HOME)/app/OpenOCD-Nuvoton
+flash: $(BUILD)/$(PROJECT).elf
+	$(OPENOCD_NUVOTON_PATH)/src/openocd -s $(OPENOCD_NUVOTON_PATH)/tcl -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nuc505/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nuc505/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..a44beb767
--- /dev/null
+++ b/hw/bsp/nuc505/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+#include "NUC505Series.h"
+#endif
+
+/* Cortex-M4F port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*8*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// NUC505 has 3 priority bits
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
new file mode 100644
index 000000000..079231dc5
--- /dev/null
+++ b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
@@ -0,0 +1,7 @@
+set(JLINK_DEVICE NUC505YO13Y)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc505_flashtoram.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.h b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.h
new file mode 100644
index 000000000..ec3c15f46
--- /dev/null
+++ b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.h
@@ -0,0 +1,42 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define LED_PORT     PC
+#define LED_PIN      3
+#define LED_STATE_ON 0
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.mk b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.mk
new file mode 100644
index 000000000..f189de163
--- /dev/null
+++ b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.mk
@@ -0,0 +1,2 @@
+JLINK_DEVICE = NUC505YO13Y
+LD_FILE = $(BOARD_PATH)/nuc505_flashtoram.ld
diff --git a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/nuc505_flashtoram.ld b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/nuc505_flashtoram.ld
new file mode 100644
index 000000000..53d385cd0
--- /dev/null
+++ b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/nuc505_flashtoram.ld
@@ -0,0 +1,199 @@
+/* Linker script to configure memory regions. */
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000   /* 512k */
+  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x20000   /* 128k */
+}
+
+/* Library configurations */
+GROUP(libgcc.a libc.a libm.a libnosys.a)
+
+/* Linker script to place sections and symbol values. Should be used together
+ * with other linker script that defines memory regions FLASH and RAM.
+ * It references following symbols, which must be defined in code:
+ *   Reset_Handler : Entry of reset handler
+ *
+ * It defines following symbols, which code can use without definition:
+ *   __exidx_start
+ *   __exidx_end
+ *   __copy_table_start__
+ *   __copy_table_end__
+ *   __zero_table_start__
+ *   __zero_table_end__
+ *   __etext
+ *   __data_start__
+ *   __preinit_array_start
+ *   __preinit_array_end
+ *   __init_array_start
+ *   __init_array_end
+ *   __fini_array_start
+ *   __fini_array_end
+ *   __data_end__
+ *   __bss_start__
+ *   __bss_end__
+ *   __end__
+ *   end
+ *   __HeapLimit
+ *   __StackLimit
+ *   __StackTop
+ *   __stack
+ *   __Vectors_End
+ *   __Vectors_Size
+ */
+ENTRY(Reset_Handler)
+
+SECTIONS
+{
+	.startup :
+	{
+		KEEP(*(.vectors))
+		__Vectors_End = .;
+		__Vectors_Size = __Vectors_End - __Vectors;
+		__end__ = .;
+
+		KEEP(*(.preinit))
+
+		KEEP(*(.init))
+		KEEP(*(.fini))
+
+	} > FLASH
+
+	.ARM.extab :
+	{
+		*(.ARM.extab* .gnu.linkonce.armextab.*)
+	} > FLASH
+
+	__exidx_start = .;
+	.ARM.exidx :
+	{
+		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
+	} > FLASH
+	__exidx_end = .;
+
+	/* To copy multiple ROM to RAM sections,
+	 * uncomment .copy.table section and,
+	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.copy.table :
+	{
+		. = ALIGN(4);
+		__copy_table_start__ = .;
+		LONG (__etext)
+		LONG (__data_start__)
+		LONG (__data_end__ - __data_start__)
+		LONG (__etext2)
+		LONG (__data2_start__)
+		LONG (__data2_end__ - __data2_start__)
+		__copy_table_end__ = .;
+	} > FLASH
+	*/
+
+	/* To clear multiple BSS sections,
+	 * uncomment .zero.table section and,
+	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
+	/*
+	.zero.table :
+	{
+		. = ALIGN(4);
+		__zero_table_start__ = .;
+		LONG (__bss_start__)
+		LONG (__bss_end__ - __bss_start__)
+		LONG (__bss2_start__)
+		LONG (__bss2_end__ - __bss2_start__)
+		__zero_table_end__ = .;
+	} > FLASH
+	*/
+
+	__etext = .;
+
+	.data : AT (__etext)
+	{
+		__data_start__ = .;
+
+		*(.text*)
+
+		/* .ctors */
+		*crtbegin.o(.ctors)
+		*crtbegin?.o(.ctors)
+		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
+		*(SORT(.ctors.*))
+		*(.ctors)
+
+		/* .dtors */
+ 		*crtbegin.o(.dtors)
+ 		*crtbegin?.o(.dtors)
+ 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
+ 		*(SORT(.dtors.*))
+ 		*(.dtors)
+
+		*(.rodata*)
+
+		KEEP(*(.eh_frame*))
+
+		*(vtable)
+		*(.data*)
+
+		. = ALIGN(4);
+		/* preinit data */
+		PROVIDE_HIDDEN (__preinit_array_start = .);
+		KEEP(*(.preinit_array))
+		PROVIDE_HIDDEN (__preinit_array_end = .);
+
+		. = ALIGN(4);
+		/* init data */
+		PROVIDE_HIDDEN (__init_array_start = .);
+		KEEP(*(SORT(.init_array.*)))
+		KEEP(*(.init_array))
+		PROVIDE_HIDDEN (__init_array_end = .);
+
+
+		. = ALIGN(4);
+		/* finit data */
+		PROVIDE_HIDDEN (__fini_array_start = .);
+		KEEP(*(SORT(.fini_array.*)))
+		KEEP(*(.fini_array))
+		PROVIDE_HIDDEN (__fini_array_end = .);
+
+		KEEP(*(.jcr*))
+		. = ALIGN(4);
+		/* All data end */
+		__data_end__ = .;
+
+	} > RAM
+
+	.bss :
+	{
+		. = ALIGN(4);
+		__bss_start__ = .;
+		*(.bss*)
+		*(COMMON)
+		. = ALIGN(4);
+		__bss_end__ = .;
+	} > RAM
+
+	.heap (COPY):
+	{
+		__HeapBase = .;
+		__end__ = .;
+		end = __end__;
+		KEEP(*(.heap*))
+		__HeapLimit = .;
+	} > RAM
+
+	/* .stack_dummy section doesn't contains any symbols. It is only
+	 * used for linker to calculate size of stack sections, and assign
+	 * values to stack symbols later */
+	.stack_dummy (COPY):
+	{
+		KEEP(*(.stack*))
+	} > RAM
+
+	/* Set stack top to end of RAM, and stack limit move down by
+	 * size of stack_dummy section */
+	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
+	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
+	PROVIDE(__stack = __StackTop);
+
+	/* Check if data + heap + stack exceeds RAM limit */
+	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
+}
diff --git a/hw/bsp/nuc505/family.c b/hw/bsp/nuc505/family.c
new file mode 100644
index 000000000..00ed92310
--- /dev/null
+++ b/hw/bsp/nuc505/family.c
@@ -0,0 +1,127 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+#include "NUC505Series.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USBD_IRQHandler(void)
+{
+  tud_int_handler(0);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+
+void board_init(void)
+{
+  /* Enable XTAL */
+  CLK->PWRCTL |= CLK_PWRCTL_HXTEN_Msk;
+
+  CLK_SetCoreClock(96000000);
+
+  /* Set PCLK divider */
+  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
+
+  /* Update System Core Clock */
+  SystemCoreClockUpdate();
+
+  /* Enable USB IP clock */
+  CLK_EnableModuleClock(USBD_MODULE);
+
+  /* Select USB IP clock source */
+  CLK_SetModuleClock(USBD_MODULE, CLK_USBD_SRC_EXT, 0);
+
+  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
+
+  /* Enable PHY */
+  USBD_ENABLE_PHY();
+  /* wait PHY clock ready */
+  while (1) {
+      USBD->EP[EPA].EPMPS = 0x20;
+      if (USBD->EP[EPA].EPMPS == 0x20)
+          break;
+  }
+
+  /* Force SE0, and then clear it to connect*/
+  USBD_SET_SE0();
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(96000000 / 1000);
+#endif
+
+  GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_MODE_OUTPUT);
+}
+
+#if CFG_TUSB_OS  == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler (void)
+{
+  system_ticks++;
+}
+
+uint32_t board_millis(void)
+{
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  uint32_t current = (state) ? LED_STATE_ON : (1-LED_STATE_ON);
+  current <<= LED_PIN;
+  uint32_t irq_state = __get_PRIMASK();
+  __disable_irq();
+  current |= LED_PORT->DOUT & ~(1UL << LED_PIN);
+  LED_PORT->DOUT = current;
+  __set_PRIMASK(irq_state);
+}
+
+uint32_t board_button_read(void)
+{
+  return 0;
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
+
+int board_uart_write(void const * buf, int len)
+{
+  (void) buf; (void) len;
+  return 0;
+}
diff --git a/hw/bsp/nuc505/family.cmake b/hw/bsp/nuc505/family.cmake
new file mode 100644
index 000000000..8816ddbae
--- /dev/null
+++ b/hw/bsp/nuc505/family.cmake
@@ -0,0 +1,91 @@
+include_guard()
+
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/nuvoton/nuc505)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM4.cfg")
+
+set(FAMILY_MCUS NUC505 CACHE INTERNAL "")
+
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S)
+  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/Device/Nuvoton/NUC505Series/Source/system_NUC505Series.c
+    ${SDK_DIR}/StdDriver/src/adc.c
+    ${SDK_DIR}/StdDriver/src/clk.c
+    ${SDK_DIR}/StdDriver/src/gpio.c
+    ${SDK_DIR}/StdDriver/src/i2c.c
+    ${SDK_DIR}/StdDriver/src/i2s.c
+    ${SDK_DIR}/StdDriver/src/pwm.c
+    ${SDK_DIR}/StdDriver/src/rtc.c
+    ${SDK_DIR}/StdDriver/src/spi.c
+    ${SDK_DIR}/StdDriver/src/spim.c
+    ${SDK_DIR}/StdDriver/src/sys.c
+    ${SDK_DIR}/StdDriver/src/timer.c
+    ${SDK_DIR}/StdDriver/src/uart.c
+    ${SDK_DIR}/StdDriver/src/wdt.c
+    ${SDK_DIR}/StdDriver/src/wwdt.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_DIR}/Device/Nuvoton/NUC505Series/Include
+    ${SDK_DIR}/StdDriver/inc
+    ${SDK_DIR}/CMSIS/Include
+  )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+endfunction()
+
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  add_board_target(board_${BOARD})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC505)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/nuvoton/nuc505/dcd_nuc505.c
+    )
+  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  family_flash_openocd_nuvoton(${TARGET})
+endfunction()
diff --git a/hw/bsp/nuc505/family.mk b/hw/bsp/nuc505/family.mk
new file mode 100644
index 000000000..e1f25e2db
--- /dev/null
+++ b/hw/bsp/nuc505/family.mk
@@ -0,0 +1,55 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CFLAGS += \
+  -flto \
+  -DCFG_TUSB_MCU=OPT_MCU_NUC505
+
+CPU_CORE ?= cortex-m4
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=redundant-decls
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# LD_FILE is defined in board.mk
+
+SRC_C += \
+  src/portable/nuvoton/nuc505/dcd_nuc505.c \
+  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/system_NUC505Series.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/adc.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/clk.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/gpio.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/i2c.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/i2s.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/pwm.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/rtc.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/spi.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/spim.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/sys.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/timer.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/uart.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/wdt.c \
+  hw/mcu/nuvoton/nuc505/StdDriver/src/wwdt.c
+
+SRC_S += \
+  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S
+
+INC += \
+  $(TOP)/hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Include \
+  $(TOP)/hw/mcu/nuvoton/nuc505/StdDriver/inc \
+  $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include \
+  $(TOP)/$(BOARD_PATH)
+
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
+
+# Note
+# To be able to program the SPI flash, it need to boot with ICP mode "1011".
+# However, in ICP mode, opencod cannot establish connection to the mcu.
+# Therefore, there is no easy command line flash for NUC505
+# It is probably better to just use Nuvoton NuMicro ICP programming on windows to program the board
+
+# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
+# Please compile and install it from github source
+OPENOCD_NUVOTON_PATH ?= $(HOME)/app/OpenOCD-Nuvoton
+flash: $(BUILD)/$(PROJECT).elf
+	$(OPENOCD_NUVOTON_PATH)/src/openocd -s $(OPENOCD_NUVOTON_PATH)/tcl -f interface/nulink.cfg -f target/numicroM4.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_nuc126v/board.mk b/hw/bsp/nutiny_nuc126v/board.mk
deleted file mode 100644
index e87d1aad0..000000000
--- a/hw/bsp/nutiny_nuc126v/board.mk
+++ /dev/null
@@ -1,48 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m0 \
-  -D__ARM_FEATURE_DSP=0 \
-  -DUSE_ASSERT=0 \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -D__CORTEX_SC=0 \
-  -DCFG_TUSB_MCU=OPT_MCU_NUC126
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=redundant-decls
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/nuc126_flash.ld
-
-SRC_C += \
-  src/portable/nuvoton/nuc121/dcd_nuc121.c \
-  hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/system_NUC126.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/crc.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/gpio.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/rtc.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/sys.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/timer.c \
-  hw/mcu/nuvoton/nuc126/StdDriver/src/uart.c
-
-SRC_S += \
-  hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S
-
-INC += \
-  $(TOP)/hw/mcu/nuvoton/nuc126/Device/Nuvoton/NUC126/Include \
-  $(TOP)/hw/mcu/nuvoton/nuc126/StdDriver/inc \
-  $(TOP)/hw/mcu/nuvoton/nuc126/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = NUC126VG4AE
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_nuc126v/nuc126_flash.ld b/hw/bsp/nutiny_nuc126v/nuc126_flash.ld
deleted file mode 100644
index b23890b4b..000000000
--- a/hw/bsp/nutiny_nuc126v/nuc126_flash.ld
+++ /dev/null
@@ -1,195 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x40000   /* 256k */
-  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x5000    /*  20k */
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c b/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
deleted file mode 100644
index 9974127a8..000000000
--- a/hw/bsp/nutiny_nuc126v/nutiny_nuc126.c
+++ /dev/null
@@ -1,153 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "NuMicro.h"
-#include "clk.h"
-#include "sys.h"
-
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-#define LED_PORT              PC
-#define LED_PIN               9
-#define LED_PIN_IO            PC9
-#define LED_STATE_ON          0
-
-#define CRYSTAL_LESS /* system will be 48MHz when defined, otherwise, system is 72MHz */
-#define HIRC48_AUTO_TRIM    SYS_IRCTCTL1_REFCKSEL_Msk | (1UL << SYS_IRCTCTL1_LOOPSEL_Pos) | (2UL << SYS_IRCTCTL1_FREQSEL_Pos)
-#define TRIM_INIT           (SYS_BASE+0x118)
-
-void board_init(void)
-{
-  /* Unlock protected registers */
-  SYS_UnlockReg();
-
-  /*---------------------------------------------------------------------------------------------------------*/
-  /* Init System Clock                                                                                       */
-  /*---------------------------------------------------------------------------------------------------------*/
-
-  /* Enable Internal RC 22.1184 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCTL_HIRCEN_Msk);
-
-  /* Waiting for Internal RC clock ready */
-  CLK_WaitClockReady(CLK_STATUS_HIRCSTB_Msk);
-
-  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
-  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC, CLK_CLKDIV0_HCLK(1));
-
-#ifndef CRYSTAL_LESS
-  /* Enable external XTAL 12 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCTL_HXTEN_Msk);
-
-  /* Waiting for external XTAL clock ready */
-  CLK_WaitClockReady(CLK_STATUS_HXTSTB_Msk);
-
-  /* Set core clock */
-  CLK_SetCoreClock(72000000);
-
-  /* Use HIRC as UART clock source */
-  CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
-
-  /* Use PLL as USB clock source */
-  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_PLL, CLK_CLKDIV0_USB(3));
-
-#else
-  /* Enable Internal RC 48MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCTL_HIRC48EN_Msk);
-
-  /* Waiting for Internal RC clock ready */
-  CLK_WaitClockReady(CLK_STATUS_HIRC48STB_Msk);
-
-  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
-  CLK_SetHCLK(CLK_CLKSEL0_HCLKSEL_HIRC48, CLK_CLKDIV0_HCLK(1));
-
-  /* Use HIRC as UART clock source */
-  CLK_SetModuleClock(UART0_MODULE, CLK_CLKSEL1_UARTSEL_HIRC, CLK_CLKDIV0_UART(1));
-
-  /* Use HIRC48 as USB clock source */
-  CLK_SetModuleClock(USBD_MODULE, CLK_CLKSEL3_USBDSEL_HIRC48, CLK_CLKDIV0_USB(1));
-#endif
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(48000000 / 1000);
-#endif
-
-  // LED
-  GPIO_SetMode(LED_PORT, 1 << LED_PIN, GPIO_MODE_OUTPUT);
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  LED_PIN_IO = (state ? LED_STATE_ON : (1-LED_STATE_ON));
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
diff --git a/hw/bsp/nutiny_sdk_nuc120/board.mk b/hw/bsp/nutiny_sdk_nuc120/board.mk
deleted file mode 100644
index d982bdc06..000000000
--- a/hw/bsp/nutiny_sdk_nuc120/board.mk
+++ /dev/null
@@ -1,41 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m0 \
-  -DCFG_EXAMPLE_MSC_READONLY \
-  -DCFG_EXAMPLE_VIDEO_READONLY \
-  -DCFG_TUSB_MCU=OPT_MCU_NUC120
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld
-
-SRC_C += \
-  src/portable/nuvoton/nuc120/dcd_nuc120.c \
-  hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Source/system_NUC100Series.c \
-  hw/mcu/nuvoton/nuc100_120/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc100_120/StdDriver/src/gpio.c \
-  hw/mcu/nuvoton/nuc100_120/StdDriver/src/sys.c \
-  hw/mcu/nuvoton/nuc100_120/StdDriver/src/timer.c \
-  hw/mcu/nuvoton/nuc100_120/StdDriver/src/uart.c
-
-SRC_S += \
-  hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Source/GCC/startup_NUC100Series.S
-
-INC += \
-  $(TOP)/hw/mcu/nuvoton/nuc100_120/Device/Nuvoton/NUC100Series/Include \
-  $(TOP)/hw/mcu/nuvoton/nuc100_120/StdDriver/inc \
-  $(TOP)/hw/mcu/nuvoton/nuc100_120/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM0
-
-# For flash-jlink target
-JLINK_DEVICE = NUC120LE3
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM0.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld b/hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld
deleted file mode 100644
index cab12c8b9..000000000
--- a/hw/bsp/nutiny_sdk_nuc120/nuc120_flash.ld
+++ /dev/null
@@ -1,195 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x20000   /* 128k */
-  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x4000    /*  16k */
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.text :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		*(.text*)
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c b/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
deleted file mode 100644
index 18a189d8c..000000000
--- a/hw/bsp/nutiny_sdk_nuc120/nutiny_sdk_nuc120.c
+++ /dev/null
@@ -1,133 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "NUC100Series.h"
-#include "clk.h"
-#include "sys.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-#define LED_PORT     PB
-#define LED_PIN      0
-#define LED_PIN_IO   PB0
-#define LED_STATE_ON 0
-
-void board_init(void)
-{
-  SYS_UnlockReg();
-
-  /* Enable Internal RC 22.1184 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCON_OSC22M_EN_Msk);
-
-  /* Waiting for Internal RC clock ready */
-  CLK_WaitClockReady(CLK_CLKSTATUS_OSC22M_STB_Msk);
-
-  /* Switch HCLK clock source to Internal RC and HCLK source divide 1 */
-  CLK_SetHCLK(CLK_CLKSEL0_HCLK_S_HIRC, CLK_CLKDIV_HCLK(1));
-
-  /* Enable external XTAL 12 MHz clock */
-  CLK_EnableXtalRC(CLK_PWRCON_XTL12M_EN_Msk);
-
-  /* Waiting for external XTAL clock ready */
-  CLK_WaitClockReady(CLK_CLKSTATUS_XTL12M_STB_Msk);
-
-  /* Set core clock */
-  CLK_SetCoreClock(48000000);
-
-  /* Enable module clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-  /* Select module clock source */
-  CLK_SetModuleClock(USBD_MODULE, 0, CLK_CLKDIV_USB(1));
-
-  SYS_LockReg();
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(48000000 / 1000);
-#endif
-
-  GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_PMD_OUTPUT);
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-#if 0
-  /* this would be the simplest solution... *IF* the part supported the pin data interface */
-  LED_PIN_IO = (state) ? LED_STATE_ON : (1-LED_STATE_ON);
-#else
-  /* if the part's *PDIO pin data registers don't work, a more elaborate approach is needed */
-  uint32_t irq_state = __get_PRIMASK();
-  __disable_irq();
-  uint32_t current = LED_PORT->DOUT & ~(1UL << LED_PIN);
-  LED_PORT->DOUT = current | (((state) ? LED_STATE_ON : (1UL-LED_STATE_ON)) << LED_PIN);
-  __set_PRIMASK(irq_state);
-#endif
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
diff --git a/hw/bsp/nutiny_sdk_nuc505/board.mk b/hw/bsp/nutiny_sdk_nuc505/board.mk
deleted file mode 100644
index 1dc8b244e..000000000
--- a/hw/bsp/nutiny_sdk_nuc505/board.mk
+++ /dev/null
@@ -1,63 +0,0 @@
-CFLAGS += \
-  -flto \
-  -mthumb \
-  -mabi=aapcs-linux \
-  -mcpu=cortex-m4 \
-  -mfloat-abi=hard \
-  -mfpu=fpv4-sp-d16 \
-  -DCFG_TUSB_MCU=OPT_MCU_NUC505
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=redundant-decls
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-# All source paths should be relative to the top level.
-LD_FILE = hw/bsp/$(BOARD)/nuc505_flashtoram.ld
-
-SRC_C += \
-  src/portable/nuvoton/nuc505/dcd_nuc505.c \
-  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/system_NUC505Series.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/adc.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/clk.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/gpio.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/i2c.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/i2s.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/pwm.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/rtc.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/spi.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/spim.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/sys.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/timer.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/uart.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/wdt.c \
-  hw/mcu/nuvoton/nuc505/StdDriver/src/wwdt.c
-
-SRC_S += \
-  hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S
-
-INC += \
-  $(TOP)/hw/mcu/nuvoton/nuc505/Device/Nuvoton/NUC505Series/Include \
-  $(TOP)/hw/mcu/nuvoton/nuc505/StdDriver/inc \
-  $(TOP)/hw/mcu/nuvoton/nuc505/CMSIS/Include
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
-
-# For flash-jlink target
-JLINK_DEVICE = NUC505YO13Y
-
-# Note
-# To be able to program the SPI flash, it need to boot with ICP mode "1011".
-# However, in ICP mode, opencod cannot establish connection to the mcu.
-# Therefore, there is no easy command line flash for NUC505
-# It is probably better to just use Nuvoton NuMicro ICP programming on windows to program the board
-# - 1111 "SPI" (run from internal flash)
-# - 1110 "USB" (mass storage emulator that accepts a .bin file)
-# - 0111 "ICE-SPI" (allow external debugger access, but may not be programmable)
-# - 1011 ICP mode (programmable via NuMicro ICP programming tool)
-
-# Flash using Nuvoton's openocd fork at https://github.com/OpenNuvoton/OpenOCD-Nuvoton
-# Please compile and install it from github source
-flash: $(BUILD)/$(PROJECT).elf
-	openocd -f interface/nulink.cfg -f target/numicroM4.cfg -c "program $< reset exit"
diff --git a/hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld b/hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld
deleted file mode 100644
index 53d385cd0..000000000
--- a/hw/bsp/nutiny_sdk_nuc505/nuc505_flashtoram.ld
+++ /dev/null
@@ -1,199 +0,0 @@
-/* Linker script to configure memory regions. */
-MEMORY
-{
-  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x80000   /* 512k */
-  RAM (rwx)  : ORIGIN = 0x20000000, LENGTH = 0x20000   /* 128k */
-}
-
-/* Library configurations */
-GROUP(libgcc.a libc.a libm.a libnosys.a)
-
-/* Linker script to place sections and symbol values. Should be used together
- * with other linker script that defines memory regions FLASH and RAM.
- * It references following symbols, which must be defined in code:
- *   Reset_Handler : Entry of reset handler
- *
- * It defines following symbols, which code can use without definition:
- *   __exidx_start
- *   __exidx_end
- *   __copy_table_start__
- *   __copy_table_end__
- *   __zero_table_start__
- *   __zero_table_end__
- *   __etext
- *   __data_start__
- *   __preinit_array_start
- *   __preinit_array_end
- *   __init_array_start
- *   __init_array_end
- *   __fini_array_start
- *   __fini_array_end
- *   __data_end__
- *   __bss_start__
- *   __bss_end__
- *   __end__
- *   end
- *   __HeapLimit
- *   __StackLimit
- *   __StackTop
- *   __stack
- *   __Vectors_End
- *   __Vectors_Size
- */
-ENTRY(Reset_Handler)
-
-SECTIONS
-{
-	.startup :
-	{
-		KEEP(*(.vectors))
-		__Vectors_End = .;
-		__Vectors_Size = __Vectors_End - __Vectors;
-		__end__ = .;
-
-		KEEP(*(.preinit))
-
-		KEEP(*(.init))
-		KEEP(*(.fini))
-
-	} > FLASH
-
-	.ARM.extab :
-	{
-		*(.ARM.extab* .gnu.linkonce.armextab.*)
-	} > FLASH
-
-	__exidx_start = .;
-	.ARM.exidx :
-	{
-		*(.ARM.exidx* .gnu.linkonce.armexidx.*)
-	} > FLASH
-	__exidx_end = .;
-
-	/* To copy multiple ROM to RAM sections,
-	 * uncomment .copy.table section and,
-	 * define __STARTUP_COPY_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.copy.table :
-	{
-		. = ALIGN(4);
-		__copy_table_start__ = .;
-		LONG (__etext)
-		LONG (__data_start__)
-		LONG (__data_end__ - __data_start__)
-		LONG (__etext2)
-		LONG (__data2_start__)
-		LONG (__data2_end__ - __data2_start__)
-		__copy_table_end__ = .;
-	} > FLASH
-	*/
-
-	/* To clear multiple BSS sections,
-	 * uncomment .zero.table section and,
-	 * define __STARTUP_CLEAR_BSS_MULTIPLE in startup_ARMCMx.S */
-	/*
-	.zero.table :
-	{
-		. = ALIGN(4);
-		__zero_table_start__ = .;
-		LONG (__bss_start__)
-		LONG (__bss_end__ - __bss_start__)
-		LONG (__bss2_start__)
-		LONG (__bss2_end__ - __bss2_start__)
-		__zero_table_end__ = .;
-	} > FLASH
-	*/
-
-	__etext = .;
-
-	.data : AT (__etext)
-	{
-		__data_start__ = .;
-
-		*(.text*)
-
-		/* .ctors */
-		*crtbegin.o(.ctors)
-		*crtbegin?.o(.ctors)
-		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors)
-		*(SORT(.ctors.*))
-		*(.ctors)
-
-		/* .dtors */
- 		*crtbegin.o(.dtors)
- 		*crtbegin?.o(.dtors)
- 		*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors)
- 		*(SORT(.dtors.*))
- 		*(.dtors)
-
-		*(.rodata*)
-
-		KEEP(*(.eh_frame*))
-
-		*(vtable)
-		*(.data*)
-
-		. = ALIGN(4);
-		/* preinit data */
-		PROVIDE_HIDDEN (__preinit_array_start = .);
-		KEEP(*(.preinit_array))
-		PROVIDE_HIDDEN (__preinit_array_end = .);
-
-		. = ALIGN(4);
-		/* init data */
-		PROVIDE_HIDDEN (__init_array_start = .);
-		KEEP(*(SORT(.init_array.*)))
-		KEEP(*(.init_array))
-		PROVIDE_HIDDEN (__init_array_end = .);
-
-
-		. = ALIGN(4);
-		/* finit data */
-		PROVIDE_HIDDEN (__fini_array_start = .);
-		KEEP(*(SORT(.fini_array.*)))
-		KEEP(*(.fini_array))
-		PROVIDE_HIDDEN (__fini_array_end = .);
-
-		KEEP(*(.jcr*))
-		. = ALIGN(4);
-		/* All data end */
-		__data_end__ = .;
-
-	} > RAM
-
-	.bss :
-	{
-		. = ALIGN(4);
-		__bss_start__ = .;
-		*(.bss*)
-		*(COMMON)
-		. = ALIGN(4);
-		__bss_end__ = .;
-	} > RAM
-
-	.heap (COPY):
-	{
-		__HeapBase = .;
-		__end__ = .;
-		end = __end__;
-		KEEP(*(.heap*))
-		__HeapLimit = .;
-	} > RAM
-
-	/* .stack_dummy section doesn't contains any symbols. It is only
-	 * used for linker to calculate size of stack sections, and assign
-	 * values to stack symbols later */
-	.stack_dummy (COPY):
-	{
-		KEEP(*(.stack*))
-	} > RAM
-
-	/* Set stack top to end of RAM, and stack limit move down by
-	 * size of stack_dummy section */
-	__StackTop = ORIGIN(RAM) + LENGTH(RAM);
-	__StackLimit = __StackTop - SIZEOF(.stack_dummy);
-	PROVIDE(__stack = __StackTop);
-
-	/* Check if data + heap + stack exceeds RAM limit */
-	ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
-}
diff --git a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c b/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
deleted file mode 100644
index 3ec0066a3..000000000
--- a/hw/bsp/nutiny_sdk_nuc505/nutiny_sdk_nuc505.c
+++ /dev/null
@@ -1,129 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "bsp/board_api.h"
-#include "NUC505Series.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USBD_IRQHandler(void)
-{
-  tud_int_handler(0);
-}
-
-//--------------------------------------------------------------------+
-// MACRO TYPEDEF CONSTANT ENUM
-//--------------------------------------------------------------------+
-#define LED_PORT     PC
-#define LED_PIN      3
-#define LED_STATE_ON 0
-
-void board_init(void)
-{
-  /* Enable XTAL */
-  CLK->PWRCTL |= CLK_PWRCTL_HXTEN_Msk;
-
-  CLK_SetCoreClock(96000000);
-
-  /* Set PCLK divider */
-  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
-
-  /* Update System Core Clock */
-  SystemCoreClockUpdate();
-
-  /* Enable USB IP clock */
-  CLK_EnableModuleClock(USBD_MODULE);
-
-  /* Select USB IP clock source */
-  CLK_SetModuleClock(USBD_MODULE, CLK_USBD_SRC_EXT, 0);
-
-  CLK_SetModuleClock(PCLK_MODULE, 0, 1);
-
-  /* Enable PHY */
-  USBD_ENABLE_PHY();
-  /* wait PHY clock ready */
-  while (1) {
-      USBD->EP[EPA].EPMPS = 0x20;
-      if (USBD->EP[EPA].EPMPS == 0x20)
-          break;
-  }
-
-  /* Force SE0, and then clear it to connect*/
-  USBD_SET_SE0();
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(96000000 / 1000);
-#endif
-
-  GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_MODE_OUTPUT);
-}
-
-#if CFG_TUSB_OS  == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void SysTick_Handler (void)
-{
-  system_ticks++;
-}
-
-uint32_t board_millis(void)
-{
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  uint32_t current = (state) ? LED_STATE_ON : (1-LED_STATE_ON);
-  current <<= LED_PIN;
-  uint32_t irq_state = __get_PRIMASK();
-  __disable_irq();
-  current |= LED_PORT->DOUT & ~(1UL << LED_PIN);
-  LED_PORT->DOUT = current;
-  __set_PRIMASK(irq_state);
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
-
-int board_uart_write(void const * buf, int len)
-{
-  (void) buf; (void) len;
-  return 0;
-}
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 5e1a6aafd..d0a502367 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -386,10 +386,12 @@
 
 #elif TU_CHECK_MCU(OPT_MCU_NUC120)
   #define TUP_DCD_ENDPOINT_MAX    6
+  #define TUP_DCD_EDPT_ISO_ALLOC
 
 #elif TU_CHECK_MCU(OPT_MCU_NUC505)
   #define TUP_DCD_ENDPOINT_MAX    12
   #define TUP_RHPORT_HIGHSPEED    1
+  #define TUP_DCD_EDPT_ISO_ALLOC
 
 //--------------------------------------------------------------------+
 // Espressif
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index 1c98a0a49..fa457d861 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -357,6 +357,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
-- 
cgit v1.3.1


From a8be5759533eb4b8c61af7ecf8fe90551bc69894 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 15:27:48 +0700
Subject: fix build warning with clang

---
 examples/device/cdc_msc_freertos/src/msc_disk.c  | 8 +++-----
 examples/dual/host_info_to_device_cdc/src/main.c | 6 ++----
 hw/bsp/imxrt/family.c                            | 1 +
 hw/bsp/stm32h7/boards/stm32h743eval/board.h      | 6 +++++-
 4 files changed, 11 insertions(+), 10 deletions(-)

(limited to 'hw')

diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index 849712e6a..c09cf67d6 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -299,13 +299,11 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
     return TUD_MSC_RET_ERROR;
   }
 
-  #ifdef CFG_EXAMPLE_MSC_READONLY
+#ifdef CFG_EXAMPLE_MSC_READONLY
   (void) lun;
   (void) buffer;
   return bufsize;
-  #endif
-
-  #if CFG_EXAMPLE_MSC_ASYNC_IO
+#elif CFG_EXAMPLE_MSC_ASYNC_IO
   io_ops_t io_ops = {.is_read = false, .lun = lun, .lba = lba, .offset = offset, .buffer = buffer, .bufsize = bufsize};
 
   // Send IO operation to IO task
@@ -318,7 +316,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
   tusb_time_delay_ms_api(CFG_EXAMPLE_MSC_IO_DELAY_MS);
 
   return bufsize;
-  #endif
+#endif
 }
 
 // Callback invoked when received an SCSI command not in built-in list below
diff --git a/examples/dual/host_info_to_device_cdc/src/main.c b/examples/dual/host_info_to_device_cdc/src/main.c
index 67e905b9d..5f3964196 100644
--- a/examples/dual/host_info_to_device_cdc/src/main.c
+++ b/examples/dual/host_info_to_device_cdc/src/main.c
@@ -218,9 +218,7 @@ static void print_device_info(uint8_t daddr, const tusb_desc_device_t* desc_devi
   cdc_printf("\r\n");
 
   cdc_printf("  iSerialNumber       %u     "     , desc_device->iSerialNumber);
-  cdc_printf((char*)serial); // serial is already to UTF-8
-  cdc_printf("\r\n");
-
+  cdc_printf("%s \r\n", (char*)serial); // serial is already to UTF-8
   cdc_printf("  bNumConfigurations  %u\r\n"     , desc_device->bNumConfigurations);
 }
 
@@ -310,5 +308,5 @@ static void print_utf16(uint16_t *temp_buf, size_t buf_len) {
   _convert_utf16le_to_utf8(temp_buf + 1, utf16_len, (uint8_t *) temp_buf, sizeof(uint16_t) * buf_len);
   ((uint8_t*) temp_buf)[utf8_len] = '\0';
 
-  cdc_printf((char*) temp_buf);
+  cdc_printf("%s", (char*) temp_buf);
 }
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 9cd59b7d7..84b083e29 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -249,6 +249,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void _exit(int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 7c3f6414a..cfffc7770 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -214,6 +214,10 @@ static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint
   return 0;
 }
 
+static int32_t i2c_get_tick(void) {
+  return (int32_t) HAL_GetTick();
+}
+
 static inline void board_init2(void) {
   // IO control via MFX
   MFXSTM32L152_IO_t io_ctx;
@@ -221,7 +225,7 @@ static inline void board_init2(void) {
   io_ctx.DeInit      = board_i2c_deinit;
   io_ctx.ReadReg     = i2c_readreg;
   io_ctx.WriteReg    = i2c_writereg;
-  io_ctx.GetTick     = (MFXSTM32L152_GetTick_Func) HAL_GetTick;
+  io_ctx.GetTick     = i2c_get_tick;
 
   uint16_t i2c_addr[] = { 0x84, 0x86 };
   for(uint8_t i = 0U; i < 2U; i++) {
-- 
cgit v1.3.1


From 53deb6cc6cf97055fb66f25509b2cdce0b17a3c7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 15:43:08 +0700
Subject: fix more warnings

---
 hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h |  2 +-
 src/portable/nuvoton/nuc120/dcd_nuc120.c          | 13 +++++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
index e8f120553..dfac55a91 100644
--- a/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/nuc100_120/FreeRTOSConfig/FreeRTOSConfig.h
@@ -44,7 +44,7 @@
 
 // skip if included from IAR assembler
 #ifndef __IASMARM__
-  #include "NuMicro.h"
+#include "NUC100Series.h"
 #endif
 
 /* Cortex-M0 port configuration. */
diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c
index b0b6fe857..0edebf159 100644
--- a/src/portable/nuvoton/nuc120/dcd_nuc120.c
+++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c
@@ -275,6 +275,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
-- 
cgit v1.3.1


From 55227a61466ffc39c3605b33be614d725dfe4070 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 15:43:23 +0700
Subject: fix more warnings

---
 .gitignore                                             | 1 +
 examples/device/net_lwip_webserver/skip.txt            | 1 +
 hw/bsp/kinetis_k/family.c                              | 1 +
 hw/bsp/kinetis_k32l2/family.c                          | 1 +
 hw/bsp/kinetis_kl/family.c                             | 1 +
 hw/bsp/lpc17/family.c                                  | 6 +++++-
 hw/bsp/lpc51/family.c                                  | 1 +
 hw/bsp/lpc54/family.c                                  | 1 +
 hw/bsp/lpc55/family.c                                  | 1 +
 hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake | 2 --
 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake | 2 --
 hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake | 2 --
 hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake        | 2 --
 hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake     | 2 --
 tools/get_deps.py                                      | 2 +-
 15 files changed, 14 insertions(+), 12 deletions(-)

(limited to 'hw')

diff --git a/.gitignore b/.gitignore
index a4045f120..977911dff 100644
--- a/.gitignore
+++ b/.gitignore
@@ -20,6 +20,7 @@ latex
 *.ewt
 *.ewd
 *.hex
+.venv/
 cmake_install.cmake
 CMakeCache.txt
 settings/
diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index 1b5482a57..ecb9eb7ec 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -21,3 +21,4 @@ board:frdm_kl25z
 # lpc55 has weird error 'ncm_interface' causes a section type conflict with 'ntb_parameters'
 family:lpc55
 family:nuc126
+family:nuc100_120
diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c
index 59d80fa18..816c5c87e 100644
--- a/hw/bsp/kinetis_k/family.c
+++ b/hw/bsp/kinetis_k/family.c
@@ -159,6 +159,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/kinetis_k32l2/family.c b/hw/bsp/kinetis_k32l2/family.c
index 2fcc1b2af..2062b8b18 100644
--- a/hw/bsp/kinetis_k32l2/family.c
+++ b/hw/bsp/kinetis_k32l2/family.c
@@ -167,6 +167,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index fe864f3a0..000006372 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -159,6 +159,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/lpc17/family.c b/hw/bsp/lpc17/family.c
index 7d3231f6a..1edab6cd4 100644
--- a/hw/bsp/lpc17/family.c
+++ b/hw/bsp/lpc17/family.c
@@ -96,7 +96,11 @@ void board_init(void) {
 //    0x1B // Host + Device + OTG + AHB
   };
 
-  uint32_t const clk_en = CFG_TUD_ENABLED ? USBCLK_DEVCIE : USBCLK_HOST;
+#if CFG_TUD_ENABLED
+  uint32_t const clk_en = USBCLK_DEVCIE;
+#else
+  uint32_t const clk_en = USBCLK_HOST;
+#endif
 
   LPC_USB->OTGClkCtrl = clk_en;
   while ((LPC_USB->OTGClkSt & clk_en) != clk_en) {}
diff --git a/hw/bsp/lpc51/family.c b/hw/bsp/lpc51/family.c
index 0afe33d41..c963b76bd 100644
--- a/hw/bsp/lpc51/family.c
+++ b/hw/bsp/lpc51/family.c
@@ -138,6 +138,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 9b9b5841b..094866d9b 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -233,6 +233,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index dbf8d71b7..f0ded96a7 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -333,6 +333,7 @@ TU_ATTR_UNUSED void _start(void) {
 
 #ifdef __clang__
 void	_exit (int __status) {
+  (void) __status;
   while (1) {}
 }
 #endif
diff --git a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
index 79c0d61ca..02198d4c3 100644
--- a/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
+++ b/hw/bsp/nuc100_120/boards/nutiny_sdk_nuc120/board.cmake
@@ -2,6 +2,4 @@ set(JLINK_DEVICE NUC120LE3)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc120_flash.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
 endfunction()
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
index f910b128f..bffeffc37 100644
--- a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc121/board.cmake
@@ -3,6 +3,4 @@ set(JLINK_DEVICE NUC121SC2AE)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc121_flash.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
 endfunction()
diff --git a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
index d9bbebfba..7909c0a46 100644
--- a/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
+++ b/hw/bsp/nuc121_125/boards/nutiny_sdk_nuc125/board.cmake
@@ -3,6 +3,4 @@ set(JLINK_DEVICE NUC125SC2AE)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc125_flash.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
 endfunction()
diff --git a/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
index ece3e774a..8d5c73e02 100644
--- a/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
+++ b/hw/bsp/nuc126/boards/nutiny_nuc126v/board.cmake
@@ -2,6 +2,4 @@ set(JLINK_DEVICE NUC126VG4AE)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc126_flash.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
 endfunction()
diff --git a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
index 079231dc5..2ece10e33 100644
--- a/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
+++ b/hw/bsp/nuc505/boards/nutiny_sdk_nuc505/board.cmake
@@ -2,6 +2,4 @@ set(JLINK_DEVICE NUC505YO13Y)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/nuc505_flashtoram.ld)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    )
 endfunction()
diff --git a/tools/get_deps.py b/tools/get_deps.py
index c1e2c075d..35f3b3e92 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -51,7 +51,7 @@ deps_optional = {
                            'nrf'],
     'hw/mcu/nuvoton': ['https://github.com/majbthrd/nuc_driver.git',
                        '2204191ec76283371419fbcec207da02e1bc22fa',
-                       'nuc'],
+                       'nuc100_120 nuc121_125 nuc126 nuc505'],
     'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
                            'b41cf930e65c734d8ec6de04f1d57d46787c76ae',
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
-- 
cgit v1.3.1


From fd9d43d7c5785f4d5337bce1e5d5cede86b709c7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 19:31:16 +0700
Subject: refactor spresense into cxd56. there is no orphan board in bsp.

---
 examples/device/uac2_headset/src/usb_descriptors.c |   6 +-
 hw/bsp/cxd56/FreeRTOSConfig/FreeRTOSConfig.h       | 150 +++++++++++++++++++++
 hw/bsp/cxd56/boards/spresense/board.cmake          |   6 +
 hw/bsp/cxd56/boards/spresense/board.h              |  43 ++++++
 hw/bsp/cxd56/boards/spresense/board.mk             |   7 +
 hw/bsp/cxd56/family.c                              | 112 +++++++++++++++
 hw/bsp/cxd56/family.cmake                          | 135 +++++++++++++++++++
 hw/bsp/cxd56/family.mk                             |  70 ++++++++++
 hw/bsp/family_support.mk                           |  28 +---
 hw/bsp/fomu/family.mk                              |   2 +-
 hw/bsp/spresense/board.mk                          |  75 -----------
 hw/bsp/spresense/board_spresense.c                 | 105 ---------------
 src/common/tusb_mcu.h                              |   1 +
 src/portable/sony/cxd56/dcd_cxd56.c                |  13 ++
 14 files changed, 548 insertions(+), 205 deletions(-)
 create mode 100644 hw/bsp/cxd56/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/cxd56/boards/spresense/board.cmake
 create mode 100644 hw/bsp/cxd56/boards/spresense/board.h
 create mode 100644 hw/bsp/cxd56/boards/spresense/board.mk
 create mode 100644 hw/bsp/cxd56/family.c
 create mode 100644 hw/bsp/cxd56/family.cmake
 create mode 100644 hw/bsp/cxd56/family.mk
 delete mode 100644 hw/bsp/spresense/board.mk
 delete mode 100644 hw/bsp/spresense/board_spresense.c

(limited to 'hw')

diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index bc9160d5e..fc12c122e 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -87,9 +87,9 @@ uint8_t const * tud_descriptor_device_cb(void)
 #elif CFG_TUSB_MCU == OPT_MCU_CXD56
   // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
   // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
-  // #define EPNUM_AUDIO_IN    0x01
-  // #define EPNUM_AUDIO_OUT   0x02
-  // #define EPNUM_AUDIO_INT   0x03
+  #define EPNUM_AUDIO_IN    0x01
+  #define EPNUM_AUDIO_OUT   0x02
+  #define EPNUM_AUDIO_INT   0x03
 
 #elif CFG_TUSB_MCU == OPT_MCU_NRF5X
   // ISO endpoints for NRF5x are fixed to 0x08 (0x88)
diff --git a/hw/bsp/cxd56/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/cxd56/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..57b9d7dba
--- /dev/null
+++ b/hw/bsp/cxd56/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "nuttx/config.h"
+#endif
+
+/* Cortex-M4F port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*8*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+// CXD56 (Cortex-M4F) has 3 priority bits
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/cxd56/boards/spresense/board.cmake b/hw/bsp/cxd56/boards/spresense/board.cmake
new file mode 100644
index 000000000..5fe77bfaf
--- /dev/null
+++ b/hw/bsp/cxd56/boards/spresense/board.cmake
@@ -0,0 +1,6 @@
+set(SERIAL /dev/ttyUSB0 CACHE STRING "Serial port for flashing")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    )
+endfunction()
diff --git a/hw/bsp/cxd56/boards/spresense/board.h b/hw/bsp/cxd56/boards/spresense/board.h
new file mode 100644
index 000000000..45b1bb3e3
--- /dev/null
+++ b/hw/bsp/cxd56/boards/spresense/board.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright 2019 Sony Semiconductor Solutions Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include <arch/chip/pin.h>
+
+#define LED_PIN         PIN_I2S1_BCK
+#define BUTTON_PIN      PIN_HIF_IRQ_OUT
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/cxd56/boards/spresense/board.mk b/hw/bsp/cxd56/boards/spresense/board.mk
new file mode 100644
index 000000000..6c31c9d9d
--- /dev/null
+++ b/hw/bsp/cxd56/boards/spresense/board.mk
@@ -0,0 +1,7 @@
+# Spresense board configuration
+SERIAL ?= /dev/ttyUSB0
+
+# flash
+flash: $(BUILD)/$(PROJECT).spk
+	@echo FLASH $<
+	@$(PYTHON) $(TOP)/hw/mcu/sony/cxd56/tools/flash_writer.py -s -c $(SERIAL) -d -b 115200 -n $<
diff --git a/hw/bsp/cxd56/family.c b/hw/bsp/cxd56/family.c
new file mode 100644
index 000000000..a8e2fd52b
--- /dev/null
+++ b/hw/bsp/cxd56/family.c
@@ -0,0 +1,112 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright 2019 Sony Semiconductor Solutions Corporation
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include <sys/boardctl.h>
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+#endif
+
+#include <nuttx/arch.h>
+#include <arch/board/board.h>
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+// Initialize on-board peripherals : led, button, uart and USB
+void board_init(void)
+{
+  boardctl(BOARDIOC_INIT, 0);
+
+  board_gpio_write(PIN_I2S1_BCK, -1);
+  board_gpio_config(PIN_I2S1_BCK, 0, false, true, PIN_FLOAT);
+
+  board_gpio_write(PIN_HIF_IRQ_OUT, -1);
+  board_gpio_config(PIN_HIF_IRQ_OUT, 0, true, true, PIN_FLOAT);
+};
+
+void board_late_initialize(void) {
+
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+// Turn LED on or off
+void board_led_write(bool state)
+{
+  board_gpio_write(LED_PIN, state);
+}
+
+// Get the current state of button
+// a '1' means active (pressed), a '0' means inactive.
+uint32_t board_button_read(void)
+{
+  if (board_gpio_read(BUTTON_PIN))
+  {
+    return 0;
+  }
+
+  return 1;
+}
+
+// Get characters from UART
+int board_uart_read(uint8_t *buf, int len)
+{
+  int r = read(0, buf, len);
+
+  return r;
+}
+
+// Send characters to UART
+int board_uart_write(void const *buf, int len)
+{
+  int r = write(1, buf, len);
+
+  return r;
+}
+
+// Get current milliseconds
+uint32_t board_millis(void)
+{
+  struct timespec tp;
+
+    /* Wait until RTC is available */
+    while (g_rtc_enabled == false);
+
+    if (clock_gettime(CLOCK_MONOTONIC, &tp))
+    {
+        return 0;
+    }
+
+    return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
+}
diff --git a/hw/bsp/cxd56/family.cmake b/hw/bsp/cxd56/family.cmake
new file mode 100644
index 000000000..993f8f456
--- /dev/null
+++ b/hw/bsp/cxd56/family.cmake
@@ -0,0 +1,135 @@
+include_guard()
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+set(SDK_DIR ${TOP}/hw/mcu/sony/cxd56/spresense-exported-sdk)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS CXD56 CACHE INTERNAL "")
+
+# Detect platform for mkspk tool
+set(PLATFORM ${CMAKE_SYSTEM_NAME})
+if(PLATFORM STREQUAL "Darwin")
+  set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk)
+elseif(PLATFORM STREQUAL "Linux")
+  set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk)
+else()
+  set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk.exe)
+endif()
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(add_board_target BOARD_TARGET)
+  if (TARGET ${BOARD_TARGET})
+    return()
+  endif ()
+
+  set(LD_FILE_GNU ${SDK_DIR}/nuttx/scripts/ramconfig.ld)
+  set(LD_FILE_Clang ${LD_FILE_GNU})
+
+  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
+    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
+  endif ()
+
+  # Spresense uses NuttX libraries
+  add_library(${BOARD_TARGET} INTERFACE)
+
+  target_include_directories(${BOARD_TARGET} INTERFACE
+    ${SDK_DIR}/nuttx/include
+    ${SDK_DIR}/nuttx/arch
+    ${SDK_DIR}/nuttx/arch/chip
+    ${SDK_DIR}/nuttx/arch/os
+    ${SDK_DIR}/sdk/include
+  )
+
+  target_compile_definitions(${BOARD_TARGET} INTERFACE
+    CONFIG_HAVE_DOUBLE
+    main=spresense_main
+  )
+
+  target_compile_options(${BOARD_TARGET} INTERFACE
+    -pipe
+    -fno-builtin
+    -fno-strength-reduce
+    -fomit-frame-pointer
+    -Wno-error=undef
+    -Wno-error=cast-align
+    -Wno-error=unused-parameter
+    -Wno-error=shadow
+    -Wno-error=redundant-decls
+  )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${BOARD_TARGET} INTERFACE
+      "LINKER:--script=${LD_FILE_GNU}"
+      -Xlinker --entry=__start
+      -nostartfiles
+      -nodefaultlibs
+      -Wl,--gc-sections
+      -u spresense_main
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} INTERFACE
+      "LINKER:--script=${LD_FILE_Clang}"
+      -Xlinker --entry=__start
+      -nostartfiles
+      -nodefaultlibs
+      -u spresense_main
+      )
+  endif ()
+endfunction()
+
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+
+  # Board target
+  add_board_target(board_${BOARD})
+
+  #---------- Port Specific ----------
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Add TinyUSB target and port source
+  family_add_tinyusb(${TARGET} OPT_MCU_CXD56)
+  target_sources(${TARGET} PUBLIC
+    ${TOP}/src/portable/sony/cxd56/dcd_cxd56.c
+    )
+  target_link_libraries(${TARGET} PUBLIC
+    board_${BOARD}
+    ${SDK_DIR}/nuttx/libs/libapps.a
+    ${SDK_DIR}/nuttx/libs/libnuttx.a
+    gcc  # Compiler runtime support for FP operations like __aeabi_dmul
+    )
+
+  # Build mkspk tool
+  add_custom_command(OUTPUT ${MKSPK}
+    COMMAND $(MAKE) -C ${TOP}/hw/mcu/sony/cxd56/mkspk
+    COMMENT "Building mkspk tool"
+  )
+
+  # Create .spk file
+  add_custom_command(OUTPUT ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.spk
+    COMMAND ${MKSPK} -c 2 $<TARGET_FILE:${TARGET}> nuttx ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}.spk
+    DEPENDS ${TARGET} ${MKSPK}
+    COMMENT "Creating ${TARGET}.spk"
+  )
+endfunction()
diff --git a/hw/bsp/cxd56/family.mk b/hw/bsp/cxd56/family.mk
new file mode 100644
index 000000000..adfe9ee82
--- /dev/null
+++ b/hw/bsp/cxd56/family.mk
@@ -0,0 +1,70 @@
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# Platforms are: Linux, Darwin, MSYS, CYGWIN
+PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null)))
+
+ifeq ($(PLATFORM),Darwin)
+  # macOS
+  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk
+else ifeq ($(PLATFORM),Linux)
+  # Linux
+  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk
+else
+  # Cygwin/MSYS2
+  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk.exe
+endif
+
+CFLAGS += \
+	-DCONFIG_HAVE_DOUBLE \
+	-Dmain=spresense_main \
+	-pipe \
+	-std=gnu11 \
+	-fno-strength-reduce \
+	-fomit-frame-pointer \
+	-Wno-error=undef \
+	-Wno-error=cast-align \
+	-Wno-error=unused-parameter \
+	-DCFG_TUSB_MCU=OPT_MCU_CXD56 \
+
+CPU_CORE ?= cortex-m4
+
+# suppress following warnings from mcu driver
+# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
+CFLAGS += -Wno-error=shadow  -Wno-error=redundant-decls
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk
+
+SRC_C += src/portable/sony/cxd56/dcd_cxd56.c
+
+INC += \
+	$(SPRESENSE_SDK)/nuttx/include \
+	$(SPRESENSE_SDK)/nuttx/arch \
+	$(SPRESENSE_SDK)/nuttx/arch/chip \
+	$(SPRESENSE_SDK)/nuttx/arch/os \
+	$(SPRESENSE_SDK)/sdk/include \
+	$(TOP)/$(BOARD_PATH)
+
+LIBS += \
+	$(SPRESENSE_SDK)/nuttx/libs/libapps.a \
+	$(SPRESENSE_SDK)/nuttx/libs/libnuttx.a \
+
+LD_FILE = hw/mcu/sony/cxd56/spresense-exported-sdk/nuttx/scripts/ramconfig.ld
+
+LDFLAGS += \
+	-Xlinker --entry=__start \
+	-nostartfiles \
+	-nodefaultlibs \
+	-Wl,--gc-sections \
+	-u spresense_main
+
+$(MKSPK): $(BUILD)/$(PROJECT).elf
+	$(MAKE) -C $(TOP)/hw/mcu/sony/cxd56/mkspk
+
+$(BUILD)/$(PROJECT).spk: $(MKSPK)
+	@echo CREATE $@
+	@$(MKSPK) -c 2 $(BUILD)/$(PROJECT).elf nuttx $@
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
index 2e236dc4a..db410a657 100644
--- a/hw/bsp/family_support.mk
+++ b/hw/bsp/family_support.mk
@@ -64,34 +64,20 @@ BUILD := _build/$(BOARD)
 PROJECT := $(notdir $(CURDIR))
 
 #-------------------------------------------------------------
-# Board / Family
+# Family and Board
 #-------------------------------------------------------------
-
-# Board without family
-ifneq ($(wildcard $(TOP)/hw/bsp/$(BOARD)/board.mk),)
-  BOARD_PATH := hw/bsp/$(BOARD)
-  FAMILY :=
-endif
-
-# Board within family
-ifeq ($(BOARD_PATH),)
-  BOARD_PATH := $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/*/boards/$(BOARD)))
-  FAMILY := $(word 3, $(subst /, ,$(BOARD_PATH)))
-  FAMILY_PATH = hw/bsp/$(FAMILY)
-endif
+BOARD_PATH := $(subst $(TOP)/,,$(wildcard $(TOP)/hw/bsp/*/boards/$(BOARD)))
+FAMILY := $(word 3, $(subst /, ,$(BOARD_PATH)))
+FAMILY_PATH = hw/bsp/$(FAMILY)
 
 ifeq ($(BOARD_PATH),)
   $(info You must provide a BOARD parameter with 'BOARD=')
   $(error Invalid BOARD specified)
 endif
 
-ifeq ($(FAMILY),)
-  include $(TOP)/hw/bsp/$(BOARD)/board.mk
-else
-  # Include Family and Board specific defs
-  include $(TOP)/$(FAMILY_PATH)/family.mk
-  SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
-endif
+# Include Family and Board specific defs
+include $(TOP)/$(FAMILY_PATH)/family.mk
+SRC_C += $(subst $(TOP)/,,$(wildcard $(TOP)/$(FAMILY_PATH)/*.c))
 
 #-------------------------------------------------------------
 # Source files and compiler flags
diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk
index 69a546964..c29b1c70f 100644
--- a/hw/bsp/fomu/family.mk
+++ b/hw/bsp/fomu/family.mk
@@ -27,7 +27,7 @@ FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
 # flash using dfu-util
 $(BUILD)/$(PROJECT).dfu: $(BUILD)/$(PROJECT).bin
 	@echo "Create $@"
-	python $(TOP)/hw/bsp/$(BOARD)/dfu.py -b $^ -D 0x1209:0x5bf0 $@
+	python $(TOP)/$(FAMILY_PATH)/dfu.py -b $^ -D 0x1209:0x5bf0 $@
 
 flash: $(BUILD)/$(PROJECT).dfu
 	dfu-util -D $^
diff --git a/hw/bsp/spresense/board.mk b/hw/bsp/spresense/board.mk
deleted file mode 100644
index 24f39d2b6..000000000
--- a/hw/bsp/spresense/board.mk
+++ /dev/null
@@ -1,75 +0,0 @@
-# Platforms are: Linux, Darwin, MSYS, CYGWIN
-PLATFORM := $(firstword $(subst _, ,$(shell uname -s 2>/dev/null)))
-
-ifeq ($(PLATFORM),Darwin)
-  # macOS
-  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk
-else ifeq ($(PLATFORM),Linux)
-  # Linux
-  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk
-else
-  # Cygwin/MSYS2
-  MKSPK = $(TOP)/hw/mcu/sony/cxd56/mkspk/mkspk.exe
-endif
-
-SERIAL ?= /dev/ttyUSB0
-
-CFLAGS += \
-	-DCONFIG_HAVE_DOUBLE \
-	-Dmain=spresense_main \
-	-pipe \
-	-std=gnu11 \
-	-mcpu=cortex-m4 \
-	-mthumb \
-	-mfpu=fpv4-sp-d16 \
-	-mfloat-abi=hard \
-	-mabi=aapcs \
-	-fno-builtin \
-	-fno-strength-reduce \
-	-fomit-frame-pointer \
-	-Wno-error=undef \
-	-Wno-error=cast-align \
-	-Wno-error=unused-parameter \
-	-DCFG_TUSB_MCU=OPT_MCU_CXD56 \
-
-# suppress following warnings from mcu driver
-# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
-CFLAGS += -Wno-error=shadow  -Wno-error=redundant-decls
-
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
-
-SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk
-
-SRC_C += src/portable/sony/cxd56/dcd_cxd56.c
-
-INC += \
-	$(SPRESENSE_SDK)/nuttx/include \
-	$(SPRESENSE_SDK)/nuttx/arch \
-	$(SPRESENSE_SDK)/nuttx/arch/chip \
-	$(SPRESENSE_SDK)/nuttx/arch/os \
-	$(SPRESENSE_SDK)/sdk/include \
-
-LIBS += \
-	$(SPRESENSE_SDK)/nuttx/libs/libapps.a \
-	$(SPRESENSE_SDK)/nuttx/libs/libnuttx.a \
-
-LD_FILE = hw/mcu/sony/cxd56/spresense-exported-sdk/nuttx/scripts/ramconfig.ld
-
-LDFLAGS += \
-	-Xlinker --entry=__start \
-	-nostartfiles \
-	-nodefaultlibs \
-	-Wl,--gc-sections \
-	-u spresense_main
-
-$(MKSPK): $(BUILD)/$(PROJECT).elf
-	$(MAKE) -C $(TOP)/hw/mcu/sony/cxd56/mkspk
-
-$(BUILD)/$(PROJECT).spk: $(MKSPK)
-	@echo CREATE $@
-	@$(MKSPK) -c 2 $(BUILD)/$(PROJECT).elf nuttx $@
-
-# flash
-flash: $(BUILD)/$(PROJECT).spk
-	@echo FLASH $<
-	@$(PYTHON) $(TOP)/hw/mcu/sony/cxd56/tools/flash_writer.py -s -c $(SERIAL) -d -b 115200 -n $<
diff --git a/hw/bsp/spresense/board_spresense.c b/hw/bsp/spresense/board_spresense.c
deleted file mode 100644
index 8cd04a49d..000000000
--- a/hw/bsp/spresense/board_spresense.c
+++ /dev/null
@@ -1,105 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright 2019 Sony Semiconductor Solutions Corporation
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include <sys/boardctl.h>
-#include <nuttx/arch.h>
-#include <arch/board/board.h>
-#include <arch/chip/pin.h>
-
-#include "bsp/board_api.h"
-
-/*------------------------------------------------------------------*/
-/* MACRO TYPEDEF CONSTANT ENUM
- *------------------------------------------------------------------*/
-#define LED_PIN         PIN_I2S1_BCK
-
-#define BUTTON_PIN      PIN_HIF_IRQ_OUT
-
-// Initialize on-board peripherals : led, button, uart and USB
-void board_init(void)
-{
-  boardctl(BOARDIOC_INIT, 0);
-
-  board_gpio_write(PIN_I2S1_BCK, -1);
-  board_gpio_config(PIN_I2S1_BCK, 0, false, true, PIN_FLOAT);
-
-  board_gpio_write(PIN_HIF_IRQ_OUT, -1);
-  board_gpio_config(PIN_HIF_IRQ_OUT, 0, true, true, PIN_FLOAT);
-};
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-// Turn LED on or off
-void board_led_write(bool state)
-{
-  board_gpio_write(LED_PIN, state);
-}
-
-// Get the current state of button
-// a '1' means active (pressed), a '0' means inactive.
-uint32_t board_button_read(void)
-{
-  if (board_gpio_read(BUTTON_PIN))
-  {
-    return 0;
-  }
-
-  return 1;
-}
-
-// Get characters from UART
-int board_uart_read(uint8_t *buf, int len)
-{
-  int r = read(0, buf, len);
-
-  return r;
-}
-
-// Send characters to UART
-int board_uart_write(void const *buf, int len)
-{
-  int r = write(1, buf, len);
-
-  return r;
-}
-
-// Get current milliseconds
-uint32_t board_millis(void)
-{
-  struct timespec tp;
-
-    /* Wait until RTC is available */
-    while (g_rtc_enabled == false);
-
-    if (clock_gettime(CLOCK_MONOTONIC, &tp))
-    {
-        return 0;
-    }
-
-    return (((uint64_t)tp.tv_sec) * 1000 + tp.tv_nsec / 1000000);
-}
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index d0a502367..0b8ed1059 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -359,6 +359,7 @@
   #define TUP_DCD_ENDPOINT_MAX    7
   #define TUP_RHPORT_HIGHSPEED    1
   #define TUD_ENDPOINT_ONE_DIRECTION_ONLY
+  #define TUP_DCD_EDPT_ISO_ALLOC
 
 //--------------------------------------------------------------------+
 // TI
diff --git a/src/portable/sony/cxd56/dcd_cxd56.c b/src/portable/sony/cxd56/dcd_cxd56.c
index b16509c6f..a13cd152c 100644
--- a/src/portable/sony/cxd56/dcd_cxd56.c
+++ b/src/portable/sony/cxd56/dcd_cxd56.c
@@ -339,6 +339,19 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const *p_endpoint_desc)
   return true;
 }
 
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false; // TODO not implemented yet
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const *desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false; // TODO not implemented yet
+}
+
 void dcd_edpt_close_all (uint8_t rhport)
 {
   (void) rhport;
-- 
cgit v1.3.1


From 4dfac3f3566268450b46f1c19899b0b53bf48706 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Wed, 15 Oct 2025 20:37:04 +0700
Subject: Update hw/bsp/same7x/boards/same70_qmtech/board.h

Co-authored-by: Copilot <175728472+Copilot@users.noreply.github.com>
---
 hw/bsp/same7x/boards/same70_qmtech/board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.h b/hw/bsp/same7x/boards/same70_qmtech/board.h
index 09c2c93a9..0309e3e6c 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.h
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.h
@@ -46,7 +46,7 @@ extern "C" {
 #define BUTTON_PORT_CLOCK ID_PIOA
 
 #define UART_TX_PIN GPIO(GPIO_PORTB, 1)
-#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
+#define UART_TX_FUNCTION MUX_PB1D_USART1_TXD1
 #define UART_RX_PIN GPIO(GPIO_PORTB, 0)
 #define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
 #define UART_PORT_CLOCK ID_USART1
-- 
cgit v1.3.1


From 2f3b21a1e58e5c03c61e83920d77f8c27540dfd5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 16 Oct 2025 10:44:22 +0700
Subject: fix some warnings detected by pvs-studio

---
 examples/device/board_test/src/main.c              |  3 +-
 examples/device/cdc_msc/src/msc_disk.c             |  8 +++--
 examples/device/cdc_msc_freertos/src/msc_disk.c    | 30 ++++-------------
 .../device/dynamic_configuration/src/msc_disk.c    | 39 +++++-----------------
 examples/device/msc_dual_lun/src/msc_disk_dual.c   | 10 +++---
 hw/bsp/stm32h7/family.c                            |  2 +-
 src/class/cdc/cdc_device.c                         |  2 +-
 src/class/cdc/cdc_host.c                           |  1 -
 src/common/tusb_types.h                            | 22 ++++++------
 src/device/usbd.h                                  |  4 +--
 10 files changed, 42 insertions(+), 79 deletions(-)

(limited to 'hw')

diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index d91a8760e..872a97108 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -45,6 +45,7 @@ int main(void) {
 
   uint32_t start_ms = 0;
   bool led_state = false;
+  const size_t hello_len = strlen(HELLO_STR);
 
   while (1) {
     uint32_t interval_ms = board_button_read() ? BLINK_PRESSED : BLINK_UNPRESSED;
@@ -66,7 +67,7 @@ int main(void) {
         printf(HELLO_STR);
 
         #ifndef LOGGER_UART
-        board_uart_write(HELLO_STR, strlen(HELLO_STR));
+        board_uart_write(HELLO_STR, hello_len);
         #endif
       }
 
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index 96f9f19ec..6c112aa8b 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -126,9 +126,9 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uin
   const char pid[] = "Mass Storage";
   const char rev[] = "1.0";
 
-  memcpy(inquiry_resp->vendor_id, vid, strlen(vid));
-  memcpy(inquiry_resp->product_id, pid, strlen(pid));
-  memcpy(inquiry_resp->product_rev, rev, strlen(rev));
+  strncpy((char*) inquiry_resp->vendor_id, vid, 8);
+  strncpy((char*) inquiry_resp->product_id, pid, 16);
+  strncpy((char*) inquiry_resp->product_rev, rev, 4);
 
   return sizeof(scsi_inquiry_resp_t); // 36 bytes
 }
@@ -242,6 +242,8 @@ int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, u
       // negative means error -> tinyusb could stall and/or response with failed status
       return -1;
   }
+
+  return -1;
 }
 
 #endif
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index c09cf67d6..38345ca4d 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -198,9 +198,9 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t* inquiry_resp, uin
   const char pid[] = "Mass Storage";
   const char rev[] = "1.0";
 
-  memcpy(inquiry_resp->vendor_id, vid, strlen(vid));
-  memcpy(inquiry_resp->product_id, pid, strlen(pid));
-  memcpy(inquiry_resp->product_rev, rev, strlen(rev));
+  strncpy((char*) inquiry_resp->vendor_id, vid, 8);
+  strncpy((char*) inquiry_resp->product_id, pid, 16);
+  strncpy((char*) inquiry_resp->product_rev, rev, 4);
 
   return sizeof(scsi_inquiry_resp_t); // 36 bytes
 }
@@ -324,12 +324,8 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
 // - READ10 and WRITE10 has their own callbacks
 int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize) {
   // read10 & write10 has their own callback and MUST not be handled here
-
-  void const *response = NULL;
-  int32_t resplen = 0;
-
-  // most scsi handled is input
-  bool in_xfer = true;
+  (void) buffer;
+  (void) bufsize;
 
   switch (scsi_cmd[0]) {
     default:
@@ -337,22 +333,10 @@ int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer,
       tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
 
       // negative means error -> tinyusb could stall and/or response with failed status
-      resplen = -1;
-      break;
-  }
-
-  // return resplen must not larger than bufsize
-  if (resplen > bufsize) { resplen = bufsize; }
-
-  if (response && (resplen > 0)) {
-    if (in_xfer) {
-      memcpy(buffer, response, (size_t) resplen);
-    } else {
-      // SCSI output
-    }
+      return -1;
   }
 
-  return (int32_t) resplen;
+  return -1;
 }
 
 #endif
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index ebc86e260..e57f9e3f3 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -126,9 +126,9 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uin
   const char pid[] = "Mass Storage";
   const char rev[] = "1.0";
 
-  memcpy(inquiry_resp->vendor_id, vid, strlen(vid));
-  memcpy(inquiry_resp->product_id, pid, strlen(pid));
-  memcpy(inquiry_resp->product_rev, rev, strlen(rev));
+  strncpy((char*) inquiry_resp->vendor_id, vid, 8);
+  strncpy((char*) inquiry_resp->product_id, pid, 16);
+  strncpy((char*) inquiry_resp->product_rev, rev, 4);
 
   return sizeof(scsi_inquiry_resp_t); // 36 bytes
 }
@@ -211,42 +211,21 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
 // Callback invoked when received an SCSI command not in built-in list below
 // - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, MODE_SENSE6, REQUEST_SENSE
 // - READ10 and WRITE10 has their own callbacks
-int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize)
-{
+int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize) {
   // read10 & write10 has their own callback and MUST not be handled here
+  (void) buffer;
+  (void) bufsize;
 
-  void const* response = NULL;
-  int32_t resplen = 0;
-
-  // most scsi handled is input
-  bool in_xfer = true;
-
-  switch (scsi_cmd[0])
-  {
+  switch (scsi_cmd[0]) {
     default:
       // Set Sense = Invalid Command Operation
       tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
 
       // negative means error -> tinyusb could stall and/or response with failed status
-      resplen = -1;
-    break;
-  }
-
-  // return resplen must not larger than bufsize
-  if ( resplen > bufsize ) resplen = bufsize;
-
-  if ( response && (resplen > 0) )
-  {
-    if(in_xfer)
-    {
-      memcpy(buffer, response, (size_t) resplen);
-    }else
-    {
-      // SCSI output
-    }
+      return -1;
   }
 
-  return resplen;
+  return -1;
 }
 
 #endif
diff --git a/examples/device/msc_dual_lun/src/msc_disk_dual.c b/examples/device/msc_dual_lun/src/msc_disk_dual.c
index 775fa047e..694da11db 100644
--- a/examples/device/msc_dual_lun/src/msc_disk_dual.c
+++ b/examples/device/msc_dual_lun/src/msc_disk_dual.c
@@ -217,9 +217,9 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uin
   const char pid[] = "Mass Storage";
   const char rev[] = "1.0";
 
-  memcpy(inquiry_resp->vendor_id, vid, strlen(vid));
-  memcpy(inquiry_resp->product_id, pid, strlen(pid));
-  memcpy(inquiry_resp->product_rev, rev, strlen(rev));
+  strncpy((char*) inquiry_resp->vendor_id, vid, 8);
+  strncpy((char*) inquiry_resp->product_id, pid, 16);
+  strncpy((char*) inquiry_resp->product_rev, rev, 4);
 
   return sizeof(scsi_inquiry_resp_t); // 36 bytes
 }
@@ -227,9 +227,7 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uin
 // Invoked when received Test Unit Ready command.
 // return true allowing host to read/write this LUN e.g SD card inserted
 bool tud_msc_test_unit_ready_cb(uint8_t lun) {
-  if ( lun == 1 && board_button_read() ) return false;
-
-  return true; // RAM disk is always ready
+  return ( lun == 1 && board_button_read() ) ? false : true;
 }
 
 // Invoked when received SCSI_CMD_READ_CAPACITY_10 and SCSI_CMD_READ_FORMAT_CAPACITY to determine the disk size
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 382b878b7..4f80b15ff 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -131,7 +131,7 @@ void board_init(void) {
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
   // Explicitly disable systick to prevent its ISR runs before scheduler start
-  SysTick->CTRL &= ~1U;
+  SysTick->CTRL &= ~1UL;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   #ifdef USB_OTG_FS_PERIPH_BASE
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index f1c4a3bbf..577a92a52 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -533,7 +533,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
     // Check for wanted char and invoke callback if needed
     if (((signed char) p_cdc->wanted_char) != -1) {
       for (uint32_t i = 0; i < xferred_bytes; i++) {
-        if ((p_cdc->wanted_char == p_epbuf->epout[i]) && !tu_fifo_empty(&p_cdc->rx_ff)) {
+        if ((p_cdc->wanted_char == (char) p_epbuf->epout[i]) && !tu_fifo_empty(&p_cdc->rx_ff)) {
           tud_cdc_rx_wanted_cb(itf, p_cdc->wanted_char);
         }
       }
diff --git a/src/class/cdc/cdc_host.c b/src/class/cdc/cdc_host.c
index b59b0d641..3fc6a9adf 100644
--- a/src/class/cdc/cdc_host.c
+++ b/src/class/cdc/cdc_host.c
@@ -1136,7 +1136,6 @@ static inline bool ftdi_sio_reset(cdch_interface_t *p_cdc, tuh_xfer_cb_t complet
 
 // internal control complete to update state such as line state, line_coding
 static void ftdi_internal_control_complete(cdch_interface_t* p_cdc, tuh_xfer_t *xfer) {
-  TU_VERIFY(xfer->result == XFER_RESULT_SUCCESS,);
   const tusb_control_request_t * setup = xfer->setup;
   if (xfer->result == XFER_RESULT_SUCCESS) {
     if (setup->bRequest      == FTDI_SIO_SET_MODEM_CTRL_REQUEST &&
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index b3ef1e9c9..ec01bbf0f 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -100,10 +100,10 @@ typedef enum {
 } tusb_xfer_type_t;
 
 typedef enum {
-  TUSB_DIR_OUT = 0,
-  TUSB_DIR_IN  = 1,
+  TUSB_DIR_OUT = 0u,
+  TUSB_DIR_IN  = 1u,
 
-  TUSB_DIR_IN_MASK = 0x80
+  TUSB_DIR_IN_MASK = 0x80u
 } tusb_dir_t;
 
 enum {
@@ -350,7 +350,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bNumConfigurations ; ///< Number of possible configurations.
 } tusb_desc_device_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_t) == 18u, "size is not correct");
 
 // USB Binary Device Object Store (BOS) Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -360,7 +360,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bNumDeviceCaps  ; ///< Number of device capability descriptors in the BOS
 } tusb_desc_bos_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_bos_t) == 5u, "size is not correct");
 
 /// USB Configuration Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -375,7 +375,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bMaxPower           ; ///< Maximum power consumption of the USB device from the bus in this specific configuration when the device is fully operational. Expressed in 2 mA units (i.e., 50 = 100 mA).
 } tusb_desc_configuration_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_configuration_t) == 9u, "size is not correct");
 
 /// USB Interface Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -391,7 +391,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  iInterface         ; ///< Index of string descriptor describing this interface
 } tusb_desc_interface_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_interface_t) == 9u, "size is not correct");
 
 /// USB Endpoint Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -411,7 +411,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bInterval        ; // Polling interval, in frames or microframes depending on the operating speed
 } tusb_desc_endpoint_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_endpoint_t) == 7u, "size is not correct");
 
 /// USB Other Speed Configuration Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -441,7 +441,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t  bReserved          ; ///< Reserved for future use, must be zero
 } tusb_desc_device_qualifier_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_device_qualifier_t) == 10u, "size is not correct");
 
 /// USB Interface Association Descriptor (IAD ECN)
 typedef struct TU_ATTR_PACKED {
@@ -458,7 +458,7 @@ typedef struct TU_ATTR_PACKED {
   uint8_t iFunction         ; ///< Index of the string descriptor describing the interface association.
 } tusb_desc_interface_assoc_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_desc_interface_assoc_t) == 8u, "size is not correct");
 
 // USB String Descriptor
 typedef struct TU_ATTR_PACKED {
@@ -528,7 +528,7 @@ typedef struct TU_ATTR_PACKED {
   uint16_t wLength;
 } tusb_control_request_t;
 
-TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8, "size is not correct");
+TU_VERIFY_STATIC( sizeof(tusb_control_request_t) == 8u, "size is not correct");
 
 TU_ATTR_PACKED_END  // End of all packed definitions
 TU_ATTR_BIT_FIELD_ORDER_END
diff --git a/src/device/usbd.h b/src/device/usbd.h
index a4104e47d..c62986150 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -299,7 +299,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
 #define TUD_HID_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epin, _epsize, _ep_interval) \
   /* Interface */\
-  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 1, TUSB_CLASS_HID, (uint8_t)((_boot_protocol != HID_ITF_PROTOCOL_NONE) ? (uint8_t)HID_SUBCLASS_BOOT : 0u), _boot_protocol, _stridx,\
   /* HID descriptor */\
   9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
   /* Endpoint In */\
@@ -312,7 +312,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 // Interface number, string index, protocol, report descriptor len, EP OUT & IN address, size & polling interval
 #define TUD_HID_INOUT_DESCRIPTOR(_itfnum, _stridx, _boot_protocol, _report_desc_len, _epout, _epin, _epsize, _ep_interval) \
   /* Interface */\
-  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_HID, (uint8_t)((_boot_protocol) ? (uint8_t)HID_SUBCLASS_BOOT : 0), _boot_protocol, _stridx,\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_HID, (uint8_t)((_boot_protocol != HID_ITF_PROTOCOL_NONE) ? (uint8_t)HID_SUBCLASS_BOOT : 0u), _boot_protocol, _stridx,\
   /* HID descriptor */\
   9, HID_DESC_TYPE_HID, U16_TO_U8S_LE(0x0111), 0, 1, HID_DESC_TYPE_REPORT, U16_TO_U8S_LE(_report_desc_len),\
   /* Endpoint Out */\
-- 
cgit v1.3.1


From c8a1b757f05be044d121a655b6e1a5ac3b52ee14 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Oct 2025 16:54:15 +0700
Subject: refactor family.cmake: rename add_board_target() to
 family_add_board() and move it to family_configure_common() also move startup
 and linker from board target to actual exe

---
 examples/device/board_test/src/main.c           |   5 +-
 hw/bsp/at32f402_405/family.cmake                |  85 +++++-------
 hw/bsp/at32f403a_407/family.cmake               |  80 +++++------
 hw/bsp/at32f413/family.cmake                    |  81 +++++------
 hw/bsp/at32f415/family.cmake                    |  85 +++++-------
 hw/bsp/at32f423/family.cmake                    |  85 +++++-------
 hw/bsp/at32f425/family.cmake                    |  85 +++++-------
 hw/bsp/at32f435_437/family.cmake                |  85 +++++-------
 hw/bsp/broadcom_32bit/family.cmake              |  92 +++++--------
 hw/bsp/broadcom_64bit/family.cmake              |  94 +++++--------
 hw/bsp/ch32v10x/family.cmake                    |  91 +++++--------
 hw/bsp/ch32v20x/family.cmake                    |  91 ++++++-------
 hw/bsp/ch32v30x/family.cmake                    |  78 +++++------
 hw/bsp/cxd56/family.cmake                       |  81 +++++------
 hw/bsp/da1469x/family.cmake                     |  89 +++++-------
 hw/bsp/efm32/family.cmake                       |  80 +++++------
 hw/bsp/f1c100s/family.cmake                     | 101 +++++++-------
 hw/bsp/family_support.cmake                     |  53 ++++++--
 hw/bsp/fomu/family.cmake                        |  88 +++++-------
 hw/bsp/gd32vf103/family.cmake                   |  93 +++++--------
 hw/bsp/imxrt/family.cmake                       |  94 ++++++-------
 hw/bsp/kinetis_k/family.cmake                   |  84 +++++-------
 hw/bsp/kinetis_k32l2/family.cmake               |  84 +++++-------
 hw/bsp/kinetis_kl/family.cmake                  |  77 ++++-------
 hw/bsp/lpc11/family.cmake                       |  60 ++++----
 hw/bsp/lpc13/family.cmake                       |   9 +-
 hw/bsp/lpc15/family.cmake                       |   9 +-
 hw/bsp/lpc17/family.cmake                       |   9 +-
 hw/bsp/lpc18/family.cmake                       |   9 +-
 hw/bsp/lpc40/family.cmake                       |   9 +-
 hw/bsp/lpc43/family.cmake                       |  79 +++++------
 hw/bsp/lpc51/family.cmake                       |  88 +++++-------
 hw/bsp/lpc54/family.cmake                       |  94 +++++--------
 hw/bsp/lpc55/family.cmake                       |  95 ++++++-------
 hw/bsp/maxim/family.cmake                       |  83 +++++-------
 hw/bsp/mcx/family.cmake                         | 110 ++++++---------
 hw/bsp/mm32/family.cmake                        |  82 +++++------
 hw/bsp/msp430/family.cmake                      |  40 ++----
 hw/bsp/msp432e4/family.cmake                    |  90 +++++-------
 hw/bsp/nrf/family.cmake                         | 108 +++++++--------
 hw/bsp/nuc100_120/family.cmake                  |  67 +++++----
 hw/bsp/nuc121_125/family.cmake                  |  70 ++++------
 hw/bsp/nuc126/family.cmake                      |  67 ++++-----
 hw/bsp/nuc505/family.cmake                      |  64 ++++-----
 hw/bsp/ra/family.cmake                          | 173 ++++++++++--------------
 hw/bsp/samd11/family.cmake                      |  74 ++++------
 hw/bsp/samd2x_l2x/family.cmake                  |  92 +++++--------
 hw/bsp/samd5x_e5x/family.cmake                  |  74 ++++------
 hw/bsp/same7x/boards/same70_qmtech/board.h      |   2 +-
 hw/bsp/same7x/family.cmake                      |  79 ++++-------
 hw/bsp/samg/family.cmake                        |  75 ++++------
 hw/bsp/stm32c0/family.cmake                     |  84 +++++-------
 hw/bsp/stm32f0/family.cmake                     |  82 +++++------
 hw/bsp/stm32f1/family.cmake                     |  88 +++++-------
 hw/bsp/stm32f2/family.cmake                     |  92 +++++--------
 hw/bsp/stm32f3/family.cmake                     |  82 +++++------
 hw/bsp/stm32f4/family.cmake                     |  86 +++++-------
 hw/bsp/stm32f7/family.cmake                     |  86 +++++-------
 hw/bsp/stm32g0/family.cmake                     |  86 +++++-------
 hw/bsp/stm32g4/family.cmake                     |  84 +++++-------
 hw/bsp/stm32h5/family.cmake                     |  88 +++++-------
 hw/bsp/stm32h7/boards/stm32h743eval/board.cmake |   2 +-
 hw/bsp/stm32h7/family.cmake                     |  82 ++++-------
 hw/bsp/stm32h7rs/family.cmake                   |  98 ++++++--------
 hw/bsp/stm32l0/family.cmake                     |  82 +++++------
 hw/bsp/stm32l4/family.cmake                     |  90 +++++-------
 hw/bsp/stm32n6/family.cmake                     |  98 ++++++--------
 hw/bsp/stm32u0/family.cmake                     |  94 ++++++-------
 hw/bsp/stm32u5/family.cmake                     |  97 ++++++-------
 hw/bsp/stm32wb/family.cmake                     |  90 +++++-------
 hw/bsp/stm32wba/family.cmake                    | 100 ++++++--------
 hw/bsp/tm4c/family.cmake                        |  76 +++++------
 hw/bsp/xmc4000/family.cmake                     |  77 ++++-------
 73 files changed, 2253 insertions(+), 3363 deletions(-)

(limited to 'hw')

diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 872a97108..ee0829e5b 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -45,7 +45,6 @@ int main(void) {
 
   uint32_t start_ms = 0;
   bool led_state = false;
-  const size_t hello_len = strlen(HELLO_STR);
 
   while (1) {
     uint32_t interval_ms = board_button_read() ? BLINK_PRESSED : BLINK_UNPRESSED;
@@ -67,12 +66,12 @@ int main(void) {
         printf(HELLO_STR);
 
         #ifndef LOGGER_UART
-        board_uart_write(HELLO_STR, hello_len);
+        board_uart_write(HELLO_STR, sizeof(HELLO_STR)-1);
         #endif
       }
 
       board_led_write(led_state);
-      led_state = 1 - led_state; // toggle
+      led_state = !led_state; // toggle
     }
   }
 }
diff --git a/hw/bsp/at32f402_405/family.cmake b/hw/bsp/at32f402_405/family.cmake
index b10760cef..113bc0305 100644
--- a/hw/bsp/at32f402_405/family.cmake
+++ b/hw/bsp/at32f402_405/family.cmake
@@ -32,25 +32,21 @@ if (NOT DEFINED RHPORT_HOST_SPEED)
 endif ()
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
@@ -58,7 +54,6 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -74,59 +69,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f403a_407/family.cmake b/hw/bsp/at32f403a_407/family.cmake
index ae4037088..5f539228d 100644
--- a/hw/bsp/at32f403a_407/family.cmake
+++ b/hw/bsp/at32f403a_407/family.cmake
@@ -15,25 +15,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
@@ -41,7 +37,6 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -51,57 +46,46 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f413/family.cmake b/hw/bsp/at32f413/family.cmake
index b534bcbbc..d62964730 100644
--- a/hw/bsp/at32f413/family.cmake
+++ b/hw/bsp/at32f413/family.cmake
@@ -15,25 +15,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
@@ -41,7 +37,6 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -51,56 +46,46 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f415/family.cmake b/hw/bsp/at32f415/family.cmake
index 8ac946265..35fad5a87 100644
--- a/hw/bsp/at32f415/family.cmake
+++ b/hw/bsp/at32f415/family.cmake
@@ -15,32 +15,27 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_misc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -49,58 +44,48 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/inc
     )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f423/family.cmake b/hw/bsp/at32f423/family.cmake
index 17c3f37a2..36c0466de 100644
--- a/hw/bsp/at32f423/family.cmake
+++ b/hw/bsp/at32f423/family.cmake
@@ -15,25 +15,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
@@ -41,7 +37,6 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -51,58 +46,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f425/family.cmake b/hw/bsp/at32f425/family.cmake
index 3f6b36a6b..176595e12 100644
--- a/hw/bsp/at32f425/family.cmake
+++ b/hw/bsp/at32f425/family.cmake
@@ -15,32 +15,27 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_misc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -49,58 +44,48 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/inc
     )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f435_437/family.cmake b/hw/bsp/at32f435_437/family.cmake
index 085e5462b..bdc7292d5 100644
--- a/hw/bsp/at32f435_437/family.cmake
+++ b/hw/bsp/at32f435_437/family.cmake
@@ -15,25 +15,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
@@ -42,7 +38,6 @@ function(add_board_target BOARD_TARGET)
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
     ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_exint.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -58,58 +53,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/broadcom_32bit/family.cmake b/hw/bsp/broadcom_32bit/family.cmake
index 1ec54b06f..d681e4426 100644
--- a/hw/bsp/broadcom_32bit/family.cmake
+++ b/hw/bsp/broadcom_32bit/family.cmake
@@ -10,24 +10,20 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 
 set(FAMILY_MCUS BCM2835 CACHE INTERNAL "")
 
-
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/broadcom/link.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/broadcom/boot.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/broadcom/link.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/broadcom/boot.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/broadcom/gen/interrupt_handlers.c
     ${SDK_DIR}/broadcom/gpio.c
@@ -35,7 +31,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/broadcom/mmu.c
     ${SDK_DIR}/broadcom/caches.c
     ${SDK_DIR}/broadcom/vcmailbox.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_compile_options(${BOARD_TARGET} PUBLIC
     -O0
@@ -49,65 +44,52 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      "LINKER:--entry=_start"
-      --specs=nosys.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      "LINKER:--entry=_start"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_BCM2835)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_BCM2835)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      "LINKER:--entry=_start"
+      --specs=nosys.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      "LINKER:--entry=_start"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/broadcom_64bit/family.cmake b/hw/bsp/broadcom_64bit/family.cmake
index e87aaa3a4..1be5c95eb 100644
--- a/hw/bsp/broadcom_64bit/family.cmake
+++ b/hw/bsp/broadcom_64bit/family.cmake
@@ -11,24 +11,20 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/aarch64_${
 
 set(FAMILY_MCUS BCM2711 BCM2835 CACHE INTERNAL "")
 
-
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/broadcom/link8.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/broadcom/boot8.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/broadcom/link8.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/broadcom/boot8.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/broadcom/gen/interrupt_handlers.c
     ${SDK_DIR}/broadcom/gpio.c
@@ -36,7 +32,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/broadcom/mmu.c
     ${SDK_DIR}/broadcom/caches.c
     ${SDK_DIR}/broadcom/vcmailbox.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_compile_options(${BOARD_TARGET} PUBLIC
     -O0
@@ -54,67 +49,52 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-#    target_compile_options(${BOARD_TARGET} PUBLIC
-#      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      "LINKER:--entry=_start"
-      --specs=nosys.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      "LINKER:--entry=_start"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_BCM${BCM_VERSION})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_BCM${BCM_VERSION})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      "LINKER:--entry=_start"
+      --specs=nosys.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      "LINKER:--entry=_start"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/ch32v10x/family.cmake b/hw/bsp/ch32v10x/family.cmake
index a73898050..1c9d41740 100644
--- a/hw/bsp/ch32v10x/family.cmake
+++ b/hw/bsp/ch32v10x/family.cmake
@@ -16,24 +16,21 @@ set(FAMILY_MCUS CH32V103 CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${CH32_FAMILY}.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${CH32_FAMILY}.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_SRC_DIR}/Core/core_riscv.c
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_gpio.c
@@ -41,76 +38,58 @@ function(add_board_target BOARD_TARGET)
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_rcc.c
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_usart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_SRC_DIR}/Core
     ${SDK_SRC_DIR}/Peripheral/inc
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    )
 
   update_board(${BOARD_TARGET})
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -mcmodel=medany
-      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
-      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_compile_options(${TARGET} PUBLIC -mcmodel=medany)
+  endif()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH32V103)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_CH32V103)
-
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
+      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
-
-  #family_add_uf2(${TARGET} ${UF2_FAMILY_ID})
   #family_flash_uf2(${TARGET} ${UF2_FAMILY_ID})
 endfunction()
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index 10044d5b3..1ce83bed9 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -24,24 +24,21 @@ endif ()
 set(RHPORT_HOST 1)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${CH32_FAMILY}.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_${MCU_VARIANT}.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${CH32_FAMILY}.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_${MCU_VARIANT}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_SRC_DIR}/Core/core_riscv.c
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_flash.c
@@ -50,7 +47,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_rcc.c
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_usart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_SRC_DIR}/Core
@@ -79,65 +75,54 @@ function(add_board_target BOARD_TARGET)
       )
   endif()
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -mcmodel=medany
-      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
-      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for CH32v")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_compile_options(${TARGET} PUBLIC -mcmodel=medany)
+  endif()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH32V20X)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
+    ${TOP}/src/portable/wch/hcd_ch32_usbfs.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_CH32V20X)
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
+      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
-    ${TOP}/src/portable/wch/hcd_ch32_usbfs.c
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
   family_flash_wlink_rs(${TARGET})
-
-  #family_add_uf2(${TARGET} ${UF2_FAMILY_ID})
   #family_flash_uf2(${TARGET} ${UF2_FAMILY_ID})
 endfunction()
diff --git a/hw/bsp/ch32v30x/family.cmake b/hw/bsp/ch32v30x/family.cmake
index 0fd9b786a..cbf86334e 100644
--- a/hw/bsp/ch32v30x/family.cmake
+++ b/hw/bsp/ch32v30x/family.cmake
@@ -20,24 +20,21 @@ if (NOT DEFINED SPEED)
 endif()
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/ch32v30x.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_D8C.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/ch32v30x.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_${CH32_FAMILY}_D8C.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_SRC_DIR}/Core/core_riscv.c
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_gpio.c
@@ -46,7 +43,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_SRC_DIR}/Peripheral/src/${CH32_FAMILY}_usart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${CH32_FAMILY}_it.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_SRC_DIR}/Core
@@ -73,55 +69,47 @@ function(add_board_target BOARD_TARGET)
       -fmessage-length=0
       -fsigned-char
       )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
-      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for CH32v")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH32V307)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbhs.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_CH32V307)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/wch/dcd_ch32_usbhs.c
-    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
+      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
diff --git a/hw/bsp/cxd56/family.cmake b/hw/bsp/cxd56/family.cmake
index 993f8f456..6cfe04d93 100644
--- a/hw/bsp/cxd56/family.cmake
+++ b/hw/bsp/cxd56/family.cmake
@@ -12,30 +12,24 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS CXD56 CACHE INTERNAL "")
 
 # Detect platform for mkspk tool
-set(PLATFORM ${CMAKE_SYSTEM_NAME})
-if(PLATFORM STREQUAL "Darwin")
+if(CMAKE_HOST_SYSTEM_NAME STREQUAL "Darwin")
   set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk)
-elseif(PLATFORM STREQUAL "Linux")
+elseif(CMAKE_HOST_SYSTEM_NAME STREQUAL "Linux")
   set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk)
 else()
   set(MKSPK ${TOP}/hw/mcu/sony/cxd56/mkspk/mkspk.exe)
 endif()
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_GNU ${SDK_DIR}/nuttx/scripts/ramconfig.ld)
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
+set(LD_FILE_GNU ${SDK_DIR}/nuttx/scripts/ramconfig.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
 
+#------------------------------------
+# BOARD Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   # Spresense uses NuttX libraries
   add_library(${BOARD_TARGET} INTERFACE)
 
@@ -54,6 +48,7 @@ function(add_board_target BOARD_TARGET)
 
   target_compile_options(${BOARD_TARGET} INTERFACE
     -pipe
+    -std=gnu11
     -fno-builtin
     -fno-strength-reduce
     -fomit-frame-pointer
@@ -65,42 +60,20 @@ function(add_board_target BOARD_TARGET)
   )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} INTERFACE
-      "LINKER:--script=${LD_FILE_GNU}"
-      -Xlinker --entry=__start
-      -nostartfiles
-      -nodefaultlibs
-      -Wl,--gc-sections
-      -u spresense_main
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} INTERFACE
-      "LINKER:--script=${LD_FILE_Clang}"
-      -Xlinker --entry=__start
-      -nostartfiles
-      -nodefaultlibs
-      -u spresense_main
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CXD56)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/sony/cxd56/dcd_cxd56.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -108,18 +81,34 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_CXD56)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/sony/cxd56/dcd_cxd56.c
-    )
   target_link_libraries(${TARGET} PUBLIC
-    board_${BOARD}
     ${SDK_DIR}/nuttx/libs/libapps.a
     ${SDK_DIR}/nuttx/libs/libnuttx.a
     gcc  # Compiler runtime support for FP operations like __aeabi_dmul
     )
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -Xlinker --entry=__start
+      -nostartfiles
+      -nodefaultlibs
+      -Wl,--gc-sections
+      -u spresense_main
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      -Xlinker --entry=__start
+      -nostartfiles
+      -nodefaultlibs
+      -u spresense_main
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+
   # Build mkspk tool
   add_custom_command(OUTPUT ${MKSPK}
     COMMAND $(MAKE) -C ${TOP}/hw/mcu/sony/cxd56/mkspk
diff --git a/hw/bsp/da1469x/family.cmake b/hw/bsp/da1469x/family.cmake
index b5bec52c8..473db6531 100644
--- a/hw/bsp/da1469x/family.cmake
+++ b/hw/bsp/da1469x/family.cmake
@@ -10,28 +10,24 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS DA1469X CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/da1469x.ld)
-  endif ()
-
-  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-    set(STARTUP_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/gcc_startup_da1469x.S)
-    set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  endif ()
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/da1469x.ld)
+endif ()
+if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
+set(STARTUP_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/gcc_startup_da1469x.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+endif ()
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${MCU_DIR}/src/system_da1469x.c
     ${MCU_DIR}/src/da1469x_clock.c
     ${MCU_DIR}/src/hal_gpio.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_compile_options(${BOARD_TARGET} PUBLIC -mthumb-interwork)
   target_compile_definitions(${BOARD_TARGET} PUBLIC
@@ -46,31 +42,11 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_DIR}/mdk
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_DIR}/mdk
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
-
 function(family_flash_jlink_dialog TARGET)
   set(JLINKEXE JLinkExe)
   set(JLINK_IF swd)
@@ -107,38 +83,41 @@ endfunction()
 
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_DA1469X)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/dialog/da146xx/dcd_da146xx.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_DA1469X)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/dialog/da146xx/dcd_da146xx.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink_dialog(${TARGET})
diff --git a/hw/bsp/efm32/family.cmake b/hw/bsp/efm32/family.cmake
index f5afd6fe4..36d88f071 100644
--- a/hw/bsp/efm32/family.cmake
+++ b/hw/bsp/efm32/family.cmake
@@ -15,27 +15,19 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS EFM32GG CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_GNU ${SILABS_CMSIS}/Source/GCC/${EFM32_FAMILY}.ld)
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SILABS_CMSIS}/Source/GCC/startup_${EFM32_FAMILY}.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_GNU ${SILABS_CMSIS}/Source/GCC/${EFM32_FAMILY}.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SILABS_CMSIS}/Source/GCC/startup_${EFM32_FAMILY}.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SILABS_CMSIS}/Source/system_${EFM32_FAMILY}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
 
   target_include_directories(${BOARD_TARGET} PUBLIC
@@ -50,57 +42,47 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_EFM32GG)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_EFM32GG)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/f1c100s/family.cmake b/hw/bsp/f1c100s/family.cmake
index 211c6645c..78fc3c6c7 100644
--- a/hw/bsp/f1c100s/family.cmake
+++ b/hw/bsp/f1c100s/family.cmake
@@ -11,25 +11,21 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS F1C100S CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # LD_FILE and STARTUP_FILE can be defined in board.cmake
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/f1c100s.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/machine/start.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/f1c100s.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/machine/start.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/lib/malloc.c
     ${SDK_DIR}/lib/printf.c
@@ -43,71 +39,68 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/machine/sys-mmu.c
     ${SDK_DIR}/machine/sys-spi-flash.c
     ${SDK_DIR}/machine/f1c100s-intc.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __ARM32_ARCH__=5
+    __ARM926EJS__
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -ffreestanding
+    -std=gnu99
+    -mno-thumb-interwork
+    -Wno-float-equal
+    -Wno-unused-parameter
+    -Wno-error=array-bounds
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/include
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -lgcc
-      --specs=nosys.specs --specs=nano.specs
-      "LINKER:--defsym=__bss_end__=__bss_end"
-      "LINKER:--defsym=__bss_start__=__bss_start"
-      "LINKER:--defsym=end=__bss_end"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_F1C100S)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/sunxi/dcd_sunxi_musb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_F1C100S)
-  target_sources(${TARGET} PRIVATE
-    ${TOP}/src/portable/sunxi/dcd_sunxi_musb.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_libraries(${TARGET} PUBLIC
+      gcc
+      )
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      "LINKER:--defsym=__bss_end__=__bss_end"
+      "LINKER:--defsym=__bss_start__=__bss_start"
+      "LINKER:--defsym=end=__bss_end"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 23f63e759..7df1b154a 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -2,6 +2,7 @@ include_guard(GLOBAL)
 
 include(CMakePrintHelpers)
 set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
+#set(CMAKE_C_STANDARD 11)
 
 # TOP is path to root directory
 set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
@@ -13,19 +14,25 @@ set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
 # Toolchain
 # Can be changed via -DTOOLCHAIN=gcc|iar or -DCMAKE_C_COMPILER=
 #-------------------------------------------------------------
-# Detect toolchain based on CMAKE_C_COMPILER
-if (DEFINED CMAKE_C_COMPILER)
-  string(FIND ${CMAKE_C_COMPILER} "iccarm" IS_IAR)
-  string(FIND ${CMAKE_C_COMPILER} "clang" IS_CLANG)
-  string(FIND ${CMAKE_C_COMPILER} "gcc" IS_GCC)
+function(detect_compiler COMPILER_PATH RESULT)
+  string(FIND ${COMPILER_PATH} "iccarm" IS_IAR)
+  string(FIND ${COMPILER_PATH} "clang" IS_CLANG)
+  string(FIND ${COMPILER_PATH} "gcc" IS_GCC)
 
   if (NOT IS_IAR EQUAL -1)
-    set(TOOLCHAIN iar)
+    set(${RESULT} iar PARENT_SCOPE)
   elseif (NOT IS_CLANG EQUAL -1)
-    set(TOOLCHAIN clang)
+    set(${RESULT} clang PARENT_SCOPE)
   elseif (NOT IS_GCC EQUAL -1)
-    set(TOOLCHAIN gcc)
+    set(${RESULT} gcc PARENT_SCOPE)
   endif ()
+endfunction()
+
+# Detect toolchain based on CMAKE_C_COMPILER or ENV{CC}
+if (DEFINED CMAKE_C_COMPILER)
+  detect_compiler(${CMAKE_C_COMPILER} TOOLCHAIN)
+elseif (DEFINED ENV{CC})
+  detect_compiler($ENV{CC} TOOLCHAIN)
 endif ()
 
 if (NOT DEFINED TOOLCHAIN)
@@ -198,6 +205,9 @@ endfunction()
 # Common Target Configure
 # Most families use these settings except rp2040 and espressif
 #-------------------------------------------------------------
+function(family_add_board BOARD_TARGET)
+  # empty function, should be redefined in FAMILY/family.cmake
+endfunction()
 
 # Add RTOS to example
 function(family_add_rtos TARGET RTOS)
@@ -223,6 +233,17 @@ endfunction()
 
 # Add common configuration to example
 function(family_configure_common TARGET RTOS)
+  # Add board target
+  set(BOARD_TARGET board_${BOARD})
+  if (NOT RTOS STREQUAL zephyr)
+    if (NOT TARGET ${BOARD_TARGET})
+      family_add_board(${BOARD_TARGET})
+      set_target_properties(${BOARD_TARGET} PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib)
+      set_target_properties(${BOARD_TARGET} PROPERTIES SKIP_LINTING ON)
+    endif ()
+    target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET})
+  endif ()
+
   family_add_rtos(${TARGET} ${RTOS})
 
   # Add BOARD_${BOARD} define
@@ -252,6 +273,9 @@ function(family_configure_common TARGET RTOS)
       target_sources(${TARGET} PUBLIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
       target_include_directories(${TARGET}  PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
 #      target_compile_definitions(${TARGET}  PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
+      set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c PROPERTIES
+        SKIP_LINTING ON
+        )
     endif ()
   else ()
     target_compile_definitions(${TARGET} PUBLIC LOGGER_UART)
@@ -266,6 +290,19 @@ function(family_configure_common TARGET RTOS)
     endif ()
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC "LINKER:--map=$<TARGET_FILE:${TARGET}>.map")
+
+    # link time analysis with C-STAT
+#    add_custom_command(TARGET ${TARGET} POST_BUILD
+#      COMMAND ${CMAKE_C_ICSTAT}
+#      --db=${CMAKE_BINARY_DIR}/cstat.db
+#      link_analyze -- ${CMAKE_LINKER} $<TARGET_OBJECTS:${TARGET}>
+#      COMMAND_EXPAND_LISTS
+#      )
+#    # generate C-STAT report
+#    add_custom_command(TARGET ${TARGET} POST_BUILD
+#      COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
+#      COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/${TARGET}.html
+#      )
   endif ()
 
   # run size after build
diff --git a/hw/bsp/fomu/family.cmake b/hw/bsp/fomu/family.cmake
index 0c7eae90e..18290d437 100644
--- a/hw/bsp/fomu/family.cmake
+++ b/hw/bsp/fomu/family.cmake
@@ -10,85 +10,67 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TO
 set(FAMILY_MCUS VALENTYUSB_EPTRI CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/fomu.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/crt0-vexriscv.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/fomu.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/crt0-vexriscv.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-  add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} INTERFACE)
+  target_include_directories(${BOARD_TARGET} INTERFACE
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/include
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_VALENTYUSB_EPTRI)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/valentyusb/eptri/dcd_eptri.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_VALENTYUSB_EPTRI)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/valentyusb/eptri/dcd_eptri.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
 endfunction()
diff --git a/hw/bsp/gd32vf103/family.cmake b/hw/bsp/gd32vf103/family.cmake
index 4f5a945e8..c96882a75 100644
--- a/hw/bsp/gd32vf103/family.cmake
+++ b/hw/bsp/gd32vf103/family.cmake
@@ -15,34 +15,30 @@ set(FAMILY_MCUS GD32VF103 CACHE INTERNAL "")
 set(JLINK_IF jtag)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    message(FATAL_ERROR "LD_FILE_GNU is not defined")
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU
-      ${SOC_DIR}/Common/Source/GCC/startup_gd32vf103.S
-      ${SOC_DIR}/Common/Source/GCC/intexc_gd32vf103.S
-      )
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+message(FATAL_ERROR "LD_FILE_GNU is not defined")
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU
+${SOC_DIR}/Common/Source/GCC/startup_gd32vf103.S
+${SOC_DIR}/Common/Source/GCC/intexc_gd32vf103.S
+)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_gd32vf103.c
     ${SOC_DIR}/Common/Source/Drivers/gd32vf103_rcu.c
     ${SOC_DIR}/Common/Source/Drivers/gd32vf103_gpio.c
     ${SOC_DIR}/Common/Source/Drivers/Usb/gd32vf103_usb_hw.c
     ${SOC_DIR}/Common/Source/Drivers/gd32vf103_usart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/NMSIS/Core/Include
@@ -61,33 +57,17 @@ function(add_board_target BOARD_TARGET)
       -mcmodel=medlow
       -mstrict-align
       )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
   endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_GD32VF103)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${SOC_DIR}/Common/Source/Stubs/sbrk.c
@@ -96,37 +76,32 @@ function(family_configure_example TARGET RTOS)
     ${SOC_DIR}/Common/Source/Stubs/fstat.c
     ${SOC_DIR}/Common/Source/Stubs/lseek.c
     ${SOC_DIR}/Common/Source/Stubs/read.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-      ${SOC_DIR}/Common/Source/Stubs/sbrk.c
-      ${SOC_DIR}/Common/Source/Stubs/close.c
-      ${SOC_DIR}/Common/Source/Stubs/isatty.c
-      ${SOC_DIR}/Common/Source/Stubs/fstat.c
-      ${SOC_DIR}/Common/Source/Stubs/lseek.c
-      ${SOC_DIR}/Common/Source/Stubs/read.c
-      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_GD32VF103)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 37acab06d..7e21dd946 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -16,29 +16,25 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # LD_FILE and STARTUP_FILE can be defined in board.cmake
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.ld)
-    set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.icf)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED LD_FILE_IAR)
+set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.icf)
+endif ()
 
-  if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
-    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT_WITH_CORE}.S)
-    set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/startup_${MCU_VARIANT_WITH_CORE}.s)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT_WITH_CORE}.S)
+set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/startup_${MCU_VARIANT_WITH_CORE}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/pin_mux.c
     ${SDK_DIR}/drivers/common/fsl_common.c
@@ -88,9 +84,31 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       -nostartfiles
       --specs=nosys.specs --specs=nano.specs
@@ -99,52 +117,22 @@ function(add_board_target BOARD_TARGET)
       -Wl,-ug_boot_data
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       -Wl,-uimage_vector_table
       -Wl,-ug_boot_data
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-endfunction()
-
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
-  target_sources(${TARGET} PRIVATE
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/kinetis_k/family.cmake b/hw/bsp/kinetis_k/family.cmake
index 426004b4e..2ec5522d3 100644
--- a/hw/bsp/kinetis_k/family.cmake
+++ b/hw/bsp/kinetis_k/family.cmake
@@ -18,21 +18,17 @@ set(FAMILY_MCUS KINETIS_K CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # LD_FILE and STARTUP_FILE can be defined in board.cmake
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${SDK_DIR}/drivers/gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/uart/fsl_uart.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -54,67 +50,51 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
-    ${TOP}/src/portable/nxp/khci/hcd_khci.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-
-  if (DEFINED TEENSY_MCU)
-    family_flash_teensy(${TARGET})
-  endif ()
+  family_flash_teensy(${TARGET})
 endfunction()
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
index 8e1b25a95..022ddb424 100644
--- a/hw/bsp/kinetis_k32l2/family.cmake
+++ b/hw/bsp/kinetis_k32l2/family.cmake
@@ -14,21 +14,17 @@ set(FAMILY_MCUS KINETIS_K32L CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # LD_FILE and STARTUP_FILE can be defined in board.cmake
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${SDK_DIR}/drivers/gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
@@ -49,67 +45,51 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K32L)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/khci/dcd_khci.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K32L)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/khci/dcd_khci.c
-    ${TOP}/src/portable/nxp/khci/hcd_khci.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_flash_jlink(${TARGET})
   family_add_bin_hex(${TARGET})
-
-  if (DEFINED TEENSY_MCU)
-    family_flash_teensy(${TARGET})
-  endif ()
+  family_flash_teensy(${TARGET})
 endfunction()
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 335e67375..2640652ab 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -18,20 +18,16 @@ set(FAMILY_MCUS KINETIS_KL CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # LD_FILE and STARTUP_FILE can be defined in board.cmake
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${SDK_DIR}/drivers/gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/lpsci/fsl_lpsci.c
     ${SDK_DIR}/drivers/uart/fsl_uart.c
@@ -53,62 +49,49 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/drivers/uart
     )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_KL)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/chipidea/ci_fs/dcd_ci_fs.c
-    ${TOP}/src/portable/nxp/khci/hcd_khci.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc11/family.cmake b/hw/bsp/lpc11/family.cmake
index 6781b20c6..506d76ed0 100644
--- a/hw/bsp/lpc11/family.cmake
+++ b/hw/bsp/lpc11/family.cmake
@@ -21,13 +21,9 @@ set(FAMILY_MCUS LPC11UXX CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
+
     ${SDK_DIR}/src/chip_${LPC_FAMILY}.c
     ${SDK_DIR}/src/clock_${LPC_FAMILY}.c
     ${SDK_DIR}/src/iap.c
@@ -47,25 +43,6 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -nostdlib
-      -Wno-error=incompatible-pointer-types
-      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
 
@@ -74,16 +51,15 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC11UXX)
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
@@ -92,14 +68,24 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC11UXX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${TARGET} PUBLIC
+      -nostdlib
+      -Wno-error=incompatible-pointer-types
+      )
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${BOARD_TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/lpc13/family.cmake b/hw/bsp/lpc13/family.cmake
index 4ced216cb..5e6470b5f 100644
--- a/hw/bsp/lpc13/family.cmake
+++ b/hw/bsp/lpc13/family.cmake
@@ -18,11 +18,7 @@ set(FAMILY_MCUS LPC13XX CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     ${SDK_DIR}/src/chip_${LPC_FAMILY}.c
@@ -69,8 +65,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -96,7 +90,6 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
 
 
diff --git a/hw/bsp/lpc15/family.cmake b/hw/bsp/lpc15/family.cmake
index f07044c24..589172132 100644
--- a/hw/bsp/lpc15/family.cmake
+++ b/hw/bsp/lpc15/family.cmake
@@ -18,11 +18,7 @@ set(FAMILY_MCUS LPC15XX CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     ${SDK_DIR}/src/chip_${LPC_FAMILY}.c
@@ -71,8 +67,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -98,7 +92,6 @@ function(family_configure_example TARGET RTOS)
   target_sources(${TARGET} PUBLIC
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
 
 
diff --git a/hw/bsp/lpc17/family.cmake b/hw/bsp/lpc17/family.cmake
index 2cbb261ca..cd8b71110 100644
--- a/hw/bsp/lpc17/family.cmake
+++ b/hw/bsp/lpc17/family.cmake
@@ -17,11 +17,7 @@ set(FAMILY_MCUS LPC175X_6X CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/../gcc/cr_startup_lpc175x_6x.c
     ${SDK_DIR}/src/chip_17xx_40xx.c
@@ -68,8 +64,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -97,7 +91,6 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
     ${TOP}/src/portable/ohci/ohci.c
     )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
 
 
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 6af1149bf..655caee0e 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -17,11 +17,7 @@ set(FAMILY_MCUS LPC18XX CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/../gcc/cr_startup_lpc18xx.c
     ${SDK_DIR}/src/chip_18xx_43xx.c
@@ -66,8 +62,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -90,7 +84,6 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
     )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
 
 
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index 21ed18057..d0e0bc9b1 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -17,11 +17,7 @@ set(FAMILY_MCUS LPC40XX CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/../gcc/cr_startup_lpc40xx.c
     ${SDK_DIR}/src/chip_17xx_40xx.c
@@ -69,8 +65,6 @@ endfunction()
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
@@ -98,7 +92,6 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
     ${TOP}/src/portable/ohci/ohci.c
     )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
 
 
diff --git a/hw/bsp/lpc43/family.cmake b/hw/bsp/lpc43/family.cmake
index 23c4aecea..5c68aaebf 100644
--- a/hw/bsp/lpc43/family.cmake
+++ b/hw/bsp/lpc43/family.cmake
@@ -14,22 +14,18 @@ set(FAMILY_MCUS LPC43XX CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${SDK_DIR}/../iar/iar_startup_lpc18xx43xx.s)
-  set(LD_FILE_IAR ${SDK_DIR}/../iar/linker/lpc18xx_43xx_ldscript_iflash.icf)
+set(STARTUP_FILE_GNU ${SDK_DIR}/../gcc/cr_startup_lpc43xx.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${SDK_DIR}/../iar/iar_startup_lpc18xx43xx.s)
+set(LD_FILE_IAR ${SDK_DIR}/../iar/linker/lpc18xx_43xx_ldscript_iflash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${SDK_DIR}/src/chip_18xx_43xx.c
     ${SDK_DIR}/src/clock_18xx_43xx.c
     ${SDK_DIR}/src/fpu_init.c
@@ -50,60 +46,49 @@ function(add_board_target BOARD_TARGET)
 
   update_board(${BOARD_TARGET})
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -nostdlib
-      -Wno-error=incompatible-pointer-types
-      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+  # warning by LPCOpen
+  if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
+    set_target_properties(${BOARD_TARGET} PROPERTIES COMPILE_FLAGS -Wno-error=incompatible-pointer-types)
   endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC43XX)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC43XX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/lpc51/family.cmake b/hw/bsp/lpc51/family.cmake
index 615fab6b8..9e128ab82 100644
--- a/hw/bsp/lpc51/family.cmake
+++ b/hw/bsp/lpc51/family.cmake
@@ -13,26 +13,22 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS LPC51 CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}_flash.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}_flash.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     # driver
     ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
@@ -62,62 +58,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC51)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC51)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index 3a0de4648..3b16955da 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -20,26 +20,22 @@ endif()
 set(HOST_PORT $<NOT:${PORT}>)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     # driver
     ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -90,68 +86,48 @@ function(add_board_target BOARD_TARGET)
   endif ()
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC54)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
-  # https://github.com/gsteiert/sct_neopixel/pull/1
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
-      COMPILE_FLAGS "-Wno-unused-parameter")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC54)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 08c186ca1..6ebda4db9 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -20,26 +20,22 @@ endif()
 set(HOST_PORT $<NOT:${PORT}>)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     # driver
     ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -88,67 +84,52 @@ function(add_board_target BOARD_TARGET)
   endif ()
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC55)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    # external driver
     ${TOP}/lib/sct_neopixel/sct_neopixel.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c
-      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-unused-parameter")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC55)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+    set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-unused-parameter")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/maxim/family.cmake b/hw/bsp/maxim/family.cmake
index cbfe7c84e..07171b8d5 100644
--- a/hw/bsp/maxim/family.cmake
+++ b/hw/bsp/maxim/family.cmake
@@ -38,26 +38,21 @@ else()
 endif()
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MAX_DEVICE}.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MAX_DEVICE}.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   # Common
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/heap.c
     ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/system_${MAX_DEVICE}.c
     ${MSDK_LIB}/PeriphDrivers/Source/SYS/mxc_assert.c
@@ -139,61 +134,49 @@ function(add_board_target BOARD_TARGET)
     -Wno-error=strict-prototypes
   )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${MAX_DEVICE_UPPER})
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${MAX_DEVICE_UPPER})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/mentor/musb/dcd_musb.c
-    )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  endif ()
 
-  # warnings caused by MSDK headers
-  target_compile_options(${TARGET} PRIVATE -Wno-error=strict-prototypes)
-  if (${MAX_DEVICE} STREQUAL "max78002")
-    target_compile_options(${TARGET} PRIVATE -Wno-error=redundant-decls)
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    # warnings caused by MSDK headers
+    target_compile_options(${TARGET} PRIVATE -Wno-error=strict-prototypes)
+    if (${MAX_DEVICE} STREQUAL "max78002")
+      target_compile_options(${TARGET} PRIVATE -Wno-error=redundant-decls)
+    endif ()
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index a8f50773d..bff4c68a7 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -23,27 +23,22 @@ endif()
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
-  endif()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+endif()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     # driver
     ${SDK_DIR}/drivers/gpio/fsl_gpio.c
     ${SDK_DIR}/drivers/common/fsl_common_arm.c
@@ -66,81 +61,62 @@ function(add_board_target BOARD_TARGET)
     )
 
   if (${FAMILY_MCUS} STREQUAL "MCXN9")
-
     target_sources(${BOARD_TARGET} PRIVATE
-            ${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
-    )
-
+      ${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
+      )
     target_include_directories(${BOARD_TARGET} PUBLIC
-            ${SDK_DIR}/drivers/lpflexcomm
-    )
+      ${SDK_DIR}/drivers/lpflexcomm
+      )
   elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
-
-
   endif()
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      #-nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  if (${FAMILY_MCUS} STREQUAL "MCXN9")
+    family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
+  elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
+    family_add_tinyusb(${TARGET} OPT_MCU_MCXA15)
+  endif()
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  if (${FAMILY_MCUS} STREQUAL "MCXN9")
-    family_add_tinyusb(${TARGET} OPT_MCU_MCXN9)
-  elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
-    family_add_tinyusb(${TARGET} OPT_MCU_MCXA15)
-  endif()
-
-  target_sources(${TARGET} PUBLIC
-    # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
-    ${TOP}/src/portable/chipidea/$<IF:${PORT},ci_hs/dcd_ci_hs.c,ci_fs/dcd_ci_fs.c>
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      #-nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/mm32/family.cmake b/hw/bsp/mm32/family.cmake
index d5e62a2da..20431e41c 100644
--- a/hw/bsp/mm32/family.cmake
+++ b/hw/bsp/mm32/family.cmake
@@ -14,28 +14,23 @@ set(FAMILY_MCUS MM32F327X CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Source/GCC_StartAsm/startup_${MCU_VARIANT}_gcc.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${SDK_DIR}/Source/IAR_StartAsm/startup_${MCU_VARIANT}_iar.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  # set(LD_FILE_IAR )
+set(STARTUP_FILE_GNU ${SDK_DIR}/Source/GCC_StartAsm/startup_${MCU_VARIANT}_gcc.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${SDK_DIR}/Source/IAR_StartAsm/startup_${MCU_VARIANT}_iar.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+# set(LD_FILE_IAR )
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Source/system_${MCU_VARIANT}.c
     ${SDK_DIR}/HAL_Lib/Src/hal_gpio.c
     ${SDK_DIR}/HAL_Lib/Src/hal_rcc.c
     ${SDK_DIR}/HAL_Lib/Src/hal_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMSIS_5}/CMSIS/Core/Include
@@ -44,61 +39,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_MM32F327X)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MM32F327X)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/mindmotion/mm32/dcd_mm32f327x_otg.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/msp430/family.cmake b/hw/bsp/msp430/family.cmake
index d9b4bf770..8b0dbeff4 100644
--- a/hw/bsp/msp430/family.cmake
+++ b/hw/bsp/msp430/family.cmake
@@ -15,11 +15,7 @@ set(FAMILY_MCUS MSP430x5xx CACHE INTERNAL "")
 # BOARD_TARGET
 #------------------------------------
 # only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} INTERFACE)
   target_compile_definitions(${BOARD_TARGET} INTERFACE
     CFG_TUD_ENDPOINT0_SIZE=8
@@ -32,17 +28,6 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} INTERFACE
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${SDK_DIR}
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} INTERFACE
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
 
@@ -51,16 +36,14 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
+  family_add_tinyusb(${TARGET} OPT_MCU_MSP430x5xx)
 
   #---------- Port Specific ----------
   # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
@@ -69,13 +52,16 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MSP430x5xx)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/ti/msp430x5xx/dcd_msp430x5xx.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${SDK_DIR}
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_msp430flasher(${TARGET})
diff --git a/hw/bsp/msp432e4/family.cmake b/hw/bsp/msp432e4/family.cmake
index 62ab83866..582faad67 100644
--- a/hw/bsp/msp432e4/family.cmake
+++ b/hw/bsp/msp432e4/family.cmake
@@ -14,27 +14,23 @@ set(FAMILY_MCUS MSP432E4 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${SDK_DIR}/Source/${MCU_VARIANT}.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  if (NOT DEFINED STARTUP_FILE_GNU)
-    set(STARTUP_FILE_GNU ${SDK_DIR}/Source/startup_${MCU_VARIANT}_gcc.S)
-  endif ()
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${SDK_DIR}/Source/${MCU_VARIANT}.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+set(STARTUP_FILE_GNU ${SDK_DIR}/Source/startup_${MCU_VARIANT}_gcc.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Source/system_${MCU_VARIANT}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/Include
@@ -42,63 +38,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -mslow-flash-data
-      )
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_MSP432E4)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
+    ${TOP}/src/portable/mentor/musb/hcd_musb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_MSP432E4)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/mentor/musb/dcd_musb.c
-    ${TOP}/src/portable/mentor/musb/hcd_musb.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${TARGET} PUBLIC
+      -mslow-flash-data
+      )
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported for MSP432E4")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_msp430flasher(${TARGET})
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 3384aeaf3..dbc126a6e 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -27,14 +27,27 @@ endif ()
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
+if (MCU_VARIANT STREQUAL nrf54h20)
+  set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
+  set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S)
+elseif (MCU_VARIANT STREQUAL nrf5340)
+  set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
+  set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S)
+else()
+  set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_xxaa.ld)
+  set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}.S)
+endif ()
+
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${LD_FILE_GNU_DEFAULT})
+endif ()
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${NRFX_PATH}/helpers/nrfx_flag32_allocator.c
     ${NRFX_PATH}/drivers/src/nrfx_gpiote.c
@@ -45,31 +58,21 @@ function(add_board_target BOARD_TARGET)
     )
 
   if (MCU_VARIANT STREQUAL nrf54h20)
-    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
     target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_nrf54h.c
-      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
     )
   elseif (MCU_VARIANT STREQUAL nrf5340)
-    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
     target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_${MCU_VARIANT}_application.c
-      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S
       ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
       )
     target_compile_definitions(${BOARD_TARGET} PUBLIC NRF5340_XXAA_APPLICATION)
   else()
-    set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_xxaa.ld)
     target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_${MCU_VARIANT}.c
-      ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}.S
       )
   endif ()
 
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${LD_FILE_GNU_DEFAULT})
-  endif ()
-
   string(TOUPPER ${MCU_VARIANT} MCU_VARIANT_UPPER)
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __STARTUP_CLEAR_BSS
@@ -92,27 +95,8 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_PATH}/mdk
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_PATH}/mdk
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
@@ -124,46 +108,48 @@ endfunction()
 #    )
 #endfunction()
 
-
 function(family_configure_example TARGET RTOS)
-  # Board target
-  if (NOT RTOS STREQUAL zephyr)
-    add_board_target(board_${BOARD})
-    target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-  endif ()
-
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
 
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PRIVATE
-    # BSP
+  target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
-  if (RTOS STREQUAL zephyr AND DEFINED BOARD_ALIAS AND NOT BOARD STREQUAL BOARD_ALIAS)
-    target_include_directories(${TARGET} PUBLIC ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD_ALIAS})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_PATH}/mdk
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${NRFX_PATH}/mdk
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
   endif ()
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
-  target_sources(${TARGET} PRIVATE
-    ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   #  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/nuc100_120/family.cmake b/hw/bsp/nuc100_120/family.cmake
index 06501b526..594d29cd0 100644
--- a/hw/bsp/nuc100_120/family.cmake
+++ b/hw/bsp/nuc100_120/family.cmake
@@ -11,19 +11,17 @@ set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
 
 set(FAMILY_MCUS NUC100 NUC120 CACHE INTERNAL "")
 
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC100Series/Source/GCC/startup_NUC100Series.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC100Series/Source/GCC/startup_NUC100Series.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Device/Nuvoton/NUC100Series/Source/system_NUC100Series.c
     ${SDK_DIR}/StdDriver/src/clk.c
@@ -31,7 +29,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/StdDriver/src/sys.c
     ${SDK_DIR}/StdDriver/src/timer.c
     ${SDK_DIR}/StdDriver/src/uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
 
   target_include_directories(${BOARD_TARGET} PUBLIC
@@ -46,30 +43,20 @@ function(add_board_target BOARD_TARGET)
   )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
+#------------------------------------
+# Functions
+#------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-  add_board_target(board_${BOARD})
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC120)
 
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nuvoton/nuc120/dcd_nuc120.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -77,11 +64,21 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  family_add_tinyusb(${TARGET} OPT_MCU_NUC120)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nuvoton/nuc120/dcd_nuc120.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
index 5b95c9d9c..1eb581347 100644
--- a/hw/bsp/nuc121_125/family.cmake
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -14,22 +14,16 @@ set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
 set(FAMILY_MCUS NUC121 CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC121/Source/GCC/startup_NUC121.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   # Common sources for all NUC12x
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Device/Nuvoton/NUC121/Source/system_NUC121.c
@@ -38,7 +32,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/StdDriver/src/fmc.c
     ${SDK_DIR}/StdDriver/src/sys.c
     ${SDK_DIR}/StdDriver/src/timer.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
   )
 
   target_include_directories(${BOARD_TARGET} PUBLIC
@@ -53,52 +46,43 @@ function(add_board_target BOARD_TARGET)
     CFG_EXAMPLE_MSC_READONLY
   )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC121)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_NUC121)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc126/family.cmake b/hw/bsp/nuc126/family.cmake
index 00725d725..3226406da 100644
--- a/hw/bsp/nuc126/family.cmake
+++ b/hw/bsp/nuc126/family.cmake
@@ -14,21 +14,16 @@ set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM0.cfg")
 set(FAMILY_MCUS NUC126 CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC126/Source/GCC/startup_NUC126.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Device/Nuvoton/NUC126/Source/system_NUC126.c
     ${SDK_DIR}/StdDriver/src/clk.c
@@ -38,7 +33,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/StdDriver/src/sys.c
     ${SDK_DIR}/StdDriver/src/timer.c
     ${SDK_DIR}/StdDriver/src/uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
 
   target_include_directories(${BOARD_TARGET} PUBLIC
@@ -55,37 +49,20 @@ function(add_board_target BOARD_TARGET)
   )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC126)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -93,12 +70,22 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_NUC126)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nuvoton/nuc121/dcd_nuc121.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc505/family.cmake b/hw/bsp/nuc505/family.cmake
index 8816ddbae..eb6048d5c 100644
--- a/hw/bsp/nuc505/family.cmake
+++ b/hw/bsp/nuc505/family.cmake
@@ -11,19 +11,17 @@ set(OPENOCD_OPTION "-f interface/nulink.cfg -f target/numicroM4.cfg")
 
 set(FAMILY_MCUS NUC505 CACHE INTERNAL "")
 
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/Device/Nuvoton/NUC505Series/Source/GCC/startup_NUC505Series.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Device/Nuvoton/NUC505Series/Source/system_NUC505Series.c
     ${SDK_DIR}/StdDriver/src/adc.c
@@ -40,7 +38,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/StdDriver/src/uart.c
     ${SDK_DIR}/StdDriver/src/wdt.c
     ${SDK_DIR}/StdDriver/src/wwdt.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
 
   target_include_directories(${BOARD_TARGET} PUBLIC
@@ -50,30 +47,18 @@ function(add_board_target BOARD_TARGET)
   )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
+
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-  add_board_target(board_${BOARD})
+  family_add_tinyusb(${TARGET} OPT_MCU_NUC505)
 
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nuvoton/nuc505/dcd_nuc505.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -81,11 +66,22 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  family_add_tinyusb(${TARGET} OPT_MCU_NUC505)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nuvoton/nuc505/dcd_nuc505.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/ra/family.cmake b/hw/bsp/ra/family.cmake
index bf6bcfb4a..c5b1d1a1a 100644
--- a/hw/bsp/ra/family.cmake
+++ b/hw/bsp/ra/family.cmake
@@ -38,129 +38,100 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (NOT TARGET ${BOARD_TARGET})
-    add_library(${BOARD_TARGET} STATIC
-      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/startup.c
-      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/system.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_clocks.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_common.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_delay.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_group_irq.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_guard.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_io.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_irq.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_register_protection.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_sbrk.c
-      ${FSP_RA}/src/bsp/mcu/all/bsp_security.c
-      ${FSP_RA}/src/r_ioport/r_ioport.c
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/common_data.c
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/pin_data.c
-      )
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/script/fsp.ld)
+endif ()
 
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -ffreestanding
-      )
-    target_include_directories(${BOARD_TARGET} PUBLIC
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_cfg/fsp_cfg
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_cfg/fsp_cfg/bsp
-      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen
-      ${CMSIS_DIR}/CMSIS/Core/Include
-      ${FSP_RA}/inc
-      ${FSP_RA}/inc/api
-      ${FSP_RA}/inc/instances
-      ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include
-      ${FSP_RA}/src/bsp/mcu/all
-      ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT}
-      )
-    target_compile_definitions(${BOARD_TARGET} PUBLIC
-      BOARD_TUD_RHPORT=${RHPORT_DEVICE}
-      BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
-      BOARD_TUH_RHPORT=${RHPORT_HOST}
-      BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
-      )
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/startup.c
+    ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Source/system.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_clocks.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_common.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_delay.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_group_irq.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_guard.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_io.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_irq.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_register_protection.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_sbrk.c
+    ${FSP_RA}/src/bsp/mcu/all/bsp_security.c
+    ${FSP_RA}/src/r_ioport/r_ioport.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/common_data.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen/pin_data.c
+    )
 
-    update_board(${BOARD_TARGET})
-
-    if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-      set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/script/fsp.ld)
-    endif ()
-
-    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        # linker file
-        "LINKER:--script=${LD_FILE_GNU}"
-        -L${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/script
-        -Wl,--defsym=end=__bss_end__
-        -nostartfiles
-        --specs=nano.specs --specs=nosys.specs
-        )
-    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-      target_link_options(${BOARD_TARGET} PUBLIC
-        "LINKER:--config=${LD_FILE_IAR}"
-        )
-    endif ()
-  endif ()
-endfunction()
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -ffreestanding
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_cfg/fsp_cfg
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_cfg/fsp_cfg/bsp
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/ra_gen
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${FSP_RA}/inc
+    ${FSP_RA}/inc/api
+    ${FSP_RA}/inc/instances
+    ${FSP_RA}/src/bsp/cmsis/Device/RENESAS/Include
+    ${FSP_RA}/src/bsp/mcu/all
+    ${FSP_RA}/src/bsp/mcu/${MCU_VARIANT}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+    BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+    BOARD_TUH_RHPORT=${RHPORT_HOST}
+    BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
+    )
 
+  update_board(${BOARD_TARGET})
+endfunction()
 
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_RAXXX)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    # Explicitly added bsp_rom_registers here, otherwise MCU can be bricked if g_bsp_rom_registers is dropped by linker
     ${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c
+    ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
+    ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+    ${TOP}/src/portable/renesas/rusb2/rusb2_common.c
     )
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c PROPERTIES COMPILE_FLAGS "-Wno-undef")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     )
-  target_compile_options(${TARGET} PUBLIC
-    -Wno-error=undef
-    -Wno-error=strict-prototypes
-    )
-
-#  # RA has custom freertos port
-#  if (NOT TARGET freertos_kernel_port)
-#    add_library(freertos_kernel_port STATIC)
-#    target_sources(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port/port.c)
-#    target_include_directories(freertos_kernel_port PUBLIC ${FSP_RA}/src/rm_freertos_port)
-#
-#    target_link_libraries(freertos_kernel_port PUBLIC freertos_kernel)
-#  endif ()
-
-    # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_RAXXX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
-    ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
-    ${TOP}/src/portable/renesas/rusb2/rusb2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      # linker file
+      "LINKER:--script=${LD_FILE_GNU}"
+      -L${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/script
+      -Wl,--defsym=end=__bss_end__
+      -nostartfiles
+      --specs=nano.specs --specs=nosys.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${FSP_RA}/src/bsp/mcu/all/bsp_rom_registers.c PROPERTIES COMPILE_FLAGS "-Wno-undef")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
   # Flashing
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd11/family.cmake b/hw/bsp/samd11/family.cmake
index e3dc23c35..6cfb8238b 100644
--- a/hw/bsp/samd11/family.cmake
+++ b/hw/bsp/samd11/family.cmake
@@ -14,29 +14,22 @@ set(FAMILY_MCUS SAMD11 CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
     ${SDK_DIR}/hal/src/hal_atomic.c
     ${SDK_DIR}/hpl/gclk/hpl_gclk.c
     ${SDK_DIR}/hpl/pm/hpl_pm.c
     ${SDK_DIR}/hpl/sysctrl/hpl_sysctrl.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}
@@ -58,57 +51,44 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMD11)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_SAMD11)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd2x_l2x/family.cmake b/hw/bsp/samd2x_l2x/family.cmake
index 9f1b20800..091016e64 100644
--- a/hw/bsp/samd2x_l2x/family.cmake
+++ b/hw/bsp/samd2x_l2x/family.cmake
@@ -21,28 +21,21 @@ set(FAMILY_MCUS SAMD21 SAML2X CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -f target/at91samdXX.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   # Common sources for all SAM families
   set(COMMON_SOURCES
     ${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
     ${SDK_DIR}/hal/src/hal_atomic.c
     ${SDK_DIR}/hpl/gclk/hpl_gclk.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
   )
 
   # Family-specific sources
@@ -89,48 +82,14 @@ function(add_board_target BOARD_TARGET)
   endif()
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PUBLIC
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
   # Determine MCU option based on SAM_FAMILY
   if(SAM_FAMILY STREQUAL "samd21")
     set(MCU_OPTION OPT_MCU_SAMD21)
@@ -141,22 +100,45 @@ function(family_configure_example TARGET RTOS)
   else()
     message(FATAL_ERROR "Unknown SAM_FAMILY: ${SAM_FAMILY}")
   endif()
-
-  # Add TinyUSB target and port source
   family_add_tinyusb(${TARGET} ${MCU_OPTION})
+
   target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/microchip/samd/dcd_samd.c
-  )
-
+    ${TOP}/src/portable/microchip/samd/hcd_samd.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
   # Add HCD support for SAMD21 (has host capability)
   if(SAM_FAMILY STREQUAL "samd21")
     target_sources(${TARGET} PUBLIC
       ${TOP}/src/portable/microchip/samd/hcd_samd.c
-    )
+      )
   endif()
 
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd5x_e5x/family.cmake b/hw/bsp/samd5x_e5x/family.cmake
index 516290593..d5de26244 100644
--- a/hw/bsp/samd5x_e5x/family.cmake
+++ b/hw/bsp/samd5x_e5x/family.cmake
@@ -13,22 +13,16 @@ set(FAMILY_MCUS SAMD51 SAME54 CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f interface/cmsis-dap.cfg -c \"transport select swd\" -c \"set CHIPNAME samd51\" -f target/atsame5x.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/gcc/gcc/startup_${SAM_FAMILY}.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/gcc/system_${SAM_FAMILY}.c
     ${SDK_DIR}/hal/src/hal_atomic.c
@@ -36,7 +30,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/hpl/mclk/hpl_mclk.c
     ${SDK_DIR}/hpl/osc32kctrl/hpl_osc32kctrl.c
     ${SDK_DIR}/hpl/oscctrl/hpl_oscctrl.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}
@@ -50,56 +43,45 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMD51)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/microchip/samd/dcd_samd.c
+    ${TOP}/src/portable/microchip/samd/hcd_samd.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_SAMD51)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samd/dcd_samd.c
-    ${TOP}/src/portable/microchip/samd/hcd_samd.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.h b/hw/bsp/same7x/boards/same70_qmtech/board.h
index 0309e3e6c..09c2c93a9 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.h
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.h
@@ -46,7 +46,7 @@ extern "C" {
 #define BUTTON_PORT_CLOCK ID_PIOA
 
 #define UART_TX_PIN GPIO(GPIO_PORTB, 1)
-#define UART_TX_FUNCTION MUX_PB1D_USART1_TXD1
+#define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
 #define UART_RX_PIN GPIO(GPIO_PORTB, 0)
 #define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
 #define UART_PORT_CLOCK ID_USART1
diff --git a/hw/bsp/same7x/family.cmake b/hw/bsp/same7x/family.cmake
index a1eb197a3..cb11f21f3 100644
--- a/hw/bsp/same7x/family.cmake
+++ b/hw/bsp/same7x/family.cmake
@@ -11,28 +11,16 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS SAMX7X CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/same70b/gcc/gcc/startup_same70q21b.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-  if (NOT DEFINED LD_FILE_Clang)
-    set(LD_FILE_Clang ${LD_FILE_GNU})
-  endif ()
-
-  if (NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${LD_FILE_GNU})
-  endif ()
-
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
+set(STARTUP_FILE_GNU ${SDK_DIR}/same70b/gcc/gcc/startup_same70q21b.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/same70b/gcc/system_same70q21b.c
     ${SDK_DIR}/hpl/core/hpl_init.c
@@ -42,7 +30,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/hal/src/hal_io.c
     ${SDK_DIR}/hal/src/hal_atomic.c
     ${SDK_DIR}/hal/utils/src/utils_ringbuffer.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}
@@ -60,22 +47,6 @@ function(add_board_target BOARD_TARGET)
 
   update_board(${BOARD_TARGET})
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
-
   target_compile_options(${BOARD_TARGET} PUBLIC
     -Wno-error=unused-parameter
     -Wno-error=cast-align
@@ -89,33 +60,37 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-
-  add_board_target(board_${BOARD})
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMX7X)
 
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/microchip/samx7x/dcd_samx7x.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  family_add_tinyusb(${TARGET} OPT_MCU_SAMX7X)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samx7x/dcd_samx7x.c
-    )
-
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-  target_compile_options(${TARGET} PUBLIC
-    -Wno-error=unused-parameter
-    -Wno-error=cast-align
-    -Wno-error=redundant-decls
-    -Wno-error=cast-qual
-    )
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
diff --git a/hw/bsp/samg/family.cmake b/hw/bsp/samg/family.cmake
index eb00c8c52..6d7a6ba7f 100644
--- a/hw/bsp/samg/family.cmake
+++ b/hw/bsp/samg/family.cmake
@@ -14,29 +14,22 @@ set(FAMILY_MCUS SAMG CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f board/atmel_samg55_xplained_pro.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
-    message(FATAL_ERROR "LD_FILE_${CMAKE_C_COMPILER_ID} not defined")
-  endif ()
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/${SAM_FAMILY}/gcc/gcc/startup_${SAM_FAMILY}.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/${SAM_FAMILY}/gcc/gcc/startup_${SAM_FAMILY}.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/${SAM_FAMILY}/gcc/system_${SAM_FAMILY}.c
     ${SDK_DIR}/hal/src/hal_atomic.c
     ${SDK_DIR}/hpl/core/hpl_init.c
     ${SDK_DIR}/hpl/usart/hpl_usart.c
     ${SDK_DIR}/hpl/pmc/hpl_pmc.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -51,60 +44,46 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/hri
     ${SDK_DIR}/CMSIS/Core/Include
     )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_SAMG)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/microchip/samg/dcd_samg.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_SAMG)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/microchip/samg/dcd_samg.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 85562d474..37b743654 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32C0 CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f interface/stlink.cfg -f target/stm32c0x.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -46,7 +42,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -59,62 +54,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32C0)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32C0)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 8d584a8e1..6f90f1a7a 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32F0 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -43,7 +39,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -57,61 +52,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F0)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F0)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index 72fe17482..f2acba3ff 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -18,24 +18,20 @@ set(FAMILY_MCUS STM32F1 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
-#------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
 # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif ()
+#------------------------------------
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED LD_FILE_IAR)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif ()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -44,7 +40,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -52,65 +47,50 @@ function(add_board_target BOARD_TARGET)
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
-  #target_compile_options(${BOARD_TARGET} PUBLIC)
-  #target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F1)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F1)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f2/family.cmake b/hw/bsp/stm32f2/family.cmake
index 30ee23eb9..b08e93e3c 100644
--- a/hw/bsp/stm32f2/family.cmake
+++ b/hw/bsp/stm32f2/family.cmake
@@ -18,24 +18,20 @@ set(FAMILY_MCUS STM32F2 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif ()
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED LD_FILE_IAR)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif ()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -44,7 +40,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -52,67 +47,52 @@ function(add_board_target BOARD_TARGET)
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
-  #target_compile_options(${BOARD_TARGET} PUBLIC)
-  #target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F2)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F2)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f3/family.cmake b/hw/bsp/stm32f3/family.cmake
index b708c667f..b9aea10db 100644
--- a/hw/bsp/stm32f3/family.cmake
+++ b/hw/bsp/stm32f3/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32F3 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -42,7 +38,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -54,61 +49,48 @@ function(add_board_target BOARD_TARGET)
   #target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F3)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F3)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index 18e8676c5..327bf7bf3 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -40,22 +40,18 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -66,7 +62,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -82,63 +77,50 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F4)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F4)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 48c0edae6..2b9ca8cbb 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -40,22 +40,18 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -68,7 +64,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -84,63 +79,50 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32F7)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32F7)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index d489a40b5..065ec3a0e 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32G0 CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f interface/stlink.cfg -f target/stm32g0x.cfg")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -46,7 +42,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -54,66 +49,51 @@ function(add_board_target BOARD_TARGET)
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
-#    target_compile_options(${BOARD_TARGET} PUBLIC)
-#    target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G0)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 3a4c8ae32..f0c0e5549 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32G4 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -44,7 +40,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -54,62 +49,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32G4)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index 1240901e8..7ad59dbd4 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -18,24 +18,20 @@ set(FAMILY_MCUS STM32H5 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif ()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  string(REPLACE "stm32h" "STM32H" MCU_VARIANT_UPPER ${MCU_VARIANT})
-  set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+string(REPLACE "stm32h" "STM32H" MCU_VARIANT_UPPER ${MCU_VARIANT})
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -48,7 +44,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -58,62 +53,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32H5)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/typec/typec_stm32.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32H5)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
index 02c6bf5fa..78a821298 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.cmake
@@ -15,7 +15,7 @@ if (NOT DEFINED RHPORT_HOST)
 endif()
 
 function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     ${ST_MFXSTM32L152}/mfxstm32l152.c
     ${ST_MFXSTM32L152}/mfxstm32l152_reg.c
     )
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index a1e49d1fd..840391e0b 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -41,24 +41,22 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if(NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if(NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+# only need to be built ONCE for all examples
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -73,7 +71,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -89,63 +86,42 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC "LINKER:--script=${LD_FILE_GNU}")
 
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${TARGET} PUBLIC -nostartfiles --specs=nosys.specs --specs=nano.specs)
+    endif ()
+
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h7rs/family.cmake b/hw/bsp/stm32h7rs/family.cmake
index e67cabd4b..b1253d7fe 100644
--- a/hw/bsp/stm32h7rs/family.cmake
+++ b/hw/bsp/stm32h7rs/family.cmake
@@ -40,27 +40,23 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  if(NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT}_flash.ld)
-  endif()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if(NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif()
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+if(NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_flash.ld)
+endif()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if(NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -74,7 +70,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -92,61 +87,50 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7RS ${RTOS})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32H7RS ${RTOS})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32l0/family.cmake b/hw/bsp/stm32l0/family.cmake
index 3278d2645..4d24a21a6 100644
--- a/hw/bsp/stm32l0/family.cmake
+++ b/hw/bsp/stm32l0/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32L0 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -43,7 +39,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -58,61 +53,48 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32L0)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32L0)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index 8d44f2506..e89035e8b 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -18,22 +18,18 @@ set(FAMILY_MCUS STM32L4 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -46,7 +42,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -54,68 +49,53 @@ function(add_board_target BOARD_TARGET)
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
-#    target_compile_options(${BOARD_TARGET} PUBLIC)
-#    target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index e1b8524bf..587ebc0fb 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -38,27 +38,23 @@ endif ()
 cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  if(NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld)
-  endif()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if(NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif()
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+if(NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld)
+endif()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if(NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}_fsbl.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -72,7 +68,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -90,62 +85,51 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32N6 ${RTOS})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       -nostartfiles
       --specs=nosys.specs --specs=nano.specs
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_Clang}"
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-endfunction()
-
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
-  target_sources(${TARGET} PUBLIC
-    # BSP
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
       PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32N6 ${RTOS})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
index 535b4716f..0c9d92fae 100644
--- a/hw/bsp/stm32u0/family.cmake
+++ b/hw/bsp/stm32u0/family.cmake
@@ -18,28 +18,24 @@ set(FAMILY_MCUS STM32U0 CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  string(REPLACE "stm32u" "STM32U" MCU_VARIANT_UPPER ${MCU_VARIANT})
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  if (NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-  endif ()
+string(REPLACE "stm32u" "STM32U" MCU_VARIANT_UPPER ${MCU_VARIANT})
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+endif ()
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -50,7 +46,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -59,61 +54,48 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Inc
     )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32U0)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32U0)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index f1f9f6502..6bbeb1017 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -17,27 +17,23 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS STM32U5 CACHE INTERNAL "")
 
 
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+string(REPLACE "stm32u" "STM32U" MCU_VARIANT_UPPER ${MCU_VARIANT})
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 #------------------------------------
 # BOARD_TARGET
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  string(REPLACE "stm32u" "STM32U" MCU_VARIANT_UPPER ${MCU_VARIANT})
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
-  endif ()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
-
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -49,7 +45,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -58,65 +53,51 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Inc
     )
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32U5)
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32U5)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    #${TOP}/src/portable/st/typec/typec_stm32.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32wb/family.cmake b/hw/bsp/stm32wb/family.cmake
index e749e2fcc..461ce6ffd 100644
--- a/hw/bsp/stm32wb/family.cmake
+++ b/hw/bsp/stm32wb/family.cmake
@@ -18,25 +18,21 @@ set(FAMILY_MCUS STM32WB CACHE INTERNAL "")
 
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}_cm4.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}_cm4.s)
-
-  if (NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld)
-  endif()
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_cm4.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}_cm4.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}_cm4.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld)
+endif()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_cm4.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -49,7 +45,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -57,65 +52,50 @@ function(add_board_target BOARD_TARGET)
     ${ST_CMSIS}/Include
     ${ST_HAL_DRIVER}/Inc
     )
-#    target_compile_options(${BOARD_TARGET} PUBLIC)
-#    target_compile_definitions(${BOARD_TARGET} PUBLIC)
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
 
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32wba/family.cmake b/hw/bsp/stm32wba/family.cmake
index 391989a6d..fab3d786b 100644
--- a/hw/bsp/stm32wba/family.cmake
+++ b/hw/bsp/stm32wba/family.cmake
@@ -27,27 +27,23 @@ set(RHPORT_DEVICE_SPEED OPT_MODE_HIGH_SPEED)
 set(RHPORT_HOST_SPEED OPT_MODE_HIGH_SPEED)
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  # STM32WBA HAL uses uppercase MCU_VARIANT (excluding the x's) for linking and lowercase MCU_VARIANT for startup.
-  string(TOUPPER "${MCU_VARIANT}" UPPERCASE_MCU_VARIANT)
-  string(REGEX REPLACE "X" "x" UPPERCASE_MCU_VARIANT "${UPPERCASE_MCU_VARIANT}")
+# STM32WBA HAL uses uppercase MCU_VARIANT (excluding the x's) for linking and lowercase MCU_VARIANT for startup.
+string(TOUPPER "${MCU_VARIANT}" UPPERCASE_MCU_VARIANT)
+string(REGEX REPLACE "X" "x" UPPERCASE_MCU_VARIANT "${UPPERCASE_MCU_VARIANT}")
 
-  # Startup & Linker script
-  set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-  set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
-
-  set(LD_FILE_GNU ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/linker/${UPPERCASE_MCU_VARIANT}_FLASH_ns.ld)
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-  set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_ns.icf)
+set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${UPPERCASE_MCU_VARIANT}_FLASH_ns.ld)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_ns.icf)
 
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal.c
@@ -62,7 +58,6 @@ function(add_board_target BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pcd.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pcd_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_ll_usb.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -72,65 +67,50 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32WBA)
 
-  target_compile_definitions(${TARGET} PUBLIC
-    CFG_TUSB_MCU=OPT_MCU_STM32WBA
-    )
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_STM32WBA)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-	${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-	${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 7fe256fb6..936dcffa1 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -15,22 +15,18 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS TM4C123 CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/Source/GCC/${MCU_VARIANT}_startup.c)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/Source/GCC/${MCU_VARIANT}_startup.c)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/Source/system_${MCU_VARIANT_UPPER}.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/Include/${MCU_VARIANT_UPPER}
@@ -38,59 +34,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -uvectors
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_TM4C123)
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/mentor/musb/dcd_musb.c
+    ${TOP}/src/portable/mentor/musb/hcd_musb.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_TM4C123)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/mentor/musb/dcd_musb.c
-    ${TOP}/src/portable/mentor/musb/hcd_musb.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_FLAGS "-Wno-cast-qual"
+    )
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/xmc4000/family.cmake b/hw/bsp/xmc4000/family.cmake
index 594bd1116..ffce97a8c 100644
--- a/hw/bsp/xmc4000/family.cmake
+++ b/hw/bsp/xmc4000/family.cmake
@@ -12,19 +12,16 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 set(FAMILY_MCUS XMC4000 CACHE INTERNAL "")
 
 #------------------------------------
-# BOARD_TARGET
+# Startup & Linker script
 #------------------------------------
-# only need to be built ONCE for all examples
-function(add_board_target BOARD_TARGET)
-  if (TARGET ${BOARD_TARGET})
-    return()
-  endif()
-
-  set(LD_FILE_Clang ${LD_FILE_GNU})
-
-  set(STARTUP_FILE_GNU ${SDK_DIR}/CMSIS/Infineon/COMPONENT_${MCU_VARIANT}/Source/TOOLCHAIN_GCC_ARM/startup_${MCU_VARIANT}.S)
-  set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(STARTUP_FILE_GNU ${SDK_DIR}/CMSIS/Infineon/COMPONENT_${MCU_VARIANT}/Source/TOOLCHAIN_GCC_ARM/startup_${MCU_VARIANT}.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${SDK_DIR}/CMSIS/Infineon/COMPONENT_${MCU_VARIANT}/Source/system_${MCU_VARIANT}.c
     ${SDK_DIR}/XMCLib/src/xmc_gpio.c
@@ -32,7 +29,6 @@ function(add_board_target BOARD_TARGET)
     ${SDK_DIR}/XMCLib/src/xmc4_scu.c
     ${SDK_DIR}/XMCLib/src/xmc_usic.c
     ${SDK_DIR}/XMCLib/src/xmc_uart.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${SDK_DIR}/CMSIS/Core/Include
@@ -41,62 +37,49 @@ function(add_board_target BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for MSP432E4")
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${BOARD_TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
 endfunction()
 
-
 #------------------------------------
 # Functions
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_XMC4000)
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-
-  # Board target
-  add_board_target(board_${BOARD})
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${SDK_DIR}/Newlib/syscalls.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
-    # family, hw, board
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_XMC4000)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
-    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    )
-  target_link_libraries(${TARGET} PUBLIC board_${BOARD})
-
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported")
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
 
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-- 
cgit v1.3.1


From bde449997e65ee866fa9e20c15bac0bd45efccf4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 23 Oct 2025 02:37:28 +0700
Subject: fix more build

---
 hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake |  2 +-
 hw/bsp/lpc11/family.cmake                       |  5 ++--
 hw/bsp/lpc13/family.cmake                       | 14 ++-------
 hw/bsp/lpc15/family.cmake                       | 14 ++-------
 hw/bsp/lpc17/family.cmake                       | 18 +++--------
 hw/bsp/lpc18/family.cmake                       | 18 +++--------
 hw/bsp/lpc40/family.cmake                       | 18 +++--------
 hw/bsp/nrf/family.cmake                         | 40 ++++++++++++++-----------
 8 files changed, 42 insertions(+), 87 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake
index b7393cb2f..36296fb54 100644
--- a/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake
+++ b/hw/bsp/lpc11/boards/lpcxpresso11u68/board.cmake
@@ -5,7 +5,7 @@ set(PYOCD_TARGET LPC11U68)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/lpc11u68.ld)
 
 function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     ${SDK_DIR}/src/gpio_${LPC_FAMILY}.c
     ${SDK_DIR}/src/syscon_${LPC_FAMILY}.c
     )
diff --git a/hw/bsp/lpc11/family.cmake b/hw/bsp/lpc11/family.cmake
index 506d76ed0..42578d403 100644
--- a/hw/bsp/lpc11/family.cmake
+++ b/hw/bsp/lpc11/family.cmake
@@ -23,7 +23,7 @@ set(FAMILY_MCUS LPC11UXX CACHE INTERNAL "")
 # only need to be built ONCE for all examples
 function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
-
+    ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     ${SDK_DIR}/src/chip_${LPC_FAMILY}.c
     ${SDK_DIR}/src/clock_${LPC_FAMILY}.c
     ${SDK_DIR}/src/iap.c
@@ -43,6 +43,8 @@ function(family_add_board BOARD_TARGET)
     )
 
   update_board(${BOARD_TARGET})
+
+  set_target_properties(${BOARD_TARGET} PROPERTIES COMPILE_FLAGS "-Wno-incompatible-pointer-types")
 endfunction()
 
 
@@ -59,7 +61,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    ${SDK_DIR}/../gcc/cr_startup_lpc${LPC_FAMILY}.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
diff --git a/hw/bsp/lpc13/family.cmake b/hw/bsp/lpc13/family.cmake
index 5e6470b5f..6a66cfe95 100644
--- a/hw/bsp/lpc13/family.cmake
+++ b/hw/bsp/lpc13/family.cmake
@@ -64,14 +64,12 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC13XX)
 
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -85,14 +83,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC13XX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc15/family.cmake b/hw/bsp/lpc15/family.cmake
index 589172132..8de26421d 100644
--- a/hw/bsp/lpc15/family.cmake
+++ b/hw/bsp/lpc15/family.cmake
@@ -66,14 +66,12 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC15XX)
 
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
     )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -87,14 +85,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC15XX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    )
-
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc17/family.cmake b/hw/bsp/lpc17/family.cmake
index cd8b71110..92bcbff21 100644
--- a/hw/bsp/lpc17/family.cmake
+++ b/hw/bsp/lpc17/family.cmake
@@ -63,14 +63,14 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC175X_6X)
 
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+    ${TOP}/src/portable/ohci/ohci.c
     )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -84,16 +84,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC175X_6X)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
-    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-    ${TOP}/src/portable/ohci/ohci.c
-    )
-
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc18/family.cmake b/hw/bsp/lpc18/family.cmake
index 655caee0e..27ee00f4c 100644
--- a/hw/bsp/lpc18/family.cmake
+++ b/hw/bsp/lpc18/family.cmake
@@ -61,14 +61,14 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
 
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
     )
   target_include_directories(${TARGET} PUBLIC
     # family, hw, board
@@ -77,16 +77,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC18XX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
-    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
-    ${TOP}/src/portable/ehci/ehci.c
-    )
-
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc40/family.cmake b/hw/bsp/lpc40/family.cmake
index d0e0bc9b1..211846444 100644
--- a/hw/bsp/lpc40/family.cmake
+++ b/hw/bsp/lpc40/family.cmake
@@ -64,14 +64,14 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_LPC40XX)
 
-
-  #---------- Port Specific ----------
-  # These files are built for each example since it depends on example's tusb_config.h
   target_sources(${TARGET} PUBLIC
-    # BSP
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
+    ${TOP}/src/portable/ohci/ohci.c
     )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
@@ -85,16 +85,6 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  # Add TinyUSB target and port source
-  family_add_tinyusb(${TARGET} OPT_MCU_LPC40XX)
-  target_sources(${TARGET} PUBLIC
-    ${TOP}/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
-    ${TOP}/src/portable/nxp/lpc17_40/hcd_lpc17_40.c
-    ${TOP}/src/portable/ohci/ohci.c
-    )
-
-
-
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index dbc126a6e..0c19d2155 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -43,6 +43,7 @@ endif ()
 if (NOT DEFINED LD_FILE_GNU)
 set(LD_FILE_GNU ${LD_FILE_GNU_DEFAULT})
 endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
 
 #------------------------------------
 # Board Target
@@ -112,14 +113,13 @@ function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
   family_add_tinyusb(${TARGET} OPT_MCU_${FAMILY_MCUS})
 
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/nordic/nrf5x/dcd_nrf5x.c
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
     ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -127,22 +127,26 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_PATH}/mdk
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -L${NRFX_PATH}/mdk
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+  if (NOT RTOS STREQUAL zephyr)
+    target_sources(${TARGET} PRIVATE ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}})
+
+    if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+      target_link_options(${TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -L${NRFX_PATH}/mdk
+        --specs=nosys.specs --specs=nano.specs
+        -nostartfiles
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+      target_link_options(${TARGET} PUBLIC
+        "LINKER:--script=${LD_FILE_GNU}"
+        -L${NRFX_PATH}/mdk
+        )
+    elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+      target_link_options(${TARGET} PUBLIC
+        "LINKER:--config=${LD_FILE_IAR}"
+        )
+    endif ()
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-- 
cgit v1.3.1


From 7c95d9bed5b39730c449e321cc72c4e690b17a6c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 23 Oct 2025 16:59:04 +0700
Subject: force clang asm with -x assembler-with-cpp

---
 examples/build_system/cmake/toolchain/arm_clang.cmake | 2 ++
 examples/build_system/cmake/toolchain/common.cmake    | 6 +++++-
 hw/bsp/ch32v10x/family.cmake                          | 2 +-
 hw/bsp/lpc11/family.cmake                             | 2 +-
 4 files changed, 9 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/examples/build_system/cmake/toolchain/arm_clang.cmake b/examples/build_system/cmake/toolchain/arm_clang.cmake
index fe3c2b453..dba637367 100644
--- a/examples/build_system/cmake/toolchain/arm_clang.cmake
+++ b/examples/build_system/cmake/toolchain/arm_clang.cmake
@@ -7,6 +7,8 @@ if (NOT DEFINED CMAKE_CXX_COMPILER)
 endif ()
 
 set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
+set(TOOLCHAIN_ASM_FLAGS "-x assembler-with-cpp")
+
 find_program(CMAKE_SIZE llvm-size)
 find_program(CMAKE_OBJCOPY llvm-objcopy)
 find_program(CMAKE_OBJDUMP llvm-objdump)
diff --git a/examples/build_system/cmake/toolchain/common.cmake b/examples/build_system/cmake/toolchain/common.cmake
index fa3034e6f..14449b01d 100644
--- a/examples/build_system/cmake/toolchain/common.cmake
+++ b/examples/build_system/cmake/toolchain/common.cmake
@@ -32,7 +32,6 @@ if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
     -Wl,--gc-sections
     -Wl,--cref
     )
-
 elseif (TOOLCHAIN STREQUAL "iar")
   list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
     --diag_suppress=Li065
@@ -48,5 +47,10 @@ foreach (LANG IN ITEMS C CXX ASM)
   #set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
 endforeach ()
 
+# Assembler
+if (DEFINED TOOLCHAIN_ASM_FLAGS)
+  set(CMAKE_ASM_FLAGS_INIT "${CMAKE_ASM_FLAGS_INIT} ${TOOLCHAIN_ASM_FLAGS}")
+endif ()
+
 # Linker
 list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
diff --git a/hw/bsp/ch32v10x/family.cmake b/hw/bsp/ch32v10x/family.cmake
index 1c9d41740..843b7f9d3 100644
--- a/hw/bsp/ch32v10x/family.cmake
+++ b/hw/bsp/ch32v10x/family.cmake
@@ -48,7 +48,7 @@ function(family_add_board BOARD_TARGET)
   update_board(${BOARD_TARGET})
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_compile_options(${TARGET} PUBLIC -mcmodel=medany)
+    target_compile_options(${BOARD_TARGET} PUBLIC -mcmodel=medany)
   endif()
 endfunction()
 
diff --git a/hw/bsp/lpc11/family.cmake b/hw/bsp/lpc11/family.cmake
index 42578d403..fceafcf61 100644
--- a/hw/bsp/lpc11/family.cmake
+++ b/hw/bsp/lpc11/family.cmake
@@ -79,7 +79,7 @@ function(family_configure_example TARGET RTOS)
       --specs=nosys.specs --specs=nano.specs
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${BOARD_TARGET} PUBLIC
+    target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-- 
cgit v1.3.1


From 878c8f26c5c760ec683a8d4ee4aa1ee6678b8a12 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Oct 2025 09:58:46 +0700
Subject: enable IAR CState with IAR_CSTAT=1

---
 .../build_system/cmake/toolchain/arm_iar.cmake     |   8 +
 .../cmake/toolchain/cstat_sel_checks.txt           | 247 +++++++++++++++++++++
 hw/bsp/family_support.cmake                        |  36 +--
 3 files changed, 274 insertions(+), 17 deletions(-)
 create mode 100644 examples/build_system/cmake/toolchain/cstat_sel_checks.txt

(limited to 'hw')

diff --git a/examples/build_system/cmake/toolchain/arm_iar.cmake b/examples/build_system/cmake/toolchain/arm_iar.cmake
index 083815715..42b057020 100644
--- a/examples/build_system/cmake/toolchain/arm_iar.cmake
+++ b/examples/build_system/cmake/toolchain/arm_iar.cmake
@@ -14,4 +14,12 @@ find_program(CMAKE_SIZE size)
 find_program(CMAKE_OBJCOPY ielftool)
 find_program(CMAKE_OBJDUMP iefdumparm)
 
+find_program(CMAKE_IAR_CSTAT icstat)
+find_program(CMAKE_IAR_CHECKS ichecks)
+find_program(CMAKE_IAR_REPORT ireport)
+
+if (IAR_CSTAT)
+set(CMAKE_C_ICSTAT ${CMAKE_IAR_CSTAT} --checks=${CMAKE_CURRENT_LIST_DIR}/cstat_sel_checks.txt --db=${CMAKE_BINARY_DIR}/cstat.db --sarif_dir=${CMAKE_BINARY_DIR}/cstat_sarif)
+endif ()
+
 include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)
diff --git a/examples/build_system/cmake/toolchain/cstat_sel_checks.txt b/examples/build_system/cmake/toolchain/cstat_sel_checks.txt
new file mode 100644
index 000000000..b7efba4ad
--- /dev/null
+++ b/examples/build_system/cmake/toolchain/cstat_sel_checks.txt
@@ -0,0 +1,247 @@
+# IAR C-STAT Checks Manifest Handler V2.7.5.562
+#
+MISRAC2012-Dir-4.3
+MISRAC2012-Dir-4.7_c
+MISRAC2012-Dir-4.10
+MISRAC2012-Dir-4.11_a
+MISRAC2012-Dir-4.11_b
+MISRAC2012-Dir-4.11_c
+MISRAC2012-Dir-4.11_d
+MISRAC2012-Dir-4.11_e
+MISRAC2012-Dir-4.11_f
+MISRAC2012-Dir-4.11_g
+MISRAC2012-Dir-4.11_h
+MISRAC2012-Dir-4.11_i
+MISRAC2012-Dir-4.12
+MISRAC2012-Dir-4.14_a
+MISRAC2012-Dir-4.14_b
+MISRAC2012-Dir-4.14_c
+MISRAC2012-Dir-4.14_d
+MISRAC2012-Dir-4.14_e
+MISRAC2012-Dir-4.14_f
+MISRAC2012-Dir-4.14_g
+MISRAC2012-Dir-4.14_h
+MISRAC2012-Dir-4.14_i
+MISRAC2012-Dir-4.14_j
+MISRAC2012-Dir-4.14_l
+MISRAC2012-Dir-4.14_m
+MISRAC2012-Dir-4.15
+MISRAC2012-Rule-1.3_a
+MISRAC2012-Rule-1.3_b
+MISRAC2012-Rule-1.3_c
+MISRAC2012-Rule-1.3_d
+MISRAC2012-Rule-1.3_e
+MISRAC2012-Rule-1.3_f
+MISRAC2012-Rule-1.3_g
+MISRAC2012-Rule-1.3_h
+MISRAC2012-Rule-1.3_i
+MISRAC2012-Rule-1.3_j
+MISRAC2012-Rule-1.3_k
+MISRAC2012-Rule-1.3_l
+MISRAC2012-Rule-1.3_m
+MISRAC2012-Rule-1.3_n
+MISRAC2012-Rule-1.3_o
+MISRAC2012-Rule-1.3_p
+MISRAC2012-Rule-1.3_q
+MISRAC2012-Rule-1.3_r
+MISRAC2012-Rule-1.3_s
+MISRAC2012-Rule-1.3_t
+MISRAC2012-Rule-1.3_u
+MISRAC2012-Rule-1.3_v
+MISRAC2012-Rule-1.4
+MISRAC2012-Rule-1.5_b
+MISRAC2012-Rule-1.5_c
+MISRAC2012-Rule-1.5_d
+MISRAC2012-Rule-1.5_e
+MISRAC2012-Rule-1.5_f
+MISRAC2012-Rule-1.5_g
+MISRAC2012-Rule-2.1_a
+MISRAC2012-Rule-2.1_b
+MISRAC2012-Rule-2.2_a
+MISRAC2012-Rule-2.2_b
+MISRAC2012-Rule-2.2_c
+MISRAC2012-Rule-3.1
+MISRAC2012-Rule-3.2
+MISRAC2012-Rule-5.1
+MISRAC2012-Rule-5.2_c89
+MISRAC2012-Rule-5.2_c99
+MISRAC2012-Rule-5.3_c89
+MISRAC2012-Rule-5.3_c99
+MISRAC2012-Rule-5.4_c89
+MISRAC2012-Rule-5.4_c99
+MISRAC2012-Rule-5.5_c89
+MISRAC2012-Rule-5.5_c99
+MISRAC2012-Rule-5.6
+MISRAC2012-Rule-5.7
+MISRAC2012-Rule-5.8
+MISRAC2012-Rule-6.1
+MISRAC2012-Rule-6.2
+MISRAC2012-Rule-6.3
+MISRAC2012-Rule-7.1
+MISRAC2012-Rule-7.2
+MISRAC2012-Rule-7.3
+MISRAC2012-Rule-7.4_a
+MISRAC2012-Rule-7.4_b
+MISRAC2012-Rule-7.5
+MISRAC2012-Rule-7.6
+MISRAC2012-Rule-8.1
+MISRAC2012-Rule-8.2_a
+MISRAC2012-Rule-8.2_b
+MISRAC2012-Rule-8.3
+MISRAC2012-Rule-8.4
+MISRAC2012-Rule-8.5_a
+MISRAC2012-Rule-8.5_b
+MISRAC2012-Rule-8.10
+MISRAC2012-Rule-8.12
+MISRAC2012-Rule-8.14
+MISRAC2012-Rule-8.15
+MISRAC2012-Rule-9.1_a
+MISRAC2012-Rule-9.1_b
+MISRAC2012-Rule-9.1_d
+MISRAC2012-Rule-9.1_e
+MISRAC2012-Rule-9.2
+MISRAC2012-Rule-9.3
+MISRAC2012-Rule-9.4
+MISRAC2012-Rule-9.5_a
+MISRAC2012-Rule-9.5_b
+MISRAC2012-Rule-9.6
+MISRAC2012-Rule-9.7
+MISRAC2012-Rule-10.1_R2
+MISRAC2012-Rule-10.1_R3
+MISRAC2012-Rule-10.1_R4
+MISRAC2012-Rule-10.1_R5
+MISRAC2012-Rule-10.1_R6
+MISRAC2012-Rule-10.1_R7
+MISRAC2012-Rule-10.1_R8
+MISRAC2012-Rule-10.1_R10
+MISRAC2012-Rule-10.2
+MISRAC2012-Rule-10.3
+MISRAC2012-Rule-10.4_a
+MISRAC2012-Rule-10.4_b
+MISRAC2012-Rule-10.6
+MISRAC2012-Rule-10.7
+MISRAC2012-Rule-10.8
+MISRAC2012-Rule-11.1
+MISRAC2012-Rule-11.2
+MISRAC2012-Rule-11.3
+MISRAC2012-Rule-11.6
+MISRAC2012-Rule-11.7
+MISRAC2012-Rule-11.8
+MISRAC2012-Rule-11.9
+MISRAC2012-Rule-11.10
+MISRAC2012-Rule-12.2
+MISRAC2012-Rule-12.5
+MISRAC2012-Rule-12.6
+MISRAC2012-Rule-13.1
+MISRAC2012-Rule-13.2_a
+MISRAC2012-Rule-13.2_b
+MISRAC2012-Rule-13.2_c
+MISRAC2012-Rule-13.5
+MISRAC2012-Rule-13.6
+MISRAC2012-Rule-14.1_a
+MISRAC2012-Rule-14.1_b
+MISRAC2012-Rule-14.2
+MISRAC2012-Rule-14.3_a
+MISRAC2012-Rule-14.3_b
+MISRAC2012-Rule-14.4_a
+MISRAC2012-Rule-14.4_b
+MISRAC2012-Rule-14.4_c
+MISRAC2012-Rule-14.4_d
+MISRAC2012-Rule-15.2
+MISRAC2012-Rule-15.3
+MISRAC2012-Rule-15.6_a
+MISRAC2012-Rule-15.6_b
+MISRAC2012-Rule-15.6_c
+MISRAC2012-Rule-15.6_d
+MISRAC2012-Rule-15.6_e
+MISRAC2012-Rule-15.7
+MISRAC2012-Rule-16.1
+MISRAC2012-Rule-16.2
+MISRAC2012-Rule-16.3
+MISRAC2012-Rule-16.4
+MISRAC2012-Rule-16.5
+MISRAC2012-Rule-16.6
+MISRAC2012-Rule-16.7
+MISRAC2012-Rule-17.1
+MISRAC2012-Rule-17.2_a
+MISRAC2012-Rule-17.2_b
+MISRAC2012-Rule-17.3
+MISRAC2012-Rule-17.4
+MISRAC2012-Rule-17.5
+MISRAC2012-Rule-17.6
+MISRAC2012-Rule-17.7
+MISRAC2012-Rule-17.13
+MISRAC2012-Rule-18.1_a
+MISRAC2012-Rule-18.1_b
+MISRAC2012-Rule-18.1_c
+MISRAC2012-Rule-18.1_d
+MISRAC2012-Rule-18.2
+MISRAC2012-Rule-18.3
+MISRAC2012-Rule-18.4
+MISRAC2012-Rule-18.6_a
+MISRAC2012-Rule-18.6_b
+MISRAC2012-Rule-18.6_c
+MISRAC2012-Rule-18.6_d
+MISRAC2012-Rule-18.7
+MISRAC2012-Rule-18.8
+MISRAC2012-Rule-18.9
+MISRAC2012-Rule-18.10
+MISRAC2012-Rule-19.1
+MISRAC2012-Rule-20.2
+MISRAC2012-Rule-20.4_c89
+MISRAC2012-Rule-20.4_c99
+MISRAC2012-Rule-20.6_a
+MISRAC2012-Rule-20.6_b
+MISRAC2012-Rule-20.7
+MISRAC2012-Rule-21.1
+MISRAC2012-Rule-21.2
+MISRAC2012-Rule-21.3
+MISRAC2012-Rule-21.4
+MISRAC2012-Rule-21.5
+MISRAC2012-Rule-21.6
+MISRAC2012-Rule-21.7
+MISRAC2012-Rule-21.8
+MISRAC2012-Rule-21.9
+MISRAC2012-Rule-21.10
+MISRAC2012-Rule-21.12_a
+MISRAC2012-Rule-21.12_b
+MISRAC2012-Rule-21.12_c
+MISRAC2012-Rule-21.13
+MISRAC2012-Rule-21.14
+MISRAC2012-Rule-21.15
+MISRAC2012-Rule-21.16
+MISRAC2012-Rule-21.17_a
+MISRAC2012-Rule-21.17_b
+MISRAC2012-Rule-21.17_c
+MISRAC2012-Rule-21.17_d
+MISRAC2012-Rule-21.17_e
+MISRAC2012-Rule-21.17_f
+MISRAC2012-Rule-21.18_a
+MISRAC2012-Rule-21.18_b
+MISRAC2012-Rule-21.19_a
+MISRAC2012-Rule-21.19_b
+MISRAC2012-Rule-21.20
+MISRAC2012-Rule-21.21
+MISRAC2012-Rule-21.22
+MISRAC2012-Rule-21.23
+MISRAC2012-Rule-21.24
+MISRAC2012-Rule-21.25
+MISRAC2012-Rule-22.1_a
+MISRAC2012-Rule-22.1_b
+MISRAC2012-Rule-22.2_a
+MISRAC2012-Rule-22.2_b
+MISRAC2012-Rule-22.2_c
+MISRAC2012-Rule-22.3
+MISRAC2012-Rule-22.4
+MISRAC2012-Rule-22.5_a
+MISRAC2012-Rule-22.5_b
+MISRAC2012-Rule-22.6
+MISRAC2012-Rule-22.7_a
+MISRAC2012-Rule-22.7_b
+MISRAC2012-Rule-22.8
+MISRAC2012-Rule-22.9
+MISRAC2012-Rule-22.10
+MISRAC2012-Rule-23.2
+MISRAC2012-Rule-23.4
+MISRAC2012-Rule-23.6
+MISRAC2012-Rule-23.8
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 7df1b154a..79a9f459b 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -238,8 +238,10 @@ function(family_configure_common TARGET RTOS)
   if (NOT RTOS STREQUAL zephyr)
     if (NOT TARGET ${BOARD_TARGET})
       family_add_board(${BOARD_TARGET})
-      set_target_properties(${BOARD_TARGET} PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib)
-      set_target_properties(${BOARD_TARGET} PROPERTIES SKIP_LINTING ON)
+      set_target_properties(${BOARD_TARGET} PROPERTIES
+        ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib
+        SKIP_LINTING ON # need cmake 4.2
+        )
     endif ()
     target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET})
   endif ()
@@ -273,9 +275,7 @@ function(family_configure_common TARGET RTOS)
       target_sources(${TARGET} PUBLIC ${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c)
       target_include_directories(${TARGET}  PUBLIC ${TOP}/lib/SEGGER_RTT/RTT)
 #      target_compile_definitions(${TARGET}  PUBLIC SEGGER_RTT_MODE_DEFAULT=SEGGER_RTT_MODE_BLOCK_IF_FIFO_FULL)
-      set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c PROPERTIES
-        SKIP_LINTING ON
-        )
+      set_source_files_properties(${TOP}/lib/SEGGER_RTT/RTT/SEGGER_RTT.c PROPERTIES SKIP_LINTING ON)
     endif ()
   else ()
     target_compile_definitions(${TARGET} PUBLIC LOGGER_UART)
@@ -291,18 +291,20 @@ function(family_configure_common TARGET RTOS)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC "LINKER:--map=$<TARGET_FILE:${TARGET}>.map")
 
-    # link time analysis with C-STAT
-#    add_custom_command(TARGET ${TARGET} POST_BUILD
-#      COMMAND ${CMAKE_C_ICSTAT}
-#      --db=${CMAKE_BINARY_DIR}/cstat.db
-#      link_analyze -- ${CMAKE_LINKER} $<TARGET_OBJECTS:${TARGET}>
-#      COMMAND_EXPAND_LISTS
-#      )
-#    # generate C-STAT report
-#    add_custom_command(TARGET ${TARGET} POST_BUILD
-#      COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
-#      COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/${TARGET}.html
-#      )
+    if (IAR_CSTAT)
+      # link time analysis with C-STAT
+      add_custom_command(TARGET ${TARGET} POST_BUILD
+        COMMAND ${CMAKE_C_ICSTAT}
+        --db=${CMAKE_BINARY_DIR}/cstat.db
+        link_analyze -- ${CMAKE_LINKER} $<TARGET_OBJECTS:${TARGET}>
+        COMMAND_EXPAND_LISTS
+        )
+      # generate C-STAT report
+      add_custom_command(TARGET ${TARGET} POST_BUILD
+        COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
+        COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/index.html
+        )
+    endif ()
   endif ()
 
   # run size after build
-- 
cgit v1.3.1


From f39dcae9f1bed1dfcfb239f76677ef980a9976c9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Oct 2025 13:04:49 +0700
Subject: fix several warnings

---
 .../audio_4_channel_mic/src/usb_descriptors.c      |  2 +-
 .../src/usb_descriptors.c                          |  2 +-
 examples/device/audio_test/src/usb_descriptors.c   |  2 +-
 .../audio_test_freertos/src/usb_descriptors.c      |  2 +-
 .../audio_test_multi_rate/src/usb_descriptors.c    |  2 +-
 .../device/cdc_dual_ports/src/usb_descriptors.c    | 10 ++++----
 examples/device/cdc_msc/src/main.c                 | 19 +++++++++-----
 examples/device/cdc_msc/src/msc_disk.c             |  6 +++--
 examples/device/cdc_msc/src/usb_descriptors.c      | 12 ++++-----
 examples/device/cdc_msc_freertos/src/msc_disk.c    |  2 +-
 .../device/cdc_msc_freertos/src/usb_descriptors.c  | 12 ++++-----
 examples/device/cdc_uac2/src/usb_descriptors.c     | 12 ++++-----
 examples/device/dfu/src/usb_descriptors.c          |  4 +--
 examples/device/dfu_runtime/src/usb_descriptors.c  |  4 +--
 .../device/dynamic_configuration/src/msc_disk.c    |  2 +-
 .../dynamic_configuration/src/usb_descriptors.c    |  2 +-
 .../hid_boot_interface/src/usb_descriptors.c       |  4 +--
 .../device/hid_composite/src/usb_descriptors.c     |  8 +++---
 .../hid_composite_freertos/src/usb_descriptors.c   |  8 +++---
 .../device/hid_generic_inout/src/usb_descriptors.c |  4 +--
 .../hid_multiple_interface/src/usb_descriptors.c   |  4 +--
 examples/device/midi_test/src/usb_descriptors.c    |  8 +++---
 .../midi_test_freertos/src/usb_descriptors.c       |  8 +++---
 examples/device/msc_dual_lun/src/usb_descriptors.c |  8 +++---
 examples/device/mtp/src/usb_descriptors.c          | 10 ++++----
 .../net_lwip_webserver/src/usb_descriptors.c       |  2 +-
 examples/device/uac2_headset/src/usb_descriptors.c |  4 +--
 .../device/uac2_speaker_fb/src/usb_descriptors.c   |  4 +--
 examples/device/usbtmc/src/usb_descriptors.c       | 29 +++++++++++++++++-----
 .../device/video_capture/src/usb_descriptors.c     |  4 +--
 .../device/video_capture_2ch/src/usb_descriptors.c |  4 +--
 .../device/webusb_serial/src/usb_descriptors.c     |  4 +--
 .../host_hid_to_device_cdc/src/usb_descriptors.c   | 10 ++++----
 .../host_info_to_device_cdc/src/usb_descriptors.c  | 10 ++++----
 hw/bsp/board.c                                     | 16 +++---------
 hw/bsp/stm32h7/boards/stm32h743eval/board.h        |  2 +-
 src/common/tusb_common.h                           |  2 +-
 src/common/tusb_debug.h                            | 12 +++++----
 src/osal/osal.h                                    | 13 +++++-----
 39 files changed, 145 insertions(+), 128 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index 728a5f9ce..c8abf491d 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
index 728a5f9ce..c8abf491d 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index 9864377f6..5e448002d 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/audio_test_freertos/src/usb_descriptors.c b/examples/device/audio_test_freertos/src/usb_descriptors.c
index 9864377f6..5e448002d 100644
--- a/examples/device/audio_test_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_test_freertos/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index f50e70a25..e54af14fb 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -41,7 +41,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index bbcb479f5..6b3963814 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -127,7 +127,7 @@ enum {
   #define EPNUM_CDC_1_IN      0x84
 #endif
 
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -140,7 +140,7 @@ uint8_t const desc_fs_configuration[] = {
 
 #if TUD_OPT_HIGH_SPEED
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -152,7 +152,7 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
   .bLength            = sizeof(tusb_desc_device_t),
   .bDescriptorType    = TUSB_DESC_DEVICE,
   .bcdUSB             = USB_BCD,
@@ -213,7 +213,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] = {
+static char const *string_desc_arr[] = {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 4e7aa989e..c4606528a 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -42,6 +42,7 @@ enum {
 };
 
 static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
+static bool blink_enable = true;
 
 void led_blinking_task(void);
 void cdc_task(void);
@@ -135,11 +136,13 @@ void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
   (void) itf;
   (void) rts;
 
-  // TODO set some indicator
   if (dtr) {
     // Terminal connected
+    blink_enable = false;
+    board_led_write(true);
   } else {
     // Terminal disconnected
+    blink_enable = true;
   }
 }
 
@@ -155,10 +158,14 @@ void led_blinking_task(void) {
   static uint32_t start_ms = 0;
   static bool led_state = false;
 
-  // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
-  start_ms += blink_interval_ms;
+  if (blink_enable) {
+    // Blink every interval ms
+    if (board_millis() - start_ms < blink_interval_ms) {
+      return; // not enough time
+    }
+    start_ms += blink_interval_ms;
 
-  board_led_write(led_state);
-  led_state = 1 - led_state; // toggle
+    board_led_write(led_state);
+    led_state = !led_state;
+  }
 }
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index 6c112aa8b..9a43d321e 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -48,7 +48,7 @@ enum {
 #ifdef CFG_EXAMPLE_MSC_READONLY
 const
 #endif
-uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = {
+static uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = {
   //------------- Block0: Boot Sector -------------//
   // byte_per_sector    = DISK_BLOCK_SIZE; fat12_sector_num_16  = DISK_BLOCK_NUM;
   // sector_per_cluster = 1; reserved_sectors = 1;
@@ -213,7 +213,9 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t *
   (void) lun;
 
   // out of ramdisk
-  if (lba >= DISK_BLOCK_NUM) return -1;
+  if (lba >= DISK_BLOCK_NUM) {
+    return -1;
+  }
 
   #ifndef CFG_EXAMPLE_MSC_READONLY
   uint8_t *addr = msc_disk[lba] + offset;
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index 597a6b1e6..4fe03f90e 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -125,7 +125,7 @@ enum {
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN)
 
 // full speed configuration
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -140,7 +140,7 @@ uint8_t const desc_fs_configuration[] = {
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -152,10 +152,10 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
     .bLength            = sizeof(tusb_desc_device_qualifier_t),
     .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
     .bcdUSB             = USB_BCD,
@@ -223,7 +223,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] = {
+static char const *string_desc_arr[] = {
     (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
     "TinyUSB",                     // 1: Manufacturer
     "TinyUSB Device",              // 2: Product
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index 38345ca4d..996be738d 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -79,7 +79,7 @@ enum {
 #ifdef CFG_EXAMPLE_MSC_READONLY
 const
 #endif
-uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
+static uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
 {
   //------------- Block0: Boot Sector -------------//
   // byte_per_sector    = DISK_BLOCK_SIZE; fat12_sector_num_16  = DISK_BLOCK_NUM;
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index cb440c209..bcfef48a7 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -124,7 +124,7 @@ enum {
 
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN + TUD_MSC_DESC_LEN)
 
-uint8_t const desc_fs_configuration[] =
+static uint8_t const desc_fs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -140,7 +140,7 @@ uint8_t const desc_fs_configuration[] =
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] =
+static uint8_t const desc_hs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -153,10 +153,10 @@ uint8_t const desc_hs_configuration[] =
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier =
+static tusb_desc_device_qualifier_t const desc_device_qualifier =
 {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
@@ -225,7 +225,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] = {
+static char const *string_desc_arr[] = {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index da55bdb5a..748c36b7b 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -116,7 +116,7 @@ uint8_t const * tud_descriptor_device_cb(void)
   #define EPNUM_CDC_IN      0x84
 #endif
 
-uint8_t const desc_fs_configuration[] =
+static uint8_t const desc_fs_configuration[] =
 {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -132,7 +132,7 @@ uint8_t const desc_fs_configuration[] =
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -144,10 +144,10 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
     .bLength            = sizeof(tusb_desc_device_qualifier_t),
     .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
     .bcdUSB             = 0x0100,
@@ -215,7 +215,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
diff --git a/examples/device/dfu/src/usb_descriptors.c b/examples/device/dfu/src/usb_descriptors.c
index fd469aaf2..1550b70b8 100644
--- a/examples/device/dfu/src/usb_descriptors.c
+++ b/examples/device/dfu/src/usb_descriptors.c
@@ -40,7 +40,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -126,7 +126,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/dfu_runtime/src/usb_descriptors.c b/examples/device/dfu_runtime/src/usb_descriptors.c
index 7ac53d255..c5cc9f92f 100644
--- a/examples/device/dfu_runtime/src/usb_descriptors.c
+++ b/examples/device/dfu_runtime/src/usb_descriptors.c
@@ -40,7 +40,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -122,7 +122,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index e57f9e3f3..95bf8e45f 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -46,7 +46,7 @@ enum
 #ifdef CFG_EXAMPLE_MSC_READONLY
 const
 #endif
-uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
+static uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] =
 {
   //------------- Block0: Boot Sector -------------//
   // byte_per_sector    = DISK_BLOCK_SIZE; fat12_sector_num_16  = DISK_BLOCK_NUM;
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 0a2049288..7660e59dd 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -202,7 +202,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c
index d68ef16d9..d9ce4ef09 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.c
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.c
@@ -40,7 +40,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -140,7 +140,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c
index ce7fbd13f..7b1f4f8d8 100644
--- a/examples/device/hid_composite/src/usb_descriptors.c
+++ b/examples/device/hid_composite/src/usb_descriptors.c
@@ -43,7 +43,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -120,10 +120,10 @@ uint8_t const desc_configuration[] =
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier =
+static tusb_desc_device_qualifier_t const desc_device_qualifier =
 {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
@@ -188,7 +188,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c
index 3f231fecc..1d703beff 100644
--- a/examples/device/hid_composite_freertos/src/usb_descriptors.c
+++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c
@@ -43,7 +43,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -119,10 +119,10 @@ uint8_t const desc_configuration[] =
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier =
+static tusb_desc_device_qualifier_t const desc_device_qualifier =
 {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
@@ -185,7 +185,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c
index 64f6d17ae..1b5c055e6 100644
--- a/examples/device/hid_generic_inout/src/usb_descriptors.c
+++ b/examples/device/hid_generic_inout/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -130,7 +130,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/hid_multiple_interface/src/usb_descriptors.c b/examples/device/hid_multiple_interface/src/usb_descriptors.c
index 86f567e8e..145836300 100644
--- a/examples/device/hid_multiple_interface/src/usb_descriptors.c
+++ b/examples/device/hid_multiple_interface/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -146,7 +146,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index 384742ae8..8cb235d30 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
@@ -98,7 +98,7 @@ enum {
   #define EPNUM_MIDI_IN   0x81
 #endif
 
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -107,7 +107,7 @@ uint8_t const desc_fs_configuration[] = {
 };
 
 #if TUD_OPT_HIGH_SPEED
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -143,7 +143,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] = {
+static char const *string_desc_arr[] = {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
diff --git a/examples/device/midi_test_freertos/src/usb_descriptors.c b/examples/device/midi_test_freertos/src/usb_descriptors.c
index 384742ae8..8cb235d30 100644
--- a/examples/device/midi_test_freertos/src/usb_descriptors.c
+++ b/examples/device/midi_test_freertos/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = 0x0200,
@@ -98,7 +98,7 @@ enum {
   #define EPNUM_MIDI_IN   0x81
 #endif
 
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -107,7 +107,7 @@ uint8_t const desc_fs_configuration[] = {
 };
 
 #if TUD_OPT_HIGH_SPEED
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -143,7 +143,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] = {
+static char const *string_desc_arr[] = {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
   "TinyUSB Device",              // 2: Product
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index efb9a966d..e3a0753b5 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -39,7 +39,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -103,7 +103,7 @@ enum
 
 #endif
 
-uint8_t const desc_fs_configuration[] =
+static uint8_t const desc_fs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -113,7 +113,7 @@ uint8_t const desc_fs_configuration[] =
 };
 
 #if TUD_OPT_HIGH_SPEED
-uint8_t const desc_hs_configuration[] =
+static uint8_t const desc_hs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -151,7 +151,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/mtp/src/usb_descriptors.c b/examples/device/mtp/src/usb_descriptors.c
index 80345d8f8..ff35e0df3 100644
--- a/examples/device/mtp/src/usb_descriptors.c
+++ b/examples/device/mtp/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -121,7 +121,7 @@ const uint8_t desc_fs_configuration[] = {
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
   // Interface number, string index, EP event, EP event size, EP event polling, EP Out & EP In address, EP size
@@ -129,10 +129,10 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
     .bLength            = sizeof(tusb_desc_device_qualifier_t),
     .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
     .bcdUSB             = USB_BCD,
@@ -198,7 +198,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUsb",                     // 1: Manufacturer
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index cd800f521..57ee3a218 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -68,7 +68,7 @@ enum
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index fc12c122e..d2f4f45b3 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -41,7 +41,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -141,7 +141,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index ee1b92225..cc904031b 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -45,7 +45,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -230,7 +230,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 },  // 0: is supported language is English (0x0409)
   "TinyUSB",                      // 1: Manufacturer
diff --git a/examples/device/usbtmc/src/usb_descriptors.c b/examples/device/usbtmc/src/usb_descriptors.c
index 85acd990a..d03c64102 100644
--- a/examples/device/usbtmc/src/usb_descriptors.c
+++ b/examples/device/usbtmc/src/usb_descriptors.c
@@ -44,7 +44,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -112,7 +112,7 @@ enum
 
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_USBTMC_DESC_LEN)
 
-uint8_t const desc_fs_configuration[] =
+static uint8_t const desc_fs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -122,7 +122,7 @@ uint8_t const desc_fs_configuration[] =
 
 #if TUD_OPT_HIGH_SPEED
 
-uint8_t const desc_hs_configuration[] =
+static uint8_t const desc_hs_configuration[] =
 {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
@@ -131,10 +131,10 @@ uint8_t const desc_hs_configuration[] =
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier =
+static tusb_desc_device_qualifier_t const desc_device_qualifier =
 {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
@@ -158,6 +158,23 @@ uint8_t const* tud_descriptor_device_qualifier_cb(void)
   return (uint8_t const*) &desc_device_qualifier;
 }
 
+// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa
+uint8_t const *tud_descriptor_other_speed_configuration_cb(uint8_t index) {
+  (void) index; // for multiple configurations
+
+  // if link speed is high return fullspeed config, and vice versa
+  // Note: the descriptor type is OTHER_SPEED_CONFIG instead of CONFIG
+  memcpy(desc_other_speed_config,
+         (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_fs_configuration : desc_hs_configuration,
+         CONFIG_TOTAL_LEN);
+
+  desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG;
+
+  return desc_other_speed_config;
+}
+
 #endif
 
 // Invoked when received GET CONFIGURATION DESCRIPTOR
@@ -187,7 +204,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index b3e19b0f0..775386c65 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -63,7 +63,7 @@ char const* string_desc_arr[] = {
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -384,7 +384,7 @@ static uint8_t * get_hs_configuration_desc(void) {
 }
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
diff --git a/examples/device/video_capture_2ch/src/usb_descriptors.c b/examples/device/video_capture_2ch/src/usb_descriptors.c
index e78e452fc..03fac2d5c 100644
--- a/examples/device/video_capture_2ch/src/usb_descriptors.c
+++ b/examples/device/video_capture_2ch/src/usb_descriptors.c
@@ -68,7 +68,7 @@ char const* string_desc_arr[] = {
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -551,7 +551,7 @@ static uint8_t * get_hs_configuration_desc(void) {
 }
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index 2b69a5b56..044a6b294 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -40,7 +40,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device =
+static tusb_desc_device_t const desc_device =
 {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
@@ -228,7 +228,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const *string_desc_arr[] =
+static char const *string_desc_arr[] =
 {
   (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
   "TinyUSB",                     // 1: Manufacturer
diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
index b7cffe23d..c2377cb00 100644
--- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -122,7 +122,7 @@ enum {
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN)
 
 // full speed configuration
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -134,7 +134,7 @@ uint8_t const desc_fs_configuration[] = {
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -143,10 +143,10 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
   .bcdUSB             = USB_BCD,
diff --git a/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
index b7cffe23d..c2377cb00 100644
--- a/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
@@ -42,7 +42,7 @@
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-tusb_desc_device_t const desc_device = {
+static tusb_desc_device_t const desc_device = {
     .bLength            = sizeof(tusb_desc_device_t),
     .bDescriptorType    = TUSB_DESC_DEVICE,
     .bcdUSB             = USB_BCD,
@@ -122,7 +122,7 @@ enum {
 #define CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN)
 
 // full speed configuration
-uint8_t const desc_fs_configuration[] = {
+static uint8_t const desc_fs_configuration[] = {
     // Config number, interface count, string index, total length, attribute, power in mA
     TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -134,7 +134,7 @@ uint8_t const desc_fs_configuration[] = {
 // Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
 
 // high speed configuration
-uint8_t const desc_hs_configuration[] = {
+static uint8_t const desc_hs_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, 0x00, 100),
 
@@ -143,10 +143,10 @@ uint8_t const desc_hs_configuration[] = {
 };
 
 // other speed configuration
-uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
+static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
 
 // device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-tusb_desc_device_qualifier_t const desc_device_qualifier = {
+static tusb_desc_device_qualifier_t const desc_device_qualifier = {
   .bLength            = sizeof(tusb_desc_device_qualifier_t),
   .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
   .bcdUSB             = USB_BCD,
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 41e6eb1b8..476ec6733 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -51,7 +51,7 @@ int sys_read(int fhdl, char *buf, size_t count) TU_ATTR_USED;
 
 int sys_write(int fhdl, const char *buf, size_t count) {
   (void) fhdl;
-  SEGGER_RTT_Write(0, (const char *) buf, (int) count);
+  SEGGER_RTT_Write(0, buf, (int) count);
   return (int) count;
 }
 
@@ -111,16 +111,6 @@ int sys_read (int fhdl, char *buf, size_t count) {
 
 #endif
 
-//int _close(int fhdl) {
-//  (void) fhdl;
-//  return 0;
-//}
-
-//int _fstat(int file, struct stat *st) {
-//  memset(st, 0, sizeof(*st));
-//  st->st_mode = S_IFCHR;
-//}
-
 // Clang use picolibc
 #if defined(__clang__)
 static int cl_putc(char c, FILE *f) {
@@ -147,8 +137,8 @@ TU_ATTR_WEAK size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   (void) max_len;
   // fixed serial string is 01234567889ABCDEF
   uint32_t* uid32 = (uint32_t*) (uintptr_t)id;
-  uid32[0] = 0x67452301;
-  uid32[1] = 0xEFCDAB89;
+  uid32[0] = 0x67452301u;
+  uid32[1] = 0xEFCDAB89u;
   return 8;
 }
 
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index cfffc7770..96bfc24e1 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -61,7 +61,7 @@ static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOA,
     .pin_init = { .Pin = GPIO_PIN_4, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
-    .active_state = 1
+    .active_state = 0
   },
   { // Button
     .port = GPIOC,
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 50c1be2c6..dfa9299c1 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -131,7 +131,7 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, c
   }
 
   // For memcpy, src may be NULL only if count == 0. Reject otherwise.
-  if (src == NULL && count != 0) {
+  if (src == NULL && count != 0u) {
     return -1;
   }
 
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 1d0c6f1ad..86517b9c9 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -58,8 +58,10 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
   #define tu_printf    printf
 #endif
 
-static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
-  for(uint32_t i=0; i<bufsize; i++) tu_printf("%02X ", buf[i]);
+TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
+  for(uint32_t i=0; i<bufsize; i++) {
+    tu_printf("%02X ", buf[i]);
+  }
   tu_printf("\r\n");
 }
 
@@ -109,7 +111,9 @@ typedef struct {
 
 static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint32_t key) {
   for(uint16_t i=0; i<p_table->count; i++) {
-    if (p_table->items[i].key == key) { return p_table->items[i].data; }
+    if (p_table->items[i].key == key) {
+      return p_table->items[i].data;
+    }
   }
 
   // not found return the key value in hex
@@ -130,8 +134,6 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
   #define TU_LOG_FAILED()
 #endif
 
-// TODO replace all TU_LOGn with TU_LOG(n)
-
 #define TU_LOG0(...)
 #define TU_LOG0_MEM(...)
 #define TU_LOG0_BUF(...)
diff --git a/src/osal/osal.h b/src/osal/osal.h
index a33280425..8faa81b07 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -71,10 +71,9 @@ typedef void (*osal_task_func_t)( void * );
   #error OS is not supported yet
 #endif
 
-//--------------------------------------------------------------------+
-// OSAL Porting API
-// Should be implemented as static inline function in osal_port.h header
-/*
+/*--------------------------------------------------------------------
+  OSAL Porting API
+  Should be implemented as static inline function in osal_port.h header
    void osal_spin_init(osal_spinlock_t *ctx);
    void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr)
    void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr);
@@ -83,7 +82,7 @@ typedef void (*osal_task_func_t)( void * );
    bool osal_semaphore_delete(osal_semaphore_t semd_hdl);
    bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr);
    bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec);
-   void osal_semaphore_reset(osal_semaphore_t sem_hdl); // TODO removed
+   void osal_semaphore_reset(osal_semaphore_t sem_hdl);
 
    osal_mutex_t osal_mutex_create(osal_mutex_def_t* mdef);
    bool osal_mutex_delete(osal_mutex_t mutex_hdl)
@@ -95,8 +94,8 @@ typedef void (*osal_task_func_t)( void * );
    bool osal_queue_receive(osal_queue_t qhdl, void* data, uint32_t msec);
    bool osal_queue_send(osal_queue_t qhdl, void const * data, bool in_isr);
    bool osal_queue_empty(osal_queue_t qhdl);
-*/
-//--------------------------------------------------------------------+
+--------------------------------------------------------------------------*/
+
 
 #ifdef __cplusplus
  }
-- 
cgit v1.3.1


From 55c6d07af314627c55d595cc74d0d7694ce6f091 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 24 Oct 2025 14:28:59 +0700
Subject: fix more warnings

---
 hw/bsp/board_api.h                    |  6 ++++--
 hw/bsp/samd5x_e5x/family.c            |  2 +-
 hw/bsp/stm32f4/family.c               |  2 +-
 hw/bsp/stm32f7/family.c               |  2 +-
 hw/bsp/stm32h7/family.c               |  4 ++--
 hw/bsp/stm32h7rs/family.c             |  2 +-
 hw/bsp/stm32n6/family.c               |  2 +-
 src/common/tusb_types.h               |  8 ++++----
 src/device/dcd.h                      |  2 +-
 src/osal/osal.h                       |  2 +-
 src/osal/osal_none.h                  |  4 ++--
 src/portable/synopsys/dwc2/dcd_dwc2.c |  6 +++---
 src/tusb.c                            |  8 ++++++--
 src/tusb_option.h                     | 10 +++++-----
 14 files changed, 33 insertions(+), 27 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 5ecd7797a..80d86a4aa 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -154,11 +154,13 @@ static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars
   // TODO work with make, but not working with esp32s3 cmake
   uid_len = board_get_unique_id(uid, sizeof(uid));
 
-  if ( uid_len > max_chars / 2 ) uid_len = max_chars / 2;
+  if ( uid_len > max_chars / 2u ) {
+    uid_len = max_chars / 2u;
+  }
 
   for ( size_t i = 0; i < uid_len; i++ ) {
     for ( size_t j = 0; j < 2; j++ ) {
-      const char nibble_to_hex[16] = {
+      const unsigned char nibble_to_hex[16] = {
           '0', '1', '2', '3', '4', '5', '6', '7',
           '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
       };
diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c
index d53aa00d6..df6f19d0f 100644
--- a/hw/bsp/samd5x_e5x/family.c
+++ b/hw/bsp/samd5x_e5x/family.c
@@ -179,7 +179,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   for (int i = 0; i < 4; i++) {
     uint32_t did = *((uint32_t const*) did_addr[i]);
     did = TU_BSWAP32(did); // swap endian to match samd51 uf2 bootloader
-    memcpy(id + i * 4, &did, 4);
+    memcpy(id + i * 4, &did, sizeof(uint32_t));
   }
 
   return 16;
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 260927903..6e02b0575 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -54,7 +54,7 @@ void OTG_HS_IRQHandler(void) {
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle = {
+static UART_HandleTypeDef UartHandle = {
     .Instance = UART_DEV,
     .Init = {
       .BaudRate   = CFG_BOARD_UART_BAUDRATE,
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index bf2d28e42..38dfaa3bc 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -46,7 +46,7 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle = {
+static UART_HandleTypeDef UartHandle = {
   .Instance = UART_DEV,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 4f80b15ff..7b618b2e4 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -49,7 +49,7 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle = {
+static UART_HandleTypeDef UartHandle = {
   .Instance = UART_DEV,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
@@ -127,7 +127,7 @@ void board_init(void) {
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
+  SysTick_Config(SystemCoreClock / 1000u);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
   // Explicitly disable systick to prevent its ISR runs before scheduler start
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 80ac81125..6192f7a40 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -49,7 +49,7 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle = {
+static UART_HandleTypeDef UartHandle = {
   .Instance = UART_DEV,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 1d0616d8e..58be4867d 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -62,7 +62,7 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle = {
+static UART_HandleTypeDef UartHandle = {
   .Instance = UART_DEV,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index ec01bbf0f..c0b7469ed 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -77,9 +77,9 @@
  *------------------------------------------------------------------*/
 
 typedef enum {
-  TUSB_ROLE_INVALID = 0,
-  TUSB_ROLE_DEVICE  = 0x1,
-  TUSB_ROLE_HOST    = 0x2,
+  TUSB_ROLE_INVALID = 0u,
+  TUSB_ROLE_DEVICE  = 0x1u,
+  TUSB_ROLE_HOST    = 0x2u,
 } tusb_role_t;
 
 /// defined base on EHCI specs value for Endpoint Speed
@@ -178,7 +178,7 @@ typedef enum {
 } tusb_request_feature_selector_t;
 
 typedef enum {
-  TUSB_REQ_TYPE_STANDARD = 0,
+  TUSB_REQ_TYPE_STANDARD = 0u,
   TUSB_REQ_TYPE_CLASS,
   TUSB_REQ_TYPE_VENDOR,
   TUSB_REQ_TYPE_INVALID
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 400f62bff..436c4555f 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -79,7 +79,7 @@ typedef struct TU_ATTR_ALIGNED(4) {
 
     // FUNC_CALL
     struct {
-      void (*func) (void*);
+      void (*func) (void* param);
       void* param;
     }func_call;
   };
diff --git a/src/osal/osal.h b/src/osal/osal.h
index 8faa81b07..658b18584 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -33,7 +33,7 @@
 
 #include "common/tusb_common.h"
 
-typedef void (*osal_task_func_t)( void * );
+typedef void (*osal_task_func_t)(void* param);
 
 // Timeout
 #define OSAL_TIMEOUT_NOTIMEOUT     (0)          // Return immediately
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 3e397ef35..6f9b8b0dc 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -35,7 +35,7 @@ extern "C" {
 // Spinlock API
 //--------------------------------------------------------------------+
 typedef struct {
-  void (* interrupt_set)(bool);
+  void (* interrupt_set)(bool enabled);
 } osal_spinlock_t;
 
 // For SMP, spinlock must be locked by hardware, cannot just use interrupt
@@ -141,7 +141,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_mutex_unlock(osal_mutex_t mutex_hd
 #include "common/tusb_fifo.h"
 
 typedef struct {
-  void (* interrupt_set)(bool);
+  void (* interrupt_set)(bool enabled);
   tu_fifo_t ff;
 } osal_queue_def_t;
 
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index f1e4dbd77..8560b2109 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -379,7 +379,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
 
     // Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
     if (dir == TUSB_DIR_IN && total_bytes != 0) {
-      dwc2->diepempmsk |= (1 << epnum);
+      dwc2->diepempmsk |= (1u << epnum);
     }
   }
 }
@@ -402,7 +402,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // Set device max speed
   uint32_t dcfg = dwc2->dcfg & ~DCFG_DSPD_Msk;
   if (is_highspeed) {
-    dcfg |= DCFG_DSPD_HS << DCFG_DSPD_Pos;
+    // dcfg Highspeed's mask is 0
 
     // XCVRDLY: transceiver delay between xcvr_sel and txvalid during device chirp is required
     // when using with some PHYs such as USB334x (USB3341, USB3343, USB3346, USB3347)
@@ -914,7 +914,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
     // Turn off TXFE if all bytes are written.
     tsiz.value = epin->tsiz;
     if (tsiz.xfer_size == 0) {
-      dwc2->diepempmsk &= ~(1 << epnum);
+      dwc2->diepempmsk &= ~(1u << epnum);
     }
   }
 }
diff --git a/src/tusb.c b/src/tusb.c
index 083e6d861..d52c156ab 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -576,8 +576,12 @@ void tu_print_mem(void const* buf, uint32_t count, uint8_t indent) {
 
     if (i % item_per_line == 0) {
       // Print Ascii
-      if (i != 0) dump_str_line(buf8 - 16, 16);
-      for (uint8_t s = 0; s < indent; s++) tu_printf(" ");
+      if (i != 0) {
+        dump_str_line(buf8 - 16, 16);
+      }
+      for (uint8_t s = 0; s < indent; s++) {
+        tu_printf(" ");
+      }
       // print offset or absolute address
       tu_printf("%04X: ", 16 * i / item_per_line);
     }
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 9d5aed252..14404c59c 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -244,11 +244,11 @@
 #define OPT_MODE_HOST           0x0002 ///< Host Mode
 
 // High byte is max operational speed (corresponding to tusb_speed_t)
-#define OPT_MODE_DEFAULT_SPEED  0x0000 ///< Default (max) speed supported by MCU
-#define OPT_MODE_LOW_SPEED      0x0100 ///< Low Speed
-#define OPT_MODE_FULL_SPEED     0x0200 ///< Full Speed
-#define OPT_MODE_HIGH_SPEED     0x0400 ///< High Speed
-#define OPT_MODE_SPEED_MASK     0xff00
+#define OPT_MODE_DEFAULT_SPEED  0x0000u ///< Default (max) speed supported by MCU
+#define OPT_MODE_LOW_SPEED      0x0100u ///< Low Speed
+#define OPT_MODE_FULL_SPEED     0x0200u ///< Full Speed
+#define OPT_MODE_HIGH_SPEED     0x0400u ///< High Speed
+#define OPT_MODE_SPEED_MASK     0xff00u
 
 //--------------------------------------------------------------------+
 // Include tusb_config.h
-- 
cgit v1.3.1


From 42f000df8e52cfe0a46867a5e1fa5817cd58bc8a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 25 Oct 2025 17:36:01 +0700
Subject: iar cstat require cmake at least 4.1

---
 .github/workflows/static_analysis.yml               | 19 +++++++++++++++----
 examples/build_system/cmake/toolchain/arm_iar.cmake |  1 +
 hw/bsp/family_support.cmake                         |  8 ++++----
 3 files changed, 20 insertions(+), 8 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/static_analysis.yml b/.github/workflows/static_analysis.yml
index e060dfbc9..0af8ac42c 100644
--- a/.github/workflows/static_analysis.yml
+++ b/.github/workflows/static_analysis.yml
@@ -202,23 +202,34 @@ jobs:
         with:
           toolchain: 'arm-iar'
 
-      - name: Run IAR C-STAT Analysis
+      - name: Install CMake 4.2
+        run: |
+          # IAR CSTAT requires CMake >= 4.1
+          wget -q https://github.com/Kitware/CMake/releases/download/v4.2.0-rc1/cmake-4.2.0-rc1-linux-x86_64.tar.gz
+          tar -xzf cmake-4.2.0-rc1-linux-x86_64.tar.gz
+          echo "${{ github.workspace }}/cmake-4.2.0-rc1-linux-x86_64/bin" >> $GITHUB_PATH
+
+      - name: Build and run IAR C-STAT Analysis
         env:
           IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
         run: |
           # CMake run post build to generate C-STAT SARIF report
+          cmake --version
           mkdir -p build
-          cmake examples -B build -G Ninja -DBOARD=${{ matrix.board }} -DTOOLCHAIN=iar -DIAR_CSTAT=1 -DCMAKE_BUILD_TYPE=MinSizeRel
+          cmake examples/device/cdc_msc -B build -G Ninja -DBOARD=${{ matrix.board }} -DTOOLCHAIN=iar -DIAR_CSTAT=1 -DCMAKE_BUILD_TYPE=MinSizeRel
           cmake --build build
+          # Merge sarif files for codeql upload
+          npm i -g @microsoft/sarif-multitool
+          npx @microsoft/sarif-multitool merge --merge-runs --output-file iar-cstat-${{ matrix.board }}.sarif build/cstat_sarif/*.sarif
 
       - name: Upload SARIF
         uses: github/codeql-action/upload-sarif@v4
         with:
-          sarif_file: build/cstat_sarif
+          sarif_file: iar-cstat-${{ matrix.board }}.sarif
           category: IAR-CStat
 
       - name: Upload artifact
         uses: actions/upload-artifact@v5
         with:
           name: iar-cstat-${{ matrix.board }}
-          path: build/cstat_sarif
+          path: iar-cstat-${{ matrix.board }}.sarif
diff --git a/examples/build_system/cmake/toolchain/arm_iar.cmake b/examples/build_system/cmake/toolchain/arm_iar.cmake
index 42b057020..f4c0a500e 100644
--- a/examples/build_system/cmake/toolchain/arm_iar.cmake
+++ b/examples/build_system/cmake/toolchain/arm_iar.cmake
@@ -19,6 +19,7 @@ find_program(CMAKE_IAR_CHECKS ichecks)
 find_program(CMAKE_IAR_REPORT ireport)
 
 if (IAR_CSTAT)
+cmake_minimum_required(VERSION 4.1)
 set(CMAKE_C_ICSTAT ${CMAKE_IAR_CSTAT} --checks=${CMAKE_CURRENT_LIST_DIR}/cstat_sel_checks.txt --db=${CMAKE_BINARY_DIR}/cstat.db --sarif_dir=${CMAKE_BINARY_DIR}/cstat_sarif)
 endif ()
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 79a9f459b..912e0f4d7 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -300,10 +300,10 @@ function(family_configure_common TARGET RTOS)
         COMMAND_EXPAND_LISTS
         )
       # generate C-STAT report
-      add_custom_command(TARGET ${TARGET} POST_BUILD
-        COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
-        COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/index.html
-        )
+#      add_custom_command(TARGET ${TARGET} POST_BUILD
+#        COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
+#        COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/index.html
+#        )
     endif ()
   endif ()
 
-- 
cgit v1.3.1


From d55e074a36de0331006fca1a19a241e98f9bd7e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 27 Oct 2025 17:11:42 +0700
Subject: improve warnings with rp2040 family

---
 hw/bsp/family_support.cmake                    | 55 ++-------------------
 hw/bsp/rp2040/family.c                         |  2 +-
 hw/bsp/rp2040/family.cmake                     | 66 +++++++++++++++-----------
 src/portable/raspberrypi/pio_usb/hcd_pio_usb.c | 11 +++++
 4 files changed, 54 insertions(+), 80 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 912e0f4d7..16c0d48d7 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -63,8 +63,9 @@ set(WARN_FLAGS_GNU
   -Wunused
   -Wunused-function
   -Wreturn-type
-  #-Wredundant-decls
-  #-Wmissing-prototypes
+  -Wredundant-decls
+  -Wmissing-prototypes
+#  -Wconversion
   )
 set(WARN_FLAGS_Clang ${WARN_FLAGS_GNU})
 
@@ -391,56 +392,6 @@ function(family_example_missing_dependency TARGET DEPENDENCY)
   message(WARNING "${DEPENDENCY} submodule needed by ${TARGET} not found, please run 'python tools/get_deps.py ${DEPENDENCY}' to fetch it")
 endfunction()
 
-#----------------------------------
-# RPI specific: refactor later
-#----------------------------------
-function(family_add_default_example_warnings TARGET)
-  target_compile_options(${TARGET} PUBLIC
-    -Wall
-    -Wextra
-    -Werror
-    -Wfatal-errors
-    -Wdouble-promotion
-    -Wfloat-equal
-    # FIXME commented out because of https://github.com/raspberrypi/pico-sdk/issues/1468
-    #-Wshadow
-    -Wwrite-strings
-    -Wsign-compare
-    -Wmissing-format-attribute
-    -Wunreachable-code
-    -Wcast-align
-    -Wcast-qual
-    -Wnull-dereference
-    -Wuninitialized
-    -Wunused
-    -Wredundant-decls
-    #-Wstrict-prototypes
-    #-Werror-implicit-function-declaration
-    #-Wundef
-    )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0 AND NO_WARN_RWX_SEGMENTS_SUPPORTED)
-      target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
-    endif()
-
-    # GCC 10
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
-      target_compile_options(${TARGET} PUBLIC -Wconversion)
-    endif()
-
-    # GCC 8
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
-      target_compile_options(${TARGET} PUBLIC -Wcast-function-type -Wstrict-overflow)
-    endif()
-
-    # GCC 6
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
-      target_compile_options(${TARGET} PUBLIC -Wno-strict-aliasing)
-    endif()
-  endif()
-endfunction()
-
 #----------------------------------
 # Flashing target
 #----------------------------------
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 989140e02..35e5fc923 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -92,7 +92,7 @@ static uart_inst_t *uart_inst;
 //
 // This doesn't work if others are trying to access flash at the same time,
 // e.g. XIP streamer, or the other core.
-bool __no_inline_not_in_flash_func(get_bootsel_button)(void) {
+static bool __no_inline_not_in_flash_func(get_bootsel_button)(void) {
   const uint CS_PIN_INDEX = 1;
 
   // Must disable interrupts, as interrupt handlers may be in flash, and we
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 3bec5bf70..5d6d8b40e 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -184,6 +184,43 @@ endif()
 #------------------------------------
 # Functions
 #------------------------------------
+function(family_add_default_example_warnings TARGET)
+  # Apply warnings to all TinyUSB interface library sources as well as examples sources
+  # we cannot set compile options for target since it will not propagate to INTERFACE sources then picosdk files
+  foreach(TINYUSB_TARGET IN ITEMS tinyusb_common_base tinyusb_device_base tinyusb_host_base tinyusb_host_max3421 tinyusb_bsp)
+    get_target_property(TINYUSB_SOURCES ${TINYUSB_TARGET} INTERFACE_SOURCES)
+    set_source_files_properties(${TINYUSB_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
+  endforeach()
+
+  # Also apply to example sources, but filter out any source files from lib/ (e.g. fatfs)
+  get_target_property(EXAMPLE_SOURCES ${TARGET} SOURCES)
+  set(FILTERED_SOURCES "")
+  foreach(SOURCE_FILE IN LISTS EXAMPLE_SOURCES)
+    string(FIND "${SOURCE_FILE}" "${TOP}/lib" FOUND_POS)
+    if(FOUND_POS EQUAL -1)
+      list(APPEND FILTERED_SOURCES ${SOURCE_FILE})
+    endif()
+  endforeach()
+  set_source_files_properties(${FILTERED_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0 AND NO_WARN_RWX_SEGMENTS_SUPPORTED)
+      target_link_options(${TARGET} PRIVATE "LINKER:--no-warn-rwx-segments")
+    endif()
+
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
+      target_compile_options(${TARGET} PRIVATE -Wconversion)
+    endif()
+
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
+      target_compile_options(${TARGET} PRIVATE -Wcast-function-type -Wstrict-overflow)
+    endif()
+
+    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
+      target_compile_options(${TARGET} PRIVATE -Wno-strict-aliasing)
+    endif()
+  endif()
+endfunction()
 
 function(family_configure_target TARGET RTOS)
 	if (RTOS STREQUAL noos OR RTOS STREQUAL "")
@@ -204,7 +241,7 @@ function(family_configure_target TARGET RTOS)
 	pico_enable_stdio_uart(${TARGET} 1)
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_board${RTOS_SUFFIX} tinyusb_additions)
 
-	family_flash_openocd(${TARGET})
+  family_flash_openocd(${TARGET})
 	family_flash_jlink(${TARGET})
 endfunction()
 
@@ -359,34 +396,9 @@ function(suppress_tinyusb_warnings)
 				${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
 				)
 			foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES)
-				set_source_files_properties(
-						${SOURCE_FILE}
-						PROPERTIES
-						COMPILE_FLAGS "-Wno-conversion")
+				set_source_files_properties(${SOURCE_FILE} PROPERTIES COMPILE_FLAGS "-Wno-conversion")
 			endforeach()
 		endif()
-		if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 11.0)
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-					COMPILE_FLAGS "-Wno-stringop-overflow -Wno-array-bounds")
-		endif()
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-				PROPERTIES
-				COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual")
-
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_in.c
-				${PICO_TINYUSB_PATH}/lib/lwip/src/core/tcp_out.c
-				PROPERTIES
-				COMPILE_FLAGS "-Wno-conversion")
-
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/lib/networking/dnserver.c
-				${PICO_TINYUSB_PATH}/lib/networking/dhserver.c
-				${PICO_TINYUSB_PATH}/lib/networking/rndis_reports.c
-				PROPERTIES
-				COMPILE_FLAGS "-Wno-conversion -Wno-sign-conversion")
 
 		if (TARGET tinyusb_pico_pio_usb)
 			set_source_files_properties(
diff --git a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
index d59a2b4ee..90eb920e0 100644
--- a/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
+++ b/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
@@ -29,9 +29,20 @@
 #if CFG_TUH_ENABLED && (CFG_TUSB_MCU == OPT_MCU_RP2040) && CFG_TUH_RPI_PIO_USB
 
 #include "pico.h"
+
 #include "pio_usb.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wsign-conversion"
+#endif
+
 #include "pio_usb_ll.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 //--------------------------------------------------------------------+
 // INCLUDE
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From cc597d5cd55ee447d4f97b7f2a19d95c333426f5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 28 Oct 2025 00:15:39 +0700
Subject: disable warning for startup file

---
 hw/bsp/at32f402_405/family.cmake   | 4 +++-
 hw/bsp/at32f403a_407/family.cmake  | 4 +++-
 hw/bsp/at32f413/family.cmake       | 4 +++-
 hw/bsp/at32f415/family.cmake       | 4 +++-
 hw/bsp/at32f423/family.cmake       | 4 +++-
 hw/bsp/at32f425/family.cmake       | 4 +++-
 hw/bsp/at32f435_437/family.cmake   | 4 +++-
 hw/bsp/broadcom_32bit/family.cmake | 4 +++-
 hw/bsp/broadcom_64bit/family.cmake | 4 +++-
 hw/bsp/ch32v10x/family.cmake       | 4 +++-
 hw/bsp/ch32v20x/family.cmake       | 4 +++-
 hw/bsp/ch32v30x/family.cmake       | 4 +++-
 hw/bsp/cxd56/family.cmake          | 4 +++-
 hw/bsp/da1469x/family.cmake        | 4 +++-
 hw/bsp/efm32/family.cmake          | 4 +++-
 hw/bsp/f1c100s/family.cmake        | 4 +++-
 hw/bsp/fomu/family.cmake           | 4 +++-
 hw/bsp/gd32vf103/family.cmake      | 4 +++-
 hw/bsp/imxrt/family.cmake          | 4 +++-
 hw/bsp/kinetis_k/family.cmake      | 4 +++-
 hw/bsp/kinetis_k32l2/family.cmake  | 4 +++-
 hw/bsp/kinetis_kl/family.cmake     | 4 +++-
 hw/bsp/lpc43/family.cmake          | 4 +++-
 hw/bsp/lpc51/family.cmake          | 4 +++-
 hw/bsp/lpc54/family.cmake          | 4 +++-
 hw/bsp/lpc55/family.cmake          | 4 +++-
 hw/bsp/maxim/family.cmake          | 4 +++-
 hw/bsp/mcx/family.cmake            | 4 +++-
 hw/bsp/mm32/family.cmake           | 4 +++-
 hw/bsp/msp432e4/family.cmake       | 4 +++-
 hw/bsp/nrf/family.cmake            | 4 +++-
 hw/bsp/nuc100_120/family.cmake     | 4 +++-
 hw/bsp/nuc121_125/family.cmake     | 4 +++-
 hw/bsp/nuc126/family.cmake         | 4 +++-
 hw/bsp/nuc505/family.cmake         | 4 +++-
 hw/bsp/samd11/family.cmake         | 4 +++-
 hw/bsp/samd2x_l2x/family.cmake     | 4 +++-
 hw/bsp/samd5x_e5x/family.cmake     | 4 +++-
 hw/bsp/same7x/family.cmake         | 4 +++-
 hw/bsp/samg/family.cmake           | 4 +++-
 hw/bsp/stm32c0/family.cmake        | 4 +++-
 hw/bsp/stm32f0/family.cmake        | 4 +++-
 hw/bsp/stm32f1/family.cmake        | 4 +++-
 hw/bsp/stm32f2/family.cmake        | 4 +++-
 hw/bsp/stm32f3/family.cmake        | 4 +++-
 hw/bsp/stm32f4/family.cmake        | 4 +++-
 hw/bsp/stm32f7/family.cmake        | 4 +++-
 hw/bsp/stm32g0/family.cmake        | 4 +++-
 hw/bsp/stm32g4/family.cmake        | 4 +++-
 hw/bsp/stm32h5/family.cmake        | 4 +++-
 hw/bsp/stm32h7/family.cmake        | 4 +++-
 hw/bsp/stm32h7rs/family.cmake      | 4 +++-
 hw/bsp/stm32l0/family.cmake        | 4 +++-
 hw/bsp/stm32l4/family.cmake        | 4 +++-
 hw/bsp/stm32n6/family.cmake        | 4 +++-
 hw/bsp/stm32u0/family.cmake        | 4 +++-
 hw/bsp/stm32u5/family.cmake        | 4 +++-
 hw/bsp/stm32wb/family.cmake        | 4 +++-
 hw/bsp/stm32wba/family.cmake       | 4 +++-
 hw/bsp/xmc4000/family.cmake        | 4 +++-
 60 files changed, 180 insertions(+), 60 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/family.cmake b/hw/bsp/at32f402_405/family.cmake
index 113bc0305..fa29fd2ed 100644
--- a/hw/bsp/at32f402_405/family.cmake
+++ b/hw/bsp/at32f402_405/family.cmake
@@ -111,7 +111,9 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f403a_407/family.cmake b/hw/bsp/at32f403a_407/family.cmake
index 5f539228d..953f2ca49 100644
--- a/hw/bsp/at32f403a_407/family.cmake
+++ b/hw/bsp/at32f403a_407/family.cmake
@@ -85,7 +85,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f413/family.cmake b/hw/bsp/at32f413/family.cmake
index d62964730..5e41a1621 100644
--- a/hw/bsp/at32f413/family.cmake
+++ b/hw/bsp/at32f413/family.cmake
@@ -85,7 +85,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f415/family.cmake b/hw/bsp/at32f415/family.cmake
index 35fad5a87..3c1b6b80c 100644
--- a/hw/bsp/at32f415/family.cmake
+++ b/hw/bsp/at32f415/family.cmake
@@ -85,7 +85,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f423/family.cmake b/hw/bsp/at32f423/family.cmake
index 36c0466de..8294914b6 100644
--- a/hw/bsp/at32f423/family.cmake
+++ b/hw/bsp/at32f423/family.cmake
@@ -87,7 +87,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f425/family.cmake b/hw/bsp/at32f425/family.cmake
index 176595e12..ef1ca5a83 100644
--- a/hw/bsp/at32f425/family.cmake
+++ b/hw/bsp/at32f425/family.cmake
@@ -85,7 +85,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/at32f435_437/family.cmake b/hw/bsp/at32f435_437/family.cmake
index bdc7292d5..191a850aa 100644
--- a/hw/bsp/at32f435_437/family.cmake
+++ b/hw/bsp/at32f435_437/family.cmake
@@ -94,7 +94,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/broadcom_32bit/family.cmake b/hw/bsp/broadcom_32bit/family.cmake
index d681e4426..c92d79de8 100644
--- a/hw/bsp/broadcom_32bit/family.cmake
+++ b/hw/bsp/broadcom_32bit/family.cmake
@@ -89,7 +89,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/broadcom_64bit/family.cmake b/hw/bsp/broadcom_64bit/family.cmake
index 1be5c95eb..5fabda524 100644
--- a/hw/bsp/broadcom_64bit/family.cmake
+++ b/hw/bsp/broadcom_64bit/family.cmake
@@ -94,7 +94,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/ch32v10x/family.cmake b/hw/bsp/ch32v10x/family.cmake
index 843b7f9d3..0e4a38066 100644
--- a/hw/bsp/ch32v10x/family.cmake
+++ b/hw/bsp/ch32v10x/family.cmake
@@ -87,7 +87,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index 1ce83bed9..b65a39f0a 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -118,7 +118,9 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/ch32v30x/family.cmake b/hw/bsp/ch32v30x/family.cmake
index cbf86334e..d32666429 100644
--- a/hw/bsp/ch32v30x/family.cmake
+++ b/hw/bsp/ch32v30x/family.cmake
@@ -109,7 +109,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
diff --git a/hw/bsp/cxd56/family.cmake b/hw/bsp/cxd56/family.cmake
index 6cfe04d93..5bc01c1dd 100644
--- a/hw/bsp/cxd56/family.cmake
+++ b/hw/bsp/cxd56/family.cmake
@@ -107,7 +107,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Build mkspk tool
   add_custom_command(OUTPUT ${MKSPK}
diff --git a/hw/bsp/da1469x/family.cmake b/hw/bsp/da1469x/family.cmake
index 473db6531..120a078d4 100644
--- a/hw/bsp/da1469x/family.cmake
+++ b/hw/bsp/da1469x/family.cmake
@@ -117,7 +117,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink_dialog(${TARGET})
diff --git a/hw/bsp/efm32/family.cmake b/hw/bsp/efm32/family.cmake
index 36d88f071..2cd62612c 100644
--- a/hw/bsp/efm32/family.cmake
+++ b/hw/bsp/efm32/family.cmake
@@ -82,7 +82,9 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/f1c100s/family.cmake b/hw/bsp/f1c100s/family.cmake
index 78fc3c6c7..ad4915f39 100644
--- a/hw/bsp/f1c100s/family.cmake
+++ b/hw/bsp/f1c100s/family.cmake
@@ -100,7 +100,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/fomu/family.cmake b/hw/bsp/fomu/family.cmake
index 18290d437..41c8239fa 100644
--- a/hw/bsp/fomu/family.cmake
+++ b/hw/bsp/fomu/family.cmake
@@ -70,7 +70,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
 endfunction()
diff --git a/hw/bsp/gd32vf103/family.cmake b/hw/bsp/gd32vf103/family.cmake
index c96882a75..fb292c28e 100644
--- a/hw/bsp/gd32vf103/family.cmake
+++ b/hw/bsp/gd32vf103/family.cmake
@@ -101,7 +101,9 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 7e21dd946..f07ac249f 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -132,7 +132,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/kinetis_k/family.cmake b/hw/bsp/kinetis_k/family.cmake
index 2ec5522d3..ef078836e 100644
--- a/hw/bsp/kinetis_k/family.cmake
+++ b/hw/bsp/kinetis_k/family.cmake
@@ -92,7 +92,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
index 022ddb424..75619b316 100644
--- a/hw/bsp/kinetis_k32l2/family.cmake
+++ b/hw/bsp/kinetis_k32l2/family.cmake
@@ -87,7 +87,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_flash_jlink(${TARGET})
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 2640652ab..9e27106fe 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -91,7 +91,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc43/family.cmake b/hw/bsp/lpc43/family.cmake
index 5c68aaebf..878b0eecc 100644
--- a/hw/bsp/lpc43/family.cmake
+++ b/hw/bsp/lpc43/family.cmake
@@ -88,7 +88,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/lpc51/family.cmake b/hw/bsp/lpc51/family.cmake
index 9e128ab82..8a35af416 100644
--- a/hw/bsp/lpc51/family.cmake
+++ b/hw/bsp/lpc51/family.cmake
@@ -99,7 +99,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index 3b16955da..efa6fd346 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -127,7 +127,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 6ebda4db9..9dab57113 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -129,7 +129,9 @@ function(family_configure_example TARGET RTOS)
       PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-unused-parameter")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/maxim/family.cmake b/hw/bsp/maxim/family.cmake
index 07171b8d5..7785598b8 100644
--- a/hw/bsp/maxim/family.cmake
+++ b/hw/bsp/maxim/family.cmake
@@ -176,7 +176,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index bff4c68a7..8e7cc9fc8 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -116,7 +116,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/mm32/family.cmake b/hw/bsp/mm32/family.cmake
index 20431e41c..a08398bec 100644
--- a/hw/bsp/mm32/family.cmake
+++ b/hw/bsp/mm32/family.cmake
@@ -80,7 +80,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/msp432e4/family.cmake b/hw/bsp/msp432e4/family.cmake
index 582faad67..a7f2ff2ac 100644
--- a/hw/bsp/msp432e4/family.cmake
+++ b/hw/bsp/msp432e4/family.cmake
@@ -80,7 +80,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_msp430flasher(${TARGET})
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 0c19d2155..ea19e79e7 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -153,7 +153,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   #  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/nuc100_120/family.cmake b/hw/bsp/nuc100_120/family.cmake
index 594d29cd0..fe2ac7b54 100644
--- a/hw/bsp/nuc100_120/family.cmake
+++ b/hw/bsp/nuc100_120/family.cmake
@@ -79,6 +79,8 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
index 1eb581347..22968510f 100644
--- a/hw/bsp/nuc121_125/family.cmake
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -83,6 +83,8 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc126/family.cmake b/hw/bsp/nuc126/family.cmake
index 3226406da..f7f75442c 100644
--- a/hw/bsp/nuc126/family.cmake
+++ b/hw/bsp/nuc126/family.cmake
@@ -86,6 +86,8 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc505/family.cmake b/hw/bsp/nuc505/family.cmake
index eb6048d5c..5fe48e03c 100644
--- a/hw/bsp/nuc505/family.cmake
+++ b/hw/bsp/nuc505/family.cmake
@@ -82,6 +82,8 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/samd11/family.cmake b/hw/bsp/samd11/family.cmake
index 6cfb8238b..b4fe26e4d 100644
--- a/hw/bsp/samd11/family.cmake
+++ b/hw/bsp/samd11/family.cmake
@@ -88,7 +88,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd2x_l2x/family.cmake b/hw/bsp/samd2x_l2x/family.cmake
index 091016e64..74766ddc8 100644
--- a/hw/bsp/samd2x_l2x/family.cmake
+++ b/hw/bsp/samd2x_l2x/family.cmake
@@ -138,7 +138,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd5x_e5x/family.cmake b/hw/bsp/samd5x_e5x/family.cmake
index d5de26244..a92e79630 100644
--- a/hw/bsp/samd5x_e5x/family.cmake
+++ b/hw/bsp/samd5x_e5x/family.cmake
@@ -81,7 +81,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/same7x/family.cmake b/hw/bsp/same7x/family.cmake
index cb11f21f3..67df075dc 100644
--- a/hw/bsp/same7x/family.cmake
+++ b/hw/bsp/same7x/family.cmake
@@ -90,7 +90,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
diff --git a/hw/bsp/samg/family.cmake b/hw/bsp/samg/family.cmake
index 6d7a6ba7f..8d3af4143 100644
--- a/hw/bsp/samg/family.cmake
+++ b/hw/bsp/samg/family.cmake
@@ -83,7 +83,9 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 37b743654..78c921ae5 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -96,7 +96,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index 6f90f1a7a..fd2791ffe 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -93,7 +93,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index f2acba3ff..c95664c39 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -90,7 +90,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f2/family.cmake b/hw/bsp/stm32f2/family.cmake
index b08e93e3c..18d2339e7 100644
--- a/hw/bsp/stm32f2/family.cmake
+++ b/hw/bsp/stm32f2/family.cmake
@@ -92,7 +92,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f3/family.cmake b/hw/bsp/stm32f3/family.cmake
index b9aea10db..c2896ff90 100644
--- a/hw/bsp/stm32f3/family.cmake
+++ b/hw/bsp/stm32f3/family.cmake
@@ -90,7 +90,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index 327bf7bf3..b37196cfc 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -120,7 +120,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 2b9ca8cbb..29b235669 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -122,7 +122,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 065ec3a0e..ade644f60 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -93,7 +93,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index f0c0e5549..16f8ead79 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -91,7 +91,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index 7ad59dbd4..bbed6aafc 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -95,7 +95,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index 840391e0b..b55f2f575 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -121,7 +121,9 @@ function(family_configure_example TARGET RTOS)
     target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32h7rs/family.cmake b/hw/bsp/stm32h7rs/family.cmake
index b1253d7fe..da26b0b72 100644
--- a/hw/bsp/stm32h7rs/family.cmake
+++ b/hw/bsp/stm32h7rs/family.cmake
@@ -130,7 +130,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32l0/family.cmake b/hw/bsp/stm32l0/family.cmake
index 4d24a21a6..2030516e1 100644
--- a/hw/bsp/stm32l0/family.cmake
+++ b/hw/bsp/stm32l0/family.cmake
@@ -94,7 +94,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index e89035e8b..00f4bba3e 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -95,7 +95,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index 587ebc0fb..a76ec50e2 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -129,7 +129,9 @@ function(family_configure_example TARGET RTOS)
       PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
index 0c9d92fae..2d640c997 100644
--- a/hw/bsp/stm32u0/family.cmake
+++ b/hw/bsp/stm32u0/family.cmake
@@ -95,7 +95,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 6bbeb1017..4de861706 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -97,7 +97,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32wb/family.cmake b/hw/bsp/stm32wb/family.cmake
index 461ce6ffd..90f3cd6d8 100644
--- a/hw/bsp/stm32wb/family.cmake
+++ b/hw/bsp/stm32wb/family.cmake
@@ -95,7 +95,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/stm32wba/family.cmake b/hw/bsp/stm32wba/family.cmake
index fab3d786b..0bc5578a0 100644
--- a/hw/bsp/stm32wba/family.cmake
+++ b/hw/bsp/stm32wba/family.cmake
@@ -110,7 +110,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/xmc4000/family.cmake b/hw/bsp/xmc4000/family.cmake
index ffce97a8c..54b582b1f 100644
--- a/hw/bsp/xmc4000/family.cmake
+++ b/hw/bsp/xmc4000/family.cmake
@@ -79,7 +79,9 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
 
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES SKIP_LINTING ON)
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-- 
cgit v1.3.1


From 113a763bc3fe861ac7c20075b2ad29bb51f6fd01 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 28 Oct 2025 00:38:34 +0700
Subject: fix warning with strict prototypes warnings

---
 hw/bsp/at32f402_405/family.cmake         |  4 ++--
 hw/bsp/at32f403a_407/family.cmake        |  4 ++--
 hw/bsp/at32f413/family.cmake             |  2 +-
 hw/bsp/at32f415/family.cmake             |  2 +-
 hw/bsp/at32f423/family.cmake             |  2 +-
 hw/bsp/at32f425/family.cmake             |  2 +-
 hw/bsp/at32f435_437/family.cmake         |  2 +-
 hw/bsp/broadcom_32bit/family.cmake       |  4 ++--
 hw/bsp/broadcom_64bit/family.cmake       |  4 ++--
 hw/bsp/ch32v10x/family.cmake             |  3 ++-
 hw/bsp/ch32v20x/family.cmake             |  3 +--
 hw/bsp/ch32v30x/family.cmake             |  3 ++-
 hw/bsp/cxd56/family.cmake                |  2 +-
 hw/bsp/da1469x/family.cmake              |  4 ++--
 hw/bsp/efm32/family.cmake                |  4 ++--
 hw/bsp/f1c100s/family.cmake              |  3 ++-
 hw/bsp/fomu/family.cmake                 |  4 ++--
 hw/bsp/gd32vf103/family.cmake            | 16 ++++++++++++++--
 hw/bsp/imxrt/family.cmake                |  4 ++--
 hw/bsp/kinetis_k/family.cmake            |  4 ++--
 hw/bsp/kinetis_k32l2/family.cmake        |  4 ++--
 hw/bsp/kinetis_kl/family.cmake           |  4 ++--
 hw/bsp/lpc51/family.cmake                |  4 ++--
 hw/bsp/lpc54/family.cmake                |  4 ++--
 hw/bsp/lpc55/family.cmake                |  4 ++--
 hw/bsp/maxim/family.cmake                |  4 ++--
 hw/bsp/mcx/family.cmake                  |  4 ++--
 hw/bsp/mm32/family.cmake                 |  4 ++--
 hw/bsp/msp432e4/family.cmake             |  4 ++--
 hw/bsp/nrf/family.cmake                  |  4 ++--
 hw/bsp/nuc100_120/family.cmake           |  7 ++++++-
 hw/bsp/nuc121_125/family.cmake           |  8 ++++++--
 hw/bsp/nuc126/family.cmake               |  8 ++++++--
 hw/bsp/nuc505/family.cmake               |  8 ++++++--
 hw/bsp/samd11/family.cmake               |  4 ++--
 hw/bsp/samd2x_l2x/family.cmake           |  4 ++--
 hw/bsp/samd5x_e5x/family.cmake           |  4 ++--
 hw/bsp/same7x/family.cmake               |  4 ++--
 hw/bsp/samg/family.cmake                 |  4 ++--
 hw/bsp/stm32c0/family.cmake              |  4 ++--
 hw/bsp/stm32f0/family.cmake              |  4 ++--
 hw/bsp/stm32f1/family.cmake              |  4 ++--
 hw/bsp/stm32f2/family.cmake              |  4 ++--
 hw/bsp/stm32f3/family.cmake              |  4 ++--
 hw/bsp/stm32f4/family.cmake              |  4 ++--
 hw/bsp/stm32f7/family.cmake              |  4 ++--
 hw/bsp/stm32g0/family.cmake              |  4 ++--
 hw/bsp/stm32g4/family.cmake              |  4 ++--
 hw/bsp/stm32h5/family.cmake              |  4 ++--
 hw/bsp/stm32h7/family.cmake              |  4 ++--
 hw/bsp/stm32h7rs/family.cmake            |  4 ++--
 hw/bsp/stm32l0/family.cmake              |  4 ++--
 hw/bsp/stm32l4/family.cmake              |  4 ++--
 hw/bsp/stm32n6/family.cmake              |  4 ++--
 hw/bsp/stm32u0/family.cmake              |  4 ++--
 hw/bsp/stm32u5/family.cmake              |  4 ++--
 hw/bsp/stm32wb/family.cmake              |  4 ++--
 hw/bsp/stm32wba/family.cmake             |  4 ++--
 hw/bsp/tm4c/family.cmake                 |  4 +---
 hw/bsp/xmc4000/family.cmake              |  4 ++--
 src/portable/nuvoton/nuc121/dcd_nuc121.c | 10 ++++++++++
 src/portable/nuvoton/nuc505/dcd_nuc505.c | 10 ++++++++++
 62 files changed, 160 insertions(+), 111 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/family.cmake b/hw/bsp/at32f402_405/family.cmake
index fa29fd2ed..87869cfe9 100644
--- a/hw/bsp/at32f402_405/family.cmake
+++ b/hw/bsp/at32f402_405/family.cmake
@@ -110,10 +110,10 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f403a_407/family.cmake b/hw/bsp/at32f403a_407/family.cmake
index 953f2ca49..498b89c1a 100644
--- a/hw/bsp/at32f403a_407/family.cmake
+++ b/hw/bsp/at32f403a_407/family.cmake
@@ -84,10 +84,10 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/at32f413/family.cmake b/hw/bsp/at32f413/family.cmake
index 5e41a1621..02692daf5 100644
--- a/hw/bsp/at32f413/family.cmake
+++ b/hw/bsp/at32f413/family.cmake
@@ -85,7 +85,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/at32f415/family.cmake b/hw/bsp/at32f415/family.cmake
index 3c1b6b80c..f28da6f47 100644
--- a/hw/bsp/at32f415/family.cmake
+++ b/hw/bsp/at32f415/family.cmake
@@ -85,7 +85,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/at32f423/family.cmake b/hw/bsp/at32f423/family.cmake
index 8294914b6..3c666b132 100644
--- a/hw/bsp/at32f423/family.cmake
+++ b/hw/bsp/at32f423/family.cmake
@@ -87,7 +87,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/at32f425/family.cmake b/hw/bsp/at32f425/family.cmake
index ef1ca5a83..39d98a220 100644
--- a/hw/bsp/at32f425/family.cmake
+++ b/hw/bsp/at32f425/family.cmake
@@ -85,7 +85,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/at32f435_437/family.cmake b/hw/bsp/at32f435_437/family.cmake
index 191a850aa..32a401bb6 100644
--- a/hw/bsp/at32f435_437/family.cmake
+++ b/hw/bsp/at32f435_437/family.cmake
@@ -94,7 +94,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/broadcom_32bit/family.cmake b/hw/bsp/broadcom_32bit/family.cmake
index c92d79de8..3f327861b 100644
--- a/hw/bsp/broadcom_32bit/family.cmake
+++ b/hw/bsp/broadcom_32bit/family.cmake
@@ -88,10 +88,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/broadcom_64bit/family.cmake b/hw/bsp/broadcom_64bit/family.cmake
index 5fabda524..6294ebafd 100644
--- a/hw/bsp/broadcom_64bit/family.cmake
+++ b/hw/bsp/broadcom_64bit/family.cmake
@@ -93,10 +93,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/ch32v10x/family.cmake b/hw/bsp/ch32v10x/family.cmake
index 0e4a38066..fb9ccb3a3 100644
--- a/hw/bsp/ch32v10x/family.cmake
+++ b/hw/bsp/ch32v10x/family.cmake
@@ -87,9 +87,10 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index b65a39f0a..d8c7c5327 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -117,8 +117,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/ch32v30x/family.cmake b/hw/bsp/ch32v30x/family.cmake
index d32666429..b974bd5e7 100644
--- a/hw/bsp/ch32v30x/family.cmake
+++ b/hw/bsp/ch32v30x/family.cmake
@@ -109,9 +109,10 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
diff --git a/hw/bsp/cxd56/family.cmake b/hw/bsp/cxd56/family.cmake
index 5bc01c1dd..7cd2f51f8 100644
--- a/hw/bsp/cxd56/family.cmake
+++ b/hw/bsp/cxd56/family.cmake
@@ -107,7 +107,7 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
diff --git a/hw/bsp/da1469x/family.cmake b/hw/bsp/da1469x/family.cmake
index 120a078d4..40070ba10 100644
--- a/hw/bsp/da1469x/family.cmake
+++ b/hw/bsp/da1469x/family.cmake
@@ -116,10 +116,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink_dialog(${TARGET})
diff --git a/hw/bsp/efm32/family.cmake b/hw/bsp/efm32/family.cmake
index 2cd62612c..8c521eee0 100644
--- a/hw/bsp/efm32/family.cmake
+++ b/hw/bsp/efm32/family.cmake
@@ -81,10 +81,10 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/f1c100s/family.cmake b/hw/bsp/f1c100s/family.cmake
index ad4915f39..5522eeec7 100644
--- a/hw/bsp/f1c100s/family.cmake
+++ b/hw/bsp/f1c100s/family.cmake
@@ -100,9 +100,10 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/fomu/family.cmake b/hw/bsp/fomu/family.cmake
index 41c8239fa..ac3c0c446 100644
--- a/hw/bsp/fomu/family.cmake
+++ b/hw/bsp/fomu/family.cmake
@@ -69,10 +69,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
 endfunction()
diff --git a/hw/bsp/gd32vf103/family.cmake b/hw/bsp/gd32vf103/family.cmake
index fb292c28e..76f520ea8 100644
--- a/hw/bsp/gd32vf103/family.cmake
+++ b/hw/bsp/gd32vf103/family.cmake
@@ -100,10 +100,22 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      ${SOC_DIR}/Common/Source/Stubs/sbrk.c
+      ${SOC_DIR}/Common/Source/Stubs/close.c
+      ${SOC_DIR}/Common/Source/Stubs/isatty.c
+      ${SOC_DIR}/Common/Source/Stubs/fstat.c
+      ${SOC_DIR}/Common/Source/Stubs/lseek.c
+      ${SOC_DIR}/Common/Source/Stubs/read.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes"
+    )
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index f07ac249f..100deba1f 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -131,10 +131,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/kinetis_k/family.cmake b/hw/bsp/kinetis_k/family.cmake
index ef078836e..e1b5c221e 100644
--- a/hw/bsp/kinetis_k/family.cmake
+++ b/hw/bsp/kinetis_k/family.cmake
@@ -91,10 +91,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
index 75619b316..110335ab2 100644
--- a/hw/bsp/kinetis_k32l2/family.cmake
+++ b/hw/bsp/kinetis_k32l2/family.cmake
@@ -86,10 +86,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_flash_jlink(${TARGET})
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/kinetis_kl/family.cmake b/hw/bsp/kinetis_kl/family.cmake
index 9e27106fe..230a3057d 100644
--- a/hw/bsp/kinetis_kl/family.cmake
+++ b/hw/bsp/kinetis_kl/family.cmake
@@ -90,10 +90,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc51/family.cmake b/hw/bsp/lpc51/family.cmake
index 8a35af416..1823b64fc 100644
--- a/hw/bsp/lpc51/family.cmake
+++ b/hw/bsp/lpc51/family.cmake
@@ -98,10 +98,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index efa6fd346..c6145bd41 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -126,10 +126,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 9dab57113..3477d9f10 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -128,10 +128,10 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c
       PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-unused-parameter")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/maxim/family.cmake b/hw/bsp/maxim/family.cmake
index 7785598b8..d890113e6 100644
--- a/hw/bsp/maxim/family.cmake
+++ b/hw/bsp/maxim/family.cmake
@@ -175,11 +175,11 @@ function(family_configure_example TARGET RTOS)
     endif ()
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index 8e7cc9fc8..d062cec16 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -115,10 +115,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/mm32/family.cmake b/hw/bsp/mm32/family.cmake
index a08398bec..04961d6c3 100644
--- a/hw/bsp/mm32/family.cmake
+++ b/hw/bsp/mm32/family.cmake
@@ -79,10 +79,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/msp432e4/family.cmake b/hw/bsp/msp432e4/family.cmake
index a7f2ff2ac..6725eedac 100644
--- a/hw/bsp/msp432e4/family.cmake
+++ b/hw/bsp/msp432e4/family.cmake
@@ -79,10 +79,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_msp430flasher(${TARGET})
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index ea19e79e7..4e999b636 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -152,10 +152,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   #  family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/nuc100_120/family.cmake b/hw/bsp/nuc100_120/family.cmake
index fe2ac7b54..f81447596 100644
--- a/hw/bsp/nuc100_120/family.cmake
+++ b/hw/bsp/nuc100_120/family.cmake
@@ -79,8 +79,13 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES
+      COMPILE_FLAGS "-Wno-missing-prototypes -Wno-redundant-decls")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
index 22968510f..718f8db9a 100644
--- a/hw/bsp/nuc121_125/family.cmake
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -82,9 +82,13 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES
+      COMPILE_FLAGS "-Wno-missing-prototypes -Wno-redundant-decls")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc126/family.cmake b/hw/bsp/nuc126/family.cmake
index f7f75442c..3fc670cf0 100644
--- a/hw/bsp/nuc126/family.cmake
+++ b/hw/bsp/nuc126/family.cmake
@@ -85,9 +85,13 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES
+      COMPILE_FLAGS "-Wno-missing-prototypes -Wno-redundant-decls")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/nuc505/family.cmake b/hw/bsp/nuc505/family.cmake
index 5fe48e03c..a31f5ff73 100644
--- a/hw/bsp/nuc505/family.cmake
+++ b/hw/bsp/nuc505/family.cmake
@@ -81,9 +81,13 @@ function(family_configure_example TARGET RTOS)
       )
   endif ()
 
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES
+      COMPILE_FLAGS "-Wno-missing-prototypes -Wno-redundant-decls")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   family_flash_openocd_nuvoton(${TARGET})
 endfunction()
diff --git a/hw/bsp/samd11/family.cmake b/hw/bsp/samd11/family.cmake
index b4fe26e4d..982cef792 100644
--- a/hw/bsp/samd11/family.cmake
+++ b/hw/bsp/samd11/family.cmake
@@ -87,10 +87,10 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd2x_l2x/family.cmake b/hw/bsp/samd2x_l2x/family.cmake
index 74766ddc8..76371ccdc 100644
--- a/hw/bsp/samd2x_l2x/family.cmake
+++ b/hw/bsp/samd2x_l2x/family.cmake
@@ -137,10 +137,10 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/samd5x_e5x/family.cmake b/hw/bsp/samd5x_e5x/family.cmake
index a92e79630..bb022ab76 100644
--- a/hw/bsp/samd5x_e5x/family.cmake
+++ b/hw/bsp/samd5x_e5x/family.cmake
@@ -80,10 +80,10 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/same7x/family.cmake b/hw/bsp/same7x/family.cmake
index 67df075dc..a9c9de413 100644
--- a/hw/bsp/same7x/family.cmake
+++ b/hw/bsp/same7x/family.cmake
@@ -89,10 +89,10 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
 endfunction()
diff --git a/hw/bsp/samg/family.cmake b/hw/bsp/samg/family.cmake
index 8d3af4143..c07e20b90 100644
--- a/hw/bsp/samg/family.cmake
+++ b/hw/bsp/samg/family.cmake
@@ -82,11 +82,11 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 78c921ae5..90d5322b7 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -95,11 +95,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index fd2791ffe..ee73ae872 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -92,11 +92,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index c95664c39..064f32096 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -89,11 +89,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32f2/family.cmake b/hw/bsp/stm32f2/family.cmake
index 18d2339e7..7152a0679 100644
--- a/hw/bsp/stm32f2/family.cmake
+++ b/hw/bsp/stm32f2/family.cmake
@@ -91,11 +91,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32f3/family.cmake b/hw/bsp/stm32f3/family.cmake
index c2896ff90..7c9e97e62 100644
--- a/hw/bsp/stm32f3/family.cmake
+++ b/hw/bsp/stm32f3/family.cmake
@@ -89,11 +89,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32f4/family.cmake b/hw/bsp/stm32f4/family.cmake
index b37196cfc..0d3d9ec93 100644
--- a/hw/bsp/stm32f4/family.cmake
+++ b/hw/bsp/stm32f4/family.cmake
@@ -119,11 +119,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32f7/family.cmake b/hw/bsp/stm32f7/family.cmake
index 29b235669..d405753d4 100644
--- a/hw/bsp/stm32f7/family.cmake
+++ b/hw/bsp/stm32f7/family.cmake
@@ -121,11 +121,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index ade644f60..572f0e644 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -92,11 +92,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 16f8ead79..7e8b319b8 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -90,11 +90,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index bbed6aafc..6e63c4072 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -94,11 +94,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32h7/family.cmake b/hw/bsp/stm32h7/family.cmake
index b55f2f575..8b6086356 100644
--- a/hw/bsp/stm32h7/family.cmake
+++ b/hw/bsp/stm32h7/family.cmake
@@ -120,11 +120,11 @@ function(family_configure_example TARGET RTOS)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32h7rs/family.cmake b/hw/bsp/stm32h7rs/family.cmake
index da26b0b72..1fd1cb057 100644
--- a/hw/bsp/stm32h7rs/family.cmake
+++ b/hw/bsp/stm32h7rs/family.cmake
@@ -129,11 +129,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32l0/family.cmake b/hw/bsp/stm32l0/family.cmake
index 2030516e1..b6b0139a0 100644
--- a/hw/bsp/stm32l0/family.cmake
+++ b/hw/bsp/stm32l0/family.cmake
@@ -93,11 +93,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index 00f4bba3e..5bc28dd5d 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -94,11 +94,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index a76ec50e2..6aec26f99 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -128,11 +128,11 @@ function(family_configure_example TARGET RTOS)
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
       PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
index 2d640c997..4f9b03109 100644
--- a/hw/bsp/stm32u0/family.cmake
+++ b/hw/bsp/stm32u0/family.cmake
@@ -94,11 +94,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 4de861706..70e0c313c 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -96,11 +96,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32wb/family.cmake b/hw/bsp/stm32wb/family.cmake
index 90f3cd6d8..1a96e3d7e 100644
--- a/hw/bsp/stm32wb/family.cmake
+++ b/hw/bsp/stm32wb/family.cmake
@@ -94,11 +94,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/stm32wba/family.cmake b/hw/bsp/stm32wba/family.cmake
index 0bc5578a0..9628913cc 100644
--- a/hw/bsp/stm32wba/family.cmake
+++ b/hw/bsp/stm32wba/family.cmake
@@ -109,11 +109,11 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
 
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_stlink(${TARGET})
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 936dcffa1..12f0448a3 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -72,11 +72,9 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
   set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
-    COMPILE_FLAGS "-Wno-cast-qual"
-    )
+    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
diff --git a/hw/bsp/xmc4000/family.cmake b/hw/bsp/xmc4000/family.cmake
index 54b582b1f..a8fa5351c 100644
--- a/hw/bsp/xmc4000/family.cmake
+++ b/hw/bsp/xmc4000/family.cmake
@@ -78,10 +78,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-
-    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
+
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index 37210ea34..804a35565 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -38,8 +38,18 @@
 #if CFG_TUD_ENABLED && ( (CFG_TUSB_MCU == OPT_MCU_NUC121) || (CFG_TUSB_MCU == OPT_MCU_NUC126) )
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NuMicro.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 // Since TinyUSB doesn't use SOF for now, and this interrupt too often (1ms interval)
 // We disable SOF for now until needed later on
 #ifndef USE_SOF
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index fa457d861..6195015ae 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -38,8 +38,18 @@
 #if CFG_TUD_ENABLED && (CFG_TUSB_MCU == OPT_MCU_NUC505)
 
 #include "device/dcd.h"
+
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wredundant-decls"
+#endif
+
 #include "NUC505Series.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 /*
  * The DMA functionality of the USBD peripheral does not appear to succeed with
  * transfer lengths that are longer (> 64 bytes) and are not a multiple of 4.
-- 
cgit v1.3.1


From d92b810df7670aae0e195fd02abef5014470c2f7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 28 Oct 2025 13:21:38 +0700
Subject: fix Identifiers that start with '__' or '_[A-Z]' are reserved. fix
 compiling with nuc family

---
 .github/actions/setup_toolchain/action.yml         |  2 +-
 .../device/audio_4_channel_mic/src/tusb_config.h   |  6 +-
 .../audio_4_channel_mic/src/usb_descriptors.c      |  6 +-
 .../audio_4_channel_mic_freertos/src/tusb_config.h |  6 +-
 .../src/usb_descriptors.c                          |  6 +-
 examples/device/audio_test/src/tusb_config.h       |  6 +-
 examples/device/audio_test/src/usb_descriptors.c   |  6 +-
 .../device/audio_test_freertos/src/tusb_config.h   |  6 +-
 .../audio_test_freertos/src/usb_descriptors.c      |  6 +-
 .../device/audio_test_multi_rate/src/tusb_config.h |  6 +-
 .../audio_test_multi_rate/src/usb_descriptors.c    |  6 +-
 examples/device/board_test/src/tusb_config.h       |  6 +-
 examples/device/cdc_dual_ports/src/tusb_config.h   |  6 +-
 .../device/cdc_dual_ports/src/usb_descriptors.c    |  6 +-
 examples/device/cdc_msc/src/msc_disk.c             | 99 +++++++++++-----------
 examples/device/cdc_msc/src/tusb_config.h          |  6 +-
 examples/device/cdc_msc/src/usb_descriptors.c      |  6 +-
 examples/device/cdc_msc_freertos/src/tusb_config.h |  6 +-
 .../device/cdc_msc_freertos/src/usb_descriptors.c  |  6 +-
 examples/device/cdc_uac2/src/tusb_config.h         |  6 +-
 examples/device/cdc_uac2/src/usb_descriptors.c     |  6 +-
 examples/device/dfu/src/usb_descriptors.c          |  6 +-
 examples/device/dfu_runtime/src/usb_descriptors.c  |  6 +-
 .../device/dynamic_configuration/src/tusb_config.h |  6 +-
 .../dynamic_configuration/src/usb_descriptors.c    |  6 +-
 .../device/hid_boot_interface/src/tusb_config.h    |  6 +-
 .../hid_boot_interface/src/usb_descriptors.c       |  6 +-
 examples/device/hid_composite/src/tusb_config.h    |  6 +-
 .../device/hid_composite/src/usb_descriptors.c     |  6 +-
 .../hid_composite_freertos/src/tusb_config.h       |  6 +-
 .../hid_composite_freertos/src/usb_descriptors.c   |  6 +-
 .../device/hid_generic_inout/src/tusb_config.h     |  6 +-
 .../device/hid_generic_inout/src/usb_descriptors.c |  6 +-
 .../hid_multiple_interface/src/tusb_config.h       |  6 +-
 .../hid_multiple_interface/src/usb_descriptors.c   |  6 +-
 examples/device/midi_test/src/tusb_config.h        |  6 +-
 examples/device/midi_test/src/usb_descriptors.c    |  6 +-
 .../device/midi_test_freertos/src/tusb_config.h    |  6 +-
 .../midi_test_freertos/src/usb_descriptors.c       |  6 +-
 examples/device/msc_dual_lun/src/tusb_config.h     |  6 +-
 examples/device/msc_dual_lun/src/usb_descriptors.c |  6 +-
 examples/device/mtp/src/tusb_config.h              |  6 +-
 examples/device/mtp/src/usb_descriptors.c          |  6 +-
 .../device/net_lwip_webserver/src/tusb_config.h    |  6 +-
 .../net_lwip_webserver/src/usb_descriptors.c       |  6 +-
 examples/device/uac2_headset/src/tusb_config.h     |  6 +-
 examples/device/uac2_headset/src/usb_descriptors.c |  6 +-
 examples/device/uac2_speaker_fb/src/tusb_config.h  |  6 +-
 .../device/uac2_speaker_fb/src/usb_descriptors.c   |  6 +-
 examples/device/usbtmc/src/usb_descriptors.c       |  6 +-
 examples/device/video_capture/src/tusb_config.h    |  6 +-
 .../device/video_capture/src/usb_descriptors.c     |  6 +-
 .../device/video_capture_2ch/src/tusb_config.h     |  6 +-
 .../device/video_capture_2ch/src/usb_descriptors.c |  6 +-
 examples/device/webusb_serial/src/tusb_config.h    |  6 +-
 .../device/webusb_serial/src/usb_descriptors.c     |  6 +-
 .../host_hid_to_device_cdc/src/usb_descriptors.c   |  6 +-
 .../host_info_to_device_cdc/src/usb_descriptors.c  |  6 +-
 examples/host/cdc_msc_hid/src/tusb_config.h        |  6 +-
 .../host/cdc_msc_hid_freertos/src/tusb_config.h    |  6 +-
 examples/host/hid_controller/src/tusb_config.h     |  6 +-
 examples/host/msc_file_explorer/src/tusb_config.h  |  6 +-
 examples/typec/power_delivery/src/tusb_config.h    |  6 +-
 hw/bsp/ansi_escape.h                               |  6 +-
 hw/bsp/nuc100_120/family.cmake                     | 12 ++-
 hw/bsp/nuc121_125/family.cmake                     | 12 +--
 hw/bsp/nuc126/family.cmake                         | 12 +--
 hw/bsp/nuc505/family.cmake                         | 12 +--
 lib/rt-thread/tusb_config.h                        |  6 +-
 src/class/audio/audio.h                            |  4 +-
 src/class/audio/audio_device.h                     |  2 +-
 src/class/bth/bth_device.h                         |  6 +-
 src/class/cdc/cdc.h                                |  4 +-
 src/class/cdc/cdc_device.h                         |  2 +-
 src/class/cdc/cdc_host.h                           |  6 +-
 src/class/cdc/cdc_rndis.h                          |  6 +-
 src/class/cdc/cdc_rndis_host.h                     |  6 +-
 src/class/dfu/dfu.h                                |  6 +-
 src/class/dfu/dfu_device.h                         |  6 +-
 src/class/dfu/dfu_rt_device.h                      |  6 +-
 src/class/hid/hid.h                                |  6 +-
 src/class/hid/hid_host.h                           |  6 +-
 src/class/midi/midi_device.h                       |  6 +-
 src/class/msc/msc.h                                |  6 +-
 src/class/msc/msc_device.h                         |  6 +-
 src/class/net/ncm.h                                |  4 +-
 src/class/net/net_device.h                         |  6 +-
 src/class/usbtmc/usbtmc.h                          |  4 +-
 src/class/vendor/vendor_device.h                   |  6 +-
 src/class/vendor/vendor_host.h                     |  6 +-
 src/common/tusb_common.h                           |  6 +-
 src/common/tusb_compiler.h                         | 18 ++--
 src/common/tusb_debug.h                            |  6 +-
 src/common/tusb_fifo.h                             |  6 +-
 src/device/usbd.h                                  |  6 +-
 src/host/hcd.h                                     |  4 +-
 src/host/usbh.h                                    |  6 +-
 src/host/usbh_pvt.h                                |  4 +-
 src/osal/osal.h                                    |  6 +-
 src/osal/osal_none.h                               |  2 +-
 src/portable/ehci/ehci.h                           |  6 +-
 src/portable/ehci/ehci_api.h                       |  4 +-
 src/portable/nxp/lpc17_40/dcd_lpc17_40.h           |  4 +-
 src/portable/ohci/ohci.h                           |  6 +-
 src/portable/renesas/rusb2/rusb2_type.h            |  6 +-
 src/portable/sunxi/musb_def.h                      |  4 +-
 src/portable/synopsys/dwc2/dwc2_bcm.h              |  4 +-
 src/portable/valentyusb/eptri/dcd_eptri.h          |  6 +-
 src/tusb.h                                         |  6 +-
 src/tusb_option.h                                  |  6 +-
 src/typec/pd_types.h                               |  4 +-
 src/typec/tcd.h                                    |  4 +-
 src/typec/usbc.h                                   |  6 +-
 test/fuzz/device/cdc/src/tusb_config.h             |  6 +-
 test/fuzz/device/cdc/src/usb_descriptors.cc        |  6 +-
 test/fuzz/device/msc/src/tusb_config.h             |  6 +-
 test/fuzz/device/msc/src/usb_descriptors.cc        |  6 +-
 test/fuzz/device/net/src/tusb_config.h             |  6 +-
 test/fuzz/device/net/src/usb_descriptors.cc        |  6 +-
 test/unit-test/test/support/tusb_config.h          |  6 +-
 120 files changed, 404 insertions(+), 405 deletions(-)

(limited to 'hw')

diff --git a/.github/actions/setup_toolchain/action.yml b/.github/actions/setup_toolchain/action.yml
index 292fd172d..d15a29f20 100644
--- a/.github/actions/setup_toolchain/action.yml
+++ b/.github/actions/setup_toolchain/action.yml
@@ -33,7 +33,7 @@ runs:
       env:
         TOOLCHAIN: ${{ inputs.toolchain }}
       run: |
-        TOOLCHAIN_URL=$(jq -r '."$TOOLCHAIN"' .github/actions/setup_toolchain/toolchain.json)
+        TOOLCHAIN_URL=$(jq -r --arg tc "$TOOLCHAIN" '.[$tc]' .github/actions/setup_toolchain/toolchain.json)
         echo "toolchain_url=$TOOLCHAIN_URL"
         echo "toolchain_url=$TOOLCHAIN_URL" >> $GITHUB_OUTPUT
       shell: bash
diff --git a/examples/device/audio_4_channel_mic/src/tusb_config.h b/examples/device/audio_4_channel_mic/src/tusb_config.h
index 0ee3ba2d0..8ead5c8b0 100644
--- a/examples/device/audio_4_channel_mic/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -123,4 +123,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index d48ee0d08..73f856fc8 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/audio_4_channel_mic_freertos/src/tusb_config.h b/examples/device/audio_4_channel_mic_freertos/src/tusb_config.h
index d973be2af..dd7cc7eff 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/tusb_config.h
+++ b/examples/device/audio_4_channel_mic_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -129,4 +129,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
index d48ee0d08..73f856fc8 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/audio_test/src/tusb_config.h b/examples/device/audio_test/src/tusb_config.h
index 10bf53809..2efec5124 100644
--- a/examples/device/audio_test/src/tusb_config.h
+++ b/examples/device/audio_test/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -122,4 +122,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index 52ddc1bb2..5f0f587b3 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/audio_test_freertos/src/tusb_config.h b/examples/device/audio_test_freertos/src/tusb_config.h
index c9dc50082..4dad6c2b9 100644
--- a/examples/device/audio_test_freertos/src/tusb_config.h
+++ b/examples/device/audio_test_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -128,4 +128,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_test_freertos/src/usb_descriptors.c b/examples/device/audio_test_freertos/src/usb_descriptors.c
index 52ddc1bb2..5f0f587b3 100644
--- a/examples/device/audio_test_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_test_freertos/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/audio_test_multi_rate/src/tusb_config.h b/examples/device/audio_test_multi_rate/src/tusb_config.h
index b48c0a0be..7ce235df0 100644
--- a/examples/device/audio_test_multi_rate/src/tusb_config.h
+++ b/examples/device/audio_test_multi_rate/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -138,4 +138,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index d1e801120..11e5d2127 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -34,9 +34,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/board_test/src/tusb_config.h b/examples/device/board_test/src/tusb_config.h
index 81829d450..97ec65f66 100644
--- a/examples/device/board_test/src/tusb_config.h
+++ b/examples/device/board_test/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -74,4 +74,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_dual_ports/src/tusb_config.h b/examples/device/cdc_dual_ports/src/tusb_config.h
index 7f7df3909..0da4032a7 100644
--- a/examples/device/cdc_dual_ports/src/tusb_config.h
+++ b/examples/device/cdc_dual_ports/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -110,4 +110,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_dual_ports/src/usb_descriptors.c b/examples/device/cdc_dual_ports/src/usb_descriptors.c
index 34cdbfafb..dd0aefaea 100644
--- a/examples/device/cdc_dual_ports/src/usb_descriptors.c
+++ b/examples/device/cdc_dual_ports/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index b39f5efa1..1a95f7f8b 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -58,63 +58,64 @@ uint8_t msc_disk[DISK_BLOCK_NUM][DISK_BLOCK_SIZE] = {
   // drive_number       = 0x80; media_type = 0xf8; extended_boot_signature = 0x29;
   // filesystem_type    = "FAT12   "; volume_serial_number = 0x1234; volume_label = "TinyUSB MSC";
   // FAT magic code at offset 510-511
-{
-    0xEB, 0x3C, 0x90, 0x4D, 0x53, 0x44, 0x4F, 0x53, 0x35, 0x2E, 0x30, 0x00, 0x02, 0x01, 0x01, 0x00,
-    0x01, 0x10, 0x00, 0x10, 0x00, 0xF8, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x29, 0x34, 0x12, 0x00, 0x00, 'T', 'i', 'n', 'y', 'U',
-    'S', 'B', ' ', 'M', 'S', 'C', 0x46, 0x41, 0x54, 0x31, 0x32, 0x20, 0x20, 0x20, 0x00, 0x00,
-
-    // Zero up to 2 last bytes of FAT magic code
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0xAA},
+  {
+      0xEB, 0x3C, 0x90, 0x4D, 0x53, 0x44, 0x4F, 0x53, 0x35, 0x2E, 0x30, 0x00, 0x02, 0x01, 0x01, 0x00,
+      0x01, 0x10, 0x00, 0x10, 0x00, 0xF8, 0x01, 0x00, 0x01, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x29, 0x34, 0x12, 0x00, 0x00, 'T', 'i', 'n', 'y', 'U',
+      'S', 'B', ' ', 'M', 'S', 'C', 0x46, 0x41, 0x54, 0x31, 0x32, 0x20, 0x20, 0x20, 0x00, 0x00,
+
+      // Zero up to 2 last bytes of FAT magic code
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x55, 0xAA
+  },
 
   //------------- Block1: FAT12 Table -------------//
-{
-      0xF8, 0xFF, 0xFF, 0xFF, 0x0F// // first 2 entries must be F8FF, third entry is cluster end of readme file
+  {
+      0xF8, 0xFF, 0xFF, 0xFF, 0x0F// first 2 entries must be F8FF, third entry is cluster end of readme file
   },
 
   //------------- Block2: Root Directory -------------//
-{
-    // first entry is volume label
-    'T', 'i', 'n', 'y', 'U', 'S', 'B', ' ', 'M', 'S', 'C', 0x08, 0x00, 0x00, 0x00, 0x00,
-    0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4F, 0x6D, 0x65, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
-    // second entry is readme file
-    'R', 'E', 'A', 'D', 'M', 'E', ' ', ' ', 'T', 'X', 'T', 0x20, 0x00, 0xC6, 0x52, 0x6D,
-    0x65, 0x43, 0x65, 0x43, 0x00, 0x00, 0x88, 0x6D, 0x65, 0x43, 0x02, 0x00,
-    sizeof(README_CONTENTS) - 1, 0x00, 0x00, 0x00// readme's files size (4 Bytes)
+  {
+      // first entry is volume label
+      'T', 'i', 'n', 'y', 'U', 'S', 'B', ' ', 'M', 'S', 'C', 0x08, 0x00, 0x00, 0x00, 0x00,
+      0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x4F, 0x6D, 0x65, 0x43, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+      // second entry is readme file
+      'R', 'E', 'A', 'D', 'M', 'E', ' ', ' ', 'T', 'X', 'T', 0x20, 0x00, 0xC6, 0x52, 0x6D,
+      0x65, 0x43, 0x65, 0x43, 0x00, 0x00, 0x88, 0x6D, 0x65, 0x43, 0x02, 0x00,
+      sizeof(README_CONTENTS) - 1, 0x00, 0x00, 0x00// readme's files size (4 Bytes)
   },
 
   //------------- Block3: Readme Content -------------//
-  README_CONTENTS
+  {README_CONTENTS}
 };
 
 // Invoked when received SCSI_CMD_INQUIRY, v2 with full inquiry response
diff --git a/examples/device/cdc_msc/src/tusb_config.h b/examples/device/cdc_msc/src/tusb_config.h
index 811d464e9..fdb2ddf18 100644
--- a/examples/device/cdc_msc/src/tusb_config.h
+++ b/examples/device/cdc_msc/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -113,4 +113,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_msc/src/usb_descriptors.c b/examples/device/cdc_msc/src/usb_descriptors.c
index c9b9a133a..c668ea3a7 100644
--- a/examples/device/cdc_msc/src/usb_descriptors.c
+++ b/examples/device/cdc_msc/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/cdc_msc_freertos/src/tusb_config.h b/examples/device/cdc_msc_freertos/src/tusb_config.h
index 9cc3a18d1..6b1937a8d 100644
--- a/examples/device/cdc_msc_freertos/src/tusb_config.h
+++ b/examples/device/cdc_msc_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -120,4 +120,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_msc_freertos/src/usb_descriptors.c b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
index 58b39a2dd..4950f02e0 100644
--- a/examples/device/cdc_msc_freertos/src/usb_descriptors.c
+++ b/examples/device/cdc_msc_freertos/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/cdc_uac2/src/tusb_config.h b/examples/device/cdc_uac2/src/tusb_config.h
index 2e744f8d2..bd1dfc688 100644
--- a/examples/device/cdc_uac2/src/tusb_config.h
+++ b/examples/device/cdc_uac2/src/tusb_config.h
@@ -24,8 +24,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -171,4 +171,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 19ed63b51..252b602ac 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -35,9 +35,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/dfu/src/usb_descriptors.c b/examples/device/dfu/src/usb_descriptors.c
index a7fca87cd..14ec315ea 100644
--- a/examples/device/dfu/src/usb_descriptors.c
+++ b/examples/device/dfu/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/dfu_runtime/src/usb_descriptors.c b/examples/device/dfu_runtime/src/usb_descriptors.c
index d64ad151f..1d46ee252 100644
--- a/examples/device/dfu_runtime/src/usb_descriptors.c
+++ b/examples/device/dfu_runtime/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/dynamic_configuration/src/tusb_config.h b/examples/device/dynamic_configuration/src/tusb_config.h
index b9b3878cc..7309d97c9 100644
--- a/examples/device/dynamic_configuration/src/tusb_config.h
+++ b/examples/device/dynamic_configuration/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -112,4 +112,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 4599c6f82..083279938 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 // Configuration mode
 // 0 : enumerated as CDC/MIDI. Board button is not pressed when enumerating
diff --git a/examples/device/hid_boot_interface/src/tusb_config.h b/examples/device/hid_boot_interface/src/tusb_config.h
index 52723e09f..5d6fd62e1 100644
--- a/examples/device/hid_boot_interface/src/tusb_config.h
+++ b/examples/device/hid_boot_interface/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -104,4 +104,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c
index a830dfea8..9b4becc85 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.c
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/hid_composite/src/tusb_config.h b/examples/device/hid_composite/src/tusb_config.h
index 6bd32c427..895745ed2 100644
--- a/examples/device/hid_composite/src/tusb_config.h
+++ b/examples/device/hid_composite/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -104,4 +104,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/hid_composite/src/usb_descriptors.c b/examples/device/hid_composite/src/usb_descriptors.c
index 168f3f325..46e4b63f9 100644
--- a/examples/device/hid_composite/src/usb_descriptors.c
+++ b/examples/device/hid_composite/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/hid_composite_freertos/src/tusb_config.h b/examples/device/hid_composite_freertos/src/tusb_config.h
index b28033a0c..ad067ac82 100644
--- a/examples/device/hid_composite_freertos/src/tusb_config.h
+++ b/examples/device/hid_composite_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -111,4 +111,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/hid_composite_freertos/src/usb_descriptors.c b/examples/device/hid_composite_freertos/src/usb_descriptors.c
index dd8682e64..a745c17b5 100644
--- a/examples/device/hid_composite_freertos/src/usb_descriptors.c
+++ b/examples/device/hid_composite_freertos/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/hid_generic_inout/src/tusb_config.h b/examples/device/hid_generic_inout/src/tusb_config.h
index 98143ac4d..58dc52afc 100644
--- a/examples/device/hid_generic_inout/src/tusb_config.h
+++ b/examples/device/hid_generic_inout/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -104,4 +104,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/hid_generic_inout/src/usb_descriptors.c b/examples/device/hid_generic_inout/src/usb_descriptors.c
index b8bcda30e..f26333d50 100644
--- a/examples/device/hid_generic_inout/src/usb_descriptors.c
+++ b/examples/device/hid_generic_inout/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/hid_multiple_interface/src/tusb_config.h b/examples/device/hid_multiple_interface/src/tusb_config.h
index 49dc962fe..e1805017d 100644
--- a/examples/device/hid_multiple_interface/src/tusb_config.h
+++ b/examples/device/hid_multiple_interface/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -104,4 +104,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/hid_multiple_interface/src/usb_descriptors.c b/examples/device/hid_multiple_interface/src/usb_descriptors.c
index 0c5645247..cd2d93c44 100644
--- a/examples/device/hid_multiple_interface/src/usb_descriptors.c
+++ b/examples/device/hid_multiple_interface/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/midi_test/src/tusb_config.h b/examples/device/midi_test/src/tusb_config.h
index 314dde438..f4282b2d7 100644
--- a/examples/device/midi_test/src/tusb_config.h
+++ b/examples/device/midi_test/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -105,4 +105,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/midi_test/src/usb_descriptors.c b/examples/device/midi_test/src/usb_descriptors.c
index da873479e..e969f33a3 100644
--- a/examples/device/midi_test/src/usb_descriptors.c
+++ b/examples/device/midi_test/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/midi_test_freertos/src/tusb_config.h b/examples/device/midi_test_freertos/src/tusb_config.h
index 0ffdc37fb..c158f5197 100644
--- a/examples/device/midi_test_freertos/src/tusb_config.h
+++ b/examples/device/midi_test_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -105,4 +105,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/midi_test_freertos/src/usb_descriptors.c b/examples/device/midi_test_freertos/src/usb_descriptors.c
index da873479e..e969f33a3 100644
--- a/examples/device/midi_test_freertos/src/usb_descriptors.c
+++ b/examples/device/midi_test_freertos/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/msc_dual_lun/src/tusb_config.h b/examples/device/msc_dual_lun/src/tusb_config.h
index 9cbbbade9..4fb6816c6 100644
--- a/examples/device/msc_dual_lun/src/tusb_config.h
+++ b/examples/device/msc_dual_lun/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -104,4 +104,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/msc_dual_lun/src/usb_descriptors.c b/examples/device/msc_dual_lun/src/usb_descriptors.c
index 8fbbf0d90..f73935ee0 100644
--- a/examples/device/msc_dual_lun/src/usb_descriptors.c
+++ b/examples/device/msc_dual_lun/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/mtp/src/tusb_config.h b/examples/device/mtp/src/tusb_config.h
index 4d166aa63..95cc048ee 100644
--- a/examples/device/mtp/src/tusb_config.h
+++ b/examples/device/mtp/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -136,4 +136,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/mtp/src/usb_descriptors.c b/examples/device/mtp/src/usb_descriptors.c
index db8b32a4d..f0aa3de6b 100644
--- a/examples/device/mtp/src/usb_descriptors.c
+++ b/examples/device/mtp/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]  MTP | VENDOR | MIDI | HID | MSC | CDC [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) | _PID_MAP(MTP, 5))
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | PID_MAP(MTP, 5))
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h
index 31731ac1b..3285ea52c 100644
--- a/examples/device/net_lwip_webserver/src/tusb_config.h
+++ b/examples/device/net_lwip_webserver/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -141,4 +141,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index 5bd9ff0f3..1bc568983 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]       NET | VENDOR | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) | _PID_MAP(ECM_RNDIS, 5) | _PID_MAP(NCM, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | PID_MAP(ECM_RNDIS, 5) | PID_MAP(NCM, 5) )
 
 // String Descriptor Index
 enum
diff --git a/examples/device/uac2_headset/src/tusb_config.h b/examples/device/uac2_headset/src/tusb_config.h
index e9165163b..2678054e1 100644
--- a/examples/device/uac2_headset/src/tusb_config.h
+++ b/examples/device/uac2_headset/src/tusb_config.h
@@ -24,8 +24,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -165,4 +165,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/uac2_headset/src/usb_descriptors.c b/examples/device/uac2_headset/src/usb_descriptors.c
index 7aa0b17fc..7b1a41161 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.c
+++ b/examples/device/uac2_headset/src/usb_descriptors.c
@@ -34,9 +34,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/uac2_speaker_fb/src/tusb_config.h b/examples/device/uac2_speaker_fb/src/tusb_config.h
index 18ab2ff96..153b056bf 100644
--- a/examples/device/uac2_speaker_fb/src/tusb_config.h
+++ b/examples/device/uac2_speaker_fb/src/tusb_config.h
@@ -24,8 +24,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -162,4 +162,4 @@ extern "C" {
 }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.c b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
index 29f7ea6d6..c74eb90dc 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.c
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.c
@@ -38,9 +38,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VENDOR, 5) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VENDOR, 5) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/device/usbtmc/src/usb_descriptors.c b/examples/device/usbtmc/src/usb_descriptors.c
index 747850593..16bd176f8 100644
--- a/examples/device/usbtmc/src/usb_descriptors.c
+++ b/examples/device/usbtmc/src/usb_descriptors.c
@@ -34,9 +34,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xcafe
 #define USB_BCD   0x0200
diff --git a/examples/device/video_capture/src/tusb_config.h b/examples/device/video_capture/src/tusb_config.h
index 4ba86ca65..390152e16 100644
--- a/examples/device/video_capture/src/tusb_config.h
+++ b/examples/device/video_capture/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -115,4 +115,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/video_capture/src/usb_descriptors.c b/examples/device/video_capture/src/usb_descriptors.c
index 2fd1860c3..114dd5722 100644
--- a/examples/device/video_capture/src/usb_descriptors.c
+++ b/examples/device/video_capture/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]  VIDEO | AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VIDEO, 5) | _PID_MAP(VENDOR, 6) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VIDEO, 5) | PID_MAP(VENDOR, 6) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/video_capture_2ch/src/tusb_config.h b/examples/device/video_capture_2ch/src/tusb_config.h
index e84e49879..48ab4d20a 100644
--- a/examples/device/video_capture_2ch/src/tusb_config.h
+++ b/examples/device/video_capture_2ch/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -117,4 +117,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/video_capture_2ch/src/usb_descriptors.c b/examples/device/video_capture_2ch/src/usb_descriptors.c
index 0d19c53cf..024d16e07 100644
--- a/examples/device/video_capture_2ch/src/usb_descriptors.c
+++ b/examples/device/video_capture_2ch/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]  VIDEO | AUDIO | MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-    _PID_MAP(MIDI, 3) | _PID_MAP(AUDIO, 4) | _PID_MAP(VIDEO, 5) | _PID_MAP(VENDOR, 6) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+    PID_MAP(MIDI, 3) | PID_MAP(AUDIO, 4) | PID_MAP(VIDEO, 5) | PID_MAP(VENDOR, 6) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/device/webusb_serial/src/tusb_config.h b/examples/device/webusb_serial/src/tusb_config.h
index b86ad3752..b6cdf7e56 100644
--- a/examples/device/webusb_serial/src/tusb_config.h
+++ b/examples/device/webusb_serial/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -111,4 +111,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/device/webusb_serial/src/usb_descriptors.c b/examples/device/webusb_serial/src/usb_descriptors.c
index 8579190be..0ef41a68e 100644
--- a/examples/device/webusb_serial/src/usb_descriptors.c
+++ b/examples/device/webusb_serial/src/usb_descriptors.c
@@ -33,9 +33,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]       MIDI | HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 //--------------------------------------------------------------------+
 // Device Descriptors
diff --git a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
index ca515b36e..3efa30e20 100644
--- a/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_hid_to_device_cdc/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c b/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
index ca515b36e..3efa30e20 100644
--- a/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
+++ b/examples/dual/host_info_to_device_cdc/src/usb_descriptors.c
@@ -32,9 +32,9 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(MSC, 1) | _PID_MAP(HID, 2) | \
-                           _PID_MAP(MIDI, 3) | _PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
 
 #define USB_VID   0xCafe
 #define USB_BCD   0x0200
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 2f8cb5e03..75de3511c 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -134,4 +134,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
index 3cdb227e2..8583e7176 100644
--- a/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid_freertos/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -139,4 +139,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/host/hid_controller/src/tusb_config.h b/examples/host/hid_controller/src/tusb_config.h
index 351fe0178..a5c202fda 100644
--- a/examples/host/hid_controller/src/tusb_config.h
+++ b/examples/host/hid_controller/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -119,4 +119,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/host/msc_file_explorer/src/tusb_config.h b/examples/host/msc_file_explorer/src/tusb_config.h
index c1829c300..a9d24c89f 100644
--- a/examples/host/msc_file_explorer/src/tusb_config.h
+++ b/examples/host/msc_file_explorer/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -118,4 +118,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/examples/typec/power_delivery/src/tusb_config.h b/examples/typec/power_delivery/src/tusb_config.h
index f7cb3cc04..ee013d056 100644
--- a/examples/typec/power_delivery/src/tusb_config.h
+++ b/examples/typec/power_delivery/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -80,4 +80,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/hw/bsp/ansi_escape.h b/hw/bsp/ansi_escape.h
index 15af2f3ab..0b72bea17 100644
--- a/hw/bsp/ansi_escape.h
+++ b/hw/bsp/ansi_escape.h
@@ -28,8 +28,8 @@
  *  \defgroup group_ansi_esc ANSI Escape Code
  *  @{ */
 
-#ifndef _TUSB_ANSI_ESC_CODE_H_
-#define _TUSB_ANSI_ESC_CODE_H_
+#ifndef TUSB_ANSI_ESC_CODE_H_
+#define TUSB_ANSI_ESC_CODE_H_
 
 
 #ifdef __cplusplus
@@ -92,6 +92,6 @@
  }
 #endif
 
-#endif /* _TUSB_ANSI_ESC_CODE_H_ */
+#endif /* TUSB_ANSI_ESC_CODE_H_ */
 
 /** @} */
diff --git a/hw/bsp/nuc100_120/family.cmake b/hw/bsp/nuc100_120/family.cmake
index f81447596..b8f36bb9b 100644
--- a/hw/bsp/nuc100_120/family.cmake
+++ b/hw/bsp/nuc100_120/family.cmake
@@ -69,19 +69,17 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       )
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--script=${LD_FILE_Clang}")
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES
-      COMPILE_FLAGS "-Wno-missing-prototypes -Wno-redundant-decls")
+      COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
   set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
diff --git a/hw/bsp/nuc121_125/family.cmake b/hw/bsp/nuc121_125/family.cmake
index 718f8db9a..ee52e9ce4 100644
--- a/hw/bsp/nuc121_125/family.cmake
+++ b/hw/bsp/nuc121_125/family.cmake
@@ -72,14 +72,14 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       )
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--script=${LD_FILE_Clang}")
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
diff --git a/hw/bsp/nuc126/family.cmake b/hw/bsp/nuc126/family.cmake
index 3fc670cf0..d0f99ba1a 100644
--- a/hw/bsp/nuc126/family.cmake
+++ b/hw/bsp/nuc126/family.cmake
@@ -75,14 +75,14 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       )
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--script=${LD_FILE_Clang}")
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
diff --git a/hw/bsp/nuc505/family.cmake b/hw/bsp/nuc505/family.cmake
index a31f5ff73..581cad4d0 100644
--- a/hw/bsp/nuc505/family.cmake
+++ b/hw/bsp/nuc505/family.cmake
@@ -71,14 +71,14 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       )
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_Clang}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--script=${LD_FILE_Clang}")
+    target_compile_options(${TARGET} PRIVATE -Wno-redundant-decls)
+
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+    target_link_options(${TARGET} PUBLIC "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
diff --git a/lib/rt-thread/tusb_config.h b/lib/rt-thread/tusb_config.h
index 11dc21983..6f794dc41 100644
--- a/lib/rt-thread/tusb_config.h
+++ b/lib/rt-thread/tusb_config.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __RTTHREAD__
 #include <rtconfig.h>
@@ -215,4 +215,4 @@ extern "C" {
 #endif
 #endif /*__RTTHREAD__*/
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index 0d1acadcc..fc352a1af 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -30,8 +30,8 @@
  *            Currently only MIDI subclass is supported
  *  @{ */
 
-#ifndef _TUSB_AUDIO_H__
-#define _TUSB_AUDIO_H__
+#ifndef TUSB_AUDIO_H__
+#define TUSB_AUDIO_H__
 
 #include "common/tusb_common.h"
 
diff --git a/src/class/audio/audio_device.h b/src/class/audio/audio_device.h
index 00948767e..b22a918f4 100644
--- a/src/class/audio/audio_device.h
+++ b/src/class/audio/audio_device.h
@@ -462,7 +462,7 @@ void     audiod_sof_isr        (uint8_t rhport, uint32_t frame_count);
 }
 #endif
 
-#endif /* _TUSB_AUDIO_DEVICE_H_ */
+#endif /* TUSB_AUDIO_DEVICE_H_ */
 
 /** @} */
 /** @} */
diff --git a/src/class/bth/bth_device.h b/src/class/bth/bth_device.h
index 68f073bff..89a056dc8 100755
--- a/src/class/bth/bth_device.h
+++ b/src/class/bth/bth_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_BTH_DEVICE_H_
-#define _TUSB_BTH_DEVICE_H_
+#ifndef TUSB_BTH_DEVICE_H_
+#define TUSB_BTH_DEVICE_H_
 
 #include <common/tusb_common.h>
 #include <device/usbd.h>
@@ -114,4 +114,4 @@ bool     btd_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t r
  }
 #endif
 
-#endif /* _TUSB_BTH_DEVICE_H_ */
+#endif /* TUSB_BTH_DEVICE_H_ */
diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 10ba16a7c..6d207c717 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -29,8 +29,8 @@
  *            Currently only Abstract Control Model subclass is supported
  *  @{ */
 
-#ifndef _TUSB_CDC_H__
-#define _TUSB_CDC_H__
+#ifndef TUSB_CDC_H__
+#define TUSB_CDC_H__
 
 #include "common/tusb_common.h"
 
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index 9673b9807..c321f3d16 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -257,4 +257,4 @@ bool     cdcd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t re
  }
 #endif
 
-#endif /* _TUSB_CDC_DEVICE_H_ */
+#endif /* TUSB_CDC_DEVICE_H_ */
diff --git a/src/class/cdc/cdc_host.h b/src/class/cdc/cdc_host.h
index bf6711d7e..e8637beac 100644
--- a/src/class/cdc/cdc_host.h
+++ b/src/class/cdc/cdc_host.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_CDC_HOST_H_
-#define _TUSB_CDC_HOST_H_
+#ifndef TUSB_CDC_HOST_H_
+#define TUSB_CDC_HOST_H_
 
 #include "cdc.h"
 
@@ -255,4 +255,4 @@ void cdch_close      (uint8_t dev_addr);
  }
 #endif
 
-#endif /* _TUSB_CDC_HOST_H_ */
+#endif /* TUSB_CDC_HOST_H_ */
diff --git a/src/class/cdc/cdc_rndis.h b/src/class/cdc/cdc_rndis.h
index ad153e0ac..fbbd43206 100644
--- a/src/class/cdc/cdc_rndis.h
+++ b/src/class/cdc/cdc_rndis.h
@@ -30,8 +30,8 @@
  *  \defgroup CDC_RNDIS_Common Common Definitions
  *  @{ */
 
-#ifndef _TUSB_CDC_RNDIS_H_
-#define _TUSB_CDC_RNDIS_H_
+#ifndef TUSB_CDC_RNDIS_H_
+#define TUSB_CDC_RNDIS_H_
 
 #include "cdc.h"
 
@@ -295,7 +295,7 @@ typedef enum
  }
 #endif
 
-#endif /* _TUSB_CDC_RNDIS_H_ */
+#endif /* TUSB_CDC_RNDIS_H_ */
 
 /** @} */
 /** @} */
diff --git a/src/class/cdc/cdc_rndis_host.h b/src/class/cdc/cdc_rndis_host.h
index bb431ec1f..e70d27f79 100644
--- a/src/class/cdc/cdc_rndis_host.h
+++ b/src/class/cdc/cdc_rndis_host.h
@@ -28,8 +28,8 @@
  * \defgroup CDC_RNSID_Host Host
  *  @{ */
 
-#ifndef _TUSB_CDC_RNDIS_HOST_H_
-#define _TUSB_CDC_RNDIS_HOST_H_
+#ifndef TUSB_CDC_RNDIS_HOST_H_
+#define TUSB_CDC_RNDIS_HOST_H_
 
 #include "common/tusb_common.h"
 #include "host/usbh.h"
@@ -58,6 +58,6 @@ void rndish_close(uint8_t dev_addr);
  }
 #endif
 
-#endif /* _TUSB_CDC_RNDIS_HOST_H_ */
+#endif /* TUSB_CDC_RNDIS_HOST_H_ */
 
 /** @} */
diff --git a/src/class/dfu/dfu.h b/src/class/dfu/dfu.h
index 114c827b8..8cd63656a 100644
--- a/src/class/dfu/dfu.h
+++ b/src/class/dfu/dfu.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DFU_H_
-#define _TUSB_DFU_H_
+#ifndef TUSB_DFU_H_
+#define TUSB_DFU_H_
 
 #include "common/tusb_common.h"
 
@@ -116,4 +116,4 @@ TU_VERIFY_STATIC( sizeof(dfu_status_response_t) == 6, "size is not correct");
  }
 #endif
 
-#endif /* _TUSB_DFU_H_ */
+#endif /* TUSB_DFU_H_ */
diff --git a/src/class/dfu/dfu_device.h b/src/class/dfu/dfu_device.h
index e59e61ce9..b22b4c450 100644
--- a/src/class/dfu/dfu_device.h
+++ b/src/class/dfu/dfu_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DFU_DEVICE_H_
-#define _TUSB_DFU_DEVICE_H_
+#ifndef TUSB_DFU_DEVICE_H_
+#define TUSB_DFU_DEVICE_H_
 
 #include "dfu.h"
 
@@ -96,4 +96,4 @@ bool     dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_r
  }
 #endif
 
-#endif /* _TUSB_DFU_MODE_DEVICE_H_ */
+#endif /* TUSB_DFU_MODE_DEVICE_H_ */
diff --git a/src/class/dfu/dfu_rt_device.h b/src/class/dfu/dfu_rt_device.h
index 67eb26d95..c4116d8fe 100644
--- a/src/class/dfu/dfu_rt_device.h
+++ b/src/class/dfu/dfu_rt_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DFU_RT_DEVICE_H_
-#define _TUSB_DFU_RT_DEVICE_H_
+#ifndef TUSB_DFU_RT_DEVICE_H_
+#define TUSB_DFU_RT_DEVICE_H_
 
 #include "dfu.h"
 
@@ -52,4 +52,4 @@ bool     dfu_rtd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_req
  }
 #endif
 
-#endif /* _TUSB_DFU_RT_DEVICE_H_ */
+#endif /* TUSB_DFU_RT_DEVICE_H_ */
diff --git a/src/class/hid/hid.h b/src/class/hid/hid.h
index b69f623a0..0883d95ac 100644
--- a/src/class/hid/hid.h
+++ b/src/class/hid/hid.h
@@ -28,8 +28,8 @@
  *  \defgroup ClassDriver_HID Human Interface Device (HID)
  *  @{ */
 
-#ifndef _TUSB_HID_H_
-#define _TUSB_HID_H_
+#ifndef TUSB_HID_H_
+#define TUSB_HID_H_
 
 #include "common/tusb_common.h"
 
@@ -2071,6 +2071,6 @@ enum {
  }
 #endif
 
-#endif /* _TUSB_HID_H__ */
+#endif /* TUSB_HID_H__ */
 
 /// @}
diff --git a/src/class/hid/hid_host.h b/src/class/hid/hid_host.h
index 032827af1..87f0e7dc9 100644
--- a/src/class/hid/hid_host.h
+++ b/src/class/hid/hid_host.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_HID_HOST_H_
-#define _TUSB_HID_HOST_H_
+#ifndef TUSB_HID_HOST_H_
+#define TUSB_HID_HOST_H_
 
 #include "hid.h"
 
@@ -182,4 +182,4 @@ void hidh_close(uint8_t dev_addr);
 }
 #endif
 
-#endif /* _TUSB_HID_HOST_H_ */
+#endif /* TUSB_HID_HOST_H_ */
diff --git a/src/class/midi/midi_device.h b/src/class/midi/midi_device.h
index c2c6e9859..d23516cec 100644
--- a/src/class/midi/midi_device.h
+++ b/src/class/midi/midi_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MIDI_DEVICE_H_
-#define _TUSB_MIDI_DEVICE_H_
+#ifndef TUSB_MIDI_DEVICE_H_
+#define TUSB_MIDI_DEVICE_H_
 
 #include "class/audio/audio.h"
 #include "midi.h"
@@ -168,7 +168,7 @@ bool     midid_xfer_cb         (uint8_t rhport, uint8_t edpt_addr, xfer_result_t
  }
 #endif
 
-#endif /* _TUSB_MIDI_DEVICE_H_ */
+#endif /* TUSB_MIDI_DEVICE_H_ */
 
 /** @} */
 /** @} */
diff --git a/src/class/msc/msc.h b/src/class/msc/msc.h
index b2b44eac4..3b5d4a855 100644
--- a/src/class/msc/msc.h
+++ b/src/class/msc/msc.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MSC_H_
-#define _TUSB_MSC_H_
+#ifndef TUSB_MSC_H_
+#define TUSB_MSC_H_
 
 #include "common/tusb_common.h"
 
@@ -398,4 +398,4 @@ TU_VERIFY_STATIC(sizeof(scsi_write10_t) == 10, "size is not correct");
  }
 #endif
 
-#endif /* _TUSB_MSC_H_ */
+#endif /* TUSB_MSC_H_ */
diff --git a/src/class/msc/msc_device.h b/src/class/msc/msc_device.h
index 7d898e988..21e24971b 100644
--- a/src/class/msc/msc_device.h
+++ b/src/class/msc/msc_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MSC_DEVICE_H_
-#define _TUSB_MSC_DEVICE_H_
+#ifndef TUSB_MSC_DEVICE_H_
+#define TUSB_MSC_DEVICE_H_
 
 #include "common/tusb_common.h"
 #include "msc.h"
@@ -167,4 +167,4 @@ bool     mscd_xfer_cb         (uint8_t rhport, uint8_t ep_addr, xfer_result_t ev
  }
 #endif
 
-#endif /* _TUSB_MSC_DEVICE_H_ */
+#endif /* TUSB_MSC_DEVICE_H_ */
diff --git a/src/class/net/ncm.h b/src/class/net/ncm.h
index 0245a87f2..8989fe0b4 100644
--- a/src/class/net/ncm.h
+++ b/src/class/net/ncm.h
@@ -25,8 +25,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_NCM_H_
-#define _TUSB_NCM_H_
+#ifndef TUSB_NCM_H_
+#define TUSB_NCM_H_
 
 #include "common/tusb_common.h"
 
diff --git a/src/class/net/net_device.h b/src/class/net/net_device.h
index ef5ecffc8..96c03fd61 100644
--- a/src/class/net/net_device.h
+++ b/src/class/net/net_device.h
@@ -25,8 +25,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_NET_DEVICE_H_
-#define _TUSB_NET_DEVICE_H_
+#ifndef TUSB_NET_DEVICE_H_
+#define TUSB_NET_DEVICE_H_
 
 #include <stdint.h>
 #include "class/cdc/cdc.h"
@@ -114,4 +114,4 @@ void     netd_report          (uint8_t *buf, uint16_t len);
  }
 #endif
 
-#endif /* _TUSB_NET_DEVICE_H_ */
+#endif /* TUSB_NET_DEVICE_H_ */
diff --git a/src/class/usbtmc/usbtmc.h b/src/class/usbtmc/usbtmc.h
index 327de087c..3bf5e1a17 100644
--- a/src/class/usbtmc/usbtmc.h
+++ b/src/class/usbtmc/usbtmc.h
@@ -25,8 +25,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_USBTMC_H__
-#define _TUSB_USBTMC_H__
+#ifndef TUSB_USBTMC_H__
+#define TUSB_USBTMC_H__
 
 #include "common/tusb_common.h"
 
diff --git a/src/class/vendor/vendor_device.h b/src/class/vendor/vendor_device.h
index 5fe4fc9ff..5376f3917 100644
--- a/src/class/vendor/vendor_device.h
+++ b/src/class/vendor/vendor_device.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_VENDOR_DEVICE_H_
-#define _TUSB_VENDOR_DEVICE_H_
+#ifndef TUSB_VENDOR_DEVICE_H_
+#define TUSB_VENDOR_DEVICE_H_
 
 #include "common/tusb_common.h"
 
@@ -141,4 +141,4 @@ bool     vendord_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, u
  }
 #endif
 
-#endif /* _TUSB_VENDOR_DEVICE_H_ */
+#endif /* TUSB_VENDOR_DEVICE_H_ */
diff --git a/src/class/vendor/vendor_host.h b/src/class/vendor/vendor_host.h
index acfebe7a4..00e3c3402 100644
--- a/src/class/vendor/vendor_host.h
+++ b/src/class/vendor/vendor_host.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_VENDOR_HOST_H_
-#define _TUSB_VENDOR_HOST_H_
+#ifndef TUSB_VENDOR_HOST_H_
+#define TUSB_VENDOR_HOST_H_
 
 #include "common/tusb_common.h"
 
@@ -64,4 +64,4 @@ void cush_close(uint8_t dev_addr);
  }
 #endif
 
-#endif /* _TUSB_VENDOR_HOST_H_ */
+#endif /* TUSB_VENDOR_HOST_H_ */
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index dfa9299c1..04149da71 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_COMMON_H_
-#define _TUSB_COMMON_H_
+#ifndef TUSB_COMMON_H_
+#define TUSB_COMMON_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -391,4 +391,4 @@ uint8_t const * tu_desc_find3(uint8_t const* desc, uint8_t const* end, uint8_t b
  }
 #endif
 
-#endif /* _TUSB_COMMON_H_ */
+#endif /* TUSB_COMMON_H_ */
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 9b33a6f61..55950fb45 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -29,8 +29,8 @@
  *  \brief Group_Compiler brief
  *  @{ */
 
-#ifndef _TUSB_COMPILER_H_
-#define _TUSB_COMPILER_H_
+#ifndef TUSB_COMPILER_H_
+#define TUSB_COMPILER_H_
 
 #define TU_TOKEN(x)           x
 #define TU_STRING(x)          #x                  ///< stringify without expand
@@ -45,9 +45,9 @@
 #define TU_INCLUDE_PATH(_dir,_file) TU_XSTRING( TU_TOKEN(_dir)TU_TOKEN(_file) )
 
 #if defined __COUNTER__ && __COUNTER__ != __COUNTER__
-  #define _TU_COUNTER_ __COUNTER__
+  #define TU_COUNTER __COUNTER__
 #else
-  #define _TU_COUNTER_ __LINE__
+  #define TU_COUNTER __LINE__
 #endif
 
 // Compile-time Assert
@@ -56,9 +56,9 @@
 #elif defined (__STDC_VERSION__) && __STDC_VERSION__ >= 201112L
   #define TU_VERIFY_STATIC   _Static_assert
 #elif defined(__CCRX__)
-  #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(_verify_static_, _TU_COUNTER_)[(const_expr) ? 1 : 0];
+  #define TU_VERIFY_STATIC(const_expr, _mess) typedef char TU_XSTRCAT(_verify_static_, TU_COUNTER)[(const_expr) ? 1 : 0];
 #else
-  #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, _TU_COUNTER_) = 1/(!!(const_expr)) }
+  #define TU_VERIFY_STATIC(const_expr, _mess) enum { TU_XSTRCAT(_verify_static_, TU_COUNTER) = 1/(!!(const_expr)) }
 #endif
 
 /* --------------------- Fuzzing types -------------------------------------- */
@@ -68,8 +68,8 @@
   #define tu_static static
 #endif
 
-// for declaration of reserved field, make use of _TU_COUNTER_
-#define TU_RESERVED           TU_XSTRCAT(reserved, _TU_COUNTER_)
+// for declaration of reserved field, make use of TU_COUNTER
+#define TU_RESERVED           TU_XSTRCAT(reserved, TU_COUNTER)
 
 #define TU_LITTLE_ENDIAN (0x12u)
 #define TU_BIG_ENDIAN (0x21u)
@@ -305,6 +305,6 @@
   #error Byte order is undefined
 #endif
 
-#endif /* _TUSB_COMPILER_H_ */
+#endif /* TUSB_COMPILER_H_ */
 
 /// @}
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 86517b9c9..e3f9d3f18 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DEBUG_H_
-#define _TUSB_DEBUG_H_
+#ifndef TUSB_DEBUG_H_
+#define TUSB_DEBUG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -168,4 +168,4 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
  }
 #endif
 
-#endif /* _TUSB_DEBUG_H_ */
+#endif
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index 879acda4f..f2a6c5469 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -25,8 +25,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_FIFO_H_
-#define _TUSB_FIFO_H_
+#ifndef TUSB_FIFO_H_
+#define TUSB_FIFO_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -196,4 +196,4 @@ void tu_fifo_get_write_info(tu_fifo_t *f, tu_fifo_buffer_info_t *info);
 }
 #endif
 
-#endif /* _TUSB_FIFO_H_ */
+#endif
diff --git a/src/device/usbd.h b/src/device/usbd.h
index c62986150..f75803b14 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_USBD_H_
-#define _TUSB_USBD_H_
+#ifndef TUSB_USBD_H_
+#define TUSB_USBD_H_
 
 #include "common/tusb_common.h"
 
@@ -904,6 +904,6 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 }
 #endif
 
-#endif /* _TUSB_USBD_H_ */
+#endif /* TUSB_USBD_H_ */
 
 /** @} */
diff --git a/src/host/hcd.h b/src/host/hcd.h
index d3551bf5b..4a17326ec 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_HCD_H_
-#define _TUSB_HCD_H_
+#ifndef TUSB_HCD_H_
+#define TUSB_HCD_H_
 
 #include "common/tusb_common.h"
 #include "osal/osal.h"
diff --git a/src/host/usbh.h b/src/host/usbh.h
index 8d48bf90d..4b6747848 100644
--- a/src/host/usbh.h
+++ b/src/host/usbh.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_USBH_H_
-#define _TUSB_USBH_H_
+#ifndef TUSB_USBH_H_
+#define TUSB_USBH_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -179,7 +179,7 @@ TU_ATTR_ALWAYS_INLINE static inline void tuh_task(void) {
 // Check if there is pending events need processing by tuh_task()
 bool tuh_task_event_ready(void);
 
-#ifndef _TUSB_HCD_H_
+#ifndef TUSB_HCD_H_
 extern void hcd_int_handler(uint8_t rhport, bool in_isr);
 #endif
 
diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h
index 9d91e52e8..d722bb7e8 100644
--- a/src/host/usbh_pvt.h
+++ b/src/host/usbh_pvt.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_USBH_PVT_H_
-#define _TUSB_USBH_PVT_H_
+#ifndef TUSB_USBH_PVT_H_
+#define TUSB_USBH_PVT_H_
 
 #include "osal/osal.h"
 #include "common/tusb_fifo.h"
diff --git a/src/osal/osal.h b/src/osal/osal.h
index 658b18584..44521620f 100644
--- a/src/osal/osal.h
+++ b/src/osal/osal.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_OSAL_H_
-#define _TUSB_OSAL_H_
+#ifndef TUSB_OSAL_H_
+#define TUSB_OSAL_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -101,4 +101,4 @@ typedef void (*osal_task_func_t)(void* param);
  }
 #endif
 
-#endif /* _TUSB_OSAL_H_ */
+#endif
diff --git a/src/osal/osal_none.h b/src/osal/osal_none.h
index 6f9b8b0dc..bc86dcb28 100644
--- a/src/osal/osal_none.h
+++ b/src/osal/osal_none.h
@@ -156,7 +156,7 @@ typedef osal_queue_def_t* osal_queue_t;
   }
 
 TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
-  tu_fifo_clear(&qdef->ff);
+  (void) tu_fifo_clear(&qdef->ff);
   return (osal_queue_t) qdef;
 }
 
diff --git a/src/portable/ehci/ehci.h b/src/portable/ehci/ehci.h
index 87659701b..719bdeafc 100644
--- a/src/portable/ehci/ehci.h
+++ b/src/portable/ehci/ehci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_H_
-#define _TUSB_EHCI_H_
+#ifndef TUSB_EHCI_H_
+#define TUSB_EHCI_H_
 
 
 /* Abbreviation
@@ -458,4 +458,4 @@ TU_VERIFY_STATIC(sizeof(ehci_cap_registers_t) == 16, "size is not correct");
  }
 #endif
 
-#endif /* _TUSB_EHCI_H_ */
+#endif /* TUSB_EHCI_H_ */
diff --git a/src/portable/ehci/ehci_api.h b/src/portable/ehci/ehci_api.h
index 12e0a73d7..79fbe702a 100644
--- a/src/portable/ehci/ehci_api.h
+++ b/src/portable/ehci/ehci_api.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_EHCI_API_H_
-#define _TUSB_EHCI_API_H_
+#ifndef TUSB_EHCI_API_H_
+#define TUSB_EHCI_API_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
index 654b80866..25c9f9985 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_LPC17_40_H_
-#define _TUSB_DCD_LPC17_40_H_
+#ifndef TUSB_DCD_LPC17_40_H_
+#define TUSB_DCD_LPC17_40_H_
 
 #include "common/tusb_common.h"
 
diff --git a/src/portable/ohci/ohci.h b/src/portable/ohci/ohci.h
index 94bad5df7..3366f15f7 100644
--- a/src/portable/ohci/ohci.h
+++ b/src/portable/ohci/ohci.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_OHCI_H_
-#define _TUSB_OHCI_H_
+#ifndef TUSB_OHCI_H_
+#define TUSB_OHCI_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -304,4 +304,4 @@ TU_VERIFY_STATIC( sizeof(ohci_registers_t) == (0x54 + (4 * TUP_OHCI_RHPORTS)), "
  }
 #endif
 
-#endif /* _TUSB_OHCI_H_ */
+#endif /* TUSB_OHCI_H_ */
diff --git a/src/portable/renesas/rusb2/rusb2_type.h b/src/portable/renesas/rusb2/rusb2_type.h
index dd88f66a7..71837d03c 100644
--- a/src/portable/renesas/rusb2/rusb2_type.h
+++ b/src/portable/renesas/rusb2/rusb2_type.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_RUSB2_TYPE_H_
-#define _TUSB_RUSB2_TYPE_H_
+#ifndef TUSB_RUSB2_TYPE_H_
+#define TUSB_RUSB2_TYPE_H_
 
 #include <stdint.h>
 #include <stddef.h>
@@ -1777,4 +1777,4 @@ TU_VERIFY_STATIC(offsetof(rusb2_reg_t, DPUSR1R_FS ) == 0x0404, "incorrect offset
 }
 #endif
 
-#endif /* _TUSB_RUSB2_TYPE_H_ */
+#endif /* TUSB_RUSB2_TYPE_H_ */
diff --git a/src/portable/sunxi/musb_def.h b/src/portable/sunxi/musb_def.h
index 53da5ded2..ce9b89d55 100644
--- a/src/portable/sunxi/musb_def.h
+++ b/src/portable/sunxi/musb_def.h
@@ -26,8 +26,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_MUSB_DEF
-#define _TUSB_MUSB_DEF
+#ifndef TUSB_MUSB_DEF
+#define TUSB_MUSB_DEF
 
 
 #define  USBC_Readb(reg)	                    (*(volatile unsigned char *)(reg))
diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h
index e5824606a..df6d4a852 100644
--- a/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DWC2_BCM_H_
-#define _TUSB_DWC2_BCM_H_
+#ifndef TUSB_DWC2_BCM_H_
+#define TUSB_DWC2_BCM_H_
 
 #ifdef __cplusplus
  extern "C" {
diff --git a/src/portable/valentyusb/eptri/dcd_eptri.h b/src/portable/valentyusb/eptri/dcd_eptri.h
index d67635d7c..2fe74a712 100644
--- a/src/portable/valentyusb/eptri/dcd_eptri.h
+++ b/src/portable/valentyusb/eptri/dcd_eptri.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_DCD_VALENTYUSB_EPTRI_H_
-#define _TUSB_DCD_VALENTYUSB_EPTRI_H_
+#ifndef TUSB_DCD_VALENTYUSB_EPTRI_H_
+#define TUSB_DCD_VALENTYUSB_EPTRI_H_
 
 #include "common/tusb_common.h"
 #ifdef __cplusplus
@@ -36,4 +36,4 @@
  }
 #endif
 
-#endif /* _TUSB_DCD_VALENTYUSB_EPTRI_H_ */
+#endif /* TUSB_DCD_VALENTYUSB_EPTRI_H_ */
diff --git a/src/tusb.h b/src/tusb.h
index 6a469eef4..62b3b9783 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_H_
-#define _TUSB_H_
+#ifndef TUSB_H_
+#define TUSB_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -178,4 +178,4 @@ bool tusb_deinit(uint8_t rhport);
  }
 #endif
 
-#endif /* _TUSB_H_ */
+#endif /* TUSB_H_ */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 14404c59c..e00311039 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_OPTION_H_
-#define _TUSB_OPTION_H_
+#ifndef TUSB_OPTION_H_
+#define TUSB_OPTION_H_
 
 #include "common/tusb_compiler.h"
 
@@ -727,6 +727,6 @@
 // To avoid GCC compiler warnings when -pedantic option is used (strict ISO C)
 typedef int make_iso_compilers_happy;
 
-#endif /* _TUSB_OPTION_H_ */
+#endif /* TUSB_OPTION_H_ */
 
 /** @} */
diff --git a/src/typec/pd_types.h b/src/typec/pd_types.h
index 1b2968f65..950f4d488 100644
--- a/src/typec/pd_types.h
+++ b/src/typec/pd_types.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_PD_TYPES_H_
-#define _TUSB_PD_TYPES_H_
+#ifndef TUSB_PD_TYPES_H_
+#define TUSB_PD_TYPES_H_
 
 #ifdef __cplusplus
 extern "C" {
diff --git a/src/typec/tcd.h b/src/typec/tcd.h
index bcbdab8ed..da7ab4b13 100644
--- a/src/typec/tcd.h
+++ b/src/typec/tcd.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_TCD_H_
-#define _TUSB_TCD_H_
+#ifndef TUSB_TCD_H_
+#define TUSB_TCD_H_
 
 #include "common/tusb_common.h"
 #include "pd_types.h"
diff --git a/src/typec/usbc.h b/src/typec/usbc.h
index 448542aab..711119596 100644
--- a/src/typec/usbc.h
+++ b/src/typec/usbc.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef _TUSB_UTCD_H_
-#define _TUSB_UTCD_H_
+#ifndef TUSB_UTCD_H_
+#define TUSB_UTCD_H_
 
 #include "common/tusb_common.h"
 #include "pd_types.h"
@@ -63,7 +63,7 @@ void tuc_task (void) {
   tuc_task_ext(UINT32_MAX, false);
 }
 
-#ifndef _TUSB_TCD_H_
+#ifndef TUSB_TCD_H_
 extern void tcd_int_handler(uint8_t rhport);
 #endif
 
diff --git a/test/fuzz/device/cdc/src/tusb_config.h b/test/fuzz/device/cdc/src/tusb_config.h
index 10a8a825a..76f44619e 100644
--- a/test/fuzz/device/cdc/src/tusb_config.h
+++ b/test/fuzz/device/cdc/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -111,4 +111,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/test/fuzz/device/cdc/src/usb_descriptors.cc b/test/fuzz/device/cdc/src/usb_descriptors.cc
index c26bd18c3..0d7d17b4b 100644
--- a/test/fuzz/device/cdc/src/usb_descriptors.cc
+++ b/test/fuzz/device/cdc/src/usb_descriptors.cc
@@ -30,10 +30,10 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | CDC          [LSB]
  */
-#define _PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
 #define USB_PID                                                                \
-  (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(HID, 2) | _PID_MAP(MIDI, 3) |          \
-   _PID_MAP(VENDOR, 4))
+  (0x4000 | PID_MAP(CDC, 0) | PID_MAP(HID, 2) | PID_MAP(MIDI, 3) |          \
+   PID_MAP(VENDOR, 4))
 
 #define USB_VID 0xCafe
 #define USB_BCD 0x0200
diff --git a/test/fuzz/device/msc/src/tusb_config.h b/test/fuzz/device/msc/src/tusb_config.h
index ca39c6b0a..abd8cd4ce 100644
--- a/test/fuzz/device/msc/src/tusb_config.h
+++ b/test/fuzz/device/msc/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -111,4 +111,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/test/fuzz/device/msc/src/usb_descriptors.cc b/test/fuzz/device/msc/src/usb_descriptors.cc
index 6d9c4cd96..55c113ad7 100644
--- a/test/fuzz/device/msc/src/usb_descriptors.cc
+++ b/test/fuzz/device/msc/src/usb_descriptors.cc
@@ -30,10 +30,10 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define _PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
 #define USB_PID                                                                \
-  (0x4000 | _PID_MAP(MSC, 0) | _PID_MAP(HID, 1) | _PID_MAP(MIDI, 2) |          \
-   _PID_MAP(VENDOR, 3))
+  (0x4000 | PID_MAP(MSC, 0) | PID_MAP(HID, 1) | PID_MAP(MIDI, 2) |          \
+   PID_MAP(VENDOR, 3))
 #define USB_VID 0xCafe
 #define USB_BCD 0x0200
 
diff --git a/test/fuzz/device/net/src/tusb_config.h b/test/fuzz/device/net/src/tusb_config.h
index 6ad859337..4fe98e043 100644
--- a/test/fuzz/device/net/src/tusb_config.h
+++ b/test/fuzz/device/net/src/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 #ifdef __cplusplus
  extern "C" {
@@ -119,4 +119,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
diff --git a/test/fuzz/device/net/src/usb_descriptors.cc b/test/fuzz/device/net/src/usb_descriptors.cc
index e57a791b6..301f23829 100644
--- a/test/fuzz/device/net/src/usb_descriptors.cc
+++ b/test/fuzz/device/net/src/usb_descriptors.cc
@@ -30,10 +30,10 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | CDC          [LSB]
  */
-#define _PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) << (n))
 #define USB_PID                                                                \
-  (0x4000 | _PID_MAP(CDC, 0) | _PID_MAP(HID, 2) | _PID_MAP(MIDI, 3) |          \
-   _PID_MAP(VENDOR, 4))
+  (0x4000 | PID_MAP(CDC, 0) | PID_MAP(HID, 2) | PID_MAP(MIDI, 3) |          \
+   PID_MAP(VENDOR, 4))
 
 #define USB_VID 0xCafe
 #define USB_BCD 0x0200
diff --git a/test/unit-test/test/support/tusb_config.h b/test/unit-test/test/support/tusb_config.h
index 00818fae5..dee24f65d 100644
--- a/test/unit-test/test/support/tusb_config.h
+++ b/test/unit-test/test/support/tusb_config.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _TUSB_CONFIG_H_
-#define _TUSB_CONFIG_H_
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
 
 // testing framework
 #include "unity.h"
@@ -103,4 +103,4 @@
  }
 #endif
 
-#endif /* _TUSB_CONFIG_H_ */
+#endif /* TUSB_CONFIG_H_ */
-- 
cgit v1.3.1


From 3f1f7140c4ad1991c8c1bf73a0864414da68a40d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 30 Oct 2025 14:52:09 +0700
Subject: update lpc55 family.c

---
 hw/bsp/lpc55/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 503e16216..f1ef58926 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -214,7 +214,7 @@ void board_init(void) {
   RESET_PeripheralReset(kUSB0HSL_RST_SHIFT_RSTn);
   RESET_PeripheralReset(kUSB0HMR_RST_SHIFT_RSTn);
 
-  if (BOARD_TUD_RHPORT == 0) {
+  if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) {
     // Enable USB Clock Adjustments to trim the FRO for the full speed controller
     ANACTRL->FRO192M_CTRL |= ANACTRL_FRO192M_CTRL_USBCLKADJ_MASK;
     CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
-- 
cgit v1.3.1


From 00f374682ea5aaecf189e46966f015576049a773 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Nov 2025 11:43:19 +0700
Subject: fixing alert by scanning tool

---
 .../audio_4_channel_mic/src/usb_descriptors.c      | 12 ++++--
 examples/device/cdc_msc/src/main.c                 |  2 +-
 hw/bsp/board_api.h                                 |  3 +-
 src/class/audio/audio.h                            |  2 +-
 src/common/tusb_compiler.h                         | 48 +++++++++++-----------
 src/common/tusb_types.h                            |  4 +-
 src/osal/osal_freertos.h                           | 14 +++----
 src/tusb_option.h                                  |  6 +--
 8 files changed, 48 insertions(+), 43 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic/src/usb_descriptors.c b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
index 2f5f67f66..00337eee7 100644
--- a/examples/device/audio_4_channel_mic/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic/src/usb_descriptors.c
@@ -126,7 +126,7 @@ enum {
 };
 
 // array of pointer to string descriptors
-char const* string_desc_arr [] = {
+static char const* string_desc_arr [] = {
     (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
     "PaniRCorp",                   // 1: Manufacturer
     "MicNode_4_Ch",                // 2: Product
@@ -156,18 +156,22 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if ( chr_count > max_count ) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
-        _desc_str[1 + i] = str[i];
+        _desc_str[1 + i] = (uint16_t) str[i];
       }
       break;
   }
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index c4606528a..5d70903bc 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -123,7 +123,7 @@ void cdc_task(void) {
     static uint32_t btn_prev = 0;
     static cdc_notify_uart_state_t uart_state = { .value = 0 };
     const uint32_t btn = board_button_read();
-    if (!btn_prev && btn) {
+    if ((btn_prev == 0) && btn) {
       uart_state.dsr ^= 1;
       tud_cdc_notify_uart_state(&uart_state);
     }
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 80d86a4aa..088c5fec4 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -35,6 +35,7 @@ extern "C" {
 #include <inttypes.h>
 #include <stdbool.h>
 #include <string.h>
+#include <stdio.h>
 
 #include "tusb.h"
 
@@ -164,7 +165,7 @@ static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars
           '0', '1', '2', '3', '4', '5', '6', '7',
           '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
       };
-      uint8_t const nibble = (uid[i] >> (j * 4)) & 0xf;
+      const uint8_t nibble = (uint8_t) ((uid[i] >> (j * 4)) & 0xf);
       desc_str1[i * 2 + (1 - j)] = nibble_to_hex[nibble]; // UTF-16-LE
     }
   }
diff --git a/src/class/audio/audio.h b/src/class/audio/audio.h
index bcfb67640..cff38cc22 100644
--- a/src/class/audio/audio.h
+++ b/src/class/audio/audio.h
@@ -905,7 +905,7 @@ typedef enum {
   AUDIO20_CHANNEL_CONFIG_BOTTOM_CENTER = 0x01000000,
   AUDIO20_CHANNEL_CONFIG_BACK_LEFT_OF_CENTER = 0x02000000,
   AUDIO20_CHANNEL_CONFIG_BACK_RIGHT_OF_CENTER = 0x04000000,
-  AUDIO20_CHANNEL_CONFIG_RAW_DATA = 0x80000000,
+  AUDIO20_CHANNEL_CONFIG_RAW_DATA = 0x80000000u,
 } audio20_channel_config_t;
 
 /// All remaining definitions are taken from the descriptor descriptions in the UAC2 main specification
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 1ce16f060..49421e865 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -76,7 +76,7 @@
 
 /*------------------------------------------------------------------*/
 /* Count number of arguments of __VA_ARGS__
- * - reference https://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+ * - reference www.stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
  * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
  * - _RSEQ_N() is reverse sequential to N to add padding to have
  * Nth position is the same as the number of arguments
@@ -106,29 +106,29 @@
          19,18,17,16,15,14,13,12,11,10, \
          9,8,7,6,5,4,3,2,1,0
 
-// Apply an macro X to each of the arguments with an separated of choice
-#define TU_ARGS_APPLY(_X, _s, ...)   TU_XSTRCAT(_TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
-
-#define _TU_ARGS_APPLY_1(_X, _s, _a1)                                    _X(_a1)
-#define _TU_ARGS_APPLY_2(_X, _s, _a1, _a2)                               _X(_a1) _s _X(_a2)
-#define _TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3)                          _X(_a1) _s _TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
-#define _TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4)                     _X(_a1) _s _TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
-#define _TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5)                _X(_a1) _s _TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
-#define _TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1) _s _TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
-#define _TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1) _s _TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
-#define _TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s _TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
-
-// Apply an macro X to each of the arguments and expand the result with comma
-#define TU_ARGS_APPLY_EXPAND(_X, ...)   TU_XSTRCAT(_TU_ARGS_APPLY_EXPAND_, TU_ARGS_NUM(__VA_ARGS__))(_X, __VA_ARGS__)
-
-#define _TU_ARGS_APPLY_EXPAND_1(_X, _a1)                                    _X(_a1)
-#define _TU_ARGS_APPLY_EXPAND_2(_X, _a1, _a2)                               _X(_a1), _X(_a2)
-#define _TU_ARGS_APPLY_EXPAND_3(_X, _a1, _a2, _a3)                          _X(_a1), _TU_ARGS_APPLY_EXPAND_2(_X, _a2, _a3)
-#define _TU_ARGS_APPLY_EXPAND_4(_X, _a1, _a2, _a3, _a4)                     _X(_a1), _TU_ARGS_APPLY_EXPAND_3(_X, _a2, _a3, _a4)
-#define _TU_ARGS_APPLY_EXPAND_5(_X, _a1, _a2, _a3, _a4, _a5)                _X(_a1), _TU_ARGS_APPLY_EXPAND_4(_X, _a2, _a3, _a4, _a5)
-#define _TU_ARGS_APPLY_EXPAND_6(_X, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1), _TU_ARGS_APPLY_EXPAND_5(_X, _a2, _a3, _a4, _a5, _a6)
-#define _TU_ARGS_APPLY_EXPAND_7(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1), _TU_ARGS_APPLY_EXPAND_6(_X, _a2, _a3, _a4, _a5, _a6, _a7)
-#define _TU_ARGS_APPLY_EXPAND_8(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1), _TU_ARGS_APPLY_EXPAND_7(_X, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+// Apply a macro X to each of the arguments with a selected separation/delimiter
+#define TU_ARGS_APPLY(_X, _s, ...)   TU_XSTRCAT(TU_ARGS_APPLY_, TU_ARGS_NUM(__VA_ARGS__))(_X, _s, __VA_ARGS__)
+
+#define TU_ARGS_APPLY_1(_X, _s, _a1)                                    _X(_a1)
+#define TU_ARGS_APPLY_2(_X, _s, _a1, _a2)                               _X(_a1) _s _X(_a2)
+#define TU_ARGS_APPLY_3(_X, _s, _a1, _a2, _a3)                          _X(_a1) _s TU_ARGS_APPLY_2(_X, _s, _a2, _a3)
+#define TU_ARGS_APPLY_4(_X, _s, _a1, _a2, _a3, _a4)                     _X(_a1) _s TU_ARGS_APPLY_3(_X, _s, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_5(_X, _s, _a1, _a2, _a3, _a4, _a5)                _X(_a1) _s TU_ARGS_APPLY_4(_X, _s, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_6(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1) _s TU_ARGS_APPLY_5(_X, _s, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_7(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1) _s TU_ARGS_APPLY_6(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_8(_X, _s, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1) _s TU_ARGS_APPLY_7(_X, _s, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
+
+// Apply a macro X to each of the arguments and expand the result with comma
+#define TU_ARGS_APPLY_EXPAND(_X, ...)   TU_XSTRCAT(TU_ARGS_APPLY_EXPAND_, TU_ARGS_NUM(__VA_ARGS__))(_X, __VA_ARGS__)
+
+#define TU_ARGS_APPLY_EXPAND_1(_X, _a1)                                    _X(_a1)
+#define TU_ARGS_APPLY_EXPAND_2(_X, _a1, _a2)                               _X(_a1), _X(_a2)
+#define TU_ARGS_APPLY_EXPAND_3(_X, _a1, _a2, _a3)                          _X(_a1), TU_ARGS_APPLY_EXPAND_2(_X, _a2, _a3)
+#define TU_ARGS_APPLY_EXPAND_4(_X, _a1, _a2, _a3, _a4)                     _X(_a1), TU_ARGS_APPLY_EXPAND_3(_X, _a2, _a3, _a4)
+#define TU_ARGS_APPLY_EXPAND_5(_X, _a1, _a2, _a3, _a4, _a5)                _X(_a1), TU_ARGS_APPLY_EXPAND_4(_X, _a2, _a3, _a4, _a5)
+#define TU_ARGS_APPLY_EXPAND_6(_X, _a1, _a2, _a3, _a4, _a5, _a6)           _X(_a1), TU_ARGS_APPLY_EXPAND_5(_X, _a2, _a3, _a4, _a5, _a6)
+#define TU_ARGS_APPLY_EXPAND_7(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7)      _X(_a1), TU_ARGS_APPLY_EXPAND_6(_X, _a2, _a3, _a4, _a5, _a6, _a7)
+#define TU_ARGS_APPLY_EXPAND_8(_X, _a1, _a2, _a3, _a4, _a5, _a6, _a7, _a8) _X(_a1), TU_ARGS_APPLY_EXPAND_7(_X, _a2, _a3, _a4, _a5, _a6, _a7, _a8)
 
 //--------------------------------------------------------------------+
 // Macro for function default arguments
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 4f2b66e6a..9197381cf 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -544,11 +544,11 @@ TU_ATTR_ALWAYS_INLINE static inline tusb_dir_t tu_edpt_dir(uint8_t addr) {
 
 // Get Endpoint number from address
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
-  return (uint8_t)(addr & (~TUSB_DIR_IN_MASK));
+  return (uint8_t) (addr & (~TUSB_DIR_IN_MASK));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
-  return (uint8_t)(num | (dir ? TUSB_DIR_IN_MASK : 0));
+  return (uint8_t) (num | (dir ? TUSB_DIR_IN_MASK : 0));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) {
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index bde5ec010..9aeda4d01 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -70,15 +70,15 @@ typedef struct {
 } osal_queue_def_t;
 
 #if defined(configQUEUE_REGISTRY_SIZE) && (configQUEUE_REGISTRY_SIZE>0)
-  #define _OSAL_Q_NAME(_name) .name = #_name
+  #define OSAL_Q_NAME(_name) .name = #_name
 #else
-  #define _OSAL_Q_NAME(_name)
+  #define OSAL_Q_NAME(_name)
 #endif
 
 // _int_set is not used with an RTOS
 #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type) \
   static _type _name##_##buf[_depth];\
-  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, _OSAL_Q_NAME(_name) }
+  osal_queue_def_t _name = { .depth = _depth, .item_sz = sizeof(_type), .buf = _name##_##buf, OSAL_Q_NAME(_name) }
 
 //--------------------------------------------------------------------+
 // TASK API
@@ -137,7 +137,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (in_isr) {
-    if (!TUP_MCU_MULTIPLE_CORE) {
+    if (TUP_MCU_MULTIPLE_CORE == 0) {
       (void) ctx;
       return; // single core MCU does not need to lock in ISR
     }
@@ -149,7 +149,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bo
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
   if (in_isr) {
-    if (!TUP_MCU_MULTIPLE_CORE) {
+    if (TUP_MCU_MULTIPLE_CORE == 0) {
       (void) ctx;
       return; // single core MCU does not need to lock in ISR
     }
@@ -166,7 +166,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx,
 //--------------------------------------------------------------------+
 TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
 #if configSUPPORT_STATIC_ALLOCATION
-  return xSemaphoreCreateBinaryStatic(semdef);
+  return xSemaphoreCreateBinaryStatic((StaticSemaphore_t*) semdef);
 #else
   (void) semdef;
   return xSemaphoreCreateBinary();
@@ -174,7 +174,7 @@ TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t semd_hdl) {
-  vSemaphoreDelete(semd_hdl);
+  vSemaphoreDelete((SemaphoreHandle_t) semd_hdl);
   return true;
 }
 
diff --git a/src/tusb_option.h b/src/tusb_option.h
index e00311039..4110dbdee 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -217,9 +217,9 @@
 #define OPT_MCU_AT32F413         2506  ///< ArteryTek AT32F413
 
 // Check if configured MCU is one of listed
-// Apply _TU_CHECK_MCU with || as separator to list of input
-#define _TU_CHECK_MCU(_m)    (CFG_TUSB_MCU == _m)
-#define TU_CHECK_MCU(...)    (TU_ARGS_APPLY(_TU_CHECK_MCU, ||, __VA_ARGS__))
+// Apply TU_MCU_IS_EQUAL with || as separator to list of input
+#define TU_MCU_IS_EQUAL(_m)  (CFG_TUSB_MCU == (_m))
+#define TU_CHECK_MCU(...)    (TU_ARGS_APPLY(TU_MCU_IS_EQUAL, ||, __VA_ARGS__))
 
 //--------------------------------------------------------------------+
 // Supported OS
-- 
cgit v1.3.1


From 8979af34c0e5b97520070bcfdffe5280de9ac24c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 3 Nov 2025 16:36:07 +0700
Subject: Fixed more alert found by PVS-Studio

---
 .../audio_test_multi_rate/src/usb_descriptors.h    |   4 +-
 examples/device/cdc_msc/src/main.c                 |   2 +-
 examples/device/cdc_uac2/src/cdc_app.c             |  19 ++--
 examples/device/cdc_uac2/src/usb_descriptors.h     |   4 +-
 examples/device/net_lwip_webserver/src/lwipopts.h  |   4 +-
 examples/device/uac2_headset/src/usb_descriptors.h |   4 +-
 .../device/uac2_speaker_fb/src/usb_descriptors.h   |   4 +-
 examples/host/cdc_msc_hid_freertos/src/cdc_app.c   |   8 +-
 hw/bsp/board.c                                     |   5 +-
 hw/bsp/board_api.h                                 |   2 +-
 src/class/cdc/cdc.h                                |  18 ++--
 src/class/video/video_device.c                     |   6 +-
 src/common/tusb_common.h                           |  16 ++-
 src/common/tusb_compiler.h                         |  16 +--
 src/common/tusb_fifo.c                             |  42 ++++----
 src/common/tusb_private.h                          |   4 +-
 src/common/tusb_types.h                            |   2 +-
 src/common/tusb_verify.h                           |   4 +-
 src/device/dcd.h                                   |   2 +-
 src/device/usbd.c                                  | 120 ++++++++++-----------
 src/device/usbd.h                                  |  60 ++++++-----
 src/device/usbd_pvt.h                              |   4 +-
 src/portable/synopsys/dwc2/dcd_dwc2.c              |  76 +++++++------
 src/portable/synopsys/dwc2/dwc2_stm32.h            |   4 +-
 src/portable/synopsys/dwc2/dwc2_type.h             |   2 +-
 25 files changed, 224 insertions(+), 208 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.h b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
index c02f40cd9..948a7f4ae 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.h
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _USB_DESCRIPTORS_H_
-#define _USB_DESCRIPTORS_H_
+#ifndef USB_DESCRIPTORS_H_
+#define USB_DESCRIPTORS_H_
 
 // #include "tusb.h"
 
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 5d70903bc..ff998a13d 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -123,7 +123,7 @@ void cdc_task(void) {
     static uint32_t btn_prev = 0;
     static cdc_notify_uart_state_t uart_state = { .value = 0 };
     const uint32_t btn = board_button_read();
-    if ((btn_prev == 0) && btn) {
+    if ((btn_prev == 0u) && btn) {
       uart_state.dsr ^= 1;
       tud_cdc_notify_uart_state(&uart_state);
     }
diff --git a/examples/device/cdc_uac2/src/cdc_app.c b/examples/device/cdc_uac2/src/cdc_app.c
index 2166c1d6b..e3ad8a9ac 100644
--- a/examples/device/cdc_uac2/src/cdc_app.c
+++ b/examples/device/cdc_uac2/src/cdc_app.c
@@ -29,33 +29,26 @@
 #include "common.h"
 
 // Invoked when cdc when line state changed e.g connected/disconnected
-void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts)
-{
+void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
   (void) itf;
   (void) rts;
 
-  if (dtr)
-  {
+  if (dtr) {
     // Terminal connected
-  }
-  else
-  {
+  } else {
     // Terminal disconnected
   }
 }
 
 // Invoked when CDC interface received data from host
-void tud_cdc_rx_cb(uint8_t itf)
-{
+void tud_cdc_rx_cb(uint8_t itf) {
   uint8_t buf[64];
   uint32_t count;
 
   // connected() check for DTR bit
   // Most but not all terminal client set this when making connection
-  if (tud_cdc_connected())
-  {
-    if (tud_cdc_available()) // data is available
-    {
+  if (tud_cdc_connected()) {
+    if (tud_cdc_available()) {
       count = tud_cdc_n_read(itf, buf, sizeof(buf));
       (void) count;
 
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.h b/examples/device/cdc_uac2/src/usb_descriptors.h
index 95d8da5c3..139384d3e 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.h
+++ b/examples/device/cdc_uac2/src/usb_descriptors.h
@@ -24,8 +24,8 @@
  *
  */
 
-#ifndef _USB_DESCRIPTORS_H_
-#define _USB_DESCRIPTORS_H_
+#ifndef USB_DESCRIPTORS_H_
+#define USB_DESCRIPTORS_H_
 
 // #include "tusb.h"
 
diff --git a/examples/device/net_lwip_webserver/src/lwipopts.h b/examples/device/net_lwip_webserver/src/lwipopts.h
index 04949cef9..11686ce2a 100644
--- a/examples/device/net_lwip_webserver/src/lwipopts.h
+++ b/examples/device/net_lwip_webserver/src/lwipopts.h
@@ -29,8 +29,8 @@
  * Author: Simon Goldschmidt
  *
  */
-#ifndef __LWIPOPTS_H__
-#define __LWIPOPTS_H__
+#ifndef LWIPOPTS_H__
+#define LWIPOPTS_H__
 
 /* Prevent having to link sys_arch.c (we don't test the API layers in unit tests) */
 #define NO_SYS                          1
diff --git a/examples/device/uac2_headset/src/usb_descriptors.h b/examples/device/uac2_headset/src/usb_descriptors.h
index d673beace..47154626e 100644
--- a/examples/device/uac2_headset/src/usb_descriptors.h
+++ b/examples/device/uac2_headset/src/usb_descriptors.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _USB_DESCRIPTORS_H_
-#define _USB_DESCRIPTORS_H_
+#ifndef USB_DESCRIPTORS_H_
+#define USB_DESCRIPTORS_H_
 
 enum
 {
diff --git a/examples/device/uac2_speaker_fb/src/usb_descriptors.h b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
index b0ec60ea1..79f25bbfa 100644
--- a/examples/device/uac2_speaker_fb/src/usb_descriptors.h
+++ b/examples/device/uac2_speaker_fb/src/usb_descriptors.h
@@ -23,8 +23,8 @@
  *
  */
 
-#ifndef _USB_DESCRIPTORS_H_
-#define _USB_DESCRIPTORS_H_
+#ifndef USB_DESCRIPTORS_H_
+#define USB_DESCRIPTORS_H_
 
 //--------------------------------------------------------------------+
 // UAC2 DESCRIPTOR TEMPLATES
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index 279efe7b7..0e0105980 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -46,9 +46,9 @@ static void cdc_app_task(void* param);
 
 void cdc_app_init(void) {
   #if configSUPPORT_STATIC_ALLOCATION
-  xTaskCreateStatic(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
+  (void) xTaskCreateStatic(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, cdc_stack, &cdc_taskdef);
   #else
-  xTaskCreate(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
+  (void) xTaskCreate(cdc_app_task, "cdc", CDC_STACK_SZIE, NULL, configMAX_PRIORITIES-2, NULL);
   #endif
 }
 
@@ -57,7 +57,9 @@ static size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
-    if (ch <= 0) break;
+    if (ch <= 0) {
+      break;
+    }
 
     buf[count] = (uint8_t) ch;
     count++;
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 476ec6733..483d9dc28 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -51,8 +51,7 @@ int sys_read(int fhdl, char *buf, size_t count) TU_ATTR_USED;
 
 int sys_write(int fhdl, const char *buf, size_t count) {
   (void) fhdl;
-  SEGGER_RTT_Write(0, buf, (int) count);
-  return (int) count;
+  return (int) SEGGER_RTT_Write(0, buf, (int) count);
 }
 
 int sys_read(int fhdl, char *buf, size_t count) {
@@ -159,7 +158,7 @@ int board_getchar(void) {
 }
 
 void board_putchar(int c) {
-  sys_write(0, (const char*)&c, 1);
+  (void) sys_write(0, (const char*)&c, 1);
 }
 
 uint32_t tusb_time_millis_api(void) {
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 088c5fec4..606ac484f 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -165,7 +165,7 @@ static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars
           '0', '1', '2', '3', '4', '5', '6', '7',
           '8', '9', 'A', 'B', 'C', 'D', 'E', 'F'
       };
-      const uint8_t nibble = (uint8_t) ((uid[i] >> (j * 4)) & 0xf);
+      const uint8_t nibble = (uint8_t) ((uid[i] >> (j * 4u)) & 0xfu);
       desc_str1[i * 2 + (1 - j)] = nibble_to_hex[nibble]; // UTF-16-LE
     }
   }
diff --git a/src/class/cdc/cdc.h b/src/class/cdc/cdc.h
index 6d207c717..679723ba6 100644
--- a/src/class/cdc/cdc.h
+++ b/src/class/cdc/cdc.h
@@ -192,10 +192,10 @@ typedef enum {
   CDC_LINE_CODING_STOP_BITS_2   = 2, // 2   bits
 } cdc_line_coding_stopbits_t;
 
-#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) (        \
-  STOP_BITS == CDC_LINE_CODING_STOP_BITS_1 ?   "1" :       \
-  STOP_BITS == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" :     \
-  STOP_BITS == CDC_LINE_CODING_STOP_BITS_2 ?   "2"   : "?" )
+#define CDC_LINE_CODING_STOP_BITS_TEXT(STOP_BITS) (          \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1   ? "1" :       \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_1_5 ? "1.5" :     \
+  (STOP_BITS) == CDC_LINE_CODING_STOP_BITS_2   ? "2"   : "?" )
 
 // TODO Backward compatible for typos. Maybe removed in the future release
 #define CDC_LINE_CONDING_STOP_BITS_1   CDC_LINE_CODING_STOP_BITS_1
@@ -211,11 +211,11 @@ typedef enum {
 } cdc_line_coding_parity_t;
 
 #define CDC_LINE_CODING_PARITY_CHAR(PARITY) (        \
-  PARITY == CDC_LINE_CODING_PARITY_NONE  ? 'N' :     \
-  PARITY == CDC_LINE_CODING_PARITY_ODD   ? 'O' :     \
-  PARITY == CDC_LINE_CODING_PARITY_EVEN  ? 'E' :     \
-  PARITY == CDC_LINE_CODING_PARITY_MARK  ? 'M' :     \
-  PARITY == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
+  (PARITY) == CDC_LINE_CODING_PARITY_NONE  ? 'N' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_ODD   ? 'O' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_EVEN  ? 'E' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_MARK  ? 'M' :     \
+  (PARITY) == CDC_LINE_CODING_PARITY_SPACE ? 'S' : '?' )
 
 //--------------------------------------------------------------------+
 // Management Element Notification (Notification Endpoint)
diff --git a/src/class/video/video_device.c b/src/class/video/video_device.c
index 087292e56..14eba86fb 100644
--- a/src/class/video/video_device.c
+++ b/src/class/video/video_device.c
@@ -464,7 +464,9 @@ static bool _update_streaming_parameters(videod_streaming_interface_t const *stm
   uint_fast8_t fmtnum = param->bFormatIndex;
   TU_ASSERT(vs && fmtnum <= vs->stm.bNumFormats);
   if (0 == fmtnum) {
-    if (1 < vs->stm.bNumFormats) return true; /* Need to negotiate all variables. */
+    if (1 < vs->stm.bNumFormats) {
+      return true; /* Need to negotiate all variables. */
+    }
     fmtnum = 1;
     param->bFormatIndex = 1;
   }
@@ -1259,7 +1261,7 @@ bool tud_video_n_frame_xfer(uint_fast8_t ctl_idx, uint_fast8_t stm_idx, void *bu
   videod_streaming_interface_t *stm = _get_instance_streaming(ctl_idx, stm_idx);
   videod_streaming_epbuf_t *stm_epbuf = &_videod_streaming_epbuf[ctl_idx];
 
-  if ( NULL == stm || 0 == stm->desc.ep[0] || stm->buffer) {
+  if (NULL == stm || 0 == stm->desc.ep[0] || stm->buffer) {
     return false;
   }
   if (stm->state == VS_STATE_PROBING) {
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index ac1c6457f..5f659eb95 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -111,7 +111,7 @@ extern void* tusb_app_phys_to_virt(void *phys_addr);
 //--------------------------------------------------------------------+
 
 //------------- Mem -------------//
-#define tu_memclr(buffer, size)  memset((buffer), 0, (size))
+#define tu_memclr(buffer, size)  (void) memset((buffer), 0, (size))
 #define tu_varclr(_var)          tu_memclr(_var, sizeof(*(_var)))
 
 // This is a backport of memset_s from c11
@@ -121,6 +121,10 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, i
     return -1;
   }
 
+  if (count == 0u) {
+    return 0;
+  }
+
   if (count > destsz) {
     return -1;
   }
@@ -131,13 +135,15 @@ TU_ATTR_ALWAYS_INLINE static inline int tu_memset_s(void *dest, size_t destsz, i
 
 // This is a backport of memcpy_s from c11
 TU_ATTR_ALWAYS_INLINE static inline int tu_memcpy_s(void *dest, size_t destsz, const void *src, size_t count) {
-  // Validate parameters
   if (dest == NULL) {
     return -1;
   }
 
-  // For memcpy, src may be NULL only if count == 0. Reject otherwise.
-  if (src == NULL && count != 0u) {
+  if (count == 0u) {
+    return 0;
+  }
+
+  if (src == NULL) {
     return -1;
   }
 
@@ -230,7 +236,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_round_up(uint32_t v, uint32_t f)
 // TODO use clz TODO remove
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_log2(uint32_t value) {
   uint8_t result = 0;
-  while ((value >>= 1) != 0) {
+  while (value >>= 1) {
     result++;
   }
   return result;
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 49421e865..167385d13 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -77,19 +77,19 @@
 /*------------------------------------------------------------------*/
 /* Count number of arguments of __VA_ARGS__
  * - reference www.stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
- * - _GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
- * - _RSEQ_N() is reverse sequential to N to add padding to have
+ * - TU_GET_NTH_ARG() takes args >= N (64) but only expand to Nth one (64th)
+ * - TU_NARG_RSEQ_N() is reverse sequential to N to add padding to have
  * Nth position is the same as the number of arguments
  * - ##__VA_ARGS__ is used to deal with 0 paramerter (swallows comma)
  *------------------------------------------------------------------*/
-#if !defined(__CCRX__)
-#define TU_ARGS_NUM(...)   _TU_NARG(_0, ##__VA_ARGS__, _RSEQ_N())
+#if defined(__CCRX__)
+#define TU_ARGS_NUM(...)   TU_NARG_IMPL(_0, __VA_ARGS__, TU_NARG_RSEQ_N())
 #else
-#define TU_ARGS_NUM(...)   _TU_NARG(_0, __VA_ARGS__, _RSEQ_N())
+#define TU_ARGS_NUM(...)   TU_NARG_IMPL(_0, ##__VA_ARGS__, TU_NARG_RSEQ_N())
 #endif
 
-#define _TU_NARG(...)      _GET_NTH_ARG(__VA_ARGS__)
-#define _GET_NTH_ARG( \
+#define TU_NARG_IMPL(...)      TU_GET_NTH_ARG(__VA_ARGS__)
+#define TU_GET_NTH_ARG( \
           _1, _2, _3, _4, _5, _6, _7, _8, _9,_10, \
          _11,_12,_13,_14,_15,_16,_17,_18,_19,_20, \
          _21,_22,_23,_24,_25,_26,_27,_28,_29,_30, \
@@ -97,7 +97,7 @@
          _41,_42,_43,_44,_45,_46,_47,_48,_49,_50, \
          _51,_52,_53,_54,_55,_56,_57,_58,_59,_60, \
          _61,_62,_63,N,...) N
-#define _RSEQ_N() \
+#define TU_NARG_RSEQ_N() \
          62,61,60,                      \
          59,58,57,56,55,54,53,52,51,50, \
          49,48,47,46,45,44,43,42,41,40, \
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index f7679556f..3b8920c01 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -38,14 +38,16 @@
 
 #if OSAL_MUTEX_REQUIRED
 
-TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex)
-{
-  if (mutex) osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
+TU_ATTR_ALWAYS_INLINE static inline void _ff_lock(osal_mutex_t mutex) {
+  if (mutex) {
+    osal_mutex_lock(mutex, OSAL_TIMEOUT_WAIT_FOREVER);
+  }
 }
 
-TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex)
-{
-  if (mutex) osal_mutex_unlock(mutex);
+TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex) {
+  if (mutex) {
+    osal_mutex_unlock(mutex);
+  }
 }
 
 #else
@@ -59,8 +61,7 @@ TU_ATTR_ALWAYS_INLINE static inline void _ff_unlock(osal_mutex_t mutex)
  * \brief Write modes intended to allow special read and write functions to be able to
  *        copy data to and from USB hardware FIFOs as needed for e.g. STM32s and others
  */
-typedef enum
-{
+typedef enum {
   TU_FIFO_COPY_INC,            ///< Copy from/to an increasing source/destination address - default mode
 #ifdef TUP_MEM_CONST_ADDR
   TU_FIFO_COPY_CST_FULL_WORDS, ///< Copy from/to a constant source/destination address - required for e.g. STM32 to write into USB hardware FIFO
@@ -72,7 +73,9 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
   // Limit index space to 2*depth - this allows for a fast "modulo" calculation
   // but limits the maximum depth to 2^16/2 = 2^15 and buffer overflows are detectable
   // only if overflow happens once (important for unsupervised DMA applications)
-  if (depth > 0x8000) return false;
+  if (depth > 0x8000) {
+    return false;
+  }
 
   _ff_lock(f->mutex_wr);
   _ff_lock(f->mutex_rd);
@@ -98,22 +101,19 @@ bool tu_fifo_config(tu_fifo_t *f, void* buffer, uint16_t depth, uint16_t item_si
 // Intended to be used to read from hardware USB FIFO in e.g. STM32 where all data is read from a constant address
 // Code adapted from dcd_synopsys.c
 // TODO generalize with configurable 1 byte or 4 byte each read
-static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len)
-{
+static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t len) {
   volatile const uint32_t * reg_rx = (volatile const uint32_t *) app_buf;
 
   // Reading full available 32 bit words from const app address
   uint16_t full_words = len >> 2;
-  while(full_words--)
-  {
+  while(full_words--) {
     tu_unaligned_write32(ff_buf, *reg_rx);
     ff_buf += 4;
   }
 
   // Read the remaining 1-3 bytes from const app address
   uint8_t const bytes_rem = len & 0x03;
-  if ( bytes_rem )
-  {
+  if (bytes_rem) {
     uint32_t tmp32 = *reg_rx;
     memcpy(ff_buf, &tmp32, bytes_rem);
   }
@@ -121,22 +121,19 @@ static void _ff_push_const_addr(uint8_t * ff_buf, const void * app_buf, uint16_t
 
 // Intended to be used to write to hardware USB FIFO in e.g. STM32
 // where all data is written to a constant address in full word copies
-static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t len)
-{
+static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t len) {
   volatile uint32_t * reg_tx = (volatile uint32_t *) app_buf;
 
   // Write full available 32 bit words to const address
   uint16_t full_words = len >> 2;
-  while(full_words--)
-  {
+  while(full_words--) {
     *reg_tx = tu_unaligned_read32(ff_buf);
     ff_buf += 4;
   }
 
   // Write the remaining 1-3 bytes into const address
   uint8_t const bytes_rem = len & 0x03;
-  if ( bytes_rem )
-  {
+  if (bytes_rem) {
     uint32_t tmp32 = 0;
     memcpy(&tmp32, ff_buf, bytes_rem);
 
@@ -146,8 +143,7 @@ static void _ff_pull_const_addr(void * app_buf, const uint8_t * ff_buf, uint16_t
 #endif
 
 // send one item to fifo WITHOUT updating write pointer
-static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel)
-{
+static inline void _ff_push(tu_fifo_t* f, void const * app_buf, uint16_t rel) {
   memcpy(f->buffer + (rel * f->item_size), app_buf, f->item_size);
 }
 
diff --git a/src/common/tusb_private.h b/src/common/tusb_private.h
index 31aca8a31..37d5e89f1 100644
--- a/src/common/tusb_private.h
+++ b/src/common/tusb_private.h
@@ -141,7 +141,7 @@ uint32_t tu_edpt_stream_read_xfer(uint8_t hwid, tu_edpt_stream_t* s);
 // Complete read transfer by writing EP -> FIFO. Must be called in the transfer complete callback
 TU_ATTR_ALWAYS_INLINE static inline
 void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_bytes) {
-  if (tu_fifo_depth(&s->ff)) {
+  if (0 != tu_fifo_depth(&s->ff)) {
     tu_fifo_write_n(&s->ff, s->ep_buf, (uint16_t) xferred_bytes);
   }
 }
@@ -149,7 +149,7 @@ void tu_edpt_stream_read_xfer_complete(tu_edpt_stream_t* s, uint32_t xferred_byt
 // Complete read transfer with provided buffer
 TU_ATTR_ALWAYS_INLINE static inline
 void tu_edpt_stream_read_xfer_complete_with_buf(tu_edpt_stream_t* s, const void * buf, uint32_t xferred_bytes) {
-  if (tu_fifo_depth(&s->ff)) {
+  if (0 != tu_fifo_depth(&s->ff)) {
     tu_fifo_write_n(&s->ff, buf, (uint16_t) xferred_bytes);
   }
 }
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index 9197381cf..a3a660d3b 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -548,7 +548,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_number(uint8_t addr) {
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_edpt_addr(uint8_t num, uint8_t dir) {
-  return (uint8_t) (num | (dir ? TUSB_DIR_IN_MASK : 0));
+  return (uint8_t) (num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0u));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_edpt_packet_size(tusb_desc_endpoint_t const* desc_ep) {
diff --git a/src/common/tusb_verify.h b/src/common/tusb_verify.h
index d6806d44a..ffd785384 100644
--- a/src/common/tusb_verify.h
+++ b/src/common/tusb_verify.h
@@ -78,7 +78,7 @@
     defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
   #define TU_BREAKPOINT() do {                                                                              \
     volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
-    if (0 != ((*ARM_CM_DHCSR) & 1UL)) {__asm("BKPT #0\n");} /* Only halt mcu if debugger is attached */            \
+    if (0 != ((*ARM_CM_DHCSR) & 1UL)) { __asm("BKPT #0\n"); } /* Only halt mcu if debugger is attached */   \
   } while(0)
 
 #elif defined(__riscv) && !TUSB_MCU_VENDOR_ESPRESSIF
@@ -98,7 +98,7 @@
  *------------------------------------------------------------------*/
 #define TU_VERIFY_DEFINE(_cond, _ret)    \
   do {                                   \
-    if ( !(_cond) ) { return _ret; }     \
+    if (!(_cond)) { return _ret; }     \
   } while(0)
 
 #define TU_VERIFY_1ARGS(_cond)         TU_VERIFY_DEFINE(_cond, false)
diff --git a/src/device/dcd.h b/src/device/dcd.h
index 436c4555f..1b0289280 100644
--- a/src/device/dcd.h
+++ b/src/device/dcd.h
@@ -214,7 +214,7 @@ TU_ATTR_ALWAYS_INLINE static inline void dcd_event_setup_received(uint8_t rhport
   dcd_event_t event;
   event.rhport = rhport;
   event.event_id = DCD_EVENT_SETUP_RECEIVED;
-  memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
+  (void) memcpy(&event.setup_received, setup, sizeof(tusb_control_request_t));
   dcd_event_handler(&event, in_isr);
 }
 
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 05fc752af..9d0bc0f3f 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -354,6 +354,8 @@ TU_ATTR_ALWAYS_INLINE static inline usbd_class_driver_t const * get_driver(uint8
     driver = &_app_driver[drvid];
   } else if (drvid < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
     driver = &_usbd_driver[drvid - _app_driver_count];
+  } else {
+    // nothing to do
   }
   return driver;
 }
@@ -572,7 +574,7 @@ bool tud_deinit(uint8_t rhport) {
   // Deinit device controller driver
   dcd_int_disable(rhport);
   dcd_disconnect(rhport);
-  dcd_deinit(rhport);
+  TU_VERIFY(dcd_deinit(rhport));
 
   // Deinit class drivers
   for (uint8_t i = 0; i < TOTAL_DRIVER_COUNT; i++) {
@@ -594,7 +596,6 @@ bool tud_deinit(uint8_t rhport) {
 #endif
 
   _usbd_rhport = RHPORT_INVALID;
-
   return true;
 }
 
@@ -606,8 +607,8 @@ static void configuration_reset(uint8_t rhport) {
   }
 
   tu_varclr(&_usbd_dev);
-  memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
-  memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
+  (void) memset(_usbd_dev.itf2drv, DRVID_INVALID, sizeof(_usbd_dev.itf2drv)); // invalid mapping
+  (void) memset(_usbd_dev.ep2drv, DRVID_INVALID, sizeof(_usbd_dev.ep2drv)); // invalid mapping
 }
 
 static void usbd_reset(uint8_t rhport) {
@@ -638,12 +639,16 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
   (void) in_isr; // not implemented yet
 
   // Skip if stack is not initialized
-  if (!tud_inited()) return;
+  if (!tud_inited()) {
+    return;
+  }
 
   // Loop until there is no more events in the queue
   while (1) {
     dcd_event_t event;
-    if (!osal_queue_receive(_usbd_q, &event, timeout_ms)) return;
+    if (!osal_queue_receive(_usbd_q, &event, timeout_ms)) {
+      return;
+    }
 
 #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
     if (event.event_id == DCD_EVENT_SETUP_RECEIVED) TU_LOG_USBD("\r\n"); // extra line for setup
@@ -667,7 +672,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
         TU_ASSERT(_usbd_queued_setup > 0,);
         _usbd_queued_setup--;
         TU_LOG_BUF(CFG_TUD_LOG_LEVEL, &event.setup_received, 8);
-        if (_usbd_queued_setup) {
+        if (_usbd_queued_setup != 0) {
           TU_LOG_USBD("  Skipped since there is other SETUP in queue\r\n");
           break;
         }
@@ -703,8 +708,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
         _usbd_dev.ep_status[epnum][ep_dir].claimed = 0;
 
         if (0 == epnum) {
-          usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result,
-                               event.xfer_complete.len);
+          usbd_control_xfer_cb(event.rhport, ep_addr, (xfer_result_t) event.xfer_complete.result, event.xfer_complete.len);
         } else {
           usbd_class_driver_t const* driver = get_driver(_usbd_dev.ep2drv[epnum][ep_dir]);
           TU_ASSERT(driver,);
@@ -738,7 +742,7 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
 
       case USBD_EVENT_FUNC_CALL:
         TU_LOG_USBD("\r\n");
-        if (event.func_call.func) {
+        if (event.func_call.func != NULL) {
           event.func_call.func(event.func_call.param);
         }
         break;
@@ -792,7 +796,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
   }
 #endif
 
-  switch ( p_request->bmRequestType_bit.recipient ) {
+  switch (p_request->bmRequestType_bit.recipient) { //-V2520
     //------------- Device Requests e.g in enumeration -------------//
     case TUSB_REQ_RCPT_DEVICE:
       if ( TUSB_REQ_TYPE_CLASS == p_request->bmRequestType_bit.type ) {
@@ -806,13 +810,13 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
         return invoke_class_control(rhport, driver, p_request);
       }
 
-      if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type ) {
+      if (TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type) {
         // Non-standard request is not supported
         TU_BREAKPOINT();
         return false;
       }
 
-      switch ( p_request->bRequest ) {
+      switch (p_request->bRequest) { //-V2520
         case TUSB_REQ_SET_ADDRESS:
           // Depending on mcu, status phase could be sent either before or after changing device address,
           // or even require stack to not response with status at all
@@ -834,18 +838,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
 
           // Only process if new configure is different
           if (_usbd_dev.cfg_num != cfg_num) {
-            if ( _usbd_dev.cfg_num ) {
+            if (_usbd_dev.cfg_num != 0) {
               // already configured: need to clear all endpoints and driver first
               TU_LOG_USBD("  Clear current Configuration (%u) before switching\r\n", _usbd_dev.cfg_num);
 
-              // disable SOF
               dcd_sof_enable(rhport, false);
-
-              // close all non-control endpoints, cancel all pending transfers if any
               dcd_edpt_close_all(rhport);
 
               // close all drivers and current configured state except bus speed
-              uint8_t const speed = _usbd_dev.speed;
+              const uint8_t speed = _usbd_dev.speed;
               configuration_reset(rhport);
 
               _usbd_dev.speed = speed; // restore speed
@@ -853,18 +854,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
 
             _usbd_dev.cfg_num = cfg_num;
 
-            // Handle the new configuration and execute the corresponding callback
-            if ( cfg_num ) {
-              // switch to new configuration if not zero
+            // Handle the new configuration
+            if (cfg_num == 0) {
+              tud_umount_cb();
+            } else {
               if (!process_set_config(rhport, cfg_num)) {
-                TU_MESS_FAILED();
-                TU_BREAKPOINT();
                 _usbd_dev.cfg_num = 0;
-                return false;
+                TU_ASSERT(false);
               }
               tud_mount_cb();
-            } else {
-              tud_umount_cb();
             }
           }
 
@@ -873,17 +871,17 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
         break;
 
         case TUSB_REQ_GET_DESCRIPTOR:
-          TU_VERIFY( process_get_descriptor(rhport, p_request) );
+          TU_VERIFY(process_get_descriptor(rhport, p_request));
         break;
 
         case TUSB_REQ_SET_FEATURE:
-          switch(p_request->wValue) {
+          switch(p_request->wValue) { //-V2520
             case TUSB_REQ_FEATURE_REMOTE_WAKEUP:
               TU_LOG_USBD("    Enable Remote Wakeup\r\n");
               // Host may enable remote wake up before suspending especially HID device
               _usbd_dev.remote_wakeup_en = true;
               tud_control_status(rhport, p_request);
-            break;
+              break;
 
             #if CFG_TUD_TEST_MODE
             case TUSB_REQ_FEATURE_TEST_MODE: {
@@ -897,7 +895,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
               tud_control_status(rhport, p_request);
               break;
             }
-            #endif /* CFG_TUD_TEST_MODE */
+            #endif
 
             // Stall unsupported feature selector
             default: return false;
@@ -907,13 +905,12 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
         case TUSB_REQ_CLEAR_FEATURE:
           // Only support remote wakeup for device feature
           TU_VERIFY(TUSB_REQ_FEATURE_REMOTE_WAKEUP == p_request->wValue);
-
           TU_LOG_USBD("    Disable Remote Wakeup\r\n");
 
           // Host may disable remote wake up after resuming
           _usbd_dev.remote_wakeup_en = false;
           tud_control_status(rhport, p_request);
-        break;
+          break;
 
         case TUSB_REQ_GET_STATUS: {
           // Device status bit mask
@@ -939,24 +936,24 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
 
       // all requests to Interface (STD or Class) is forwarded to class driver.
       // notable requests are: GET HID REPORT DESCRIPTOR, SET_INTERFACE, GET_INTERFACE
-      if ( !invoke_class_control(rhport, driver, p_request) ) {
+      if (!invoke_class_control(rhport, driver, p_request)) {
         // For GET_INTERFACE and SET_INTERFACE, it is mandatory to respond even if the class
         // driver doesn't use alternate settings or implement this
         TU_VERIFY(TUSB_REQ_TYPE_STANDARD == p_request->bmRequestType_bit.type);
 
-        switch(p_request->bRequest) {
-          case TUSB_REQ_GET_INTERFACE:
-          case TUSB_REQ_SET_INTERFACE:
-            // Clear complete callback if driver set since it can also stall the request.
-            usbd_control_set_complete_callback(NULL);
+        // Clear complete callback if driver set since it can also stall the request.
+        usbd_control_set_complete_callback(NULL);
 
-            if (TUSB_REQ_GET_INTERFACE == p_request->bRequest) {
-              uint8_t alternate = 0;
-              tud_control_xfer(rhport, p_request, &alternate, 1);
-            }else {
-              tud_control_status(rhport, p_request);
-            }
-          break;
+        switch (p_request->bRequest) { //-V2520
+          case TUSB_REQ_GET_INTERFACE: {
+            uint8_t alternate = 0;
+            tud_control_xfer(rhport, p_request, &alternate, 1);
+            break;
+          }
+
+          case TUSB_REQ_SET_INTERFACE:
+            tud_control_status(rhport, p_request);
+            break;
 
           default: return false;
         }
@@ -973,15 +970,15 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
       TU_ASSERT(ep_num < TU_ARRAY_SIZE(_usbd_dev.ep2drv) );
       usbd_class_driver_t const * driver = get_driver(_usbd_dev.ep2drv[ep_num][ep_dir]);
 
-      if ( TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type ) {
+      if (TUSB_REQ_TYPE_STANDARD != p_request->bmRequestType_bit.type) {
         // Forward class request to its driver
         TU_VERIFY(driver);
         return invoke_class_control(rhport, driver, p_request);
       } else {
         // Handle STD request to endpoint
-        switch ( p_request->bRequest ) {
+        switch (p_request->bRequest) { //-V2520
           case TUSB_REQ_GET_STATUS: {
-            uint16_t status = usbd_edpt_stalled(rhport, ep_addr) ? 0x0001 : 0x0000;
+            uint16_t status = usbd_edpt_stalled(rhport, ep_addr) ? 0x0001u : 0x0000u;
             tud_control_xfer(rhport, p_request, &status, 2);
           }
           break;
@@ -996,7 +993,7 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
               }
             }
 
-            if (driver) {
+            if (driver != NULL) {
               // Some classes such as USBTMC needs to clear/re-init its buffer when receiving CLEAR_FEATURE request
               // We will also forward std request targeted endpoint to class drivers as well
 
@@ -1006,7 +1003,9 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
               usbd_control_set_complete_callback(NULL);
 
               // skip ZLP status if driver already did that
-              if ( !_usbd_dev.ep_status[0][TUSB_DIR_IN].busy ) tud_control_status(rhport, p_request);
+              if (!_usbd_dev.ep_status[0][TUSB_DIR_IN].busy) {
+                tud_control_status(rhport, p_request);
+              }
             }
           }
           break;
@@ -1017,8 +1016,8 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
             return false;
         }
       }
+      break;
     }
-    break;
 
     // Unknown recipient
     default:
@@ -1081,10 +1080,11 @@ static bool process_set_config(uint8_t rhport, uint8_t cfg_num)
 
         // Some drivers use 2 or more interfaces but may not have IAD e.g MIDI (always) or
         // BTH (even CDC) with class in device descriptor (single interface)
-        if ( assoc_itf_count == 1)
-        {
+        if (assoc_itf_count == 1) {
           #if CFG_TUD_CDC
-          if ( driver->open == cdcd_open ) assoc_itf_count = 2;
+          if ( driver->open == cdcd_open ) {
+            assoc_itf_count = 2;
+          }
           #endif
 
           #if CFG_TUD_MIDI
@@ -1158,8 +1158,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
   tusb_desc_type_t const desc_type = (tusb_desc_type_t) tu_u16_high(p_request->wValue);
   uint8_t const desc_index = tu_u16_low( p_request->wValue );
 
-  switch(desc_type)
-  {
+  switch(desc_type) { //-V2520
     case TUSB_DESC_DEVICE: {
       TU_LOG_USBD(" Device\r\n");
 
@@ -1187,7 +1186,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
 
       // requested by host if USB > 2.0 ( i.e 2.1 or 3.x )
       uintptr_t desc_bos = (uintptr_t) tud_descriptor_bos_cb();
-      TU_VERIFY(desc_bos);
+      TU_VERIFY(desc_bos != 0);
 
       // Use offsetof to avoid pointer to the odd/misaligned address
       uint16_t const total_len = tu_le16toh( tu_unaligned_read16((const void*) (desc_bos + offsetof(tusb_desc_bos_t, wTotalLength))) );
@@ -1203,12 +1202,12 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
       if ( desc_type == TUSB_DESC_CONFIGURATION ) {
         TU_LOG_USBD(" Configuration[%u]\r\n", desc_index);
         desc_config = (uintptr_t) tud_descriptor_configuration_cb(desc_index);
-        TU_ASSERT(desc_config);
+        TU_ASSERT(desc_config != 0);
       }else {
         // Host only request this after getting Device Qualifier descriptor
         TU_LOG_USBD(" Other Speed Configuration\r\n");
         desc_config = (uintptr_t) tud_descriptor_other_speed_configuration_cb(desc_index);
-        TU_VERIFY(desc_config);
+        TU_VERIFY(desc_config != 0);
       }
 
       // Use offsetof to avoid pointer to the odd/misaligned address
@@ -1218,8 +1217,7 @@ static bool process_get_descriptor(uint8_t rhport, tusb_control_request_t const
     }
     // break; // unreachable
 
-    case TUSB_DESC_STRING:
-    {
+    case TUSB_DESC_STRING: {
       TU_LOG_USBD(" String[%u]\r\n", desc_index);
 
       // String Descriptor always uses the desc set from user
diff --git a/src/device/usbd.h b/src/device/usbd.h
index bfff23399..c446638c3 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -95,7 +95,9 @@ bool tud_suspended(void);
 // Check if device is ready to transfer
 TU_ATTR_ALWAYS_INLINE static inline
 bool tud_ready(void) {
-  return tud_mounted() && !tud_suspended();
+  const bool is_mounted = tud_mounted();
+  const bool is_suspended = tud_suspended();
+  return is_mounted && !is_suspended;
 }
 
 // Remote wake up host, only if suspended and enabled by host
@@ -421,7 +423,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
   TUD_AUDIO10_DESC_SELECTOR_UNIT_ONE_PIN_LEN, TUSB_DESC_CS_INTERFACE, AUDIO10_CS_AC_INTERFACE_SELECTOR_UNIT, _unitid, 1, _srcid, _stridx
 
 /* Feature Unit Descriptor UAC1 (4.3.2.5) - Variable Channels */
-#define TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(_nchannels) (7 + (_nchannels + 1) * 2)
+#define TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(_nchannels) (7 + ((_nchannels) + 1) * 2)
 // Feature Unit descriptor, take list of control bitmaps for master channel + each channel as variable arguments
 #define TUD_AUDIO10_DESC_FEATURE_UNIT(_unitid, _srcid, _stridx, ...) \
   TUD_AUDIO10_DESC_FEATURE_UNIT_LEN(TU_ARGS_NUM(__VA_ARGS__) - 1), TUSB_DESC_CS_INTERFACE, AUDIO10_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, 2, TU_ARGS_APPLY_EXPAND(U16_TO_U8S_LE, __VA_ARGS__), _stridx
@@ -539,7 +541,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
   TUD_AUDIO20_DESC_OUTPUT_TERM_LEN, TUSB_DESC_CS_INTERFACE, AUDIO20_CS_AC_INTERFACE_OUTPUT_TERMINAL, _termid, U16_TO_U8S_LE(_termtype), _assocTerm, _srcid, _clkid, U16_TO_U8S_LE(_ctrl), _stridx
 
 /* Feature Unit Descriptor(4.7.2.8) */
-#define TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(_nchannels) (6 + (_nchannels + 1) * 4)
+#define TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(_nchannels) (6 + ((_nchannels) + 1) * 4)
 #define TUD_AUDIO20_DESC_FEATURE_UNIT(_unitid, _srcid, _stridx, ...) \
   TUD_AUDIO20_DESC_FEATURE_UNIT_LEN(TU_ARGS_NUM(__VA_ARGS__) - 1), TUSB_DESC_CS_INTERFACE, AUDIO20_CS_AC_INTERFACE_FEATURE_UNIT, _unitid, _srcid, TU_ARGS_APPLY_EXPAND(U32_TO_U8S_LE, __VA_ARGS__), _stridx
 
@@ -728,7 +730,7 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 
 //   Calculate wMaxPacketSize of Endpoints
 #define TUD_AUDIO_EP_SIZE(_is_highspeed, _maxFrequency, _nBytesPerSample, _nChannels) \
-    ((((_maxFrequency + (_is_highspeed ? 7999 : 999)) / (_is_highspeed ? 8000 : 1000)) + 1) * _nBytesPerSample * _nChannels)
+    (((((_maxFrequency) + ((_is_highspeed) ? 7999 : 999)) / ((_is_highspeed) ? 8000 : 1000)) + 1) * (_nBytesPerSample) * (_nChannels))
 
 
 //--------------------------------------------------------------------+
@@ -807,44 +809,44 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 // Interface number, Alternate count, starting string index, attributes, detach timeout, transfer size
 // Note: Alternate count must be numeric or macro, string index is increased by one for each Alt interface
 #define TUD_DFU_DESCRIPTOR(_itfnum, _alt_count, _stridx, _attr, _timeout, _xfer_size) \
-  TU_XSTRCAT(_TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
+  TU_XSTRCAT(TUD_DFU_ALT_,_alt_count)(_itfnum, 0, _stridx), \
   /* Function */ \
   9, DFU_DESC_FUNCTIONAL, _attr, U16_TO_U8S_LE(_timeout), U16_TO_U8S_LE(_xfer_size), U16_TO_U8S_LE(0x0101)
 
-#define _TUD_DFU_ALT(_itfnum, _alt, _stridx) \
+#define TUD_DFU_ALT(_itfnum, _alt, _stridx) \
   /* Interface */ \
   9, TUSB_DESC_INTERFACE, _itfnum, _alt, 0, TUD_DFU_APP_CLASS, TUD_DFU_APP_SUBCLASS, DFU_PROTOCOL_DFU, _stridx
 
-#define _TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
+#define TUD_DFU_ALT_1(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx)
 
-#define _TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_2(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_1(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_3(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_2(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_4(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_3(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_5(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_4(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_6(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_5(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_7(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_6(_itfnum, _alt_count+1, _stridx+1)
 
-#define _TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
-  _TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
-  _TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
+#define TUD_DFU_ALT_8(_itfnum, _alt_count, _stridx) \
+  TUD_DFU_ALT(_itfnum, _alt_count, _stridx),      \
+  TUD_DFU_ALT_7(_itfnum, _alt_count+1, _stridx+1)
 
 //--------------------------------------------------------------------+
 // CDC-ECM Descriptor Templates
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index a688cf497..2894d3023 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -117,7 +117,9 @@ bool usbd_edpt_iso_activate(uint8_t rhport,  tusb_desc_endpoint_t const * p_endp
 // Check if endpoint is ready (not busy and not stalled)
 TU_ATTR_ALWAYS_INLINE static inline
 bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) {
-  return !usbd_edpt_busy(rhport, ep_addr) && !usbd_edpt_stalled(rhport, ep_addr);
+  const bool is_busy = usbd_edpt_busy(rhport, ep_addr);
+  const bool is_stalled = usbd_edpt_stalled(rhport, ep_addr);
+  return !is_busy && !is_stalled;
 }
 
 // Enable SOF interrupt
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 1b43b9ac4..b2531426a 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -85,6 +85,12 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc
   #endif
 }
 
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool edpt_is_enabled(dwc2_dep_t* dep) {
+  return (dep->ctl & EPCTL_EPENA) != 0;
+}
 
 //--------------------------------------------------------------------
 // DMA
@@ -117,7 +123,7 @@ static void dma_setup_prepare(uint8_t rhport) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
 
   if (dwc2->gsnpsid >= DWC2_CORE_REV_3_00a) {
-    if(dwc2->epout[0].doepctl & DOEPCTL_EPENA) {
+    if(edpt_is_enabled(&dwc2->epout[0])) {
       return;
     }
   }
@@ -200,7 +206,7 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) {
     }
   } else {
     // Check IN endpoints concurrently active limit
-    if(dwc2_controller->ep_in_count) {
+    if(0 != dwc2_controller->ep_in_count) {
       TU_ASSERT(_dcd_data.allocated_epin_count < dwc2_controller->ep_in_count);
       _dcd_data.allocated_epin_count++;
     }
@@ -217,10 +223,10 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size) {
 
     // Both TXFD and TXSA are in unit of 32-bit words.
     if (epnum == 0) {
-      dwc2->dieptxf0 = (fifo_size << DIEPTXF0_TX0FD_Pos) | _dcd_data.dfifo_top;
+      dwc2->dieptxf0 = ((uint32_t) fifo_size << DIEPTXF0_TX0FD_Pos) | _dcd_data.dfifo_top;
     } else {
       // DIEPTXF starts at FIFO #1.
-      dwc2->dieptxf[epnum - 1] = (fifo_size << DIEPTXF_INEPTXFD_Pos) | _dcd_data.dfifo_top;
+      dwc2->dieptxf[epnum - 1] = ((uint32_t) fifo_size << DIEPTXF_INEPTXFD_Pos) | _dcd_data.dfifo_top;
     }
   }
 
@@ -238,10 +244,10 @@ static void dfifo_device_init(uint8_t rhport) {
   if (is_dma) {
     _dcd_data.dfifo_top -= 2 * dwc2_controller->ep_count;
   }
-  dwc2->gdfifocfg = (_dcd_data.dfifo_top << GDFIFOCFG_EPINFOBASE_SHIFT) | _dcd_data.dfifo_top;
+  dwc2->gdfifocfg = ((uint32_t) _dcd_data.dfifo_top << GDFIFOCFG_EPINFOBASE_SHIFT) | _dcd_data.dfifo_top;
 
   // Allocate FIFO for EP0 IN
-  dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE);
+  (void) dfifo_alloc(rhport, 0x80, CFG_TUD_ENDPOINT0_SIZE);
 }
 
 
@@ -282,16 +288,18 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
   const uint8_t dir = tu_edpt_dir(ep_addr);
   dwc2_dep_t* dep = &dwc2->ep[dir == TUSB_DIR_IN ? 0 : 1][epnum];
 
+  const uint32_t stall_mask = (stall ? EPCTL_STALL : 0);
+
   if (dir == TUSB_DIR_IN) {
-    if (!(dep->diepctl & DIEPCTL_EPENA)) {
-      dep->diepctl |= DIEPCTL_SNAK | (stall ? DIEPCTL_STALL : 0);
+    if (!edpt_is_enabled(dep)) {
+      dep->diepctl |= DIEPCTL_SNAK | stall_mask;
     } else {
       // Stop transmitting packets and NAK IN xfers.
       dep->diepctl |= DIEPCTL_SNAK;
       while ((dep->diepint & DIEPINT_INEPNE) == 0) {}
 
       // Disable the endpoint.
-      dep->diepctl |= DIEPCTL_EPDIS | (stall ? DIEPCTL_STALL : 0);
+      dep->diepctl |= DIEPCTL_EPDIS | stall_mask;
       while ((dep->diepint & DIEPINT_EPDISD_Msk) == 0) {}
 
       dep->diepint = DIEPINT_EPDISD;
@@ -300,9 +308,10 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
     // Flush the FIFO, and wait until we have confirmed it cleared.
     dfifo_flush_tx(dwc2, epnum);
   } else {
-    // Only disable currently enabled non-control endpoint
-    if ((epnum == 0) || !(dep->doepctl & DOEPCTL_EPENA)) {
-      dep->doepctl |= stall ? DOEPCTL_STALL : 0;
+    if (!edpt_is_enabled(dep) || epnum == 0) {
+      // non-control not-enabled: stall if set
+      // For EP0 Out, keep it enabled to receive SETUP packets
+      dep->doepctl |= stall_mask;
     } else {
       // Asserting GONAK is required to STALL an OUT endpoint.
       // Simpler to use polling here, we don't use the "B"OUTNAKEFF interrupt
@@ -312,7 +321,7 @@ static void edpt_disable(uint8_t rhport, uint8_t ep_addr, bool stall) {
       while ((dwc2->gintsts & GINTSTS_BOUTNAKEFF_Msk) == 0) {}
 
       // Ditto here disable the endpoint.
-      dep->doepctl |= DOEPCTL_EPDIS | (stall ? DOEPCTL_STALL : 0);
+      dep->doepctl |= DOEPCTL_EPDIS | stall_mask;
       while ((dep->doepint & DOEPINT_EPDISD_Msk) == 0) {}
 
       dep->doepint = DOEPINT_EPDISD;
@@ -360,7 +369,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
   if (depctl.type == DEPCTL_EPTYPE_ISOCHRONOUS && xfer->interval == 1) {
     const dwc2_dsts_t dsts = {.value = dwc2->dsts};
     const uint32_t odd_now = dsts.frame_number & 1u;
-    if (odd_now) {
+    if (odd_now != 0) {
       depctl.set_data0_iso_even = 1;
     } else {
       depctl.set_data1_iso_odd = 1;
@@ -379,7 +388,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
 
     // Enable tx fifo empty interrupt only if there is data. Note must after depctl enable
     if (dir == TUSB_DIR_IN && total_bytes != 0) {
-      dwc2->diepempmsk |= (1u << epnum);
+      dwc2->diepempmsk |= (1u << epnum); //-V629
     }
   }
 }
@@ -551,7 +560,7 @@ void dcd_edpt_close_all(uint8_t rhport) {
   for (uint8_t n = 1; n < ep_count; n++) {
     for (uint8_t d = 0; d < 2; d++) {
       dwc2_dep_t* dep = &dwc2->ep[d][n];
-      if (dep->ctl & EPCTL_EPENA) {
+      if (edpt_is_enabled(dep)) {
         dep->ctl |= EPCTL_SNAK | EPCTL_EPDIS;
       }
       xfer_status[n][1-d].max_size = 0;
@@ -643,8 +652,12 @@ bool dcd_edpt_xfer_fifo(uint8_t rhport, uint8_t ep_addr, tu_fifo_t* ff, uint16_t
 void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   edpt_disable(rhport, ep_addr, true);
-  if((tu_edpt_number(ep_addr) == 0) && dma_device_enabled(dwc2)) {
-    dma_setup_prepare(rhport);
+
+  // For control endpoint, prepare to receive SETUP packet
+  if (tu_edpt_number(ep_addr) == 0) {
+    if (dma_device_enabled(dwc2)) {
+      dma_setup_prepare(rhport);
+    }
   }
 }
 
@@ -681,8 +694,9 @@ static void handle_bus_reset(uint8_t rhport) {
 
   // Disable all IN endpoints
   for (uint8_t n = 0; n < ep_count; n++) {
-    if (dwc2->epin[n].diepctl & DIEPCTL_EPENA) {
-      dwc2->epin[n].diepctl |= DIEPCTL_SNAK | DIEPCTL_EPDIS;
+    dwc2_dep_t* dep = &dwc2->epin[n];
+    if (edpt_is_enabled(dep)) {
+      dep->diepctl |= DIEPCTL_SNAK | DIEPCTL_EPDIS;
     }
   }
 
@@ -807,9 +821,9 @@ static void handle_rxflvl_irq(uint8_t rhport) {
       const uint16_t byte_count = grxstsp.byte_count;
       xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
 
-      if (byte_count) {
+      if (byte_count != 0) {
         // Read packet off RxFIFO
-        if (xfer->ff) {
+        if (xfer->ff != NULL) {
           tu_fifo_write_n_const_addr_full_words(xfer->ff, (const void*) (uintptr_t) rx_fifo, byte_count);
         } else {
           dfifo_read_packet(dwc2, xfer->buffer, byte_count);
@@ -836,7 +850,7 @@ static void handle_rxflvl_irq(uint8_t rhport) {
       // the specified OUT endpoint which will be handled by handle_epout_irq()
       break;
 
-    default: break;
+    default: break; // nothing to do
   }
 }
 
@@ -844,7 +858,7 @@ static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doe
   if (doepint_bm.setup_phase_done) {
     // Cleanup previous pending EP0 IN transfer if any
     dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
-    if (epin0->diepctl & DIEPCTL_EPENA) {
+    if (edpt_is_enabled(epin0)) {
       edpt_disable(rhport, 0x80, false);
     }
     dcd_event_setup_received(rhport, _dcd_usbbuf.setup_packet, true);
@@ -858,7 +872,6 @@ static void handle_epout_slave(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doe
     // can is set when GRXSTS_PKTSTS_SETUP_RX is popped therefore they can bet set before/together with setup_phase_done
     if (!doepint_bm.status_phase_rx && !doepint_bm.setup_packet_rx) {
       xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_OUT);
-
       if ((epnum == 0) && _dcd_data.ep0_pending[TUSB_DIR_OUT]) {
         // EP0 can only handle one packet, Schedule another packet to be received.
         edpt_schedule_packets(rhport, epnum, TUSB_DIR_OUT);
@@ -875,7 +888,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
   xfer_ctl_t* xfer = XFER_CTL_BASE(epnum, TUSB_DIR_IN);
 
   if (diepint_bm.xfer_complete) {
-    if ((epnum == 0) && _dcd_data.ep0_pending[TUSB_DIR_IN]) {
+    if ((epnum == 0) && (0 != _dcd_data.ep0_pending[TUSB_DIR_IN])) {
       // EP0 can only handle one packet. Schedule another packet to be transmitted.
       edpt_schedule_packets(rhport, epnum, TUSB_DIR_IN);
     } else {
@@ -886,7 +899,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
   // TX FIFO empty bit is read-only. It will only be cleared by hardware when written bytes is more than
   // - 64 bytes or
   // - Half/Empty of TX FIFO size (configured by GAHBCFG.TXFELVL)
-  if (diepint_bm.txfifo_empty && (dwc2->diepempmsk & (1 << epnum))) {
+  if (diepint_bm.txfifo_empty && tu_bit_test(dwc2->diepempmsk, epnum)) {
     dwc2_ep_tsize_t tsiz = {.value = epin->tsiz};
     const uint16_t remain_packets = tsiz.packet_count;
 
@@ -902,7 +915,7 @@ static void handle_epin_slave(uint8_t rhport, uint8_t epnum, dwc2_diepint_t diep
       }
 
       // Push packet to Tx-FIFO
-      if (xfer->ff) {
+      if (xfer->ff != NULL) {
         volatile uint32_t* tx_fifo = dwc2->fifo[epnum];
         tu_fifo_read_n_const_addr_full_words(xfer->ff, (void*)(uintptr_t)tx_fifo, xact_bytes);
       } else {
@@ -927,7 +940,7 @@ static void handle_epout_dma(uint8_t rhport, uint8_t epnum, dwc2_doepint_t doepi
   if (doepint_bm.setup_phase_done) {
     // Cleanup previous pending EP0 IN transfer if any
     dwc2_dep_t* epin0 = &DWC2_REG(rhport)->epin[0];
-    if (epin0->diepctl & DIEPCTL_EPENA) {
+    if (edpt_is_enabled(epin0)) {
       edpt_disable(rhport, 0x80, false);
     }
     dma_setup_prepare(rhport);
@@ -993,7 +1006,7 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
   // DAINT for a given EP clears when DEPINTx is cleared.
   // EPINT will be cleared when DAINT bits are cleared.
   for (uint8_t epnum = 0; epnum < ep_count; epnum++) {
-    if (dwc2->daint & TU_BIT(daint_offset + epnum)) {
+    if (tu_bit_test(dwc2->daint,daint_offset + epnum)) {
       dwc2_dep_t* epout = &ep_base[epnum];
       union {
         uint32_t value;
@@ -1002,7 +1015,7 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
       } intr;
       intr.value = epout->intr;
 
-      epout->intr = intr.value; // Clear interrupt
+      epout->intr = intr.value; // Clear interrupt //-V::2584::{otg_int}
 
       if (is_dma) {
         #if CFG_TUD_DWC2_DMA_ENABLE
@@ -1037,6 +1050,7 @@ static void handle_ep_irq(uint8_t rhport, uint8_t dir) {
   Note: when OTG_MULTI_PROC_INTRPT = 1, Device Each endpoint interrupt deachint/deachmsk/diepeachmsk/doepeachmsk
   are combined to generate dedicated interrupt line for each endpoint.
  */
+//-V::2584::{gintsts} PVS-Studio suppression
 void dcd_int_handler(uint8_t rhport) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   const uint32_t gintmask = dwc2->gintmsk;
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 08950ccc0..9da8de41f 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -176,7 +176,9 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_remote_wakeup_delay(void) {
   // try to delay for 1 ms
   uint32_t count = SystemCoreClock / 1000;
-  while (count--) __NOP();
+  while (count--) {
+    __NOP();
+  }
 }
 
 // MCU specific PHY init, called BEFORE core reset
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index 75643529f..adcc579e3 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -1435,7 +1435,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define DAINTMSK_OEPM_Msk                (0xFFFFUL << DAINTMSK_OEPM_Pos)          // 0xFFFF0000
 #define DAINTMSK_OEPM                    DAINTMSK_OEPM_Msk                        // OUT EP interrupt mask bits
 
-#define DAINT_SHIFT(_dir)            ((_dir == TUSB_DIR_IN) ? 0 : 16)
+#define DAINT_SHIFT(_dir)                (((_dir) == TUSB_DIR_IN) ? 0 : 16)
 
 #if 0
 /********************  Bit definition for OTG register  ********************/
-- 
cgit v1.3.1


From 1f04fe7924e8777c1583323171c0e1cabcb29062 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 5 Nov 2025 15:31:02 +0700
Subject: added .clang-format fix more alerts disable IAR CStat since
 pvs-studio check is better integrated with clion

---
 .PVS-Studio/.pvsconfig                             |  13 +-
 .clang-format                                      | 102 ++++++----
 .github/workflows/static_analysis.yml              |   3 +-
 README.rst                                         |   6 +-
 examples/device/audio_4_channel_mic/src/main.c     |   8 +-
 .../src/usb_descriptors.c                          |   8 +-
 examples/device/audio_test/src/main.c              |   8 +-
 examples/device/audio_test/src/usb_descriptors.c   |   8 +-
 .../audio_test_freertos/src/usb_descriptors.c      |   8 +-
 examples/device/audio_test_multi_rate/src/main.c   |   8 +-
 .../audio_test_multi_rate/src/usb_descriptors.c    |   8 +-
 examples/device/cdc_dual_ports/src/main.c          |  12 +-
 examples/device/cdc_msc/src/msc_disk.c             |  28 ++-
 examples/device/cdc_uac2/src/uac2_app.c            |  28 +--
 examples/device/cdc_uac2/src/usb_descriptors.c     |   8 +-
 examples/device/dfu/src/usb_descriptors.c          |   8 +-
 examples/device/dfu_runtime/src/main.c             |   4 +-
 examples/device/dfu_runtime/src/usb_descriptors.c  |   8 +-
 examples/device/dynamic_configuration/src/main.c   |  56 +++---
 .../device/dynamic_configuration/src/msc_disk.c    |  14 +-
 .../dynamic_configuration/src/usb_descriptors.c    |   8 +-
 examples/device/hid_boot_interface/src/main.c      | 147 +++++++-------
 .../hid_boot_interface/src/usb_descriptors.c       | 124 ++++++------
 examples/device/hid_composite/src/main.c           | 211 ++++++++++-----------
 examples/device/mtp/src/mtp_fs_example.c           |  90 +++++----
 hw/bsp/family_support.cmake                        |   8 +-
 src/class/mtp/mtp.h                                |  14 +-
 src/class/mtp/mtp_device.h                         |  10 +-
 src/class/video/video.h                            |  10 +-
 src/common/tusb_common.h                           |   7 +-
 src/common/tusb_debug.h                            |   4 +-
 src/device/usbd_control.c                          |   6 +-
 src/device/usbd_pvt.h                              |   5 -
 src/tusb.c                                         |   4 +-
 34 files changed, 523 insertions(+), 471 deletions(-)

(limited to 'hw')

diff --git a/.PVS-Studio/.pvsconfig b/.PVS-Studio/.pvsconfig
index 32125c2f7..2e231c939 100644
--- a/.PVS-Studio/.pvsconfig
+++ b/.PVS-Studio/.pvsconfig
@@ -1,3 +1,10 @@
-//-V::2506
-//-V::2514
-//-V::2614
+//V_EXCLUDE_PATH */iar/cxarm*
+//V_EXCLUDE_PATH */pico-sdk/*
+
+//-V::2506 MISRA. A function should have a single point of exit at the end.
+//-V::2514 MISRA. Unions should not be used.
+//-V:memcpy:2547 [MISRA-C-17.7] The return value of non-void function 'memcpy' should be used.
+//-V:printf:2547 [MISRA-C-17.7] The return value of non-void function 'printf' should be used.
+//-V::2600 [MISRA-C-21.6] The function with the 'printf' name should not be used.
+//+V2614 DISABLE_LENGHT_LIMIT_CHECK:YES
+//-V:memcpy:2628 Pointer arguments to the 'memcpy' function should be pointers to qualified or unqualified versions of compatible types.
diff --git a/.clang-format b/.clang-format
index 0fd168e5a..79a160a8d 100644
--- a/.clang-format
+++ b/.clang-format
@@ -1,66 +1,88 @@
-# Generated from CLion C/C++ Code Style settings
+---
+Language: Cpp
 BasedOnStyle: LLVM
-AccessModifierOffset: -2
-AlignAfterOpenBracket: Align
-AlignConsecutiveAssignments: None
-AlignOperands: Align
+AlignAfterOpenBracket: AlwaysBreak
+AlignConsecutiveAssignments:
+  Enabled: true
+  AcrossEmptyLines: false
+  AcrossComments: false
+AlignConsecutiveBitFields:
+  Enabled: true
+  AcrossEmptyLines: false
+  AcrossComments: false
+AlignConsecutiveDeclarations:
+  Enabled: true
+  AcrossEmptyLines: false
+  AcrossComments: false
+AlignConsecutiveMacros:
+  Enabled: true
+  AcrossEmptyLines: true
+  AcrossComments: false
+AlignConsecutiveShortCaseStatements:
+  Enabled: true
+  AcrossEmptyLines: true
+  AcrossComments: true
+  AlignCaseColons: false
+AlignEscapedNewlines: LeftWithLastLine
+AlignOperands: true
+AlignTrailingComments:
+  Kind: Always
+  OverEmptyLines: 2
 AllowAllArgumentsOnNextLine: false
 AllowAllConstructorInitializersOnNextLine: false
 AllowAllParametersOfDeclarationOnNextLine: false
-AllowShortBlocksOnASingleLine: Always
-AllowShortCaseLabelsOnASingleLine: false
-AllowShortFunctionsOnASingleLine: All
-AllowShortIfStatementsOnASingleLine: Always
-AllowShortLambdasOnASingleLine: All
-AllowShortLoopsOnASingleLine: true
-AlwaysBreakAfterReturnType: None
+AllowShortBlocksOnASingleLine: Empty
+AllowShortCaseExpressionOnASingleLine: true
+AllowShortCaseLabelsOnASingleLine: true
+AllowShortFunctionsOnASingleLine: None
+AllowShortIfStatementsOnASingleLine: Never
 AlwaysBreakTemplateDeclarations: Yes
 BreakBeforeBraces: Custom
 BraceWrapping:
   AfterCaseLabel: false
   AfterClass: false
-  AfterControlStatement: Never
+  AfterControlStatement: false
   AfterEnum: false
   AfterFunction: false
   AfterNamespace: false
+  AfterStruct: false
   AfterUnion: false
-  BeforeCatch: false
+  AfterExternBlock: false
+  BeforeCatch: true
   BeforeElse: false
-  IndentBraces: false
-  SplitEmptyFunction: false
+  BeforeLambdaBody: false
+  BeforeWhile: false
+  SplitEmptyFunction: true
   SplitEmptyRecord: true
-BreakBeforeBinaryOperators: None
-BreakBeforeTernaryOperators: true
-BreakConstructorInitializers: BeforeColon
-BreakInheritanceList: BeforeColon
-ColumnLimit: 0
-CompactNamespaces: false
-ContinuationIndentWidth: 4
+  SplitEmptyNamespace: true
+BracedInitializerIndentWidth: 2
+BreakConstructorInitializers: AfterColon
+BreakConstructorInitializersBeforeComma: false
+ColumnLimit: 120
+ConstructorInitializerAllOnOneLineOrOnePerLine: false
+Cpp11BracedListStyle: true
+IncludeCategories:
+  - Regex: '^<.*'
+    Priority: 1
+  - Regex: '^".*'
+    Priority: 2
+  - Regex: '.*'
+    Priority: 3
+IncludeIsMainRegex: '([-_](test|unittest))?$'
+InsertBraces: true
 IndentCaseLabels: true
-IndentPPDirectives: BeforeHash
-IndentWidth: 2
-KeepEmptyLinesAtTheStartOfBlocks: true
+InsertNewlineAtEOF: true
+MacroBlockBegin: ''
+MacroBlockEnd: ''
 MaxEmptyLinesToKeep: 2
 NamespaceIndentation: All
-ObjCSpaceAfterProperty: false
-ObjCSpaceBeforeProtocolList: true
-PointerAlignment: Right
 ReflowComments: false
-SpaceAfterCStyleCast: true
-SpaceAfterLogicalNot: false
 SpaceAfterTemplateKeyword: false
-SpaceBeforeAssignmentOperators: true
-SpaceBeforeCpp11BracedList: false
-SpaceBeforeCtorInitializerColon: true
-SpaceBeforeInheritanceColon: true
-SpaceBeforeParens: ControlStatements
 SpaceBeforeRangeBasedForLoopColon: false
 SpaceInEmptyParentheses: false
-SpacesBeforeTrailingComments: 0
 SpacesInAngles: false
+SpacesInConditionalStatement: false
 SpacesInCStyleCastParentheses: false
-SpacesInContainerLiterals: true
 SpacesInParentheses: false
-SpacesInSquareBrackets: false
 TabWidth: 2
-UseTab: Never
+...
diff --git a/.github/workflows/static_analysis.yml b/.github/workflows/static_analysis.yml
index 7e74f77ce..227f5e103 100644
--- a/.github/workflows/static_analysis.yml
+++ b/.github/workflows/static_analysis.yml
@@ -183,7 +183,8 @@ jobs:
             --define sonar.cfamily.compile-commands=${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json
 
   IAR-CStat:
-    if: github.repository_owner == 'hathach'
+    #if: github.repository_owner == 'hathach'
+    if: false
     runs-on: ubuntu-latest
     strategy:
       fail-fast: false
diff --git a/README.rst b/README.rst
index 38ebcc8da..fcec5d613 100644
--- a/README.rst
+++ b/README.rst
@@ -1,4 +1,4 @@
-|Build Status| |CircleCI Status| |Documentation Status| |Fuzzing Status| |License|
+|Build Status| |CircleCI Status| |Documentation Status| |Static Analysis| |Fuzzing Status| |License|
 
 Sponsors
 ========
@@ -252,11 +252,13 @@ The following tools are provided freely to support the development of the TinyUS
 
 
 .. |Build Status| image:: https://github.com/hathach/tinyusb/actions/workflows/build.yml/badge.svg
-   :target: https://github.com/hathach/tinyusb/actions
+   :target: https://github.com/hathach/tinyusb/actions/workflows/build.yml
 .. |CircleCI Status| image:: https://dl.circleci.com/status-badge/img/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master.svg?style=svg
    :target: https://dl.circleci.com/status-badge/redirect/circleci/4AYHvUhFxdnY4rA7LEsdqW/QmrpoL2AjGqetvFQNqtWyq/tree/master
 .. |Documentation Status| image:: https://readthedocs.org/projects/tinyusb/badge/?version=latest
    :target: https://docs.tinyusb.org/en/latest/?badge=latest
+.. |Static Analysis| image:: https://github.com/hathach/tinyusb/actions/workflows/static_analysis.yml/badge.svg
+   :target: https://github.com/hathach/tinyusb/actions/workflows/static_analysis.yml
 .. |Fuzzing Status| image:: https://oss-fuzz-build-logs.storage.googleapis.com/badges/tinyusb.svg
    :target: https://oss-fuzz-build-logs.storage.googleapis.com/index.html#tinyusb
 .. |License| image:: https://img.shields.io/badge/license-MIT-brightgreen.svg
diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index de9e8a06a..5767c7453 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -156,7 +156,9 @@ void tud_resume_cb(void) {
 void audio_task(void) {
   static uint32_t start_ms = 0;
   uint32_t curr_ms = board_millis();
-  if (start_ms == curr_ms) return;// not enough time
+  if (start_ms == curr_ms) {
+    return; // not enough time
+  }
   start_ms = curr_ms;
   tud_audio_write(i2s_dummy_buffer, AUDIO_SAMPLE_RATE / 1000 * CFG_TUD_AUDIO_FUNC_1_N_BYTES_PER_SAMPLE_TX * CFG_TUD_AUDIO_FUNC_1_N_CHANNELS_TX);
 }
@@ -406,7 +408,9 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;// not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
index 2f5f67f66..3bb93f67d 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_4_channel_mic_freertos/src/usb_descriptors.c
@@ -156,14 +156,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if ( chr_count > max_count ) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index 875d0b7f0..2441eefbc 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -139,7 +139,9 @@ void tud_resume_cb(void) {
 void audio_task(void) {
   static uint32_t start_ms = 0;
   uint32_t curr_ms = board_millis();
-  if (start_ms == curr_ms) return;// not enough time
+  if (start_ms == curr_ms) {
+    return; // not enough time
+  }
   start_ms = curr_ms;
   for (size_t cnt = 0; cnt < sizeof(test_buffer_audio) / 2; cnt++) {
     test_buffer_audio[cnt] = startVal++;
@@ -400,7 +402,9 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;// not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/audio_test/src/usb_descriptors.c b/examples/device/audio_test/src/usb_descriptors.c
index b6c19deba..ad161939e 100644
--- a/examples/device/audio_test/src/usb_descriptors.c
+++ b/examples/device/audio_test/src/usb_descriptors.c
@@ -158,14 +158,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/audio_test_freertos/src/usb_descriptors.c b/examples/device/audio_test_freertos/src/usb_descriptors.c
index b6c19deba..ad161939e 100644
--- a/examples/device/audio_test_freertos/src/usb_descriptors.c
+++ b/examples/device/audio_test_freertos/src/usb_descriptors.c
@@ -158,14 +158,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index 55a649613..baeec870f 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -147,7 +147,9 @@ void tud_resume_cb(void) {
 void audio_task(void) {
   static uint32_t start_ms = 0;
   uint32_t curr_ms = board_millis();
-  if (start_ms == curr_ms) return;// not enough time
+  if (start_ms == curr_ms) {
+    return; // not enough time
+  }
   start_ms = curr_ms;
   // 16bit
   if (bytesPerSample == 2) {
@@ -612,7 +614,9 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;// not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/audio_test_multi_rate/src/usb_descriptors.c b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
index 1912a81e2..471eb4f2e 100644
--- a/examples/device/audio_test_multi_rate/src/usb_descriptors.c
+++ b/examples/device/audio_test_multi_rate/src/usb_descriptors.c
@@ -213,14 +213,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 8fe003f21..5ccb06a8a 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -75,10 +75,14 @@ static void echo_serial_port(uint8_t itf, uint8_t buf[], uint32_t count) {
   for (uint32_t i = 0; i < count; i++) {
     if (itf == 0) {
       // echo back 1st port as lower case
-      if (isupper(buf[i])) buf[i] += case_diff;
+      if (isupper(buf[i])) {
+        buf[i] += case_diff;
+      }
     } else {
       // echo back 2nd port as upper case
-      if (islower(buf[i])) buf[i] -= case_diff;
+      if (islower(buf[i])) {
+        buf[i] -= case_diff;
+      }
     }
 
     tud_cdc_n_write_char(itf, buf[i]);
@@ -153,7 +157,9 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index 1a95f7f8b..e091c2985 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -128,9 +128,9 @@ uint32_t tud_msc_inquiry2_cb(uint8_t lun, scsi_inquiry_resp_t *inquiry_resp, uin
   const char pid[] = "Mass Storage";
   const char rev[] = "1.0";
 
-  strncpy((char*) inquiry_resp->vendor_id, vid, 8);
-  strncpy((char*) inquiry_resp->product_id, pid, 16);
-  strncpy((char*) inquiry_resp->product_rev, rev, 4);
+  (void) strncpy((char*) inquiry_resp->vendor_id, vid, 8);
+  (void) strncpy((char*) inquiry_resp->product_id, pid, 16);
+  (void) strncpy((char*) inquiry_resp->product_rev, rev, 4);
 
   return sizeof(scsi_inquiry_resp_t); // 36 bytes
 }
@@ -143,8 +143,7 @@ bool tud_msc_test_unit_ready_cb(uint8_t lun) {
   // RAM disk is ready until ejected
   if (ejected) {
     // Additional Sense 3A-00 is NOT_FOUND
-    tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3a, 0x00);
-    return false;
+    return tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3a, 0x00);
   }
 
   return true;
@@ -154,7 +153,6 @@ bool tud_msc_test_unit_ready_cb(uint8_t lun) {
 // Application update block count and block size
 void tud_msc_capacity_cb(uint8_t lun, uint32_t *block_count, uint16_t *block_size) {
   (void) lun;
-
   *block_count = DISK_BLOCK_NUM;
   *block_size = DISK_BLOCK_SIZE;
 }
@@ -194,7 +192,7 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void *buff
   }
 
   uint8_t const *addr = msc_disk[lba] + offset;
-  memcpy(buffer, addr, bufsize);
+  (void) memcpy(buffer, addr, bufsize);
 
   return (int32_t) bufsize;
 }
@@ -221,7 +219,7 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t *
 
   #ifndef CFG_EXAMPLE_MSC_READONLY
   uint8_t *addr = msc_disk[lba] + offset;
-  memcpy(addr, buffer, bufsize);
+  (void) memcpy(addr, buffer, bufsize);
   #else
   (void) lba;
   (void) offset;
@@ -235,19 +233,17 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t *
 // - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, MODE_SENSE6, REQUEST_SENSE
 // - READ10 and WRITE10 has their own callbacks
 int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, uint16_t bufsize) {
+  (void) lun;
+  (void) scsi_cmd;
   (void) buffer;
   (void) bufsize;
 
-  switch (scsi_cmd[0]) {
-    default:
-      // Set Sense = Invalid Command Operation
-      tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+  // currently no other commands is supported
 
-      // negative means error -> tinyusb could stall and/or response with failed status
-      return -1;
-  }
+  // Set Sense = Invalid Command Operation
+  (void) tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
 
-  return -1;
+  return -1; // stall/failed command request;
 }
 
 #endif
diff --git a/examples/device/cdc_uac2/src/uac2_app.c b/examples/device/cdc_uac2/src/uac2_app.c
index cb7b716e8..73a262d0c 100644
--- a/examples/device/cdc_uac2/src/uac2_app.c
+++ b/examples/device/cdc_uac2/src/uac2_app.c
@@ -67,7 +67,9 @@ uint8_t current_resolution;
 void audio_task(void) {
   static uint32_t start_ms = 0;
   uint32_t curr_ms = board_millis();
-  if (start_ms == curr_ms) return;// not enough time
+  if (start_ms == curr_ms) {
+    return; // not enough time
+  }
   start_ms = curr_ms;
   // When new data arrived, copy data from speaker buffer, to microphone buffer
   // and send it over
@@ -226,16 +228,15 @@ static bool tud_audio_feature_unit_set_request(uint8_t rhport, audio20_control_r
 //--------------------------------------------------------------------+
 
 // Invoked when audio class specific get request received for an entity
-bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request)
-{
+bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request) {
   audio20_control_request_t const *request = (audio20_control_request_t const *)p_request;
 
-  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+  if (request->bEntityID == UAC2_ENTITY_CLOCK) {
     return tud_audio_clock_get_request(rhport, request);
-  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT)
+  }
+  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT) {
     return tud_audio_feature_unit_get_request(rhport, request);
-  else
-  {
+  } else {
     TU_LOG1("Get request not handled, entity = %d, selector = %d, request = %d\r\n",
             request->bEntityID, request->bControlSelector, request->bRequest);
   }
@@ -243,14 +244,15 @@ bool tud_audio_get_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p
 }
 
 // Invoked when audio class specific set request received for an entity
-bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request, uint8_t *buf)
-{
+bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p_request, uint8_t *buf) {
   audio20_control_request_t const *request = (audio20_control_request_t const *)p_request;
 
-  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT)
+  if (request->bEntityID == UAC2_ENTITY_SPK_FEATURE_UNIT) {
     return tud_audio_feature_unit_set_request(rhport, request, buf);
-  if (request->bEntityID == UAC2_ENTITY_CLOCK)
+  }
+  if (request->bEntityID == UAC2_ENTITY_CLOCK) {
     return tud_audio_clock_set_request(rhport, request, buf);
+  }
   TU_LOG1("Set request not handled, entity = %d, selector = %d, request = %d\r\n",
           request->bEntityID, request->bControlSelector, request->bRequest);
 
@@ -301,7 +303,9 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return;
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/cdc_uac2/src/usb_descriptors.c b/examples/device/cdc_uac2/src/usb_descriptors.c
index 252b602ac..e6caaa971 100644
--- a/examples/device/cdc_uac2/src/usb_descriptors.c
+++ b/examples/device/cdc_uac2/src/usb_descriptors.c
@@ -248,14 +248,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/dfu/src/usb_descriptors.c b/examples/device/dfu/src/usb_descriptors.c
index 14ec315ea..48c9985f3 100644
--- a/examples/device/dfu/src/usb_descriptors.c
+++ b/examples/device/dfu/src/usb_descriptors.c
@@ -158,14 +158,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 37cb80093..5de651bcd 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -132,7 +132,9 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/dfu_runtime/src/usb_descriptors.c b/examples/device/dfu_runtime/src/usb_descriptors.c
index 1d46ee252..5d5cf52cd 100644
--- a/examples/device/dfu_runtime/src/usb_descriptors.c
+++ b/examples/device/dfu_runtime/src/usb_descriptors.c
@@ -153,14 +153,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index 258cfcd02..dac74bb7a 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -109,23 +109,18 @@ void tud_resume_cb(void)
 //--------------------------------------------------------------------+
 // USB CDC
 //--------------------------------------------------------------------+
-void cdc_task(void)
-{
-  if ( tud_cdc_connected() )
-  {
-    // connected and there are data available
-    if ( tud_cdc_available() )
-    {
+void cdc_task(void) {
+  if (tud_cdc_connected()) {
+    // connected and there are data available read and echo back
+    if (tud_cdc_available()) {
       uint8_t buf[64];
-
-      // read and echo back
       uint32_t count = tud_cdc_read(buf, sizeof(buf));
 
-      for(uint32_t i=0; i<count; i++)
-      {
+      for (uint32_t i = 0; i < count; i++) {
         tud_cdc_write_char(buf[i]);
-
-        if ( buf[i] == '\r' ) tud_cdc_write_char('\n');
+        if (buf[i] == '\r') {
+          tud_cdc_write_char('\n');
+        }
       }
 
       tud_cdc_write_flush();
@@ -134,23 +129,18 @@ void cdc_task(void)
 }
 
 // Invoked when cdc when line state changed e.g connected/disconnected
-void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts)
-{
+void tud_cdc_line_state_cb(uint8_t itf, bool dtr, bool rts) {
   (void) itf;
 
   // connected
-  if ( dtr && rts )
-  {
+  if (dtr && rts) {
     // print initial message when connected
     tud_cdc_write_str("\r\nTinyUSB CDC MSC device example\r\n");
   }
 }
 
 // Invoked when CDC interface received data from host
-void tud_cdc_rx_cb(uint8_t itf)
-{
-  (void) itf;
-}
+void tud_cdc_rx_cb(uint8_t itf) { (void) itf; }
 
 //--------------------------------------------------------------------+
 // MIDI Task
@@ -167,8 +157,7 @@ static const uint8_t note_sequence[] =
   56,61,64,68,74,78,81,86,90,93,98,102
 };
 
-void midi_task(void)
-{
+void midi_task(void) {
   static uint32_t start_ms = 0;
 
   uint8_t const cable_num = 0; // MIDI jack associated with USB endpoint
@@ -181,7 +170,9 @@ void midi_task(void)
   while( tud_midi_available() ) tud_midi_packet_read(packet);
 
   // send note every 1000 ms
-  if (board_millis() - start_ms < 286) return; // not enough time
+  if (board_millis() - start_ms < 286) {
+    return; // not enough time
+  }
   start_ms += 286;
 
   // Previous positions in the note sequence.
@@ -189,7 +180,9 @@ void midi_task(void)
 
   // If we currently are at position 0, set the
   // previous position to the last note in the sequence.
-  if (previous < 0) previous = sizeof(note_sequence) - 1;
+  if (previous < 0) {
+    previous = sizeof(note_sequence) - 1;
+  }
 
   // Send Note On for current position at full velocity (127) on channel 1.
   uint8_t note_on[3] = { 0x90 | channel, note_sequence[note_pos], 127 };
@@ -203,21 +196,24 @@ void midi_task(void)
   note_pos++;
 
   // If we are at the end of the sequence, start over.
-  if (note_pos >= sizeof(note_sequence)) note_pos = 0;
+  if (note_pos >= sizeof(note_sequence)) {
+    note_pos = 0;
+  }
 }
 
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
-void led_blinking_task(void)
-{
+void led_blinking_task(void) {
   static uint32_t start_ms = 0;
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return;// not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
-  led_state = 1 - led_state; // toggle
+  led_state = 1 - led_state;// toggle
 }
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index ab71b02d6..e95b2e197 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -177,12 +177,13 @@ bool tud_msc_start_stop_cb(uint8_t lun, uint8_t power_condition, bool start, boo
 
 // Callback invoked when received READ10 command.
 // Copy disk's data to buffer (up to bufsize) and return number of copied bytes.
-int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize)
-{
+int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buffer, uint32_t bufsize) {
   (void) lun;
 
   // out of ramdisk
-  if ( lba >= DISK_BLOCK_NUM ) return -1;
+  if ( lba >= DISK_BLOCK_NUM ) {
+    return -1;
+  }
 
   uint8_t const* addr = msc_disk[lba] + offset;
   memcpy(buffer, addr, bufsize);
@@ -192,12 +193,13 @@ int32_t tud_msc_read10_cb(uint8_t lun, uint32_t lba, uint32_t offset, void* buff
 
 // Callback invoked when received WRITE10 command.
 // Process data in buffer to disk's storage and return number of written bytes
-int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize)
-{
+int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t* buffer, uint32_t bufsize) {
   (void) lun;
 
   // out of ramdisk
-  if ( lba >= DISK_BLOCK_NUM ) return -1;
+  if ( lba >= DISK_BLOCK_NUM ) {
+    return -1;
+  }
 
 #ifndef CFG_EXAMPLE_MSC_READONLY
   uint8_t* addr = msc_disk[lba] + offset;
diff --git a/examples/device/dynamic_configuration/src/usb_descriptors.c b/examples/device/dynamic_configuration/src/usb_descriptors.c
index 083279938..458b7c2a5 100644
--- a/examples/device/dynamic_configuration/src/usb_descriptors.c
+++ b/examples/device/dynamic_configuration/src/usb_descriptors.c
@@ -232,14 +232,18 @@ uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
       for ( size_t i = 0; i < chr_count; i++ ) {
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 45712cede..44a91db67 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -23,8 +23,8 @@
  *
  */
 
-#include <stdlib.h>
 #include <stdio.h>
+#include <stdlib.h>
 #include <string.h>
 
 #include "bsp/board_api.h"
@@ -40,10 +40,10 @@
  * - 1000 ms : device mounted
  * - 2500 ms : device is suspended
  */
-enum  {
+enum {
   BLINK_NOT_MOUNTED = 250,
-  BLINK_MOUNTED = 1000,
-  BLINK_SUSPENDED = 2500,
+  BLINK_MOUNTED     = 1000,
+  BLINK_SUSPENDED   = 2500,
 };
 
 static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
@@ -52,21 +52,16 @@ void led_blinking_task(void);
 void hid_task(void);
 
 /*------------- MAIN -------------*/
-int main(void)
-{
+int main(void) {
   board_init();
 
   // init device stack on configured roothub port
-  tusb_rhport_init_t dev_init = {
-    .role = TUSB_ROLE_DEVICE,
-    .speed = TUSB_SPEED_AUTO
-  };
+  tusb_rhport_init_t dev_init = {.role = TUSB_ROLE_DEVICE, .speed = TUSB_SPEED_AUTO};
   tusb_init(BOARD_TUD_RHPORT, &dev_init);
 
   board_init_after_tusb();
 
-  while (1)
-  {
+  while (1) {
     tud_task(); // tinyusb device task
     led_blinking_task();
 
@@ -81,29 +76,25 @@ int main(void)
 //--------------------------------------------------------------------+
 
 // Invoked when device is mounted
-void tud_mount_cb(void)
-{
+void tud_mount_cb(void) {
   blink_interval_ms = BLINK_MOUNTED;
 }
 
 // Invoked when device is unmounted
-void tud_umount_cb(void)
-{
+void tud_umount_cb(void) {
   blink_interval_ms = BLINK_NOT_MOUNTED;
 }
 
 // Invoked when usb bus is suspended
 // remote_wakeup_en : if host allow us  to perform remote wakeup
 // Within 7ms, device must draw an average of current less than 2.5 mA from bus
-void tud_suspend_cb(bool remote_wakeup_en)
-{
-  (void) remote_wakeup_en;
+void tud_suspend_cb(bool remote_wakeup_en) {
+  (void)remote_wakeup_en;
   blink_interval_ms = BLINK_SUSPENDED;
 }
 
 // Invoked when usb bus is resumed
-void tud_resume_cb(void)
-{
+void tud_resume_cb(void) {
   blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
@@ -113,59 +104,54 @@ void tud_resume_cb(void)
 
 // Every 10ms, we will sent 1 report for each HID profile (keyboard, mouse etc ..)
 // tud_hid_report_complete_cb() is used to send the next report after previous one is complete
-void hid_task(void)
-{
+void hid_task(void) {
   // Poll every 10ms
-  const uint32_t interval_ms = 10;
-  static uint32_t start_ms = 0;
+  const uint32_t  interval_ms = 10;
+  static uint32_t start_ms    = 0;
 
-  if ( board_millis() - start_ms < interval_ms) return; // not enough time
+  if (board_millis() - start_ms < interval_ms) {
+    return; // not enough time
+  }
   start_ms += interval_ms;
 
   uint32_t const btn = board_button_read();
 
-  if ( tud_suspended() && btn )
-  {
+  if (tud_suspended() && btn) {
     // Wake up host if we are in suspend mode
     // and REMOTE_WAKEUP feature is enabled by host
     tud_remote_wakeup();
-  }
-  else
-  {
+  } else {
     // keyboard interface
-    if ( tud_hid_n_ready(ITF_NUM_KEYBOARD) )
-    {
+    if (tud_hid_n_ready(ITF_NUM_KEYBOARD)) {
       // used to avoid send multiple consecutive zero report for keyboard
       static bool has_keyboard_key = false;
 
       uint8_t const report_id = 0;
       uint8_t const modifier  = 0;
 
-      if ( btn )
-      {
-        uint8_t keycode[6] = { 0 };
-        keycode[0] = HID_KEY_ARROW_RIGHT;
+      if (btn) {
+        uint8_t keycode[6] = {0};
+        keycode[0]         = HID_KEY_ARROW_RIGHT;
 
         tud_hid_n_keyboard_report(ITF_NUM_KEYBOARD, report_id, modifier, keycode);
         has_keyboard_key = true;
-      }else
-      {
+      } else {
         // send empty key report if previously has key pressed
-        if (has_keyboard_key) tud_hid_n_keyboard_report(ITF_NUM_KEYBOARD, report_id, modifier, NULL);
+        if (has_keyboard_key) {
+          tud_hid_n_keyboard_report(ITF_NUM_KEYBOARD, report_id, modifier, NULL);
+        }
         has_keyboard_key = false;
       }
     }
 
     // mouse interface
-    if ( tud_hid_n_ready(ITF_NUM_MOUSE) )
-    {
-      if ( btn )
-      {
+    if (tud_hid_n_ready(ITF_NUM_MOUSE)) {
+      if (btn) {
         uint8_t const report_id   = 0;
         uint8_t const button_mask = 0;
-        int8_t  const vertical    = 0;
-        int8_t  const horizontal  = 0;
-        int8_t  const delta       = 5;
+        int8_t const  vertical    = 0;
+        int8_t const  horizontal  = 0;
+        int8_t const  delta       = 5;
 
         tud_hid_n_mouse_report(ITF_NUM_MOUSE, report_id, button_mask, delta, delta, vertical, horizontal);
       }
@@ -175,10 +161,9 @@ void hid_task(void)
 
 // Invoked when received SET_PROTOCOL request
 // protocol is either HID_PROTOCOL_BOOT (0) or HID_PROTOCOL_REPORT (1)
-void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol)
-{
-  (void) instance;
-  (void) protocol;
+void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol) {
+  (void)instance;
+  (void)protocol;
 
   // nothing to do since we use the same compatible boot report for both Boot and Report mode.
   // TODO set a indicator for user
@@ -187,11 +172,10 @@ void tud_hid_set_protocol_cb(uint8_t instance, uint8_t protocol)
 // Invoked when sent REPORT successfully to host
 // Application can use this to send the next report
 // Note: For composite reports, report[0] is report ID
-void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len)
-{
-  (void) instance;
-  (void) report;
-  (void) len;
+void tud_hid_report_complete_cb(uint8_t instance, uint8_t const *report, uint16_t len) {
+  (void)instance;
+  (void)report;
+  (void)len;
 
   // nothing to do
 }
@@ -199,42 +183,40 @@ void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_
 // Invoked when received GET_REPORT control request
 // Application must fill buffer report's content and return its length.
 // Return zero will cause the stack to STALL request
-uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen)
-{
+uint16_t tud_hid_get_report_cb(
+    uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t *buffer, uint16_t reqlen) {
   // TODO not Implemented
-  (void) instance;
-  (void) report_id;
-  (void) report_type;
-  (void) buffer;
-  (void) reqlen;
+  (void)instance;
+  (void)report_id;
+  (void)report_type;
+  (void)buffer;
+  (void)reqlen;
 
   return 0;
 }
 
 // Invoked when received SET_REPORT control request or
 // received data on OUT endpoint ( Report ID = 0, Type = 0 )
-void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize)
-{
-  (void) report_id;
+void tud_hid_set_report_cb(
+    uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const *buffer, uint16_t bufsize) {
+  (void)report_id;
 
   // keyboard interface
-  if (instance == ITF_NUM_KEYBOARD)
-  {
+  if (instance == ITF_NUM_KEYBOARD) {
     // Set keyboard LED e.g Capslock, Numlock etc...
-    if (report_type == HID_REPORT_TYPE_OUTPUT)
-    {
+    if (report_type == HID_REPORT_TYPE_OUTPUT) {
       // bufsize should be (at least) 1
-      if ( bufsize < 1 ) return;
+      if (bufsize < 1) {
+        return;
+      }
 
       uint8_t const kbd_leds = buffer[0];
 
-      if (kbd_leds & KEYBOARD_LED_CAPSLOCK)
-      {
+      if (kbd_leds & KEYBOARD_LED_CAPSLOCK) {
         // Capslock On: disable blink, turn led on
         blink_interval_ms = 0;
         board_led_write(true);
-      }else
-      {
+      } else {
         // Caplocks Off: back to normal blink
         board_led_write(false);
         blink_interval_ms = BLINK_MOUNTED;
@@ -246,16 +228,19 @@ void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
-void led_blinking_task(void)
-{
-  static uint32_t start_ms = 0;
-  static bool led_state = false;
+void led_blinking_task(void) {
+  static uint32_t start_ms  = 0;
+  static bool     led_state = false;
 
   // blink is disabled
-  if (!blink_interval_ms) return;
+  if (!blink_interval_ms) {
+    return;
+  }
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/hid_boot_interface/src/usb_descriptors.c b/examples/device/hid_boot_interface/src/usb_descriptors.c
index 9b4becc85..b5c31a94a 100644
--- a/examples/device/hid_boot_interface/src/usb_descriptors.c
+++ b/examples/device/hid_boot_interface/src/usb_descriptors.c
@@ -33,60 +33,49 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]         HID | MSC | CDC          [LSB]
  */
-#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
-                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID         (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4))
 
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-static tusb_desc_device_t const desc_device =
-{
-    .bLength            = sizeof(tusb_desc_device_t),
-    .bDescriptorType    = TUSB_DESC_DEVICE,
-    .bcdUSB             = 0x0200,
-    .bDeviceClass       = 0x00,
-    .bDeviceSubClass    = 0x00,
-    .bDeviceProtocol    = 0x00,
-    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
-
-    .idVendor           = 0xCafe,
-    .idProduct          = USB_PID,
-    .bcdDevice          = 0x0100,
-
-    .iManufacturer      = 0x01,
-    .iProduct           = 0x02,
-    .iSerialNumber      = 0x03,
-
-    .bNumConfigurations = 0x01
-};
+static tusb_desc_device_t const desc_device = {
+  .bLength         = sizeof(tusb_desc_device_t),
+  .bDescriptorType = TUSB_DESC_DEVICE,
+  .bcdUSB          = 0x0200,
+  .bDeviceClass    = 0x00,
+  .bDeviceSubClass = 0x00,
+  .bDeviceProtocol = 0x00,
+  .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
+
+  .idVendor  = 0xCafe,
+  .idProduct = USB_PID,
+  .bcdDevice = 0x0100,
+
+  .iManufacturer = 0x01,
+  .iProduct      = 0x02,
+  .iSerialNumber = 0x03,
+
+  .bNumConfigurations = 0x01};
 
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
-uint8_t const * tud_descriptor_device_cb(void)
-{
-  return (uint8_t const *) &desc_device;
+uint8_t const *tud_descriptor_device_cb(void) {
+  return (uint8_t const *)&desc_device;
 }
 
 //--------------------------------------------------------------------+
 // HID Report Descriptor
 //--------------------------------------------------------------------+
 
-uint8_t const desc_hid_keyboard_report[] =
-{
-  TUD_HID_REPORT_DESC_KEYBOARD()
-};
+uint8_t const desc_hid_keyboard_report[] = {TUD_HID_REPORT_DESC_KEYBOARD()};
 
-uint8_t const desc_hid_mouse_report[] =
-{
-  TUD_HID_REPORT_DESC_MOUSE()
-};
+uint8_t const desc_hid_mouse_report[] = {TUD_HID_REPORT_DESC_MOUSE()};
 
 // Invoked when received GET HID REPORT DESCRIPTOR
 // Application return pointer to descriptor
 // Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance)
-{
+uint8_t const *tud_hid_descriptor_report_cb(uint8_t instance) {
   return (instance == 0) ? desc_hid_keyboard_report : desc_hid_mouse_report;
 }
 
@@ -94,36 +83,37 @@ uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance)
 // Configuration Descriptor
 //--------------------------------------------------------------------+
 
-#define CONFIG_TOTAL_LEN  (TUD_CONFIG_DESC_LEN + 2*TUD_HID_DESC_LEN)
+#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + 2 * TUD_HID_DESC_LEN)
 
 #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
-  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
-  // 1 Interrupt, 2 Bulk, 3 Iso, 4 Interrupt, 5 Bulk etc ...
-  #define EPNUM_KEYBOARD   0x81
-  #define EPNUM_MOUSE      0x84
+// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+// 1 Interrupt, 2 Bulk, 3 Iso, 4 Interrupt, 5 Bulk etc ...
+#define EPNUM_KEYBOARD 0x81
+#define EPNUM_MOUSE    0x84
 #else
-  #define EPNUM_KEYBOARD   0x81
-  #define EPNUM_MOUSE      0x82
+#define EPNUM_KEYBOARD 0x81
+#define EPNUM_MOUSE    0x82
 #endif
 
-uint8_t const desc_configuration[] =
-{
+uint8_t const desc_configuration[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
   TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
 
   // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
-  TUD_HID_DESCRIPTOR(ITF_NUM_KEYBOARD, 0, HID_ITF_PROTOCOL_KEYBOARD, sizeof(desc_hid_keyboard_report), EPNUM_KEYBOARD, CFG_TUD_HID_EP_BUFSIZE, 10),
+  TUD_HID_DESCRIPTOR(
+      ITF_NUM_KEYBOARD, 0, HID_ITF_PROTOCOL_KEYBOARD, sizeof(desc_hid_keyboard_report), EPNUM_KEYBOARD,
+      CFG_TUD_HID_EP_BUFSIZE, 10),
 
   // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
-  TUD_HID_DESCRIPTOR(ITF_NUM_MOUSE, 0, HID_ITF_PROTOCOL_MOUSE, sizeof(desc_hid_mouse_report), EPNUM_MOUSE, CFG_TUD_HID_EP_BUFSIZE, 10)
-};
+  TUD_HID_DESCRIPTOR(
+      ITF_NUM_MOUSE, 0, HID_ITF_PROTOCOL_MOUSE, sizeof(desc_hid_mouse_report), EPNUM_MOUSE, CFG_TUD_HID_EP_BUFSIZE,
+      10)};
 
 // Invoked when received GET CONFIGURATION DESCRIPTOR
 // Application return pointer to descriptor
 // Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
-{
-  (void) index; // for multiple configurations
+uint8_t const *tud_descriptor_configuration_cb(uint8_t index) {
+  (void)index; // for multiple configurations
   return desc_configuration;
 }
 
@@ -140,12 +130,11 @@ enum {
 };
 
 // array of pointer to string descriptors
-static char const *string_desc_arr[] =
-{
-  (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
-  "TinyUSB",                     // 1: Manufacturer
-  "TinyUSB Device",              // 2: Product
-  NULL,                          // 3: Serials will use unique ID if possible
+static char const *string_desc_arr[] = {
+  (const char[]){0x09, 0x04}, // 0: is supported language is English (0x0409)
+  "TinyUSB",                  // 1: Manufacturer
+  "TinyUSB Device",           // 2: Product
+  NULL,                       // 3: Serials will use unique ID if possible
 };
 
 static uint16_t _desc_str[32 + 1];
@@ -153,41 +142,44 @@ static uint16_t _desc_str[32 + 1];
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
 uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
-  (void) langid;
+  (void)langid;
   size_t chr_count;
 
-  switch ( index ) {
+  switch (index) {
     case STRID_LANGID:
       memcpy(&_desc_str[1], string_desc_arr[0], 2);
       chr_count = 1;
       break;
 
-    case STRID_SERIAL:
-      chr_count = board_usb_get_serial(_desc_str + 1, 32);
-      break;
+    case STRID_SERIAL: chr_count = board_usb_get_serial(_desc_str + 1, 32); break;
 
     default:
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
+
       size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
-      for ( size_t i = 0; i < chr_count; i++ ) {
+      for (size_t i = 0; i < chr_count; i++) {
         _desc_str[1 + i] = str[i];
       }
       break;
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
+  _desc_str[0] = (uint16_t)((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 89dab0bdc..9693d564d 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -23,8 +23,8 @@
  *
  */
 
-#include <stdlib.h>
 #include <stdio.h>
+#include <stdlib.h>
 #include <string.h>
 
 #include "bsp/board_api.h"
@@ -41,10 +41,10 @@
  * - 1000 ms : device mounted
  * - 2500 ms : device is suspended
  */
-enum  {
+enum {
   BLINK_NOT_MOUNTED = 250,
-  BLINK_MOUNTED = 1000,
-  BLINK_SUSPENDED = 2500,
+  BLINK_MOUNTED     = 1000,
+  BLINK_SUSPENDED   = 2500,
 };
 
 static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
@@ -53,24 +53,18 @@ void led_blinking_task(void);
 void hid_task(void);
 
 /*------------- MAIN -------------*/
-int main(void)
-{
+int main(void) {
   board_init();
 
   // init device stack on configured roothub port
-  tusb_rhport_init_t dev_init = {
-    .role = TUSB_ROLE_DEVICE,
-    .speed = TUSB_SPEED_AUTO
-  };
+  tusb_rhport_init_t dev_init = {.role = TUSB_ROLE_DEVICE, .speed = TUSB_SPEED_AUTO};
   tusb_init(BOARD_TUD_RHPORT, &dev_init);
 
   board_init_after_tusb();
 
-  while (1)
-  {
+  while (1) {
     tud_task(); // tinyusb device task
     led_blinking_task();
-
     hid_task();
   }
 }
@@ -80,29 +74,25 @@ int main(void)
 //--------------------------------------------------------------------+
 
 // Invoked when device is mounted
-void tud_mount_cb(void)
-{
+void tud_mount_cb(void) {
   blink_interval_ms = BLINK_MOUNTED;
 }
 
 // Invoked when device is unmounted
-void tud_umount_cb(void)
-{
+void tud_umount_cb(void) {
   blink_interval_ms = BLINK_NOT_MOUNTED;
 }
 
 // Invoked when usb bus is suspended
 // remote_wakeup_en : if host allow us  to perform remote wakeup
 // Within 7ms, device must draw an average of current less than 2.5 mA from bus
-void tud_suspend_cb(bool remote_wakeup_en)
-{
-  (void) remote_wakeup_en;
+void tud_suspend_cb(bool remote_wakeup_en) {
+  (void)remote_wakeup_en;
   blink_interval_ms = BLINK_SUSPENDED;
 }
 
 // Invoked when usb bus is resumed
-void tud_resume_cb(void)
-{
+void tud_resume_cb(void) {
   blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
@@ -110,138 +100,128 @@ void tud_resume_cb(void)
 // USB HID
 //--------------------------------------------------------------------+
 
-static void send_hid_report(uint8_t report_id, uint32_t btn)
-{
+static void send_hid_report(uint8_t report_id, uint32_t btn) {
   // skip if hid is not ready yet
-  if ( !tud_hid_ready() ) return;
+  if (!tud_hid_ready()) {
+    return;
+  }
 
-  switch(report_id)
-  {
-    case REPORT_ID_KEYBOARD:
-    {
+  switch (report_id) {
+    case REPORT_ID_KEYBOARD: {
       // use to avoid send multiple consecutive zero report for keyboard
       static bool has_keyboard_key = false;
 
-      if ( btn )
-      {
-        uint8_t keycode[6] = { 0 };
-        keycode[0] = HID_KEY_A;
+      if (btn != 0u) {
+        uint8_t keycode[6] = {0};
+        keycode[0]         = HID_KEY_A;
 
         tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, keycode);
         has_keyboard_key = true;
-      }else
-      {
+      } else {
         // send empty key report if previously has key pressed
-        if (has_keyboard_key) tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, NULL);
+        if (has_keyboard_key) {
+          tud_hid_keyboard_report(REPORT_ID_KEYBOARD, 0, NULL);
+        }
         has_keyboard_key = false;
       }
+      break;
     }
-    break;
 
-    case REPORT_ID_MOUSE:
-    {
+    case REPORT_ID_MOUSE: {
       int8_t const delta = 5;
 
       // no button, right + down, no scroll, no pan
       tud_hid_mouse_report(REPORT_ID_MOUSE, 0x00, delta, delta, 0, 0);
+      break;
     }
-    break;
 
-    case REPORT_ID_CONSUMER_CONTROL:
-    {
+    case REPORT_ID_CONSUMER_CONTROL: {
       // use to avoid send multiple consecutive zero report
       static bool has_consumer_key = false;
 
-      if ( btn )
-      {
+      if (btn != 0u) {
         // volume down
         uint16_t volume_down = HID_USAGE_CONSUMER_VOLUME_DECREMENT;
         tud_hid_report(REPORT_ID_CONSUMER_CONTROL, &volume_down, 2);
         has_consumer_key = true;
-      }else
-      {
+      } else {
         // send empty key report (release key) if previously has key pressed
         uint16_t empty_key = 0;
-        if (has_consumer_key) tud_hid_report(REPORT_ID_CONSUMER_CONTROL, &empty_key, 2);
+        if (has_consumer_key) {
+          tud_hid_report(REPORT_ID_CONSUMER_CONTROL, &empty_key, 2);
+        }
         has_consumer_key = false;
       }
+      break;
     }
-    break;
 
-    case REPORT_ID_GAMEPAD:
-    {
+    case REPORT_ID_GAMEPAD: {
       // use to avoid send multiple consecutive zero report for keyboard
       static bool has_gamepad_key = false;
 
-      hid_gamepad_report_t report =
-      {
-        .x   = 0, .y = 0, .z = 0, .rz = 0, .rx = 0, .ry = 0,
-        .hat = 0, .buttons = 0
-      };
+      hid_gamepad_report_t report = {.x = 0, .y = 0, .z = 0, .rz = 0, .rx = 0, .ry = 0, .hat = 0, .buttons = 0};
 
-      if ( btn )
-      {
-        report.hat = GAMEPAD_HAT_UP;
+      if (btn != 0u) {
+        report.hat     = GAMEPAD_HAT_UP;
         report.buttons = GAMEPAD_BUTTON_A;
         tud_hid_report(REPORT_ID_GAMEPAD, &report, sizeof(report));
 
         has_gamepad_key = true;
-      }else
-      {
-        report.hat = GAMEPAD_HAT_CENTERED;
+      } else {
+        report.hat     = GAMEPAD_HAT_CENTERED;
         report.buttons = 0;
-        if (has_gamepad_key) tud_hid_report(REPORT_ID_GAMEPAD, &report, sizeof(report));
+        if (has_gamepad_key) {
+          tud_hid_report(REPORT_ID_GAMEPAD, &report, sizeof(report));
+        }
         has_gamepad_key = false;
       }
+      break;
     }
-    break;
 
     case REPORT_ID_STYLUS_PEN: {
-      static bool touch_state = false;
-      hid_stylus_report_t report = {
-        .attr = 0,
-        .x = 0,
-        .y = 0
-      };
-
-      if (btn) {
+      static bool         touch_state = false;
+      hid_stylus_report_t report      = {.attr = 0, .x = 0, .y = 0};
+
+      if (btn != 0u) {
         report.attr = STYLUS_ATTR_TIP_SWITCH | STYLUS_ATTR_IN_RANGE;
-        report.x = 100;
-        report.y = 100;
+        report.x    = 100;
+        report.y    = 100;
         tud_hid_report(REPORT_ID_STYLUS_PEN, &report, sizeof(report));
         touch_state = true;
       } else {
         report.attr = 0;
-        if (touch_state) tud_hid_report(REPORT_ID_STYLUS_PEN, &report, sizeof(report));
+        if (touch_state) {
+          tud_hid_report(REPORT_ID_STYLUS_PEN, &report, sizeof(report));
+        }
         touch_state = false;
       }
+      break;
     }
-    break;
-    default: break;
+
+    default: break; // unknown report id
   }
 }
 
 // Every 10ms, we will sent 1 report for each HID profile (keyboard, mouse etc ..)
 // tud_hid_report_complete_cb() is used to send the next report after previous one is complete
-void hid_task(void)
-{
+void hid_task(void) {
   // Poll every 10ms
-  const uint32_t interval_ms = 10;
-  static uint32_t start_ms = 0;
+  const uint32_t  interval_ms = 10;
+  static uint32_t start_ms    = 0;
 
-  if ( board_millis() - start_ms < interval_ms) return; // not enough time
+  if (board_millis() - start_ms < interval_ms) {
+    return; // not enough time
+  }
   start_ms += interval_ms;
 
   uint32_t const btn = board_button_read();
 
   // Remote wakeup
-  if ( tud_suspended() && btn )
-  {
+  if (tud_suspended() && btn != 0u) {
     // Wake up host if we are in suspend mode
     // and REMOTE_WAKEUP feature is enabled by host
     tud_remote_wakeup();
-  }else
-  {
+  } else {
     // Send the 1st of report chain, the rest will be sent by tud_hid_report_complete_cb()
     send_hid_report(REPORT_ID_KEYBOARD, btn);
   }
@@ -250,15 +230,13 @@ void hid_task(void)
 // Invoked when sent REPORT successfully to host
 // Application can use this to send the next report
 // Note: For composite reports, report[0] is report ID
-void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_t len)
-{
-  (void) instance;
-  (void) len;
+void tud_hid_report_complete_cb(uint8_t instance, uint8_t const *report, uint16_t len) {
+  (void)instance;
+  (void)len;
 
   uint8_t next_report_id = report[0] + 1u;
 
-  if (next_report_id < REPORT_ID_COUNT)
-  {
+  if (next_report_id < REPORT_ID_COUNT) {
     send_hid_report(next_report_id, board_button_read());
   }
 }
@@ -266,41 +244,39 @@ void tud_hid_report_complete_cb(uint8_t instance, uint8_t const* report, uint16_
 // Invoked when received GET_REPORT control request
 // Application must fill buffer report's content and return its length.
 // Return zero will cause the stack to STALL request
-uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t* buffer, uint16_t reqlen)
-{
+uint16_t tud_hid_get_report_cb(
+    uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t *buffer, uint16_t reqlen) {
   // TODO not Implemented
-  (void) instance;
-  (void) report_id;
-  (void) report_type;
-  (void) buffer;
-  (void) reqlen;
+  (void)instance;
+  (void)report_id;
+  (void)report_type;
+  (void)buffer;
+  (void)reqlen;
 
   return 0;
 }
 
 // Invoked when received SET_REPORT control request or
 // received data on OUT endpoint ( Report ID = 0, Type = 0 )
-void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const* buffer, uint16_t bufsize)
-{
-  (void) instance;
+void tud_hid_set_report_cb(
+    uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t const *buffer, uint16_t bufsize) {
+  (void)instance;
 
-  if (report_type == HID_REPORT_TYPE_OUTPUT)
-  {
+  if (report_type == HID_REPORT_TYPE_OUTPUT) {
     // Set keyboard LED e.g Capslock, Numlock etc...
-    if (report_id == REPORT_ID_KEYBOARD)
-    {
+    if (report_id == REPORT_ID_KEYBOARD) {
       // bufsize should be (at least) 1
-      if ( bufsize < 1 ) return;
+      if (bufsize < 1) {
+        return;
+      }
 
       uint8_t const kbd_leds = buffer[0];
 
-      if (kbd_leds & KEYBOARD_LED_CAPSLOCK)
-      {
+      if ((kbd_leds & KEYBOARD_LED_CAPSLOCK) != 0u) {
         // Capslock On: disable blink, turn led on
         blink_interval_ms = 0;
         board_led_write(true);
-      }else
-      {
+      } else {
         // Caplocks Off: back to normal blink
         board_led_write(false);
         blink_interval_ms = BLINK_MOUNTED;
@@ -312,16 +288,19 @@ void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_
 //--------------------------------------------------------------------+
 // BLINKING TASK
 //--------------------------------------------------------------------+
-void led_blinking_task(void)
-{
-  static uint32_t start_ms = 0;
-  static bool led_state = false;
+void led_blinking_task(void) {
+  static uint32_t start_ms  = 0;
+  static bool     led_state = false;
 
   // blink is disabled
-  if (!blink_interval_ms) return;
+  if (0u == blink_interval_ms) {
+    return;
+  }
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (board_millis() - start_ms < blink_interval_ms) {
+    return; // not enough time
+  }
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/mtp/src/mtp_fs_example.c b/examples/device/mtp/src/mtp_fs_example.c
index b4772f146..1c287be4d 100644
--- a/examples/device/mtp/src/mtp_fs_example.c
+++ b/examples/device/mtp/src/mtp_fs_example.c
@@ -39,12 +39,15 @@
 #define DEV_PROP_FRIENDLY_NAME  "TinyUSB MTP"
 
 //------------- storage info -------------//
-#define STORAGE_DESCRIPTRION { 'd', 'i', 's', 'k', 0 }
+#define STORAGE_DESCRIPTION { 'd', 'i', 's', 'k', 0 }
 #define VOLUME_IDENTIFIER { 'v', 'o', 'l', 0 }
 
-typedef MTP_STORAGE_INFO_STRUCT(TU_ARRAY_SIZE((uint16_t[]) STORAGE_DESCRIPTRION),
-                                 TU_ARRAY_SIZE(((uint16_t[])VOLUME_IDENTIFIER))
-) storage_info_t;
+enum {
+  STORAGE_DESC_LEN = TU_ARRAY_SIZE((uint16_t[]) STORAGE_DESCRIPTION),
+  VOLUME_ID_LEN = TU_ARRAY_SIZE((uint16_t[])VOLUME_IDENTIFIER)
+};
+
+typedef MTP_STORAGE_INFO_STRUCT(STORAGE_DESC_LEN, VOLUME_ID_LEN) storage_info_t;
 
 storage_info_t storage_info = {
   #ifdef CFG_EXAMPLE_MTP_READONLY
@@ -60,7 +63,7 @@ storage_info_t storage_info = {
   .free_space_in_objects = 0, // calculated at runtime
   .storage_description = {
     .count = (TU_FIELD_SIZE(storage_info_t, storage_description)-1) / sizeof(uint16_t),
-    .utf16 = STORAGE_DESCRIPTRION
+    .utf16 = STORAGE_DESCRIPTION
   },
   .volume_identifier = {
     .count = (TU_FIELD_SIZE(storage_info_t, volume_identifier)-1) / sizeof(uint16_t),
@@ -320,9 +323,9 @@ int32_t tud_mtp_data_complete_cb(tud_mtp_cb_data_t* cb_data) {
         break;
       }
       // parameter is: storage id, parent handle, new handle
-      mtp_container_add_uint32(resp, SUPPORTED_STORAGE_ID);
-      mtp_container_add_uint32(resp, f->parent);
-      mtp_container_add_uint32(resp, send_obj_handle);
+      (void) mtp_container_add_uint32(resp, SUPPORTED_STORAGE_ID);
+      (void) mtp_container_add_uint32(resp, f->parent);
+      (void) mtp_container_add_uint32(resp, send_obj_handle);
       resp->header->code = MTP_RESP_OK;
       break;
     }
@@ -346,19 +349,22 @@ int32_t tud_mtp_response_complete_cb(tud_mtp_cb_data_t* cb_data) {
 //--------------------------------------------------------------------+
 static int32_t fs_get_device_info(tud_mtp_cb_data_t* cb_data) {
   // Device info is already prepared up to playback formats. Application only need to add string fields
+  int32_t resp_code = 0;
   mtp_container_info_t* io_container = &cb_data->io_container;
-  mtp_container_add_cstring(io_container, DEV_INFO_MANUFACTURER);
-  mtp_container_add_cstring(io_container, DEV_INFO_MODEL);
-  mtp_container_add_cstring(io_container, DEV_INFO_VERSION);
+  (void) mtp_container_add_cstring(io_container, DEV_INFO_MANUFACTURER);
+  (void) mtp_container_add_cstring(io_container, DEV_INFO_MODEL);
+  (void) mtp_container_add_cstring(io_container, DEV_INFO_VERSION);
 
   enum { MAX_SERIAL_NCHARS = 32 };
   uint16_t serial_utf16[MAX_SERIAL_NCHARS+1];
   size_t nchars = board_usb_get_serial(serial_utf16, MAX_SERIAL_NCHARS);
   serial_utf16[tu_min32(nchars, MAX_SERIAL_NCHARS)] = 0; // ensure null termination
-  mtp_container_add_string(io_container, serial_utf16);
+  (void) mtp_container_add_string(io_container, serial_utf16);
 
-  tud_mtp_data_send(io_container);
-  return 0;
+  if (!tud_mtp_data_send(io_container)) {
+    resp_code = MTP_RESP_DEVICE_BUSY;
+  }
+  return resp_code;
 }
 
 static int32_t fs_open_close_session(tud_mtp_cb_data_t* cb_data) {
@@ -380,7 +386,7 @@ static int32_t fs_open_close_session(tud_mtp_cb_data_t* cb_data) {
 static int32_t fs_get_storage_ids(tud_mtp_cb_data_t* cb_data) {
   mtp_container_info_t* io_container = &cb_data->io_container;
   uint32_t storage_ids [] = { SUPPORTED_STORAGE_ID };
-  mtp_container_add_auint32(io_container, 1, storage_ids);
+  (void) mtp_container_add_auint32(io_container, 1, storage_ids);
   tud_mtp_data_send(io_container);
   return 0;
 }
@@ -394,7 +400,7 @@ static int32_t fs_get_storage_info(tud_mtp_cb_data_t* cb_data) {
   storage_info.max_capacity_in_bytes = sizeof(README_TXT_CONTENT) + LOGO_LEN + FS_MAX_CAPACITY_BYTES;
   storage_info.free_space_in_objects = FS_MAX_FILE_COUNT - fs_get_file_count();
   storage_info.free_space_in_bytes = storage_info.free_space_in_objects ? FS_MAX_CAPACITY_BYTES : 0;
-  mtp_container_add_raw(io_container, &storage_info, sizeof(storage_info));
+  (void) mtp_container_add_raw(io_container, &storage_info, sizeof(storage_info));
   tud_mtp_data_send(io_container);
   return 0;
 }
@@ -408,14 +414,14 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
     // get describing dataset
     mtp_device_prop_desc_header_t device_prop_header;
     device_prop_header.device_property_code = dev_prop_code;
-    switch (dev_prop_code) {
+    switch (dev_prop_code) { //-V2520 //-V2659
       case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
         device_prop_header.datatype = MTP_DATA_TYPE_STR;
         device_prop_header.get_set = MTP_MODE_GET;
-        mtp_container_add_raw(io_container, &device_prop_header, sizeof(device_prop_header));
-        mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME); // factory
-        mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME); // current
-        mtp_container_add_uint8(io_container, 0); // no form
+        (void) mtp_container_add_raw(io_container, &device_prop_header, sizeof(device_prop_header));
+        (void) mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME); // factory
+        (void) mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME); // current
+        (void) mtp_container_add_uint8(io_container, 0); // no form
         tud_mtp_data_send(io_container);
         break;
 
@@ -424,9 +430,9 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
     }
   } else {
     // get value
-    switch (dev_prop_code) {
+    switch (dev_prop_code) { //-V2520 //-V2659
       case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
-        mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME);
+        (void) mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME);
         tud_mtp_data_send(io_container);
         break;
 
@@ -446,20 +452,20 @@ static int32_t fs_get_object_handles(tud_mtp_cb_data_t* cb_data) {
   const uint32_t parent_handle = command->params[2]; // folder handle, 0xFFFFFFFF is root
   (void)obj_format;
 
-  if (storage_id != 0xFFFFFFFF && storage_id != SUPPORTED_STORAGE_ID) {
+  if (storage_id != 0xFFFFFFFFu && storage_id != SUPPORTED_STORAGE_ID) {
     return MTP_RESP_INVALID_STORAGE_ID;
   }
 
   uint32_t handles[FS_MAX_FILE_COUNT] = { 0 };
-  uint32_t count = 0;
-  for (uint8_t i = 0; i < FS_MAX_FILE_COUNT; i++) {
+  uint32_t count = 0u;
+  for (uint8_t i = 0u; i < FS_MAX_FILE_COUNT; i++) {
     fs_file_t* f = &fs_objects[i];
     if (fs_file_exist(f) &&
-        (parent_handle == f->parent || (parent_handle == 0xFFFFFFFF && f->parent == 0))) {
-      handles[count++] = i + 1; // handle is index + 1
+        (parent_handle == f->parent || (parent_handle == 0xFFFFFFFFu && f->parent == 0u))) {
+      handles[count++] = (uint32_t) i + 1u; // handle is index + 1
     }
   }
-  mtp_container_add_auint32(io_container, count, handles);
+  (void) mtp_container_add_auint32(io_container, count, handles);
   tud_mtp_data_send(io_container);
 
   return 0;
@@ -490,11 +496,11 @@ static int32_t fs_get_object_info(tud_mtp_cb_data_t* cb_data) {
     .association_desc = 0,
     .sequence_number = 0
   };
-  mtp_container_add_raw(io_container, &obj_info_header, sizeof(obj_info_header));
-  mtp_container_add_string(io_container, f->name);
-  mtp_container_add_cstring(io_container, FS_FIXED_DATETIME);
-  mtp_container_add_cstring(io_container, FS_FIXED_DATETIME);
-  mtp_container_add_cstring(io_container, ""); // keywords, not used
+  (void) mtp_container_add_raw(io_container, &obj_info_header, sizeof(obj_info_header));
+  (void) mtp_container_add_string(io_container, f->name);
+  (void) mtp_container_add_cstring(io_container, FS_FIXED_DATETIME);
+  (void) mtp_container_add_cstring(io_container, FS_FIXED_DATETIME);
+  (void) mtp_container_add_cstring(io_container, ""); // keywords, not used
   tud_mtp_data_send(io_container);
 
   return 0;
@@ -512,7 +518,7 @@ static int32_t fs_get_object(tud_mtp_cb_data_t* cb_data) {
   if (cb_data->phase == MTP_PHASE_COMMAND) {
     // If file contents is larger than CFG_TUD_MTP_EP_BUFSIZE, data may only partially is added here
     // the rest will be sent in tud_mtp_data_more_cb
-    mtp_container_add_raw(io_container, f->data, f->size);
+    (void) mtp_container_add_raw(io_container, f->data, f->size);
     tud_mtp_data_send(io_container);
   } else if (cb_data->phase == MTP_PHASE_DATA) {
     // continue sending remaining data: file contents offset is xferred byte minus header size
@@ -522,6 +528,8 @@ static int32_t fs_get_object(tud_mtp_cb_data_t* cb_data) {
       memcpy(io_container->payload, f->data + offset, xact_len);
       tud_mtp_data_send(io_container);
     }
+  } else {
+    // nothing to do
   }
 
   return 0;
@@ -537,21 +545,21 @@ static int32_t fs_send_object_info(tud_mtp_cb_data_t* cb_data) {
   if (!is_session_opened) {
     return MTP_RESP_SESSION_NOT_OPEN;
   }
-  if (storage_id != 0xFFFFFFFF && storage_id != SUPPORTED_STORAGE_ID) {
+  if (storage_id != 0xFFFFFFFFu && storage_id != SUPPORTED_STORAGE_ID) {
     return MTP_RESP_INVALID_STORAGE_ID;
   }
 
   if (cb_data->phase == MTP_PHASE_COMMAND) {
-    tud_mtp_data_receive(io_container);
+    (void) tud_mtp_data_receive(io_container);
   } else if (cb_data->phase == MTP_PHASE_DATA) {
     mtp_object_info_header_t* obj_info = (mtp_object_info_header_t*) io_container->payload;
     if (obj_info->storage_id != 0 && obj_info->storage_id != SUPPORTED_STORAGE_ID) {
       return MTP_RESP_INVALID_STORAGE_ID;
     }
 
-    if (obj_info->parent_object) {
+    if (obj_info->parent_object != 0) { // not root
       fs_file_t* parent = fs_get_file(obj_info->parent_object);
-      if (parent == NULL || !parent->association_type) {
+      if (parent == NULL || 0u == parent->association_type) {
         return MTP_RESP_INVALID_PARENT_OBJECT;
       }
     }
@@ -575,8 +583,10 @@ static int32_t fs_send_object_info(tud_mtp_cb_data_t* cb_data) {
     f->size = obj_info->object_compressed_size;
     f->data = f_buf;
     uint8_t* buf = io_container->payload + sizeof(mtp_object_info_header_t);
-    mtp_container_get_string(buf, f->name);
+    (void) mtp_container_get_string(buf, f->name);
     // ignore date created/modified/keywords
+  } else {
+    // nothing to do
   }
 
   return 0;
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 16c0d48d7..c2e7bf8f2 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -301,10 +301,10 @@ function(family_configure_common TARGET RTOS)
         COMMAND_EXPAND_LISTS
         )
       # generate C-STAT report
-#      add_custom_command(TARGET ${TARGET} POST_BUILD
-#        COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
-#        COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/index.html
-#        )
+      add_custom_command(TARGET ${TARGET} POST_BUILD
+        COMMAND mkdir -p ${CMAKE_CURRENT_BINARY_DIR}/cstat_report
+        COMMAND ireport --db=${CMAKE_BINARY_DIR}/cstat.db --full --project ${TARGET} --output ${CMAKE_CURRENT_BINARY_DIR}/cstat_report/index.html
+        )
     endif ()
   endif ()
 
diff --git a/src/class/mtp/mtp.h b/src/class/mtp/mtp.h
index 40b6dd8b0..236cf98e0 100644
--- a/src/class/mtp/mtp.h
+++ b/src/class/mtp/mtp.h
@@ -799,18 +799,18 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_array(mtp_contain
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_string(mtp_container_info_t* p_container, uint16_t* utf16) {
   uint8_t count = 0;
-  while (utf16[count]) {
+  while (utf16[count] != 0u) {
     count++;
   }
-  const uint32_t added_len = 1u + 2u * count;
+  const uint32_t added_len = 1u + (uint32_t) count * 2u;
   TU_ASSERT(p_container->header->len + added_len < CFG_TUD_MTP_EP_BUFSIZE, 0);
   uint8_t* buf = p_container->payload + p_container->header->len - sizeof(mtp_container_header_t);
 
   *buf++ = count;
   p_container->header->len++;
 
-  memcpy(buf, utf16, 2 * count);
-  p_container->header->len += 2 * count;
+  memcpy(buf, utf16, 2u * (uint32_t) count);
+  p_container->header->len += 2u * count;
 
   return added_len;
 }
@@ -824,7 +824,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_cstring(mtp_conta
     // empty string (null only): single zero byte
     *buf = 0;
     p_container->header->len++;
-    return 1;
+    return 1u;
   } else {
     *buf++ = len;
     p_container->header->len++;
@@ -875,8 +875,8 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_add_auint32(mtp_conta
 //
 //--------------------------------------------------------------------+
 TU_ATTR_ALWAYS_INLINE static inline uint32_t mtp_container_get_string(uint8_t* buf, uint16_t utf16[]) {
-  uint8_t nchars = *buf++;
-  memcpy(utf16, buf, 2 * nchars);
+  size_t nchars = *buf++;
+  memcpy(utf16, buf, 2u * nchars);
   return 1u + 2u * nchars;
 }
 
diff --git a/src/class/mtp/mtp_device.h b/src/class/mtp/mtp_device.h
index 397fbbbce..a33f1dc08 100644
--- a/src/class/mtp/mtp_device.h
+++ b/src/class/mtp/mtp_device.h
@@ -53,12 +53,14 @@ typedef struct {
 typedef struct {
   uint8_t idx;
   uint8_t stage; // control stage
-  uint32_t session_id;
 
-  const tusb_control_request_t* request;
   // buffer for data stage
-  uint8_t* buf;
   uint16_t bufsize;
+  uint8_t* buf;
+
+  const tusb_control_request_t* request;
+
+  uint32_t session_id;
 } tud_mtp_request_cb_data_t;
 
 // Number of supported operations, events, device properties, capture formats, playback formats
@@ -78,7 +80,7 @@ typedef struct {
     /* string fields will be added using append function */ \
   }
 
-typedef MTP_DEVICE_INFO_STRUCT(
+typedef MTP_DEVICE_INFO_STRUCT( //-V2586 [MISRA-C-18.7] Flexible array members should not be declared
   sizeof(CFG_TUD_MTP_DEVICEINFO_EXTENSIONS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_OPERATIONS),
   TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_EVENTS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_SUPPORTED_DEVICE_PROPERTIES),
   TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_CAPTURE_FORMATS), TU_ARGS_NUM(CFG_TUD_MTP_DEVICEINFO_PLAYBACK_FORMATS)
diff --git a/src/class/video/video.h b/src/class/video/video.h
index f348e187b..5bdf4b840 100644
--- a/src/class/video/video.h
+++ b/src/class/video/video.h
@@ -219,11 +219,11 @@ typedef enum {
     uint8_t  baInterfaceNr[_nitf]; \
   }
 
-typedef tusb_desc_video_control_header_nitf_t()  tusb_desc_video_control_header_t;
-typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t;
-typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t;
-typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t;
-typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t;
+typedef tusb_desc_video_control_header_nitf_t()  tusb_desc_video_control_header_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(1) tusb_desc_video_control_header_1itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(2) tusb_desc_video_control_header_2itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(3) tusb_desc_video_control_header_3itf_t; //-V2586 incorrectly detected as flexible array
+typedef tusb_desc_video_control_header_nitf_t(4) tusb_desc_video_control_header_4itf_t; //-V2586 incorrectly detected as flexible array
 
 typedef struct TU_ATTR_PACKED {
   uint8_t  bLength;
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 5f659eb95..7aa42a2d7 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -236,7 +236,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t tu_round_up(uint32_t v, uint32_t f)
 // TODO use clz TODO remove
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_log2(uint32_t value) {
   uint8_t result = 0;
-  while (value >>= 1) {
+  while ((value >>= 1u) != 0u) {
     result++;
   }
   return result;
@@ -355,7 +355,10 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_subtype(void const* desc) {
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t tu_desc_in_bounds(uint8_t const* p_desc, uint8_t const* desc_end) {
-  return (p_desc < desc_end) && (tu_desc_next(p_desc) <= desc_end);
+  if (p_desc >= desc_end) {
+    return false;
+  }
+  return tu_desc_next(p_desc) <= desc_end;
 }
 
 // find descriptor that match byte1 (type)
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index df4034098..a7bf3e959 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -119,7 +119,9 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
 
   // not found return the key value in hex
   static char not_found[11];
-  snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key);
+  if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long) key) <= 0) {
+    not_found[0] = 0;
+  }
   return not_found;
 }
 
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index c9700fd9d..2c2ff76b7 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -93,7 +93,7 @@ static bool data_stage_xact(uint8_t rhport) {
 
   if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
     ep_addr = EDPT_CTRL_IN;
-    if (xact_len) {
+    if (0u != xact_len) {
       TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_SIZE, _ctrl_xfer.buffer, xact_len));
     }
   }
@@ -159,7 +159,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
     // invoke optional dcd hook if available
     dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request);
 
-    if (_ctrl_xfer.complete_cb) {
+    if (NULL != _ctrl_xfer.complete_cb) {
       // TODO refactor with usbd_driver_print_control_complete_name
       _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_ACK, &_ctrl_xfer.request);
     }
@@ -185,7 +185,7 @@ bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result,
 
     // invoke complete callback if set
     // callback can still stall control in status phase e.g out data does not make sense
-    if (_ctrl_xfer.complete_cb) {
+    if (NULL != _ctrl_xfer.complete_cb) {
       #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
       usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
       #endif
diff --git a/src/device/usbd_pvt.h b/src/device/usbd_pvt.h
index 2894d3023..6e220129a 100644
--- a/src/device/usbd_pvt.h
+++ b/src/device/usbd_pvt.h
@@ -125,14 +125,9 @@ bool usbd_edpt_ready(uint8_t rhport, uint8_t ep_addr) {
 // Enable SOF interrupt
 void usbd_sof_enable(uint8_t rhport, sof_consumer_t consumer, bool en);
 
-/*------------------------------------------------------------------*/
-/* Helper
- *------------------------------------------------------------------*/
-
 bool usbd_open_edpt_pair(uint8_t rhport, uint8_t const* p_desc, uint8_t ep_count, uint8_t xfer_type, uint8_t* ep_out, uint8_t* ep_in);
 void usbd_defer_func(osal_task_func_t func, void *param, bool in_isr);
 
-
 #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
 void usbd_driver_print_control_complete_name(usbd_control_xfer_cb_t callback);
 #endif
diff --git a/src/tusb.c b/src/tusb.c
index d52c156ab..be67eead2 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -599,7 +599,9 @@ void tu_print_mem(void const* buf, uint32_t count, uint8_t indent) {
   if (remain) {
     for (uint32_t i = 0; i < 16 - remain; i++) {
       tu_printf(" ");
-      for (int j = 0; j < 2 * size; j++) tu_printf(" ");
+      for (int j = 0; j < 2 * size; j++) {
+        tu_printf(" ");
+      }
     }
   }
 
-- 
cgit v1.3.1


From 0172f40e66b3518e6593f5aa89afb9b0116fa75c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Nov 2025 11:39:10 +0700
Subject: update espressif cmake

---
 examples/host/cdc_msc_hid_freertos/only.txt        |  2 +-
 examples/host/device_info/only.txt                 |  4 +--
 .../components/tinyusb_src/CMakeLists.txt          | 41 ++++------------------
 hw/bsp/family_support.cmake                        |  6 ++--
 src/CMakeLists.txt                                 | 13 +++++--
 5 files changed, 22 insertions(+), 44 deletions(-)

(limited to 'hw')

diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index 576271aff..ef0a1ac96 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -1,4 +1,3 @@
-mcu:ESP32P4
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
@@ -15,5 +14,6 @@ mcu:STM32F7
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
+family:espressif
 family:samd21
 family:samd5x_e5x
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 133a7c9a0..61a08f68d 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -1,7 +1,4 @@
 mcu:CH32V20X
-mcu:ESP32S2
-mcu:ESP32S3
-mcu:ESP32P4
 mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
@@ -21,5 +18,6 @@ mcu:STM32F7
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
+family:espressif
 family:samd21
 family:samd5x_e5x
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index beabcad9c..c011b926e 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -1,12 +1,12 @@
 idf_build_get_property(target IDF_TARGET)
+include(CMakePrintHelpers)
 
-set(srcs)
-set(includes_public)
-set(compile_options)
-set(tusb_src "${CMAKE_CURRENT_SOURCE_DIR}/../../../../../src")
+set(tusb_src ${CMAKE_CURRENT_LIST_DIR}/../../../../../src)
+get_filename_component(tusb_src ${tusb_src} ABSOLUTE)
+include(${tusb_src}/CMakeLists.txt)
 
 string(TOUPPER OPT_MCU_${target} tusb_mcu)
-list(APPEND compile_definitions
+set(compile_definitions
   CFG_TUSB_MCU=${tusb_mcu}
   CFG_TUSB_OS=OPT_OS_FREERTOS
   BOARD_TUD_RHPORT=${RHPORT_DEVICE}
@@ -14,7 +14,7 @@ list(APPEND compile_definitions
   BOARD_TUH_RHPORT=${RHPORT_HOST}
   BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
   )
-
+cmake_print_variables(compile_definitions)
 if (target STREQUAL esp32p4)
   # P4 change alignment to 64 (DCache line size) for possible DMA configuration
   list(APPEND compile_definitions
@@ -23,36 +23,11 @@ if (target STREQUAL esp32p4)
     )
 endif ()
 
+tinyusb_sources_get(srcs)
 list(APPEND srcs
-  # common
-  ${tusb_src}/tusb.c
-  ${tusb_src}/common/tusb_fifo.c
-  # device
-  ${tusb_src}/device/usbd.c
-  ${tusb_src}/device/usbd_control.c
-  ${tusb_src}/class/audio/audio_device.c
-  ${tusb_src}/class/cdc/cdc_device.c
-  ${tusb_src}/class/dfu/dfu_device.c
-  ${tusb_src}/class/dfu/dfu_rt_device.c
-  ${tusb_src}/class/hid/hid_device.c
-  ${tusb_src}/class/midi/midi_device.c
-  ${tusb_src}/class/msc/msc_device.c
-  ${tusb_src}/class/mtp/mtp_device.c
-  ${tusb_src}/class/net/ecm_rndis_device.c
-  ${tusb_src}/class/net/ncm_device.c
-  ${tusb_src}/class/usbtmc/usbtmc_device.c
-  ${tusb_src}/class/vendor/vendor_device.c
-  ${tusb_src}/class/video/video_device.c
   ${tusb_src}/portable/synopsys/dwc2/dcd_dwc2.c
   ${tusb_src}/portable/synopsys/dwc2/hcd_dwc2.c
   ${tusb_src}/portable/synopsys/dwc2/dwc2_common.c
-  # host
-  ${tusb_src}/host/usbh.c
-  ${tusb_src}/host/hub.c
-  ${tusb_src}/class/cdc/cdc_host.c
-  ${tusb_src}/class/hid/hid_host.c
-  ${tusb_src}/class/msc/msc_host.c
-  ${tusb_src}/class/vendor/vendor_host.c
   )
 
 # use max3421 as host controller
@@ -74,7 +49,6 @@ if(DEFINED CFLAGS_CLI)
   list(APPEND compile_definitions ${CFLAGS_CLI})
 endif()
 
-
 idf_component_register(SRCS ${srcs}
   INCLUDE_DIRS ${tusb_src}
   REQUIRES src
@@ -82,4 +56,3 @@ idf_component_register(SRCS ${srcs}
   )
 
 target_compile_definitions(${COMPONENT_LIB} PUBLIC ${compile_definitions})
-target_compile_options(${COMPONENT_LIB} PRIVATE -Wno-error=format)
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index c2e7bf8f2..ad68957df 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -12,7 +12,7 @@ set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
 
 #-------------------------------------------------------------
 # Toolchain
-# Can be changed via -DTOOLCHAIN=gcc|iar or -DCMAKE_C_COMPILER=
+# Can be changed via -DTOOLCHAIN=gcc|iar or -DCMAKE_C_COMPILER= or ENV{CC}=
 #-------------------------------------------------------------
 function(detect_compiler COMPILER_PATH RESULT)
   string(FIND ${COMPILER_PATH} "iccarm" IS_IAR)
@@ -319,8 +319,8 @@ endfunction()
 
 # Add tinyusb to target
 function(family_add_tinyusb TARGET OPT_MCU)
-  # tinyusb's CMakeList.txt
-  add_subdirectory(${TOP}/src ${CMAKE_CURRENT_BINARY_DIR}/tinyusb)
+  # tinyusb's CMakeLists.txt
+  include(${TOP}/src/CMakeLists.txt)
 
   # Add TinyUSB sources, include and common define
   tinyusb_target_add(${TARGET})
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 951683104..48dc75e50 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -1,8 +1,8 @@
 cmake_minimum_required(VERSION 3.20)
 
-# Add tinyusb to a existing target, DCD and HCD drivers are not included
-function(tinyusb_target_add TARGET)
-  target_sources(${TARGET} PRIVATE
+# Get TinyUSB sources. Note: DCD and HCD drivers are not included
+function(tinyusb_sources_get OUTPUT_VAR)
+  set(${OUTPUT_VAR}
     # common
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/tusb.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
@@ -32,7 +32,14 @@ function(tinyusb_target_add TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
     # typec
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/typec/usbc.c
+    PARENT_SCOPE
     )
+endfunction()
+
+# Add tinyusb to a existing target
+function(tinyusb_target_add TARGET)
+  tinyusb_sources_get(TINYUSB_SRC)
+  target_sources(${TARGET} PRIVATE ${TINYUSB_SRC})
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     # TODO for net driver, should be removed/changed
-- 
cgit v1.3.1


From cd90d94e7c67aff189becee8815633ac1549a1d8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 6 Nov 2025 18:26:04 +0700
Subject: make host info to devcie cdc to work with freertos/noos

---
 .PVS-Studio/.pvsconfig                             |   6 +-
 examples/device/video_capture/src/main.c           |  18 ++-
 examples/device/video_capture_2ch/src/main.c       |   6 +-
 .../dual/host_info_to_device_cdc/CMakeLists.txt    |   7 +-
 examples/dual/host_info_to_device_cdc/only.txt     |   1 +
 .../host_info_to_device_cdc/src/CMakeLists.txt     |   4 +
 examples/dual/host_info_to_device_cdc/src/main.c   | 126 +++++++++++++++++++--
 .../components/tinyusb_src/CMakeLists.txt          |   2 +-
 8 files changed, 146 insertions(+), 24 deletions(-)
 create mode 100644 examples/dual/host_info_to_device_cdc/src/CMakeLists.txt

(limited to 'hw')

diff --git a/.PVS-Studio/.pvsconfig b/.PVS-Studio/.pvsconfig
index 2e231c939..2cc60722a 100644
--- a/.PVS-Studio/.pvsconfig
+++ b/.PVS-Studio/.pvsconfig
@@ -1,10 +1,14 @@
 //V_EXCLUDE_PATH */iar/cxarm*
-//V_EXCLUDE_PATH */pico-sdk/*
+//V_EXCLUDE_PATH */pico-sdk/
+//V_EXCLUDE_PATH */esp-idf/
+//V_EXCLUDE_PATH */hw/bsp/espressif/components/
+//V_EXCLUDE_PATH */hw/mcu/
 
 //-V::2506 MISRA. A function should have a single point of exit at the end.
 //-V::2514 MISRA. Unions should not be used.
 //-V:memcpy:2547 [MISRA-C-17.7] The return value of non-void function 'memcpy' should be used.
 //-V:printf:2547 [MISRA-C-17.7] The return value of non-void function 'printf' should be used.
+//-V::2584::{gintsts} dwc2
 //-V::2600 [MISRA-C-21.6] The function with the 'printf' name should not be used.
 //+V2614 DISABLE_LENGHT_LIMIT_CHECK:YES
 //-V:memcpy:2628 Pointer arguments to the 'memcpy' function should be pointers to qualified or unqualified versions of compatible types.
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index 29656e944..adcfb9f95 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -53,7 +53,7 @@ void usb_device_task(void *param);
 void video_task(void* param);
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
-void freertos_init_task(void);
+void freertos_init(void);
 #endif
 
 
@@ -65,7 +65,7 @@ int main(void) {
 
   // If using FreeRTOS: create blinky, tinyusb device, video task
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
-  freertos_init_task();
+  freertos_init();
 #else
   // init device stack on configured roothub port
   tusb_rhport_init_t dev_init = {
@@ -211,8 +211,12 @@ static void video_send_frame(void) {
   }
 
   unsigned cur = board_millis();
-  if (cur - start_ms < interval_ms) return; // not enough time
-  if (tx_busy) return;
+  if (cur - start_ms < interval_ms) {
+    return; // not enough time
+  }
+  if (tx_busy) {
+    return;
+  }
   start_ms += interval_ms;
   tx_busy = 1;
 
@@ -273,7 +277,9 @@ void led_blinking_task(void* param) {
     #if CFG_TUSB_OS == OPT_OS_FREERTOS
     vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS);
     #else
-    if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+    if (board_millis() - start_ms < blink_interval_ms) {
+      return; // not enough time
+    }
     #endif
 
     start_ms += blink_interval_ms;
@@ -336,7 +342,7 @@ void usb_device_task(void *param) {
   }
 }
 
-void freertos_init_task(void) {
+void freertos_init(void) {
   #if configSUPPORT_STATIC_ALLOCATION
   xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef);
   xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef);
diff --git a/examples/device/video_capture_2ch/src/main.c b/examples/device/video_capture_2ch/src/main.c
index a63efa82d..79b149f2b 100644
--- a/examples/device/video_capture_2ch/src/main.c
+++ b/examples/device/video_capture_2ch/src/main.c
@@ -53,7 +53,7 @@ void usb_device_task(void *param);
 void video_task(void* param);
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
-void freertos_init_task(void);
+void freertos_init(void);
 #endif
 
 
@@ -65,7 +65,7 @@ int main(void) {
 
   // If using FreeRTOS: create blinky, tinyusb device, video task
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
-  freertos_init_task();
+  freertos_init();
 #else
   // init device stack on configured roothub port
   tusb_rhport_init_t dev_init = {
@@ -343,7 +343,7 @@ void usb_device_task(void *param) {
   }
 }
 
-void freertos_init_task(void) {
+void freertos_init(void) {
   #if configSUPPORT_STATIC_ALLOCATION
   xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef);
   xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef);
diff --git a/examples/dual/host_info_to_device_cdc/CMakeLists.txt b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
index 6ae5b5766..ad3c5ddf0 100644
--- a/examples/dual/host_info_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
@@ -10,6 +10,11 @@ project(${PROJECT} C CXX ASM)
 # Checks this example is valid for the family and initializes the project
 family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
 
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
 add_executable(${PROJECT})
 
 # Example source
@@ -25,7 +30,7 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_dual_usb_example(${PROJECT} noos)
+family_configure_dual_usb_example(${PROJECT} ${RTOS})
 
 # due to warnings from Pico-PIO-USB
 if (FAMILY STREQUAL rp2040)
diff --git a/examples/dual/host_info_to_device_cdc/only.txt b/examples/dual/host_info_to_device_cdc/only.txt
index 35f896f1e..4431065ba 100644
--- a/examples/dual/host_info_to_device_cdc/only.txt
+++ b/examples/dual/host_info_to_device_cdc/only.txt
@@ -8,3 +8,4 @@ mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
+mcu:ESP32P4
diff --git a/examples/dual/host_info_to_device_cdc/src/CMakeLists.txt b/examples/dual/host_info_to_device_cdc/src/CMakeLists.txt
new file mode 100644
index 000000000..cef2b46ee
--- /dev/null
+++ b/examples/dual/host_info_to_device_cdc/src/CMakeLists.txt
@@ -0,0 +1,4 @@
+# This file is for ESP-IDF only
+idf_component_register(SRCS "main.c" "usb_descriptors.c"
+                    INCLUDE_DIRS "."
+                    REQUIRES boards tinyusb_src)
diff --git a/examples/dual/host_info_to_device_cdc/src/main.c b/examples/dual/host_info_to_device_cdc/src/main.c
index 5f3964196..1486bc83e 100644
--- a/examples/dual/host_info_to_device_cdc/src/main.c
+++ b/examples/dual/host_info_to_device_cdc/src/main.c
@@ -75,8 +75,12 @@ static tusb_desc_device_t descriptor_device[CFG_TUH_DEVICE_MAX+1];
 static void print_utf16(uint16_t *temp_buf, size_t buf_len);
 static void print_device_info(uint8_t daddr, const tusb_desc_device_t* desc_device);
 
-void led_blinking_task(void);
-void cdc_task(void);
+static void led_blinking_task(void);
+static void cdc_task(void);
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+static void freertos_init(void);
+#endif
 
 #define cdc_printf(...)                                           \
   do {                                                            \
@@ -94,37 +98,86 @@ void cdc_task(void);
     }                                                             \
   } while(0)
 
-/*------------- MAIN -------------*/
-int main(void) {
-  board_init();
-
-  printf("TinyUSB Host Information -> Device CDC Example\r\n");
 
+static void usb_device_init(void) {
   // init device and host stack on configured roothub port
   tusb_rhport_init_t dev_init = {
     .role = TUSB_ROLE_DEVICE,
     .speed = TUSB_SPEED_AUTO
   };
   tusb_init(BOARD_TUD_RHPORT, &dev_init);
+  board_init_after_tusb();
+}
 
+static void usb_host_init(void) {
+  // init host stack on configured roothub port
   tusb_rhport_init_t host_init = {
     .role = TUSB_ROLE_HOST,
     .speed = TUSB_SPEED_AUTO
   };
   tusb_init(BOARD_TUH_RHPORT, &host_init);
-
   board_init_after_tusb();
+}
+
+//--------------------------------------------------------------------+
+// Main
+//--------------------------------------------------------------------+
+static void main_task(void* param) {
+  (void) param;
 
   while (1) {
-    tud_task(); // tinyusb device task
-    tuh_task(); // tinyusb host task
     cdc_task();
     led_blinking_task();
+
+    // preempted RTOS run device/host stack in its own task
+#if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO
+    tud_task(); // tinyusb device task
+    tuh_task(); // tinyusb host task
+#endif
   }
+}
+
+int main(void) {
+  board_init();
+
+#if CFG_TUSB_OS == OPT_OS_NONE || CFG_TUSB_OS == OPT_OS_PICO
+  printf("TinyUSB Host Information -> Device CDC Example\r\n");
+
+  usb_device_init();
+  usb_host_init();
+
+  main_task(NULL);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  freertos_init(); // create RTOS tasks for device, host stack and main_task()
+#else
+  #error RTOS not supported
+#endif
 
   return 0;
 }
 
+#if CFG_TUSB_OS != OPT_OS_NONE && CFG_TUSB_OS != OPT_OS_PICO
+// USB Device Driver task for RTOS
+static void usb_device_task(void *param) {
+  (void) param;
+  usb_device_init();
+  while (1) {
+    // put this thread to waiting state until there is new events
+    tud_task();
+  }
+}
+
+static void usb_host_task(void *param) {
+  (void) param;
+  usb_host_init();
+  while (1) {
+    // put this thread to waiting state until there is new events
+    tuh_task();
+  }
+}
+#endif
+
+
 //--------------------------------------------------------------------+
 // Device CDC
 //--------------------------------------------------------------------+
@@ -156,7 +209,7 @@ void cdc_task(void) {
   if (!tud_cdc_connected()) {
     // delay a bit otherwise we can outpace host's terminal. Linux will set LineState (DTR) then Line Coding.
     // If we send data before Linux's terminal set Line Coding, it can be ignored --> missing data with hardware test loop
-    board_delay(20);
+    tusb_time_delay_ms_api(20);
     return;
   }
 
@@ -259,7 +312,6 @@ void led_blinking_task(void) {
 //--------------------------------------------------------------------+
 // String Descriptor Helper
 //--------------------------------------------------------------------+
-
 static void _convert_utf16le_to_utf8(const uint16_t *utf16, size_t utf16_len, uint8_t *utf8, size_t utf8_len) {
   // TODO: Check for runover.
   (void)utf8_len;
@@ -310,3 +362,53 @@ static void print_utf16(uint16_t *temp_buf, size_t buf_len) {
 
   cdc_printf("%s", (char*) temp_buf);
 }
+
+//--------------------------------------------------------------------+
+// FreeRTOS
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+
+#ifdef ESP_PLATFORM
+  #define USBD_STACK_SIZE     4096
+  #define USBH_STACK_SIZE     4096
+  void app_main(void) {
+    main();
+  }
+#else
+  // Increase stack size when debug log is enabled
+  #define USBD_STACK_SIZE    (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 4 : 2))
+  #define USBH_STACK_SIZE    (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 4 : 2))
+#endif
+
+#define MAIN_STACK_SIZE    (configMINIMAL_STACK_SIZE*4)
+
+// static task
+#if configSUPPORT_STATIC_ALLOCATION
+StackType_t main_stack[MAIN_STACK_SIZE];
+StaticTask_t main_taskdef;
+
+StackType_t  usb_device_stack[USBD_STACK_SIZE];
+StaticTask_t usb_device_taskdef;
+
+StackType_t  usb_host_stack[USBH_STACK_SIZE];
+StaticTask_t usb_host_taskdef;
+#endif
+
+void freertos_init(void) {
+  #if configSUPPORT_STATIC_ALLOCATION
+  xTaskCreateStatic(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_device_stack, &usb_device_taskdef);
+  xTaskCreateStatic(usb_host_task, "usbh", USBH_STACK_SIZE, NULL, configMAX_PRIORITIES-1, usb_host_stack, &usb_host_taskdef);
+  xTaskCreateStatic(main_task, "main", MAIN_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, main_stack, &main_taskdef);
+  #else
+  xTaskCreate(usb_device_task, "usbd", USBD_STACK_SIZE, NULL, configMAX_PRIORITIES - 1, NULL);
+  xTaskCreate(usb_host_task, "usbh", USBH_STACK_SZE, NULL, configMAX_PRIORITIES - 1, NULL);
+  xTaskCreate(main_task, "main", MAIN_STACK_SZIE, NULL, configMAX_PRIORITIES - 2, NULL);
+  #endif
+
+  // only start scheduler for non-espressif mcu
+  #ifndef ESP_PLATFORM
+  vTaskStartScheduler();
+  #endif
+}
+
+#endif
diff --git a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
index c011b926e..2f529dd68 100644
--- a/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
+++ b/hw/bsp/espressif/components/tinyusb_src/CMakeLists.txt
@@ -14,7 +14,7 @@ set(compile_definitions
   BOARD_TUH_RHPORT=${RHPORT_HOST}
   BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
   )
-cmake_print_variables(compile_definitions)
+
 if (target STREQUAL esp32p4)
   # P4 change alignment to 64 (DCache line size) for possible DMA configuration
   list(APPEND compile_definitions
-- 
cgit v1.3.1


From 652342b57b129a79e0df152377d18096e4a0fed5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 7 Nov 2025 14:04:58 +0700
Subject: fix more alerts found by pvs-studio

---
 .PVS-Studio/.pvsconfig                             |  13 +-
 .clang-format                                      |   5 +-
 .github/copilot-instructions.md                    |  24 ++
 examples/device/mtp/src/mtp_fs_example.c           |   4 +-
 .../net_lwip_webserver/src/usb_descriptors.c       | 249 +++++++++++----------
 hw/bsp/imxrt/family.cmake                          |   3 +-
 hw/bsp/rp2040/family.c                             |   4 +-
 src/class/cdc/cdc_device.c                         |  21 +-
 src/class/cdc/cdc_device.h                         |  13 +-
 src/class/msc/msc_device.c                         |  79 ++++---
 src/class/msc/msc_host.c                           |  22 +-
 src/common/tusb_debug.h                            |  14 +-
 src/device/usbd.c                                  |  10 +-
 src/host/hcd.h                                     |   2 +-
 src/host/usbh.c                                    | 112 ++++-----
 src/osal/osal_pico.h                               |   5 +-
 16 files changed, 317 insertions(+), 263 deletions(-)

(limited to 'hw')

diff --git a/.PVS-Studio/.pvsconfig b/.PVS-Studio/.pvsconfig
index 2cc60722a..d8654b077 100644
--- a/.PVS-Studio/.pvsconfig
+++ b/.PVS-Studio/.pvsconfig
@@ -1,14 +1,17 @@
 //V_EXCLUDE_PATH */iar/cxarm*
-//V_EXCLUDE_PATH */pico-sdk/
-//V_EXCLUDE_PATH */esp-idf/
-//V_EXCLUDE_PATH */hw/bsp/espressif/components/
-//V_EXCLUDE_PATH */hw/mcu/
+//V_EXCLUDE_PATH */pico-sdk/*
+//V_EXCLUDE_PATH */esp-idf/*
+//V_EXCLUDE_PATH */hw/mcu/*
+//V_EXCLUDE_PATH */hw/bsp/espressif/components/*
+//V_EXCLUDE_PATH */lib/*
 
 //-V::2506 MISRA. A function should have a single point of exit at the end.
 //-V::2514 MISRA. Unions should not be used.
+//-V::2520 [MISRA-C-16.3] Every switch-clause should be terminated by an unconditional 'break' statement
 //-V:memcpy:2547 [MISRA-C-17.7] The return value of non-void function 'memcpy' should be used.
-//-V:printf:2547 [MISRA-C-17.7] The return value of non-void function 'printf' should be used.
+//-V:memmove:2547 [MISRA-C-17.7] The return value of non-void function 'memmove' should be used.
 //-V::2584::{gintsts} dwc2
 //-V::2600 [MISRA-C-21.6] The function with the 'printf' name should not be used.
 //+V2614 DISABLE_LENGHT_LIMIT_CHECK:YES
 //-V:memcpy:2628 Pointer arguments to the 'memcpy' function should be pointers to qualified or unqualified versions of compatible types.
+//-V::2659 [MISRA-C-16.1] Switch statements should be well-formed. Every switch-clause should be terminated by an unconditional 'break' statement
diff --git a/.clang-format b/.clang-format
index 79a160a8d..c7d769172 100644
--- a/.clang-format
+++ b/.clang-format
@@ -33,7 +33,8 @@ AllowAllConstructorInitializersOnNextLine: false
 AllowAllParametersOfDeclarationOnNextLine: false
 AllowShortBlocksOnASingleLine: Empty
 AllowShortCaseExpressionOnASingleLine: true
-AllowShortCaseLabelsOnASingleLine: true
+AllowShortCaseLabelsOnASingleLine: false
+AllowShortEnumsOnASingleLine: false
 AllowShortFunctionsOnASingleLine: None
 AllowShortIfStatementsOnASingleLine: Never
 AlwaysBreakTemplateDeclarations: Yes
@@ -76,6 +77,8 @@ MacroBlockBegin: ''
 MacroBlockEnd: ''
 MaxEmptyLinesToKeep: 2
 NamespaceIndentation: All
+QualifierAlignment: Custom
+QualifierOrder: ['static', 'const', 'volatile', 'restrict', 'type']
 ReflowComments: false
 SpaceAfterTemplateKeyword: false
 SpaceBeforeRangeBasedForLoopColon: false
diff --git a/.github/copilot-instructions.md b/.github/copilot-instructions.md
index 9982583cd..9f9ab7e72 100644
--- a/.github/copilot-instructions.md
+++ b/.github/copilot-instructions.md
@@ -88,6 +88,30 @@ python3 tools/build.py -b BOARD_NAME
 - Check spelling: `pip install codespell && codespell` (uses `.codespellrc` config)
 - Pre-commit hooks validate unit tests and code quality automatically
 
+### Static Analysis with PVS-Studio
+- **Analyze whole project**:
+  ```bash
+  pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
+  ```
+- **Analyze specific source files**:
+  ```bash
+  pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -S path/to/file.c -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
+  ```
+- **Multiple specific files**:
+  ```bash
+  pvs-studio-analyzer analyze -f examples/cmake-build-raspberry_pi_pico/compile_commands.json -R .PVS-Studio/.pvsconfig -S src/file1.c -S src/file2.c -o pvs-report.log -j12 --dump-files --misra-cpp-version 2008 --misra-c-version 2023 --use-old-parser
+  ```
+- Requires `compile_commands.json` in the build directory (generated by CMake with `-DCMAKE_EXPORT_COMPILE_COMMANDS=ON`)
+- Use `-f` option to specify path to `compile_commands.json`
+- Use `-R .PVS-Studio/.pvsconfig` to specify rule configuration file
+- Use `-j12` for parallel analysis with 12 threads
+- `--dump-files` saves preprocessed files for debugging
+- `--misra-c-version 2023` enables MISRA C:2023 checks
+- `--misra-cpp-version 2008` enables MISRA C++:2008 checks
+- `--use-old-parser` uses legacy parser for compatibility
+- Analysis takes ~10-30 seconds depending on project size. Set timeout to 5+ minutes.
+- View results: `plog-converter -a GA:1,2 -t errorfile pvs-report.log` or open in PVS-Studio GUI
+
 ## Validation
 
 ### ALWAYS Run These After Making Changes
diff --git a/examples/device/mtp/src/mtp_fs_example.c b/examples/device/mtp/src/mtp_fs_example.c
index 1c287be4d..7fd7db61b 100644
--- a/examples/device/mtp/src/mtp_fs_example.c
+++ b/examples/device/mtp/src/mtp_fs_example.c
@@ -414,7 +414,7 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
     // get describing dataset
     mtp_device_prop_desc_header_t device_prop_header;
     device_prop_header.device_property_code = dev_prop_code;
-    switch (dev_prop_code) { //-V2520 //-V2659
+    switch (dev_prop_code) {
       case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
         device_prop_header.datatype = MTP_DATA_TYPE_STR;
         device_prop_header.get_set = MTP_MODE_GET;
@@ -430,7 +430,7 @@ static int32_t fs_get_device_properties(tud_mtp_cb_data_t* cb_data) {
     }
   } else {
     // get value
-    switch (dev_prop_code) { //-V2520 //-V2659
+    switch (dev_prop_code) {
       case MTP_DEV_PROP_DEVICE_FRIENDLY_NAME:
         (void) mtp_container_add_cstring(io_container, DEV_PROP_FRIENDLY_NAME);
         tud_mtp_data_send(io_container);
diff --git a/examples/device/net_lwip_webserver/src/usb_descriptors.c b/examples/device/net_lwip_webserver/src/usb_descriptors.c
index 1bc568983..c976cb62b 100644
--- a/examples/device/net_lwip_webserver/src/usb_descriptors.c
+++ b/examples/device/net_lwip_webserver/src/usb_descriptors.c
@@ -24,6 +24,7 @@
  */
 
 #include "bsp/board_api.h"
+#include "class/net/net_device.h"
 #include "tusb.h"
 
 /* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
@@ -32,35 +33,34 @@
  * Auto ProductID layout's Bitmap:
  *   [MSB]       NET | VENDOR | MIDI | HID | MSC | CDC          [LSB]
  */
-#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
-                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | PID_MAP(ECM_RNDIS, 5) | PID_MAP(NCM, 5) )
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID                                                                                           \
+  (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) | \
+   PID_MAP(ECM_RNDIS, 5) | PID_MAP(NCM, 5))
 
 // String Descriptor Index
-enum
-{
+enum {
   STRID_LANGID = 0,
   STRID_MANUFACTURER,
   STRID_PRODUCT,
   STRID_SERIAL,
   STRID_INTERFACE,
-  STRID_MAC
+  STRID_MAC,
+  STRID_COUNT
 };
 
-enum
-{
+enum {
   ITF_NUM_CDC = 0,
   ITF_NUM_CDC_DATA,
   ITF_NUM_TOTAL
 };
 
-enum
-{
+enum {
 #if CFG_TUD_ECM_RNDIS
   CONFIG_ID_RNDIS = 0,
   CONFIG_ID_ECM   = 1,
 #else
-  CONFIG_ID_NCM   = 0,
+  CONFIG_ID_NCM = 0,
 #endif
   CONFIG_ID_COUNT
 };
@@ -68,103 +68,103 @@ enum
 //--------------------------------------------------------------------+
 // Device Descriptors
 //--------------------------------------------------------------------+
-static tusb_desc_device_t const desc_device =
-{
-    .bLength            = sizeof(tusb_desc_device_t),
-    .bDescriptorType    = TUSB_DESC_DEVICE,
+static const tusb_desc_device_t desc_device = {
+  .bLength         = sizeof(tusb_desc_device_t),
+  .bDescriptorType = TUSB_DESC_DEVICE,
 #if CFG_TUD_NCM
-    .bcdUSB             = 0x0201,
+  .bcdUSB = 0x0201,
 #else
-    .bcdUSB             = 0x0200,
+  .bcdUSB = 0x0200,
 #endif
-    // Use Interface Association Descriptor (IAD) device class
-    .bDeviceClass       = TUSB_CLASS_MISC,
-    .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
-    .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+  // Use Interface Association Descriptor (IAD) device class
+  .bDeviceClass    = TUSB_CLASS_MISC,
+  .bDeviceSubClass = MISC_SUBCLASS_COMMON,
+  .bDeviceProtocol = MISC_PROTOCOL_IAD,
 
-    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+  .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
 
-    .idVendor           = 0xCafe,
-    .idProduct          = USB_PID,
-    .bcdDevice          = 0x0101,
+  .idVendor  = 0xCafe,
+  .idProduct = USB_PID,
+  .bcdDevice = 0x0101,
 
-    .iManufacturer      = STRID_MANUFACTURER,
-    .iProduct           = STRID_PRODUCT,
-    .iSerialNumber      = STRID_SERIAL,
+  .iManufacturer = STRID_MANUFACTURER,
+  .iProduct      = STRID_PRODUCT,
+  .iSerialNumber = STRID_SERIAL,
 
-    .bNumConfigurations = CONFIG_ID_COUNT // multiple configurations
+  .bNumConfigurations = CONFIG_ID_COUNT // multiple configurations
 };
 
 // Invoked when received GET DEVICE DESCRIPTOR
 // Application return pointer to descriptor
-uint8_t const * tud_descriptor_device_cb(void)
-{
-  return (uint8_t const *) &desc_device;
+const uint8_t *tud_descriptor_device_cb(void) {
+  return (const uint8_t *)&desc_device;
 }
 
 //--------------------------------------------------------------------+
 // Configuration Descriptor
 //--------------------------------------------------------------------+
-#define MAIN_CONFIG_TOTAL_LEN    (TUD_CONFIG_DESC_LEN + TUD_RNDIS_DESC_LEN)
-#define ALT_CONFIG_TOTAL_LEN     (TUD_CONFIG_DESC_LEN + TUD_CDC_ECM_DESC_LEN)
-#define NCM_CONFIG_TOTAL_LEN     (TUD_CONFIG_DESC_LEN + TUD_CDC_NCM_DESC_LEN)
+#define MAIN_CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_RNDIS_DESC_LEN)
+#define ALT_CONFIG_TOTAL_LEN  (TUD_CONFIG_DESC_LEN + TUD_CDC_ECM_DESC_LEN)
+#define NCM_CONFIG_TOTAL_LEN  (TUD_CONFIG_DESC_LEN + TUD_CDC_NCM_DESC_LEN)
 
 #if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
-  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
-  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
-  #define EPNUM_NET_NOTIF   0x81
-  #define EPNUM_NET_OUT     0x02
-  #define EPNUM_NET_IN      0x82
+// LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+// 0 control, 1 In, 2 Bulk, 3 Iso, 4 In etc ...
+#define EPNUM_NET_NOTIF 0x81
+#define EPNUM_NET_OUT   0x02
+#define EPNUM_NET_IN    0x82
 
 #elif CFG_TUSB_MCU == OPT_MCU_CXD56
-  // CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
-  // 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
-  #define EPNUM_NET_NOTIF   0x83
-  #define EPNUM_NET_OUT     0x02
-  #define EPNUM_NET_IN      0x81
+// CXD56 USB driver has fixed endpoint type (bulk/interrupt/iso) and direction (IN/OUT) by its number
+// 0 control (IN/OUT), 1 Bulk (IN), 2 Bulk (OUT), 3 In (IN), 4 Bulk (IN), 5 Bulk (OUT), 6 In (IN)
+#define EPNUM_NET_NOTIF 0x83
+#define EPNUM_NET_OUT   0x02
+#define EPNUM_NET_IN    0x81
 
 #elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
-  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
-  //    e.g EP1 OUT & EP1 IN cannot exist together
-  #define EPNUM_NET_NOTIF   0x81
-  #define EPNUM_NET_OUT     0x02
-  #define EPNUM_NET_IN      0x83
+// MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
+//    e.g EP1 OUT & EP1 IN cannot exist together
+#define EPNUM_NET_NOTIF 0x81
+#define EPNUM_NET_OUT   0x02
+#define EPNUM_NET_IN    0x83
 
 #else
-  #define EPNUM_NET_NOTIF   0x81
-  #define EPNUM_NET_OUT     0x02
-  #define EPNUM_NET_IN      0x82
+#define EPNUM_NET_NOTIF 0x81
+#define EPNUM_NET_OUT   0x02
+#define EPNUM_NET_IN    0x82
 #endif
 
 #if CFG_TUD_ECM_RNDIS
 
-static uint8_t const rndis_configuration[] =
-{
+static uint8_t const rndis_configuration[] = {
   // Config number (index+1), interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_RNDIS+1, ITF_NUM_TOTAL, 0, MAIN_CONFIG_TOTAL_LEN, 0, 100),
+  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_RNDIS + 1, ITF_NUM_TOTAL, 0, MAIN_CONFIG_TOTAL_LEN, 0, 100),
 
   // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
-  TUD_RNDIS_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, EPNUM_NET_NOTIF, 8, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE),
+  TUD_RNDIS_DESCRIPTOR(
+      ITF_NUM_CDC, STRID_INTERFACE, EPNUM_NET_NOTIF, 8, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE),
 };
 
-static uint8_t const ecm_configuration[] =
-{
+static const uint8_t ecm_configuration[] = {
   // Config number (index+1), interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_ECM+1, ITF_NUM_TOTAL, 0, ALT_CONFIG_TOTAL_LEN, 0, 100),
+  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_ECM + 1, ITF_NUM_TOTAL, 0, ALT_CONFIG_TOTAL_LEN, 0, 100),
 
   // Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
-  TUD_CDC_ECM_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
+  TUD_CDC_ECM_DESCRIPTOR(
+      ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN,
+      CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
 };
 
 #else
 
-static uint8_t const ncm_configuration[] =
-{
+static uint8_t const ncm_configuration[] = {
   // Config number (index+1), interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_NCM+1, ITF_NUM_TOTAL, 0, NCM_CONFIG_TOTAL_LEN, 0, 100),
+  TUD_CONFIG_DESCRIPTOR(CONFIG_ID_NCM + 1, ITF_NUM_TOTAL, 0, NCM_CONFIG_TOTAL_LEN, 0, 100),
 
   // Interface number, description string index, MAC address string index, EP notification address and size, EP data address (out, in), and size, max segment size.
-  TUD_CDC_NCM_DESCRIPTOR(ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN, CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
+  TUD_CDC_NCM_DESCRIPTOR(
+      ITF_NUM_CDC, STRID_INTERFACE, STRID_MAC, EPNUM_NET_NOTIF, 64, EPNUM_NET_OUT, EPNUM_NET_IN,
+      CFG_TUD_NET_ENDPOINT_SIZE, CFG_TUD_NET_MTU),
 };
 
 #endif
@@ -173,21 +173,19 @@ static uint8_t const ncm_configuration[] =
 // - Windows only works with RNDIS
 // - MacOS only works with CDC-ECM
 // - Linux will work on both
-static uint8_t const * const configuration_arr[2] =
-{
+static const uint8_t *const configuration_arr[CONFIG_ID_COUNT] = {
 #if CFG_TUD_ECM_RNDIS
   [CONFIG_ID_RNDIS] = rndis_configuration,
-  [CONFIG_ID_ECM  ] = ecm_configuration
+  [CONFIG_ID_ECM]   = ecm_configuration
 #else
-  [CONFIG_ID_NCM  ] = ncm_configuration
+  [CONFIG_ID_NCM] = ncm_configuration
 #endif
 };
 
 // Invoked when received GET CONFIGURATION DESCRIPTOR
 // Application return pointer to descriptor
 // Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
-{
+const uint8_t *tud_descriptor_configuration_cb(uint8_t index) {
   return (index < CONFIG_ID_COUNT) ? configuration_arr[index] : NULL;
 }
 
@@ -213,61 +211,62 @@ https://developers.google.com/web/fundamentals/native-hardware/build-for-webusb/
 (Section Microsoft OS compatibility descriptors)
 */
 
-#define BOS_TOTAL_LEN      (TUD_BOS_DESC_LEN + TUD_BOS_MICROSOFT_OS_DESC_LEN)
+#define BOS_TOTAL_LEN     (TUD_BOS_DESC_LEN + TUD_BOS_MICROSOFT_OS_DESC_LEN)
 
-#define MS_OS_20_DESC_LEN  0xB2
+#define MS_OS_20_DESC_LEN 0xB2
 
 // BOS Descriptor is required for webUSB
-uint8_t const desc_bos[] =
-{
+const uint8_t desc_bos[] = {
   // total length, number of device caps
   TUD_BOS_DESCRIPTOR(BOS_TOTAL_LEN, 1),
 
   // Microsoft OS 2.0 descriptor
-  TUD_BOS_MS_OS_20_DESCRIPTOR(MS_OS_20_DESC_LEN, 1)
-};
+  TUD_BOS_MS_OS_20_DESCRIPTOR(MS_OS_20_DESC_LEN, 1)};
 
-uint8_t const * tud_descriptor_bos_cb(void)
-{
+const uint8_t *tud_descriptor_bos_cb(void) {
   return desc_bos;
 }
 
-uint8_t const desc_ms_os_20[] =
-{
+const uint8_t desc_ms_os_20[] = {
   // Set header: length, type, windows version, total length
-  U16_TO_U8S_LE(0x000A), U16_TO_U8S_LE(MS_OS_20_SET_HEADER_DESCRIPTOR), U32_TO_U8S_LE(0x06030000), U16_TO_U8S_LE(MS_OS_20_DESC_LEN),
+  U16_TO_U8S_LE(0x000A), U16_TO_U8S_LE(MS_OS_20_SET_HEADER_DESCRIPTOR), U32_TO_U8S_LE(0x06030000),
+  U16_TO_U8S_LE(MS_OS_20_DESC_LEN),
 
   // Configuration subset header: length, type, configuration index, reserved, configuration total length
-  U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_CONFIGURATION), 0, 0, U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A),
+  U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_CONFIGURATION), 0, 0,
+  U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A),
 
   // Function Subset header: length, type, first interface, reserved, subset length
-  U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_FUNCTION), ITF_NUM_CDC, 0, U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A-0x08),
+  U16_TO_U8S_LE(0x0008), U16_TO_U8S_LE(MS_OS_20_SUBSET_HEADER_FUNCTION), ITF_NUM_CDC, 0,
+  U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A - 0x08),
 
   // MS OS 2.0 Compatible ID descriptor: length, type, compatible ID, sub compatible ID
-  U16_TO_U8S_LE(0x0014), U16_TO_U8S_LE(MS_OS_20_FEATURE_COMPATBLE_ID), 'W', 'I', 'N', 'N', 'C', 'M', 0x00, 0x00,
-  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // sub-compatible
+  U16_TO_U8S_LE(0x0014), U16_TO_U8S_LE(MS_OS_20_FEATURE_COMPATBLE_ID), 'W', 'I', 'N', 'N', 'C', 'M', 0x00, 0x00, 0x00,
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, // sub-compatible
 
   // MS OS 2.0 Registry property descriptor: length, type
-  U16_TO_U8S_LE(MS_OS_20_DESC_LEN-0x0A-0x08-0x08-0x14), U16_TO_U8S_LE(MS_OS_20_FEATURE_REG_PROPERTY),
-  U16_TO_U8S_LE(0x0007), U16_TO_U8S_LE(0x002A), // wPropertyDataType, wPropertyNameLength and PropertyName "DeviceInterfaceGUIDs\0" in UTF-16
-  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00, 'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00, 't', 0x00, 'e', 0x00,
-  'r', 0x00, 'f', 0x00, 'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00, 'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00, 0x00, 0x00,
+  U16_TO_U8S_LE(MS_OS_20_DESC_LEN - 0x0A - 0x08 - 0x08 - 0x14), U16_TO_U8S_LE(MS_OS_20_FEATURE_REG_PROPERTY),
+  U16_TO_U8S_LE(0x0007),
+  U16_TO_U8S_LE(0x002A), // wPropertyDataType, wPropertyNameLength and PropertyName "DeviceInterfaceGUIDs\0" in UTF-16
+  'D', 0x00, 'e', 0x00, 'v', 0x00, 'i', 0x00, 'c', 0x00, 'e', 0x00, 'I', 0x00, 'n', 0x00, 't', 0x00, 'e', 0x00, 'r',
+  0x00, 'f', 0x00, 'a', 0x00, 'c', 0x00, 'e', 0x00, 'G', 0x00, 'U', 0x00, 'I', 0x00, 'D', 0x00, 's', 0x00, 0x00, 0x00,
   U16_TO_U8S_LE(0x0050), // wPropertyDataLength
-	//bPropertyData: {12345678-0D08-43FD-8B3E-127CA8AFFF9D}
-  '{', 0x00, '1', 0x00, '2', 0x00, '3', 0x00, '4', 0x00, '5', 0x00, '6', 0x00, '7', 0x00, '8', 0x00, '-', 0x00,
-  '0', 0x00, 'D', 0x00, '0', 0x00, '8', 0x00, '-', 0x00, '4', 0x00, '3', 0x00, 'F', 0x00, 'D', 0x00, '-', 0x00,
-  '8', 0x00, 'B', 0x00, '3', 0x00, 'E', 0x00, '-', 0x00, '1', 0x00, '2', 0x00, '7', 0x00, 'C', 0x00, 'A', 0x00,
-  '8', 0x00, 'A', 0x00, 'F', 0x00, 'F', 0x00, 'F', 0x00, '9', 0x00, 'D', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00
-};
+                         //bPropertyData: {12345678-0D08-43FD-8B3E-127CA8AFFF9D}
+  '{', 0x00, '1', 0x00, '2', 0x00, '3', 0x00, '4', 0x00, '5', 0x00, '6', 0x00, '7', 0x00, '8', 0x00, '-', 0x00, '0',
+  0x00, 'D', 0x00, '0', 0x00, '8', 0x00, '-', 0x00, '4', 0x00, '3', 0x00, 'F', 0x00, 'D', 0x00, '-', 0x00, '8', 0x00,
+  'B', 0x00, '3', 0x00, 'E', 0x00, '-', 0x00, '1', 0x00, '2', 0x00, '7', 0x00, 'C', 0x00, 'A', 0x00, '8', 0x00, 'A',
+  0x00, 'F', 0x00, 'F', 0x00, 'F', 0x00, '9', 0x00, 'D', 0x00, '}', 0x00, 0x00, 0x00, 0x00, 0x00};
 
 TU_VERIFY_STATIC(sizeof(desc_ms_os_20) == MS_OS_20_DESC_LEN, "Incorrect size");
 
 // Invoked when a control transfer occurred on an interface of this class
 // Driver response accordingly to the request and the transfer stage (setup/data/ack)
 // return false to stall control endpoint (e.g unsupported request)
-bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t const* request) {
+bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t *request) {
   // nothing to with DATA & ACK stage
-  if (stage != CONTROL_STAGE_SETUP) return true;
+  if (stage != CONTROL_STAGE_SETUP) {
+    return true;
+  }
 
   switch (request->bmRequestType_bit.type) {
     case TUSB_REQ_TYPE_VENDOR:
@@ -278,16 +277,18 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
             uint16_t total_len;
             memcpy(&total_len, desc_ms_os_20 + 8, 2);
 
-            return tud_control_xfer(rhport, request, (void*)(uintptr_t)desc_ms_os_20, total_len);
+            return tud_control_xfer(rhport, request, (void *)(uintptr_t)desc_ms_os_20, total_len);
           } else {
             return false;
           }
 
-        default: break;
+        default:
+          break; // nothing to do
       }
       break;
 
-    default: break;
+    default:
+      break; // nothing to do
   }
 
   // stall unknown request
@@ -300,26 +301,24 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
 //--------------------------------------------------------------------+
 
 // array of pointer to string descriptors
-static char const* string_desc_arr [] =
-{
-  [STRID_LANGID]       = (const char[]) { 0x09, 0x04 }, // supported language is English (0x0409)
-  [STRID_MANUFACTURER] = "TinyUSB",                     // Manufacturer
-  [STRID_PRODUCT]      = "TinyUSB Device",              // Product
-  [STRID_SERIAL]       = NULL,                          // Serials will use unique ID if possible
-  [STRID_INTERFACE]    = "TinyUSB Network Interface"    // Interface Description
-
-  // STRID_MAC index is handled separately
+static const char *string_desc_arr[STRID_COUNT] = {
+  [STRID_LANGID]       = (const char[]){0x09, 0x04},  // supported language is English (0x0409)
+  [STRID_MANUFACTURER] = "TinyUSB",                   // Manufacturer
+  [STRID_PRODUCT]      = "TinyUSB Device",            // Product
+  [STRID_SERIAL]       = NULL,                        // Serials will use unique ID if possible
+  [STRID_INTERFACE]    = "TinyUSB Network Interface", // Interface Description
+  [STRID_MAC]          = NULL                         // STRID_MAC index is handled separately
 };
 
 static uint16_t _desc_str[32 + 1];
 
 // Invoked when received GET STRING DESCRIPTOR request
 // Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
-  (void) langid;
+const uint16_t *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
+  (void)langid;
   unsigned int chr_count = 0;
 
-  switch ( index ) {
+  switch (index) {
     case STRID_LANGID:
       memcpy(&_desc_str[1], string_desc_arr[0], 2);
       chr_count = 1;
@@ -331,34 +330,40 @@ uint16_t const* tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
 
     case STRID_MAC:
       // Convert MAC address into UTF-16
-      for (unsigned i=0; i<sizeof(tud_network_mac_address); i++) {
-        _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
-        _desc_str[1+chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
+      for (unsigned i = 0; i < sizeof(tud_network_mac_address); i++) {
+        _desc_str[1 + chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 4) & 0xf];
+        _desc_str[1 + chr_count++] = "0123456789ABCDEF"[(tud_network_mac_address[i] >> 0) & 0xf];
       }
       break;
 
-    default:
+    default: {
       // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
       // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
 
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
+      if (index >= sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) {
+        return NULL;
+      }
 
       const char *str = string_desc_arr[index];
 
       // Cap at max char
       chr_count = strlen(str);
-      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
+
+      const size_t max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if (chr_count > max_count) {
+        chr_count = max_count;
+      }
 
       // Convert ASCII string into UTF-16
-      for ( size_t i = 0; i < chr_count; i++ ) {
+      for (size_t i = 0; i < chr_count; i++) {
         _desc_str[1 + i] = str[i];
       }
       break;
+    }
   }
 
   // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8 ) | (2*chr_count + 2));
+  _desc_str[0] = (uint16_t)((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
 
   return _desc_str;
 }
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 100deba1f..11cc00983 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -56,10 +56,9 @@ function(family_add_board BOARD_TARGET)
     endif()
   endforeach()
 
-
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __STARTUP_CLEAR_BSS
-    CFG_TUSB_MEM_SECTION=__attribute__\(\(section\(\"NonCacheable\"\)\)\)
+    [=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
     )
 
   if (NOT M4 STREQUAL "1")
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 35e5fc923..a51b3f758 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -105,7 +105,9 @@ static bool __no_inline_not_in_flash_func(get_bootsel_button)(void) {
                   IO_QSPI_GPIO_QSPI_SS_CTRL_OEOVER_BITS);
 
   // Note we can't call into any sleep functions in flash right now
-  for (volatile int i = 0; i < 1000; ++i) {}
+  for (volatile int i = 0; i < 1000; ++i) {
+    __nop();
+  }
 
   // The HI GPIO registers in SIO can observe and control the 6 QSPI pins.
   // Note the button pulls the pin *low* when pressed.
diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c
index 577a92a52..e821fffda 100644
--- a/src/class/cdc/cdc_device.c
+++ b/src/class/cdc/cdc_device.c
@@ -270,7 +270,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
   TU_VERIFY(tud_ready(), 0); // Skip if usb is not ready yet
 
   // No data to send
-  if (!tu_fifo_count(&p_cdc->tx_ff)) {
+  if (0 == tu_fifo_count(&p_cdc->tx_ff)) {
     return 0;
   }
 
@@ -279,7 +279,7 @@ uint32_t tud_cdc_n_write_flush(uint8_t itf) {
   // Pull data from FIFO
   const uint16_t count = tu_fifo_read_n(&p_cdc->tx_ff, p_epbuf->epin, CFG_TUD_CDC_EP_BUFSIZE);
 
-  if (count) {
+  if (count > 0) {
     TU_ASSERT(usbd_edpt_xfer(p_cdc->rhport, p_cdc->ep_in, p_epbuf->epin, count), 0);
     return count;
   } else {
@@ -337,15 +337,15 @@ bool cdcd_deinit(void) {
   #if OSAL_MUTEX_REQUIRED
   for(uint8_t i=0; i<CFG_TUD_CDC; i++) {
     cdcd_interface_t* p_cdc = &_cdcd_itf[i];
-    osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
-    osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
+    const osal_mutex_t mutex_rd = p_cdc->rx_ff.mutex_rd;
+    const osal_mutex_t mutex_wr = p_cdc->tx_ff.mutex_wr;
 
-    if (mutex_rd) {
+    if (mutex_rd != NULL) {
       osal_mutex_delete(mutex_rd);
       tu_fifo_config_mutex(&p_cdc->rx_ff, NULL, NULL);
     }
 
-    if (mutex_wr) {
+    if (mutex_wr != NULL) {
       osal_mutex_delete(mutex_wr);
       tu_fifo_config_mutex(&p_cdc->tx_ff, NULL, NULL);
     }
@@ -456,6 +456,8 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
         tud_control_xfer(rhport, request, &p_cdc->line_coding, sizeof(cdc_line_coding_t));
       } else if (stage == CONTROL_STAGE_ACK) {
         tud_cdc_line_coding_cb(itf, &p_cdc->line_coding);
+      } else {
+        // nothing to do
       }
       break;
 
@@ -491,6 +493,8 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
 
         // Invoke callback
         tud_cdc_line_state_cb(itf, dtr, rts);
+      } else {
+        // nothing to do
       }
       break;
 
@@ -500,7 +504,10 @@ bool cdcd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_requ
       } else if (stage == CONTROL_STAGE_ACK) {
         TU_LOG_DRV("  Send Break\r\n");
         tud_cdc_send_break_cb(itf, request->wValue);
+      } else {
+        // nothing to do
       }
+
       break;
 
     default:
@@ -558,7 +565,7 @@ bool cdcd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_
     if (0 == tud_cdc_n_write_flush(itf)) {
       // If there is no data left, a ZLP should be sent if
       // xferred_bytes is multiple of EP Packet size and not zero
-      if (!tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
+      if (0 == tu_fifo_count(&p_cdc->tx_ff) && xferred_bytes > 0 && (0 == (xferred_bytes & (BULK_PACKET_SIZE - 1)))) {
         if (usbd_edpt_claim(rhport, p_cdc->ep_in)) {
           TU_ASSERT(usbd_edpt_xfer(rhport, p_cdc->ep_in, NULL, 0));
         }
diff --git a/src/class/cdc/cdc_device.h b/src/class/cdc/cdc_device.h
index c321f3d16..f30f93bc6 100644
--- a/src/class/cdc/cdc_device.h
+++ b/src/class/cdc/cdc_device.h
@@ -53,15 +53,16 @@
 // Driver Configuration
 //--------------------------------------------------------------------+
 typedef struct TU_ATTR_PACKED {
-  uint8_t rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
-  uint8_t tx_persistent : 1; // keep tx fifo data even with reset or disconnect
-  uint8_t tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
+  bool rx_persistent : 1; // keep rx fifo data even with bus reset or disconnect
+  bool tx_persistent : 1; // keep tx fifo data even with reset or disconnect
+  bool tx_overwritabe_if_not_connected : 1; // if not connected, tx fifo can be overwritten
 } tud_cdc_configure_t;
+TU_VERIFY_STATIC(sizeof(tud_cdc_configure_t) == 1, "size is not correct");
 
 #define TUD_CDC_CONFIGURE_DEFAULT() { \
-  .rx_persistent = 0, \
-  .tx_persistent = 0, \
-  .tx_overwritabe_if_not_connected = 1, \
+  .rx_persistent = false, \
+  .tx_persistent = false, \
+  .tx_overwritabe_if_not_connected = false, \
 }
 
 // Configure CDC driver behavior
diff --git a/src/class/msc/msc_device.c b/src/class/msc/msc_device.c
index b0eafd5da..7e0202ddd 100644
--- a/src/class/msc/msc_device.c
+++ b/src/class/msc/msc_device.c
@@ -83,7 +83,7 @@ typedef struct {
   uint8_t add_sense_code;
   uint8_t add_sense_qualifier;
 
-  uint8_t pending_io; // pending async IO
+  bool pending_io; // pending async IO
 }mscd_interface_t;
 
 static mscd_interface_t _mscd_itf;
@@ -92,6 +92,8 @@ CFG_TUD_MEM_SECTION static struct {
   TUD_EPBUF_DEF(buf, CFG_TUD_MSC_EP_BUFSIZE);
 } _mscd_epbuf;
 
+TU_VERIFY_STATIC(CFG_TUD_MSC_EP_BUFSIZE >= 64, "CFG_TUD_MSC_EP_BUFSIZE must be at least 64");
+
 //--------------------------------------------------------------------+
 // INTERNAL OBJECT & FUNCTION DECLARATION
 //--------------------------------------------------------------------+
@@ -107,16 +109,16 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_data_in(uint8_t dir) {
   return tu_bit_test(dir, 7);
 }
 
-static inline bool send_csw(mscd_interface_t* p_msc) {
+TU_ATTR_ALWAYS_INLINE static inline bool send_csw(mscd_interface_t* p_msc) {
   // Data residue is always = host expect - actual transferred
   uint8_t rhport = p_msc->rhport;
   p_msc->csw.data_residue = p_msc->cbw.total_bytes - p_msc->xferred_len;
   p_msc->stage = MSC_STAGE_STATUS_SENT;
-  memcpy(_mscd_epbuf.buf, &p_msc->csw, sizeof(msc_csw_t));
+  memcpy(_mscd_epbuf.buf, (uint8_t*) &p_msc->csw, sizeof(msc_csw_t)); //-V1086
   return usbd_edpt_xfer(rhport, p_msc->ep_in , _mscd_epbuf.buf, sizeof(msc_csw_t));
 }
 
-static inline bool prepare_cbw(mscd_interface_t* p_msc) {
+TU_ATTR_ALWAYS_INLINE static inline bool prepare_cbw(mscd_interface_t* p_msc) {
   uint8_t rhport = p_msc->rhport;
   p_msc->stage = MSC_STAGE_CMD;
   return usbd_edpt_xfer(rhport, p_msc->ep_out,  _mscd_epbuf.buf, sizeof(msc_cbw_t));
@@ -133,7 +135,7 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
 
   // failed but sense key is not set: default to Illegal Request
   if (p_msc->sense_key == 0) {
-    tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+    (void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
   }
 
   // If there is data stage and not yet complete, stall it
@@ -146,18 +148,18 @@ static void fail_scsi_op(mscd_interface_t* p_msc, uint8_t status) {
   }
 }
 
-static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
+TU_ATTR_ALWAYS_INLINE static inline uint32_t rdwr10_get_lba(uint8_t const command[]) {
   // use offsetof to avoid pointer to the odd/unaligned address
   const uint32_t lba = tu_unaligned_read32(command + offsetof(scsi_write10_t, lba));
   return tu_ntohl(lba); // lba is in Big Endian
 }
 
-static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blockcount(msc_cbw_t const* cbw) {
   uint16_t const block_count = tu_unaligned_read16(cbw->command + offsetof(scsi_write10_t, block_count));
   return tu_ntohs(block_count);
 }
 
-static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
+TU_ATTR_ALWAYS_INLINE static inline uint16_t rdwr10_get_blocksize(msc_cbw_t const* cbw) {
   // first extract block count in the command
   uint16_t const block_count = rdwr10_get_blockcount(cbw);
   if (block_count == 0) {
@@ -171,7 +173,7 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
   uint16_t const block_count = rdwr10_get_blockcount(cbw);
 
   if (cbw->total_bytes == 0) {
-    if (block_count) {
+    if (block_count > 0) {
       TU_LOG_DRV("  SCSI case 2 (Hn < Di) or case 3 (Hn < Do) \r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
     } else {
@@ -190,6 +192,8 @@ static uint8_t rdwr10_validate_cmd(msc_cbw_t const* cbw) {
     } else if (cbw->total_bytes / block_count == 0) {
       TU_LOG_DRV(" Computed block size = 0. SCSI case 7 Hi < Di (READ10) or case 13 Ho < Do (WRIT10)\r\n");
       status = MSC_CSW_STATUS_PHASE_ERROR;
+    } else {
+      // nothing to do
     }
   }
 
@@ -309,7 +313,7 @@ bool tud_msc_set_sense(uint8_t lun, uint8_t sense_key, uint8_t add_sense_code, u
 
 TU_ATTR_ALWAYS_INLINE static inline void set_sense_medium_not_present(uint8_t lun) {
   // default sense is NOT READY, MEDIUM NOT PRESENT
-  tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
+  (void) tud_msc_set_sense(lun, SCSI_SENSE_NOT_READY, 0x3A, 0x00);
 }
 
 static void proc_async_io_done(void *bytes_io) {
@@ -318,7 +322,7 @@ static void proc_async_io_done(void *bytes_io) {
   const int32_t nbytes = (int32_t) (intptr_t) bytes_io;
   const uint8_t cmd = p_msc->cbw.command[0];
 
-  p_msc->pending_io = 0;
+  p_msc->pending_io = false;
   switch (cmd) {
     case SCSI_CMD_READ_10:
       proc_read_io_data(p_msc, nbytes);
@@ -328,7 +332,7 @@ static void proc_async_io_done(void *bytes_io) {
       proc_write_io_data(p_msc, (uint32_t) nbytes, nbytes);
       break;
 
-    default: break;
+    default: break; // nothing to do
   }
 
   // send status if stage is transitioned to STATUS
@@ -429,6 +433,8 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
             TU_ASSERT(prepare_cbw(p_msc));
           }
         }
+      } else {
+        // nothing to do
       }
     }
 
@@ -438,7 +444,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
   // From this point only handle class request only
   TU_VERIFY(request->bmRequestType_bit.type == TUSB_REQ_TYPE_CLASS);
 
-  switch ( request->bRequest ) {
+  switch (request->bRequest) {
     case MSC_REQ_RESET:
       TU_LOG_DRV("  MSC BOT Reset\r\n");
       TU_VERIFY(request->wValue == 0 && request->wLength == 0);
@@ -451,7 +457,7 @@ bool mscd_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_request_t
       TU_VERIFY(request->wValue == 0 && request->wLength == 1);
 
       uint8_t maxlun = tud_msc_get_maxlun_cb();
-      TU_VERIFY(maxlun);
+      TU_VERIFY(maxlun != 0);
       maxlun--; // MAX LUN is minus 1 by specs
       tud_control_xfer(rhport, request, &maxlun, 1);
       break;
@@ -510,7 +516,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
 
         if (status != MSC_CSW_STATUS_PASSED) {
           fail_scsi_op(p_msc, status);
-        } else if (p_cbw->total_bytes) {
+        } else if (p_cbw->total_bytes > 0) {
           if (SCSI_CMD_READ_10 == p_cbw->command[0]) {
             proc_read10_cmd(p_msc);
           } else {
@@ -547,7 +553,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
             TU_LOG_DRV("  SCSI unsupported or failed command\r\n");
             fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
           } else if (resplen == 0) {
-            if (p_cbw->total_bytes) {
+            if (p_cbw->total_bytes > 0) {
               // 6.7 The 13 Cases: case 4 (Hi > Dn)
               // TU_LOG_DRV("  SCSI case 4 (Hi > Dn): %lu\r\n", p_cbw->total_bytes);
               fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
@@ -647,7 +653,7 @@ bool mscd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
       }
       break;
 
-    default: break;
+    default: break; // nothing to do
   }
 
   if (p_msc->stage == MSC_STAGE_STATUS) {
@@ -683,9 +689,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       }
       break;
 
-    case SCSI_CMD_START_STOP_UNIT:
+    case SCSI_CMD_START_STOP_UNIT: {
       resplen = 0;
-
       scsi_start_stop_unit_t const* start_stop = (scsi_start_stop_unit_t const*)scsi_cmd;
       if (!tud_msc_start_stop_cb(lun, start_stop->power_condition, start_stop->start, start_stop->load_eject)) {
         // Failed status response
@@ -697,10 +702,10 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         }
       }
       break;
+    }
 
-    case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL:
+    case SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL: {
       resplen = 0;
-
       scsi_prevent_allow_medium_removal_t const* prevent_allow = (scsi_prevent_allow_medium_removal_t const*)scsi_cmd;
       if (!tud_msc_prevent_allow_medium_removal_cb(lun, prevent_allow->prohibit_removal, prevent_allow->control)) {
         // Failed status response
@@ -712,7 +717,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         }
       }
       break;
-
+    }
 
     case SCSI_CMD_READ_CAPACITY_10: {
       uint32_t block_count;
@@ -740,8 +745,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         resplen = sizeof(read_capa10);
         TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_capa10, (size_t) resplen));
       }
+      break;
     }
-    break;
 
     case SCSI_CMD_READ_FORMAT_CAPACITY: {
       scsi_read_format_capacity_data_t read_fmt_capa = {
@@ -772,8 +777,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         resplen = sizeof(read_fmt_capa);
         TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &read_fmt_capa, (size_t) resplen));
       }
+      break;
     }
-    break;
 
     case SCSI_CMD_INQUIRY: {
       scsi_inquiry_resp_t *inquiry_rsp = (scsi_inquiry_resp_t *) buffer;
@@ -789,8 +794,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
         tud_msc_inquiry_cb(lun, inquiry_rsp->vendor_id, inquiry_rsp->product_id, inquiry_rsp->product_rev);
         resplen = sizeof(scsi_inquiry_resp_t);
       }
+      break;
     }
-    break;
 
     case SCSI_CMD_MODE_SENSE_6: {
       scsi_mode_sense6_resp_t mode_resp = {
@@ -807,8 +812,8 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
 
       resplen = sizeof(mode_resp);
       TU_VERIFY(0 == tu_memcpy_s(buffer, bufsize, &mode_resp, (size_t) resplen));
+      break;
     }
-    break;
 
     case SCSI_CMD_REQUEST_SENSE: {
       scsi_sense_fixed_resp_t sense_rsp = {
@@ -828,9 +833,9 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
       resplen = tud_msc_request_sense_cb(lun, buffer, (uint16_t)bufsize);
 
       // Clear sense data after copy
-      tud_msc_set_sense(lun, 0, 0, 0);
+      (void) tud_msc_set_sense(lun, 0, 0, 0);
+      break;
     }
-    break;
 
     default: resplen = -1;
       break;
@@ -842,6 +847,7 @@ static int32_t proc_builtin_scsi(uint8_t lun, uint8_t const scsi_cmd[16], uint8_
 static void proc_read10_cmd(mscd_interface_t* p_msc) {
   msc_cbw_t const* p_cbw = &p_msc->cbw;
   uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
+  TU_VERIFY(block_sz != 0, );
   // Adjust lba & offset with transferred bytes
   uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
   uint32_t const offset = p_msc->xferred_len % block_sz;
@@ -849,10 +855,10 @@ static void proc_read10_cmd(mscd_interface_t* p_msc) {
   // remaining bytes capped at class buffer
   int32_t nbytes = (int32_t)tu_min32(CFG_TUD_MSC_EP_BUFSIZE, p_cbw->total_bytes - p_msc->xferred_len);
 
-  p_msc->pending_io = 1;
+  p_msc->pending_io = true;
   nbytes = tud_msc_read10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, (uint32_t)nbytes);
   if (nbytes != TUD_MSC_RET_ASYNC) {
-    p_msc->pending_io = 0;
+    p_msc->pending_io = false;
     proc_read_io_data(p_msc, nbytes);
   }
 }
@@ -876,19 +882,19 @@ static void proc_read_io_data(mscd_interface_t* p_msc, int32_t nbytes) {
         dcd_event_xfer_complete(rhport, p_msc->ep_in, 0, XFER_RESULT_SUCCESS, false);
         break;
 
-      default: break;
+      default: break; // nothing to do
     }
   }
 }
 
 static void proc_write10_cmd(mscd_interface_t* p_msc) {
   msc_cbw_t const* p_cbw = &p_msc->cbw;
-  bool writable = tud_msc_is_writable_cb(p_cbw->lun);
+  const bool writable = tud_msc_is_writable_cb(p_cbw->lun);
 
   if (!writable) {
     // Not writable, complete this SCSI op with error
     // Sense = Write protected
-    tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
+    (void) tud_msc_set_sense(p_cbw->lun, SCSI_SENSE_DATA_PROTECT, 0x27, 0x00);
     fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
     return;
   }
@@ -903,15 +909,16 @@ static void proc_write10_cmd(mscd_interface_t* p_msc) {
 static void proc_write10_host_data(mscd_interface_t* p_msc, uint32_t xferred_bytes) {
   msc_cbw_t const* p_cbw = &p_msc->cbw;
   uint16_t const block_sz = rdwr10_get_blocksize(p_cbw); // already verified non-zero
+  TU_VERIFY(block_sz != 0, );
 
   // Adjust lba & offset with transferred bytes
   uint32_t const lba = rdwr10_get_lba(p_cbw->command) + (p_msc->xferred_len / block_sz);
   uint32_t const offset = p_msc->xferred_len % block_sz;
 
-  p_msc->pending_io = 1;
+  p_msc->pending_io = true;
   int32_t nbytes =  tud_msc_write10_cb(p_cbw->lun, lba, offset, _mscd_epbuf.buf, xferred_bytes);
   if (nbytes != TUD_MSC_RET_ASYNC) {
-    p_msc->pending_io = 0;
+    p_msc->pending_io = false;
     proc_write_io_data(p_msc, xferred_bytes, nbytes);
   }
 }
@@ -927,7 +934,7 @@ static void proc_write_io_data(mscd_interface_t* p_msc, uint32_t xferred_bytes,
         fail_scsi_op(p_msc, MSC_CSW_STATUS_FAILED);
         break;
 
-      default: break;
+      default: break; // nothing to do
     }
   } else {
     if ((uint32_t)nbytes < xferred_bytes) {
diff --git a/src/class/msc/msc_host.c b/src/class/msc/msc_host.c
index eb69ae400..ce2884f2e 100644
--- a/src/class/msc/msc_host.c
+++ b/src/class/msc/msc_host.c
@@ -152,7 +152,7 @@ bool tuh_msc_scsi_command(uint8_t daddr, msc_cbw_t const* cbw, void* data,
   p_msc->stage = MSC_STAGE_CMD;
 
   if (!usbh_edpt_xfer(daddr, p_msc->ep_out, (uint8_t*) &epbuf->cbw, sizeof(msc_cbw_t))) {
-    usbh_edpt_release(daddr, p_msc->ep_out);
+    (void) usbh_edpt_release(daddr, p_msc->ep_out);
     return false;
   }
 
@@ -191,7 +191,7 @@ bool tuh_msc_inquiry(uint8_t dev_addr, uint8_t lun, scsi_inquiry_resp_t* respons
       .cmd_code     = SCSI_CMD_INQUIRY,
       .alloc_length = sizeof(scsi_inquiry_resp_t)
   };
-  memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len);
+  memcpy(cbw.command, &cmd_inquiry, cbw.cmd_len); //-V1086
 
   return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
 }
@@ -225,7 +225,7 @@ bool tuh_msc_request_sense(uint8_t dev_addr, uint8_t lun, void* response,
       .cmd_code     = SCSI_CMD_REQUEST_SENSE,
       .alloc_length = 18
   };
-  memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len);
+  memcpy(cbw.command, &cmd_request_sense, cbw.cmd_len); //-V1086
 
   return tuh_msc_scsi_command(dev_addr, &cbw, response, complete_cb, arg);
 }
@@ -247,7 +247,7 @@ bool tuh_msc_read10(uint8_t dev_addr, uint8_t lun, void* buffer, uint32_t lba, u
       .lba         = tu_htonl(lba),
       .block_count = tu_htons(block_count)
   };
-  memcpy(cbw.command, &cmd_read10, cbw.cmd_len);
+  memcpy(cbw.command, &cmd_read10, cbw.cmd_len); //-V1086
 
   return tuh_msc_scsi_command(dev_addr, &cbw, buffer, complete_cb, arg);
 }
@@ -269,7 +269,7 @@ bool tuh_msc_write10(uint8_t dev_addr, uint8_t lun, void const* buffer, uint32_t
       .lba         = tu_htonl(lba),
       .block_count = tu_htons(block_count)
   };
-  memcpy(cbw.command, &cmd_write10, cbw.cmd_len);
+  memcpy(cbw.command, &cmd_write10, cbw.cmd_len); //-V1086
 
   return tuh_msc_scsi_command(dev_addr, &cbw, (void*) (uintptr_t) buffer, complete_cb, arg);
 }
@@ -338,8 +338,7 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
         TU_ASSERT(usbh_edpt_xfer(dev_addr, ep_data, p_msc->buffer, (uint16_t) cbw->total_bytes));
         break;
       }
-
-      TU_ATTR_FALLTHROUGH; // fallthrough to status stage
+      TU_ATTR_FALLTHROUGH; // fallthrough to data stage
 
     case MSC_STAGE_DATA:
       // Status stage
@@ -350,20 +349,19 @@ bool msch_xfer_cb(uint8_t dev_addr, uint8_t ep_addr, xfer_result_t event, uint32
     case MSC_STAGE_STATUS:
       // SCSI op is complete
       p_msc->stage = MSC_STAGE_IDLE;
-
-      if (p_msc->complete_cb) {
+      if (p_msc->complete_cb != NULL) {
         tuh_msc_complete_data_t const cb_data = {
             .cbw = cbw,
             .csw = csw,
             .scsi_data = p_msc->buffer,
             .user_arg = p_msc->complete_arg
         };
-        p_msc->complete_cb(dev_addr, &cb_data);
+        (void) p_msc->complete_cb(dev_addr, &cb_data);
       }
       break;
 
-      // unknown state
     default:
+      // unknown state
       break;
   }
 
@@ -501,7 +499,7 @@ static bool config_read_capacity_complete(uint8_t dev_addr, tuh_msc_complete_dat
 
   // Capacity response field: Block size and Last LBA are both Big-Endian
   scsi_read_capacity10_resp_t* resp = (scsi_read_capacity10_resp_t*) (uintptr_t) enum_buf;
-  p_msc->capacity[cbw->lun].block_count = tu_ntohl(resp->last_lba) + 1;
+  p_msc->capacity[cbw->lun].block_count = (uint32_t) (tu_ntohl(resp->last_lba) + 1u);
   p_msc->capacity[cbw->lun].block_size  = tu_ntohl(resp->block_size);
 
   // Mark enumeration is complete
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index a7bf3e959..905dc239c 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -61,9 +61,9 @@ void tu_print_mem(void const *buf, uint32_t count, uint8_t indent);
 
 TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32_t bufsize) {
   for(uint32_t i=0; i<bufsize; i++) {
-    tu_printf("%02X ", buf[i]);
+    (void) tu_printf("%02X ", buf[i]);
   }
-  tu_printf("\r\n");
+  (void) tu_printf("\r\n");
 }
 
 // Log with Level
@@ -72,15 +72,15 @@ TU_ATTR_ALWAYS_INLINE static inline void tu_print_buf(uint8_t const* buf, uint32
 #define TU_LOG_BUF(n, ...)    TU_XSTRCAT3(TU_LOG, n, _BUF)(__VA_ARGS__)
 #define TU_LOG_INT(n, ...)    TU_XSTRCAT3(TU_LOG, n, _INT)(__VA_ARGS__)
 #define TU_LOG_HEX(n, ...)    TU_XSTRCAT3(TU_LOG, n, _HEX)(__VA_ARGS__)
-#define TU_LOG_LOCATION()     tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
-#define TU_LOG_FAILED()       tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
+#define TU_LOG_LOCATION()     (void) tu_printf("%s: %d:\r\n", __PRETTY_FUNCTION__, __LINE__)
+#define TU_LOG_FAILED()       (void) tu_printf("%s: %d: Failed\r\n", __PRETTY_FUNCTION__, __LINE__)
 
 // Log Level 1: Error
-#define TU_LOG1               tu_printf
+#define TU_LOG1               (void) tu_printf
 #define TU_LOG1_MEM           tu_print_mem
 #define TU_LOG1_BUF(_x, _n)   tu_print_buf((uint8_t const*)(_x), _n)
-#define TU_LOG1_INT(_x)       tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
-#define TU_LOG1_HEX(_x)       tu_printf(#_x " = 0x%lX\r\n", (unsigned long) (_x) )
+#define TU_LOG1_INT(_x)       (void) tu_printf(#_x " = %ld\r\n", (unsigned long) (_x) )
+#define TU_LOG1_HEX(_x)       (void) tu_printf(#_x " = 0x%lX\r\n", (unsigned long) (_x) )
 
 // Log Level 2: Warn
 #if CFG_TUSB_DEBUG >= 2
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 9d0bc0f3f..cf96f050d 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -352,11 +352,13 @@ TU_ATTR_ALWAYS_INLINE static inline usbd_class_driver_t const * get_driver(uint8
   if (drvid < _app_driver_count) {
     // Application drivers
     driver = &_app_driver[drvid];
-  } else if (drvid < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
-    driver = &_usbd_driver[drvid - _app_driver_count];
-  } else {
-    // nothing to do
+  } else{
+    drvid -= _app_driver_count;
+    if (drvid < BUILTIN_DRIVER_COUNT) {
+      driver = &_usbd_driver[drvid];
+    }
   }
+
   return driver;
 }
 
diff --git a/src/host/hcd.h b/src/host/hcd.h
index 4a17326ec..36a7f5da5 100644
--- a/src/host/hcd.h
+++ b/src/host/hcd.h
@@ -84,7 +84,7 @@ typedef struct {
 
     // FUNC_CALL
     struct {
-      void (*func) (void*);
+      void (*func) (void* param);
       void* param;
     }func_call;
   };
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 0330320f8..734024771 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -292,13 +292,17 @@ static uint8_t _app_driver_count = 0;
 
 #define TOTAL_DRIVER_COUNT    (_app_driver_count + BUILTIN_DRIVER_COUNT)
 
-static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
+// virtually joins built-in and application drivers together.
+// Application is positioned first to allow overwriting built-in ones.
+TU_ATTR_ALWAYS_INLINE static inline usbh_class_driver_t const *get_driver(uint8_t drv_id) {
   usbh_class_driver_t const *driver = NULL;
-
-  if ( drv_id < _app_driver_count ) {
+  if (drv_id < _app_driver_count) {
     driver = &_app_driver[drv_id];
-  } else if ( drv_id < TOTAL_DRIVER_COUNT && BUILTIN_DRIVER_COUNT > 0) {
-    driver = &usbh_class_drivers[drv_id - _app_driver_count];
+  } else {
+    drv_id -= _app_driver_count;
+    if (drv_id < BUILTIN_DRIVER_COUNT) {
+      driver = &usbh_class_drivers[drv_id];
+    }
   }
 
   return driver;
@@ -318,7 +322,7 @@ TU_ATTR_ALWAYS_INLINE static inline usbh_device_t* get_device(uint8_t dev_addr)
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool is_hub_addr(uint8_t daddr) {
-  return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX);
+  return (CFG_TUH_HUB > 0) && (daddr > CFG_TUH_DEVICE_MAX); //-V560
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool queue_event(hcd_event_t const * event, bool in_isr) {
@@ -372,7 +376,8 @@ bool tuh_connected(uint8_t daddr) {
     return _usbh_data.enumerating_daddr == 0;
   } else {
     const usbh_device_t* dev = get_device(daddr);
-    return dev && dev->connected;
+    TU_VERIFY(dev != NULL);
+    return dev->connected;
   }
 }
 
@@ -439,8 +444,8 @@ bool tuh_configure(uint8_t rhport, uint32_t cfg_id, const void *cfg_param) {
 
 static void clear_device(usbh_device_t* dev) {
   tu_memclr(dev, sizeof(usbh_device_t));
-  memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
-  memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
+  (void) memset(dev->itf2drv, TUSB_INDEX_INVALID_8, sizeof(dev->itf2drv)); // invalid mapping
+  (void) memset(dev->ep2drv , TUSB_INDEX_INVALID_8, sizeof(dev->ep2drv )); // invalid mapping
 }
 
 bool tuh_inited(void) {
@@ -510,7 +515,7 @@ bool tuh_rhport_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
     // Class drivers
     for (uint8_t drv_id = 0; drv_id < TOTAL_DRIVER_COUNT; drv_id++) {
       usbh_class_driver_t const* driver = get_driver(drv_id);
-      if (driver) {
+      if (driver != NULL) {
         TU_LOG_USBH("%s init\r\n", driver->name);
         driver->init();
       }
@@ -657,7 +662,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
             // with enabled driver e.g HID endpoint
             #if CFG_TUH_API_EDPT_XFER
             tuh_xfer_cb_t const complete_cb = dev->ep_callback[epnum][ep_dir].complete_cb;
-            if ( complete_cb ) {
+            if (complete_cb != NULL) {
               // re-construct xfer info
               tuh_xfer_t xfer = {
                   .daddr       = event.dev_addr,
@@ -675,7 +680,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
             {
               uint8_t drv_id = dev->ep2drv[epnum][ep_dir];
               usbh_class_driver_t const* driver = get_driver(drv_id);
-              if (driver) {
+              if (driver != NULL) {
                 TU_LOG_USBH("  %s xfer callback\r\n", driver->name);
                 driver->xfer_cb(event.dev_addr, ep_addr, (xfer_result_t) event.xfer_complete.result,
                                 event.xfer_complete.len);
@@ -690,10 +695,13 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
       }
 
       case USBH_EVENT_FUNC_CALL:
-        if (event.func_call.func) event.func_call.func(event.func_call.param);
+        if (event.func_call.func != NULL) {
+          event.func_call.func(event.func_call.param);
+        }
         break;
 
       default:
+        // unknown event
         break;
     }
 
@@ -743,7 +751,7 @@ bool tuh_control_xfer (tuh_xfer_t* xfer) {
                   tu_str_std_request[xfer->setup->bRequest] : "Class Request");
   TU_LOG_BUF_USBH(xfer->setup, 8);
 
-  if (xfer->complete_cb) {
+  if (xfer->complete_cb != NULL) {
     TU_ASSERT(usbh_setup_send(daddr, (uint8_t const *) &_usbh_epbuf.request));
   }else {
     // blocking if complete callback is not provided
@@ -795,7 +803,7 @@ static void _control_xfer_complete(uint8_t daddr, xfer_result_t result) {
 
   _control_set_xfer_stage(CONTROL_STAGE_IDLE);
 
-  if (xfer_temp.complete_cb) {
+  if (xfer_temp.complete_cb != NULL) {
     xfer_temp.complete_cb(&xfer_temp);
   }
 }
@@ -834,7 +842,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
     case XFER_RESULT_SUCCESS:
       switch(ctrl_info->stage) {
         case CONTROL_STAGE_SETUP:
-          if (request->wLength) {
+          if (request->wLength > 0) {
             // DATA stage: initial data toggle is always 1
             _control_set_xfer_stage(CONTROL_STAGE_DATA);
             const uint8_t ep_data = tu_edpt_addr(0, request->bmRequestType_bit.direction);
@@ -844,7 +852,7 @@ static bool usbh_control_xfer_cb (uint8_t daddr, uint8_t ep_addr, xfer_result_t
           TU_ATTR_FALLTHROUGH;
 
         case CONTROL_STAGE_DATA: {
-            if (request->wLength) {
+            if (request->wLength > 0) {
               TU_LOG_USBH("[%u:%u] Control data:\r\n", rhport, daddr);
               TU_LOG_MEM_USBH(ctrl_info->buffer, xferred_bytes, 2);
             }
@@ -1084,7 +1092,7 @@ bool usbh_edpt_busy(uint8_t dev_addr, uint8_t ep_addr) {
 
 bool tuh_bus_info_get(uint8_t daddr, tuh_bus_info_t* bus_info) {
   usbh_device_t const* dev = get_device(daddr);
-  if (dev) {
+  if (dev != NULL) {
     *bus_info = dev->bus_info;
   } else {
     *bus_info = _usbh_data.dev0_bus;
@@ -1109,7 +1117,9 @@ TU_ATTR_FAST_FUNC void hcd_event_handler(hcd_event_t const* event, bool in_isr)
       }
       break;
 
-    default: break;
+    default:
+      // nothing to do
+      break;
   }
 
   queue_event(event, in_isr);
@@ -1423,16 +1433,13 @@ static bool enum_new_device(hcd_event_t* event) {
   // wait until device connection is stable TODO non blocking
   tusb_time_delay_ms_api(ENUM_DEBOUNCING_DELAY_MS);
 
-  // clear roothub debouncing delay
-  if (dev0_bus->hub_addr == 0) {
-    _usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport);
-  }
-
   if (dev0_bus->hub_addr == 0) {
     // connected directly to roothub
     // USB bus not active and frame number is not available yet.
     // need to depend on tusb_time_millis_api() TODO non blocking
 
+    _usbh_data.attach_debouncing_bm &= (uint8_t) ~TU_BIT(dev0_bus->rhport); // clear roothub debouncing delay
+
     if (!hcd_port_connect_status(dev0_bus->rhport)) {
       TU_LOG_USBH("Device unplugged while debouncing\r\n");
       enum_full_complete();
@@ -1503,7 +1510,7 @@ static void process_enumeration(tuh_xfer_t* xfer) {
   usbh_device_t* dev = get_device(daddr);
   tuh_bus_info_t* dev0_bus = &_usbh_data.dev0_bus;
   if (daddr > 0) {
-    TU_ASSERT(dev,);
+    TU_ASSERT(dev != NULL,);
   }
   uint16_t langid = 0x0409; // default is English
 
@@ -1619,17 +1626,18 @@ static void process_enumeration(tuh_xfer_t* xfer) {
     case ENUM_GET_STRING_LANGUAGE_ID_LEN: {
       // save the received device descriptor
       tusb_desc_device_t const *desc_device = (tusb_desc_device_t const *) _usbh_epbuf.ctrl;
-      dev->bcdUSB = desc_device->bcdUSB;
-      dev->bDeviceClass = desc_device->bDeviceClass;
-      dev->bDeviceSubClass = desc_device->bDeviceSubClass;
-      dev->bDeviceProtocol = desc_device->bDeviceProtocol;
-      dev->bMaxPacketSize0 = desc_device->bMaxPacketSize0;
-      dev->idVendor = desc_device->idVendor;
-      dev->idProduct = desc_device->idProduct;
-      dev->bcdDevice = desc_device->bcdDevice;
-      dev->iManufacturer = desc_device->iManufacturer;
-      dev->iProduct = desc_device->iProduct;
-      dev->iSerialNumber = desc_device->iSerialNumber;
+
+      dev->bcdUSB             = desc_device->bcdUSB;
+      dev->bDeviceClass       = desc_device->bDeviceClass;
+      dev->bDeviceSubClass    = desc_device->bDeviceSubClass;
+      dev->bDeviceProtocol    = desc_device->bDeviceProtocol;
+      dev->bMaxPacketSize0    = desc_device->bMaxPacketSize0;
+      dev->idVendor           = desc_device->idVendor;
+      dev->idProduct          = desc_device->idProduct;
+      dev->bcdDevice          = desc_device->bcdDevice;
+      dev->iManufacturer      = desc_device->iManufacturer;
+      dev->iProduct           = desc_device->iProduct;
+      dev->iSerialNumber      = desc_device->iSerialNumber;
       dev->bNumConfigurations = desc_device->bNumConfigurations;
 
       tuh_enum_descriptor_device_cb(daddr, desc_device); // callback
@@ -1654,9 +1662,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
         tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, 2,
                                   process_enumeration, ENUM_GET_STRING_MANUFACTURER);
         break;
-      }else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
     }
 
     case ENUM_GET_STRING_MANUFACTURER: {
@@ -1666,22 +1673,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
         tuh_descriptor_get_string(daddr, dev->iManufacturer, langid, _usbh_epbuf.ctrl, str_len,
                                   process_enumeration, ENUM_GET_STRING_PRODUCT_LEN);
         break;
-      } else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
     }
 
-    case ENUM_GET_STRING_PRODUCT_LEN:
+    case ENUM_GET_STRING_PRODUCT_LEN: {
       if (dev->iProduct != 0) {
         if (state == ENUM_GET_STRING_PRODUCT_LEN) {
           langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
         }
-        tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2,
-                                  process_enumeration, ENUM_GET_STRING_PRODUCT);
+        tuh_descriptor_get_string(
+            daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_PRODUCT);
         break;
-      } else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
+    }
 
     case ENUM_GET_STRING_PRODUCT: {
       if (dev->iProduct != 0) {
@@ -1690,22 +1696,21 @@ static void process_enumeration(tuh_xfer_t* xfer) {
         tuh_descriptor_get_string(daddr, dev->iProduct, langid, _usbh_epbuf.ctrl, str_len,
                             process_enumeration, ENUM_GET_STRING_SERIAL_LEN);
         break;
-      } else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
     }
 
-    case ENUM_GET_STRING_SERIAL_LEN:
+    case ENUM_GET_STRING_SERIAL_LEN: {
       if (dev->iSerialNumber != 0) {
         if (state == ENUM_GET_STRING_SERIAL_LEN) {
           langid = tu_le16toh(xfer->setup->wIndex); // get langid from previous setup packet if not fall through
         }
-        tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2,
-                                  process_enumeration, ENUM_GET_STRING_SERIAL);
+        tuh_descriptor_get_string(
+            daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, 2, process_enumeration, ENUM_GET_STRING_SERIAL);
         break;
-      } else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
+    }
 
     case ENUM_GET_STRING_SERIAL: {
       if (dev->iSerialNumber != 0) {
@@ -1714,9 +1719,8 @@ static void process_enumeration(tuh_xfer_t* xfer) {
         tuh_descriptor_get_string(daddr, dev->iSerialNumber, langid, _usbh_epbuf.ctrl, str_len,
                                   process_enumeration, ENUM_GET_9BYTE_CONFIG_DESC);
         break;
-      } else {
-        TU_ATTR_FALLTHROUGH;
       }
+      TU_ATTR_FALLTHROUGH;
     }
 
     case ENUM_GET_9BYTE_CONFIG_DESC: {
diff --git a/src/osal/osal_pico.h b/src/osal/osal_pico.h
index ace5907d7..f5385071a 100644
--- a/src/osal/osal_pico.h
+++ b/src/osal/osal_pico.h
@@ -81,8 +81,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_delete(osal_semaphore_t
 
 TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_post(osal_semaphore_t sem_hdl, bool in_isr) {
   (void) in_isr;
-  sem_release(sem_hdl);
-  return true;
+  return sem_release(sem_hdl);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t sem_hdl, uint32_t msec) {
@@ -139,7 +138,7 @@ typedef osal_queue_def_t* osal_queue_t;
 
 TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
   critical_section_init(&qdef->critsec);
-  tu_fifo_clear(&qdef->ff);
+  (void) tu_fifo_clear(&qdef->ff);
   return (osal_queue_t) qdef;
 }
 
-- 
cgit v1.3.1


From a1ae5b20ccf760282538dd81b9290527757fa9c7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 11 Nov 2025 10:27:47 +0700
Subject: update doc

---
 .github/workflows/static_analysis.yml |   9 +-
 README.rst                            |  56 ++++++--
 docs/_static/custom.css               |   3 +
 docs/conf.py                          |   8 +-
 docs/contributing/code_of_conduct.rst |   1 -
 docs/contributing/index.rst           |  22 ---
 docs/contributing/porting.rst         | 243 ----------------------------------
 docs/faq.rst                          |  32 +----
 docs/getting_started.rst              | 159 ++++++++++++----------
 docs/index.rst                        |  37 +-----
 docs/info/changelog.rst               |  48 +++++++
 docs/info/code_of_conduct.rst         |   1 +
 docs/info/index.rst                   |   1 +
 docs/integration.rst                  |  93 +++++++++++++
 docs/porting.rst                      | 243 ++++++++++++++++++++++++++++++++++
 docs/reference/architecture.rst       |  39 ++----
 docs/reference/boards.rst             |  31 +++--
 docs/reference/dependencies.rst       |  12 +-
 docs/reference/glossary.rst           |   2 +-
 docs/troubleshooting.rst              |  43 ++++--
 hw/bsp/family_support.cmake           |  49 +++++--
 tools/gen_doc.py                      |   2 +-
 22 files changed, 640 insertions(+), 494 deletions(-)
 create mode 100644 docs/_static/custom.css
 delete mode 100644 docs/contributing/code_of_conduct.rst
 delete mode 100644 docs/contributing/index.rst
 delete mode 100644 docs/contributing/porting.rst
 create mode 100644 docs/info/code_of_conduct.rst
 create mode 100644 docs/integration.rst
 create mode 100644 docs/porting.rst

(limited to 'hw')

diff --git a/.github/workflows/static_analysis.yml b/.github/workflows/static_analysis.yml
index a89cdc279..4db267517 100644
--- a/.github/workflows/static_analysis.yml
+++ b/.github/workflows/static_analysis.yml
@@ -90,7 +90,8 @@ jobs:
           path: ${{ steps.analyze.outputs.sarif-output }}
 
   PVS-Studio:
-    if: github.repository_owner == 'hathach'
+    # Only run on non-forked PR since secrets token is required
+    if: github.repository_owner == 'hathach' && github.event.pull_request.head.repo.fork == false
     runs-on: ubuntu-latest
     strategy:
       fail-fast: false
@@ -141,7 +142,8 @@ jobs:
           path: pvs-studio-${{ matrix.board }}.sarif
 
   SonarQube:
-    if: github.repository_owner == 'hathach'
+    # Only run on non-forked PR since secrets token is required
+    if: github.repository_owner == 'hathach' && github.event.pull_request.head.repo.fork == false
     runs-on: ubuntu-latest
     env:
       BUILD_WRAPPER_OUT_DIR: build_wrapper_output_directory
@@ -184,7 +186,8 @@ jobs:
             --define sonar.cfamily.compile-commands=${{ env.BUILD_WRAPPER_OUT_DIR }}/compile_commands.json
 
   IAR-CStat:
-    #if: github.repository_owner == 'hathach'
+    # Only run on non-forked PR since secrets token is required
+    #if: github.repository_owner == 'hathach' && github.event.pull_request.head.repo.fork == false
     if: false
     runs-on: ubuntu-latest
     strategy:
diff --git a/README.rst b/README.rst
index 2d84a2f6c..d0586f55a 100644
--- a/README.rst
+++ b/README.rst
@@ -1,26 +1,55 @@
+TinyUSB
+=======
+
 |Build Status| |CircleCI Status| |Documentation Status| |Static Analysis| |Fuzzing Status| |License|
 
 Sponsors
-========
+--------
 
 TinyUSB is funded by: Adafruit. Purchasing products from them helps to support this project.
 
 .. figure:: docs/assets/adafruit_logo.svg
    :alt: Adafruit Logo
+   :align: left
    :target: https://www.adafruit.com
 
-TinyUSB Project
-===============
+.. raw:: html
+
+   <div class="clear-both"></div>
+
+Overview
+--------
 
 .. figure:: docs/assets/logo.svg
    :alt: TinyUSB
+   :align: left
+
+.. raw:: html
+
+   <div class="clear-both"></div>
+
+TinyUSB is an open-source cross-platform USB Host/Device stack for embedded systems. It’s designed for memory safety
+(no dynamic allocation) and thread safety (all interrupts deferred to non-ISR task functions). The stack emphasizes portability,
+small footprint, and real-time performance across 50+ MCU families.
 
-TinyUSB is an open-source cross-platform USB Host/Device stack for embedded system, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events are deferred then handled in the non-ISR task function. Check out the online `documentation <https://docs.tinyusb.org/>`__ for more details.
+Key Features
+------------
+
+* **Thread-safe:** USB interrupts deferred to task context
+* **Memory-safe:** No dynamic allocation, all buffers static
+* **Portable:** Supports 50+ MCU families
+* **Comprehensive:** Includes CDC, HID, MSC, Audio, and Host support
+* **RTOS-friendly:** Works with bare metal, FreeRTOS, RT-Thread, and Mynewt
 
 .. figure:: docs/assets/stack.svg
    :width: 500px
+   :align: left
    :alt: stackup
 
+.. raw:: html
+
+   <div class="clear-both"></div>
+
 ::
 
     .
@@ -36,7 +65,7 @@ TinyUSB is an open-source cross-platform USB Host/Device stack for embedded syst
 
 
 Getting started
-===============
+---------------
 
 See the `online documentation <https://docs.tinyusb.org>`_ for information about using TinyUSB and how it is implemented.
 
@@ -49,7 +78,7 @@ For bugs and feature requests, please `raise an issue <https://github.com/hathac
 See `Porting`_ guide for adding support for new MCUs and boards.
 
 Device Stack
-============
+------------
 
 Supports multiple device configurations by dynamically changing USB descriptors, low power functions such like suspend, resume, and remote wakeup. The following device classes are supported:
 
@@ -70,7 +99,7 @@ Supports multiple device configurations by dynamically changing USB descriptors,
 If you have a special requirement, ``usbd_app_driver_get_cb()`` can be used to write your own class driver without modifying the stack. Here is how the RPi team added their reset interface `raspberrypi/pico-sdk#197 <https://github.com/raspberrypi/pico-sdk/pull/197>`_
 
 Host Stack
-==========
+----------
 
 - Human Interface Device (HID): Keyboard, Mouse, Generic
 - Mass Storage Class (MSC)
@@ -81,14 +110,14 @@ Host Stack
 Similar to the Device Stack, if you have a special requirement, ``usbh_app_driver_get_cb()`` can be used to write your own class driver without modifying the stack.
 
 Power Delivery Stack
-====================
+--------------------
 
 - Power Delivery 3.0 (PD3.0) with USB Type-C support (WIP)
 - Super early stage, only for testing purpose
 - Only support STM32 G4
 
 OS Abstraction layer
-====================
+--------------------
 
 TinyUSB is completely thread-safe by pushing all Interrupt Service Request (ISR) events into a central queue, then processing them later in the non-ISR context task function. It also uses semaphore/mutex to access shared resources such as Communication Device Class (CDC) FIFO. Therefore the stack needs to use some of the OS's basic APIs. Following OSes are already supported out of the box.
 
@@ -98,7 +127,7 @@ TinyUSB is completely thread-safe by pushing all Interrupt Service Request (ISR)
 - **Mynewt** Due to the newt package build system, Mynewt examples are better to be on its `own repo <https://github.com/hathach/mynewt-tinyusb-example>`_
 
 Supported CPUs
-==============
+--------------
 
 +--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
 | Manufacturer | Family                      | Device | Host | Highspeed | Driver                 | Note              |
@@ -234,7 +263,7 @@ Supported CPUs
 +--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
 
 Table Legend
-------------
+^^^^^^^^^^^^
 
 ========= =========================
 ✔         Supported
@@ -244,7 +273,7 @@ Table Legend
 ========= =========================
 
 Development Tools
-=================
+-----------------
 
 The following tools are provided freely to support the development of the TinyUSB project:
 
@@ -273,6 +302,5 @@ The following tools are provided freely to support the development of the TinyUS
 .. _Supported Boards: docs/reference/boards.rst
 .. _Dependencies: docs/reference/dependencies.rst
 .. _Concurrency: docs/reference/concurrency.rst
-.. _Contributing: docs/contributing/index.rst
 .. _Code of Conduct: CODE_OF_CONDUCT.rst
-.. _Porting: docs/contributing/porting.rst
+.. _Porting: docs/porting.rst
diff --git a/docs/_static/custom.css b/docs/_static/custom.css
new file mode 100644
index 000000000..d64d26047
--- /dev/null
+++ b/docs/_static/custom.css
@@ -0,0 +1,3 @@
+.clear-both {
+  clear: both;
+}
diff --git a/docs/conf.py b/docs/conf.py
index 4249d41f7..cd0338413 100755
--- a/docs/conf.py
+++ b/docs/conf.py
@@ -14,7 +14,7 @@ from pathlib import Path
 # -- Project information -----------------------------------------------------
 
 project = 'TinyUSB'
-copyright = '2024, Ha Thach'
+copyright = '2025, Ha Thach'
 author = 'Ha Thach'
 
 
@@ -41,6 +41,8 @@ html_favicon = 'assets/logo.svg'
 html_theme_options = {
     'sidebar_hide_name': True,
 }
+html_static_path = ['_static']
+html_css_files = ['custom.css']
 
 todo_include_todos = True
 
@@ -52,7 +54,9 @@ def preprocess_readme():
     if src.exists():
         content = src.read_text()
         content = re.sub(r"docs/", r"", content)
-        content = re.sub(r".rst", r".html", content)
+        content = re.sub(r"\.rst\b", r".html", content)
+        if not content.endswith("\n"):
+            content += "\n"
         tgt.write_text(content)
 
 preprocess_readme()
diff --git a/docs/contributing/code_of_conduct.rst b/docs/contributing/code_of_conduct.rst
deleted file mode 100644
index fb1859c75..000000000
--- a/docs/contributing/code_of_conduct.rst
+++ /dev/null
@@ -1 +0,0 @@
-.. include:: ../../CODE_OF_CONDUCT.rst
\ No newline at end of file
diff --git a/docs/contributing/index.rst b/docs/contributing/index.rst
deleted file mode 100644
index 78933a3ca..000000000
--- a/docs/contributing/index.rst
+++ /dev/null
@@ -1,22 +0,0 @@
-************
-Contributing
-************
-
-Contributing can be highly rewarding, but it can also be frustrating at times.
-It takes time to review patches, and as this is an open source project, that
-sometimes can take a while. The reviewing process depends on the availability
-of the maintainers, who may not be always available. Please try to be
-understanding through the process.
-
-There a few guidelines you need to keep in mind when contributing. Please have
-a look at them as that will make the contribution process easier for all
-parties.
-
-Index
-=====
-
-.. toctree::
-   :maxdepth: 2
-
-   code_of_conduct
-   porting
diff --git a/docs/contributing/porting.rst b/docs/contributing/porting.rst
deleted file mode 100644
index c3076354c..000000000
--- a/docs/contributing/porting.rst
+++ /dev/null
@@ -1,243 +0,0 @@
-
-*******
-Porting
-*******
-
-TinyUSB is designed to be a universal USB protocol stack for microcontrollers. It
-handles most of the high level USB protocol and relies on the microcontroller's USB peripheral for
-data transactions on different endpoints. Porting is the process of adding low-level support for
-the rest of the common stack. Once the low-level is implemented, it is very easy to add USB support
-for the microcontroller to other projects, especially those already using TinyUSB such as CircuitPython.
-
-Below are instructions on how to get the cdc_msc device example running on a new microcontroller. Doing so includes adding the common code necessary for other uses while minimizing other extra code. Whenever you see a phrase or word in ``<>`` it should be replaced.
-
-Register defs
--------------
-
-The first step to adding support is including the register definitions and startup code for the
-microcontroller in TinyUSB. We write the TinyUSB implementation against these structs instead of higher level functions to keep the code small and to prevent function name collisions in linking of larger projects. For ARM microcontrollers this is the CMSIS definitions. They should be
-placed in the ``hw/mcu/<vendor>/<chip_family>`` directory.
-
-Once this is done, create a directory in ``hw/bsp/<your board name>`` for the specific board you are using to test the code (duplicating an existing board's directory is the best way to get started). The board should be a readily available development board so that others can also test.
-
-Build
------
-
-Now that those directories are in place, we can start our iteration process to get the example building successfully. To build, run from the root of TinyUSB:
-
-.. code-block:: bash
-
-   make -C examples/device/cdc_msc BOARD=<board>
-
-Unless you've read ahead, this will fail miserably. Now, lets get it to fail less by updating the files in the board directory. The code in the board's directory is responsible for setting up the microcontroller's clocks and pins so that USB works. TinyUSB itself only operates on the USB peripheral. The board directory also includes information what files are needed to build the example.
-
-One of the first things to change is the ``-DCFG_TUSB_MCU`` C flag in the ``board.mk`` file. This is used to tell TinyUSB what platform is being built. So, add an entry to ``src/tusb_option.h`` and update the ``CFLAGS`` to match.
-
-Update ``board.mk``'s VENDOR and CHIP_FAMILY values when creating the directory for the struct files. Duplicate one of the other sources from ``src/portable`` into ``src/portable/<vendor>/<chip_family>`` and delete all of the implementation internals. We'll cover what everything there does later. For now, get it compiling.
-
-Implementation
---------------
-
-At this point you should get an error due to an implementation issue and hopefully the build is setup for the new MCU. You will still need to modify the ``board.mk`` to include specific ``CFLAGS``, the linker script, linker flags, source files, include directories. All file paths are relative to the top of the TinyUSB repo.
-
-Board Support (BSP)
-^^^^^^^^^^^^^^^^^^^
-
-The board support code is only used for self-contained examples and testing. It is not used when TinyUSB is part of a larger project. Its responsible for getting the MCU started and the USB peripheral clocked. It also optionally provides LED definitions that are used to blink an LED to show that the code is running.
-
-It is located in ``hw/bsp/<board name>/board_<board name>.c``.
-
-``board_init()``
-~~~~~~~~~~~~~~~~
-
-``board_init()`` is responsible for starting the MCU, setting up the USB clock and USB pins. It is also responsible for initializing LED pins.
-
-One useful clock debugging technique is to set up a PWM output at a known value such as 500hz based on the USB clock so that you can verify it is correct with a logic probe or oscilloscope.
-
-Setup your USB in a crystal-less mode when available. That makes the code easier to port across boards.
-
-``board_led_write()``
-~~~~~~~~~~~~~~~~~~~~~
-
-Feel free to skip this until you want to verify your demo code is running. To implement, set the pin corresponding to the led to output a value that lights the LED when ``state`` is true.
-
-OS Abstraction Layer (OSAL)
-^^^^^^^^^^^^^^^^^^^^^^^^^^^
-
-The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts. The code is almost entirely agnostic of MCU and lives in ``src/osal``.
-
-In RTOS configurations, ``tud_task()``/``tuh_task()`` blocks behind a synchronization structure when the event queue is empty, so that the scheduler may give the CPU to a different task. To take advantage of the library's capability to yield the CPU when there are no actionable USB device events, ensure that the ``CFG_TUSB_OS`` symbol is defined, e.g ``OPT_OS_FREERTOS`` enables the FreeRTOS scheduler to schedule other threads than that which calls ``tud_task()``/``tuh_task()``.
-
-Device API
-^^^^^^^^^^
-
-After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task()``). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing.
-
-All of the code for the low-level device API is in ``src/portable/<vendor>/<chip family>/dcd_<chip family>.c``.
-
-Device Setup
-~~~~~~~~~~~~
-
-``dcd_init()``
-""""""""""""""
-
-Initializes the USB peripheral for device mode and enables it.
-This function should enable internal D+/D- pull-up for enumeration.
-
-``dcd_int_enable()`` / ``dcd_int_disable()``
-""""""""""""""""""""""""""""""""""""""""""""
-
-Enables or disables the USB device interrupt(s). May be used to prevent concurrency issues when mutating data structures shared between main code and the interrupt handler.
-
-``dcd_int_handler()``
-"""""""""""""""""""""
-
-Processes all the hardware generated events e.g Bus reset, new data packet from host etc ... It will be called by application in the MCU USB interrupt handler.
-
-``dcd_set_address()``
-"""""""""""""""""""""
-
-Called when the device is given a new bus address.
-
-If your peripheral automatically changes address during enumeration (like the nrf52) you may leave this empty and also no queue an event for the corresponding SETUP packet.
-
-``dcd_remote_wakeup()``
-"""""""""""""""""""""""
-
-Called to remote wake up host when suspended (e.g hid keyboard)
-
-``dcd_connect()`` / ``dcd_disconnect()``
-""""""""""""""""""""""""""""""""""""""""
-
-Connect or disconnect the data-line pull-up resistor. Define only if MCU has an internal pull-up. (BSP may define for MCU without internal pull-up.)
-
-Special events
-~~~~~~~~~~~~~~
-
-You must let TinyUSB know when certain events occur so that it can continue its work. There are a few methods you can call to queue events for TinyUSB to process.
-
-``dcd_event_bus_signal()``
-""""""""""""""""""""""""""
-
-There are a number of events that your peripheral may communicate about the state of the bus. Here is an overview of what they are. Events in **BOLD** must be provided for TinyUSB to work.
-
-
-* **DCD_EVENT_RESET** - Triggered when the host resets the bus causing the peripheral to reset. Do any other internal reset you need from the interrupt handler such as resetting the control endpoint.
-* DCD_EVENT_SOF - Signals the start of a new USB frame.
-
-Calls to this look like:
-
-.. code-block:: c
-
-   dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
-
-
-The first ``0`` is the USB peripheral number. Statically saying ``0`` is common for single USB device MCUs.
-
-The ``true`` indicates the call is from an interrupt handler and will always be the case when porting in this way.
-
-``dcd_setup_received()``
-""""""""""""""""""""""""
-
-SETUP packets are a special type of transaction that can occur at any time on the control endpoint, numbered ``0``. Since they are unique, most peripherals have special handling for them. Their data is always 8 bytes in length as well.
-
-Calls to this look like:
-
-.. code-block:: c
-
-   dcd_event_setup_received(0, setup, true);
-
-
-As before with ``dcd_event_bus_signal()`` the first argument is the USB peripheral number and the third is true to signal its being called from an interrupt handler. The middle argument is byte array of length 8 with the contents of the SETUP packet. It can be stack allocated because it is copied into the queue.
-
-Endpoints
-~~~~~~~~~
-
-Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below.
-
-Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides ``tu_edpt_number()`` and ``tu_edpt_dir()`` to unpack this data from the address. Here is a snippet that does it.
-
-.. code-block:: c
-
-   uint8_t epnum = tu_edpt_number(ep_addr);
-   uint8_t dir   = tu_edpt_dir(ep_addr);
-
-
-``dcd_edpt_open()``
-"""""""""""""""""""
-
-Opening an endpoint is done for all non-control endpoints once the host picks a configuration that the device should use. At this point, the endpoint should be enabled in the peripheral and configured to match the endpoint descriptor. Pay special attention to the direction of the endpoint you can get from the helper methods above. It will likely change what registers you are setting.
-
-Also make sure to enable endpoint specific interrupts.
-
-``dcd_edpt_close()``
-""""""""""""""""""""
-
-Close an endpoint. his function is used for implementing alternate settings.
-
-After calling this, the device should not respond to any packets directed towards this endpoint. When called, this function must abort any transfers in progress through this endpoint, before returning.
-
-Implementation is optional. Must be called from the USB task. Interrupts could be disabled or enabled during the call.
-
-``dcd_edpt_xfer()``
-"""""""""""""""""""
-
-``dcd_edpt_xfer()`` is responsible for configuring the peripheral to send or receive data from the host. "xfer" is short for "transfer". **This is one of the core methods you must implement for TinyUSB to work (one other is the interrupt handler).**  Data from the host is the OUT direction and data to the host is IN. It  is used for all endpoints including the control endpoint 0. Make sure to handle the zero-length packet STATUS packet on endpoint 0 correctly. It may be a special transaction to the peripheral.
-
-Besides that, all other transactions are relatively straight-forward. The endpoint address provides the endpoint
-number and direction which usually determines where to write the buffer info. The buffer and its length are usually
-written to a specific location in memory and the peripheral is told the data is valid. (Maybe by writing a 1 to a
-register or setting a counter register to 0 for OUT or length for IN.)
-
-The transmit buffer alignment is determined by ``CFG_TUSB_MEM_ALIGN``.
-
-One potential pitfall is that the buffer may be longer than the maximum endpoint size of one USB
-packet. Some peripherals can handle transmitting multiple USB packets for a provided buffer (like the SAMD21).
-Others (like the nRF52) may need each USB packet queued individually. To make this work you'll need to track
-some state for yourself and queue up an intermediate USB packet from the interrupt handler.
-
-Once the transaction is going, the interrupt handler will notify TinyUSB of transfer completion.
-During transmission, the IN data buffer is guaranteed to remain unchanged in memory until the ``dcd_xfer_complete()`` function is called.
-
-The ``dcd_edpt_xfer()`` function must never add zero-length-packets (ZLP) on its own to a transfer. If a ZLP is required,
-then it must be explicitly sent by the stack calling ``dcd_edpt_xfer()``, by calling ``dcd_edpt_xfer()`` a second time with len=0.
-For control transfers, this is automatically done in ``usbd_control.c``.
-
-At the moment, only a single buffer can be transmitted at once. There is no provision for double-buffering. new ``dcd_edpt_xfer()`` will not
-be called again on the same endpoint address until the driver calls ``dcd_xfer_complete()`` (except in cases of USB resets).
-
-``dcd_xfer_complete()``
-"""""""""""""""""""""""
-
-Once a transfer completes you must call ``dcd_xfer_complete()`` from the USB interrupt handler to let TinyUSB know that a transaction has completed. Here is a sample call:
-
-.. code-block:: c
-
-   dcd_event_xfer_complete(0, ep_addr, xfer->actual_len, XFER_RESULT_SUCCESS, true);
-
-
-The arguments are:
-
-
-* the USB peripheral number
-* the endpoint address
-* the actual length of the transfer. (OUT transfers may be smaller than the buffer given in ``dcd_edpt_xfer()``)
-* the result of the transfer. Failure isn't handled yet.
-* ``true`` to note the call is from an interrupt handler.
-
-``dcd_edpt_stall()`` / ``dcd_edpt_clear_stall()``
-"""""""""""""""""""""""""""""""""""""""""""""""""
-
-Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The pair of ``dcd_edpt_stall()``, ``dcd_edpt_clear_stall()`` help manage the stall state of all endpoints.
-
-Woohoo!
--------
-
-At this point you should have everything working! 🙂 Of course, you may not write perfect code. Here are some tips and tricks for debugging.
-
-Use `WireShark <https://www.wireshark.org/>`_ or `a Beagle <https://www.totalphase.com/protocols/usb/>`_ to sniff the USB traffic. When things aren't working its likely very early in the USB enumeration process. Figuring out where can help clue in where the issue is. For example:
-
-
-* If the host sends a SETUP packet and its not ACKed then your USB peripheral probably isn't started correctly.
-* If the peripheral is started correctly but it still didn't work, then verify your usb clock is correct. (You did output a PWM based on it right? 🙂)
-* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example ``tud_task()`` may not be called.) If that's OK, the ``dcd_xfer_complete()`` may not be setting up the next transaction correctly.
diff --git a/docs/faq.rst b/docs/faq.rst
index ade51a379..a5fe09495 100644
--- a/docs/faq.rst
+++ b/docs/faq.rst
@@ -7,7 +7,7 @@ General Questions
 
 **Q: What microcontrollers does TinyUSB support?**
 
-TinyUSB supports 30+ MCU families including STM32, RP2040, NXP (iMXRT, Kinetis, LPC), Microchip SAM, Nordic nRF5x, ESP32, and many others. See :doc:`reference/boards` for the complete list.
+TinyUSB supports 50+ MCU families including STM32, RP2040, NXP (iMXRT, Kinetis, LPC), Microchip SAM, Nordic nRF5x, ESP32, and many others. See :doc:`reference/boards` for the complete list.
 
 **Q: Can I use TinyUSB in commercial projects?**
 
@@ -178,33 +178,3 @@ ESP32-S3 has specific USB implementation challenges:
 - Check power supply requirements for host mode
 - Some features may be limited compared to other MCUs
 - Use ESP32-S3 specific examples and documentation
-
-STM32CubeIDE Integration
-========================
-
-**Q: How do I integrate TinyUSB with STM32CubeIDE?**
-
-1. In STM32CubeMX, enable USB_OTG_FS/HS under Connectivity, set to "Device_Only" mode
-2. Enable the USB global interrupt in NVIC Settings
-3. Add ``tusb.h`` include and call ``tusb_init()`` in main.c
-4. Call ``tud_task()`` in your main loop
-5. In the generated ``stm32xxx_it.c``, modify the USB IRQ handler to call ``tud_int_handler(0)``
-6. Create ``tusb_config.h`` and ``usb_descriptors.c`` files
-
-**Q: STM32CubeIDE generated code conflicts with TinyUSB**
-
-Don't use STM32's built-in USB middleware (USB Device Library) when using TinyUSB. Disable USB code generation in STM32CubeMX and let TinyUSB handle all USB functionality.
-
-**Q: STM32 USB interrupt handler setup**
-
-Replace the generated USB interrupt handler with a call to TinyUSB:
-
-.. code-block:: c
-
-   void OTG_FS_IRQHandler(void) {
-     tud_int_handler(0);
-   }
-
-**Q: Which STM32 families work best with TinyUSB?**
-
-STM32F4, F7, and H7 families have the most mature TinyUSB support. STM32F0, F1, F3, L4 families are also supported but may have more limitations. Check the supported boards list for your specific variant.
\ No newline at end of file
diff --git a/docs/getting_started.rst b/docs/getting_started.rst
index 32c80b91c..0c3fcec80 100644
--- a/docs/getting_started.rst
+++ b/docs/getting_started.rst
@@ -2,14 +2,39 @@
 Getting Started
 ***************
 
-This guide will get you up and running with TinyUSB quickly. We'll start with working examples, then show you how to integrate TinyUSB into your own projects.
+This guide will get you up and running with TinyUSB quickly with working examples.
+
+Project Structure
+====================
+
+TinyUSB separates example applications from board-specific hardware configurations:
+
+* **Example applications**: Located in `examples/ <https://github.com/hathach/tinyusb/tree/master/examples/>`_ directories
+* **Board Support Packages (BSP)**: Located in ``hw/bsp/FAMILY/boards/BOARD_NAME/`` with hardware abstraction including pin mappings, clock settings, and linker scripts
+* **Build system**: Located in `examples/build_system/ <https://github.com/hathach/tinyusb/tree/master/examples/build_system>`_ which supports both Make and CMake. Though some MCU families such as espressif or rp2040 only support cmake
+
+For example, stm32h743eval is located in `hw/bsp/stm32h7/boards/stm32h743eval <https://github.com/hathach/tinyusb/tree/master/hw/bsp/stm32h7/boards/stm32h743eval>`_ where ``FAMILY=stm32h7`` and ``BOARD=stm32h743eval``. When you build with ``BOARD=stm32h743eval``, the build system automatically finds the corresponding BSP using the FAMILY.
+
+For guidance on integrating TinyUSB into your own firmware (configuration, descriptors, initialization, and callback workflow), see :doc:`integration`.
 
 Quick Start Examples
 ====================
 
 The fastest way to understand TinyUSB is to see it working. These examples demonstrate core functionality and can be built immediately.
 
-We'll assume you are using the stm32f407disco board. For other boards, see ``Board Support Packages`` below.
+We'll assume you are using the **STM32H743 Eval board** (BOARD=stm32h743eval) under the **stm32h7** family. For other boards, see ``Board Support Packages`` below.
+
+Get the Code
+------------
+
+.. code-block:: bash
+
+   $ git clone https://github.com/hathach/tinyusb tinyusb
+   $ cd tinyusb
+   $ python tools/get_deps.py -b stm32h743eval  # or python tools/get_deps.py stm32h7
+
+.. note::
+   For rp2040 `pico-sdk <https://github.com/raspberrypi/pico-sdk>`_ or `esp-idf <https://github.com/espressif/esp-idf>`_ for Espressif targets are required; install them per vendor instructions.
 
 Simple Device Example
 ---------------------
@@ -17,20 +42,33 @@ Simple Device Example
 The `cdc_msc <https://github.com/hathach/tinyusb/tree/master/examples/device/cdc_msc>`_ example creates a USB device with both a virtual serial port (CDC) and mass storage (MSC).
 
 **What it does:**
+
 * Appears as a serial port that echoes back any text you send
 * Appears as a small USB drive with a README.TXT file
 * Blinks an LED to show activity
 
-**Build and run:**
+**Build and run with CMake:**
+
+.. code-block:: bash
+
+   $ cd examples/device/cdc_msc
+   $ cmake -DBOARD=stm32h743eval -B build # add "-G Ninja" to use Ninja build
+   $ cmake --build build
+   # cmake --build build --target cdc_msc-jlink
+
+.. tip::
+   Flashed/Debugger can be selected with --target ``-jlink``, ``-stlink`` or ``-openocd`` depending on your board. Use ``--target help`` to list all supported targets.
+
+**Build and run with Make:**
 
 .. code-block:: bash
 
-   $ git clone https://github.com/hathach/tinyusb tinyusb
-   $ cd tinyusb
-   $ python tools/get_deps.py stm32f4  # download dependencies, note ESP and RP2 need their SDKs, too
    $ cd examples/device/cdc_msc
-   $ cmake -DBOARD=stm32f407disco -B build  # add "-G Ninja ." on Windows
-   $ cmake --build build  # add "--target cdc_msc-jlink" for flashing using J-Link, "--target help" to list targets
+   $ make BOARD=stm32h743eval all
+   $ make BOARD=stm32h743eval flash-jlink
+
+.. tip::
+   Flashed/Debugger can be selected with target ``flash-jlink``, ``flash-stlink`` or ``flash-openocd`` depending on your board.
 
 Connect the device to your computer and you'll see both a new serial port and a small USB drive appear.
 
@@ -40,113 +78,91 @@ Simple Host Example
 The `cdc_msc_hid <https://github.com/hathach/tinyusb/tree/master/examples/host/cdc_msc_hid>`_ example creates a USB host that can connect to USB devices with CDC, MSC, or HID interfaces.
 
 **What it does:**
+
 * Detects and enumerates connected USB devices
 * Communicates with CDC devices (like USB-to-serial adapters)
 * Reads from MSC devices (like USB drives)
 * Receives input from HID devices (like keyboards and mice)
 
-**Build and run:**
+**Build and run with CMake:**
 
 .. code-block:: bash
 
-   $ # initial setup see previous example
    $ cd examples/host/cdc_msc_hid
-   $ cmake -DBOARD=stm32f407disco -B build  # add "-G Ninja ." on Windows
-   $ cmake --build build  # add "--target cdc_msc_hid-jlink" for flashing using J-Link, "--target help" to list targets
-
-Connect USB devices to see enumeration messages and device-specific interactions in the serial output.
-
-Project Structure
------------------
-
-TinyUSB separates example applications from board-specific hardware configurations:
-
-* **Example applications**: Located in `examples/device/ <https://github.com/hathach/tinyusb/tree/master/examples/device>`_, `examples/host/ <https://github.com/hathach/tinyusb/tree/master/examples/host>`_, and `examples/dual/ <https://github.com/hathach/tinyusb/tree/master/examples/dual>`_ directories
-* **Board Support Packages (BSP)**: Located in ``hw/bsp/FAMILY/boards/BOARD_NAME/`` with hardware abstraction including pin mappings, clock settings, and linker scripts
-
-For example, raspberry_pi_pico is located in `hw/bsp/rp2040/boards/raspberry_pi_pico <https://github.com/hathach/tinyusb/tree/master/hw/bsp/rp2040/boards/raspberry_pi_pico>`_ where ``FAMILY=rp2040`` and ``BOARD=raspberry_pi_pico``. When you build with ``BOARD=raspberry_pi_pico``, the build system automatically finds the corresponding BSP using the FAMILY.
-
-Add TinyUSB to Your Project
-============================
+   $ cmake -DBOARD=stm32h743eval -B build
+   $ cmake --build build
 
-Once you've seen TinyUSB working, here's how to integrate it into your own project:
+**Build and run with Make:**
 
-Integration Steps
------------------
+.. code-block:: bash
 
-1. **Get TinyUSB**: Copy this repository or add it as a git submodule to your project at ``your_project/tinyusb``
+   $ cd examples/host/cdc_msc_hid
+   $ make BOARD=stm32h743eval all
+   $ make BOARD=stm32h743eval flash-jlink
 
-2. **Add source files**: Add all ``.c`` files from ``tinyusb/src/`` to your project
+Connect USB devices to see enumeration messages and device-specific interactions in the serial output.
 
-3. **Configure include paths**: Add ``your_project/tinyusb/src`` to your include path. Ensure your include path contains ``tusb_config.h``
+Additional Build Options
+------------------------
 
-4. **Configure TinyUSB**: Create ``tusb_config.h`` with required macros like ``CFG_TUSB_MCU`` and ``CFG_TUSB_OS``. Copy from ``examples/device/*/tusb_config.h`` as a starting point
+Debug and Logging
+^^^^^^^^^^^^^^^^^
 
-5. **Implement USB descriptors**: For device stack, implement all ``tud_descriptor_*_cb()`` callbacks
+TinyUSB built-in logging can be enabled by setting `CFG_TUSB_DEBUG` which is done by passing ``LOG=level``. The higher the level, the more verbose the logging.
 
-6. **Initialize TinyUSB**: Add ``tusb_init()`` to your initialization code
+In addition to traditional hw uart as default, logging with debugger such as `Segger RTT <https://www.segger.com/products/debug-probes/j-link/technology/about-real-time-transfer/>`_ (10x faster) is also supported with `LOGGER=rtt` option.
 
-7. **Handle interrupts**: Call ``tusb_int_handler()`` from your USB IRQ handler
+.. code-block:: bash
 
-8. **Run USB tasks**: Call ``tud_task()`` (device) or ``tuh_task()`` (host) periodically in your main loop
+   $ cmake -B build -DBOARD=stm32h743eval -DLOG=2               # logging level 2 with uart
+   $ cmake -B build -DBOARD=stm32h743eval -DLOG=2 -DLOGGER=rtt  # logging level 2 with RTT
 
-9. **Implement class callbacks**: Implement callbacks for enabled USB classes
+.. code-block:: bash
 
-Simple Integration Example
---------------------------
+   $ make BOARD=stm32h743eval LOG=2 all              # logging level 2 with uart
+   $ make BOARD=stm32h743eval LOG=2 LOGGER=rtt all   # logging level 2 with RTT
 
-.. code-block:: c
+RootHub Port Selection
+^^^^^^^^^^^^^^^^^^^^^^
 
-   #include "tusb.h"
+Some boards support multiple usb controllers (roothub ports), by default one rh port is used as device, another as host in ``board.mk/board.cmake``. This can be overridden with option ``RHPORT_DEVICE=n`` or ``RHPORT_HOST=n`` To choose another port. For example to select the HS port of a STM32F746Disco board, use:
 
-   int main(void) {
-     board_init();  // Your board initialization
+.. code-block:: bash
 
-     tusb_rhport_init_t dev_init = {
-       .role = TUSB_ROLE_DEVICE,
-       .speed = TUSB_SPEED_AUTO
-     };
-     // tud_descriptor_* callbacks omitted here
-     tusb_init(0, &dev_init);
+   $ cmake -B build -DBOARD=stm32h743eval -DRHPORT_DEVICE=1 # select roothub port 1 as device
 
-     while(1) {
-       tud_task();           // TinyUSB device task
-       your_application();   // Your application code
-     }
-   }
+.. code-block:: bash
 
-   void USB_IRQHandler(void) {
-     tusb_int_handler(0, true);
-   }
+   $ make BOARD=stm32h743eval RHPORT_DEVICE=1 all # select roothub port 1 as device
 
-.. note::
-   Unlike many libraries, TinyUSB callbacks don't need to be explicitly registered. The stack automatically calls functions with specific names (e.g., ``tud_cdc_rx_cb()``) when events occur. Simply implement the callbacks you need.
+RootHub Port Speed
+^^^^^^^^^^^^^^^^^^
 
-.. note::
-   TinyUSB uses consistent naming prefixes: ``tud_`` for device stack functions and ``tuh_`` for host stack functions. See the :doc:`reference/glossary` for more details.
+A MCU can support multiple operational speed. By default, the example build system will use the fastest supported on the board. Use option ``RHPORT_DEVICE_SPEED=OPT_MODE_FULL/HIGH_SPEED/`` or ``RHPORT_HOST_SPEED=OPT_MODE_FULL/HIGH_SPEED/`` e.g To force operating speed
 
-Development Tips
-================
+.. code-block:: bash
 
-**Debug builds and logging:**
+   $ cmake -B build -DBOARD=stm32h743eval -DRHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED
 
 .. code-block:: bash
 
-   $ cmake -DBOARD=stm32f407disco -DDEBUG=1 ...   # Debug build
-   $ cmake -DBOARD=stm32f407disco -DLOG=2 ...     # Enable detailed logging
+   $ make BOARD=stm32h743eval RHPORT_DEVICE_SPEED=OPT_MODE_FULL_SPEED all
+
 
-**IAR Embedded Workbench:**
+IAR Embedded Workbench
+----------------------
 
 For IAR users, project connection files are available. Import `tools/iar_template.ipcf <https://github.com/hathach/tinyusb/tree/master/tools/iar_template.ipcf>`_ or use native CMake support (IAR 9.50.1+). See `tools/iar_gen.py <https://github.com/hathach/tinyusb/tree/master/tools/iar_gen.py>`_ for automated project generation.
 
+
 Common Issues and Solutions
-===========================
+---------------------------
 
 **Build Errors**
 
 * **"arm-none-eabi-gcc: command not found"**: Install ARM GCC toolchain: ``sudo apt-get install gcc-arm-none-eabi``
 * **"Board 'X' not found"**: Check the available boards in ``hw/bsp/FAMILY/boards/`` or run ``python tools/build.py -l``
-* **Missing dependencies**: Run ``python tools/get_deps.py FAMILY`` where FAMILY matches your board
+* **Missing dependencies**: Run ``python tools/get_deps.py FAMILY`` where FAMILY matches your board or ``python tools/get_deps.py -b BOARD``
 
 **Runtime Issues**
 
@@ -166,6 +182,7 @@ Some examples require udev permissions to access USB devices:
 Next Steps
 ==========
 
+* Check :doc:`integration` for integrating TinyUSB into your own firmware
 * Check :doc:`reference/boards` for board-specific information
 * Explore more examples in `examples/device/ <https://github.com/hathach/tinyusb/tree/master/examples/device>`_ and `examples/host/ <https://github.com/hathach/tinyusb/tree/master/examples/host>`_ directories
 * Read :doc:`reference/usb_concepts` to understand USB fundamentals
diff --git a/docs/index.rst b/docs/index.rst
index ac10dbfd7..39d30a038 100644
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -1,45 +1,21 @@
-TinyUSB Documentation
-=====================
-
-TinyUSB is an open-source cross-platform USB Host/Device stack for embedded systems, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events deferred to non-ISR task functions.
-
-For Developers
---------------
-
-TinyUSB provides a complete USB stack implementation supporting both device and host modes across a wide range of microcontrollers. The stack is designed for resource-constrained embedded systems with emphasis on code size, memory efficiency, and real-time performance.
-
-**Key Features:**
-
-* **Thread-safe design**: All USB interrupts are deferred to task context
-* **Memory-safe**: No dynamic allocation, all buffers are statically allocated
-* **Portable**: Supports 30+ MCU families from major vendors
-* **Comprehensive**: Device classes (CDC, HID, MSC, Audio, etc.) and Host stack
-* **RTOS support**: Works with bare metal, FreeRTOS, RT-Thread, and Mynewt
-
-**Quick Navigation:**
-
-* New to TinyUSB? Start with :doc:`getting_started` and :doc:`reference/glossary`
-* Want to understand the design? Read :doc:`reference/architecture` and :doc:`reference/usb_concepts`
-* Having issues? Check :doc:`faq` and :doc:`troubleshooting`
-
-Documentation Structure
------------------------
+.. include:: ../README_processed.rst
 
 .. toctree::
    :maxdepth: 2
    :caption: Information
 
    getting_started
+   integration
+   porting
+   reference/index
    faq
    troubleshooting
-   reference/index
 
 .. toctree::
    :maxdepth: 1
    :caption: Project Info
 
    info/index
-   contributing/index
 
 .. toctree::
    :caption: External Links
@@ -48,8 +24,3 @@ Documentation Structure
    Source Code <https://github.com/hathach/tinyusb>
    Issue Tracker <https://github.com/hathach/tinyusb/issues>
    Discussions <https://github.com/hathach/tinyusb/discussions>
-
-GitHub Project Main README
-==========================
-
-.. include:: ../README_processed.rst
diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst
index b4423f81e..d6bf846ed 100644
--- a/docs/info/changelog.rst
+++ b/docs/info/changelog.rst
@@ -20,6 +20,7 @@ API Changes
 -----------
 
 - Core APIs
+
   - Add weak callbacks with new syntax for better compiler compatibility
   - Add ``tusb_deinit()`` to cleanup stack
   - Add time functions: ``tusb_time_millis_api()`` and ``tusb_time_delay_ms_api()``
@@ -27,6 +28,7 @@ API Changes
   - Introduce ``xfer_isr()`` callback for ISO transfer optimization in device classes
 
 - Device APIs
+
   - CDC: Add notification support ``tud_cdc_configure()``, ``tud_cdc_n_notify_uart_state()``,
     ``tud_cdc_n_notify_conn_speed_change()``, ``tud_cdc_notify_complete_cb()``
   - MSC: Add ``tud_msc_inquiry2_cb()`` with bufsize parameter, update ``tud_msc_async_io_done()``
@@ -36,6 +38,7 @@ API Changes
     ``tud_mtp_response_send()``, ``tud_mtp_event_send()``
 
 - Host APIs
+
   - Core: Add ``tuh_edpt_close()``, ``tuh_address_set()``, ``tuh_descriptor_get_device_local()``,
     ``tuh_descriptor_get_string_langid()``, ``tuh_connected()``, ``tuh_bus_info_get()``
   - Add enumeration callbacks: ``tuh_enum_descriptor_device_cb()``,
@@ -50,6 +53,7 @@ Controller Driver (DCD & HCD)
 -----------------------------
 
 - DWC2
+
   - Support DWC2 v4.30a with improved reset procedure
   - Fix core reset: wait for AHB idle before reset
   - Add STM32 DWC2 data cache support with proper alignment
@@ -64,6 +68,7 @@ Controller Driver (DCD & HCD)
   - Refactor bitfields for better code generation
 
 - FSDEV (STM32)
+
   - Fix AT32 compile issues after single-buffered endpoint changes
   - Add configurable single-buffered isochronous endpoints
   - Fix STM32H7 recurrent suspend ISR
@@ -72,35 +77,42 @@ Controller Driver (DCD & HCD)
   - Improve PMA size handling for STM32U0
 
 - EHCI
+
   - Fix removed QHD getting reused
   - Fix NXP USBPHY disconnection detection
 
 - Chipidea/NXP
+
   - Fix race condition with spinlock
   - Improve iMXRT support: fix build, disable BOARD_ConfigMPU, fix attach debouncing on port1 highspeed
   - Fix iMXRT1064 and add to HIL test pool
 
 - MAX3421E
+
   - Use spinlock for thread safety instead of atomic flag
   - Implement ``hcd_edpt_close()``
 
 - RP2040
+
   - Fix audio ISO transfer: reset state before notifying stack
   - Fix CMake RTOS cache variable
   - Abort transfer if active in ``iso_activate()``
 
 - SAMD
+
   - Add host controller driver support
 
 Device Stack
 ------------
 
 - USBD Core
+
   - Introduce ``xfer_isr()`` callback for interrupt-time transfer handling
   - Add ``usbd_edpt_xfer_fifo()`` stub
   - Revert endpoint busy/claim status if ``xfer_isr()`` defers to ``xfer_cb()``
 
 - Audio
+
   - Major simplification of UAC driver and alt settings management
   - Move ISO transfers into ``xfer_isr()`` for better performance
   - Remove FIFO mutex (single producer/consumer optimization)
@@ -109,25 +121,30 @@ Device Stack
   - Update buffer macros with cache line size alignment
 
 - CDC
+
   - Add notification support: ``CFG_TUD_CDC_NOTIFY``, ``tud_cdc_n_notify_conn_speed_change()``, ``tud_cdc_notify_complete_cb()``
   - Reduce default bInterval from 16ms to 1ms for better responsiveness
   - Rename ``tud_cdc_configure_fifo()`` to ``tud_cdc_configure()`` and add ``tx_overwritable_if_not_connected`` option
   - Fix web serial robustness with major overhaul and logic cleanup
 
 - HID
+
   - Add Usage Page and Table for Power Devices (0x84 - 0x85)
   - Fix HID descriptor parser variable size and 4-byte item handling
   - Add consumer page configurations
 
 - MIDI
+
   - Fix MIDI interface descriptor handling after audio streaming interface
   - Skip RX data with all zeroes
 
 - MSC
+
   - Add async I/O support for MSC using ``tud_msc_async_io_done()``
   - Add ``tud_msc_inquiry2_cb()`` with bufsize for full inquiry response
 
 - MTP
+
   - Add new Media Transfer Protocol (MTP) device class driver
   - Support MTP operations: GetDeviceInfo, SendObjectInfo, SendObject
   - Add MTP event support with ``tud_mtp_event_send()``
@@ -135,13 +152,16 @@ Device Stack
   - Add hardware-in-the-loop testing support
 
 - NCM
+
   - Add USB NCM link state control support
   - Fix DHCP offer/ACK destination
 
 - USBTMC
+
   - Add vendor-specific message support
 
 - Vendor
+
   - Fix vendor device reset and open issues
   - Fix descriptor parsing for ``CFG_TUD_VENDOR > 1``
   - Fix vendor FIFO argument calculation
@@ -150,6 +170,7 @@ Host Stack
 ----------
 
 - USBH Core
+
   - Major enumeration improvements:
     - Fix enumeration racing conditions
     - Add proper attach debouncing with hub/rootport handling (200ms delay)
@@ -173,6 +194,7 @@ Host Stack
   - Force removed devices in same bus info before setting address
 
 - CDC Serial Host
+
   - Major refactor to generalize CDC serial drivers (FTDI, CP210x, CH34x, PL2303, ACM)
   - Add explicit ``sync()`` API with ``TU_API_SYNC()`` returning ``tusb_xfer_result_t``
   - Rename ``tuh_cdc_get_local_line_coding()`` to ``tuh_cdc_get_line_coding_local()``
@@ -180,6 +202,7 @@ Host Stack
   - Implement ``tuh_cdc_get/set_dtr/rts()`` as inline functions
 
 - MIDI Host
+
   - Major API changes:
     - Rename ``tuh_midi_stream_flush()`` to ``tuh_midi_write_flush()``
     - Add ``tuh_midi_packet_read_n()`` and ``tuh_midi_packet_write_n()``
@@ -189,9 +212,11 @@ Host Stack
   - Add ``tuh_midi_descriptor_cb()`` and ``tuh_midi_itf_get_info()``
 
 - MSC Host
+
   - Continue async I/O improvements
 
 - HID Host
+
   - Fix version string to actually show version
 
 0.18.0
@@ -226,6 +251,7 @@ Controller Driver (DCD & HCD)
 -----------------------------
 
 - DWC2
+
   - Add DMA support for both device and host controller
   - Add host driver support including: full/high speed, control/bulk/interrupt (CBI) transfer, split CBI i.e FS/LS attached via highspeed hub, hub support
 
@@ -695,6 +721,7 @@ Controller Driver (DCD & HCD)
 -----------------------------
 
 - [DWC2] Generalize synopsys dwc2 with synopsys/dwc2 which support both FS and HS phy (UTMI and ULPI) for various MCUs.
+
   - Broadcom 28/27xx on raspberrypi SBC
   - Silicon Labs EFM32
   - Espressif ESP32 Sx
@@ -916,6 +943,7 @@ HID
 - Add more hid keys constant from 0x6B to 0xA4
 
 - [Breaking] rename API
+
   - ``HID_PROTOCOL_NONE/KEYBOARD/MOUSE`` to ``HID_ITF_PROTOCOL_NONE/KEYBOARD/MOUSE``
   - ``tud_hid_boot_mode()`` to ``tud_hid_get_protocol()``
   - ``tud_hid_boot_mode_cb()`` to ``tud_hid_set_protocol_cb()``
@@ -925,6 +953,7 @@ MIDI
 - Fix MIDI buffer overflow issue
 
 - [Breaking] rename API
+
   - Rename ``tud_midi_read()`` to ``tud_midi_stream_read()``
   - Rename ``tud_midi_write()`` to ``tud_midi_stream_write()``
   - Rename ``tud_midi_receive()`` to ``tud_midi_packet_read()``
@@ -1075,15 +1104,19 @@ Device Controller Driver
 - Use ``dcd_event_bus_reset()`` with link speed to replace bus_signal
 
 - ESP32-S2:
+
   - Add bus suspend and wakeup support
 
 - SAMD21:
+
   - Fix (walkaround) samd21 setup_packet overflow by USB DMA
 
 - STM32 Synopsys:
+
   - Rework USB FIFO allocation scheme and allow RX FIFO size reduction
 
 - Sony CXD56
+
   - Update Update Spresense SDK to 2.0.2
   - Fix dcd issues with setup packets
   - Correct EP number for cdc_msc example
@@ -1100,19 +1133,24 @@ USB Device
 **Class Driver**
 
 - CDC
+
   - Allow to transmit data, even if the host does not support control line states i.e set DTR
 
 - HID
+
   - change default ``CFG_TUD_HID_EP_BUFSIZE`` from 16 to 64
 
 - MIDI
+
   - Fix midi sysex sending bug
 
 - MSC
+
   - Invoke only scsi complete callback after status transaction is complete.
   - Fix ``scsi_mode_sense6_t`` padding, which cause IAR compiler internal error.
 
 - USBTMC
+
   - Change interrupt endpoint example size to 8 instead of 2 for better compatibility with mcu
 
 **Example**
@@ -1154,6 +1192,7 @@ Device Controller Driver
 - Enhance STM32 Synopsys
 
 - Support bus events disconnection/suspend/resume/wakeup
+
   - Improve transfer performance with optimizing xfer and fifo size
   - Support Highspeed port (OTG_HS) with both internal and external PHY
   - Support multiple usb ports with rhport=1 is highspeed on selected MCUs e.g H743, F23. It is possible to have OTG_HS to run on Fullspeed PHY (e.g lacking external PHY)
@@ -1163,6 +1202,7 @@ Device Controller Driver
   - Support F105, F107
 
 - Enhance STM32 fsdev
+
   - Improve dcd fifo allocation
   - Fix ISTR race condition
   - Support remap USB IRQ on supported MCUs
@@ -1171,6 +1211,7 @@ Device Controller Driver
 - Enhance NUC 505: enhance set configure behavior
 
 - Enhance SAMD
+
   - Fix race condition with setup packet
   - Add SAMD11 option ``OPT_MCU_SAMD11``
   - Add SAME5x option ``OPT_MCU_SAME5X``
@@ -1178,6 +1219,7 @@ Device Controller Driver
 - Fix SAMG control data toggle and stall race condition
 
 - Enhance nRF
+
   - Fix hanged when ``tud_task()`` is called within critical section (disabled interrupt)
   - Fix disconnect bus event not submitted
   - Implement ISO transfer and ``dcd_edpt_close()``
@@ -1203,6 +1245,7 @@ USB Device
 - Improve USB Highspeed support with actual link speed detection with ``dcd_event_bus_reset()``
 
 - Enhance class driver management
+
   - ``usbd_driver_open()`` add max length argument, and return length of interface (0 for not supported). Return value is used for finding appropriate driver
   - Add application implemented class driver via ``usbd_app_driver_get_cb()``
   - IAD is handled to assign driver id
@@ -1219,11 +1262,13 @@ USB Device
 - USBTMC: fix descriptors when INT EP is disabled
 
 - CDC:
+
   - Send zero length packet for end of data when needed
   - Add ``tud_cdc_tx_complete_cb()`` callback
   - Change ``tud_cdc_n_write_flush()`` return number of bytes forced to transfer, and flush when writing enough data to fifo
 
 - MIDI:
+
   - Add packet interface
   - Add multiple jack descriptors
   - Fix MIDI driver for sysex
@@ -1231,12 +1276,14 @@ USB Device
 - DFU Runtime: fix response to SET_INTERFACE and DFU_GETSTATUS request
 
 - Rename some configure macro to make it clear that those are used directly for endpoint transfer
+
   - ``CFG_TUD_HID_BUFSIZE`` to ``CFG_TUD_HID_EP_BUFSIZE``
   - ``CFG_TUD_CDC_EPSIZE`` to ``CFG_TUD_CDC_EP_BUFSIZE``
   - ``CFG_TUD_MSC_BUFSIZE`` to ``CFG_TUD_MSC_EP_BUFSIZE``
   - ``CFG_TUD_MIDI_EPSIZE`` to ``CFG_TUD_MIDI_EP_BUFSIZE``
 
 - HID:
+
   - Fix gamepad template descriptor
   - Add multiple HID interface API
   - Add extra comma to HID_REPORT_ID
@@ -1258,6 +1305,7 @@ Examples
 - Add new ``hid_multiple_interface``
 
 - Enhance ``net_lwip_webserver`` example
+
   - Add multiple configuration: RNDIS for Windows, CDC-ECM for macOS (Linux will work with both)
   - Update lwip to STABLE-2_1_2_RELEASE for ``net_lwip_webserver``
 
diff --git a/docs/info/code_of_conduct.rst b/docs/info/code_of_conduct.rst
new file mode 100644
index 000000000..2d70708d4
--- /dev/null
+++ b/docs/info/code_of_conduct.rst
@@ -0,0 +1 @@
+.. include:: ../../CODE_OF_CONDUCT.rst
diff --git a/docs/info/index.rst b/docs/info/index.rst
index a636f37dc..b6d30b432 100644
--- a/docs/info/index.rst
+++ b/docs/info/index.rst
@@ -10,3 +10,4 @@ Index
 
    changelog
    contributors
+   code_of_conduct
diff --git a/docs/integration.rst b/docs/integration.rst
new file mode 100644
index 000000000..3480746d0
--- /dev/null
+++ b/docs/integration.rst
@@ -0,0 +1,93 @@
+*******************
+Integrating TinyUSB
+*******************
+
+Once you've seen TinyUSB working in the examples, use this guide to wire the stack into your own firmware.
+
+Integration Steps
+=================
+
+1. **Get TinyUSB**: Copy this repository or add it as a git submodule to your project at ``your_project/tinyusb``.
+2. **Add source files**: Add every ``.c`` file from ``tinyusb/src/`` to your project build system.
+
+.. note::
+   Only supported dcd/hcd drivers for your CPU sources under ``tinyusb/src/portable/vendor/usbip/`` are needed. Add
+
+3. **Configure TinyUSB**: Create ``tusb_config.h`` with macros such as ``CFG_TUSB_MCU``, ``CFG_TUSB_OS``, and class enable flags. Start from any example's ``tusb_config.h`` and tweak.
+4. **Configure include paths**: Add ``your_project/tinyusb/src`` (and the folder holding ``tusb_config.h``) to your include paths.
+5. **Implement USB descriptors**: For device stack, implement the ``tud_descriptor_*_cb()`` callbacks (device) or host descriptor helpers that match your product.
+6. **Initialize TinyUSB**: Call ``tusb_init()`` once the clocks/peripherals are ready. Pass ``tusb_rhport_init_t`` if you need per-port settings.
+7. **Handle interrupts**: From the USB ISR call ``tusb_int_handler(rhport, true)`` so the stack can process events.
+8. **Run USB tasks**: Call ``tud_task()`` (device) or ``tuh_task()`` (host) regularly from the main loop, RTOS task.
+9. **Implement class callbacks**: Provide the callbacks for the classes you enabled (e.g., ``tud_cdc_rx_cb()``, ``tuh_msc_mount_cb()``).
+
+Minimal Example
+===============
+
+.. code-block:: c
+
+   #include "tusb.h"
+
+   int main(void) {
+     board_init();  // Your board initialization
+
+     // Init device stack on roothub port 0 for highspeed device
+     tusb_rhport_init_t dev_init = {
+       .role  = TUSB_ROLE_DEVICE,
+       .speed = TUSB_SPEED_HIGH
+     };
+     tusb_init(0, &dev_init);
+
+     // init host stack on roothub port 1 for fullspeed host
+     tusb_rhport_init_t host_init = {
+       .role  = TUSB_ROLE_DEVICE,
+       .speed = TUSB_SPEED_FULL
+     };
+     tusb_init(1, &host_init);
+
+     while (1) {
+       tud_task();  // device task
+       tuh_task();  // host task
+
+       app_task();  // Your application logic
+     }
+   }
+
+   void USB0_IRQHandler(void) {
+     // forward interrupt port 0 to TinyUSB stack
+     tusb_int_handler(0, true);
+   }
+
+   void USB1_IRQHandler(void) {
+     // forward interrupt port 0 to TinyUSB stack
+     tusb_int_handler(1, true);
+   }
+
+.. note::
+   Unlike many libraries, TinyUSB callbacks don't need to be registered. Implement functions with the prescribed names (for example ``tud_cdc_rx_cb()``) and the stack will invoke them automatically.
+
+.. note::
+   Naming follows ``tud_*`` for device APIs and ``tuh_*`` for host APIs. Refer to :doc:`reference/glossary` for a summary of the prefixes and callback naming rules.
+
+
+STM32CubeIDE Integration
+========================
+
+To integrate TinyUSB device stack with STM32CubeIDE
+
+1. In STM32CubeMX, enable USB_OTG_FS/HS under Connectivity, set to "Device_Only" mode
+2. Enable the USB global interrupt in NVIC Settings
+3. Add ``tusb.h`` include and call ``tusb_init()`` in main.c
+4. Call ``tud_task()`` in your main loop
+5. In the generated ``stm32xxx_it.c``, modify the USB IRQ handler to call ``tud_int_handler(0)``
+
+.. code-block:: c
+
+   void OTG_FS_IRQHandler(void) {
+     tud_int_handler(0);
+   }
+
+6. Create ``tusb_config.h`` and ``usb_descriptors.c`` files
+
+.. tip::
+   STM32CubeIDE generated code conflicts with TinyUSB. Don't use STM32's built-in USB middleware (USB Device Library) when using TinyUSB. Disable USB code generation in STM32CubeMX and let TinyUSB handle all USB functionality.
diff --git a/docs/porting.rst b/docs/porting.rst
new file mode 100644
index 000000000..c3076354c
--- /dev/null
+++ b/docs/porting.rst
@@ -0,0 +1,243 @@
+
+*******
+Porting
+*******
+
+TinyUSB is designed to be a universal USB protocol stack for microcontrollers. It
+handles most of the high level USB protocol and relies on the microcontroller's USB peripheral for
+data transactions on different endpoints. Porting is the process of adding low-level support for
+the rest of the common stack. Once the low-level is implemented, it is very easy to add USB support
+for the microcontroller to other projects, especially those already using TinyUSB such as CircuitPython.
+
+Below are instructions on how to get the cdc_msc device example running on a new microcontroller. Doing so includes adding the common code necessary for other uses while minimizing other extra code. Whenever you see a phrase or word in ``<>`` it should be replaced.
+
+Register defs
+-------------
+
+The first step to adding support is including the register definitions and startup code for the
+microcontroller in TinyUSB. We write the TinyUSB implementation against these structs instead of higher level functions to keep the code small and to prevent function name collisions in linking of larger projects. For ARM microcontrollers this is the CMSIS definitions. They should be
+placed in the ``hw/mcu/<vendor>/<chip_family>`` directory.
+
+Once this is done, create a directory in ``hw/bsp/<your board name>`` for the specific board you are using to test the code (duplicating an existing board's directory is the best way to get started). The board should be a readily available development board so that others can also test.
+
+Build
+-----
+
+Now that those directories are in place, we can start our iteration process to get the example building successfully. To build, run from the root of TinyUSB:
+
+.. code-block:: bash
+
+   make -C examples/device/cdc_msc BOARD=<board>
+
+Unless you've read ahead, this will fail miserably. Now, lets get it to fail less by updating the files in the board directory. The code in the board's directory is responsible for setting up the microcontroller's clocks and pins so that USB works. TinyUSB itself only operates on the USB peripheral. The board directory also includes information what files are needed to build the example.
+
+One of the first things to change is the ``-DCFG_TUSB_MCU`` C flag in the ``board.mk`` file. This is used to tell TinyUSB what platform is being built. So, add an entry to ``src/tusb_option.h`` and update the ``CFLAGS`` to match.
+
+Update ``board.mk``'s VENDOR and CHIP_FAMILY values when creating the directory for the struct files. Duplicate one of the other sources from ``src/portable`` into ``src/portable/<vendor>/<chip_family>`` and delete all of the implementation internals. We'll cover what everything there does later. For now, get it compiling.
+
+Implementation
+--------------
+
+At this point you should get an error due to an implementation issue and hopefully the build is setup for the new MCU. You will still need to modify the ``board.mk`` to include specific ``CFLAGS``, the linker script, linker flags, source files, include directories. All file paths are relative to the top of the TinyUSB repo.
+
+Board Support (BSP)
+^^^^^^^^^^^^^^^^^^^
+
+The board support code is only used for self-contained examples and testing. It is not used when TinyUSB is part of a larger project. Its responsible for getting the MCU started and the USB peripheral clocked. It also optionally provides LED definitions that are used to blink an LED to show that the code is running.
+
+It is located in ``hw/bsp/<board name>/board_<board name>.c``.
+
+``board_init()``
+~~~~~~~~~~~~~~~~
+
+``board_init()`` is responsible for starting the MCU, setting up the USB clock and USB pins. It is also responsible for initializing LED pins.
+
+One useful clock debugging technique is to set up a PWM output at a known value such as 500hz based on the USB clock so that you can verify it is correct with a logic probe or oscilloscope.
+
+Setup your USB in a crystal-less mode when available. That makes the code easier to port across boards.
+
+``board_led_write()``
+~~~~~~~~~~~~~~~~~~~~~
+
+Feel free to skip this until you want to verify your demo code is running. To implement, set the pin corresponding to the led to output a value that lights the LED when ``state`` is true.
+
+OS Abstraction Layer (OSAL)
+^^^^^^^^^^^^^^^^^^^^^^^^^^^
+
+The OS Abstraction Layer is responsible for providing basic data structures for TinyUSB that may allow for concurrency when used with an RTOS. Without an RTOS it simply handles concurrency issues between the main code and interrupts. The code is almost entirely agnostic of MCU and lives in ``src/osal``.
+
+In RTOS configurations, ``tud_task()``/``tuh_task()`` blocks behind a synchronization structure when the event queue is empty, so that the scheduler may give the CPU to a different task. To take advantage of the library's capability to yield the CPU when there are no actionable USB device events, ensure that the ``CFG_TUSB_OS`` symbol is defined, e.g ``OPT_OS_FREERTOS`` enables the FreeRTOS scheduler to schedule other threads than that which calls ``tud_task()``/``tuh_task()``.
+
+Device API
+^^^^^^^^^^
+
+After the USB device is setup, the USB device code works by processing events on the main thread (by calling ``tud_task()``). These events are queued by the USB interrupt handler. So, there are three parts to the device low-level API: device setup, endpoint setup and interrupt processing.
+
+All of the code for the low-level device API is in ``src/portable/<vendor>/<chip family>/dcd_<chip family>.c``.
+
+Device Setup
+~~~~~~~~~~~~
+
+``dcd_init()``
+""""""""""""""
+
+Initializes the USB peripheral for device mode and enables it.
+This function should enable internal D+/D- pull-up for enumeration.
+
+``dcd_int_enable()`` / ``dcd_int_disable()``
+""""""""""""""""""""""""""""""""""""""""""""
+
+Enables or disables the USB device interrupt(s). May be used to prevent concurrency issues when mutating data structures shared between main code and the interrupt handler.
+
+``dcd_int_handler()``
+"""""""""""""""""""""
+
+Processes all the hardware generated events e.g Bus reset, new data packet from host etc ... It will be called by application in the MCU USB interrupt handler.
+
+``dcd_set_address()``
+"""""""""""""""""""""
+
+Called when the device is given a new bus address.
+
+If your peripheral automatically changes address during enumeration (like the nrf52) you may leave this empty and also no queue an event for the corresponding SETUP packet.
+
+``dcd_remote_wakeup()``
+"""""""""""""""""""""""
+
+Called to remote wake up host when suspended (e.g hid keyboard)
+
+``dcd_connect()`` / ``dcd_disconnect()``
+""""""""""""""""""""""""""""""""""""""""
+
+Connect or disconnect the data-line pull-up resistor. Define only if MCU has an internal pull-up. (BSP may define for MCU without internal pull-up.)
+
+Special events
+~~~~~~~~~~~~~~
+
+You must let TinyUSB know when certain events occur so that it can continue its work. There are a few methods you can call to queue events for TinyUSB to process.
+
+``dcd_event_bus_signal()``
+""""""""""""""""""""""""""
+
+There are a number of events that your peripheral may communicate about the state of the bus. Here is an overview of what they are. Events in **BOLD** must be provided for TinyUSB to work.
+
+
+* **DCD_EVENT_RESET** - Triggered when the host resets the bus causing the peripheral to reset. Do any other internal reset you need from the interrupt handler such as resetting the control endpoint.
+* DCD_EVENT_SOF - Signals the start of a new USB frame.
+
+Calls to this look like:
+
+.. code-block:: c
+
+   dcd_event_bus_signal(0, DCD_EVENT_BUS_RESET, true);
+
+
+The first ``0`` is the USB peripheral number. Statically saying ``0`` is common for single USB device MCUs.
+
+The ``true`` indicates the call is from an interrupt handler and will always be the case when porting in this way.
+
+``dcd_setup_received()``
+""""""""""""""""""""""""
+
+SETUP packets are a special type of transaction that can occur at any time on the control endpoint, numbered ``0``. Since they are unique, most peripherals have special handling for them. Their data is always 8 bytes in length as well.
+
+Calls to this look like:
+
+.. code-block:: c
+
+   dcd_event_setup_received(0, setup, true);
+
+
+As before with ``dcd_event_bus_signal()`` the first argument is the USB peripheral number and the third is true to signal its being called from an interrupt handler. The middle argument is byte array of length 8 with the contents of the SETUP packet. It can be stack allocated because it is copied into the queue.
+
+Endpoints
+~~~~~~~~~
+
+Endpoints are the core of the USB data transfer process. They come in a few forms such as control, isochronous, bulk, and interrupt. We won't cover the details here except with some caveats in open below. In general, data is transferred by setting up a buffer of a given length to be transferred on a given endpoint address and then waiting for an interrupt to signal that the transfer is finished. Further details below.
+
+Endpoints within USB have an address which encodes both the number and direction of an endpoint. TinyUSB provides ``tu_edpt_number()`` and ``tu_edpt_dir()`` to unpack this data from the address. Here is a snippet that does it.
+
+.. code-block:: c
+
+   uint8_t epnum = tu_edpt_number(ep_addr);
+   uint8_t dir   = tu_edpt_dir(ep_addr);
+
+
+``dcd_edpt_open()``
+"""""""""""""""""""
+
+Opening an endpoint is done for all non-control endpoints once the host picks a configuration that the device should use. At this point, the endpoint should be enabled in the peripheral and configured to match the endpoint descriptor. Pay special attention to the direction of the endpoint you can get from the helper methods above. It will likely change what registers you are setting.
+
+Also make sure to enable endpoint specific interrupts.
+
+``dcd_edpt_close()``
+""""""""""""""""""""
+
+Close an endpoint. his function is used for implementing alternate settings.
+
+After calling this, the device should not respond to any packets directed towards this endpoint. When called, this function must abort any transfers in progress through this endpoint, before returning.
+
+Implementation is optional. Must be called from the USB task. Interrupts could be disabled or enabled during the call.
+
+``dcd_edpt_xfer()``
+"""""""""""""""""""
+
+``dcd_edpt_xfer()`` is responsible for configuring the peripheral to send or receive data from the host. "xfer" is short for "transfer". **This is one of the core methods you must implement for TinyUSB to work (one other is the interrupt handler).**  Data from the host is the OUT direction and data to the host is IN. It  is used for all endpoints including the control endpoint 0. Make sure to handle the zero-length packet STATUS packet on endpoint 0 correctly. It may be a special transaction to the peripheral.
+
+Besides that, all other transactions are relatively straight-forward. The endpoint address provides the endpoint
+number and direction which usually determines where to write the buffer info. The buffer and its length are usually
+written to a specific location in memory and the peripheral is told the data is valid. (Maybe by writing a 1 to a
+register or setting a counter register to 0 for OUT or length for IN.)
+
+The transmit buffer alignment is determined by ``CFG_TUSB_MEM_ALIGN``.
+
+One potential pitfall is that the buffer may be longer than the maximum endpoint size of one USB
+packet. Some peripherals can handle transmitting multiple USB packets for a provided buffer (like the SAMD21).
+Others (like the nRF52) may need each USB packet queued individually. To make this work you'll need to track
+some state for yourself and queue up an intermediate USB packet from the interrupt handler.
+
+Once the transaction is going, the interrupt handler will notify TinyUSB of transfer completion.
+During transmission, the IN data buffer is guaranteed to remain unchanged in memory until the ``dcd_xfer_complete()`` function is called.
+
+The ``dcd_edpt_xfer()`` function must never add zero-length-packets (ZLP) on its own to a transfer. If a ZLP is required,
+then it must be explicitly sent by the stack calling ``dcd_edpt_xfer()``, by calling ``dcd_edpt_xfer()`` a second time with len=0.
+For control transfers, this is automatically done in ``usbd_control.c``.
+
+At the moment, only a single buffer can be transmitted at once. There is no provision for double-buffering. new ``dcd_edpt_xfer()`` will not
+be called again on the same endpoint address until the driver calls ``dcd_xfer_complete()`` (except in cases of USB resets).
+
+``dcd_xfer_complete()``
+"""""""""""""""""""""""
+
+Once a transfer completes you must call ``dcd_xfer_complete()`` from the USB interrupt handler to let TinyUSB know that a transaction has completed. Here is a sample call:
+
+.. code-block:: c
+
+   dcd_event_xfer_complete(0, ep_addr, xfer->actual_len, XFER_RESULT_SUCCESS, true);
+
+
+The arguments are:
+
+
+* the USB peripheral number
+* the endpoint address
+* the actual length of the transfer. (OUT transfers may be smaller than the buffer given in ``dcd_edpt_xfer()``)
+* the result of the transfer. Failure isn't handled yet.
+* ``true`` to note the call is from an interrupt handler.
+
+``dcd_edpt_stall()`` / ``dcd_edpt_clear_stall()``
+"""""""""""""""""""""""""""""""""""""""""""""""""
+
+Stalling is one way an endpoint can indicate failure such as when an unsupported command is transmitted. The pair of ``dcd_edpt_stall()``, ``dcd_edpt_clear_stall()`` help manage the stall state of all endpoints.
+
+Woohoo!
+-------
+
+At this point you should have everything working! 🙂 Of course, you may not write perfect code. Here are some tips and tricks for debugging.
+
+Use `WireShark <https://www.wireshark.org/>`_ or `a Beagle <https://www.totalphase.com/protocols/usb/>`_ to sniff the USB traffic. When things aren't working its likely very early in the USB enumeration process. Figuring out where can help clue in where the issue is. For example:
+
+
+* If the host sends a SETUP packet and its not ACKed then your USB peripheral probably isn't started correctly.
+* If the peripheral is started correctly but it still didn't work, then verify your usb clock is correct. (You did output a PWM based on it right? 🙂)
+* If the SETUP packet is ACKed but nothing is sent back then you interrupt handler isn't queueing the setup packet correctly. (Also, if you are using your own code instead of an example ``tud_task()`` may not be called.) If that's OK, the ``dcd_xfer_complete()`` may not be setting up the next transaction correctly.
diff --git a/docs/reference/architecture.rst b/docs/reference/architecture.rst
index 8e4c6890e..70ea17ed4 100644
--- a/docs/reference/architecture.rst
+++ b/docs/reference/architecture.rst
@@ -42,36 +42,23 @@ Layer Structure
 
 TinyUSB follows a layered architecture from hardware to application:
 
-.. code-block:: none
+.. figure:: ../assets/stack.svg
+   :width: 500px
+   :align: left
+   :alt: stackup
+
+.. raw:: html
 
-   ┌─────────────────────────────────────────┐
-   │           Application Layer             │ ← Your code
-   ├─────────────────────────────────────────┤
-   │         USB Class Drivers               │ ← CDC, HID, MSC, etc.
-   ├─────────────────────────────────────────┤
-   │        Device/Host Stack Core           │ ← USB protocol handling
-   ├─────────────────────────────────────────┤
-   │      Hardware Abstraction (DCD/HCD)     │ ← MCU-specific drivers
-   ├─────────────────────────────────────────┤
-   │         OS Abstraction (OSAL)           │ ← RTOS integration
-   ├─────────────────────────────────────────┤
-   │       Common Utilities & FIFO           │ ← Shared components
-   └─────────────────────────────────────────┘
+   <div class="clear-both"></div>
 
 Component Overview
 ------------------
 
-**Application Layer**: Your main application code that uses TinyUSB APIs.
-
-**Class Drivers**: Implement specific USB device classes (CDC, HID, MSC, etc.) and handle class-specific requests.
-
-**Device/Host Core**: Implements USB protocol state machines, endpoint management, and core USB functionality.
-
-**Hardware Abstraction**: MCU-specific code that interfaces with USB peripheral hardware.
-
-**OS Abstraction**: Provides threading primitives and synchronization for different RTOS environments.
-
-**Common Utilities**: Shared code including FIFO implementations, binary helpers, and utility functions.
+- **Application Layer**: Your main application code that uses TinyUSB APIs.
+- **Class Drivers**: Implement specific USB device classes (CDC, HID, MSC, etc.) and handle class-specific requests.
+- **Device/Host Core**: Implements USB protocol state machines, endpoint management, and core USB functionality.
+- **OS Abstraction**: Provides threading primitives and synchronization for different RTOS environments.
+- **Device/Host Controller Driver**: drivers that interface with MCU USB peripherals. Several MCUs may share a common driver.
 
 Device Stack Architecture
 =========================
@@ -85,7 +72,7 @@ Core Components
 - MCU-specific USB device peripheral driver
 - Handles endpoint configuration and data transfers
 - Abstracts hardware differences between MCU families
-- Located in ``src/portable/VENDOR/FAMILY/``
+- Located in ``src/portable/VENDOR/USBIP/``
 
 **USB Device Core (USBD)**:
 - Implements USB device state machine
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index e668e2693..12da5c90b 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -107,17 +107,20 @@ olimex_emz64               Olimex PIC32-EMZ64                   pic32mz     http
 olimex_hmz144              Olimex PIC32-HMZ144                  pic32mz     https://www.olimex.com/Products/PIC/Development/PIC32-HMZ144/open-source-hardware
 cynthion_d11               Great Scott Gadgets Cynthion         samd11      https://greatscottgadgets.com/cynthion/
 samd11_xplained            SAMD11 Xplained Pro                  samd11      https://www.microchip.com/en-us/development-tool/ATSAMD11-XPRO
-atsamd21_xpro              SAMD21 Xplained Pro                  samd21      https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMD21-XPRO
-circuitplayground_express  Adafruit Circuit Playground Express  samd21      https://www.adafruit.com/product/3333
-curiosity_nano             SAMD21 Curiosty Nano                 samd21      https://www.microchip.com/en-us/development-tool/dm320119
-cynthion_d21               Great Scott Gadgets Cynthion         samd21      https://greatscottgadgets.com/cynthion/
-feather_m0_express         Adafruit Feather M0 Express          samd21      https://www.adafruit.com/product/3403
-itsybitsy_m0               Adafruit ItsyBitsy M0                samd21      https://www.adafruit.com/product/3727
-metro_m0_express           Adafruit Metro M0 Express            samd21      https://www.adafruit.com/product/3505
-qtpy                       Adafruit QT Py                       samd21      https://www.adafruit.com/product/4600
-seeeduino_xiao             Seeeduino XIAO                       samd21      https://wiki.seeedstudio.com/Seeeduino-XIAO/
-sparkfun_samd21_mini_usb   SparkFun SAMD21 Mini                 samd21      https://www.sparkfun.com/products/13664
-trinket_m0                 Adafruit Trinket M0                  samd21      https://www.adafruit.com/product/3500
+atsamd21_xpro              SAMD21 Xplained Pro                  samd2x_l2x  https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMD21-XPRO
+atsaml21_xpro              SAML21 Xplained Pro                  samd2x_l2x  https://www.microchip.com/en-us/development-tool/atsaml21-xpro-b
+circuitplayground_express  Adafruit Circuit Playground Express  samd2x_l2x  https://www.adafruit.com/product/3333
+curiosity_nano             SAMD21 Curiosty Nano                 samd2x_l2x  https://www.microchip.com/en-us/development-tool/dm320119
+cynthion_d21               Great Scott Gadgets Cynthion         samd2x_l2x  https://greatscottgadgets.com/cynthion/
+feather_m0_express         Adafruit Feather M0 Express          samd2x_l2x  https://www.adafruit.com/product/3403
+itsybitsy_m0               Adafruit ItsyBitsy M0                samd2x_l2x  https://www.adafruit.com/product/3727
+metro_m0_express           Adafruit Metro M0 Express            samd2x_l2x  https://www.adafruit.com/product/3505
+qtpy                       Adafruit QT Py                       samd2x_l2x  https://www.adafruit.com/product/4600
+saml22_feather             SAML22 Feather                       samd2x_l2x  https://github.com/joeycastillo/Feather-Projects/tree/main/SAML22%20Feather
+seeeduino_xiao             Seeeduino XIAO                       samd2x_l2x  https://wiki.seeedstudio.com/Seeeduino-XIAO/
+sensorwatch_m0             SensorWatch                          samd2x_l2x  https://github.com/joeycastillo/Sensor-Watch
+sparkfun_samd21_mini_usb   SparkFun SAMD21 Mini                 samd2x_l2x  https://www.sparkfun.com/products/13664
+trinket_m0                 Adafruit Trinket M0                  samd2x_l2x  https://www.adafruit.com/product/3500
 d5035_01                   D5035-01                             samd5x_e5x  https://github.com/RudolphRiedel/USB_CAN-FD
 feather_m4_express         Adafruit Feather M4 Express          samd5x_e5x  https://www.adafruit.com/product/3857
 itsybitsy_m4               Adafruit ItsyBitsy M4                samd5x_e5x  https://www.adafruit.com/product/3800
@@ -125,10 +128,9 @@ metro_m4_express           Adafruit Metro M4 Express            samd5x_e5x  http
 pybadge                    Adafruit PyBadge                     samd5x_e5x  https://www.adafruit.com/product/4200
 pyportal                   Adafruit PyPortal                    samd5x_e5x  https://www.adafruit.com/product/4116
 same54_xplained            SAME54 Xplained Pro                  samd5x_e5x  https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAME54-XPRO
+same70_qmtech              SAME70 QMTech                        same7x      https://www.aliexpress.com/item/1005003173783268.html
+same70_xplained            SAME70 Xplained                      same7x      https://www.microchip.com/en-us/development-tool/atsame70-xpld
 samg55_xplained            SAMG55 Xplained Pro                  samg        https://www.microchip.com/DevelopmentTools/ProductDetails/ATSAMG55-XPRO
-atsaml21_xpro              SAML21 Xplained Pro                  saml2x      https://www.microchip.com/en-us/development-tool/atsaml21-xpro-b
-saml22_feather             SAML22 Feather                       saml2x      https://github.com/joeycastillo/Feather-Projects/tree/main/SAML22%20Feather
-sensorwatch_m0             SensorWatch                          saml2x      https://github.com/joeycastillo/Sensor-Watch
 =========================  ===================================  ==========  =================================================================================  ======
 
 MindMotion
@@ -295,6 +297,7 @@ stm32l052dap52       STM32 L052 DAP                     stm32l0    n/a
 stm32l0538disco      STM32 L0538 Discovery              stm32l0    https://www.st.com/en/evaluation-tools/32l0538discovery.html
 stm32l412nucleo      STM32 L412 Nucleo                  stm32l4    https://www.st.com/en/evaluation-tools/nucleo-l412kb.html
 stm32l476disco       STM32 L476 Disco                   stm32l4    https://www.st.com/en/evaluation-tools/32l476gdiscovery.html
+stm32l496nucleo      STM32 L496 Nucleo                  stm32l4    https://www.st.com/en/evaluation-tools/nucleo-l496ZG-P.html
 stm32l4p5nucleo      STM32 L4P5 Nucleo                  stm32l4    https://www.st.com/en/evaluation-tools/nucleo-l4p5zg.html
 stm32l4r5nucleo      STM32 L4R5 Nucleo                  stm32l4    https://www.st.com/en/evaluation-tools/nucleo-l4r5zi.html
 stm32n6570dk         STM32 N6570-DK                     stm32n6    https://www.st.com/en/evaluation-tools/stm32n6570-dk.html
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index e04cc2c2f..de1603383 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -4,9 +4,9 @@ Dependencies
 
 MCU low-level peripheral drivers and external libraries for building TinyUSB examples
 
-========================================  ================================================================  ========================================  ======================================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
 Local Path                                Repo                                                              Commit                                    Required by
-========================================  ================================================================  ========================================  ======================================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
 hw/mcu/allwinner                          https://github.com/hathach/allwinner_driver.git                   8e5e89e8e132c0fd90e72d5422e5d3d68232b756  fc100s
 hw/mcu/analog/msdk                        https://github.com/analogdevicesinc/msdk.git                      b20b398d3e5e2007594e54a74ba3d2a2e50ddd75  maxim
 hw/mcu/artery/at32f402_405                https://github.com/ArteryTek/AT32F402_405_Firmware_Library.git    4424515c2663e82438654e0947695295df2abdfe  at32f402_405
@@ -23,7 +23,7 @@ hw/mcu/infineon/mtb-xmclib-cat3           https://github.com/Infineon/mtb-xmclib
 hw/mcu/microchip                          https://github.com/hathach/microchip_driver.git                   9e8b37e307d8404033bb881623a113931e1edf27  sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg
 hw/mcu/mindmotion/mm32sdk                 https://github.com/hathach/mm32sdk.git                            b93e856211060ae825216c6a1d6aa347ec758843  mm32
 hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                   11f57e578c7feea13f21c79ea0efab2630ac68c7  nrf
-hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                        2204191ec76283371419fbcec207da02e1bc22fa  nuc
+hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                        2204191ec76283371419fbcec207da02e1bc22fa  nuc100_120 nuc121_125 nuc126 nuc505
 hw/mcu/nxp/lpcopen                        https://github.com/hathach/nxp_lpcopen.git                        b41cf930e65c734d8ec6de04f1d57d46787c76ae  lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
 hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
 hw/mcu/raspberry_pi/Pico-PIO-USB          https://github.com/sekigon-gonnoc/Pico-PIO-USB.git                675543bcc9baa8170f868ab7ba316d418dbcf41f  rp2040
@@ -80,10 +80,10 @@ hw/mcu/wch/ch32f20x                       https://github.com/openwch/ch32f20x.gi
 hw/mcu/wch/ch32v103                       https://github.com/openwch/ch32v103.git                           7578cae0b21f86dd053a1f781b2fc6ab99d0ec17  ch32v10x
 hw/mcu/wch/ch32v20x                       https://github.com/openwch/ch32v20x.git                           c4c38f507e258a4e69b059ccc2dc27dde33cea1b  ch32v20x
 hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                           184f21b852cb95eed58e86e901837bc9fff68775  ch32v30x
-lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32n6 stm32u0 stm32u5 stm32wb stm32wbasam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg tm4c
-lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       b0bbb0423b278ca632cfe1474eb227961d835fd2  ra
+lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wbasam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg tm4c
+lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  ra stm32n6
 lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                   cc0e0707c0c748713485b870bb980852b210877f  all
 lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                            159e31b689577dbf69cf0683bbaffbd71fa5ee10  all
 lib/sct_neopixel                          https://github.com/gsteiert/sct_neopixel.git                      e73e04ca63495672d955f9268e003cffe168fcd8  lpc55
 tools/uf2                                 https://github.com/microsoft/uf2.git                              c594542b2faa01cc33a2b97c9fbebc38549df80a  all
-========================================  ================================================================  ========================================  ======================================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
diff --git a/docs/reference/glossary.rst b/docs/reference/glossary.rst
index 561780c53..537769c43 100644
--- a/docs/reference/glossary.rst
+++ b/docs/reference/glossary.rst
@@ -95,4 +95,4 @@ Glossary
       Product Identifier. 16-bit number assigned by vendor to identify specific products.
 
    USB-IF
-      USB Implementers Forum. Organization that maintains USB specifications and assigns VIDs.
\ No newline at end of file
+      USB Implementers Forum. Organization that maintains USB specifications and assigns VIDs.
diff --git a/docs/troubleshooting.rst b/docs/troubleshooting.rst
index e30210d01..bb9f15166 100644
--- a/docs/troubleshooting.rst
+++ b/docs/troubleshooting.rst
@@ -15,13 +15,14 @@ Toolchain Problems
 The ARM GCC toolchain is not installed or not in PATH.
 
 *Solution*:
+
 .. code-block:: bash
 
    # Ubuntu/Debian
-   sudo apt-get update && sudo apt-get install gcc-arm-none-eabi
+   $ sudo apt-get update && sudo apt-get install gcc-arm-none-eabi
 
    # macOS with Homebrew
-   brew install --cask gcc-arm-embedded
+   $ brew install --cask gcc-arm-embedded
 
    # Windows: Download from ARM website and add to PATH
 
@@ -30,14 +31,15 @@ The ARM GCC toolchain is not installed or not in PATH.
 Build tools are missing.
 
 *Solution*:
+
 .. code-block:: bash
 
    # Ubuntu/Debian
-   sudo apt-get install build-essential cmake
+   $ sudo apt-get install build-essential cmake
 
    # macOS
-   xcode-select --install
-   brew install cmake
+   $ xcode-select --install
+   $ brew install cmake
 
 Dependency Issues
 -----------------
@@ -47,10 +49,12 @@ Dependency Issues
 Dependencies for your MCU family are not downloaded.
 
 *Solution*:
+
 .. code-block:: bash
 
-   # Download dependencies for specific family
-   python tools/get_deps.py stm32f4  # Replace with your family
+   # Download dependencies for specific board or family
+   $ python tools/get_deps.py -b stm32h743eval  # Replace with your board
+   $ python tools/get_deps.py stm32f4           # Replace with your family
 
    # Or from example directory
    cd examples/device/cdc_msc
@@ -61,14 +65,12 @@ Dependencies for your MCU family are not downloaded.
 Invalid board name in build command.
 
 *Diagnosis*:
+
 .. code-block:: bash
 
    # List available boards for a family
    ls hw/bsp/stm32f4/boards/
 
-   # List all supported boards
-   python tools/build.py -l
-
 *Solution*: Use exact board name from the listing.
 
 Runtime Issues
@@ -82,6 +84,7 @@ Device Mode Problems
 The most common issue - host doesn't see your USB device.
 
 *Diagnosis steps*:
+
 1. Check USB cable (must support data, not just power)
 2. Enable logging: build with ``LOG=2``
 3. Use different USB ports/hosts
@@ -99,17 +102,20 @@ The most common issue - host doesn't see your USB device.
 Device is detected but configuration fails.
 
 *Diagnosis*:
+
 .. code-block:: bash
 
    # Build with logging enabled
    make BOARD=your_board LOG=2 all
 
 *Look for*:
+
 - Setup request handling errors
 - Endpoint configuration problems
 - String descriptor issues
 
 *Solutions*:
+
 - Implement all required descriptors
 - Check endpoint sizes match descriptors
 - Ensure control endpoint (EP0) handling is correct
@@ -119,11 +125,13 @@ Device is detected but configuration fails.
 Device enumerates but data doesn't transfer correctly.
 
 *Common causes*:
+
 - Buffer overruns in class callbacks
 - Incorrect endpoint usage (IN vs OUT)
 - Flow control issues in CDC class
 
 *Solutions*:
+
 - Check buffer sizes in callbacks
 - Verify endpoint directions in descriptors
 - Implement proper flow control
@@ -136,11 +144,13 @@ Host Mode Problems
 Host application doesn't see connected devices.
 
 *Hardware checks*:
+
 - Power supply adequate for host mode
 - USB-A connector for host (not micro-USB)
 - Board supports host mode on selected port
 
 *Software checks*:
+
 - ``tuh_task()`` called regularly
 - Host stack enabled in ``tusb_config.h``
 - Correct root hub port configuration
@@ -150,12 +160,14 @@ Host application doesn't see connected devices.
 Devices connect but enumeration fails.
 
 *Diagnosis*:
+
 .. code-block:: bash
 
    # Enable host logging
    make BOARD=your_board LOG=2 RHPORT_HOST=1 all
 
 *Common issues*:
+
 - Power supply insufficient during enumeration
 - Timing issues with slow devices
 - USB hub compatibility problems
@@ -165,6 +177,7 @@ Devices connect but enumeration fails.
 Device enumerates but class-specific communication fails.
 
 *Troubleshooting*:
+
 - Check device descriptors match expected class
 - Verify interface/endpoint assignments
 - Some devices need device-specific handling
@@ -185,6 +198,7 @@ High CPU Usage
 **Symptoms**: MCU spending too much time in USB handling
 
 *Solutions*:
+
 - Use efficient logging (RTT/SWO instead of UART)
 - Reduce log level in production builds
 - Optimize descriptor parsing
@@ -197,11 +211,13 @@ STM32 Issues
 ------------
 
 **Clock configuration problems**:
+
 - USB requires precise 48MHz clock
 - HSE crystal must be configured correctly
 - PLL settings affect USB timing
 
 **Pin configuration**:
+
 - USB pins need specific alternate function settings
 - VBUS sensing configuration
 - ID pin for OTG applications
@@ -210,6 +226,7 @@ RP2040 Issues
 -------------
 
 **PIO-USB for host mode**:
+
 - Requires specific pin assignments
 - CPU overclocking may be needed for reliable operation
 - Timing-sensitive - avoid long interrupt disable periods
@@ -218,8 +235,8 @@ ESP32 Issues
 ------------
 
 **USB peripheral differences**:
-- ESP32-S2/S3 have different USB capabilities
-- Some variants only support device mode
+
+- ESP32-S2/S3/P4 have different USB capabilities
 - DMA configuration varies between models
 
 Advanced Debugging
@@ -249,6 +266,7 @@ However, especially for diagnosis of crashes, it can still be useful.
    arm-none-eabi-gdb build/your_app.elf
 
 *Useful breakpoints*:
+
 - ``dcd_int_handler()`` - USB interrupt entry
 - ``tud_task()`` - Main device task
 - Class-specific callbacks
@@ -280,6 +298,7 @@ When reporting issues:
 5. **Host environment**: OS version, USB port type
 
 **Resources**:
+
 - GitHub Discussions: https://github.com/hathach/tinyusb/discussions
 - Issue Tracker: https://github.com/hathach/tinyusb/issues
 - Documentation: https://docs.tinyusb.org
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index ad68957df..23dfb9d80 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -10,6 +10,40 @@ get_filename_component(TOP ${TOP} ABSOLUTE)
 
 set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
 
+function(family_resolve_board BOARD_NAME BOARD_PATH_OUT)
+  if ("${BOARD_NAME}" STREQUAL "")
+    message(FATAL_ERROR "You must set BOARD (e.g. metro_m4_express, raspberry_pi_pico). Use -DBOARD=xxx on the cmake command line.")
+  endif()
+
+  file(GLOB _board_paths
+    LIST_DIRECTORIES true
+    RELATIVE ${TOP}/hw/bsp
+    ${TOP}/hw/bsp/*/boards/*
+    )
+
+  set(_hint_names "")
+  foreach(_board_path ${_board_paths})
+    get_filename_component(_board_name ${_board_path} NAME)
+    if (_board_name STREQUAL "${BOARD_NAME}")
+      set(${BOARD_PATH_OUT} ${_board_path} PARENT_SCOPE)
+      return()
+    endif()
+    string(FIND "${_board_name}" "${BOARD_NAME}" _pos)
+    if (_pos EQUAL 0)
+      list(APPEND _hint_names ${_board_name})
+    endif()
+  endforeach()
+
+  if (_hint_names)
+    list(REMOVE_DUPLICATES _hint_names)
+    list(SORT _hint_names)
+    list(JOIN _hint_names ", " _hint_str)
+    message(FATAL_ERROR "BOARD '${BOARD_NAME}' not found. Boards with the same prefix:\n${_hint_str}")
+  else()
+    message(FATAL_ERROR "BOARD '${BOARD_NAME}' not found under hw/bsp/*/boards")
+  endif()
+endfunction()
+
 #-------------------------------------------------------------
 # Toolchain
 # Can be changed via -DTOOLCHAIN=gcc|iar or -DCMAKE_C_COMPILER= or ENV{CC}=
@@ -78,21 +112,8 @@ endif ()
 # FAMILY and BOARD
 #-------------------------------------------------------------
 if (NOT DEFINED FAMILY)
-  if (NOT DEFINED BOARD)
-    message(FATAL_ERROR "You must set a BOARD variable for the build (e.g. metro_m4_express, raspberry_pi_pico).
-    You can do this via -DBOARD=xxx on the cmake command line")
-  endif ()
-
-  # Find path contains BOARD
-  file(GLOB BOARD_PATH LIST_DIRECTORIES true
-    RELATIVE ${TOP}/hw/bsp
-    ${TOP}/hw/bsp/*/boards/${BOARD}
-    )
-  if (NOT BOARD_PATH)
-    message(FATAL_ERROR "Could not detect FAMILY from BOARD=${BOARD}")
-  endif ()
+  family_resolve_board("${BOARD}" BOARD_PATH)
 
-  # replace / with ; so that we can get the first element as FAMILY
   string(REPLACE "/" ";" BOARD_PATH ${BOARD_PATH})
   list(GET BOARD_PATH 0 FAMILY)
   set(FAMILY ${FAMILY} CACHE STRING "Board family")
diff --git a/tools/gen_doc.py b/tools/gen_doc.py
index ab07bc116..3920531d5 100755
--- a/tools/gen_doc.py
+++ b/tools/gen_doc.py
@@ -23,7 +23,7 @@ def gen_deps_doc():
 Dependencies
 ************
 
-MCU low-level peripheral driver and external libraries for building TinyUSB examples
+MCU low-level peripheral drivers and external libraries for building TinyUSB examples
 
 {tabulate(df, headers="keys", tablefmt='rst')}
 """
-- 
cgit v1.3.1


From be9d1973ac4c30fedd24b8199fd4dee5c842e2ef Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 17 Nov 2025 17:45:38 +0700
Subject: make TUP_DCD_EDPT_ISO_ALLOC i.e
 dcd_edpt_iso_alloc()/dcd_edpt_iso_activate() as default driver
 implementation. dcd_edpt_close() is deprecated and will be removed from all
 driver in the future.

---
 examples/device/video_capture/skip.txt             |   1 -
 examples/device/video_capture_2ch/skip.txt         |   1 -
 hw/bsp/family_support.cmake                        |   3 +
 hw/bsp/mcx/boards/frdm_mcxa153/board.cmake         |   9 +-
 hw/bsp/mcx/boards/frdm_mcxa153/board.mk            |   8 +
 .../mcx/boards/frdm_mcxa153/board/clock_config.c   | 559 ++++++++++++++++++++
 .../mcx/boards/frdm_mcxa153/board/clock_config.h   | 385 ++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c     | 492 ++++++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h     | 211 ++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c      | 466 -----------------
 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h      | 170 ------
 hw/bsp/mcx/boards/frdm_mcxa153/frdm_mcxa153.mex    | 573 +++++++++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c           | 130 -----
 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h           |  51 --
 hw/bsp/mcx/family.c                                |   7 +-
 hw/bsp/mcx/family.mk                               |  13 +-
 src/common/tusb_mcu.h                              |  11 +-
 src/portable/chipidea/ci_fs/dcd_ci_fs.c            |  83 ++-
 src/portable/nxp/khci/dcd_khci.c                   |  78 ++-
 19 files changed, 2313 insertions(+), 938 deletions(-)
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/frdm_mcxa153.mex
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h

(limited to 'hw')

diff --git a/examples/device/video_capture/skip.txt b/examples/device/video_capture/skip.txt
index 50302c544..cb0c7d2e6 100644
--- a/examples/device/video_capture/skip.txt
+++ b/examples/device/video_capture/skip.txt
@@ -1,6 +1,5 @@
 mcu:CH32V103
 mcu:CH32V20X
-mcu:MCXA15
 mcu:MSP430x5xx
 mcu:NUC121
 mcu:SAMD11
diff --git a/examples/device/video_capture_2ch/skip.txt b/examples/device/video_capture_2ch/skip.txt
index 0f6508226..af3b0de04 100644
--- a/examples/device/video_capture_2ch/skip.txt
+++ b/examples/device/video_capture_2ch/skip.txt
@@ -6,7 +6,6 @@ mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
 mcu:STM32L0
-mcu:MCXA15
 family:espressif
 board:curiosity_nano
 board:kuiic
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 23dfb9d80..2b9612186 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -264,6 +264,9 @@ function(family_configure_common TARGET RTOS)
         ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_BINARY_DIR}/lib
         SKIP_LINTING ON # need cmake 4.2
         )
+      if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+        set_target_properties(${BOARD_TARGET} PROPERTIES COMPILE_OPTIONS -w)
+      endif ()
     endif ()
     target_link_libraries(${TARGET} PUBLIC ${BOARD_TARGET})
   endif ()
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake b/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
index 7cd8991e6..e6619992f 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
@@ -14,8 +14,11 @@ function(update_board TARGET)
     BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
     CFG_EXAMPLE_VIDEO_READONLY
     )
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
+  target_sources(${TARGET} PRIVATE
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board/pin_mux.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board
     )
 endfunction()
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board.mk b/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
index af8416d8e..34558b43e 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
@@ -6,6 +6,14 @@ CPU_CORE = cortex-m33-nodsp-nofp
 CFLAGS += \
 	-DCPU_MCXA153VLH \
 	-DCFG_TUSB_MCU=OPT_MCU_MCXA15 \
+	-DCFG_EXAMPLE_VIDEO_READONLY
+
+SRC_C += \
+  ${BOARD_PATH}/board/clock_config.c \
+  ${BOARD_PATH}/board/pin_mux.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH)/board
 
 JLINK_DEVICE = MCXA153
 PYOCD_TARGET = MCXA153
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
new file mode 100644
index 000000000..599110d7a
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
@@ -0,0 +1,559 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ *
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: MCXA153
+package_id: MCXA153VLH
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: FRDM-MCXA153
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_clock.h"
+#include "clock_config.h"
+#include "fsl_spc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockFRO96M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CPU_clock.outFreq, value: 12 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: MAIN_clock.outFreq, value: 12 MHz}
+- {id: Slow_clock.outFreq, value: 3 MHz}
+- {id: System_clock.outFreq, value: 12 MHz}
+- {id: TRACE_clock.outFreq, value: 12 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: SCGMode, value: SIRC}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
+- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO12M */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO24M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO24M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 24 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 48 MHz}
+- {id: Slow_clock.outFreq, value: 6 MHz}
+- {id: System_clock.outFreq, value: 24 MHz}
+- {id: TRACE_clock.outFreq, value: 24 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SYSCON.AHBCLKDIV.scale, value: '2'}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO24M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U);               /* !< Set AHBCLKDIV divider to value 2 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO48M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO48M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 48 MHz}
+- {id: Slow_clock.outFreq, value: 12 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+- {id: TRACE_clock.outFreq, value: 48 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO48M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO64M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO64M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 64 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz}
+- {id: FRO_HF_clock.outFreq, value: 64 MHz}
+- {id: MAIN_clock.outFreq, value: 64 MHz}
+- {id: Slow_clock.outFreq, value: 16 MHz}
+- {id: System_clock.outFreq, value: 64 MHz}
+- {id: TRACE_clock.outFreq, value: 64 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: VDD_CORE, value: voltage_1v1}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
+sources:
+- {id: SCG.FIRC.outFreq, value: 64 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO64M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(64000000U);               /*!< Enable FRO HF(64MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO96M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO96M
+called_from_default_init: true
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 96 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz}
+- {id: FRO_HF_clock.outFreq, value: 96 MHz}
+- {id: MAIN_clock.outFreq, value: 96 MHz}
+- {id: Slow_clock.outFreq, value: 24 MHz}
+- {id: System_clock.outFreq, value: 96 MHz}
+- {id: TRACE_clock.outFreq, value: 96 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: VDD_CORE, value: voltage_1v1}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+sources:
+- {id: SCG.FIRC.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO96M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(96000000U);               /*!< Enable FRO HF(96MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK;
+}
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
new file mode 100644
index 000000000..d609eb468
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
@@ -0,0 +1,385 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO12M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO12M_CLK_48M_CLOCK           0UL            /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO12M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO12M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO12M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO12M_CPU_CLOCK               12000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO12M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO12M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_FRO_HF_DIV_CLOCK        0UL            /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_FRO_HF_CLOCK            0UL            /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO12M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO12M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO12M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO12M_MAIN_CLOCK              12000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SLOW_CLOCK              3000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             12000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO24M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK           24000000U  /*!< Core clock frequency: 24000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO24M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO24M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO24M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO24M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO24M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO24M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO24M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO24M_CPU_CLOCK               24000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO24M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO24M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO24M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO24M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO24M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO24M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO24M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO24M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_SLOW_CLOCK              6000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO24M_SYSTEM_CLOCK            24000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO24M_TRACE_CLOCK             24000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO24M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO24M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO24M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO24M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO48M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK           48000000U  /*!< Core clock frequency: 48000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO48M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO48M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO48M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO48M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO48M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO48M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO48M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO48M_CPU_CLOCK               48000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO48M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO48M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO48M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO48M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO48M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO48M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO48M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO48M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_SLOW_CLOCK              12000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO48M_SYSTEM_CLOCK            48000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO48M_TRACE_CLOCK             48000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO48M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO48M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO48M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO48M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO64M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK           64000000U  /*!< Core clock frequency: 64000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO64M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO64M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO64M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO64M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO64M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO64M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO64M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO64M_CPU_CLOCK               64000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO64M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO64M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO64M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_FRO_HF_DIV_CLOCK        64000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_FRO_HF_CLOCK            64000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO64M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO64M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO64M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO64M_MAIN_CLOCK              64000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO64M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_SLOW_CLOCK              16000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO64M_SYSTEM_CLOCK            64000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO64M_TRACE_CLOCK             64000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO64M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO64M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO64M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO64M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO96M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK           96000000U  /*!< Core clock frequency: 96000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO96M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO96M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO96M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO96M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO96M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO96M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO96M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO96M_CPU_CLOCK               96000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO96M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO96M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO96M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_FRO_HF_DIV_CLOCK        96000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_FRO_HF_CLOCK            96000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO96M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO96M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO96M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO96M_MAIN_CLOCK              96000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO96M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_SLOW_CLOCK              24000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO96M_SYSTEM_CLOCK            96000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO96M_TRACE_CLOCK             96000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO96M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO96M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO96M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
new file mode 100644
index 000000000..58b0f47e9
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
@@ -0,0 +1,492 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: MCXA153
+package_id: MCXA153VLH
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: FRDM-MCXA153
+external_user_signals: {}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_port.h"
+#include "fsl_gpio.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '51', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
+    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '52', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1, slew_rate: fast, open_drain: disable,
+    drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Write to PORT0: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT0);
+    /* LPUART0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
+    /* PORT0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
+
+    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
+                                             .pullSelect = kPORT_PullDisable,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* High drive strength is configured */
+                                             .driveStrength = kPORT_HighDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as LPUART0_RXD */
+                                             .mux = kPORT_MuxAlt2,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_2 (pin 51) is configured as LPUART0_RXD */
+    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
+
+    const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up resistor is enabled */
+                                             .pullSelect = kPORT_PullUp,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* Low drive strength is configured */
+                                             .driveStrength = kPORT_LowDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as LPUART0_TXD */
+                                             .mux = kPORT_MuxAlt2,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_3 (pin 52) is configured as LPUART0_TXD */
+    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '50', peripheral: SWD, signal: SWCLK, pin_signal: P0_1/TCLK/SWCLK/LPUART0_CTS_B/LPSPI0_SDI/CT_INP1, slew_rate: fast, open_drain: disable, drive_strength: low,
+    pull_select: down, pull_enable: enable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '49', peripheral: SWD, signal: SWDIO, pin_signal: P0_0/TMS/SWDIO/LPUART0_RTS_B/LPSPI0_PCS0/CT_INP0, slew_rate: fast, open_drain: disable, drive_strength: high,
+    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '51', peripheral: SWD, signal: SWO, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
+    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Write to PORT0: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT0);
+    /* PORT0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
+    /* LPUART0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
+
+    const port_pin_config_t DEBUG_SWD_SWDIO = {/* Internal pull-up resistor is enabled */
+                                               .pullSelect = kPORT_PullUp,
+                                               /* Low internal pull resistor value is selected. */
+                                               .pullValueSelect = kPORT_LowPullResistor,
+                                               /* Fast slew rate is configured */
+                                               .slewRate = kPORT_FastSlewRate,
+                                               /* Passive input filter is disabled */
+                                               .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                               /* Open drain output is disabled */
+                                               .openDrainEnable = kPORT_OpenDrainDisable,
+                                               /* High drive strength is configured */
+                                               .driveStrength = kPORT_HighDriveStrength,
+                                               /* Normal drive strength is configured */
+                                               .driveStrength1 = kPORT_NormalDriveStrength,
+                                               /* Pin is configured as SWDIO */
+                                               .mux = kPORT_MuxAlt1,
+                                               /* Digital input enabled */
+                                               .inputBuffer = kPORT_InputBufferEnable,
+                                               /* Digital input is not inverted */
+                                               .invertInput = kPORT_InputNormal,
+                                               /* Pin Control Register fields [15:0] are not locked */
+                                               .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_0 (pin 49) is configured as SWDIO */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, &DEBUG_SWD_SWDIO);
+
+    const port_pin_config_t DEBUG_SWD_SWDCLK = {/* Internal pull-down resistor is enabled */
+                                                .pullSelect = kPORT_PullDown,
+                                                /* Low internal pull resistor value is selected. */
+                                                .pullValueSelect = kPORT_LowPullResistor,
+                                                /* Fast slew rate is configured */
+                                                .slewRate = kPORT_FastSlewRate,
+                                                /* Passive input filter is disabled */
+                                                .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                                /* Open drain output is disabled */
+                                                .openDrainEnable = kPORT_OpenDrainDisable,
+                                                /* Low drive strength is configured */
+                                                .driveStrength = kPORT_LowDriveStrength,
+                                                /* Normal drive strength is configured */
+                                                .driveStrength1 = kPORT_NormalDriveStrength,
+                                                /* Pin is configured as SWCLK */
+                                                .mux = kPORT_MuxAlt1,
+                                                /* Digital input enabled */
+                                                .inputBuffer = kPORT_InputBufferEnable,
+                                                /* Digital input is not inverted */
+                                                .invertInput = kPORT_InputNormal,
+                                                /* Pin Control Register fields [15:0] are not locked */
+                                                .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_1 (pin 50) is configured as SWCLK */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, &DEBUG_SWD_SWDCLK);
+
+    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
+                                             .pullSelect = kPORT_PullDisable,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* High drive strength is configured */
+                                             .driveStrength = kPORT_HighDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as SWO */
+                                             .mux = kPORT_MuxAlt1,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_2 (pin 51) is configured as SWO */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '37', peripheral: GPIO3, signal: 'GPIO, 13', pin_signal: P3_13/LPUART2_CTS_B/CT1_MAT3/PWM0_X1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '46', peripheral: GPIO3, signal: 'GPIO, 0', pin_signal: P3_0/WUU0_IN22/TRIG_IN0/CT_INP16/PWM0_A0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitLEDsPins(void)
+{
+    /* Write to GPIO3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GateGPIO3);
+    /* Write to PORT3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT3);
+    /* GPIO3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
+    /* PORT3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_0 (pin 46)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_12 (pin 38)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_13 (pin 37)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
+
+    /* PORT3_0 (pin 46) is configured as P3_0 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[0] =
+        ((PORT3->PCR[0] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Passive Filter Enable: Disables. */
+         | PORT_PCR_PFE(PCR_PFE_pfe0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+
+    /* PORT3_12 (pin 38) is configured as P3_12 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[12] =
+        ((PORT3->PCR[12] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+
+    /* PORT3_13 (pin 37) is configured as P3_13 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[13] =
+        ((PORT3->PCR[13] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '1', peripheral: GPIO1, signal: 'GPIO, 7', pin_signal: P1_7/WUU0_IN9/TRIG_OUT2/LPUART2_CTS_B/CT_INP7/ADC0_A23, slew_rate: fast, open_drain: disable,
+    drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '8', peripheral: GPIO1, signal: 'GPIO, 29', pin_signal: P1_29/RESET_B/SPC_LPREQ, slew_rate: fast, open_drain: enable, drive_strength: low, pull_select: up,
+    pull_enable: enable, passive_filter: enable, pull_value: low, input_buffer: enable, invert_input: normal}
+  - {pin_num: '32', peripheral: GPIO3, signal: 'GPIO, 29', pin_signal: P3_29/WUU0_IN27/ISPMODE_N/CT_INP3/ADC0_A14, slew_rate: fast, open_drain: disable, drive_strength: low,
+    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Write to PORT1: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT1);
+    /* Write to PORT3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT3);
+    /* GPIO1 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO1_RST_SHIFT_RSTn);
+    /* PORT1 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT1_RST_SHIFT_RSTn);
+    /* GPIO3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
+    /* PORT3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
+
+    const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */
+                                   .pullSelect = kPORT_PullUp,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is enabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterEnable,
+                                   /* Open drain output is enabled */
+                                   .openDrainEnable = kPORT_OpenDrainEnable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P1_29 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT1_29 (pin 8) is configured as P1_29 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW1_PORT, BOARD_INITBUTTONSPINS_SW1_PIN, &SW1);
+
+    const port_pin_config_t SW3 = {/* Internal pull-up/down resistor is disabled */
+                                   .pullSelect = kPORT_PullDisable,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is disabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                   /* Open drain output is disabled */
+                                   .openDrainEnable = kPORT_OpenDrainDisable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P1_7 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT1_7 (pin 1) is configured as P1_7 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW3_PORT, BOARD_INITBUTTONSPINS_SW3_PIN, &SW3);
+
+    const port_pin_config_t ISP = {/* Internal pull-up resistor is enabled */
+                                   .pullSelect = kPORT_PullUp,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is disabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                   /* Open drain output is disabled */
+                                   .openDrainEnable = kPORT_OpenDrainDisable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P3_29 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT3_29 (pin 32) is configured as P3_29 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_ISP_PORT, BOARD_INITBUTTONSPINS_ISP_PIN, &ISP);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
new file mode 100644
index 000000000..4a42f266d
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
@@ -0,0 +1,211 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
+                                                                        /* @} */
+
+/*! @name PORT0_3 (number 52), P0_3/J25[1]/J18[8]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 3U                   /*!<@brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 3U)      /*!<@brief PORT pin mask */
+                                                                        /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void);
+
+/*! @name PORT0_1 (number 50), P0_1/SWCLK/JP10[2]/J18[4]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 1U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 1U)      /*!<@brief PORT pin mask */
+                                                                          /* @} */
+
+/*! @name PORT0_0 (number 49), P0_0/SWDIO/J18[2]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 0U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
+                                                                         /* @} */
+
+/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
+                                                                       /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void);
+
+#define PCR_DSE_dse0 0x00u /*!<@brief Drive Strength Enable: Low */
+#define PCR_IBE_ibe1 0x01u /*!<@brief Input Buffer Enable: Enables */
+#define PCR_INV_inv0 0x00u /*!<@brief Invert Input: Does not invert */
+#define PCR_ODE_ode0 0x00u /*!<@brief Open Drain Enable: Disables */
+#define PCR_PE_pe0 0x00u   /*!<@brief Pull Enable: Disables */
+#define PCR_PFE_pfe0 0x00u /*!<@brief Passive Filter Enable: Disables */
+#define PCR_PS_ps1 0x01u   /*!<@brief Pull Select: Enables internal pullup resistor */
+#define PCR_SRE_sre0 0x00u /*!<@brief Slew Rate Enable: Fast */
+
+/*! @name PORT3_13 (number 37), P3_13/J1[14]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 13U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PORT3_12 (number 38), P3_12/J1[12]/J5[1]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_RED_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 12U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 12U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*! @name PORT3_0 (number 46), P3_0/J1[8]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO3               /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 0U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 0U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT PORT3               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 0U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void);
+
+/*! @name PORT1_7 (number 1), P1_7/J1[1]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO GPIO1               /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN 7U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_SW3_PORT PORT1               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW3_PIN 7U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_SW3_PIN_MASK (1U << 7U)      /*!<@brief PORT pin mask */
+                                                           /* @} */
+
+/*! @name PORT1_29 (number 8), P1_29/J3[6]/J18[10]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO1                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 29U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_SW1_PORT PORT1                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW1_PIN 29U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_SW1_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*! @name PORT3_29 (number 32), P3_29/J18[7]/J4[11]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN 29U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_ISP_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_ISP_PIN 29U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_ISP_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
deleted file mode 100644
index 5a132dc67..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
+++ /dev/null
@@ -1,466 +0,0 @@
-/*
- * Copyright 2023 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to setup clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- *
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v12.0
-processor: MCXA153
-package_id: MCXA153VLH
-mcu_data: ksdk2_0
-processor_version: 0.13.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_clock.h"
-#include "clock_config.h"
-#include "fsl_spc.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-//extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CPU_clock.outFreq, value: 12 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: MAIN_clock.outFreq, value: 12 MHz}
-- {id: Slow_clock.outFreq, value: 3 MHz}
-- {id: System_clock.outFreq, value: 12 MHz}
-settings:
-- {id: SCGMode, value: SIRC}
-- {id: FRO_HF_PERIPHERALS_EN_CFG, value: Disabled}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
-- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO12M */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO24M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO24M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 24 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
-- {id: FRO_HF_clock.outFreq, value: 48 MHz}
-- {id: MAIN_clock.outFreq, value: 48 MHz}
-- {id: Slow_clock.outFreq, value: 6 MHz}
-- {id: System_clock.outFreq, value: 24 MHz}
-settings:
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SYSCON.AHBCLKDIV.scale, value: '2', locked: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO24M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U);               /* !< Set AHBCLKDIV divider to value 2 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO48M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO48M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 48 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
-- {id: FRO_HF_clock.outFreq, value: 48 MHz}
-- {id: MAIN_clock.outFreq, value: 48 MHz}
-- {id: Slow_clock.outFreq, value: 12 MHz}
-- {id: System_clock.outFreq, value: 48 MHz}
-settings:
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO48M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO64M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO64M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 64 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz}
-- {id: FRO_HF_clock.outFreq, value: 64 MHz}
-- {id: MAIN_clock.outFreq, value: 64 MHz}
-- {id: Slow_clock.outFreq, value: 16 MHz}
-- {id: System_clock.outFreq, value: 64 MHz}
-settings:
-- {id: VDD_CORE, value: voltage_1v1}
-- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
-sources:
-- {id: SCG.FIRC.outFreq, value: 64 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO64M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-    CLOCK_SetupFROHFClocking(64000000U);               /*!< Enable FRO HF(64MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO96M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO96M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 96 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz}
-- {id: FRO_HF_clock.outFreq, value: 96 MHz}
-- {id: MAIN_clock.outFreq, value: 96 MHz}
-- {id: Slow_clock.outFreq, value: 24 MHz}
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: VDD_CORE, value: voltage_1v1}
-- {id: CLKOUTDIV_HALT, value: Enable}
-- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
-sources:
-- {id: SCG.FIRC.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO96M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-    CLOCK_SetupFROHFClocking(96000000U);               /*!< Enable FRO HF(96MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK;
-}
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
deleted file mode 100644
index aae811052..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * Copyright 2023 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO24M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK           24000000U  /*!< Core clock frequency: 24000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO24M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO48M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK           48000000U  /*!< Core clock frequency: 48000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO48M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO64M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK           64000000U  /*!< Core clock frequency: 64000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO64M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO96M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK           96000000U  /*!< Core clock frequency: 96000000Hz */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/frdm_mcxa153.mex b/hw/bsp/mcx/boards/frdm_mcxa153/frdm_mcxa153.mex
new file mode 100644
index 000000000..43fea73db
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/frdm_mcxa153.mex
@@ -0,0 +1,573 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="FRDM-MCXA153" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="39087bef-8f98-40a9-aaf4-e556fb7a1ce1" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>MCXA153</processor>
+      <package>MCXA153VLH</package>
+      <board>FRDM-MCXA153</board>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="cm33_core0">
+         <core name="Cortex-M33" id="cm33_core0" description="M33 core"/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <custom_copyright>
+         <text>/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+</text>
+         <enabled>true</enabled>
+      </custom_copyright>
+      <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>25.09.10</processor_version>
+            <external_user_signals>
+               <properties/>
+            </external_user_signals>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="LPUART0" description="Peripheral LPUART0 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.port" description="Pins initialization requires the PORT Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="LPUART0" signal="RX" pin_num="51" pin_signal="P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="high"/>
+                        <pin_feature name="pull_select" value="down"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="LPUART0" signal="TX" pin_num="52" pin_signal="P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="enable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSWD_DEBUGPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.port" description="Pins initialization requires the PORT Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SWD" signal="SWCLK" pin_num="50" pin_signal="P0_1/TCLK/SWCLK/LPUART0_CTS_B/LPSPI0_SDI/CT_INP1">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="down"/>
+                        <pin_feature name="pull_enable" value="enable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWDIO" pin_num="49" pin_signal="P0_0/TMS/SWDIO/LPUART0_RTS_B/LPSPI0_PCS0/CT_INP0">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="high"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="enable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWO" pin_num="51" pin_signal="P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="high"/>
+                        <pin_feature name="pull_select" value="down"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.port" description="Pins initialization requires the PORT Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.gpio" description="Pins initialization requires the GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO3" signal="GPIO, 13" pin_num="37" pin_signal="P3_13/LPUART2_CTS_B/CT1_MAT3/PWM0_X1">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO3" signal="GPIO, 12" pin_num="38" pin_signal="P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO3" signal="GPIO, 0" pin_num="46" pin_signal="P3_0/WUU0_IN22/TRIG_IN0/CT_INP16/PWM0_A0">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="passive_filter" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.port" description="Pins initialization requires the PORT Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO1" signal="GPIO, 7" pin_num="1" pin_signal="P1_7/WUU0_IN9/TRIG_OUT2/LPUART2_CTS_B/CT_INP7/ADC0_A23">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="down"/>
+                        <pin_feature name="pull_enable" value="disable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO1" signal="GPIO, 29" pin_num="8" pin_signal="P1_29/RESET_B/SPC_LPREQ">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="enable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="enable"/>
+                        <pin_feature name="passive_filter" value="enable"/>
+                        <pin_feature name="pull_value" value="low"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO3" signal="GPIO, 29" pin_num="32" pin_signal="P3_29/WUU0_IN27/ISPMODE_N/CT_INP3/ADC0_A14">
+                     <pin_features>
+                        <pin_feature name="slew_rate" value="fast"/>
+                        <pin_feature name="open_drain" value="disable"/>
+                        <pin_feature name="drive_strength" value="low"/>
+                        <pin_feature name="pull_select" value="up"/>
+                        <pin_feature name="pull_enable" value="enable"/>
+                        <pin_feature name="input_buffer" value="enable"/>
+                        <pin_feature name="invert_input" value="normal"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="18.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>25.09.10</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="CLK_1M_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CPU_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MAIN_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="Slow_clock.outFreq" value="3 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UTICK_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="WWDT0_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="SCGMode" value="SIRC" locked="false"/>
+                  <setting id="MRCC.FREQMEREFCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FREQMETARGETCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.OSTIMERCLKSEL.sel" value="VBAT.CLK16K_1" locked="false"/>
+                  <setting id="SCG.SCSSEL.sel" value="SCG.SIRC" locked="false"/>
+                  <setting id="SCG_FIRCCSR_FIRCEN_CFG" value="Disabled" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO24M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO24M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="CLK_1M_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_48M_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CPU_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_DIV_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MAIN_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="Slow_clock.outFreq" value="6 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UTICK_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="WWDT0_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="MRCC.FREQMEREFCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FREQMETARGETCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.OSTIMERCLKSEL.sel" value="VBAT.CLK16K_1" locked="false"/>
+                  <setting id="SYSCON.AHBCLKDIV.scale" value="2" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO48M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO48M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO48M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO48M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="CLK_1M_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_48M_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CPU_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_DIV_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MAIN_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="Slow_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UTICK_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="WWDT0_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="MRCC.FREQMEREFCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FREQMETARGETCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.OSTIMERCLKSEL.sel" value="VBAT.CLK16K_1" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO64M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO64M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO64M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO64M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SCG.FIRC.outFreq" value="64 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="CLK_1M_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_48M_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CPU_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_DIV_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MAIN_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="Slow_clock.outFreq" value="16 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_clock.outFreq" value="64 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UTICK_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="WWDT0_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="VDD_CORE" value="voltage_1v1" locked="false"/>
+                  <setting id="MRCC.FREQMEREFCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FREQMETARGETCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FROHFDIV.scale" value="1" locked="true"/>
+                  <setting id="MRCC.OSTIMERCLKSEL.sel" value="VBAT.CLK16K_1" locked="false"/>
+                  <setting id="SYSCON.AHBCLKDIV.scale" value="1" locked="true"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFRO96M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.mcx_spc" description="Clocks initialization requires the MCX_SPC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SCG.FIRC.outFreq" value="96 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="CLK_1M_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CLK_48M_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="CPU_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_12M_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_DIV_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="FRO_HF_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="MAIN_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="Slow_clock.outFreq" value="24 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="TRACE_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+                  <clock_output id="UTICK_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+                  <clock_output id="WWDT0_clock.outFreq" value="1 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="VDD_CORE" value="voltage_1v1" locked="false"/>
+                  <setting id="MRCC.FREQMEREFCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.FREQMETARGETCLKSEL.sel" value="MRCC.aoi0_out0" locked="false"/>
+                  <setting id="MRCC.OSTIMERCLKSEL.sel" value="VBAT.CLK16K_1" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="3.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>N/A</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>25.09.10</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="e7964cfd-63b7-4756-a1af-71a53c49bda7" called_from_default_init="true" id_prefix="" core="cm33_core0">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="NVIC" uuid="6948572f-4bff-423f-8e78-3f0608580bb3" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="3700167a-8497-4b9d-ad19-c395e5e33267" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+                  <setting name="global_init" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="faf79cc1-e0a0-4bf8-a803-42cf14e2a60a" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_can" uuid="f1cb80d2-97a1-4bdd-ab65-0d3d8493019c" type_id="generic_can">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="a17f12aa-b188-417b-a499-c22892686ae2" type_id="uart_cmsis_common">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="96c6481f-affb-44c4-9d6f-ebc972fcae38" type_id="generic_uart">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_enet" uuid="44df8b34-f20e-449a-8d2d-2cba12faf3f7" type_id="generic_enet">
+               <config_set_global name="global_enet"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="2fe36bae-ef17-4655-9cf5-91cac6de7288" type_id="gpio_adapter_common">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="10.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>N/A</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
deleted file mode 100644
index 47709951b..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
+++ /dev/null
@@ -1,130 +0,0 @@
-/*
- * Copyright 2023 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v14.0
-processor: MCXA153
-package_id: MCXA153VLH
-mcu_data: ksdk2_0
-processor_version: 0.14.4
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_port.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '51', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
-    drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '52', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1, slew_rate: fast, open_drain: disable,
-    drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitPins(void)
-{
-    CLOCK_EnableClock(kCLOCK_GateGPIO3);
-    /* Write to PORT3: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT3);
-    /* GPIO3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
-    /* PORT3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
-
-
-    /* Write to PORT0: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT0);
-    /* LPUART0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
-    /* PORT0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
-
-    const port_pin_config_t port0_2_pin51_config = {/* Internal pull-up resistor is enabled */
-                                                    kPORT_PullUp,
-                                                    /* Low internal pull resistor value is selected. */
-                                                    kPORT_LowPullResistor,
-                                                    /* Fast slew rate is configured */
-                                                    kPORT_FastSlewRate,
-                                                    /* Passive input filter is disabled */
-                                                    kPORT_PassiveFilterDisable,
-                                                    /* Open drain output is disabled */
-                                                    kPORT_OpenDrainDisable,
-                                                    /* Low drive strength is configured */
-                                                    kPORT_LowDriveStrength,
-                                                    /* Normal drive strength is configured */
-                                                    kPORT_NormalDriveStrength,
-                                                    /* Pin is configured as LPUART0_RXD */
-                                                    kPORT_MuxAlt2,
-                                                    /* Digital input enabled */
-                                                    kPORT_InputBufferEnable,
-                                                    /* Digital input is not inverted */
-                                                    kPORT_InputNormal,
-                                                    /* Pin Control Register fields [15:0] are not locked */
-                                                    kPORT_UnlockRegister};
-    /* PORT0_2 (pin 51) is configured as LPUART0_RXD */
-    PORT_SetPinConfig(PORT0, 2U, &port0_2_pin51_config);
-
-    const port_pin_config_t port0_3_pin52_config = {/* Internal pull-up resistor is enabled */
-                                                    kPORT_PullUp,
-                                                    /* Low internal pull resistor value is selected. */
-                                                    kPORT_LowPullResistor,
-                                                    /* Fast slew rate is configured */
-                                                    kPORT_FastSlewRate,
-                                                    /* Passive input filter is disabled */
-                                                    kPORT_PassiveFilterDisable,
-                                                    /* Open drain output is disabled */
-                                                    kPORT_OpenDrainDisable,
-                                                    /* Low drive strength is configured */
-                                                    kPORT_LowDriveStrength,
-                                                    /* Normal drive strength is configured */
-                                                    kPORT_NormalDriveStrength,
-                                                    /* Pin is configured as LPUART0_TXD */
-                                                    kPORT_MuxAlt2,
-                                                    /* Digital input enabled */
-                                                    kPORT_InputBufferEnable,
-                                                    /* Digital input is not inverted */
-                                                    kPORT_InputNormal,
-                                                    /* Pin Control Register fields [15:0] are not locked */
-                                                    kPORT_UnlockRegister};
-    /* PORT0_3 (pin 52) is configured as LPUART0_TXD */
-    PORT_SetPinConfig(PORT0, 3U, &port0_3_pin52_config);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h
deleted file mode 100644
index 2c0e617a5..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h
+++ /dev/null
@@ -1,51 +0,0 @@
-/*
- * Copyright 2023 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void);
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index 2dfefeb92..e1accf941 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -61,14 +61,9 @@ void USB0_IRQHandler(void) {
 
 void board_init(void) {
 
-  BOARD_InitPins();
-
+   BOARD_InitBootPins();
   BOARD_InitBootClocks();
 
-  #ifdef XTAL0_CLK_HZ
-  CLOCK_SetupExtClocking(XTAL0_CLK_HZ);
-  #endif
-
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
index a16f4b6c0..4321e654a 100644
--- a/hw/bsp/mcx/family.mk
+++ b/hw/bsp/mcx/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -DBOARD_TUD_RHPORT=$(PORT) \
 
 # mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration
+CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
 
 LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
 
@@ -56,12 +56,9 @@ INC += \
 	$(TOP)/$(SDK_DIR)/drivers/ \
 	$(TOP)/$(SDK_DIR)/drivers/lpuart \
 	$(TOP)/$(SDK_DIR)/drivers/lpflexcomm \
-  	$(TOP)/$(SDK_DIR)/drivers/common\
-  	$(TOP)/$(SDK_DIR)/drivers/gpio\
-  	$(TOP)/$(SDK_DIR)/drivers/port\
-   	$(TOP)/hw/bsp/mcx/drivers/spc
-
-
-
+	$(TOP)/$(SDK_DIR)/drivers/common\
+	$(TOP)/$(SDK_DIR)/drivers/gpio\
+	$(TOP)/$(SDK_DIR)/drivers/port\
+	$(TOP)/hw/bsp/mcx/drivers/spc
 
 SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 05ae6929c..002cd3a0e 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -543,6 +543,10 @@
   #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
   #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
 
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
+
 #elif TU_CHECK_MCU(OPT_MCU_CH32V103)
   #define TUP_USBIP_WCH_USBFS
 
@@ -590,6 +594,10 @@
   #define TUP_RHPORT_HIGHSPEED CFG_TUD_WCH_USBIP_USBHS
   #define TUP_DCD_ENDPOINT_MAX (CFG_TUD_WCH_USBIP_USBHS ? 16 : 8)
 
+  #if CFG_TUD_WCH_USBIP_USBHS
+    #define TUP_DCD_EDPT_CLOSE_API
+  #endif
+
 //--------------------------------------------------------------------+
 // Analog Devices
 //--------------------------------------------------------------------+
@@ -681,8 +689,7 @@
   #define TU_ATTR_FAST_FUNC
 #endif
 
-#if defined(TUP_USBIP_CHIPIDEA_FS) || defined(TUP_USBIP_IP3511) || defined(TUP_USBIP_RUSB2) || \
-  (defined(TUP_USBIP_WCH_USBFS) && CFG_TUD_WCH_USBIP_USBFS)
+#if defined(TUP_USBIP_IP3511) || defined(TUP_USBIP_RUSB2)
   #define TUP_DCD_EDPT_CLOSE_API
 #endif
 
diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
index 8b5c42aa2..40ad4cf82 100644
--- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
@@ -344,24 +344,21 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
-
-  const unsigned ep_addr  = ep_desc->bEndpointAddress;
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  const unsigned xfer     = ep_desc->bmAttributes.xfer;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  const unsigned odd      = ep->odd;
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+static bool edpt_open(uint8_t rhport, uint8_t ep_addr, uint16_t max_packet_size, tusb_xfer_type_t xfer) {
+  (void)rhport;
+  const unsigned       epn = tu_edpt_number(ep_addr);
+  const unsigned       dir = tu_edpt_dir(ep_addr);
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  const unsigned       odd = ep->odd;
+  buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
 
   /* No support for control transfer */
   TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
 
-  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  ep->max_packet_size = max_packet_size;
+
   unsigned val = USB_ENDPT_EPCTLDIS_MASK;
-  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   CI_REG->EP[epn].CTL |= val;
 
@@ -375,8 +372,27 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
-void dcd_edpt_close_all(uint8_t rhport)
-{
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  return edpt_open(rhport, ep_desc->bEndpointAddress, tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer);
+}
+
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  return edpt_open(rhport, ep_addr, largest_packet_size, TUSB_XFER_ISOCHRONOUS);
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  const unsigned    epn = tu_edpt_number(ep_desc->bEndpointAddress);
+  const unsigned    dir = tu_edpt_dir(ep_desc->bEndpointAddress);
+  endpoint_state_t *ep  = &_dcd.endpoint[epn][dir];
+
+  dcd_int_disable(rhport);
+  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  dcd_int_enable(rhport);
+
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport) {
   dcd_int_disable(rhport);
 
   for (unsigned i = 1; i < 16; ++i) {
@@ -399,43 +415,6 @@ void dcd_edpt_close_all(uint8_t rhport)
   }
 }
 
-#ifdef TUP_DCD_EDPT_CLOSE_API
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
-  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
-
-  dcd_int_disable(rhport);
-
-  CI_REG->EP[epn].CTL &= ~msk;
-  ep->max_packet_size = 0;
-  ep->length          = 0;
-  ep->remaining       = 0;
-  bd[0].head          = 0;
-  bd[1].head          = 0;
-
-  dcd_int_enable(rhport);
-}
-
-#else
-
-bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
-  (void) rhport;
-  (void) ep_addr;
-  (void) largest_packet_size;
-  return false;
-}
-
-bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
-  (void) rhport;
-  (void) desc_ep;
-  return false;
-}
-#endif
-
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
 {
   const unsigned epn      = tu_edpt_number(ep_addr);
diff --git a/src/portable/nxp/khci/dcd_khci.c b/src/portable/nxp/khci/dcd_khci.c
index da1c5c888..9edaadf58 100644
--- a/src/portable/nxp/khci/dcd_khci.c
+++ b/src/portable/nxp/khci/dcd_khci.c
@@ -355,24 +355,21 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
+static bool edpt_open(uint8_t rhport, uint8_t ep_addr, uint16_t max_packet_size, tusb_xfer_type_t xfer) {
+  (void)rhport;
 
-  const unsigned ep_addr  = ep_desc->bEndpointAddress;
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  const unsigned xfer     = ep_desc->bmAttributes.xfer;
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  const unsigned odd      = ep->odd;
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
+  const unsigned       epn = tu_edpt_number(ep_addr);
+  const unsigned       dir = tu_edpt_dir(ep_addr);
+  endpoint_state_t    *ep  = &_dcd.endpoint[epn][dir];
+  const unsigned       odd = ep->odd;
+  buffer_descriptor_t *bd  = _dcd.bdt[epn][dir];
 
   /* No support for control transfer */
   TU_ASSERT(epn && (xfer != TUSB_XFER_CONTROL));
 
-  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
-  unsigned val = USB_ENDPT_EPCTLDIS_MASK;
-  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK: 0;
+  ep->max_packet_size = max_packet_size;
+  unsigned val        = USB_ENDPT_EPCTLDIS_MASK;
+  val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
   KHCI->ENDPOINT[epn].ENDPT |= val;
 
@@ -386,6 +383,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   return true;
 }
 
+bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  return edpt_open(rhport, ep_desc->bEndpointAddress, tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer);
+}
+
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  return edpt_open(rhport, ep_addr, largest_packet_size, TUSB_XFER_ISOCHRONOUS);
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc) {
+  const unsigned    epn = tu_edpt_number(ep_desc->bEndpointAddress);
+  const unsigned    dir = tu_edpt_dir(ep_desc->bEndpointAddress);
+  endpoint_state_t *ep  = &_dcd.endpoint[epn][dir];
+
+  dcd_int_disable(rhport);
+  ep->max_packet_size = tu_edpt_packet_size(ep_desc);
+  dcd_int_enable(rhport);
+
+  return true;
+}
+
 void dcd_edpt_close_all(uint8_t rhport)
 {
   (void) rhport;
@@ -408,41 +425,6 @@ void dcd_edpt_close_all(uint8_t rhport)
   }
 }
 
-void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
-{
-  (void) rhport;
-
-  const unsigned epn      = tu_edpt_number(ep_addr);
-  const unsigned dir      = tu_edpt_dir(ep_addr);
-  endpoint_state_t *ep    = &_dcd.endpoint[epn][dir];
-  buffer_descriptor_t *bd = _dcd.bdt[epn][dir];
-  const unsigned msk      = dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
-  const unsigned ie       = NVIC_GetEnableIRQ(USB0_IRQn);
-  NVIC_DisableIRQ(USB0_IRQn);
-  KHCI->ENDPOINT[epn].ENDPT &= ~msk;
-  ep->max_packet_size = 0;
-  ep->length          = 0;
-  ep->remaining       = 0;
-  bd[0].head          = 0;
-  bd[1].head          = 0;
-  if (ie) NVIC_EnableIRQ(USB0_IRQn);
-}
-
-#if 0
-bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
-  (void) rhport;
-  (void) ep_addr;
-  (void) largest_packet_size;
-  return false;
-}
-
-bool dcd_edpt_iso_activate(uint8_t rhport, tusb_desc_endpoint_t const * desc_ep) {
-  (void) rhport;
-  (void) desc_ep;
-  return false;
-}
-  #endif
-
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t total_bytes)
 {
   (void) rhport;
-- 
cgit v1.3.1


From f6a77b87f04386ea27effb7c1faf8e1a33da0fa1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 19 Nov 2025 22:27:47 +0700
Subject: Bump version to 0.20.0

---
 AGENTS.md                |  33 ++++-
 docs/info/changelog.rst  |  93 +++++++++++++
 hw/bsp/BoardPresets.json | 342 +++++++++++++++++++++++++++++++++++++++++++----
 library.json             |   2 +-
 repository.yml           |   3 +-
 sonar-project.properties |   2 +-
 src/tusb_option.h        |   2 +-
 tools/make_release.py    |  17 ++-
 8 files changed, 452 insertions(+), 42 deletions(-)

(limited to 'hw')

diff --git a/AGENTS.md b/AGENTS.md
index d00a4b114..a6163dd42 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -164,11 +164,36 @@ python3 tools/build.py -b BOARD_NAME
 
 ## Release Instructions
 
+**DO NOT commit files automatically - only modify files and let the maintainer review before committing.**
+
 1. Bump the release version variable at the top of `tools/make_release.py`.
-2. Execute `python tools/make_release.py` to refresh `src/tusb_option.h`, `repository.yml`, and `library.json`.
-3. Generate release notes by running `git log <last-release-tag>..HEAD`, then add a new entry to
-   `docs/info/changelog.rst` that follows the existing format (heading, date, highlights, categorized bullet lists).
-4. Proceed with tagging/publishing once builds and tests succeed.
+2. Execute `python3 tools/make_release.py` to refresh:
+   - `src/tusb_option.h` (version defines)
+   - `repository.yml` (version mapping)
+   - `library.json` (PlatformIO version)
+   - `sonar-project.properties` (SonarQube version)
+   - `docs/reference/boards.rst` (generated board documentation)
+   - `hw/bsp/BoardPresets.json` (CMake presets)
+3. Generate release notes for `docs/info/changelog.rst`:
+   - Get commit list: `git log <last-release-tag>..HEAD --oneline`
+   - **Visit GitHub PRs** for merged pull requests to understand context and gather details
+   - Use GitHub tools to search/read PRs: `github-mcp-server-list_pull_requests`, `github-mcp-server-pull_request_read`
+   - Extract key changes, API modifications, bug fixes, and new features from PR descriptions
+   - Add new changelog entry following the existing format:
+     - Version heading with equals underline (e.g., `0.20.0` followed by `======`)
+     - Release date in italics (e.g., `*November 19, 2024*`)
+     - Major sections: General, API Changes, Controller Driver (DCD & HCD), Device Stack, Host Stack, Testing
+     - Use bullet lists with descriptive categorization
+     - Reference function names, config macros, and file paths using RST inline code (double backticks)
+     - Include meaningful descriptions, not just commit messages
+4. **Validation before commit**:
+   - Run unit tests: `cd test/unit-test && ceedling test:all`
+   - Build at least one example: `cd examples/device/cdc_msc && make BOARD=stm32f407disco all`
+   - Verify changed files look correct: `git diff --stat`
+5. **Leave files unstaged** for maintainer to review, modify if needed, and commit with message: `Bump version to X.Y.Z`
+6. **After maintainer commits**: Create annotated tag with `git tag -a vX.Y.Z -m "Release X.Y.Z"`
+7. Push commit and tag: `git push origin <branch> && git push origin vX.Y.Z`
+8. Create GitHub release from the tag with changelog content
 
 ## Repository Structure Quick Reference
 ```
diff --git a/docs/info/changelog.rst b/docs/info/changelog.rst
index d6bf846ed..3addce27b 100644
--- a/docs/info/changelog.rst
+++ b/docs/info/changelog.rst
@@ -2,6 +2,99 @@
 Changelog
 *********
 
+0.20.0
+======
+
+*November 19, 2024*
+
+General
+-------
+
+- New MCUs and Boards:
+
+  - Add STM32U3 device support (adjusted from STM32U0)
+  - Add nRF54H20 support with initial board configuration
+  - Rename board names: pca10056→nrf52840dk, pca10059→nrf52840dongle, pca10095→nrf5340dk
+  - Improve CMake: Move startup and linker files from board target to executable. Enhance target warning flags and fix various build warnings
+
+- Code Quality and Static Analysis:
+
+  - Add PVS-Studio static analysis to CI
+  - Add SonarQube scan support
+  - Add IAR C-Stat analysis capability
+  - Add ``.clang-format`` for consistent code formatting
+  - Fix numerous alerts and warnings found by static analysis tools
+
+- Documentation:
+
+  - Improve Getting Started documentation structure and flow
+  - Add naming conventions and buffer handling documentation
+
+Controller Driver (DCD & HCD)
+-----------------------------
+
+- DWC2
+
+  - Fix incorrect handling of Zero-Length Packets (ZLP) in the DWC2 driver when receiving data (OUT transfers)
+  - Improve EP0 multi-packet logic
+  - Support EP0 with max packet size = 8
+  - For IN endpoint, write initial packet directly to FIFO and only use TXFE interrupt for subsequent packets
+  - Fix ISO with bInterval > 2 using incomplete IN interrupt handling.
+  - Fix compile issues when enabling both host and device
+  - Clear pending suspend interrupt after USB reset (enum end)
+  - Improve host closing endpoint and channel handling when device is unplugged
+
+- FSDEV (STM32)
+
+  - Fix AT32 USB interrupt remapping in ``dcd_int_enable()``
+
+- OHCI
+
+  - Add initial LPC55 OHCI support
+  - Improve data cache support
+
+Device Stack
+------------
+
+- USBD Core
+
+  - Support configurable EP0 buffer size CFG_TUD_ENDPOINT0_BUFSIZE
+  - Make dcd_edpt_iso_alloc/activate as default API for ISO endpoint
+
+- Audio
+
+  - Add UAC1 support
+  - Implement RX FIFO threshold adjustment with `tud_audio_get/set_ep_in_fifo_threshold()`
+
+- CDC
+
+  - Migrate to endpoint stream API
+
+- HID
+
+  - Fix HID stylus descriptor
+
+- MIDI
+
+  - Migrate to endpoint stream API
+  - Add ``tud_midi_n_packet_write_n()`` and ``tud_midi_n_packet_read_n()``
+
+- MTP
+
+  - Fix incorrect MTP xact_len calculation
+
+- Video
+
+  - Add bufferless operation callback for dynamic frame generation with tud_video_prepare_payload_cb()
+
+
+Host Stack
+----------
+
+- USBH Core
+
+  - Improve transfer closing and channel management
+
 0.19.0
 ======
 
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 044c74ee1..5df924138 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -362,6 +362,10 @@
       "name": "metro_m7_1011_sd",
       "inherits": "default"
     },
+    {
+      "name": "metro_nrf52840",
+      "inherits": "default"
+    },
     {
       "name": "mimxrt1010_evk",
       "inherits": "default"
@@ -419,19 +423,43 @@
       "inherits": "default"
     },
     {
-      "name": "pca10056",
+      "name": "nrf52833dk",
       "inherits": "default"
     },
     {
-      "name": "pca10059",
+      "name": "nrf52840dk",
       "inherits": "default"
     },
     {
-      "name": "pca10095",
+      "name": "nrf52840dongle",
       "inherits": "default"
     },
     {
-      "name": "pca10100",
+      "name": "nrf5340dk",
+      "inherits": "default"
+    },
+    {
+      "name": "nrf54h20dk",
+      "inherits": "default"
+    },
+    {
+      "name": "nutiny_nuc126v",
+      "inherits": "default"
+    },
+    {
+      "name": "nutiny_sdk_nuc120",
+      "inherits": "default"
+    },
+    {
+      "name": "nutiny_sdk_nuc121",
+      "inherits": "default"
+    },
+    {
+      "name": "nutiny_sdk_nuc125",
+      "inherits": "default"
+    },
+    {
+      "name": "nutiny_sdk_nuc505",
       "inherits": "default"
     },
     {
@@ -490,6 +518,10 @@
       "name": "raspberry_pi_pico2",
       "inherits": "default"
     },
+    {
+      "name": "raspberry_pi_pico2_riscv",
+      "inherits": "default"
+    },
     {
       "name": "raspberry_pi_pico_w",
       "inherits": "default"
@@ -514,6 +546,14 @@
       "name": "same54_xplained",
       "inherits": "default"
     },
+    {
+      "name": "same70_qmtech",
+      "inherits": "default"
+    },
+    {
+      "name": "same70_xplained",
+      "inherits": "default"
+    },
     {
       "name": "samg55_xplained",
       "inherits": "default"
@@ -534,10 +574,18 @@
       "name": "sipeed_longan_nano",
       "inherits": "default"
     },
+    {
+      "name": "sltb009a",
+      "inherits": "default"
+    },
     {
       "name": "sparkfun_samd21_mini_usb",
       "inherits": "default"
     },
+    {
+      "name": "spresense",
+      "inherits": "default"
+    },
     {
       "name": "stlinkv3mini",
       "inherits": "default"
@@ -698,6 +746,10 @@
       "name": "stm32l476disco",
       "inherits": "default"
     },
+    {
+      "name": "stm32l496nucleo",
+      "inherits": "default"
+    },
     {
       "name": "stm32l4p5nucleo",
       "inherits": "default"
@@ -1336,6 +1388,11 @@
       "description": "Build preset for the metro_m7_1011_sd board",
       "configurePreset": "metro_m7_1011_sd"
     },
+    {
+      "name": "metro_nrf52840",
+      "description": "Build preset for the metro_nrf52840 board",
+      "configurePreset": "metro_nrf52840"
+    },
     {
       "name": "mimxrt1010_evk",
       "description": "Build preset for the mimxrt1010_evk board",
@@ -1407,24 +1464,54 @@
       "configurePreset": "nanoch32v305"
     },
     {
-      "name": "pca10056",
-      "description": "Build preset for the pca10056 board",
-      "configurePreset": "pca10056"
+      "name": "nrf52833dk",
+      "description": "Build preset for the nrf52833dk board",
+      "configurePreset": "nrf52833dk"
+    },
+    {
+      "name": "nrf52840dk",
+      "description": "Build preset for the nrf52840dk board",
+      "configurePreset": "nrf52840dk"
+    },
+    {
+      "name": "nrf52840dongle",
+      "description": "Build preset for the nrf52840dongle board",
+      "configurePreset": "nrf52840dongle"
+    },
+    {
+      "name": "nrf5340dk",
+      "description": "Build preset for the nrf5340dk board",
+      "configurePreset": "nrf5340dk"
+    },
+    {
+      "name": "nrf54h20dk",
+      "description": "Build preset for the nrf54h20dk board",
+      "configurePreset": "nrf54h20dk"
     },
     {
-      "name": "pca10059",
-      "description": "Build preset for the pca10059 board",
-      "configurePreset": "pca10059"
+      "name": "nutiny_nuc126v",
+      "description": "Build preset for the nutiny_nuc126v board",
+      "configurePreset": "nutiny_nuc126v"
     },
     {
-      "name": "pca10095",
-      "description": "Build preset for the pca10095 board",
-      "configurePreset": "pca10095"
+      "name": "nutiny_sdk_nuc120",
+      "description": "Build preset for the nutiny_sdk_nuc120 board",
+      "configurePreset": "nutiny_sdk_nuc120"
     },
     {
-      "name": "pca10100",
-      "description": "Build preset for the pca10100 board",
-      "configurePreset": "pca10100"
+      "name": "nutiny_sdk_nuc121",
+      "description": "Build preset for the nutiny_sdk_nuc121 board",
+      "configurePreset": "nutiny_sdk_nuc121"
+    },
+    {
+      "name": "nutiny_sdk_nuc125",
+      "description": "Build preset for the nutiny_sdk_nuc125 board",
+      "configurePreset": "nutiny_sdk_nuc125"
+    },
+    {
+      "name": "nutiny_sdk_nuc505",
+      "description": "Build preset for the nutiny_sdk_nuc505 board",
+      "configurePreset": "nutiny_sdk_nuc505"
     },
     {
       "name": "pico_sdk",
@@ -1496,6 +1583,11 @@
       "description": "Build preset for the raspberry_pi_pico2 board",
       "configurePreset": "raspberry_pi_pico2"
     },
+    {
+      "name": "raspberry_pi_pico2_riscv",
+      "description": "Build preset for the raspberry_pi_pico2_riscv board",
+      "configurePreset": "raspberry_pi_pico2_riscv"
+    },
     {
       "name": "raspberry_pi_pico_w",
       "description": "Build preset for the raspberry_pi_pico_w board",
@@ -1526,6 +1618,16 @@
       "description": "Build preset for the same54_xplained board",
       "configurePreset": "same54_xplained"
     },
+    {
+      "name": "same70_qmtech",
+      "description": "Build preset for the same70_qmtech board",
+      "configurePreset": "same70_qmtech"
+    },
+    {
+      "name": "same70_xplained",
+      "description": "Build preset for the same70_xplained board",
+      "configurePreset": "same70_xplained"
+    },
     {
       "name": "samg55_xplained",
       "description": "Build preset for the samg55_xplained board",
@@ -1551,11 +1653,21 @@
       "description": "Build preset for the sipeed_longan_nano board",
       "configurePreset": "sipeed_longan_nano"
     },
+    {
+      "name": "sltb009a",
+      "description": "Build preset for the sltb009a board",
+      "configurePreset": "sltb009a"
+    },
     {
       "name": "sparkfun_samd21_mini_usb",
       "description": "Build preset for the sparkfun_samd21_mini_usb board",
       "configurePreset": "sparkfun_samd21_mini_usb"
     },
+    {
+      "name": "spresense",
+      "description": "Build preset for the spresense board",
+      "configurePreset": "spresense"
+    },
     {
       "name": "stlinkv3mini",
       "description": "Build preset for the stlinkv3mini board",
@@ -1756,6 +1868,11 @@
       "description": "Build preset for the stm32l476disco board",
       "configurePreset": "stm32l476disco"
     },
+    {
+      "name": "stm32l496nucleo",
+      "description": "Build preset for the stm32l496nucleo board",
+      "configurePreset": "stm32l496nucleo"
+    },
     {
       "name": "stm32l4p5nucleo",
       "description": "Build preset for the stm32l4p5nucleo board",
@@ -3153,6 +3270,19 @@
         }
       ]
     },
+    {
+      "name": "metro_nrf52840",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "metro_nrf52840"
+        },
+        {
+          "type": "build",
+          "name": "metro_nrf52840"
+        }
+      ]
+    },
     {
       "name": "mimxrt1010_evk",
       "steps": [
@@ -3336,54 +3466,132 @@
       ]
     },
     {
-      "name": "pca10056",
+      "name": "nrf52833dk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nrf52833dk"
+        },
+        {
+          "type": "build",
+          "name": "nrf52833dk"
+        }
+      ]
+    },
+    {
+      "name": "nrf52840dk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nrf52840dk"
+        },
+        {
+          "type": "build",
+          "name": "nrf52840dk"
+        }
+      ]
+    },
+    {
+      "name": "nrf52840dongle",
       "steps": [
         {
           "type": "configure",
-          "name": "pca10056"
+          "name": "nrf52840dongle"
         },
         {
           "type": "build",
-          "name": "pca10056"
+          "name": "nrf52840dongle"
         }
       ]
     },
     {
-      "name": "pca10059",
+      "name": "nrf5340dk",
       "steps": [
         {
           "type": "configure",
-          "name": "pca10059"
+          "name": "nrf5340dk"
         },
         {
           "type": "build",
-          "name": "pca10059"
+          "name": "nrf5340dk"
         }
       ]
     },
     {
-      "name": "pca10095",
+      "name": "nrf54h20dk",
       "steps": [
         {
           "type": "configure",
-          "name": "pca10095"
+          "name": "nrf54h20dk"
         },
         {
           "type": "build",
-          "name": "pca10095"
+          "name": "nrf54h20dk"
         }
       ]
     },
     {
-      "name": "pca10100",
+      "name": "nutiny_nuc126v",
       "steps": [
         {
           "type": "configure",
-          "name": "pca10100"
+          "name": "nutiny_nuc126v"
         },
         {
           "type": "build",
-          "name": "pca10100"
+          "name": "nutiny_nuc126v"
+        }
+      ]
+    },
+    {
+      "name": "nutiny_sdk_nuc120",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nutiny_sdk_nuc120"
+        },
+        {
+          "type": "build",
+          "name": "nutiny_sdk_nuc120"
+        }
+      ]
+    },
+    {
+      "name": "nutiny_sdk_nuc121",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nutiny_sdk_nuc121"
+        },
+        {
+          "type": "build",
+          "name": "nutiny_sdk_nuc121"
+        }
+      ]
+    },
+    {
+      "name": "nutiny_sdk_nuc125",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nutiny_sdk_nuc125"
+        },
+        {
+          "type": "build",
+          "name": "nutiny_sdk_nuc125"
+        }
+      ]
+    },
+    {
+      "name": "nutiny_sdk_nuc505",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nutiny_sdk_nuc505"
+        },
+        {
+          "type": "build",
+          "name": "nutiny_sdk_nuc505"
         }
       ]
     },
@@ -3569,6 +3777,19 @@
         }
       ]
     },
+    {
+      "name": "raspberry_pi_pico2_riscv",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "raspberry_pi_pico2_riscv"
+        },
+        {
+          "type": "build",
+          "name": "raspberry_pi_pico2_riscv"
+        }
+      ]
+    },
     {
       "name": "raspberry_pi_pico_w",
       "steps": [
@@ -3647,6 +3868,32 @@
         }
       ]
     },
+    {
+      "name": "same70_qmtech",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "same70_qmtech"
+        },
+        {
+          "type": "build",
+          "name": "same70_qmtech"
+        }
+      ]
+    },
+    {
+      "name": "same70_xplained",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "same70_xplained"
+        },
+        {
+          "type": "build",
+          "name": "same70_xplained"
+        }
+      ]
+    },
     {
       "name": "samg55_xplained",
       "steps": [
@@ -3712,6 +3959,19 @@
         }
       ]
     },
+    {
+      "name": "sltb009a",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "sltb009a"
+        },
+        {
+          "type": "build",
+          "name": "sltb009a"
+        }
+      ]
+    },
     {
       "name": "sparkfun_samd21_mini_usb",
       "steps": [
@@ -3725,6 +3985,19 @@
         }
       ]
     },
+    {
+      "name": "spresense",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "spresense"
+        },
+        {
+          "type": "build",
+          "name": "spresense"
+        }
+      ]
+    },
     {
       "name": "stlinkv3mini",
       "steps": [
@@ -4245,6 +4518,19 @@
         }
       ]
     },
+    {
+      "name": "stm32l496nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32l496nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32l496nucleo"
+        }
+      ]
+    },
     {
       "name": "stm32l4p5nucleo",
       "steps": [
diff --git a/library.json b/library.json
index 718fd84d3..efad438a7 100644
--- a/library.json
+++ b/library.json
@@ -1,6 +1,6 @@
 {
     "name": "TinyUSB",
-    "version": "0.19.0",
+    "version": "0.20.0",
     "description": "TinyUSB is an open-source cross-platform USB Host/Device stack for embedded system, designed to be memory-safe with no dynamic allocation and thread-safe with all interrupt events are deferred then handled in the non-ISR task function.",
     "keywords": "usb, host, device",
     "repository":
diff --git a/repository.yml b/repository.yml
index 5c2aaa6fa..f4da056e3 100644
--- a/repository.yml
+++ b/repository.yml
@@ -17,5 +17,6 @@ repo.versions:
     "0.17.0": "0.17.0"
     "0.18.0": "0.18.0"
     "0.19.0": "0.19.0"
-    "0-latest": "0.19.0"
+    "0.20.0": "0.20.0"
+    "0-latest": "0.20.0"
     "0-dev": "0.0.0"
diff --git a/sonar-project.properties b/sonar-project.properties
index 5a19a234d..c0032d6e4 100644
--- a/sonar-project.properties
+++ b/sonar-project.properties
@@ -4,7 +4,7 @@ sonar.organization=hathach
 
 # This is the name and version displayed in the SonarCloud UI.
 sonar.projectName=tinyusb
-sonar.projectVersion=0.19.0
+sonar.projectVersion=0.20.0
 
 
 # Path is relative to the sonar-project.properties file. Replace "\" by "/" on Windows.
diff --git a/src/tusb_option.h b/src/tusb_option.h
index eed14214d..c8265f898 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -31,7 +31,7 @@
 
 // Version is release as major.minor.revision eg 1.0.0
 #define TUSB_VERSION_MAJOR     0
-#define TUSB_VERSION_MINOR     19
+#define TUSB_VERSION_MINOR     20
 #define TUSB_VERSION_REVISION  0
 
 #define TUSB_VERSION_NUMBER    (TUSB_VERSION_MAJOR * 10000 + TUSB_VERSION_MINOR * 100 + TUSB_VERSION_REVISION)
diff --git a/tools/make_release.py b/tools/make_release.py
index 0e7919f46..71c1e6f64 100755
--- a/tools/make_release.py
+++ b/tools/make_release.py
@@ -1,8 +1,9 @@
 #!/usr/bin/env python3
 import re
 import gen_doc
+import gen_presets
 
-version = '0.19.0'
+version = '0.20.0'
 
 print('version {}'.format(version))
 ver_id = version.split('.')
@@ -50,15 +51,19 @@ with open(f_library_json, 'w') as f:
 f_sonar_properties = 'sonar-project.properties'
 with open(f_sonar_properties) as f:
     fdata = f.read()
-    fdata = re.sub(r'(sonar\.projectVersion=)\d+\.\d+\.\d+', rf'\1{version}', fdata)
+fdata = re.sub(r'(sonar\.projectVersion=)\d+\.\d+\.\d+', r'\g<1>{}'.format(version), fdata)
 
 with open(f_sonar_properties, 'w') as f:
     f.write(fdata)
 
-###################
-# docs/info/changelog.rst
-###################
-
+# gen docs
 gen_doc.gen_deps_doc()
+gen_doc.gen_boards_doc()
 
+# gen presets
+gen_presets.main()
+
+##################(ver#
+# docs/info/changelog.rst
+###################
 print("Update docs/info/changelog.rst")
-- 
cgit v1.3.1


From e59b2c40fc9e655918629d73cc8c54b86b4a70c1 Mon Sep 17 00:00:00 2001
From: Zixun LI <zli@ogga.fr>
Date: Tue, 25 Nov 2025 10:49:07 +0100
Subject: Fix N6 build

Signed-off-by: Zixun LI <zli@ogga.fr>
---
 examples/build_system/cmake/cpu/cortex-m55.cmake | 2 ++
 hw/bsp/stm32n6/family.cmake                      | 4 ++--
 2 files changed, 4 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/examples/build_system/cmake/cpu/cortex-m55.cmake b/examples/build_system/cmake/cpu/cortex-m55.cmake
index a7a57957c..d5f6fa74a 100644
--- a/examples/build_system/cmake/cpu/cortex-m55.cmake
+++ b/examples/build_system/cmake/cpu/cortex-m55.cmake
@@ -13,6 +13,7 @@ elseif (TOOLCHAIN STREQUAL "clang")
     --target=arm-none-eabi
     -mcpu=cortex-m55
     -mfpu=fpv5-d16
+    -mcmse
     )
   set(FREERTOS_PORT GCC_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
 
@@ -20,6 +21,7 @@ elseif (TOOLCHAIN STREQUAL "iar")
   set(TOOLCHAIN_COMMON_FLAGS
     --cpu cortex-m55
     --fpu VFPv5_D16
+    --cmse
     )
   set(FREERTOS_PORT IAR_ARM_CM55_NTZ_NONSECURE CACHE INTERNAL "")
 
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index 76763937e..89e4989ad 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -52,11 +52,11 @@ function(add_board_target BOARD_TARGET)
   set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 
   if(NOT DEFINED LD_FILE_GNU)
-    set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash.ld)
+    set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_axisram2_fsbl.ld)
   endif()
   set(LD_FILE_Clang ${LD_FILE_GNU})
   if(NOT DEFINED LD_FILE_IAR)
-    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+    set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_axisram2_fsbl.icf)
   endif()
 
   add_library(${BOARD_TARGET} STATIC
-- 
cgit v1.3.1


From 8221ea220bb523b3d8c6bab915a968477a228a16 Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Tue, 25 Nov 2025 15:54:45 +0100
Subject: bsp: Disable SysTick ISR if FreeRTOS is enabled

---
 hw/bsp/at32f402_405/family.c | 15 ++++++++-------
 hw/bsp/at32f435_437/family.c |  4 +++-
 hw/bsp/imxrt/family.c        |  3 ++-
 hw/bsp/kinetis_k/family.c    |  2 ++
 hw/bsp/kinetis_kl/family.c   |  2 ++
 hw/bsp/lpc11/family.c        |  2 ++
 hw/bsp/lpc13/family.c        |  2 ++
 hw/bsp/lpc15/family.c        |  6 ++++--
 hw/bsp/lpc17/family.c        |  2 ++
 hw/bsp/lpc18/family.c        |  2 ++
 hw/bsp/lpc40/family.c        |  2 ++
 hw/bsp/lpc43/family.c        |  2 ++
 hw/bsp/lpc51/family.c        |  2 ++
 hw/bsp/lpc54/family.c        |  6 ++++--
 hw/bsp/lpc55/family.c        |  2 +-
 hw/bsp/maxim/family.c        |  2 ++
 hw/bsp/mcx/family.c          |  2 ++
 hw/bsp/mm32/family.c         |  5 +++++
 hw/bsp/msp432e4/family.c     |  2 ++
 hw/bsp/nuc100_120/family.c   |  3 +++
 hw/bsp/ra/family.c           |  3 +++
 hw/bsp/samd11/family.c       |  5 +++++
 hw/bsp/samd2x_l2x/family.c   |  3 +++
 hw/bsp/samd5x_e5x/family.c   |  6 ++++++
 hw/bsp/same7x/family.c       |  5 +++++
 hw/bsp/samg/family.c         |  2 ++
 hw/bsp/stm32c0/family.c      |  2 +-
 hw/bsp/stm32f0/family.c      |  2 +-
 hw/bsp/stm32f1/family.c      |  3 ++-
 hw/bsp/stm32f2/family.c      |  3 +++
 hw/bsp/stm32f3/family.c      |  7 +++++--
 hw/bsp/stm32f4/family.c      |  2 +-
 hw/bsp/stm32f7/family.c      |  2 +-
 hw/bsp/stm32g0/family.c      |  2 +-
 hw/bsp/stm32g4/family.c      |  2 +-
 hw/bsp/stm32h5/family.c      |  2 +-
 hw/bsp/stm32h7/family.c      |  2 +-
 hw/bsp/stm32h7rs/family.c    |  2 +-
 hw/bsp/stm32l0/family.c      |  2 +-
 hw/bsp/stm32l4/family.c      |  2 ++
 hw/bsp/stm32n6/family.c      |  2 +-
 hw/bsp/stm32u0/family.c      |  8 ++++++++
 hw/bsp/stm32u5/family.c      |  3 +++
 hw/bsp/stm32wb/family.c      |  2 +-
 hw/bsp/stm32wba/family.c     |  2 +-
 hw/bsp/tm4c/family.c         |  2 ++
 hw/bsp/xmc4000/family.c      |  2 +-
 47 files changed, 117 insertions(+), 31 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index beac1a7f8..a6c2217fe 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -75,16 +75,17 @@ void board_init(void)
   /* vbus ignore */
   board_vbus_sense_init();
 
-  /* configure systick */
-  SysTick_Config(system_core_clock / 1000);
-
-  #if CFG_TUSB_OS == OPT_OS_FREERTOS
+  #if CFG_TUSB_OS == OPT_OS_NONE
+    /* configure systick */
+    SysTick_Config(system_core_clock / 1000);
+    NVIC_SetPriority(OTGHS_IRQn, 0);
+    NVIC_SetPriority(OTGFS1_IRQn, 0);
+  #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+    // Explicitly disable systick to prevent its ISR from running before scheduler start
+    SysTick->CTRL &= ~1U;
     // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
     NVIC_SetPriority(OTGHS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
     NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  #else
-    NVIC_SetPriority(OTGHS_IRQn, 0);
-    NVIC_SetPriority(OTGFS1_IRQn, 0);
   #endif
 
   /* config led and key */
diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c
index 4bd6ee73c..01dd429f8 100644
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -74,12 +74,14 @@ void board_init(void) {
   /* vbus ignore */
   board_vbus_sense_init();
 
-  SysTick_Config(SystemCoreClock / 1000);
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(OTGFS1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(OTGFS2_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #else
+  SysTick_Config(SystemCoreClock / 1000);
   NVIC_SetPriority(OTGFS1_IRQn, 0);
   NVIC_SetPriority(OTGFS2_IRQn, 0);
 #endif
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 84b083e29..18833da80 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -120,8 +120,9 @@ void board_init(void) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_OTG1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   #ifdef USBPHY2
diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c
index 816c5c87e..98ef52739 100644
--- a/hw/bsp/kinetis_k/family.c
+++ b/hw/bsp/kinetis_k/family.c
@@ -61,6 +61,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index 000006372..c257f4b2b 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -59,6 +59,8 @@ void board_init(void)
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc11/family.c b/hw/bsp/lpc11/family.c
index b5371632c..c9f18bd2f 100644
--- a/hw/bsp/lpc11/family.c
+++ b/hw/bsp/lpc11/family.c
@@ -74,6 +74,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc13/family.c b/hw/bsp/lpc13/family.c
index 1faa54485..e212c6a63 100644
--- a/hw/bsp/lpc13/family.c
+++ b/hw/bsp/lpc13/family.c
@@ -54,6 +54,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c
index e23fdec43..5f22df175 100644
--- a/hw/bsp/lpc15/family.c
+++ b/hw/bsp/lpc15/family.c
@@ -77,10 +77,12 @@ void board_init(void)
 {
   SystemCoreClockUpdate();
 
+#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc17/family.c b/hw/bsp/lpc17/family.c
index 1edab6cd4..ba59fccca 100644
--- a/hw/bsp/lpc17/family.c
+++ b/hw/bsp/lpc17/family.c
@@ -54,6 +54,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 0db5c83b6..6c02c711f 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -83,6 +83,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index b8bc99452..5ea95e9b8 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -89,6 +89,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index 591090c36..f440fb119 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -100,6 +100,8 @@ void board_init(void)
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
diff --git a/hw/bsp/lpc51/family.c b/hw/bsp/lpc51/family.c
index c963b76bd..bec86f87f 100644
--- a/hw/bsp/lpc51/family.c
+++ b/hw/bsp/lpc51/family.c
@@ -57,6 +57,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 094866d9b..7bb73afbc 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -108,10 +108,12 @@ void board_init(void) {
   // Init 96 MHz clock
   BootClockFROHF96M();
 
+#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index f1ef58926..ad0e502b5 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -147,7 +147,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/maxim/family.c b/hw/bsp/maxim/family.c
index 92b5adb6d..7ad7d6ff9 100644
--- a/hw/bsp/maxim/family.c
+++ b/hw/bsp/maxim/family.c
@@ -66,6 +66,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index e1accf941..3b91678b1 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -68,6 +68,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   #if CFG_TUSB_MCU == OPT_MCU_MCXN9
   NVIC_SetPriority(USB0_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c
index 979efb6ca..663c30818 100644
--- a/hw/bsp/mm32/family.c
+++ b/hw/bsp/mm32/family.c
@@ -70,8 +70,13 @@ void board_init(void) {
 //   usb clock
   USB_DeviceClockInit();
 
+#if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
   NVIC_SetPriority(SysTick_IRQn, 0x0);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+#endif
 
   RCC_AHBPeriphClockCmd(RCC_AHBENR_GPIOA, ENABLE);
 
diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c
index 9a3b48b66..0e1b0528a 100644
--- a/hw/bsp/msp432e4/family.c
+++ b/hw/bsp/msp432e4/family.c
@@ -85,6 +85,8 @@ void board_init(void)
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/nuc100_120/family.c b/hw/bsp/nuc100_120/family.c
index d04dc6657..752af2a56 100644
--- a/hw/bsp/nuc100_120/family.c
+++ b/hw/bsp/nuc100_120/family.c
@@ -72,6 +72,9 @@ void board_init(void)
 #if CFG_TUSB_OS  == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(48000000 / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
 #endif
 
   GPIO_SetMode(LED_PORT, 1UL << LED_PIN, GPIO_PMD_OUTPUT);
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 0fd24e493..1f75b47c1 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -118,6 +118,9 @@ void board_init(void) {
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
 #endif
 
   board_led_write(false);
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 62e060c8e..6cbf02412 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -86,7 +86,12 @@ void board_init(void)
 
   // 1ms tick timer (samd SystemCoreClock may not correct)
   SystemCoreClock = CONF_CPU_FREQUENCY;
+#if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+#endif
 
   // Led init
   gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c
index 67da1294e..a2dc8a8d4 100644
--- a/hw/bsp/samd2x_l2x/family.c
+++ b/hw/bsp/samd2x_l2x/family.c
@@ -154,6 +154,9 @@ void board_init(void) {
   SystemCoreClock = CONF_CPU_FREQUENCY;
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
 #endif
 
   // Led init
diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c
index df6f19d0f..5a7105894 100644
--- a/hw/bsp/samd5x_e5x/family.c
+++ b/hw/bsp/samd5x_e5x/family.c
@@ -103,7 +103,13 @@ void board_init(void) {
   // Update SystemCoreClock since it is hard coded with asf4 and not correct
   // Init 1ms tick timer (samd SystemCoreClock may not correct)
   SystemCoreClock = CONF_CPU_FREQUENCY;
+
+#if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+#endif
 
   // Led init
   gpio_set_pin_direction(LED_PIN, GPIO_DIRECTION_OUT);
diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c
index 572c83588..6feefa3b5 100644
--- a/hw/bsp/same7x/family.c
+++ b/hw/bsp/same7x/family.c
@@ -129,6 +129,11 @@ void board_init(void) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer (SystemCoreClock may not be correct after init)
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority((IRQn_Type) ID_USBHS, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
   // Enable USB clock
diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c
index 234dc0ec0..5c5fc3c14 100644
--- a/hw/bsp/samg/family.c
+++ b/hw/bsp/samg/family.c
@@ -88,6 +88,8 @@ void board_init(void) {
   // 1ms tick timer (samd SystemCoreClock may not correct)
   SysTick_Config(CONF_CPU_FREQUENCY / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   NVIC_SetPriority(UDP_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index 09704b527..ba8b14dd1 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -68,7 +68,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index ea1373e6c..b99b0a8cc 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -62,7 +62,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 29785397f..3147061cf 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -77,8 +77,9 @@ void board_init(void) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index c1333382a..8ea8ec5a5 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -56,6 +56,9 @@ void board_init(void) {
   #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
+  #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   #endif
 
   all_rcc_clk_enable();
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index 84612d416..95bcc7882 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -68,10 +68,13 @@ void USBWakeUp_RMP_IRQHandler(void) {
 void board_init(void) {
   SystemClock_Config();
 
-  #if CFG_TUSB_OS == OPT_OS_NONE
+#if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
-  #endif
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+#endif
 
   // Remap the USB interrupts
   __HAL_RCC_SYSCFG_CLK_ENABLE();
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 6e02b0575..025f6a08c 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -102,7 +102,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 38dfaa3bc..ac22c606f 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -105,7 +105,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 67b0b3f1c..7b86aedb4 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -65,7 +65,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 49ef86db9..d8afa0f95 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -77,7 +77,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 26ba34ac3..983944b1c 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -88,7 +88,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
   #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 7b618b2e4..054d7855f 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -130,7 +130,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000u);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1UL;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 6192f7a40..784c92465 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -304,7 +304,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index b28903e00..6aeab1259 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -54,7 +54,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 114a6a483..e69ae8e3b 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -78,6 +78,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
 #if defined(USB_OTG_FS)
   NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 58be4867d..567bb7294 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -140,7 +140,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index bf2503865..50b513d8f 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -70,6 +70,14 @@ void board_init(void) {
 #endif
   __HAL_RCC_PWR_CLK_ENABLE();
 
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+#endif
+
   // LED
   GPIO_InitTypeDef  GPIO_InitStruct;
   GPIO_InitStruct.Pin = LED_PIN;
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 032c01f34..0af497366 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -90,6 +90,9 @@ void board_init(void) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
 #endif
 
   GPIO_InitTypeDef GPIO_InitStruct;
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index 93aba02fa..153d10a09 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -64,7 +64,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c
index 923ea197c..8dc6547ae 100644
--- a/hw/bsp/stm32wba/family.c
+++ b/hw/bsp/stm32wba/family.c
@@ -131,7 +131,7 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
   #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index 4e5491005..ee1fa2a3c 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -77,6 +77,8 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 1acce024b..6fef53025 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -78,7 +78,7 @@ void board_init(void) {
   SysTick_Config(SystemCoreClock / 1000);
 
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // Explicitly disable systick to prevent its ISR runs before scheduler start
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-- 
cgit v1.3.1


From a4d0df7fcf4ab39034b73c8641e669dcd277cb50 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 24 Nov 2025 00:17:58 +0100
Subject: bsp/stm32c0: use external clock, increase stack size

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 .../boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld  |  2 +-
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake  |  1 +
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.h      | 32 +++++++++------------
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk     |  2 +-
 .../boards/stm32c071nucleo/stm32c071xx_flash.icf   | 33 ++++++++++++++++++++++
 hw/bsp/stm32c0/family.cmake                        |  1 -
 hw/bsp/stm32c0/stm32c0xx_hal_conf.h                |  2 +-
 7 files changed, 50 insertions(+), 23 deletions(-)
 create mode 100644 hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf

(limited to 'hw')

diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld b/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
index 8acd49f9d..6c7e203f1 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/STM32C071RBTx_FLASH.ld
@@ -36,7 +36,7 @@
 ENTRY(Reset_Handler)
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0xc00; /* required amount of stack */
 
 /* Memories definition */
 MEMORY
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
index 2a319a73c..ed70cffbf 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.cmake
@@ -2,6 +2,7 @@ set(MCU_VARIANT stm32c071xx)
 set(JLINK_DEVICE stm32c071rb)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32C071RBTx_FLASH.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32c071xx_flash.icf)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
index 751df2251..460b42a21 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
@@ -64,36 +64,30 @@
 static inline void board_clock_init(void) {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
-  RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
 
-  /* -1- Enable HSIUSB48  Oscillator */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48;
-  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  __HAL_FLASH_SET_LATENCY(FLASH_LATENCY_1);
 
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
-  /* -2- Initializes the CPU, AHB and APB buses clocks */
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
                               |RCC_CLOCKTYPE_PCLK1;
-  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSIUSB48;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSE;
   RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
   RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV1;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV1;
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_1);
 
-
-  __HAL_RCC_CRS_CLK_ENABLE();
-
-  // Configures CRS
-  RCC_CRSInitStruct.Prescaler = RCC_CRS_SYNC_DIV1;
-  RCC_CRSInitStruct.Source = RCC_CRS_SYNC_SOURCE_USB;
-  RCC_CRSInitStruct.Polarity = RCC_CRS_SYNC_POLARITY_RISING;
-  RCC_CRSInitStruct.ReloadValue = __HAL_RCC_CRS_RELOADVALUE_CALCULATE(48000000,1000);
-  RCC_CRSInitStruct.ErrorLimitValue = 34;
-  RCC_CRSInitStruct.HSI48CalibrationValue = 32;
-
-  HAL_RCCEx_CRSConfig(&RCC_CRSInitStruct);
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSE;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
 }
-
 #endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
index 67a9b59a8..fd22fc8d4 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
@@ -7,7 +7,7 @@ LD_FILE_GCC = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
 
 # IAR
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32c071xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32c071xx_flash.icf
+LD_FILE_IAR = $(BOARD_PATH)/stm32c071xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32c071rb
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf b/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf
new file mode 100644
index 000000000..684f41dc6
--- /dev/null
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/stm32c071xx_flash.icf
@@ -0,0 +1,33 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20005FFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0xc00;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
+
+export symbol __ICFEDIT_region_RAM_start__;
+export symbol __ICFEDIT_region_RAM_end__;
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 90d5322b7..f68e80895 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -24,7 +24,6 @@ set(STARTUP_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s)
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 set(LD_FILE_Clang ${LD_FILE_GNU})
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32c0/stm32c0xx_hal_conf.h b/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
index 678b6ee0d..874251c7f 100644
--- a/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
+++ b/hw/bsp/stm32c0/stm32c0xx_hal_conf.h
@@ -92,7 +92,7 @@ extern "C" {
   *        (when HSE is used as system clock source, directly or through the PLL).
   */
 #if !defined  (HSE_VALUE)
-#define HSE_VALUE    (8000000U)         /*!< Value of the External oscillator in Hz */
+#define HSE_VALUE    (48000000U)         /*!< Value of the External oscillator in Hz */
 #endif /* HSE_VALUE */
 
 #if !defined  (HSE_STARTUP_TIMEOUT)
-- 
cgit v1.3.1


From fb631c9a402478702fcce7168a5f1cc3b231e959 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 24 Nov 2025 00:26:05 +0100
Subject: hcd: add fsdev driver

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/device_info/only.txt            |   1 +
 examples/host/msc_file_explorer/only.txt      |   1 +
 hw/bsp/stm32c0/family.c                       |   4 +-
 hw/bsp/stm32c0/family.cmake                   |   1 +
 hw/bsp/stm32c0/family.mk                      |   1 +
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c |  20 +-
 src/portable/st/stm32_fsdev/fsdev_at32.h      |  16 +-
 src/portable/st/stm32_fsdev/fsdev_ch32.h      |   9 +-
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  15 +-
 src/portable/st/stm32_fsdev/fsdev_type.h      |  41 +-
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c | 833 ++++++++++++++++++++++++++
 11 files changed, 917 insertions(+), 25 deletions(-)
 create mode 100644 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c

(limited to 'hw')

diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 61a08f68d..069f92d83 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -13,6 +13,7 @@ mcu:MSP432E4
 mcu:RP2040
 mcu:RX65X
 mcu:RAXXX
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index cba58f8e8..a7bebf1d9 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -13,6 +13,7 @@ mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
 mcu:MAX3421
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index 09704b527..b04a9cea5 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -37,13 +37,13 @@
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
 void USB_DRD_FS_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
 
 // Startup code generated by STM32CubeIDE uses USB_IRQHandler, while
 // stm32c071xx.s from cmsis_device_c0 uses USB_DRD_FS_IRQHandler.
 void USB_IRQHandler(void) {
-  USB_DRD_FS_IRQHandler();
+  tusb_int_handler(0, true);
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index f68e80895..6e04b20f4 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -66,6 +66,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
diff --git a/hw/bsp/stm32c0/family.mk b/hw/bsp/stm32c0/family.mk
index bdb34454e..fd03ad537 100644
--- a/hw/bsp/stm32c0/family.mk
+++ b/hw/bsp/stm32c0/family.mk
@@ -29,6 +29,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 381aa0b40..db1a5784a 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -123,8 +123,6 @@
   #error "Unknown USB IP"
 #endif
 
-#include "fsdev_type.h"
-
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -848,6 +846,24 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   ep_write(ep_idx, ep_reg, true);
 }
 
+void dcd_int_enable(uint8_t rhport) {
+  fsdev_int_enable(rhport);
+}
+
+void dcd_int_disable(uint8_t rhport) {
+  fsdev_int_disable(rhport);
+}
+
+#if defined(USB_BCDR_DPPU) || defined(SYSCFG_PMC_USB_PU)
+void dcd_connect(uint8_t rhport) {
+  fsdev_connect(rhport);
+}
+
+void dcd_disconnect(uint8_t rhport) {
+  fsdev_disconnect(rhport);
+}
+#endif
+
 //--------------------------------------------------------------------+
 // PMA read/write
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/fsdev_at32.h b/src/portable/st/stm32_fsdev/fsdev_at32.h
index deb1de2a8..03490ee24 100644
--- a/src/portable/st/stm32_fsdev/fsdev_at32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_at32.h
@@ -168,7 +168,7 @@ enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
   #error "Unsupported MCU"
 #endif
 
-void dcd_int_enable(uint8_t rhport) {
+void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
   #if (CFG_TUSB_MCU == OPT_MCU_AT32F403A_407) || (CFG_TUSB_MCU == OPT_MCU_AT32F413)
   // AT32F403A/407 devices allow to remap the USB interrupt vectors from
@@ -187,7 +187,7 @@ void dcd_int_enable(uint8_t rhport) {
   }
 }
 
-void dcd_int_disable(uint8_t rhport) {
+void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
   #if (CFG_TUSB_MCU == OPT_MCU_AT32F403A_407) || (CFG_TUSB_MCU == OPT_MCU_AT32F413)
   // AT32F403A/407 devices allow to remap the USB interrupt vectors from
@@ -206,20 +206,20 @@ void dcd_int_disable(uint8_t rhport) {
   }
 }
 
-void dcd_disconnect(uint8_t rhport) {
+void fsdev_disconnect(uint8_t rhport) {
   (void) rhport;
   /* disable usb phy */
-  FSDEV_REG->CNTR |= USB_CNTR_PDWN;
+  *(volatile uint32_t*)(FSDEV_REG_BASE + 0x40) |= USB_CNTR_PDWN;
   /* D+ 1.5k pull-up disable, USB->cfg_bit.puo = TRUE; */
-  *(uint32_t *)(FSDEV_REG_BASE+0x60) |= (1u<<1);
+  *(volatile uint32_t *)(FSDEV_REG_BASE+0x60) |= (1u<<1);
 }
 
-void dcd_connect(uint8_t rhport) {
+void fsdev_connect(uint8_t rhport) {
   (void) rhport;
   /* enable usb phy */
-  FSDEV_REG->CNTR &= ~USB_CNTR_PDWN;
+  *(volatile uint32_t*)(FSDEV_REG_BASE + 0x40) &= ~USB_CNTR_PDWN;
   /* Dp 1.5k pull-up enable, USB->cfg_bit.puo = 0; */
-  *(uint32_t *)(FSDEV_REG_BASE+0x60) &= ~(1u<<1);
+  *(volatile uint32_t *)(FSDEV_REG_BASE+0x60) &= ~(1u<<1);
 }
 
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index ceebb6dab..547f3bd1b 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -168,6 +168,7 @@
 #define USB_EPRX_DTOG2                       ((uint16_t)0x2000U)               /*!< EndPoint RX Data TOGgle bit1 */
 #define USB_EPRX_DTOGMASK  (USB_EPRX_STAT|USB_EPREG_MASK)
 
+#include "fsdev_type.h"
 
 //--------------------------------------------------------------------+
 //
@@ -184,26 +185,26 @@ enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
   #error "Unsupported MCU"
 #endif
 
-void dcd_int_enable(uint8_t rhport) {
+void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
   for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
     NVIC_EnableIRQ(fsdev_irq[i]);
   }
 }
 
-void dcd_int_disable(uint8_t rhport) {
+void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
   for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
     NVIC_DisableIRQ(fsdev_irq[i]);
   }
 }
 
-void dcd_disconnect(uint8_t rhport) {
+void fsdev_disconnect(uint8_t rhport) {
   (void) rhport;
   EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
 }
 
-void dcd_connect(uint8_t rhport) {
+void fsdev_connect(uint8_t rhport) {
   (void) rhport;
   EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 30ffadc35..d47d23f14 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -321,6 +321,8 @@
   #define FSDEV_USE_SBUF_ISO 0
 #endif
 
+#include "fsdev_type.h"
+
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -372,7 +374,7 @@ static const IRQn_Type fsdev_irq[] = {
 };
 enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
 
-void dcd_int_enable(uint8_t rhport) {
+void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
 
   // forces write to RAM before allowing ISR to execute
@@ -395,7 +397,7 @@ void dcd_int_enable(uint8_t rhport) {
   }
 }
 
-void dcd_int_disable(uint8_t rhport) {
+void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
 
   #if CFG_TUSB_MCU == OPT_MCU_STM32F3 && defined(SYSCFG_CFGR1_USB_IT_RMP)
@@ -420,28 +422,27 @@ void dcd_int_disable(uint8_t rhport) {
 // Define only on MCU with internal pull-up. BSP can define on MCU without internal PU.
 #if defined(USB_BCDR_DPPU)
 
-void dcd_disconnect(uint8_t rhport) {
+void fsdev_disconnect(uint8_t rhport) {
   (void)rhport;
   USB->BCDR &= ~(USB_BCDR_DPPU);
 }
 
-void dcd_connect(uint8_t rhport) {
+void fsdev_connect(uint8_t rhport) {
   (void)rhport;
   USB->BCDR |= USB_BCDR_DPPU;
 }
 
 #elif defined(SYSCFG_PMC_USB_PU) // works e.g. on STM32L151
 
-void dcd_disconnect(uint8_t rhport) {
+void fsdev_disconnect(uint8_t rhport) {
   (void)rhport;
   SYSCFG->PMC &= ~(SYSCFG_PMC_USB_PU);
 }
 
-void dcd_connect(uint8_t rhport) {
+void fsdev_connect(uint8_t rhport) {
   (void)rhport;
   SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
 }
 #endif
 
-
 #endif /* TUSB_FSDEV_STM32_H */
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
index cf36576bb..2b340d64a 100644
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ b/src/portable/st/stm32_fsdev/fsdev_type.h
@@ -174,6 +174,14 @@ typedef enum {
 #define EP_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
 #define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
 
+#define CH_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
+#define CH_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
+
+void fsdev_int_enable(uint8_t rhport);
+void fsdev_int_disable(uint8_t rhport);
+void fsdev_connect(uint8_t rhport);
+void fsdev_disconnect(uint8_t rhport);
+
 //--------------------------------------------------------------------+
 // Endpoint Helper
 // - CTR is write 0 to clear
@@ -186,13 +194,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
 
 TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) {
   if (need_exclusive) {
-    dcd_int_disable(0);
+    fsdev_int_disable(0);
   }
 
   FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
 
   if (need_exclusive) {
-    dcd_int_enable(0);
+    fsdev_int_enable(0);
   }
 }
 
@@ -216,6 +224,35 @@ TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
   return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
 }
 
+//--------------------------------------------------------------------+
+// Channel Helper
+// - Direction is opposite to endpoint direction
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ch_read(uint32_t ch_id) {
+  return ep_read(ch_id);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_write(uint32_t ch_id, uint32_t value, bool need_exclusive) {
+  ep_write(ch_id, value, need_exclusive);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_write_clear_ctr(uint32_t ch_id, tusb_dir_t dir) {
+  uint32_t reg = FSDEV_REG->ep[ch_id].reg;
+  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
+  reg &= USB_EPREG_MASK;
+  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+  ep_write(ch_id, reg, false);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
+  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
+  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+}
+
 //--------------------------------------------------------------------+
 // BTable Helper
 //--------------------------------------------------------------------+
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
new file mode 100644
index 000000000..1c08f64d6
--- /dev/null
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -0,0 +1,833 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2025 HiFiPhile (Zixun LI)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/**********************************************
+ * This driver provides USB Host controller support for STM32 MCUs with "USB A"/"PCD"/"HCD" peripheral.
+ * This covers these MCU families:
+ *
+ * C0                             2048 byte buffer; 32-bit bus; host mode
+ * G0                             2048 byte buffer; 32-bit bus; host mode
+ * H5                             2048 byte buffer; 32-bit bus; host mode
+ * U535, U545                     2048 byte buffer; 32-bit bus; host mode
+ *
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_FSDEV) && \
+    TU_CHECK_MCU(OPT_MCU_STM32C0, OPT_MCU_STM32G0, OPT_MCU_STM32H5, OPT_MCU_STM32U5)
+
+#include "host/hcd.h"
+#include "host/usbh.h"
+
+#if defined(TUP_USBIP_FSDEV_STM32)
+  #include "fsdev_stm32.h"
+#else
+  #error "Unknown USB IP"
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+
+// Debug level for FSDEV
+#define FSDEV_DEBUG 1
+
+// Max number of endpoints application can open, can be larger than FSDEV_EP_COUNT
+#ifndef CFG_TUH_FSDEV_ENDPOINT_MAX
+  #define CFG_TUH_FSDEV_ENDPOINT_MAX 16u
+#endif
+
+TU_VERIFY_STATIC(CFG_TUH_FSDEV_ENDPOINT_MAX <= 255, "currently only use 8-bit for index");
+
+enum {
+  HCD_XFER_ERROR_MAX = 3
+};
+
+// Host driver struct for each opened endpoint
+typedef struct {
+  uint8_t *buffer;
+  uint16_t buflen;
+  uint16_t max_packet_size;
+  uint8_t dev_addr;
+  uint8_t ep_addr;
+  uint8_t ep_type;
+  uint8_t interval;
+  bool low_speed;
+  bool allocated;
+  bool next_setup;
+} hcd_endpoint_t;
+
+// Additional info for each channel when it is active
+typedef struct {
+  hcd_endpoint_t* edpt[2]; // OUT/IN
+  uint16_t queued_len[2];
+  uint8_t dev_addr;
+  uint8_t ep_num;
+  uint8_t ep_type;
+  bool allocated[2];
+  uint8_t retry[2];
+  uint8_t result;
+} hcd_xfer_t;
+
+// Root hub port state
+static struct {
+  bool connected;
+} _hcd_port;
+
+typedef struct {
+  hcd_xfer_t xfer[FSDEV_EP_COUNT];
+  hcd_endpoint_t edpt[CFG_TUH_FSDEV_ENDPOINT_MAX];
+} hcd_data_t;
+
+hcd_data_t _hcd_data;
+
+//--------------------------------------------------------------------+
+// Prototypes
+//--------------------------------------------------------------------+
+
+static uint8_t endpoint_alloc(void);
+static uint8_t endpoint_find(uint8_t dev_addr, uint8_t ep_addr);
+static uint32_t hcd_pma_alloc(uint8_t channel, tusb_dir_t dir, uint16_t len);
+static uint8_t channel_alloc(uint8_t dev_addr, uint8_t ep_addr, uint8_t ep_type);
+static bool hcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
+static bool hcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
+static bool edpt_xfer_kickoff(uint8_t ep_id);
+static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir);
+static void edpoint_close(uint8_t ep_id);
+static void port_status_handler(uint8_t rhport, bool in_isr);
+//--------------------------------------------------------------------+
+// Inline Functions
+//--------------------------------------------------------------------+
+
+static inline void endpoint_dealloc(hcd_endpoint_t* edpt) {
+  edpt->allocated = false;
+}
+
+static inline void channel_dealloc(hcd_xfer_t* xfer, tusb_dir_t dir) {
+  xfer->allocated[dir] = false;
+}
+
+//--------------------------------------------------------------------+
+// Controller API
+//--------------------------------------------------------------------+
+
+// Optional HCD configuration, called by tuh_configure()
+bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
+  (void) rhport;
+  (void) cfg_id;
+  (void) cfg_param;
+  return false;
+}
+
+// Initialize controller to host mode
+bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
+  (void) rh_init;
+
+  // Follow the RM mentions to use a special ordering of PDWN and FRES
+  for (volatile uint32_t i = 0; i < 200; i++) {
+    asm("NOP");
+  }
+
+  // Perform USB peripheral reset
+  FSDEV_REG->CNTR = USB_CNTR_FRES | USB_CNTR_PDWN;
+  for (volatile uint32_t i = 0; i < 200; i++) {
+    asm("NOP");
+  }
+
+  FSDEV_REG->CNTR &= ~USB_CNTR_PDWN;
+
+  // Wait startup time
+  for (volatile uint32_t i = 0; i < 200; i++) {
+    asm("NOP");
+  }
+
+  FSDEV_REG->CNTR = USB_CNTR_HOST; // Enable USB in Host mode
+
+#if !defined(FSDEV_BUS_32BIT)
+  // BTABLE register does not exist on 32-bit bus devices
+  FSDEV_REG->BTABLE = FSDEV_BTABLE_BASE;
+#endif
+
+  FSDEV_REG->ISTR = 0; // Clear pending interrupts
+
+  // Reset channels to disabled
+  for (uint32_t i = 0; i < FSDEV_EP_COUNT; i++) {
+    ch_write(i, 0u, false);
+  }
+
+  tu_memclr(&_hcd_data, sizeof(_hcd_data));
+
+  // Enable interrupts for host mode
+  FSDEV_REG->CNTR |= USB_CNTR_RESETM | USB_CNTR_CTRM | USB_CNTR_SUSPM |
+                     USB_CNTR_WKUPM | USB_CNTR_ERRM | USB_CNTR_PMAOVRM;
+
+  // Initialize port state
+  _hcd_port.connected = false;
+
+  fsdev_connect(rhport);
+
+  return true;
+}
+
+static void port_status_handler(uint8_t rhport, bool in_isr) {
+  uint32_t const fnr_reg = FSDEV_REG->FNR;
+  uint32_t const istr_reg = FSDEV_REG->ISTR;
+  // SE0 detected USB Disconnected state
+  if ((fnr_reg & (USB_FNR_RXDP | USB_FNR_RXDM)) == 0U) {
+    _hcd_port.connected = false;
+    hcd_event_device_remove(rhport, in_isr);
+    return;
+  }
+
+  if (!_hcd_port.connected) {
+    // J-state or K-state detected & LastState=Disconnected
+    if (((fnr_reg & USB_FNR_RXDP) != 0U) || ((istr_reg & USB_ISTR_LS_DCONN) != 0U)) {
+      _hcd_port.connected = true;
+      hcd_event_device_attach(rhport, in_isr);
+    }
+  } else {
+    // J-state or K-state detected & lastState=Connected: a Missed disconnection is detected
+    if (((fnr_reg & USB_FNR_RXDP) != 0U) || ((istr_reg & USB_ISTR_LS_DCONN) != 0U)) {
+      _hcd_port.connected = false;
+      hcd_event_device_remove(rhport, in_isr);
+    }
+  }
+}
+
+// Handle CTR interrupt for the TX/OUT direction
+static void handle_ctr_tx(uint32_t ch_id) {
+  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+
+  uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
+  uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
+
+  uint8_t ep_id = endpoint_find(daddr, ep_num);
+  TU_VERIFY(ep_id != TUSB_INDEX_INVALID_8, );
+
+  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  TU_VERIFY(xfer->allocated[TUSB_DIR_OUT],);
+
+  // Manage Correct Transaction
+  if ((ch_reg & USB_CH_ERRTX) == 0U) {
+    // Acked
+    if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_ACK_SBUF) {
+      if (edpt->buflen != xfer->queued_len[TUSB_DIR_OUT]) {
+        uint16_t const len = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_OUT], edpt->max_packet_size);
+        uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_TX);
+        hcd_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
+        btable_set_count(ch_id, BTABLE_BUF_TX, len);
+        xfer->queued_len[TUSB_DIR_OUT] += len;
+
+        ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // only change TX Status, reserve other toggle bits
+        ch_write(ch_id, ch_reg, false);
+      } else {
+        channel_dealloc(xfer, TUSB_DIR_OUT);
+        hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_SUCCESS, true);
+      }
+    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_NAK) {
+      // NAKed
+      if (edpt->ep_type != TUSB_XFER_INTERRUPT) {
+        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
+        ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+        ch_write(ch_id, ch_reg, false);
+      }
+    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_STALL) {
+      // STALLed
+      channel_dealloc(xfer, TUSB_DIR_OUT);
+      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
+      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
+      ch_write(ch_id,  ch_reg, false);
+      hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_STALLED, true);
+    }
+  } else {
+    // Error
+    TU_LOG(FSDEV_DEBUG, "handle_ctr_tx error epreg=0x%08X ch=%u ep=0x%02X daddr=%u queued=%u/%u\r\n",
+             ch_reg, ch_id, ep_num, daddr, xfer->queued_len[TUSB_DIR_OUT], edpt->buflen);
+    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
+    ch_reg &=~USB_CH_ERRTX;
+    if (xfer->retry[TUSB_DIR_OUT] < HCD_XFER_ERROR_MAX) {
+      // Retry
+      xfer->retry[TUSB_DIR_OUT]++;
+    } else {
+      // Failed after retries
+      channel_dealloc(xfer, TUSB_DIR_OUT);
+      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
+      hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_FAILED, true);
+    }
+    ch_write(ch_id, ch_reg, false);
+  }
+}
+
+// Handle CTR interrupt for the RX/IN direction
+static void handle_ctr_rx(uint32_t ch_id) {
+  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+  uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
+
+  uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
+
+  uint8_t ep_id = endpoint_find(daddr, ep_num | TUSB_DIR_IN_MASK);
+  TU_VERIFY(ep_id != TUSB_INDEX_INVALID_8, );
+
+  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+    hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  TU_VERIFY(xfer->allocated[TUSB_DIR_IN],);
+
+  // Manage Correct Transaction
+  if ((ch_reg & USB_CH_ERRRX) == 0U) {
+    // Acked
+    if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_ACK_SBUF) {
+      uint16_t const rx_count = btable_get_count(ch_id, BTABLE_BUF_RX);
+      uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_RX);
+
+      hcd_read_packet_memory(edpt->buffer + xfer->queued_len[TUSB_DIR_IN], pma_addr, rx_count);
+      xfer->queued_len[TUSB_DIR_IN] += rx_count;
+
+      if ((rx_count < edpt->max_packet_size) || (xfer->queued_len[TUSB_DIR_IN] >= edpt->buflen)) {
+        // all bytes received or short packet
+        channel_dealloc(xfer, TUSB_DIR_IN);
+        hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_SUCCESS, true);
+      } else {
+        // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
+        uint16_t const cnt = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_IN], edpt->max_packet_size);
+        btable_set_rx_bufsize(ch_id, BTABLE_BUF_RX, cnt);
+        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
+        ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
+        ch_write(ch_id, ch_reg, false);
+      }
+    } else if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_NAK) {
+      // NAKed
+      if (edpt->ep_type != TUSB_XFER_INTERRUPT) {
+        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
+        ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
+        ch_write(ch_id, ch_reg, false);
+      }
+    } else {
+      // STALLed
+      channel_dealloc(xfer, TUSB_DIR_IN);
+      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
+      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+      ch_write(ch_id, ch_reg, false);
+      hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_STALLED, true);
+    }
+  } else {
+    // Error
+    TU_LOG(FSDEV_DEBUG, "handle_ctr_tx error epreg=0x%08X ch=%u ep=0x%02X daddr=%u queued=%u/%u\r\n",
+             ch_reg, ch_id, ep_num, daddr, xfer->queued_len[TUSB_DIR_IN], edpt->buflen);
+    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
+    ch_reg &=~USB_CH_ERRRX;
+    if (xfer->retry[TUSB_DIR_IN] < HCD_XFER_ERROR_MAX) {
+      // Retry
+      xfer->retry[TUSB_DIR_IN]++;
+    } else {
+      // Failed after retries
+      channel_dealloc(xfer, TUSB_DIR_IN);
+      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+      hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_FAILED, true);
+    }
+    ch_write(ch_id, ch_reg, false);
+  }
+}
+
+// Interrupt Handler
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
+  uint32_t int_status = FSDEV_REG->ISTR;
+
+  /* Port Change Detected (Connection/Disconnection) */
+  if (int_status & USB_ISTR_DCON) {
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_DCON;
+    port_status_handler(rhport, in_isr);
+  }
+
+  // Handle transfer complete (CTR)
+  while (FSDEV_REG->ISTR & USB_ISTR_CTR) {
+    uint32_t const ch_id = FSDEV_REG->ISTR & USB_ISTR_EP_ID;
+    uint32_t const ch_reg = ch_read(ch_id);
+
+    if (ch_reg & USB_EP_CTR_RX) {
+      #ifdef FSDEV_BUS_32BIT
+      /* https://www.st.com/resource/en/errata_sheet/es0561-stm32h503cbebkbrb-device-errata-stmicroelectronics.pdf
+       * https://www.st.com/resource/en/errata_sheet/es0587-stm32u535xx-and-stm32u545xx-device-errata-stmicroelectronics.pdf
+       * From H503/U535 errata: Buffer description table update completes after CTR interrupt triggers
+       * Description:
+       * - During OUT transfers, the correct transfer interrupt (CTR) is triggered a little before the last USB SRAM accesses
+       * have completed. If the software responds quickly to the interrupt, the full buffer contents may not be correct.
+       * Workaround:
+       * - Software should ensure that a small delay is included before accessing the SRAM contents. This delay
+       * should be 800 ns in Full Speed mode and 6.4 μs in Low Speed mode
+       * - Since H5 can run up to 250Mhz -> 1 cycle = 4ns. Per errata, we need to wait 200 cycles. Though executing code
+       * also takes time, so we'll wait 60 cycles (count = 20).
+       * - Since Low Speed mode is not supported/popular, we will ignore it for now.
+       *
+       * Note: this errata may also apply to G0, U5, H5 etc.
+       */
+      volatile uint32_t cycle_count = 20; // defined as PCD_RX_PMA_CNT in stm32 hal_driver
+      while (cycle_count > 0U) {
+        cycle_count--; // each count take 3 cycles (1 for sub, jump, and compare)
+      }
+      #endif
+
+      ch_write_clear_ctr(ch_id, TUSB_DIR_IN);
+      handle_ctr_rx(ch_id);
+    }
+
+    if (ch_reg & USB_EP_CTR_TX) {
+      ch_write_clear_ctr(ch_id, TUSB_DIR_OUT);
+      handle_ctr_tx(ch_id);
+    }
+  }
+
+  if (int_status & USB_ISTR_ERR) {
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_ERR;
+    // TODO: Handle error
+  }
+
+  if (int_status & USB_ISTR_PMAOVR) {
+    TU_BREAKPOINT();
+    FSDEV_REG->ISTR = (fsdev_bus_t)~USB_ISTR_PMAOVR;
+  }
+}
+
+// Enable USB interrupt
+void hcd_int_enable(uint8_t rhport) {
+  fsdev_int_enable(rhport);
+}
+
+// Disable USB interrupt
+void hcd_int_disable(uint8_t rhport) {
+  fsdev_int_disable(rhport);
+}
+
+// Get frame number (1ms)
+uint32_t hcd_frame_number(uint8_t rhport) {
+  (void) rhport;
+  return FSDEV_REG->FNR & USB_FNR_FN;
+}
+
+//--------------------------------------------------------------------+
+// Port API
+//--------------------------------------------------------------------+
+
+// Get the current connect status of roothub port
+bool hcd_port_connect_status(uint8_t rhport) {
+  (void) rhport;
+  return _hcd_port.connected;
+}
+
+// Reset USB bus on the port
+void hcd_port_reset(uint8_t rhport) {
+  (void) rhport;
+  FSDEV_REG->CNTR |= USB_CNTR_FRES;
+}
+
+// Complete bus reset sequence
+void hcd_port_reset_end(uint8_t rhport) {
+  (void) rhport;
+  FSDEV_REG->CNTR &= ~USB_CNTR_FRES;
+}
+
+// Get port link speed
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
+  (void) rhport;
+  if ((FSDEV_REG->ISTR & USB_ISTR_LS_DCONN) != 0U) {
+    return TUSB_SPEED_LOW;
+  } else {
+    return TUSB_SPEED_FULL;
+  }
+}
+
+// HCD closes all opened endpoints belonging to this device
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
+  (void) rhport;
+
+  // Close all endpoints for this device
+  for(uint32_t i = 0; i < CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
+    hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
+    if (edpt->allocated && edpt->dev_addr == dev_addr) {
+      edpoint_close(i);
+    }
+  }
+
+}
+
+//--------------------------------------------------------------------+
+// Endpoints API
+//--------------------------------------------------------------------+
+
+// Open an endpoint
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const *ep_desc) {
+  (void) rhport;
+
+  uint8_t const ep_addr = ep_desc->bEndpointAddress;
+  uint16_t const packet_size = tu_edpt_packet_size(ep_desc);
+  uint8_t const ep_type = ep_desc->bmAttributes.xfer;
+
+  uint8_t const ep_id = endpoint_alloc();
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+  edpt->dev_addr = dev_addr;
+  edpt->ep_addr = ep_addr;
+  edpt->ep_type = ep_type;
+  edpt->max_packet_size = packet_size;
+  edpt->interval = ep_desc->bInterval;
+  edpt->low_speed = (hcd_port_speed_get(rhport) == TUSB_SPEED_FULL && tuh_speed_get(dev_addr) == TUSB_SPEED_LOW);
+
+  // EP0 is bi-directional, so we need to open both OUT and IN channels
+  if (ep_addr == 0) {
+    uint8_t const ep_id_in = endpoint_alloc();
+    TU_ASSERT(ep_id_in < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+    _hcd_data.edpt[ep_id_in] = *edpt; // copy from OUT endpoint
+    _hcd_data.edpt[ep_id_in].ep_addr = 0 | TUSB_DIR_IN_MASK;
+  }
+
+  return true;
+}
+
+bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+
+  uint8_t const ep_id = endpoint_find(dev_addr, ep_addr);
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+  edpoint_close(ep_id);
+
+  if (ep_addr == 0) {
+    uint8_t const ep_id_in = endpoint_find(dev_addr, 0 | TUSB_DIR_IN_MASK);
+    TU_ASSERT(ep_id_in < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+    edpoint_close(ep_id_in);
+  }
+
+  return false;
+}
+
+// Submit a transfer
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *buffer, uint16_t buflen) {
+  (void) rhport;
+
+  TU_LOG(FSDEV_DEBUG, "hcd_edpt_xfer addr=%u ep=0x%02X len=%u\r\n", dev_addr, ep_addr, buflen);
+
+  uint8_t const ep_id = endpoint_find(dev_addr, ep_addr);
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+  hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+
+  edpt->buffer = buffer;
+  edpt->buflen = buflen;
+
+  return edpt_xfer_kickoff(ep_id);
+}
+
+// Abort a queued transfer
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+
+  uint8_t const ep_id = endpoint_find(dev_addr, ep_addr);
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
+
+  for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
+    hcd_xfer_t* xfer = &_hcd_data.xfer[i];
+
+    if (xfer->allocated[dir] &&
+        xfer->dev_addr == dev_addr &&
+        xfer->ep_num == tu_edpt_number(ep_addr)) {
+
+      channel_dealloc(xfer, dir);
+
+      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
+      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(dir); // will change Status, reserved other toggle bits
+      ch_change_status(&ch_reg, dir, EP_STAT_DISABLED);
+      ch_write(i, ch_reg, true);
+
+    }
+  }
+
+  return true;
+}
+
+// Submit a special transfer to send 8-byte Setup Packet
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
+  (void) rhport;
+
+  uint8_t const ep_id = endpoint_find(dev_addr, 0);
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+  hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+  edpt->next_setup = true;
+
+  return hcd_edpt_xfer(rhport, dev_addr, 0, (uint8_t*)(uintptr_t) setup_packet, 8);
+}
+
+// Clear stall, data toggle is also reset to DATA0
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void) rhport;
+  (void) dev_addr;
+  (void) ep_addr;
+
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// Helper Functions
+//--------------------------------------------------------------------+
+
+static uint8_t endpoint_alloc(void) {
+  for (uint32_t i = 0; i < CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
+    hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
+    if (!edpt->allocated) {
+      edpt->allocated = true;
+      return i;
+    }
+  }
+  return TUSB_INDEX_INVALID_8;
+}
+
+static uint8_t endpoint_find(uint8_t dev_addr, uint8_t ep_addr) {
+  for (uint32_t i = 0; i < (uint32_t)CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
+    hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
+    if (edpt->allocated && edpt->dev_addr == dev_addr && edpt->ep_addr == ep_addr) {
+      return i;
+    }
+  }
+  return TUSB_INDEX_INVALID_8;
+}
+
+// close an opened endpoint
+static void edpoint_close(uint8_t ep_id) {
+  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+  endpoint_dealloc(edpt);
+
+  // disable active channel belong to this endpoint
+  for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
+    hcd_xfer_t* xfer = &_hcd_data.xfer[i];
+
+    if (xfer->allocated[TUSB_DIR_OUT] && xfer->edpt[TUSB_DIR_OUT] == edpt) {
+      channel_dealloc(xfer, TUSB_DIR_OUT);
+
+      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
+      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change RX Status, reserved other toggle bits
+      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
+      ch_write(i, ch_reg, true);
+
+    }
+    if (xfer->allocated[TUSB_DIR_IN] && xfer->edpt[TUSB_DIR_IN] == edpt) {
+      channel_dealloc(xfer, TUSB_DIR_IN);
+
+      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
+      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
+      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
+      ch_write(i, ch_reg, true);
+
+    }
+  }
+}
+
+// Allocate PMA buffer
+static uint32_t hcd_pma_alloc(uint8_t channel, tusb_dir_t dir, uint16_t len) {
+  (void) len;
+  // Simple static allocation as we are unlikely to handle ISO endpoints in host mode
+  // We just give each channel a buffer of max packet size (64 bytes)
+
+  uint16_t addr = FSDEV_BTABLE_BASE + 8 * FSDEV_EP_COUNT;
+  addr += channel * 64 * 2 + (dir == TUSB_DIR_IN ? 64 : 0);
+
+  TU_ASSERT(addr <= FSDEV_PMA_SIZE, 0xFFFF);
+
+  return addr;
+}
+
+// Allocate hardware channel
+static uint8_t channel_alloc(uint8_t dev_addr, uint8_t ep_addr, uint8_t ep_type) {
+  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  tusb_dir_t const dir = tu_edpt_dir(ep_addr);
+
+  // Find channel allocate for same ep_num but other direction
+  tusb_dir_t const other_dir = (dir == TUSB_DIR_IN) ? TUSB_DIR_OUT : TUSB_DIR_IN;
+  for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
+    if (!_hcd_data.xfer[i].allocated[dir] &&
+        _hcd_data.xfer[i].allocated[other_dir] &&
+        _hcd_data.xfer[i].dev_addr == dev_addr &&
+        _hcd_data.xfer[i].ep_num == ep_num &&
+        _hcd_data.xfer[i].ep_type == ep_type) {
+        _hcd_data.xfer[i].allocated[dir] = true;
+        _hcd_data.xfer[i].queued_len[dir] = 0;
+        _hcd_data.xfer[i].retry[dir] = 0;
+      return i;
+    }
+  }
+
+  // Find free channel
+  for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
+    if (!_hcd_data.xfer[i].allocated[0] && !_hcd_data.xfer[i].allocated[1]) {
+      _hcd_data.xfer[i].dev_addr = dev_addr;
+      _hcd_data.xfer[i].ep_num = ep_num;
+      _hcd_data.xfer[i].ep_type = ep_type;
+      _hcd_data.xfer[i].allocated[dir] = true;
+      _hcd_data.xfer[i].queued_len[dir] = 0;
+      _hcd_data.xfer[i].retry[dir] = 0;
+      return i;
+    }
+  }
+
+  // Allocation failed
+  return TUSB_INDEX_INVALID_8;
+}
+
+// kick-off transfer with an endpoint
+static bool edpt_xfer_kickoff(uint8_t ep_id) {
+  hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
+  uint8_t ch_id = channel_alloc(edpt->dev_addr, edpt->ep_addr, edpt->ep_type);
+  TU_ASSERT(ch_id != TUSB_INDEX_INVALID_8); // all channel are in used
+
+  tusb_dir_t const dir = tu_edpt_dir(edpt->ep_addr);
+
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  xfer->edpt[dir] = edpt;
+
+  return channel_xfer_start(ch_id, dir);
+}
+
+static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir) {
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  hcd_endpoint_t* edpt = xfer->edpt[dir];
+
+  uint32_t ch_reg = ch_read(ch_id) & ~USB_EPREG_MASK;
+  ch_reg |= tu_edpt_number(edpt->ep_addr) | edpt->dev_addr << USB_CHEP_DEVADDR_Pos |
+          USB_EP_CTR_TX | USB_EP_CTR_RX;
+
+  // Set type
+  switch (edpt->ep_type) {
+    case TUSB_XFER_BULK:
+      ch_reg |= USB_EP_BULK;
+      break;
+    case TUSB_XFER_INTERRUPT:
+      ch_reg |= USB_EP_INTERRUPT;
+      break;
+
+    case TUSB_XFER_CONTROL:
+      ch_reg |= USB_EP_CONTROL;
+      break;
+
+    default:
+      // Note: ISO endpoint is unsupported
+      TU_ASSERT(false);
+  }
+
+  /* Create a packet memory buffer area. */
+  uint16_t pma_addr = hcd_pma_alloc(ch_id, dir, edpt->max_packet_size);
+  btable_set_addr(ch_id, dir == TUSB_DIR_OUT ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
+
+  if (dir == TUSB_DIR_OUT) {
+    uint16_t const len = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_OUT], edpt->max_packet_size);
+
+    hcd_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
+    btable_set_count(ch_id, BTABLE_BUF_TX, len);
+
+    xfer->queued_len[TUSB_DIR_OUT] += len;
+    if (edpt->next_setup) {
+      // Setup packet uses IN token
+      edpt->next_setup = false;
+      ch_reg |= USB_EP_SETUP;
+    }
+
+    ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
+    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // only change TX Status, reserve other toggle bits
+
+  } else {
+    btable_set_rx_bufsize(ch_id, BTABLE_BUF_RX, edpt->max_packet_size);
+    ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
+    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
+  }
+
+  ch_write(ch_id, ch_reg, true);
+
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// PMA read/write
+//--------------------------------------------------------------------+
+
+// Write to packet memory area (PMA) from user memory
+static bool hcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
+  if (nbytes == 0) return true;
+  uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
+
+  fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(dst);
+  const uint8_t *src8 = src;
+
+  while (n_write--) {
+    pma_buf->value = fsdevbus_unaligned_read(src8);
+    src8 += FSDEV_BUS_SIZE;
+    pma_buf++;
+  }
+
+  // Handle odd bytes
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
+  if (odd) {
+    fsdev_bus_t temp = 0;
+    for (uint16_t i = 0; i < odd; i++) {
+      temp |= *src8++ << (i * 8);
+    }
+    pma_buf->value = temp;
+  }
+
+  return true;
+}
+
+// Read from packet memory area (PMA) to user memory
+static bool hcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
+  if (nbytes == 0) return true;
+  uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
+
+  fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(src);
+  uint8_t *dst8 = (uint8_t *)dst;
+
+  while (n_read--) {
+    fsdevbus_unaligned_write(dst8, (fsdev_bus_t) pma_buf->value);
+    dst8 += FSDEV_BUS_SIZE;
+    pma_buf++;
+  }
+
+  // Handle odd bytes
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
+  if (odd) {
+    fsdev_bus_t temp = pma_buf->value;
+    while (odd--) {
+      *dst8++ = (uint8_t)(temp & 0xfful);
+      temp >>= 8;
+    }
+  }
+
+  return true;
+}
+
+#endif
-- 
cgit v1.3.1


From 03bd8c26d6b72b5e53c0d4b9787a6396ee295927 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Mon, 24 Nov 2025 21:03:04 +0100
Subject: fsdev: reorganize functions

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/bare_api/only.txt               |   1 +
 examples/host/cdc_msc_hid/only.txt            |   1 +
 examples/host/cdc_msc_hid_freertos/only.txt   |   1 +
 hw/bsp/at32f403a_407/family.cmake             |   1 +
 hw/bsp/at32f403a_407/family.mk                |   1 +
 hw/bsp/at32f413/family.cmake                  |   1 +
 hw/bsp/at32f413/family.mk                     |   1 +
 hw/bsp/ch32v20x/family.cmake                  |   1 +
 hw/bsp/ch32v20x/family.mk                     |   1 +
 hw/bsp/stm32c0/family.cmake                   |   1 +
 hw/bsp/stm32c0/family.mk                      |   1 +
 hw/bsp/stm32f0/family.cmake                   |   1 +
 hw/bsp/stm32f0/family.mk                      |   1 +
 hw/bsp/stm32f1/family.cmake                   |   1 +
 hw/bsp/stm32f1/family.mk                      |   1 +
 hw/bsp/stm32f3/family.cmake                   |   1 +
 hw/bsp/stm32f3/family.mk                      |   1 +
 hw/bsp/stm32g0/family.cmake                   |   1 +
 hw/bsp/stm32g0/family.mk                      |   2 +
 hw/bsp/stm32g4/family.cmake                   |   1 +
 hw/bsp/stm32g4/family.mk                      |   1 +
 hw/bsp/stm32h5/family.cmake                   |   1 +
 hw/bsp/stm32h5/family.mk                      |   2 +
 hw/bsp/stm32l0/family.cmake                   |   1 +
 hw/bsp/stm32l0/family.mk                      |   1 +
 hw/bsp/stm32l4/family.cmake                   |   1 +
 hw/bsp/stm32l4/family.mk                      |   1 +
 hw/bsp/stm32u0/family.cmake                   |   1 +
 hw/bsp/stm32u0/family.mk                      |   1 +
 hw/bsp/stm32u5/family.cmake                   |   2 +
 hw/bsp/stm32u5/family.mk                      |   6 +-
 hw/bsp/stm32wb/family.cmake                   |   1 +
 hw/bsp/stm32wb/family.mk                      |   1 +
 lib/rt-thread/SConscript                      |   3 +-
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 190 +-----------
 src/portable/st/stm32_fsdev/fsdev_at32.h      |  10 +-
 src/portable/st/stm32_fsdev/fsdev_ch32.h      |  10 +-
 src/portable/st/stm32_fsdev/fsdev_common.c    | 241 +++++++++++++++
 src/portable/st/stm32_fsdev/fsdev_common.h    | 343 +++++++++++++++++++++
 src/portable/st/stm32_fsdev/fsdev_stm32.h     |  14 +-
 src/portable/st/stm32_fsdev/fsdev_type.h      | 344 ---------------------
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c | 412 ++++++++++++--------------
 tools/iar_template.ipcf                       |   4 +-
 43 files changed, 838 insertions(+), 774 deletions(-)
 create mode 100644 src/portable/st/stm32_fsdev/fsdev_common.c
 create mode 100644 src/portable/st/stm32_fsdev/fsdev_common.h
 delete mode 100644 src/portable/st/stm32_fsdev/fsdev_type.h

(limited to 'hw')

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index cba58f8e8..a7bebf1d9 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -13,6 +13,7 @@ mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
 mcu:MAX3421
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index cba58f8e8..a7bebf1d9 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -13,6 +13,7 @@ mcu:MSP432E4
 mcu:RX65X
 mcu:RAXXX
 mcu:MAX3421
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index ef0a1ac96..8da7a47d6 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -9,6 +9,7 @@ mcu:MIMXRT11XX
 mcu:MSP432E4
 mcu:RX65X
 mcu:MAX3421
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H7
diff --git a/hw/bsp/at32f403a_407/family.cmake b/hw/bsp/at32f403a_407/family.cmake
index 498b89c1a..7aaa9ede8 100644
--- a/hw/bsp/at32f403a_407/family.cmake
+++ b/hw/bsp/at32f403a_407/family.cmake
@@ -61,6 +61,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/at32f403a_407/family.mk b/hw/bsp/at32f403a_407/family.mk
index c82d402ca..f458881a3 100644
--- a/hw/bsp/at32f403a_407/family.mk
+++ b/hw/bsp/at32f403a_407/family.mk
@@ -16,6 +16,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \
diff --git a/hw/bsp/at32f413/family.cmake b/hw/bsp/at32f413/family.cmake
index 02692daf5..33718bd1c 100644
--- a/hw/bsp/at32f413/family.cmake
+++ b/hw/bsp/at32f413/family.cmake
@@ -61,6 +61,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/at32f413/family.mk b/hw/bsp/at32f413/family.mk
index 9c5d867de..abcd15d11 100644
--- a/hw/bsp/at32f413/family.mk
+++ b/hw/bsp/at32f413/family.mk
@@ -16,6 +16,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
 	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \
diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index d8c7c5327..59a96f70d 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -93,6 +93,7 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
     ${TOP}/src/portable/wch/hcd_ch32_usbfs.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/ch32v20x/family.mk b/hw/bsp/ch32v20x/family.mk
index 16fc537ac..7042ecbb7 100644
--- a/hw/bsp/ch32v20x/family.mk
+++ b/hw/bsp/ch32v20x/family.mk
@@ -47,6 +47,7 @@ SRC_C += \
 	src/portable/wch/dcd_ch32_usbfs.c \
 	src/portable/wch/hcd_ch32_usbfs.c \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(SDK_SRC_DIR)/Core/core_riscv.c \
 	$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_gpio.c \
 	$(SDK_SRC_DIR)/Peripheral/src/${CH32_FAMILY}_misc.c \
diff --git a/hw/bsp/stm32c0/family.cmake b/hw/bsp/stm32c0/family.cmake
index 6e04b20f4..dc1a2bb13 100644
--- a/hw/bsp/stm32c0/family.cmake
+++ b/hw/bsp/stm32c0/family.cmake
@@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
     ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
diff --git a/hw/bsp/stm32c0/family.mk b/hw/bsp/stm32c0/family.mk
index fd03ad537..71209bf2e 100644
--- a/hw/bsp/stm32c0/family.mk
+++ b/hw/bsp/stm32c0/family.mk
@@ -30,6 +30,7 @@ LDFLAGS_GCC += \
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
 	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32f0/family.cmake b/hw/bsp/stm32f0/family.cmake
index ee73ae872..a926a9739 100644
--- a/hw/bsp/stm32f0/family.cmake
+++ b/hw/bsp/stm32f0/family.cmake
@@ -65,6 +65,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index 9b8305874..b5efdcb8d 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -30,6 +30,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  src/portable/st/stm32_fsdev/fsdev_common.c \
   $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index 064f32096..9e94d86c6 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index ca95f2315..d4b6dfa6c 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -27,6 +27,7 @@ LDFLAGS_GCC += \
 # ------------------------
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  src/portable/st/stm32_fsdev/fsdev_common.c \
   ${ST_CMSIS}/Source/Templates/system_stm32${ST_FAMILY}xx.c \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal.c \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_cortex.c \
diff --git a/hw/bsp/stm32f3/family.cmake b/hw/bsp/stm32f3/family.cmake
index 7c9e97e62..3cbb4e1cd 100644
--- a/hw/bsp/stm32f3/family.cmake
+++ b/hw/bsp/stm32f3/family.cmake
@@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk
index 13734583a..eb4a4e186 100644
--- a/hw/bsp/stm32f3/family.mk
+++ b/hw/bsp/stm32f3/family.mk
@@ -19,6 +19,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  src/portable/st/stm32_fsdev/fsdev_common.c \
   $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 572f0e644..0ce85168e 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -64,6 +64,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index d735ca92d..e376f7f06 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -29,6 +29,8 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32g4/family.cmake b/hw/bsp/stm32g4/family.cmake
index 7e8b319b8..85201ce61 100644
--- a/hw/bsp/stm32g4/family.cmake
+++ b/hw/bsp/stm32g4/family.cmake
@@ -62,6 +62,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index 0abd73532..a153194ce 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -29,6 +29,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	src/portable/st/typec/typec_stm32.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index 6e63c4072..d6f356ddf 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -66,6 +66,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk
index 792edb2bb..ec5f82d61 100644
--- a/hw/bsp/stm32h5/family.mk
+++ b/hw/bsp/stm32h5/family.mk
@@ -36,6 +36,8 @@ LDFLAGS_GCC += \
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32l0/family.cmake b/hw/bsp/stm32l0/family.cmake
index b6b0139a0..3f6622f71 100644
--- a/hw/bsp/stm32l0/family.cmake
+++ b/hw/bsp/stm32l0/family.cmake
@@ -66,6 +66,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk
index 921b1b413..0ae881fdf 100644
--- a/hw/bsp/stm32l0/family.mk
+++ b/hw/bsp/stm32l0/family.mk
@@ -27,6 +27,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  src/portable/st/stm32_fsdev/fsdev_common.c \
   $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32l4/family.cmake b/hw/bsp/stm32l4/family.cmake
index 5bc28dd5d..b1659d47a 100644
--- a/hw/bsp/stm32l4/family.cmake
+++ b/hw/bsp/stm32l4/family.cmake
@@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
     ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index 01d059236..fd11fd226 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -34,6 +34,7 @@ SRC_C += \
 	src/portable/synopsys/dwc2/hcd_dwc2.c \
 	src/portable/synopsys/dwc2/dwc2_common.c \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32u0/family.cmake b/hw/bsp/stm32u0/family.cmake
index 4f9b03109..2d3819cba 100644
--- a/hw/bsp/stm32u0/family.cmake
+++ b/hw/bsp/stm32u0/family.cmake
@@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
index d5a850050..5f25906d3 100644
--- a/hw/bsp/stm32u0/family.mk
+++ b/hw/bsp/stm32u0/family.mk
@@ -27,6 +27,7 @@ LDFLAGS_GCC += \
 
 SRC_C += \
   src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+  src/portable/st/stm32_fsdev/fsdev_common.c \
   $(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_cortex.c \
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 70e0c313c..58dc63ae3 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -66,6 +66,8 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
     ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
     ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 3694b1ca0..79f181a68 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -39,10 +39,12 @@ SRC_C += \
 
 ifeq ($(MCU_VARIANT),stm32u545xx)
 SRC_C += \
-	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c
 else ifeq ($(MCU_VARIANT),stm32u535xx)
 SRC_C += \
-	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c
 else
 SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
diff --git a/hw/bsp/stm32wb/family.cmake b/hw/bsp/stm32wb/family.cmake
index 1a96e3d7e..6703a9b19 100644
--- a/hw/bsp/stm32wb/family.cmake
+++ b/hw/bsp/stm32wb/family.cmake
@@ -67,6 +67,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index a80ff6f5b..0b1a51cec 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -20,6 +20,7 @@ LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
 	$(ST_CMSIS)/Source/Templates/system_${ST_PREFIX}.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_cortex.c \
diff --git a/lib/rt-thread/SConscript b/lib/rt-thread/SConscript
index 99517a090..e7b6f2dc4 100644
--- a/lib/rt-thread/SConscript
+++ b/lib/rt-thread/SConscript
@@ -18,7 +18,8 @@ if GetDepend(["PKG_TINYUSB_DEVICE_ENABLE"]):
     # BSP
     if GetDepend(["SOC_FAMILY_STM32"]):
         src += ["../../src/portable/synopsys/dwc2/dcd_dwc2.c",
-                "../../src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c"]
+                "../../src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c",
+                "../../src/portable/st/stm32_fsdev/fsdev_common.c"]
 
     if GetDepend(["SOC_NRF52840"]):
         src += ["../../src/portable/nordic/nrf5x/dcd_nrf5x.c"]
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index db1a5784a..3762b33f9 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -112,16 +112,7 @@
     !(defined(TUP_USBIP_FSDEV_CH32) && CFG_TUD_WCH_USBIP_FSDEV == 0)
 
 #include "device/dcd.h"
-
-#if defined(TUP_USBIP_FSDEV_STM32)
-  #include "fsdev_stm32.h"
-#elif defined(TUP_USBIP_FSDEV_CH32)
-  #include "fsdev_ch32.h"
-#elif defined(TUP_USBIP_FSDEV_AT32)
-  #include "fsdev_at32.h"
-#else
-  #error "Unknown USB IP"
-#endif
+#include "fsdev_common.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
@@ -162,11 +153,6 @@ static bool edpt_xfer(uint8_t rhport, uint8_t ep_num, tusb_dir_t dir);
 static uint16_t ep_buf_ptr; ///< Points to first free memory location
 static uint32_t dcd_pma_alloc(uint16_t len, bool dbuf);
 static uint8_t dcd_ep_alloc(uint8_t ep_addr, uint8_t ep_type);
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
-
-static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes);
-static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes);
 
 static void edpt0_open(uint8_t rhport);
 
@@ -307,7 +293,7 @@ static void handle_ctr_setup(uint32_t ep_id) {
   uint16_t rx_addr = btable_get_addr(ep_id, BTABLE_BUF_RX);
   uint8_t setup_packet[8] TU_ATTR_ALIGNED(4);
 
-  dcd_read_packet_memory(setup_packet, rx_addr, rx_count);
+  fsdev_read_packet_memory(setup_packet, rx_addr, rx_count);
 
   // Clear CTR RX if another setup packet arrived before this, it will be discarded
   ep_write_clear_ctr(ep_id, TUSB_DIR_OUT);
@@ -345,9 +331,9 @@ static void handle_ctr_rx(uint32_t ep_id) {
   uint16_t pma_addr = (uint16_t) btable_get_addr(ep_id, buf_id);
 
   if (xfer->ff) {
-    dcd_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
+    fsdev_read_packet_memory_ff(xfer->ff, pma_addr, rx_count);
   } else {
-    dcd_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
+    fsdev_read_packet_memory(xfer->buffer + xfer->queued_len, pma_addr, rx_count);
   }
   xfer->queued_len += rx_count;
 
@@ -742,9 +728,9 @@ static void dcd_transmit_packet(xfer_ctl_t *xfer, uint16_t ep_ix) {
   uint16_t addr_ptr = (uint16_t) btable_get_addr(ep_ix, buf_id);
 
   if (xfer->ff) {
-    dcd_write_packet_memory_ff(xfer->ff, addr_ptr, len);
+    fsdev_write_packet_memory_ff(xfer->ff, addr_ptr, len);
   } else {
-    dcd_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
+    fsdev_write_packet_memory(addr_ptr, &(xfer->buffer[xfer->queued_len]), len);
   }
   xfer->queued_len += len;
 
@@ -864,168 +850,4 @@ void dcd_disconnect(uint8_t rhport) {
 }
 #endif
 
-//--------------------------------------------------------------------+
-// PMA read/write
-//--------------------------------------------------------------------+
-
-// Write to packet memory area (PMA) from user memory
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-static bool dcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
-  uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
-
-  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
-  const uint8_t *src8 = src;
-
-  while (n_write--) {
-    pma_buf->value = fsdevbus_unaligned_read(src8);
-    src8 += FSDEV_BUS_SIZE;
-    pma_buf++;
-  }
-
-  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
-  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
-  if (odd) {
-    fsdev_bus_t temp = 0;
-    for(uint16_t i = 0; i < odd; i++) {
-      temp |= *src8++ << (i * 8);
-    }
-    pma_buf->value = temp;
-  }
-
-  return true;
-}
-
-// Read from packet memory area (PMA) to user memory.
-// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
-// - Uses unaligned for RAM (since M0 cannot access unaligned address)
-static bool dcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
-  uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
-
-  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
-  uint8_t *dst8 = (uint8_t *)dst;
-
-  while (n_read--) {
-    fsdevbus_unaligned_write(dst8, (fsdev_bus_t ) pma_buf->value);
-    dst8 += FSDEV_BUS_SIZE;
-    pma_buf++;
-  }
-
-  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
-  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
-  if (odd) {
-    fsdev_bus_t temp = pma_buf->value;
-    while (odd--) {
-      *dst8++ = (uint8_t) (temp & 0xfful);
-      temp >>= 8;
-    }
-  }
-
-  return true;
-}
-
-// Write to PMA from FIFO
-static bool dcd_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes) {
-  if (wNBytes == 0) return true;
-
-  // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
-  tu_fifo_buffer_info_t info;
-  tu_fifo_get_read_info(ff, &info);
-
-  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
-  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
-  uint16_t const cnt_total = cnt_lin + cnt_wrap;
-
-  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
-  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
-  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
-  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
-  uint8_t const *src8 = (uint8_t const*) info.ptr_lin;
-
-  // write even linear part
-  dcd_write_packet_memory(dst, src8, lin_even);
-  dst += lin_even;
-  src8 += lin_even;
-
-  if (lin_odd == 0) {
-    src8 = (uint8_t const*) info.ptr_wrap;
-  } else {
-    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
-    fsdev_bus_t temp = 0;
-    uint16_t i;
-    for(i = 0; i < lin_odd; i++) {
-      temp |= *src8++ << (i * 8);
-    }
-
-    src8 = (uint8_t const*) info.ptr_wrap;
-    for(; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
-      temp |= *src8++ << (i * 8);
-    }
-
-    dcd_write_packet_memory(dst, &temp, FSDEV_BUS_SIZE);
-    dst += FSDEV_BUS_SIZE;
-  }
-
-  // write the rest of the wrapped part
-  dcd_write_packet_memory(dst, src8, cnt_wrap);
-
-  tu_fifo_advance_read_pointer(ff, cnt_total);
-  return true;
-}
-
-// Read from PMA to FIFO
-static bool dcd_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes) {
-  if (wNBytes == 0) return true;
-
-  // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
-  // Check for first linear part
-  tu_fifo_buffer_info_t info;
-  tu_fifo_get_write_info(ff, &info); // We want to read from the FIFO
-
-  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
-  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
-  uint16_t cnt_total = cnt_lin + cnt_wrap;
-
-  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
-  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
-
-  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
-  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
-  uint8_t *dst8 = (uint8_t *) info.ptr_lin;
-
-  // read even linear part
-  dcd_read_packet_memory(dst8, src, lin_even);
-  dst8 += lin_even;
-  src += lin_even;
-
-  if (lin_odd == 0) {
-    dst8 = (uint8_t *) info.ptr_wrap;
-  } else {
-    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
-    fsdev_bus_t temp;
-    dcd_read_packet_memory(&temp, src, FSDEV_BUS_SIZE);
-    src += FSDEV_BUS_SIZE;
-
-    uint16_t i;
-    for (i = 0; i < lin_odd; i++) {
-      *dst8++ = (uint8_t) (temp & 0xfful);
-      temp >>= 8;
-    }
-
-    dst8 = (uint8_t *) info.ptr_wrap;
-    for (; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
-      *dst8++ = (uint8_t) (temp & 0xfful);
-      temp >>= 8;
-    }
-  }
-
-  // read the rest of the wrapped part
-  dcd_read_packet_memory(dst8, src, cnt_wrap);
-
-  tu_fifo_advance_write_pointer(ff, cnt_total);
-  return true;
-}
-
 #endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_at32.h b/src/portable/st/stm32_fsdev/fsdev_at32.h
index 03490ee24..6877dc131 100644
--- a/src/portable/st/stm32_fsdev/fsdev_at32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_at32.h
@@ -150,8 +150,6 @@
 #define USB_EPRX_DTOG2                       ((uint16_t)0x2000U)               /*!< EndPoint RX Data TOGgle bit1 */
 #define USB_EPRX_DTOGMASK  (USB_EPRX_STAT|USB_EPREG_MASK)
 
-#include "fsdev_type.h"
-
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -168,7 +166,7 @@ enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
   #error "Unsupported MCU"
 #endif
 
-void fsdev_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
   #if (CFG_TUSB_MCU == OPT_MCU_AT32F403A_407) || (CFG_TUSB_MCU == OPT_MCU_AT32F413)
   // AT32F403A/407 devices allow to remap the USB interrupt vectors from
@@ -187,7 +185,7 @@ void fsdev_int_enable(uint8_t rhport) {
   }
 }
 
-void fsdev_int_disable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
   #if (CFG_TUSB_MCU == OPT_MCU_AT32F403A_407) || (CFG_TUSB_MCU == OPT_MCU_AT32F413)
   // AT32F403A/407 devices allow to remap the USB interrupt vectors from
@@ -206,7 +204,7 @@ void fsdev_int_disable(uint8_t rhport) {
   }
 }
 
-void fsdev_disconnect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_disconnect(uint8_t rhport) {
   (void) rhport;
   /* disable usb phy */
   *(volatile uint32_t*)(FSDEV_REG_BASE + 0x40) |= USB_CNTR_PDWN;
@@ -214,7 +212,7 @@ void fsdev_disconnect(uint8_t rhport) {
   *(volatile uint32_t *)(FSDEV_REG_BASE+0x60) |= (1u<<1);
 }
 
-void fsdev_connect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_connect(uint8_t rhport) {
   (void) rhport;
   /* enable usb phy */
   *(volatile uint32_t*)(FSDEV_REG_BASE + 0x40) &= ~USB_CNTR_PDWN;
diff --git a/src/portable/st/stm32_fsdev/fsdev_ch32.h b/src/portable/st/stm32_fsdev/fsdev_ch32.h
index 547f3bd1b..ee0057cb4 100644
--- a/src/portable/st/stm32_fsdev/fsdev_ch32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_ch32.h
@@ -168,8 +168,6 @@
 #define USB_EPRX_DTOG2                       ((uint16_t)0x2000U)               /*!< EndPoint RX Data TOGgle bit1 */
 #define USB_EPRX_DTOGMASK  (USB_EPRX_STAT|USB_EPREG_MASK)
 
-#include "fsdev_type.h"
-
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -185,26 +183,26 @@ enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
   #error "Unsupported MCU"
 #endif
 
-void fsdev_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
   for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
     NVIC_EnableIRQ(fsdev_irq[i]);
   }
 }
 
-void fsdev_int_disable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
   for(uint8_t i=0; i < FSDEV_IRQ_NUM; i++) {
     NVIC_DisableIRQ(fsdev_irq[i]);
   }
 }
 
-void fsdev_disconnect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_disconnect(uint8_t rhport) {
   (void) rhport;
   EXTEN->EXTEN_CTR &= ~EXTEN_USBD_PU_EN;
 }
 
-void fsdev_connect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_connect(uint8_t rhport) {
   (void) rhport;
   EXTEN->EXTEN_CTR |= EXTEN_USBD_PU_EN;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
new file mode 100644
index 000000000..d021a6abf
--- /dev/null
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -0,0 +1,241 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 Ha Thach (tinyusb.org)
+ * Copyright (c) 2025, HiFiPhile (Zixun LI)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if defined(TUP_USBIP_FSDEV) && (CFG_TUH_ENABLED || CFG_TUD_ENABLED)
+
+#include "fsdev_common.h"
+
+//--------------------------------------------------------------------+
+// PMA read/write
+//--------------------------------------------------------------------+
+
+// Write to packet memory area (PMA) from user memory
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
+  if (nbytes == 0) return true;
+  uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
+
+  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
+  const uint8_t *src8 = src;
+
+  while (n_write--) {
+    pma_buf->value = fsdevbus_unaligned_read(src8);
+    src8 += FSDEV_BUS_SIZE;
+    pma_buf++;
+  }
+
+  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
+  if (odd) {
+    fsdev_bus_t temp = 0;
+    for(uint16_t i = 0; i < odd; i++) {
+      temp |= *src8++ << (i * 8);
+    }
+    pma_buf->value = temp;
+  }
+
+  return true;
+}
+
+// Read from packet memory area (PMA) to user memory.
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
+  if (nbytes == 0) return true;
+  uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
+
+  fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
+  uint8_t *dst8 = (uint8_t *)dst;
+
+  while (n_read--) {
+    fsdevbus_unaligned_write(dst8, (fsdev_bus_t ) pma_buf->value);
+    dst8 += FSDEV_BUS_SIZE;
+    pma_buf++;
+  }
+
+  // odd bytes e.g 1 for 16-bit or 1-3 for 32-bit
+  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
+  if (odd) {
+    fsdev_bus_t temp = pma_buf->value;
+    while (odd--) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
+    }
+  }
+
+  return true;
+}
+
+// Write to PMA from FIFO
+bool fsdev_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes) {
+  if (wNBytes == 0) return true;
+
+  // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
+  tu_fifo_buffer_info_t info;
+  tu_fifo_get_read_info(ff, &info);
+
+  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
+  uint16_t const cnt_total = cnt_lin + cnt_wrap;
+
+  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
+  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
+  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
+  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
+  uint8_t const *src8 = (uint8_t const*) info.ptr_lin;
+
+  // write even linear part
+  fsdev_write_packet_memory(dst, src8, lin_even);
+  dst += lin_even;
+  src8 += lin_even;
+
+  if (lin_odd == 0) {
+    src8 = (uint8_t const*) info.ptr_wrap;
+  } else {
+    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
+    fsdev_bus_t temp = 0;
+    uint16_t i;
+    for(i = 0; i < lin_odd; i++) {
+      temp |= *src8++ << (i * 8);
+    }
+
+    src8 = (uint8_t const*) info.ptr_wrap;
+    for(; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
+      temp |= *src8++ << (i * 8);
+    }
+
+    fsdev_write_packet_memory(dst, &temp, FSDEV_BUS_SIZE);
+    dst += FSDEV_BUS_SIZE;
+  }
+
+  // write the rest of the wrapped part
+  fsdev_write_packet_memory(dst, src8, cnt_wrap);
+
+  tu_fifo_advance_read_pointer(ff, cnt_total);
+  return true;
+}
+
+// Read from PMA to FIFO
+bool fsdev_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes) {
+  if (wNBytes == 0) return true;
+
+  // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
+  // Check for first linear part
+  tu_fifo_buffer_info_t info;
+  tu_fifo_get_write_info(ff, &info); // We want to read from the FIFO
+
+  uint16_t cnt_lin = tu_min16(wNBytes, info.len_lin);
+  uint16_t cnt_wrap = tu_min16(wNBytes - cnt_lin, info.len_wrap);
+  uint16_t cnt_total = cnt_lin + cnt_wrap;
+
+  // We want to read from the FIFO and write it into the PMA, if LIN part is ODD and has WRAPPED part,
+  // last lin byte will be combined with wrapped part To ensure PMA is always access aligned
+
+  uint16_t lin_even = cnt_lin & ~(FSDEV_BUS_SIZE - 1);
+  uint16_t lin_odd = cnt_lin & (FSDEV_BUS_SIZE - 1);
+  uint8_t *dst8 = (uint8_t *) info.ptr_lin;
+
+  // read even linear part
+  fsdev_read_packet_memory(dst8, src, lin_even);
+  dst8 += lin_even;
+  src += lin_even;
+
+  if (lin_odd == 0) {
+    dst8 = (uint8_t *) info.ptr_wrap;
+  } else {
+    // Combine last linear bytes + first wrapped bytes to form fsdev bus width data
+    fsdev_bus_t temp;
+    fsdev_read_packet_memory(&temp, src, FSDEV_BUS_SIZE);
+    src += FSDEV_BUS_SIZE;
+
+    uint16_t i;
+    for (i = 0; i < lin_odd; i++) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
+    }
+
+    dst8 = (uint8_t *) info.ptr_wrap;
+    for (; i < FSDEV_BUS_SIZE && cnt_wrap > 0; i++, cnt_wrap--) {
+      *dst8++ = (uint8_t) (temp & 0xfful);
+      temp >>= 8;
+    }
+  }
+
+  // read the rest of the wrapped part
+  fsdev_read_packet_memory(dst8, src, cnt_wrap);
+
+  tu_fifo_advance_write_pointer(ff, cnt_total);
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// BTable Helper
+//--------------------------------------------------------------------+
+
+/* Aligned buffer size according to hardware */
+uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_block) {
+  /* The STM32 full speed USB peripheral supports only a limited set of
+   * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
+  uint16_t block_in_bytes;
+  if (size > 62) {
+    block_in_bytes = 32;
+    *blsize = 1;
+    *num_block = tu_div_ceil(size, 32);
+  } else {
+    block_in_bytes = 2;
+    *blsize = 0;
+    *num_block = tu_div_ceil(size, 2);
+  }
+
+  return (*num_block) * block_in_bytes;
+}
+
+void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) {
+  uint8_t blsize, num_block;
+  (void) pma_align_buffer_size(wCount, &blsize, &num_block);
+
+  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
+  uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
+  if (bl_nb == 0) {
+    // zlp but 0 is invalid value, set blsize to 1 (32 bytes)
+    // Note: lower value can cause PMAOVR on setup with ch32v203
+    bl_nb = 1 << 15;
+  }
+
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
+#endif
+}
+
+#endif
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
new file mode 100644
index 000000000..e363245ec
--- /dev/null
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -0,0 +1,343 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) N Conrad
+ * Copyright (c) 2024, hathach (tinyusb.org)
+ * Copyright (c) 2025, HiFiPhile (Zixun LI)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_FSDEV_COMMON_H
+#define TUSB_FSDEV_COMMON_H
+
+#include "common/tusb_common.h"
+
+#if CFG_TUD_ENABLED
+#include "device/dcd.h"
+#endif
+
+#if CFG_TUH_ENABLED
+#include "host/hcd.h"
+#endif
+
+#if defined(TUP_USBIP_FSDEV_STM32)
+  #include "fsdev_stm32.h"
+#elif defined(TUP_USBIP_FSDEV_CH32)
+  #include "fsdev_ch32.h"
+#elif defined(TUP_USBIP_FSDEV_AT32)
+  #include "fsdev_at32.h"
+#else
+  #error "Unknown USB IP"
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
+// Both of these MUST be a multiple of 2, and are in byte units.
+#ifndef FSDEV_BTABLE_BASE
+#define FSDEV_BTABLE_BASE 0U
+#endif
+
+TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 bytes");
+
+// FSDEV_PMA_SIZE is PMA buffer size in bytes.
+// - 512-byte devices, access with a stride of two words (use every other 16-bit address)
+// - 1024-byte devices, access with a stride of one word (use every 16-bit address)
+// - 2048-byte devices, access with 32-bit address
+
+// For purposes of accessing the packet
+#if FSDEV_PMA_SIZE == 512
+  // 1x16 bit / word access scheme
+  #define FSDEV_PMA_STRIDE  2
+  #define pma_access_scheme TU_ATTR_ALIGNED(4)
+#elif FSDEV_PMA_SIZE == 1024
+  // 2x16 bit / word access scheme
+  #define FSDEV_PMA_STRIDE  1
+  #define pma_access_scheme
+#elif FSDEV_PMA_SIZE == 2048
+  // 32 bit access scheme
+  #define FSDEV_BUS_32BIT
+  #define FSDEV_PMA_STRIDE  1
+  #define pma_access_scheme
+#endif
+
+// The fsdev_bus_t type can be used for both register and PMA access necessities
+#ifdef FSDEV_BUS_32BIT
+  typedef uint32_t fsdev_bus_t;
+  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read32(_addr)
+  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write32(_addr, _value)
+#else
+  typedef uint16_t fsdev_bus_t;
+  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read16(_addr)
+  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write16(_addr, _value)
+#endif
+
+enum {
+  FSDEV_BUS_SIZE = sizeof(fsdev_bus_t),
+};
+
+//--------------------------------------------------------------------+
+// BTable Typedef
+//--------------------------------------------------------------------+
+enum {
+  BTABLE_BUF_TX = 0,
+  BTABLE_BUF_RX = 1
+};
+
+// hardware limit endpoint
+#define FSDEV_EP_COUNT 8
+
+// Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either
+// 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
+// 0: TX (IN), 1: RX (OUT)
+typedef union {
+  // data is strictly 16-bit access (address could be 32-bit aligned)
+  struct {
+    volatile pma_access_scheme uint16_t addr;
+    volatile pma_access_scheme uint16_t count;
+  } ep16[FSDEV_EP_COUNT][2];
+
+  // strictly 32-bit access
+  struct {
+    volatile uint32_t count_addr;
+  } ep32[FSDEV_EP_COUNT][2];
+} fsdev_btable_t;
+
+TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
+TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM");
+
+#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(FSDEV_BTABLE_BASE)))
+
+typedef struct {
+  volatile pma_access_scheme fsdev_bus_t value;
+} fsdev_pma_buf_t;
+
+#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(_addr)))
+
+//--------------------------------------------------------------------+
+// Registers Typedef
+//--------------------------------------------------------------------+
+
+// volatile 32-bit aligned
+#define _va32     volatile TU_ATTR_ALIGNED(4)
+
+typedef struct {
+  struct {
+    _va32 fsdev_bus_t reg;
+  }ep[FSDEV_EP_COUNT];
+
+  _va32 uint32_t RESERVED7[8];       // Reserved
+  _va32 fsdev_bus_t CNTR;            // 40: Control register
+  _va32 fsdev_bus_t ISTR;            // 44: Interrupt status register
+  _va32 fsdev_bus_t FNR;             // 48: Frame number register
+  _va32 fsdev_bus_t DADDR;           // 4C: Device address register
+  _va32 fsdev_bus_t BTABLE;          // 50: Buffer Table address register (16-bit only)
+  _va32 fsdev_bus_t LPMCSR;          // 54: LPM Control and Status Register (32-bit only)
+  _va32 fsdev_bus_t BCDR;            // 58: Battery Charging Detector Register (32-bit only)
+} fsdev_regs_t;
+
+TU_VERIFY_STATIC(offsetof(fsdev_regs_t, CNTR) == 0x40, "Wrong offset");
+TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
+
+#define FSDEV_REG ((fsdev_regs_t*) FSDEV_REG_BASE)
+
+
+#ifndef USB_EPTX_STAT
+#define USB_EPTX_STAT 0x0030U
+#endif
+
+#ifndef USB_EPRX_STAT
+#define USB_EPRX_STAT 0x3000U
+#endif
+
+#ifndef USB_EPTX_STAT_Pos
+#define USB_EPTX_STAT_Pos    4u
+#endif
+
+#ifndef USB_EP_DTOG_TX_Pos
+#define USB_EP_DTOG_TX_Pos   6u
+#endif
+
+#ifndef USB_EP_CTR_TX_Pos
+#define USB_EP_CTR_TX_Pos    7u
+#endif
+
+typedef enum {
+  EP_STAT_DISABLED = 0,
+  EP_STAT_STALL = 1,
+  EP_STAT_NAK = 2,
+  EP_STAT_VALID = 3
+}ep_stat_t;
+
+#define EP_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
+#define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
+
+#define CH_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
+#define CH_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
+
+//--------------------------------------------------------------------+
+// Endpoint Helper
+// - CTR is write 0 to clear
+// - DTOG and STAT are write 1 to toggle
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
+  return FSDEV_REG->ep[ep_id].reg;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) {
+  if (need_exclusive) {
+    fsdev_int_disable(0);
+  }
+
+  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
+
+  if (need_exclusive) {
+    fsdev_int_enable(0);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb_dir_t dir) {
+  uint32_t reg = FSDEV_REG->ep[ep_id].reg;
+  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
+  reg &= USB_EPREG_MASK;
+  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+  ep_write(ep_id, reg, false);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
+  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ep_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
+  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
+  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
+}
+
+//--------------------------------------------------------------------+
+// Channel Helper
+// - Direction is opposite to endpoint direction
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t ch_read(uint32_t ch_id) {
+  return ep_read(ch_id);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_write(uint32_t ch_id, uint32_t value, bool need_exclusive) {
+  ep_write(ch_id, value, need_exclusive);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_write_clear_ctr(uint32_t ch_id, tusb_dir_t dir) {
+  uint32_t reg = FSDEV_REG->ep[ch_id].reg;
+  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
+  reg &= USB_EPREG_MASK;
+  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+  ep_write(ch_id, reg, false);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
+  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void ch_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
+  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+}
+
+//--------------------------------------------------------------------+
+// BTable Helper
+//--------------------------------------------------------------------+
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
+#ifdef FSDEV_BUS_32BIT
+  return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
+#else
+  return FSDEV_BTABLE->ep16[ep_id][buf_id].addr;
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) {
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr;
+#endif
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint16_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
+  uint16_t count;
+#ifdef FSDEV_BUS_32BIT
+  count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
+#else
+  count = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
+#endif
+  return count & 0x3FFU;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) {
+#ifdef FSDEV_BUS_32BIT
+  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
+  count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
+  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
+#else
+  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
+  cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
+  FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt;
+#endif
+}
+
+/* Aligned buffer size according to hardware */
+uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_block);
+
+void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount);
+
+//--------------------------------------------------------------------+
+// PMA (Packet Memory Area) Access
+//--------------------------------------------------------------------+
+
+// Write to packet memory area (PMA) from user memory
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
+
+// Read from packet memory area (PMA) to user memory.
+// - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
+// - Uses unaligned for RAM (since M0 cannot access unaligned address)
+bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
+
+// Write to PMA from FIFO
+bool fsdev_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes);
+
+// Read from PMA to FIFO
+bool fsdev_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* TUSB_FSDEV_COMMON_H */
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index d47d23f14..71370b189 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -321,8 +321,6 @@
   #define FSDEV_USE_SBUF_ISO 0
 #endif
 
-#include "fsdev_type.h"
-
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
@@ -374,7 +372,7 @@ static const IRQn_Type fsdev_irq[] = {
 };
 enum { FSDEV_IRQ_NUM = TU_ARRAY_SIZE(fsdev_irq) };
 
-void fsdev_int_enable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_enable(uint8_t rhport) {
   (void)rhport;
 
   // forces write to RAM before allowing ISR to execute
@@ -397,7 +395,7 @@ void fsdev_int_enable(uint8_t rhport) {
   }
 }
 
-void fsdev_int_disable(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   (void)rhport;
 
   #if CFG_TUSB_MCU == OPT_MCU_STM32F3 && defined(SYSCFG_CFGR1_USB_IT_RMP)
@@ -422,24 +420,24 @@ void fsdev_int_disable(uint8_t rhport) {
 // Define only on MCU with internal pull-up. BSP can define on MCU without internal PU.
 #if defined(USB_BCDR_DPPU)
 
-void fsdev_disconnect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_disconnect(uint8_t rhport) {
   (void)rhport;
   USB->BCDR &= ~(USB_BCDR_DPPU);
 }
 
-void fsdev_connect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_connect(uint8_t rhport) {
   (void)rhport;
   USB->BCDR |= USB_BCDR_DPPU;
 }
 
 #elif defined(SYSCFG_PMC_USB_PU) // works e.g. on STM32L151
 
-void fsdev_disconnect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_disconnect(uint8_t rhport) {
   (void)rhport;
   SYSCFG->PMC &= ~(SYSCFG_PMC_USB_PU);
 }
 
-void fsdev_connect(uint8_t rhport) {
+TU_ATTR_ALWAYS_INLINE static inline void fsdev_connect(uint8_t rhport) {
   (void)rhport;
   SYSCFG->PMC |= SYSCFG_PMC_USB_PU;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_type.h b/src/portable/st/stm32_fsdev/fsdev_type.h
deleted file mode 100644
index 2b340d64a..000000000
--- a/src/portable/st/stm32_fsdev/fsdev_type.h
+++ /dev/null
@@ -1,344 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright(c) N Conrad
- * Copyright(c) 2024, hathach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef TUSB_FSDEV_TYPE_H
-#define TUSB_FSDEV_TYPE_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-#include "stdint.h"
-
-// If sharing with CAN, one can set this to be non-zero to give CAN space where it wants it
-// Both of these MUST be a multiple of 2, and are in byte units.
-#ifndef FSDEV_BTABLE_BASE
-#define FSDEV_BTABLE_BASE 0U
-#endif
-
-TU_VERIFY_STATIC(FSDEV_BTABLE_BASE % 8 == 0, "BTABLE base must be aligned to 8 bytes");
-
-// FSDEV_PMA_SIZE is PMA buffer size in bytes.
-// - 512-byte devices, access with a stride of two words (use every other 16-bit address)
-// - 1024-byte devices, access with a stride of one word (use every 16-bit address)
-// - 2048-byte devices, access with 32-bit address
-
-// For purposes of accessing the packet
-#if FSDEV_PMA_SIZE == 512
-  // 1x16 bit / word access scheme
-  #define FSDEV_PMA_STRIDE  2
-  #define pma_access_scheme TU_ATTR_ALIGNED(4)
-#elif FSDEV_PMA_SIZE == 1024
-  // 2x16 bit / word access scheme
-  #define FSDEV_PMA_STRIDE  1
-  #define pma_access_scheme
-#elif FSDEV_PMA_SIZE == 2048
-  // 32 bit access scheme
-  #define FSDEV_BUS_32BIT
-  #define FSDEV_PMA_STRIDE  1
-  #define pma_access_scheme
-#endif
-
-// The fsdev_bus_t type can be used for both register and PMA access necessities
-#ifdef FSDEV_BUS_32BIT
-  typedef uint32_t fsdev_bus_t;
-  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read32(_addr)
-  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write32(_addr, _value)
-#else
-  typedef uint16_t fsdev_bus_t;
-  #define fsdevbus_unaligned_read(_addr)           tu_unaligned_read16(_addr)
-  #define fsdevbus_unaligned_write(_addr, _value)  tu_unaligned_write16(_addr, _value)
-#endif
-
-enum {
-  FSDEV_BUS_SIZE = sizeof(fsdev_bus_t),
-};
-
-//--------------------------------------------------------------------+
-// BTable Typedef
-//--------------------------------------------------------------------+
-enum {
-  BTABLE_BUF_TX = 0,
-  BTABLE_BUF_RX = 1
-};
-
-// hardware limit endpoint
-#define FSDEV_EP_COUNT 8
-
-// Buffer Table is located in Packet Memory Area (PMA) and therefore its address access is forced to either
-// 16-bit or 32-bit depending on FSDEV_BUS_32BIT.
-// 0: TX (IN), 1: RX (OUT)
-typedef union {
-  // data is strictly 16-bit access (address could be 32-bit aligned)
-  struct {
-    volatile pma_access_scheme uint16_t addr;
-    volatile pma_access_scheme uint16_t count;
-  } ep16[FSDEV_EP_COUNT][2];
-
-  // strictly 32-bit access
-  struct {
-    volatile uint32_t count_addr;
-  } ep32[FSDEV_EP_COUNT][2];
-} fsdev_btable_t;
-
-TU_VERIFY_STATIC(sizeof(fsdev_btable_t) == FSDEV_EP_COUNT*8*FSDEV_PMA_STRIDE, "size is not correct");
-TU_VERIFY_STATIC(FSDEV_BTABLE_BASE + FSDEV_EP_COUNT*8 <= FSDEV_PMA_SIZE, "BTABLE does not fit in PMA RAM");
-
-#define FSDEV_BTABLE ((volatile fsdev_btable_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(FSDEV_BTABLE_BASE)))
-
-typedef struct {
-  volatile pma_access_scheme fsdev_bus_t value;
-} fsdev_pma_buf_t;
-
-#define PMA_BUF_AT(_addr) ((fsdev_pma_buf_t*) (FSDEV_PMA_BASE + FSDEV_PMA_STRIDE*(_addr)))
-
-//--------------------------------------------------------------------+
-// Registers Typedef
-//--------------------------------------------------------------------+
-
-// volatile 32-bit aligned
-#define _va32     volatile TU_ATTR_ALIGNED(4)
-
-typedef struct {
-  struct {
-    _va32 fsdev_bus_t reg;
-  }ep[FSDEV_EP_COUNT];
-
-  _va32 uint32_t RESERVED7[8];       // Reserved
-  _va32 fsdev_bus_t CNTR;            // 40: Control register
-  _va32 fsdev_bus_t ISTR;            // 44: Interrupt status register
-  _va32 fsdev_bus_t FNR;             // 48: Frame number register
-  _va32 fsdev_bus_t DADDR;           // 4C: Device address register
-  _va32 fsdev_bus_t BTABLE;          // 50: Buffer Table address register (16-bit only)
-  _va32 fsdev_bus_t LPMCSR;          // 54: LPM Control and Status Register (32-bit only)
-  _va32 fsdev_bus_t BCDR;            // 58: Battery Charging Detector Register (32-bit only)
-} fsdev_regs_t;
-
-TU_VERIFY_STATIC(offsetof(fsdev_regs_t, CNTR) == 0x40, "Wrong offset");
-TU_VERIFY_STATIC(sizeof(fsdev_regs_t) == 0x5C, "Size is not correct");
-
-#define FSDEV_REG ((fsdev_regs_t*) FSDEV_REG_BASE)
-
-
-#ifndef USB_EPTX_STAT
-#define USB_EPTX_STAT 0x0030U
-#endif
-
-#ifndef USB_EPRX_STAT
-#define USB_EPRX_STAT 0x3000U
-#endif
-
-#ifndef USB_EPTX_STAT_Pos
-#define USB_EPTX_STAT_Pos    4u
-#endif
-
-#ifndef USB_EP_DTOG_TX_Pos
-#define USB_EP_DTOG_TX_Pos   6u
-#endif
-
-#ifndef USB_EP_CTR_TX_Pos
-#define USB_EP_CTR_TX_Pos    7u
-#endif
-
-typedef enum {
-  EP_STAT_DISABLED = 0,
-  EP_STAT_STALL = 1,
-  EP_STAT_NAK = 2,
-  EP_STAT_VALID = 3
-}ep_stat_t;
-
-#define EP_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
-#define EP_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 0 : 8)))
-
-#define CH_STAT_MASK(_dir)  (3u << (USB_EPTX_STAT_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
-#define CH_DTOG_MASK(_dir)  (1u << (USB_EP_DTOG_TX_Pos + ((_dir) == TUSB_DIR_IN ? 8 : 0)))
-
-void fsdev_int_enable(uint8_t rhport);
-void fsdev_int_disable(uint8_t rhport);
-void fsdev_connect(uint8_t rhport);
-void fsdev_disconnect(uint8_t rhport);
-
-//--------------------------------------------------------------------+
-// Endpoint Helper
-// - CTR is write 0 to clear
-// - DTOG and STAT are write 1 to toggle
-//--------------------------------------------------------------------+
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ep_read(uint32_t ep_id) {
-  return FSDEV_REG->ep[ep_id].reg;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ep_write(uint32_t ep_id, uint32_t value, bool need_exclusive) {
-  if (need_exclusive) {
-    fsdev_int_disable(0);
-  }
-
-  FSDEV_REG->ep[ep_id].reg = (fsdev_bus_t) value;
-
-  if (need_exclusive) {
-    fsdev_int_enable(0);
-  }
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb_dir_t dir) {
-  uint32_t reg = FSDEV_REG->ep[ep_id].reg;
-  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
-  reg &= USB_EPREG_MASK;
-  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-  ep_write(ep_id, reg, false);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ep_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
-  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ep_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
-  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(uint32_t reg) {
-  return (reg & USB_EP_TYPE_MASK) == USB_EP_ISOCHRONOUS;
-}
-
-//--------------------------------------------------------------------+
-// Channel Helper
-// - Direction is opposite to endpoint direction
-//--------------------------------------------------------------------+
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t ch_read(uint32_t ch_id) {
-  return ep_read(ch_id);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ch_write(uint32_t ch_id, uint32_t value, bool need_exclusive) {
-  ep_write(ch_id, value, need_exclusive);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ch_write_clear_ctr(uint32_t ch_id, tusb_dir_t dir) {
-  uint32_t reg = FSDEV_REG->ep[ch_id].reg;
-  reg |= USB_EP_CTR_TX | USB_EP_CTR_RX;
-  reg &= USB_EPREG_MASK;
-  reg &= ~(1 << (USB_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
-  ep_write(ch_id, reg, false);
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ch_change_status(uint32_t* reg, tusb_dir_t dir, ep_stat_t state) {
-  *reg ^= (state << (USB_EPTX_STAT_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void ch_change_dtog(uint32_t* reg, tusb_dir_t dir, uint8_t state) {
-  *reg ^= (state << (USB_EP_DTOG_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
-}
-
-//--------------------------------------------------------------------+
-// BTable Helper
-//--------------------------------------------------------------------+
-
-TU_ATTR_ALWAYS_INLINE static inline uint32_t btable_get_addr(uint32_t ep_id, uint8_t buf_id) {
-#ifdef FSDEV_BUS_32BIT
-  return FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr & 0x0000FFFFu;
-#else
-  return FSDEV_BTABLE->ep16[ep_id][buf_id].addr;
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_addr(uint32_t ep_id, uint8_t buf_id, uint16_t addr) {
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (count_addr & 0xFFFF0000u) | (addr & 0x0000FFFCu);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  FSDEV_BTABLE->ep16[ep_id][buf_id].addr = addr;
-#endif
-}
-
-TU_ATTR_ALWAYS_INLINE static inline uint16_t btable_get_count(uint32_t ep_id, uint8_t buf_id) {
-  uint16_t count;
-#ifdef FSDEV_BUS_32BIT
-  count = (FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr >> 16);
-#else
-  count = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
-#endif
-  return count & 0x3FFU;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_count(uint32_t ep_id, uint8_t buf_id, uint16_t byte_count) {
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (count_addr & ~0x03FF0000u) | ((byte_count & 0x3FFu) << 16);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  uint16_t cnt = FSDEV_BTABLE->ep16[ep_id][buf_id].count;
-  cnt = (cnt & ~0x3FFU) | (byte_count & 0x3FFU);
-  FSDEV_BTABLE->ep16[ep_id][buf_id].count = cnt;
-#endif
-}
-
-/* Aligned buffer size according to hardware */
-TU_ATTR_ALWAYS_INLINE static inline uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_block) {
-  /* The STM32 full speed USB peripheral supports only a limited set of
-   * buffer sizes given by the RX buffer entry format in the USB_BTABLE. */
-  uint16_t block_in_bytes;
-  if (size > 62) {
-    block_in_bytes = 32;
-    *blsize = 1;
-    *num_block = tu_div_ceil(size, 32);
-  } else {
-    block_in_bytes = 2;
-    *blsize = 0;
-    *num_block = tu_div_ceil(size, 2);
-  }
-
-  return (*num_block) * block_in_bytes;
-}
-
-TU_ATTR_ALWAYS_INLINE static inline void btable_set_rx_bufsize(uint32_t ep_id, uint8_t buf_id, uint16_t wCount) {
-  uint8_t blsize, num_block;
-  (void) pma_align_buffer_size(wCount, &blsize, &num_block);
-
-  /* Encode into register. When BLSIZE==1, we need to subtract 1 block count */
-  uint16_t bl_nb = (blsize << 15) | ((num_block - blsize) << 10);
-  if (bl_nb == 0) {
-    // zlp but 0 is invalid value, set blsize to 1 (32 bytes)
-    // Note: lower value can cause PMAOVR on setup with ch32v203
-    bl_nb = 1 << 15;
-  }
-
-#ifdef FSDEV_BUS_32BIT
-  uint32_t count_addr = FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr;
-  count_addr = (bl_nb << 16) | (count_addr & 0x0000FFFFu);
-  FSDEV_BTABLE->ep32[ep_id][buf_id].count_addr = count_addr;
-#else
-  FSDEV_BTABLE->ep16[ep_id][buf_id].count = bl_nb;
-#endif
-
-}
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 1c08f64d6..b3c08ba23 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -30,6 +30,7 @@
  *
  * C0                             2048 byte buffer; 32-bit bus; host mode
  * G0                             2048 byte buffer; 32-bit bus; host mode
+ * U3                             2048 byte buffer; 32-bit bus; host mode
  * H5                             2048 byte buffer; 32-bit bus; host mode
  * U535, U545                     2048 byte buffer; 32-bit bus; host mode
  *
@@ -42,19 +43,14 @@
 
 #include "host/hcd.h"
 #include "host/usbh.h"
-
-#if defined(TUP_USBIP_FSDEV_STM32)
-  #include "fsdev_stm32.h"
-#else
-  #error "Unknown USB IP"
-#endif
+#include "fsdev_common.h"
 
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
 // Debug level for FSDEV
-#define FSDEV_DEBUG 1
+#define FSDEV_DEBUG 3
 
 // Max number of endpoints application can open, can be larger than FSDEV_EP_COUNT
 #ifndef CFG_TUH_FSDEV_ENDPOINT_MAX
@@ -76,9 +72,12 @@ typedef struct {
   uint8_t ep_addr;
   uint8_t ep_type;
   uint8_t interval;
-  bool low_speed;
-  bool allocated;
-  bool next_setup;
+  struct TU_ATTR_PACKED {
+    uint8_t low_speed : 1;
+    uint8_t allocated : 1;
+    uint8_t next_setup : 1;
+    uint8_t pid : 1;
+  };
 } hcd_endpoint_t;
 
 // Additional info for each channel when it is active
@@ -88,7 +87,7 @@ typedef struct {
   uint8_t dev_addr;
   uint8_t ep_num;
   uint8_t ep_type;
-  bool allocated[2];
+  uint8_t allocated[2];
   uint8_t retry[2];
   uint8_t result;
 } hcd_xfer_t;
@@ -113,24 +112,35 @@ static uint8_t endpoint_alloc(void);
 static uint8_t endpoint_find(uint8_t dev_addr, uint8_t ep_addr);
 static uint32_t hcd_pma_alloc(uint8_t channel, tusb_dir_t dir, uint16_t len);
 static uint8_t channel_alloc(uint8_t dev_addr, uint8_t ep_addr, uint8_t ep_type);
-static bool hcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes);
-static bool hcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes);
 static bool edpt_xfer_kickoff(uint8_t ep_id);
 static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir);
 static void edpoint_close(uint8_t ep_id);
 static void port_status_handler(uint8_t rhport, bool in_isr);
+static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir);
+static void ch_handle_nak(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir);
+static void ch_handle_stall(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir);
+static void ch_handle_error(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir);
+
 //--------------------------------------------------------------------+
 // Inline Functions
 //--------------------------------------------------------------------+
 
 static inline void endpoint_dealloc(hcd_endpoint_t* edpt) {
-  edpt->allocated = false;
+  edpt->allocated = 0;
 }
 
 static inline void channel_dealloc(hcd_xfer_t* xfer, tusb_dir_t dir) {
-  xfer->allocated[dir] = false;
+  xfer->allocated[dir] = 0;
 }
 
+// Write channel state in specified direction
+static inline void channel_write_status(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir, ep_stat_t state, bool need_exclusive) {
+  ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(dir);
+  ch_change_status(&ch_reg, dir, state);
+  ch_write(ch_id, ch_reg, need_exclusive);
+}
+
+
 //--------------------------------------------------------------------+
 // Controller API
 //--------------------------------------------------------------------+
@@ -218,139 +228,153 @@ static void port_status_handler(uint8_t rhport, bool in_isr) {
   }
 }
 
-// Handle CTR interrupt for the TX/OUT direction
-static void handle_ctr_tx(uint32_t ch_id) {
-  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+//--------------------------------------------------------------------+
+// Interrupt Helper Functions
+//--------------------------------------------------------------------+
 
+// Handle ACK response
+static void ch_handle_ack(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
   uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
   uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
 
-  uint8_t ep_id = endpoint_find(daddr, ep_num);
-  TU_VERIFY(ep_id != TUSB_INDEX_INVALID_8, );
+  uint8_t ep_id = endpoint_find(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0));
+  if (ep_id == TUSB_INDEX_INVALID_8) return;
 
   hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
   hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
-  TU_VERIFY(xfer->allocated[TUSB_DIR_OUT],);
 
-  // Manage Correct Transaction
-  if ((ch_reg & USB_CH_ERRTX) == 0U) {
-    // Acked
-    if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_ACK_SBUF) {
-      if (edpt->buflen != xfer->queued_len[TUSB_DIR_OUT]) {
-        uint16_t const len = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_OUT], edpt->max_packet_size);
-        uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_TX);
-        hcd_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
-        btable_set_count(ch_id, BTABLE_BUF_TX, len);
-        xfer->queued_len[TUSB_DIR_OUT] += len;
-
-        ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
-        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // only change TX Status, reserve other toggle bits
-        ch_write(ch_id, ch_reg, false);
-      } else {
-        channel_dealloc(xfer, TUSB_DIR_OUT);
-        hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_SUCCESS, true);
-      }
-    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_NAK) {
-      // NAKed
-      if (edpt->ep_type != TUSB_XFER_INTERRUPT) {
-        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
-        ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
-        ch_write(ch_id, ch_reg, false);
-      }
-    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_STALL) {
-      // STALLed
+  if (dir == TUSB_DIR_OUT) {
+    // OUT/TX direction
+    if (edpt->buflen != xfer->queued_len[TUSB_DIR_OUT]) {
+      // More data to send
+      uint16_t const len = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_OUT], edpt->max_packet_size);
+      uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_TX);
+      fsdev_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
+      btable_set_count(ch_id, BTABLE_BUF_TX, len);
+      xfer->queued_len[TUSB_DIR_OUT] += len;
+      channel_write_status(ch_id, ch_reg, TUSB_DIR_OUT, EP_STAT_VALID, false);
+    } else {
+      // Transfer complete
       channel_dealloc(xfer, TUSB_DIR_OUT);
-      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
-      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-      ch_write(ch_id,  ch_reg, false);
-      hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_STALLED, true);
+      edpt->pid = (ch_reg & USB_CHEP_DTOG_TX) ? 1 : 0;
+      hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_SUCCESS, true);
     }
   } else {
-    // Error
-    TU_LOG(FSDEV_DEBUG, "handle_ctr_tx error epreg=0x%08X ch=%u ep=0x%02X daddr=%u queued=%u/%u\r\n",
-             ch_reg, ch_id, ep_num, daddr, xfer->queued_len[TUSB_DIR_OUT], edpt->buflen);
-    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change TX Status, reserved other toggle bits
-    ch_reg &=~USB_CH_ERRTX;
-    if (xfer->retry[TUSB_DIR_OUT] < HCD_XFER_ERROR_MAX) {
-      // Retry
-      xfer->retry[TUSB_DIR_OUT]++;
+    // IN/RX direction
+    uint16_t const rx_count = btable_get_count(ch_id, BTABLE_BUF_RX);
+    uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_RX);
+
+    fsdev_read_packet_memory(edpt->buffer + xfer->queued_len[TUSB_DIR_IN], pma_addr, rx_count);
+    xfer->queued_len[TUSB_DIR_IN] += rx_count;
+
+    if ((rx_count < edpt->max_packet_size) || (xfer->queued_len[TUSB_DIR_IN] >= edpt->buflen)) {
+      // Transfer complete (short packet or all bytes received)
+      channel_dealloc(xfer, TUSB_DIR_IN);
+      edpt->pid = (ch_reg & USB_CHEP_DTOG_RX) ? 1 : 0;
+      hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_SUCCESS, true);
     } else {
-      // Failed after retries
-      channel_dealloc(xfer, TUSB_DIR_OUT);
-      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-      hcd_event_xfer_complete(daddr, ep_num, xfer->queued_len[TUSB_DIR_OUT], XFER_RESULT_FAILED, true);
+      // More data expected
+      uint16_t const cnt = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_IN], edpt->max_packet_size);
+      btable_set_rx_bufsize(ch_id, BTABLE_BUF_RX, cnt);
+      channel_write_status(ch_id, ch_reg, TUSB_DIR_IN, EP_STAT_VALID, false);
     }
-    ch_write(ch_id, ch_reg, false);
   }
 }
 
-// Handle CTR interrupt for the RX/IN direction
-static void handle_ctr_rx(uint32_t ch_id) {
-  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+// Handle NAK response
+static void ch_handle_nak(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
   uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
-
   uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
 
-  uint8_t ep_id = endpoint_find(daddr, ep_num | TUSB_DIR_IN_MASK);
-  TU_VERIFY(ep_id != TUSB_INDEX_INVALID_8, );
+  uint8_t ep_id = endpoint_find(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0));
+  if (ep_id == TUSB_INDEX_INVALID_8) return;
 
   hcd_endpoint_t* edpt = &_hcd_data.edpt[ep_id];
-    hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
-  TU_VERIFY(xfer->allocated[TUSB_DIR_IN],);
+  // Retry non-periodic transfer immediately,
+  // Periodic transfer will be retried by next frame automatically
+  if (edpt->ep_type == TUSB_XFER_CONTROL || edpt->ep_type == TUSB_XFER_BULK) {
+    channel_write_status(ch_id, ch_reg, dir, EP_STAT_VALID, false);
+  }
+}
+
+// Handle STALL response
+static void ch_handle_stall(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
+  uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
+  uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
+
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  channel_dealloc(xfer, dir);
+
+  channel_write_status(ch_id, ch_reg, dir, EP_STAT_DISABLED, false);
+
+  hcd_event_xfer_complete(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0),
+                         xfer->queued_len[dir], XFER_RESULT_STALLED, true);
+}
+
+// Handle error response
+static void ch_handle_error(uint8_t ch_id, uint32_t ch_reg, tusb_dir_t dir) {
+  uint8_t const ep_num = ch_reg & USB_EPADDR_FIELD;
+  uint8_t const daddr = (ch_reg & USB_CHEP_DEVADDR_Msk) >> USB_CHEP_DEVADDR_Pos;
+
+  uint8_t ep_id = endpoint_find(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0));
+  if (ep_id == TUSB_INDEX_INVALID_8) return;
+
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+
+  ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(dir);
+  ch_reg &= ~(dir == TUSB_DIR_OUT ? USB_CH_ERRTX : USB_CH_ERRRX);
+
+  if (xfer->retry[dir] < HCD_XFER_ERROR_MAX) {
+    // Retry
+    xfer->retry[dir]++;
+    ch_change_status(&ch_reg, dir, EP_STAT_VALID);
+  } else {
+    // Failed after retries
+    channel_dealloc(xfer, dir);
+    ch_change_status(&ch_reg, dir, EP_STAT_DISABLED);
+    hcd_event_xfer_complete(daddr, ep_num | (dir == TUSB_DIR_IN ? TUSB_DIR_IN_MASK : 0),
+                           xfer->queued_len[dir], XFER_RESULT_FAILED, true);
+  }
+  ch_write(ch_id, ch_reg, false);
+}
+
+// Handle CTR interrupt for the TX/OUT direction
+static void handle_ctr_tx(uint32_t ch_id) {
+  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  TU_VERIFY(xfer->allocated[TUSB_DIR_OUT] == 1,);
+
+  if ((ch_reg & USB_CH_ERRTX) == 0U) {
+    // No error
+    if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_ACK_SBUF) {
+      ch_handle_ack(ch_id, ch_reg, TUSB_DIR_OUT);
+    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_NAK) {
+      ch_handle_nak(ch_id, ch_reg, TUSB_DIR_OUT);
+    } else if ((ch_reg & USB_CH_TX_STTX) == USB_CH_TX_STALL) {
+      ch_handle_stall(ch_id, ch_reg, TUSB_DIR_OUT);
+    }
+  } else {
+    ch_handle_error(ch_id, ch_reg, TUSB_DIR_OUT);
+  }
+}
+
+// Handle CTR interrupt for the RX/IN direction
+static void handle_ctr_rx(uint32_t ch_id) {
+  uint32_t ch_reg = ch_read(ch_id) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+  hcd_xfer_t* xfer = &_hcd_data.xfer[ch_id];
+  TU_VERIFY(xfer->allocated[TUSB_DIR_IN] == 1,);
 
-  // Manage Correct Transaction
   if ((ch_reg & USB_CH_ERRRX) == 0U) {
-    // Acked
+    // No error
     if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_ACK_SBUF) {
-      uint16_t const rx_count = btable_get_count(ch_id, BTABLE_BUF_RX);
-      uint16_t pma_addr = (uint16_t) btable_get_addr(ch_id, BTABLE_BUF_RX);
-
-      hcd_read_packet_memory(edpt->buffer + xfer->queued_len[TUSB_DIR_IN], pma_addr, rx_count);
-      xfer->queued_len[TUSB_DIR_IN] += rx_count;
-
-      if ((rx_count < edpt->max_packet_size) || (xfer->queued_len[TUSB_DIR_IN] >= edpt->buflen)) {
-        // all bytes received or short packet
-        channel_dealloc(xfer, TUSB_DIR_IN);
-        hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_SUCCESS, true);
-      } else {
-        // Set endpoint active again for receiving more data. Note that isochronous endpoints stay active always
-        uint16_t const cnt = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_IN], edpt->max_packet_size);
-        btable_set_rx_bufsize(ch_id, BTABLE_BUF_RX, cnt);
-        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
-        ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
-        ch_write(ch_id, ch_reg, false);
-      }
+      ch_handle_ack(ch_id, ch_reg, TUSB_DIR_IN);
     } else if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_NAK) {
-      // NAKed
-      if (edpt->ep_type != TUSB_XFER_INTERRUPT) {
-        ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
-        ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
-        ch_write(ch_id, ch_reg, false);
-      }
-    } else {
-      // STALLed
-      channel_dealloc(xfer, TUSB_DIR_IN);
-      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
-      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
-      ch_write(ch_id, ch_reg, false);
-      hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_STALLED, true);
+      ch_handle_nak(ch_id, ch_reg, TUSB_DIR_IN);
+    } else if ((ch_reg & USB_CH_RX_STRX) == USB_CH_RX_STALL){
+      ch_handle_stall(ch_id, ch_reg, TUSB_DIR_IN);
     }
   } else {
-    // Error
-    TU_LOG(FSDEV_DEBUG, "handle_ctr_tx error epreg=0x%08X ch=%u ep=0x%02X daddr=%u queued=%u/%u\r\n",
-             ch_reg, ch_id, ep_num, daddr, xfer->queued_len[TUSB_DIR_IN], edpt->buflen);
-    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
-    ch_reg &=~USB_CH_ERRRX;
-    if (xfer->retry[TUSB_DIR_IN] < HCD_XFER_ERROR_MAX) {
-      // Retry
-      xfer->retry[TUSB_DIR_IN]++;
-    } else {
-      // Failed after retries
-      channel_dealloc(xfer, TUSB_DIR_IN);
-      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
-      hcd_event_xfer_complete(daddr, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len[TUSB_DIR_IN], XFER_RESULT_FAILED, true);
-    }
-    ch_write(ch_id, ch_reg, false);
+    ch_handle_error(ch_id, ch_reg, TUSB_DIR_IN);
   }
 }
 
@@ -468,7 +492,7 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
   // Close all endpoints for this device
   for(uint32_t i = 0; i < CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
     hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
-    if (edpt->allocated && edpt->dev_addr == dev_addr) {
+    if (edpt->allocated == 1 && edpt->dev_addr == dev_addr) {
       edpoint_close(i);
     }
   }
@@ -496,7 +520,8 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const
   edpt->ep_type = ep_type;
   edpt->max_packet_size = packet_size;
   edpt->interval = ep_desc->bInterval;
-  edpt->low_speed = (hcd_port_speed_get(rhport) == TUSB_SPEED_FULL && tuh_speed_get(dev_addr) == TUSB_SPEED_LOW);
+  edpt->pid = 0;
+  edpt->low_speed = (hcd_port_speed_get(rhport) == TUSB_SPEED_FULL && tuh_speed_get(dev_addr) == TUSB_SPEED_LOW) ? 1 : 0;
 
   // EP0 is bi-directional, so we need to open both OUT and IN channels
   if (ep_addr == 0) {
@@ -525,7 +550,7 @@ bool hcd_edpt_close(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
     edpoint_close(ep_id_in);
   }
 
-  return false;
+  return true;
 }
 
 // Submit a transfer
@@ -556,17 +581,12 @@ bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
     hcd_xfer_t* xfer = &_hcd_data.xfer[i];
 
-    if (xfer->allocated[dir] &&
+    if (xfer->allocated[dir] == 1 &&
         xfer->dev_addr == dev_addr &&
         xfer->ep_num == tu_edpt_number(ep_addr)) {
-
       channel_dealloc(xfer, dir);
-
-      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
-      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(dir); // will change Status, reserved other toggle bits
-      ch_change_status(&ch_reg, dir, EP_STAT_DISABLED);
-      ch_write(i, ch_reg, true);
-
+      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+      channel_write_status(i, ch_reg, dir, EP_STAT_DISABLED, true);
     }
   }
 
@@ -582,6 +602,7 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 
   hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
   edpt->next_setup = true;
+  edpt->pid = 0;
 
   return hcd_edpt_xfer(rhport, dev_addr, 0, (uint8_t*)(uintptr_t) setup_packet, 8);
 }
@@ -592,6 +613,12 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
   (void) dev_addr;
   (void) ep_addr;
 
+  uint8_t const ep_id = endpoint_find(dev_addr, 0);
+  TU_ASSERT(ep_id < CFG_TUH_FSDEV_ENDPOINT_MAX);
+
+  hcd_endpoint_t *edpt = &_hcd_data.edpt[ep_id];
+  edpt->pid = 0;
+
   return true;
 }
 
@@ -602,8 +629,8 @@ bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
 static uint8_t endpoint_alloc(void) {
   for (uint32_t i = 0; i < CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
     hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
-    if (!edpt->allocated) {
-      edpt->allocated = true;
+    if (edpt->allocated == 0) {
+      edpt->allocated = 1;
       return i;
     }
   }
@@ -613,7 +640,7 @@ static uint8_t endpoint_alloc(void) {
 static uint8_t endpoint_find(uint8_t dev_addr, uint8_t ep_addr) {
   for (uint32_t i = 0; i < (uint32_t)CFG_TUH_FSDEV_ENDPOINT_MAX; i++) {
     hcd_endpoint_t* edpt = &_hcd_data.edpt[i];
-    if (edpt->allocated && edpt->dev_addr == dev_addr && edpt->ep_addr == ep_addr) {
+    if (edpt->allocated == 1 && edpt->dev_addr == dev_addr && edpt->ep_addr == ep_addr) {
       return i;
     }
   }
@@ -628,24 +655,14 @@ static void edpoint_close(uint8_t ep_id) {
   // disable active channel belong to this endpoint
   for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
     hcd_xfer_t* xfer = &_hcd_data.xfer[i];
-
-    if (xfer->allocated[TUSB_DIR_OUT] && xfer->edpt[TUSB_DIR_OUT] == edpt) {
+    uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX;
+    if (xfer->allocated[TUSB_DIR_OUT] == 1 && xfer->edpt[TUSB_DIR_OUT] == edpt) {
       channel_dealloc(xfer, TUSB_DIR_OUT);
-
-      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
-      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // will change RX Status, reserved other toggle bits
-      ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED);
-      ch_write(i, ch_reg, true);
-
+      channel_write_status(i, ch_reg, TUSB_DIR_OUT, EP_STAT_DISABLED, true);
     }
-    if (xfer->allocated[TUSB_DIR_IN] && xfer->edpt[TUSB_DIR_IN] == edpt) {
+    if (xfer->allocated[TUSB_DIR_IN] == 1 && xfer->edpt[TUSB_DIR_IN] == edpt) {
       channel_dealloc(xfer, TUSB_DIR_IN);
-
-      uint32_t ch_reg = ch_read(i) | USB_EP_CTR_TX | USB_EP_CTR_RX; // reserve CTR bits
-      ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change TX Status, reserved other toggle bits
-      ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED);
-      ch_write(i, ch_reg, true);
-
+      channel_write_status(i, ch_reg, TUSB_DIR_IN, EP_STAT_DISABLED, true);
     }
   }
 }
@@ -654,10 +671,10 @@ static void edpoint_close(uint8_t ep_id) {
 static uint32_t hcd_pma_alloc(uint8_t channel, tusb_dir_t dir, uint16_t len) {
   (void) len;
   // Simple static allocation as we are unlikely to handle ISO endpoints in host mode
-  // We just give each channel a buffer of max packet size (64 bytes)
+  // We just give each channel two buffers of max packet size (64 bytes) for IN and OUT
 
   uint16_t addr = FSDEV_BTABLE_BASE + 8 * FSDEV_EP_COUNT;
-  addr += channel * 64 * 2 + (dir == TUSB_DIR_IN ? 64 : 0);
+  addr += channel * TUSB_EPSIZE_BULK_FS * 2 + (dir == TUSB_DIR_IN ? TUSB_EPSIZE_BULK_FS : 0);
 
   TU_ASSERT(addr <= FSDEV_PMA_SIZE, 0xFFFF);
 
@@ -672,12 +689,12 @@ static uint8_t channel_alloc(uint8_t dev_addr, uint8_t ep_addr, uint8_t ep_type)
   // Find channel allocate for same ep_num but other direction
   tusb_dir_t const other_dir = (dir == TUSB_DIR_IN) ? TUSB_DIR_OUT : TUSB_DIR_IN;
   for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
-    if (!_hcd_data.xfer[i].allocated[dir] &&
-        _hcd_data.xfer[i].allocated[other_dir] &&
+    if (_hcd_data.xfer[i].allocated[dir] == 0 &&
+        _hcd_data.xfer[i].allocated[other_dir] == 1 &&
         _hcd_data.xfer[i].dev_addr == dev_addr &&
         _hcd_data.xfer[i].ep_num == ep_num &&
         _hcd_data.xfer[i].ep_type == ep_type) {
-        _hcd_data.xfer[i].allocated[dir] = true;
+        _hcd_data.xfer[i].allocated[dir] = 1;
         _hcd_data.xfer[i].queued_len[dir] = 0;
         _hcd_data.xfer[i].retry[dir] = 0;
       return i;
@@ -686,11 +703,11 @@ static uint8_t channel_alloc(uint8_t dev_addr, uint8_t ep_addr, uint8_t ep_type)
 
   // Find free channel
   for (uint8_t i = 0; i < FSDEV_EP_COUNT; i++) {
-    if (!_hcd_data.xfer[i].allocated[0] && !_hcd_data.xfer[i].allocated[1]) {
+    if (_hcd_data.xfer[i].allocated[0] == 0 && _hcd_data.xfer[i].allocated[1] == 0) {
       _hcd_data.xfer[i].dev_addr = dev_addr;
       _hcd_data.xfer[i].ep_num = ep_num;
       _hcd_data.xfer[i].ep_type = ep_type;
-      _hcd_data.xfer[i].allocated[dir] = true;
+      _hcd_data.xfer[i].allocated[dir] = 1;
       _hcd_data.xfer[i].queued_len[dir] = 0;
       _hcd_data.xfer[i].retry[dir] = 0;
       return i;
@@ -748,84 +765,35 @@ static bool channel_xfer_start(uint8_t ch_id, tusb_dir_t dir) {
   if (dir == TUSB_DIR_OUT) {
     uint16_t const len = tu_min16(edpt->buflen - xfer->queued_len[TUSB_DIR_OUT], edpt->max_packet_size);
 
-    hcd_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
+    fsdev_write_packet_memory(pma_addr, &(edpt->buffer[xfer->queued_len[TUSB_DIR_OUT]]), len);
     btable_set_count(ch_id, BTABLE_BUF_TX, len);
 
     xfer->queued_len[TUSB_DIR_OUT] += len;
-    if (edpt->next_setup) {
-      // Setup packet uses IN token
-      edpt->next_setup = false;
-      ch_reg |= USB_EP_SETUP;
-    }
-
-    ch_change_status(&ch_reg, TUSB_DIR_OUT, EP_STAT_VALID);
-    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_OUT); // only change TX Status, reserve other toggle bits
-
   } else {
     btable_set_rx_bufsize(ch_id, BTABLE_BUF_RX, edpt->max_packet_size);
-    ch_change_status(&ch_reg, TUSB_DIR_IN, EP_STAT_VALID);
-    ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(TUSB_DIR_IN); // will change RX Status, reserved other toggle bits
   }
 
-  ch_write(ch_id, ch_reg, true);
-
-  return true;
-}
-
-//--------------------------------------------------------------------+
-// PMA read/write
-//--------------------------------------------------------------------+
-
-// Write to packet memory area (PMA) from user memory
-static bool hcd_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
-  uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
-
-  fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(dst);
-  const uint8_t *src8 = src;
-
-  while (n_write--) {
-    pma_buf->value = fsdevbus_unaligned_read(src8);
-    src8 += FSDEV_BUS_SIZE;
-    pma_buf++;
+  if (edpt->low_speed == 1) {
+    ch_reg |= USB_CHEP_LSEP;
+  } else {
+    ch_reg &= ~USB_CHEP_LSEP;
   }
 
-  // Handle odd bytes
-  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
-  if (odd) {
-    fsdev_bus_t temp = 0;
-    for (uint16_t i = 0; i < odd; i++) {
-      temp |= *src8++ << (i * 8);
-    }
-    pma_buf->value = temp;
+  if (tu_edpt_number(edpt->ep_addr) == 0) {
+    edpt->pid = 1;
   }
 
-  return true;
-}
-
-// Read from packet memory area (PMA) to user memory
-static bool hcd_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
-  uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
-
-  fsdev_pma_buf_t *pma_buf = PMA_BUF_AT(src);
-  uint8_t *dst8 = (uint8_t *)dst;
-
-  while (n_read--) {
-    fsdevbus_unaligned_write(dst8, (fsdev_bus_t) pma_buf->value);
-    dst8 += FSDEV_BUS_SIZE;
-    pma_buf++;
+  if (edpt->next_setup) {
+    // Setup packet uses IN token
+    edpt->next_setup = false;
+    ch_reg |= USB_EP_SETUP;
+    edpt->pid = 0;
   }
 
-  // Handle odd bytes
-  uint16_t odd = nbytes & (FSDEV_BUS_SIZE - 1);
-  if (odd) {
-    fsdev_bus_t temp = pma_buf->value;
-    while (odd--) {
-      *dst8++ = (uint8_t)(temp & 0xfful);
-      temp >>= 8;
-    }
-  }
+  ch_change_status(&ch_reg, dir, EP_STAT_VALID);
+  ch_change_dtog(&ch_reg, dir, edpt->pid);
+  ch_reg &= USB_EPREG_MASK | CH_STAT_MASK(dir) | CH_DTOG_MASK(dir);
+  ch_write(ch_id, ch_reg, true);
 
   return true;
 }
diff --git a/tools/iar_template.ipcf b/tools/iar_template.ipcf
index 2581a4702..caddda826 100644
--- a/tools/iar_template.ipcf
+++ b/tools/iar_template.ipcf
@@ -217,7 +217,9 @@
         </group>
         <group name="src/portable/st/stm32_fsdev">
             <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c</path>
-            <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.h</path>
+            <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c</path>
+            <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/fsdev_common.c</path>
+            <path>$TUSB_DIR$/src/portable/st/stm32_fsdev/fsdev_common.h</path>
         </group>
         <group name="src/portable/st/typec">
             <path>$TUSB_DIR$/src/portable/st/typec/typec_stm32.c</path>
-- 
cgit v1.3.1


From 2d3aaaf6e12ba62f73ca31d5d239ac4bbc70fde4 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 27 Nov 2025 22:09:29 +0100
Subject: bsp/stm32h5: support host mode

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/bare_api/only.txt                 |   1 +
 examples/host/cdc_msc_hid/only.txt              |   1 +
 examples/host/cdc_msc_hid_freertos/only.txt     |   1 +
 examples/host/device_info/only.txt              |   1 +
 examples/host/hid_controller/only.txt           |   1 +
 examples/host/midi_rx/only.txt                  |   1 +
 examples/host/msc_file_explorer/only.txt        |   1 +
 hw/bsp/stm32g0/family.c                         |   2 +-
 hw/bsp/stm32g0/family.cmake                     |   1 +
 hw/bsp/stm32h5/boards/stm32h503nucleo/board.h   |  49 +++++---
 hw/bsp/stm32h5/boards/stm32h563nucleo/board.h   |  49 +++++---
 hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake |   7 ++
 hw/bsp/stm32h5/boards/stm32h573i_dk/board.h     | 158 +++++++++++++++++++++---
 hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk    |   7 ++
 hw/bsp/stm32h5/family.c                         |  85 ++++++-------
 hw/bsp/stm32h5/family.cmake                     |   3 +
 hw/bsp/stm32h5/family.mk                        |   1 +
 hw/bsp/stm32h5/stm32h5xx_hal_conf.h             |   2 +-
 hw/bsp/stm32u5/family.c                         |  15 ++-
 19 files changed, 284 insertions(+), 102 deletions(-)

(limited to 'hw')

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index a7bebf1d9..4cd457879 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -16,6 +16,7 @@ mcu:MAX3421
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index a7bebf1d9..4cd457879 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -16,6 +16,7 @@ mcu:MAX3421
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index 8da7a47d6..2322d4ecf 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -12,6 +12,7 @@ mcu:MAX3421
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 069f92d83..5b68f0774 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -16,6 +16,7 @@ mcu:RAXXX
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index cba58f8e8..b859b4cc0 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -15,6 +15,7 @@ mcu:RAXXX
 mcu:MAX3421
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 133a7c9a0..022be899d 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -18,6 +18,7 @@ mcu:RX65X
 mcu:RAXXX
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index a7bebf1d9..4cd457879 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -16,6 +16,7 @@ mcu:MAX3421
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 7b86aedb4..4b175b0ec 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -37,7 +37,7 @@
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
 void USB_UCPD1_2_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32g0/family.cmake b/hw/bsp/stm32g0/family.cmake
index 0ce85168e..4b520a0e1 100644
--- a/hw/bsp/stm32g0/family.cmake
+++ b/hw/bsp/stm32g0/family.cmake
@@ -64,6 +64,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
     ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
diff --git a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
index c8b5e31f5..b57fab10e 100644
--- a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
@@ -37,24 +37,33 @@
 extern "C" {
 #endif
 
-// LED
-#define LED_PORT              GPIOA
-#define LED_PIN               GPIO_PIN_5
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PORT           GPIOA
-#define BUTTON_PIN            GPIO_PIN_0
-#define BUTTON_STATE_ACTIVE   0
-
-// UART Enable for STLink VCOM
-#define UART_DEV              USART3
-#define UART_CLK_EN           __USART3_CLK_ENABLE
-#define UART_GPIO_PORT        GPIOA
-#define UART_GPIO_AF          GPIO_AF13_USART3
-
-#define UART_TX_PIN           GPIO_PIN_3
-#define UART_RX_PIN           GPIO_PIN_4
+#define PINID_LED      0
+#define PINID_BUTTON   1
+#define PINID_UART_TX  2
+#define PINID_UART_RX  3
+
+static board_pindef_t board_pindef[] = {
+  { // LED
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_5, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // Button
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 0
+  },
+  { // UART TX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_3, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF13_USART3 },
+    .active_state = 0
+  },
+  { // UART RX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_4, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF13_USART3 },
+    .active_state = 0
+  },
+};
 
 //--------------------------------------------------------------------+
 // RCC Clock
@@ -120,6 +129,10 @@ static inline void SystemClock_Config(void) {
   __HAL_RCC_USB_CLK_ENABLE();
 }
 
+static inline void board_init2(void) {
+  // Empty for this board
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h b/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
index adc3d751a..0af2f8c4f 100644
--- a/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
@@ -37,24 +37,33 @@
 extern "C" {
 #endif
 
-// LED
-#define LED_PORT              GPIOG
-#define LED_PIN               GPIO_PIN_4
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PORT           GPIOA
-#define BUTTON_PIN            GPIO_PIN_0
-#define BUTTON_STATE_ACTIVE   0
-
-// UART Enable for STLink VCOM
-#define UART_DEV              USART1
-#define UART_CLK_EN           __USART1_CLK_ENABLE
-#define UART_GPIO_PORT        GPIOA
-#define UART_GPIO_AF          GPIO_AF7_USART1
-
-#define UART_TX_PIN           GPIO_PIN_9
-#define UART_RX_PIN           GPIO_PIN_10
+#define PINID_LED      0
+#define PINID_BUTTON   1
+#define PINID_UART_TX  2
+#define PINID_UART_RX  3
+
+static board_pindef_t board_pindef[] = {
+  { // LED
+    .port = GPIOG,
+    .pin_init = { .Pin = GPIO_PIN_4, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // Button
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 0
+  },
+  { // UART TX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
+    .active_state = 0
+  },
+  { // UART RX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
+    .active_state = 0
+  },
+};
 
 //--------------------------------------------------------------------+
 // RCC Clock
@@ -128,6 +137,10 @@ static inline void SystemClock_Config(void) {
   }
 }
 
+static inline void board_init2(void) {
+  // Empty for this board
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
index 92d6d98f0..76194ee91 100644
--- a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
+++ b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.cmake
@@ -5,4 +5,11 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32H573xx
     )
+  target_sources(${TARGET} PUBLIC
+    ${ST_TCPP0203}/tcpp0203.c
+    ${ST_TCPP0203}/tcpp0203_reg.c
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${ST_TCPP0203}
+    )
 endfunction()
diff --git a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
index d75114397..e95308b67 100644
--- a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
@@ -37,24 +37,63 @@
 extern "C" {
 #endif
 
-// LED
-#define LED_PORT              GPIOI
-#define LED_PIN               GPIO_PIN_9
-#define LED_STATE_ON          1
-
-// Button
-#define BUTTON_PORT           GPIOC
-#define BUTTON_PIN            GPIO_PIN_13
-#define BUTTON_STATE_ACTIVE   1
-
-// UART Enable for STLink VCOM
-#define UART_DEV              USART1
-#define UART_CLK_EN           __USART1_CLK_ENABLE
-#define UART_GPIO_PORT        GPIOA
-#define UART_GPIO_AF          GPIO_AF7_USART1
-
-#define UART_TX_PIN           GPIO_PIN_9
-#define UART_RX_PIN           GPIO_PIN_10
+#include "tcpp0203.h"
+
+// VBUS Sense detection
+#define OTG_FS_VBUS_SENSE     1
+#define OTG_HS_VBUS_SENSE     0
+
+#define PINID_LED          0
+#define PINID_BUTTON       1
+#define PINID_UART_TX      2
+#define PINID_UART_RX      3
+#define PINID_TCPP0203_EN  4
+#define PINID_I2C_SCL      5
+#define PINID_I2C_SDA      6
+#define PINID_TCPP0203_INT 7
+
+static board_pindef_t board_pindef[] = {
+  { // LED
+    .port = GPIOI,
+    .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // Button
+    .port = GPIOC,
+    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // UART TX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
+    .active_state = 0
+  },
+  { // UART RX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF7_USART1 },
+    .active_state = 0
+  },
+  { // TCPP0203 VCC_EN
+    .port = GPIOG,
+    .pin_init = { .Pin = GPIO_PIN_0, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // I2C4 SCL
+    .port = GPIOB,
+    .pin_init = { .Pin = GPIO_PIN_8, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF6_I2C4 },
+    .active_state = 0
+  },
+  { // I2C4 SDA
+    .port = GPIOB,
+    .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = GPIO_AF6_I2C4 },
+    .active_state = 0
+  },
+  { // TCPP0203 INT
+    .port = GPIOG,
+    .pin_init = { .Pin = GPIO_PIN_1, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .active_state = 0
+  },
+};
 
 //--------------------------------------------------------------------+
 // RCC Clock
@@ -113,6 +152,89 @@ static inline void SystemClock_Config(void) {
   __HAL_RCC_USB_CLK_ENABLE();
 }
 
+//--------------------------------------------------------------------+
+// USB PD
+//--------------------------------------------------------------------+
+static I2C_HandleTypeDef i2c_handle = {
+  .Instance = I2C4,
+  .Init = {
+    .Timing = 0x20C0EDFF, // 100kHz @ 250MHz
+    .OwnAddress1 = 0,
+    .AddressingMode = I2C_ADDRESSINGMODE_7BIT,
+    .DualAddressMode = I2C_DUALADDRESS_DISABLE,
+    .OwnAddress2 = 0,
+    .OwnAddress2Masks = I2C_OA2_NOMASK,
+    .GeneralCallMode = I2C_GENERALCALL_DISABLE,
+    .NoStretchMode = I2C_NOSTRETCH_DISABLE,
+  }
+};
+static TCPP0203_Object_t tcpp0203_obj = { 0 };
+
+int32_t board_tcpp0203_init(void) {
+  // Enable TCPP0203 VCC (GPIO already configured in pindef array)
+  board_pindef_t* pindef = &board_pindef[PINID_TCPP0203_EN];
+  HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, GPIO_PIN_SET);
+
+  // Initialize I2C4 for TCPP0203 (GPIO already configured in pindef array)
+  __HAL_RCC_I2C4_CLK_ENABLE();
+  __HAL_RCC_I2C4_FORCE_RESET();
+  __HAL_RCC_I2C4_RELEASE_RESET();
+  if (HAL_I2C_Init(&i2c_handle) != HAL_OK) {
+    return HAL_ERROR;
+  }
+
+  // Enable interrupt for TCPP0203 FLGn (GPIO already configured in pindef array)
+  NVIC_SetPriority(EXTI1_IRQn, 12);
+  NVIC_EnableIRQ(EXTI1_IRQn);
+
+  return 0;
+}
+
+int32_t board_tcpp0203_deinit(void) {
+  return 0;
+}
+
+int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+  TU_ASSERT (HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
+  return 0;
+}
+
+int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
+  TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
+  return 0;
+}
+
+static inline void board_init2(void) {
+  TCPP0203_IO_t            io_ctx;
+
+  io_ctx.Address     = TCPP0203_I2C_ADDRESS_X68;
+  io_ctx.Init        = board_tcpp0203_init;
+  io_ctx.DeInit      = board_tcpp0203_deinit;
+  io_ctx.ReadReg     = i2c_readreg;
+  io_ctx.WriteReg    = i2c_writereg;
+
+  TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
+
+  TU_ASSERT(TCPP0203_Init(&tcpp0203_obj) == TCPP0203_OK, );
+
+  TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
+}
+
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void) state;
+  if (rhport == 0) {
+    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+  }
+}
+
+void EXTI1_IRQHandler(void) {
+    __HAL_GPIO_EXTI_CLEAR_IT(GPIO_PIN_1);
+    if (tcpp0203_obj.IsInitialized) {
+      TU_ASSERT(TCPP0203_SetPowerMode(&tcpp0203_obj, TCPP0203_POWER_MODE_NORMAL) == TCPP0203_OK, );
+      TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+    }
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
index b24acf89f..49743e7cd 100644
--- a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
+++ b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.mk
@@ -5,3 +5,10 @@ CFLAGS += \
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h573ii
+
+SRC_C += \
+	$(ST_TCPP0203)/tcpp0203.c \
+	$(ST_TCPP0203)/tcpp0203_reg.c \
+
+INC += \
+	$(TOP)/$(ST_TCPP0203) \
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 983944b1c..fdb12e44f 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -46,20 +46,38 @@
 TU_ATTR_UNUSED static void Error_Handler(void) {
 }
 
+typedef struct {
+  GPIO_TypeDef* port;
+  GPIO_InitTypeDef pin_init;
+  uint8_t active_state;
+} board_pindef_t;
+
 #include "board.h"
 
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
 void USB_DRD_FS_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 #ifdef UART_DEV
-UART_HandleTypeDef UartHandle;
+static UART_HandleTypeDef UartHandle = {
+  .Instance = UART_DEV,
+  .Init = {
+    .BaudRate = CFG_BOARD_UART_BAUDRATE,
+    .WordLength = UART_WORDLENGTH_8B,
+    .StopBits = UART_STOPBITS_1,
+    .Parity = UART_PARITY_NONE,
+    .HwFlowCtl = UART_HWCONTROL_NONE,
+    .Mode = UART_MODE_TX_RX,
+    .OverSampling = UART_OVERSAMPLING_16,
+    .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
+  }
+};
 #endif
 
 void board_init(void) {
@@ -95,51 +113,18 @@ void board_init(void) {
   NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   #endif
 
-  GPIO_InitTypeDef GPIO_InitStruct;
-
-  // LED
-  GPIO_InitStruct.Pin = LED_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(LED_PORT, &GPIO_InitStruct);
-
-  board_led_write(false);
-
-  // Button
-  GPIO_InitStruct.Pin = BUTTON_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN : GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
+  for (uint8_t i = 0; i < TU_ARRAY_SIZE(board_pindef); i++) {
+    HAL_GPIO_Init(board_pindef[i].port, &board_pindef[i].pin_init);
+  }
 
   #ifdef UART_DEV
   UART_CLK_EN();
-
-  // UART
-  GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
-  GPIO_InitStruct.Alternate = UART_GPIO_AF;
-  HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
-
-  UartHandle = (UART_HandleTypeDef) {
-      .Instance        = UART_DEV,
-      .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
-      .Init.WordLength = UART_WORDLENGTH_8B,
-      .Init.StopBits   = UART_STOPBITS_1,
-      .Init.Parity     = UART_PARITY_NONE,
-      .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
-      .Init.Mode       = UART_MODE_TX_RX,
-      .Init.OverSampling = UART_OVERSAMPLING_16,
-      .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
-  };
   HAL_UART_Init(&UartHandle);
   #endif
 
   // USB Pins TODO double check USB clock and pin setup
   // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
+  GPIO_InitTypeDef GPIO_InitStruct;
   GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
@@ -153,6 +138,12 @@ void board_init(void) {
   #if defined (PWR_USBSCR_USB33DEN)
   HAL_PWREx_EnableVddUSB();
   #endif
+
+  board_init2();
+
+#if CFG_TUH_ENABLED
+  board_vbus_set(BOARD_TUH_RHPORT, 1);
+#endif
 }
 
 //--------------------------------------------------------------------+
@@ -160,12 +151,22 @@ void board_init(void) {
 //--------------------------------------------------------------------+
 
 void board_led_write(bool state) {
-  GPIO_PinState pin_state = (GPIO_PinState) (state ? LED_STATE_ON : (1 - LED_STATE_ON));
-  HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
+#ifdef PINID_LED
+  board_pindef_t* pindef = &board_pindef[PINID_LED];
+  GPIO_PinState pin_state = state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET;
+  HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, pin_state);
+#else
+  (void) state;
+#endif
 }
 
 uint32_t board_button_read(void) {
-  return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+#ifdef PINID_BUTTON
+  board_pindef_t* pindef = &board_pindef[PINID_BUTTON];
+  return pindef->active_state == HAL_GPIO_ReadPin(pindef->port, pindef->pin_init.Pin);
+#else
+  return 0;
+#endif
 }
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index d6f356ddf..62839af43 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -5,6 +5,7 @@ set(ST_PREFIX stm32${ST_FAMILY}xx)
 
 set(ST_HAL_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx_hal_driver)
 set(ST_CMSIS ${TOP}/hw/mcu/st/cmsis_device_${ST_FAMILY})
+set(ST_TCPP0203 ${TOP}/hw/mcu/st/stm32-tcpp0203)
 set(CMSIS_5 ${TOP}/lib/CMSIS_5)
 
 # include board specific
@@ -44,6 +45,7 @@ function(family_add_board BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_i2c.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -66,6 +68,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
     ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
     ${TOP}/src/portable/st/typec/typec_stm32.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk
index ec5f82d61..89a2eddd5 100644
--- a/hw/bsp/stm32h5/family.mk
+++ b/hw/bsp/stm32h5/family.mk
@@ -1,6 +1,7 @@
 ST_FAMILY = h5
 ST_CMSIS = hw/mcu/st/cmsis_device_$(ST_FAMILY)
 ST_HAL_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx_hal_driver
+ST_TCPP0203 = hw/mcu/st/stm32-tcpp0203
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m33
diff --git a/hw/bsp/stm32h5/stm32h5xx_hal_conf.h b/hw/bsp/stm32h5/stm32h5xx_hal_conf.h
index d017bb06b..b4c64d56e 100644
--- a/hw/bsp/stm32h5/stm32h5xx_hal_conf.h
+++ b/hw/bsp/stm32h5/stm32h5xx_hal_conf.h
@@ -43,7 +43,6 @@ extern "C" {
 /* #define HAL_EXTI_MODULE_ENABLED   */
 /* #define HAL_FDCAN_MODULE_ENABLED   */
 /* #define HAL_HCD_MODULE_ENABLED   */
-/* #define HAL_I2C_MODULE_ENABLED   */
 /* #define HAL_I2S_MODULE_ENABLED   */
 /* #define HAL_IWDG_MODULE_ENABLED   */
 /* #define HAL_IRDA_MODULE_ENABLED   */
@@ -65,6 +64,7 @@ extern "C" {
 #define HAL_PWR_MODULE_ENABLED
 #define HAL_CORTEX_MODULE_ENABLED
 #define HAL_UART_MODULE_ENABLED
+#define HAL_I2C_MODULE_ENABLED
 
 /* ########################## Register Callbacks selection ############################## */
 /**
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 0af497366..26d72d6a0 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -51,14 +51,21 @@ TU_ATTR_UNUSED static void Error_Handler(void) {
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
+#ifdef USB_DRD_FS
+void USB_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+#endif
+#ifdef USB_OTG_FS
 void OTG_FS_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
-
+#endif
+#ifdef USB_OTG_HS
 void OTG_HS_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
-
+#endif
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From 7712205ba847973afd2e7fc37ba6a069ea3c4ceb Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 27 Nov 2025 22:20:06 +0100
Subject: bsp/stm32h5: increase stack for msc_file_explorer

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h5/family.cmake                 |  2 +-
 hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld  |  2 +-
 hw/bsp/stm32h5/linker/stm32h503xx_flash.icf | 32 +++++++++++++++++++++++++++++
 hw/bsp/stm32h5/linker/stm32h523xx_flash.icf | 32 +++++++++++++++++++++++++++++
 hw/bsp/stm32h5/linker/stm32h562xx_flash.icf | 32 +++++++++++++++++++++++++++++
 hw/bsp/stm32h5/linker/stm32h563xx_flash.icf | 32 +++++++++++++++++++++++++++++
 hw/bsp/stm32h5/linker/stm32h573xx_flash.icf | 32 +++++++++++++++++++++++++++++
 12 files changed, 167 insertions(+), 7 deletions(-)
 create mode 100644 hw/bsp/stm32h5/linker/stm32h503xx_flash.icf
 create mode 100644 hw/bsp/stm32h5/linker/stm32h523xx_flash.icf
 create mode 100644 hw/bsp/stm32h5/linker/stm32h562xx_flash.icf
 create mode 100644 hw/bsp/stm32h5/linker/stm32h563xx_flash.icf
 create mode 100644 hw/bsp/stm32h5/linker/stm32h573xx_flash.icf

(limited to 'hw')

diff --git a/hw/bsp/stm32h5/family.cmake b/hw/bsp/stm32h5/family.cmake
index 62839af43..a8780d165 100644
--- a/hw/bsp/stm32h5/family.cmake
+++ b/hw/bsp/stm32h5/family.cmake
@@ -27,7 +27,7 @@ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 set(STARTUP_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT_UPPER}_FLASH.ld)
 set(LD_FILE_Clang ${LD_FILE_GNU})
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_flash.icf)
 
 #------------------------------------
 # BOARD_TARGET
diff --git a/hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld
index abf618233..169ac81b7 100644
--- a/hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H503xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 
 /* Sections */
diff --git a/hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld
index b799892c6..633fc280e 100644
--- a/hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H523xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Sections */
 SECTIONS
diff --git a/hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld
index dece7a003..4d010cf9e 100644
--- a/hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H533xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Sections */
 SECTIONS
diff --git a/hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld
index aee2774a4..aeb799d63 100644
--- a/hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H562xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Sections */
 SECTIONS
diff --git a/hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld
index 129ed5170..2e8d38319 100644
--- a/hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H563xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Sections */
 SECTIONS
diff --git a/hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld b/hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld
index eb98f3163..dd00557c0 100644
--- a/hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld
+++ b/hw/bsp/stm32h5/linker/STM32H573xx_FLASH.ld
@@ -46,7 +46,7 @@ MEMORY
 _estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
 
 _Min_Heap_Size = 0x200; /* required amount of heap */
-_Min_Stack_Size = 0x400; /* required amount of stack */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
 
 /* Sections */
 SECTIONS
diff --git a/hw/bsp/stm32h5/linker/stm32h503xx_flash.icf b/hw/bsp/stm32h5/linker/stm32h503xx_flash.icf
new file mode 100644
index 000000000..c5b783b1a
--- /dev/null
+++ b/hw/bsp/stm32h5/linker/stm32h503xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0801FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32h5/linker/stm32h523xx_flash.icf b/hw/bsp/stm32h5/linker/stm32h523xx_flash.icf
new file mode 100644
index 000000000..dc97788ae
--- /dev/null
+++ b/hw/bsp/stm32h5/linker/stm32h523xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x0807FFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x20043FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32h5/linker/stm32h562xx_flash.icf b/hw/bsp/stm32h5/linker/stm32h562xx_flash.icf
new file mode 100644
index 000000000..b399851a3
--- /dev/null
+++ b/hw/bsp/stm32h5/linker/stm32h562xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x081FFFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x2009FFFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32h5/linker/stm32h563xx_flash.icf b/hw/bsp/stm32h5/linker/stm32h563xx_flash.icf
new file mode 100644
index 000000000..b399851a3
--- /dev/null
+++ b/hw/bsp/stm32h5/linker/stm32h563xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x081FFFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x2009FFFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32h5/linker/stm32h573xx_flash.icf b/hw/bsp/stm32h5/linker/stm32h573xx_flash.icf
new file mode 100644
index 000000000..b399851a3
--- /dev/null
+++ b/hw/bsp/stm32h5/linker/stm32h573xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__     = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__       = 0x081FFFFF;
+define symbol __ICFEDIT_region_RAM_start__     = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__       = 0x2009FFFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x1000;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
-- 
cgit v1.3.1


From f3ac009adbd3cb6fd7a1e993d92b533d2dfa3c18 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 27 Nov 2025 22:45:31 +0100
Subject: fix build

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/midi_rx/only.txt                    | 1 +
 hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake | 3 +++
 hw/bsp/stm32h5/boards/stm32h503nucleo/board.h     | 5 +++++
 hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk    | 1 +
 hw/bsp/stm32h5/boards/stm32h563nucleo/board.h     | 5 +++++
 tools/get_deps.py                                 | 2 +-
 6 files changed, 16 insertions(+), 1 deletion(-)

(limited to 'hw')

diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 022be899d..09d725860 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -16,6 +16,7 @@ mcu:MSP432E4
 mcu:RP2040
 mcu:RX65X
 mcu:RAXXX
+mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32H5
diff --git a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
index 1a44c3f1d..5978758fc 100644
--- a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
+++ b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.cmake
@@ -6,4 +6,7 @@ function(update_board TARGET)
     STM32H503xx
     HSE_VALUE=24000000
     )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
 endfunction()
diff --git a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
index b57fab10e..9dd2b0466 100644
--- a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.h
@@ -133,6 +133,11 @@ static inline void board_init2(void) {
   // Empty for this board
 }
 
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
index 0292353ae..497dd894e 100644
--- a/hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
+++ b/hw/bsp/stm32h5/boards/stm32h503nucleo/board.mk
@@ -3,6 +3,7 @@ MCU_VARIANT = stm32h503xx
 CFLAGS += \
 	-DSTM32H503xx \
 	-DHSE_VALUE=24000000 \
+	-DCFG_EXAMPLE_VIDEO_READONLY \
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h503rb
diff --git a/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h b/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
index 0af2f8c4f..20c91f606 100644
--- a/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h563nucleo/board.h
@@ -141,6 +141,11 @@ static inline void board_init2(void) {
   // Empty for this board
 }
 
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 35f3b3e92..e915bf108 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -141,7 +141,7 @@ deps_optional = {
                                      'stm32h7'],
     'hw/mcu/st/stm32-tcpp0203': ['https://github.com/STMicroelectronics/stm32-tcpp0203.git',
                                  '9918655bff176ac3046ccf378b5c7bbbc6a38d15',
-                                 'stm32h7rs stm32n6'],
+                                 'stm32h5 stm32h7rs stm32n6'],
     'hw/mcu/st/stm32c0xx_hal_driver': ['https://github.com/STMicroelectronics/stm32c0xx_hal_driver.git',
                                        'c283b143bef6bdaacf64240ee6f15eb61dad6125',
                                        'stm32c0'],
-- 
cgit v1.3.1


From 7d012b014eb27de9a5f34da543c707109c653045 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 28 Nov 2025 12:55:56 +0700
Subject: fix build with zephyr with latest nrfx v4

---
 examples/device/cdc_msc/prj.conf      |  1 -
 examples/device/msc_dual_lun/prj.conf |  1 -
 hw/bsp/nrf/family.c                   |  9 +++++++
 hw/bsp/nrf/family.cmake               |  4 ++-
 src/portable/nordic/nrf5x/dcd_nrf5x.c | 47 ++++++++++++++++++++---------------
 5 files changed, 39 insertions(+), 23 deletions(-)

(limited to 'hw')

diff --git a/examples/device/cdc_msc/prj.conf b/examples/device/cdc_msc/prj.conf
index 2f5139d9d..9e86a118d 100644
--- a/examples/device/cdc_msc/prj.conf
+++ b/examples/device/cdc_msc/prj.conf
@@ -3,4 +3,3 @@ CONFIG_FPU=y
 CONFIG_NO_OPTIMIZATIONS=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_NRFX_POWER=y
-CONFIG_NRFX_UARTE0=y
diff --git a/examples/device/msc_dual_lun/prj.conf b/examples/device/msc_dual_lun/prj.conf
index 2f5139d9d..9e86a118d 100644
--- a/examples/device/msc_dual_lun/prj.conf
+++ b/examples/device/msc_dual_lun/prj.conf
@@ -3,4 +3,3 @@ CONFIG_FPU=y
 CONFIG_NO_OPTIMIZATIONS=y
 CONFIG_UART_INTERRUPT_DRIVEN=y
 CONFIG_NRFX_POWER=y
-CONFIG_NRFX_UARTE0=y
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 25062b18f..ee3ac61e2 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -100,7 +100,9 @@ static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(120);
 #define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
 #endif
 
+#if CFG_TUSB_OS != OPT_OS_ZEPHYR
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
+#endif
 
 void USBD_IRQHandler(void) {
   tud_int_handler(0);
@@ -163,6 +165,7 @@ void board_init(void) {
   irq_enable(DT_INST_IRQN(0));
 #endif
 
+#if CFG_TUSB_OS != OPT_OS_ZEPHYR
   // UART
   nrfx_uarte_config_t uart_cfg = {
       .txd_pin   = UART_TX_PIN,
@@ -179,6 +182,7 @@ void board_init(void) {
   };
 
   nrfx_uarte_init(&_uart_id, &uart_cfg, NULL);
+#endif
 
   //------------- USB -------------//
 #if CFG_TUD_ENABLED
@@ -276,8 +280,13 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
+#if CFG_TUSB_OS == OPT_OS_ZEPHYR
+  (void) buf;
+  return len;
+#else
   nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len ,0);
   return (NRFX_SUCCESS == err) ? len : 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 4e999b636..3a6e7cc8b 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -127,7 +127,9 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
-  if (NOT RTOS STREQUAL zephyr)
+  if (RTOS STREQUAL zephyr)
+    target_include_directories(${TARGET} PUBLIC ${ZEPHYR_HAL_NORDIC_MODULE_DIR}/nrfx/bsp/stable/mdk)
+  else ()
     target_sources(${TARGET} PRIVATE ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}})
 
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 82b6db5fd..8a41c4790 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -59,21 +59,26 @@
 /* Try to detect nrfx version if not configured with CFG_TUD_NRF_NRFX_VERSION
  * nrfx v1 and v2 are concurrently developed. There is no NRFX_VERSION only MDK VERSION which is as follows:
  * - v3.0.0: 8.53.1 (conflict with v2.11.0), v3.1.0: 8.55.0 ...
- * - v2.11.0: 8.53.1, v2.6.0: 8.44.1, v2.5.0: 8.40.2, v2.4.0: 8.37.0, v2.3.0: 8.35.0, v2.2.0: 8.32.1, v2.1.0: 8.30.2, v2.0.0: 8.29.0
+ * - v2.11.0: 8.53.1, v2.6.0: 8.44.1, v2.5.0: 8.40.2, v2.4.0: 8.37.0, v2.3.0: 8.35.0, v2.2.0: 8.32.1, v2.1.0: 8.30.2,
+ * v2.0.0: 8.29.0
  * - v1.9.0: 8.40.3, v1.8.6: 8.35.0 (conflict with v2.3.0), v1.8.5: 8.32.3, v1.8.4: 8.32.1 (conflict with v2.2.0),
  *   v1.8.2: 8.32.1 (conflict with v2.2.0), v1.8.1: 8.27.1
  * Therefore the check for v1 would be:
  * - MDK < 8.29.0 (v2.0), MDK == 8.32.3, 8.40.3
  * - in case of conflict User of those version must upgrade to other 1.x version or set CFG_TUD_NRF_NRFX_VERSION
-*/
+ */
 #ifndef CFG_TUD_NRF_NRFX_VERSION
-  #define _MDK_VERSION  (10000*MDK_MAJOR_VERSION + 100*MDK_MINOR_VERSION + MDK_MICRO_VERSION)
+  #define MDK_VERSION (10000 * MDK_MAJOR_VERSION + 100 * MDK_MINOR_VERSION + MDK_MICRO_VERSION)
 
-  #if _MDK_VERSION < 82900 || _MDK_VERSION == 83203 || _MDK_VERSION == 84003
+  #if MDK_VERSION < 82900 || MDK_VERSION == 83203 || MDK_VERSION == 84003
     // nrfx <= 1.8.1, or 1.8.5 or 1.9.0
     #define CFG_TUD_NRF_NRFX_VERSION 1
-  #else
+  #elif MDK_VERSION < 85301
     #define CFG_TUD_NRF_NRFX_VERSION 2
+  #elif MDK_VERSION < 87300
+    #define CFG_TUD_NRF_NRFX_VERSION 3
+  #else
+    #define CFG_TUD_NRF_NRFX_VERSION 4
   #endif
 #endif
 
@@ -845,19 +850,19 @@ TU_ATTR_ALWAYS_INLINE static inline bool is_sd_enabled(void) {
 #endif
 
 static bool hfclk_running(void) {
-#ifdef SOFTDEVICE_PRESENT
-  if ( is_sd_enabled() ) {
+  #ifdef SOFTDEVICE_PRESENT
+  if (is_sd_enabled()) {
     uint32_t is_running = 0;
-    (void) sd_clock_hfclk_is_running(&is_running);
+    (void)sd_clock_hfclk_is_running(&is_running);
     return (is_running ? true : false);
   }
-#endif
+  #endif
 
-#if CFG_TUD_NRF_NRFX_VERSION == 1
+  #if CFG_TUD_NRF_NRFX_VERSION == 1
   return nrf_clock_hf_is_running(NRF_CLOCK_HFCLK_HIGH_ACCURACY);
-#else
-  return nrf_clock_hf_is_running(NRF_CLOCK, NRF_CLOCK_HFCLK_HIGH_ACCURACY);
-#endif
+  #else
+  return nrf_clock_is_running(NRF_CLOCK, NRF_CLOCK_DOMAIN_HFCLK, NULL);
+  #endif
 }
 
 static void hfclk_enable(void) {
@@ -867,22 +872,24 @@ static void hfclk_enable(void) {
 #else
 
   // already running, nothing to do
-  if (hfclk_running()) return;
+  if (hfclk_running()) {
+    return;
+  }
 
-#ifdef SOFTDEVICE_PRESENT
-  if ( is_sd_enabled() ) {
+  #ifdef SOFTDEVICE_PRESENT
+  if (is_sd_enabled()) {
     (void)sd_clock_hfclk_request();
     return;
   }
-#endif
+  #endif
 
-#if CFG_TUD_NRF_NRFX_VERSION == 1
+  #if CFG_TUD_NRF_NRFX_VERSION == 1
   nrf_clock_event_clear(NRF_CLOCK_EVENT_HFCLKSTARTED);
   nrf_clock_task_trigger(NRF_CLOCK_TASK_HFCLKSTART);
-#else
+  #else
   nrf_clock_event_clear(NRF_CLOCK, NRF_CLOCK_EVENT_HFCLKSTARTED);
   nrf_clock_task_trigger(NRF_CLOCK, NRF_CLOCK_TASK_HFCLKSTART);
-#endif
+  #endif
 #endif
 }
 
-- 
cgit v1.3.1


From ae4e3c032826b4890dde14f01e7f568ae02322f0 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 28 Nov 2025 13:18:38 +0100
Subject: Fix button

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h5/boards/stm32h573i_dk/board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
index e95308b67..5788837ab 100644
--- a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
@@ -60,7 +60,7 @@ static board_pindef_t board_pindef[] = {
   },
   { // Button
     .port = GPIOC,
-    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
+    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
     .active_state = 1
   },
   { // UART TX
-- 
cgit v1.3.1


From df6f13600324b42710ae71d5320a9f2eae8303a5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 1 Dec 2025 14:39:45 +0700
Subject: add linkermap to deps and linkermap taget

---
 .gitignore                                          |  1 +
 .idea/cmake.xml                                     |  1 +
 examples/build_system/cmake/toolchain/arm_iar.cmake |  3 ++-
 hw/bsp/family_support.cmake                         | 15 +++++++++++++++
 src/portable/synopsys/dwc2/dwc2_info.py             |  1 -
 test/hil/hil_test.py                                |  2 +-
 tools/get_deps.py                                   |  3 +++
 7 files changed, 23 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/.gitignore b/.gitignore
index 977911dff..93d13503f 100644
--- a/.gitignore
+++ b/.gitignore
@@ -42,6 +42,7 @@ cov-int
 *-build-dir
 /_bin/
 __pycache__
+cmake-build/
 cmake-build-*
 sdkconfig
 .PVS-Studio
diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 677aaa662..0754253ad 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -124,6 +124,7 @@
       <configuration PROFILE_NAME="stm32h743eval" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="stm32h743eval-DMA" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1 -DCFLAGS_CLI=&quot;-DCFG_TUD_DWC2_DMA_ENABLE=1&quot;" />
       <configuration PROFILE_NAME="stm32h743eval_host1" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DRHPORT_HOST=1 -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="stm32h743eval IAR" ENABLED="false" CONFIG_NAME="Debug" TOOLCHAIN_NAME="iccarm" GENERATION_OPTIONS="-DBOARD=stm32h743eval -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1 -DIAR_CSTAT=1" />
       <configuration PROFILE_NAME="stm32h743nucleo" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32h743nucleo -DLOG=1" />
       <configuration PROFILE_NAME="stm32l0538disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l0538disco -DLOG=0 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="stm32l476disco" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=stm32l476disco -DLOG=1 -DLOGGER=RTT" />
diff --git a/examples/build_system/cmake/toolchain/arm_iar.cmake b/examples/build_system/cmake/toolchain/arm_iar.cmake
index 0b7e0b585..67d100bbc 100644
--- a/examples/build_system/cmake/toolchain/arm_iar.cmake
+++ b/examples/build_system/cmake/toolchain/arm_iar.cmake
@@ -24,7 +24,8 @@ set(CMAKE_C_ICSTAT ${CMAKE_IAR_CSTAT}
   --checks=${CMAKE_CURRENT_LIST_DIR}/cstat_sel_checks.txt
   --db=${CMAKE_BINARY_DIR}/cstat.db
   --sarif_dir=${CMAKE_BINARY_DIR}/cstat_sarif
-  --exclude ${TOP}/hw/mcu --exclude ${TOP}/lib
+  --exclude=${TOP}/hw/mcu
+  --exclude=${TOP}/lib
   )
 endif ()
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 2b9612186..5afec32c2 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -9,6 +9,7 @@ set(TOP "${CMAKE_CURRENT_LIST_DIR}/../..")
 get_filename_component(TOP ${TOP} ABSOLUTE)
 
 set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
+set(LINKERMAP_PY ${TOP}/tools/linkermap/linkermap.py)
 
 function(family_resolve_board BOARD_NAME BOARD_PATH_OUT)
   if ("${BOARD_NAME}" STREQUAL "")
@@ -223,6 +224,18 @@ function(family_initialize_project PROJECT DIR)
   endif()
 endfunction()
 
+# Add linkermap target (https://github.com/hathach/linkermap)
+function(family_add_linkermap TARGET)
+  set(LINKERMAP_OPTION "")
+  if (ARGC GREATER 1)
+    set(LINKERMAP_OPTION "${ARGV1}")
+  endif ()
+  add_custom_target(${TARGET}-linkermap
+    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION} $<TARGET_FILE:${TARGET}>.map
+    VERBATIM
+    )
+endfunction()
+
 #-------------------------------------------------------------
 # Common Target Configure
 # Most families use these settings except rp2040 and espressif
@@ -332,6 +345,8 @@ function(family_configure_common TARGET RTOS)
     endif ()
   endif ()
 
+  family_add_linkermap(${TARGET})
+
   # run size after build
 #  find_program(SIZE_EXE ${CMAKE_SIZE})
 #  if(NOT ${SIZE_EXE} STREQUAL SIZE_EXE-NOTFOUND)
diff --git a/src/portable/synopsys/dwc2/dwc2_info.py b/src/portable/synopsys/dwc2/dwc2_info.py
index f6bd2785a..8fbbc00a0 100755
--- a/src/portable/synopsys/dwc2/dwc2_info.py
+++ b/src/portable/synopsys/dwc2/dwc2_info.py
@@ -2,7 +2,6 @@
 
 import ctypes
 import argparse
-import click
 import pandas as pd
 
 # hex value for register: guid, gsnpsid, ghwcfg1, ghwcfg2, ghwcfg3, ghwcfg4
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index ba0826bd3..b2e883119 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -662,7 +662,7 @@ def test_example(board, f1, example):
         print(f'Flashing {fw_name}.elf')
 
     # flash firmware. It may fail randomly, retry a few times
-    max_rety = 1
+    max_rety = 3
     start_s = time.time()
     for i in range(max_rety):
         ret = globals()[f'flash_{board["flasher"]["name"].lower()}'](board, fw_name)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index d749e4c84..c60766e50 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -14,6 +14,9 @@ deps_mandatory = {
     'lib/lwip': ['https://github.com/lwip-tcpip/lwip.git',
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
+    'tools/linkermap': ['https://github.com/hathach/linkermap.git',
+                        'e1a7a990fcd6eb1dbae13c2eb9fb0ca9db7ac483',
+                        'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
                   'all'],
-- 
cgit v1.3.1


From a337a6d337c0cdd50981ba2040aee99966ae3152 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 1 Dec 2025 17:31:43 +0700
Subject: run linkermap as post build for size analyze

---
 .circleci/config2.yml       |  4 +++-
 hw/bsp/family_support.cmake | 19 ++++++++++++---
 hw/bsp/rp2040/family.cmake  |  7 ++++++
 tools/build.py              | 58 ++++++++++++++++++++++++---------------------
 tools/get_deps.py           |  2 +-
 5 files changed, 58 insertions(+), 32 deletions(-)

(limited to 'hw')

diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index ab0fd7ba1..869597289 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -119,7 +119,9 @@ commands:
                 TOOLCHAIN_OPTION="--toolchain gcc"
               fi
 
-              python tools/build.py -s << parameters.build-system >> $TOOLCHAIN_OPTION << parameters.family >>
+              # circleci docker return $nproc as 36 core, limit parallel to 4 (resource-class = large)
+              # Required for IAR, also prevent crashed/killed by docker
+              python tools/build.py -s << parameters.build-system >> $TOOLCHAIN_OPTION -j 4 << parameters.family >>
             fi
 
 jobs:
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 5afec32c2..1f91d0910 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -226,14 +226,26 @@ endfunction()
 
 # Add linkermap target (https://github.com/hathach/linkermap)
 function(family_add_linkermap TARGET)
-  set(LINKERMAP_OPTION "")
+  set(LINKERMAP_OPTION_LIST)
+  if (DEFINED LINKERMAP_OPTION)
+    separate_arguments(LINKERMAP_OPTION_LIST UNIX_COMMAND ${LINKERMAP_OPTION})
+  endif ()
+
   if (ARGC GREATER 1)
-    set(LINKERMAP_OPTION "${ARGV1}")
+    separate_arguments(ARG_OPTION_LIST UNIX_COMMAND ${ARGV1})
+    list(APPEND LINKERMAP_OPTION_LIST ${ARG_OPTION_LIST})
   endif ()
+
+  # target
   add_custom_target(${TARGET}-linkermap
-    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION} $<TARGET_FILE:${TARGET}>.map
+    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM
     )
+
+  # post build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    VERBATIM)
 endfunction()
 
 #-------------------------------------------------------------
@@ -345,6 +357,7 @@ function(family_configure_common TARGET RTOS)
     endif ()
   endif ()
 
+  # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
   family_add_linkermap(${TARGET})
 
   # run size after build
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 5d6d8b40e..390d6072c 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -222,6 +222,8 @@ function(family_add_default_example_warnings TARGET)
   endif()
 endfunction()
 
+
+# TODO merge with family_configure_common from family_support.cmake
 function(family_configure_target TARGET RTOS)
 	if (RTOS STREQUAL noos OR RTOS STREQUAL "")
 		set(RTOS_SUFFIX "")
@@ -239,10 +241,15 @@ function(family_configure_target TARGET RTOS)
 
 	pico_add_extra_outputs(${TARGET})
 	pico_enable_stdio_uart(${TARGET} 1)
+
+  target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_board${RTOS_SUFFIX} tinyusb_additions)
 
   family_flash_openocd(${TARGET})
 	family_flash_jlink(${TARGET})
+
+  # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
+  family_add_linkermap(${TARGET})
 endfunction()
 
 
diff --git a/tools/build.py b/tools/build.py
index ce4d0ef1a..5328a987f 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -5,6 +5,7 @@ import os
 import sys
 import time
 import subprocess
+import shlex
 from pathlib import Path
 from multiprocessing import Pool
 
@@ -29,9 +30,12 @@ parallel_jobs = os.cpu_count()
 # Helper
 # -----------------------------
 def run_cmd(cmd):
-    #print(cmd)
-    r = subprocess.run(cmd, shell=True, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
-    title = f'Command Error: {cmd}'
+    if isinstance(cmd, str):
+        raise TypeError("run_cmd expects a list/tuple of args, not a string")
+    args = cmd
+    cmd_display = " ".join(args)
+    r = subprocess.run(args, stdout=subprocess.PIPE, stderr=subprocess.STDOUT)
+    title = f'Command Error: {cmd_display}'
     if r.returncode != 0:
         # print build output if failed
         if os.getenv('GITHUB_ACTIONS'):
@@ -42,7 +46,7 @@ def run_cmd(cmd):
             print(title)
             print(r.stdout.decode("utf-8"))
     elif verbose:
-        print(cmd)
+        print(cmd_display)
         print(r.stdout.decode("utf-8"))
     return r
 
@@ -87,10 +91,10 @@ def cmake_board(board, build_args, build_flags_on):
     start_time = time.monotonic()
 
     build_dir = f'cmake-build/cmake-build-{board}'
-    build_flags = ''
+    build_flags = []
     if len(build_flags_on) > 0:
-        build_flags =  ' '.join(f'-D{flag}=1' for flag in build_flags_on)
-        build_flags = f'-DCFLAGS_CLI="{build_flags}"'
+        cli_flags = ' '.join(f'-D{flag}=1' for flag in build_flags_on)
+        build_flags.append(f'-DCFLAGS_CLI={cli_flags}')
         build_dir += '-f1_' + '_'.join(build_flags_on)
 
     family = find_family(board)
@@ -101,25 +105,22 @@ def cmake_board(board, build_args, build_flags_on):
             if build_utils.skip_example(example, board):
                 ret[2] += 1
             else:
-                rcmd = run_cmd(f'idf.py -C examples/{example} -B {build_dir}/{example} -G Ninja '
-                               f'-DBOARD={board} {build_flags} build')
+                rcmd = run_cmd([
+                    'idf.py', '-C', f'examples/{example}', '-B', f'{build_dir}/{example}', '-GNinja',
+                    f'-DBOARD={board}', *build_flags, 'build'
+                ])
                 ret[0 if rcmd.returncode == 0 else 1] += 1
     else:
-        rcmd = run_cmd(f'cmake examples -B {build_dir} -G Ninja -DBOARD={board} -DCMAKE_BUILD_TYPE=MinSizeRel '
-                       f'{build_args} {build_flags}')
+        rcmd = run_cmd([
+            'cmake', 'examples', '-B', build_dir, '-GNinja',
+            f'-DBOARD={board}', '-DCMAKE_BUILD_TYPE=MinSizeRel',
+            '-DLINKERMAP_OPTION=-q -f tinyusb/src', *build_args, *build_flags
+        ])
         if rcmd.returncode == 0:
-            cmd = f"cmake --build {build_dir}"
-            njobs = parallel_jobs
-
-            # circleci docker return $nproc as 36 core, limit parallel according to resource class.
-            # Required for IAR, also prevent crashed/killed by docker
-            if os.getenv('CIRCLECI'):
-                resource_class = { 'small': 1, 'medium': 2, 'medium+': 3, 'large': 4 }
-                for rc in resource_class:
-                    if rc in os.getenv('CIRCLE_JOB'):
-                        njobs = resource_class[rc]
-                        break
-            cmd += f' --parallel {njobs}'
+            cmd = [
+                "cmake", "--build", build_dir,
+                '--parallel', str(parallel_jobs)
+            ]
             rcmd = run_cmd(cmd)
         ret[0 if rcmd.returncode == 0 else 1] += 1
 
@@ -141,9 +142,12 @@ def make_one_example(example, board, make_option):
         # skip -j for circleci
         if not os.getenv('CIRCLECI'):
             make_option += ' -j'
-        make_cmd = f"make -C examples/{example} BOARD={board} {make_option}"
-        # run_cmd(f"{make_cmd} clean")
-        build_result = run_cmd(f"{make_cmd} all")
+        make_args = ["make", "-C", f"examples/{example}", f"BOARD={board}"]
+        if make_option:
+            make_args += shlex.split(make_option)
+        make_args.append("all")
+        # run_cmd(make_args + ["clean"])
+        build_result = run_cmd(make_args)
         r = 0 if build_result.returncode == 0 else 1
         print_build_result(board, example, r, time.monotonic() - start_time)
 
@@ -180,7 +184,7 @@ def build_boards_list(boards, build_defines, build_system, build_flags_on):
     for b in boards:
         r = [0, 0, 0]
         if build_system == 'cmake':
-            build_args = ' '.join(f'-D{d}' for d in build_defines)
+            build_args = [f'-D{d}' for d in build_defines]
             r = cmake_board(b, build_args, build_flags_on)
         elif build_system == 'make':
             build_args = ' '.join(f'{d}' for d in build_defines)
diff --git a/tools/get_deps.py b/tools/get_deps.py
index c60766e50..47cc5c7dd 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        'e1a7a990fcd6eb1dbae13c2eb9fb0ca9db7ac483',
+                        '1f47651142646398c7746e109ae0481732aeb564',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
-- 
cgit v1.3.1


From c859744784cc396ae0993a16a1935b10fbd9b797 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 2 Dec 2025 12:50:31 +0700
Subject: adding metrics for computing average compiled size

---
 examples/device/CMakeLists.txt |  63 ++++++++++---------
 examples/dual/CMakeLists.txt   |  10 ++-
 examples/host/CMakeLists.txt   |  20 +++---
 hw/bsp/family_support.cmake    |   6 --
 tools/build.py                 |   4 +-
 tools/get_deps.py              |   2 +-
 tools/metrics.py               | 134 +++++++++++++++++++++++++++++++++++++++++
 7 files changed, 193 insertions(+), 46 deletions(-)
 create mode 100644 tools/metrics.py

(limited to 'hw')

diff --git a/examples/device/CMakeLists.txt b/examples/device/CMakeLists.txt
index eb625ea51..660df67cb 100644
--- a/examples/device/CMakeLists.txt
+++ b/examples/device/CMakeLists.txt
@@ -6,31 +6,38 @@ project(tinyusb_device_examples C CXX ASM)
 family_initialize_project(tinyusb_device_examples ${CMAKE_CURRENT_LIST_DIR})
 
 # family_add_subdirectory will filter what to actually add based on selected FAMILY
-family_add_subdirectory(audio_4_channel_mic)
-family_add_subdirectory(audio_test)
-family_add_subdirectory(audio_4_channel_mic_freertos)
-family_add_subdirectory(audio_test_freertos)
-family_add_subdirectory(audio_test_multi_rate)
-family_add_subdirectory(board_test)
-family_add_subdirectory(cdc_dual_ports)
-family_add_subdirectory(cdc_msc)
-family_add_subdirectory(cdc_msc_freertos)
-family_add_subdirectory(cdc_uac2)
-family_add_subdirectory(dfu)
-family_add_subdirectory(dfu_runtime)
-family_add_subdirectory(dynamic_configuration)
-family_add_subdirectory(hid_boot_interface)
-family_add_subdirectory(hid_composite)
-family_add_subdirectory(hid_composite_freertos)
-family_add_subdirectory(hid_generic_inout)
-family_add_subdirectory(hid_multiple_interface)
-family_add_subdirectory(midi_test)
-family_add_subdirectory(msc_dual_lun)
-family_add_subdirectory(mtp)
-family_add_subdirectory(net_lwip_webserver)
-family_add_subdirectory(uac2_headset)
-family_add_subdirectory(uac2_speaker_fb)
-family_add_subdirectory(usbtmc)
-family_add_subdirectory(video_capture)
-family_add_subdirectory(video_capture_2ch)
-family_add_subdirectory(webusb_serial)
+set(EXAMPLE_LIST
+  audio_4_channel_mic
+  audio_4_channel_mic_freertos
+  audio_test
+  audio_test_freertos
+  audio_test_multi_rate
+  board_test
+  cdc_dual_ports
+  cdc_msc
+  cdc_msc_freertos
+  cdc_uac2
+  dfu
+  dfu_runtime
+  dynamic_configuration
+  hid_boot_interface
+  hid_composite
+  hid_composite_freertos
+  hid_generic_inout
+  hid_multiple_interface
+  midi_test
+  midi_test_freertos
+  msc_dual_lun
+  mtp
+  net_lwip_webserver
+  uac2_headset
+  uac2_speaker_fb
+  usbtmc
+  video_capture
+  video_capture_2ch
+  webusb_serial
+  )
+
+foreach (example ${EXAMPLE_LIST})
+  family_add_subdirectory(${example})
+endforeach ()
diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt
index c5e3ffce4..4978f1fab 100644
--- a/examples/dual/CMakeLists.txt
+++ b/examples/dual/CMakeLists.txt
@@ -9,6 +9,12 @@ if (FAMILY STREQUAL "rp2040" AND NOT TARGET tinyusb_pico_pio_usb)
   message("Skipping dual host/device mode examples as Pico-PIO-USB is not available")
 else ()
   # family_add_subdirectory will filter what to actually add based on selected FAMILY
-  family_add_subdirectory(host_hid_to_device_cdc)
-  family_add_subdirectory(host_info_to_device_cdc)
+  set(EXAMPLE_LIST
+    host_hid_to_device_cdc
+    host_info_to_device_cdc
+    )
+
+  foreach (example ${EXAMPLE_LIST})
+    family_add_subdirectory(${example})
+  endforeach ()
 endif ()
diff --git a/examples/host/CMakeLists.txt b/examples/host/CMakeLists.txt
index 2783dd84e..f8e0ce692 100644
--- a/examples/host/CMakeLists.txt
+++ b/examples/host/CMakeLists.txt
@@ -6,10 +6,16 @@ project(tinyusb_host_examples C CXX ASM)
 family_initialize_project(tinyusb_host_examples ${CMAKE_CURRENT_LIST_DIR})
 
 # family_add_subdirectory will filter what to actually add based on selected FAMILY
-family_add_subdirectory(bare_api)
-family_add_subdirectory(cdc_msc_hid)
-family_add_subdirectory(cdc_msc_hid_freertos)
-family_add_subdirectory(device_info)
-family_add_subdirectory(hid_controller)
-family_add_subdirectory(midi_rx)
-family_add_subdirectory(msc_file_explorer)
+set(EXAMPLE_LIST
+  bare_api
+  cdc_msc_hid
+  cdc_msc_hid_freertos
+  device_info
+  hid_controller
+  midi_rx
+  msc_file_explorer
+  )
+
+foreach (example ${EXAMPLE_LIST})
+  family_add_subdirectory(${example})
+endforeach ()
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 1f91d0910..e7dfc19c8 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -231,12 +231,6 @@ function(family_add_linkermap TARGET)
     separate_arguments(LINKERMAP_OPTION_LIST UNIX_COMMAND ${LINKERMAP_OPTION})
   endif ()
 
-  if (ARGC GREATER 1)
-    separate_arguments(ARG_OPTION_LIST UNIX_COMMAND ${ARGV1})
-    list(APPEND LINKERMAP_OPTION_LIST ${ARG_OPTION_LIST})
-  endif ()
-
-  # target
   add_custom_target(${TARGET}-linkermap
     COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM
diff --git a/tools/build.py b/tools/build.py
index 5328a987f..692853297 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -113,8 +113,8 @@ def cmake_board(board, build_args, build_flags_on):
     else:
         rcmd = run_cmd([
             'cmake', 'examples', '-B', build_dir, '-GNinja',
-            f'-DBOARD={board}', '-DCMAKE_BUILD_TYPE=MinSizeRel',
-            '-DLINKERMAP_OPTION=-q -f tinyusb/src', *build_args, *build_flags
+            f'-DBOARD={board}', '-DCMAKE_BUILD_TYPE=MinSizeRel', '-DLINKERMAP_OPTION=-q -f tinyusb/src',
+            *build_args, *build_flags
         ])
         if rcmd.returncode == 0:
             cmd = [
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 47cc5c7dd..5fb7e022c 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        '1f47651142646398c7746e109ae0481732aeb564',
+                        'ac1228d5bbde1e54cb2e17e928662094ae19c51d',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
diff --git a/tools/metrics.py b/tools/metrics.py
new file mode 100644
index 000000000..d972d3681
--- /dev/null
+++ b/tools/metrics.py
@@ -0,0 +1,134 @@
+#!/usr/bin/env python3
+"""Calculate average size from multiple linker map files."""
+
+import argparse
+import sys
+import os
+
+# Add linkermap module to path
+sys.path.insert(0, os.path.join(os.path.dirname(__file__), 'linkermap'))
+import linkermap
+
+
+def combine_maps(map_files, filters=None):
+    """Combine multiple map files into a list of json_data.
+
+    Args:
+        map_files: List of paths to linker map files or JSON files
+        filters: List of path substrings to filter object files (default: [])
+
+    Returns:
+        all_json_data: Dictionary with mapfiles list and data from each map file
+    """
+    import json
+
+    filters = filters or []
+    all_json_data = {"mapfiles": [], "data": []}
+
+    for map_file in map_files:
+        if not os.path.exists(map_file):
+            print(f"Warning: {map_file} not found, skipping", file=sys.stderr)
+            continue
+
+        try:
+            if map_file.endswith('.json'):
+                with open(map_file, 'r', encoding='utf-8') as f:
+                    json_data = json.load(f)
+                # Apply path filters to JSON data
+                if filters:
+                    filtered_files = [
+                        f for f in json_data["files"]
+                        if f.get("path") and any(filt in f["path"] for filt in filters)
+                    ]
+                    json_data["files"] = filtered_files
+            else:
+                json_data = linkermap.analyze_map(map_file, filters=filters)
+            all_json_data["mapfiles"].append(map_file)
+            all_json_data["data"].append(json_data)
+        except Exception as e:
+            print(f"Warning: Failed to analyze {map_file}: {e}", file=sys.stderr)
+            continue
+
+    return all_json_data
+
+
+def compute_avg(all_json_data):
+    """Compute average sizes from combined json_data.
+
+    Args:
+        all_json_data: Dictionary with mapfiles and data from combine_maps()
+
+    Returns:
+        json_average: Dictionary with averaged size data
+    """
+    if not all_json_data["data"]:
+        return None
+
+    # Collect all sections preserving order
+    all_sections = []
+    for json_data in all_json_data["data"]:
+        for s in json_data["sections"]:
+            if s not in all_sections:
+                all_sections.append(s)
+
+    # Merge files with the same 'file' value and compute averages
+    file_accumulator = {}  # key: file name, value: {"sections": {section: [sizes]}, "totals": [totals]}
+
+    for json_data in all_json_data["data"]:
+        for f in json_data["files"]:
+            fname = f["file"]
+            if fname not in file_accumulator:
+                file_accumulator[fname] = {"sections": {}, "totals": [], "path": f.get("path")}
+            file_accumulator[fname]["totals"].append(f["total"])
+            for section, size in f["sections"].items():
+                if section in file_accumulator[fname]["sections"]:
+                    file_accumulator[fname]["sections"][section].append(size)
+                else:
+                    file_accumulator[fname]["sections"][section] = [size]
+
+    # Build json_average with averaged values
+    files_average = []
+    for fname, data in file_accumulator.items():
+        avg_total = round(sum(data["totals"]) / len(data["totals"]))
+        avg_sections = {}
+        for section, sizes in data["sections"].items():
+            avg_sections[section] = round(sum(sizes) / len(sizes))
+        files_average.append({
+            "file": fname,
+            "path": data["path"],
+            "sections": avg_sections,
+            "total": avg_total
+        })
+
+    json_average = {
+        "mapfiles": all_json_data["mapfiles"],
+        "sections": all_sections,
+        "files": files_average
+    }
+
+    return json_average
+
+
+def main():
+    parser = argparse.ArgumentParser(description='Calculate average size from linker map files')
+    parser.add_argument('files', nargs='+', help='Path to map file(s)')
+    parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
+                        help='Only include object files whose path contains this substring (can be repeated)')
+    parser.add_argument('-o', '--out', dest='out', default='metrics',
+                        help='Output path basename for JSON and Markdown files (default: metrics)')
+    args = parser.parse_args()
+
+    all_json_data = combine_maps(args.files, args.filters)
+    json_average = compute_avg(all_json_data)
+
+    if json_average is None:
+        print("No valid map files found", file=sys.stderr)
+        sys.exit(1)
+
+    linkermap.print_summary(json_average, False)
+    linkermap.write_json(json_average, args.out + '.json')
+    linkermap.write_markdown(json_average, args.out + '.md')
+
+
+if __name__ == '__main__':
+    main()
-- 
cgit v1.3.1


From 09e1113aaf1b2618ffe42e9638d68e6047b6f1ef Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 2 Dec 2025 14:22:52 +0700
Subject: adding metrics for computing average compiled size

---
 examples/CMakeLists.txt     | 25 ++++++++++++++++---
 hw/bsp/family_support.cmake |  4 +--
 tools/build.py              | 61 ++++++++++++++++++++++++---------------------
 tools/get_deps.py           |  2 +-
 tools/metrics.py            | 47 ++++++++++++++++++++++++++++------
 5 files changed, 96 insertions(+), 43 deletions(-)

(limited to 'hw')

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index d34c6ed5d..d9f97d598 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -5,7 +5,24 @@ include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
 
 project(tinyusb_examples C CXX ASM)
 
-add_subdirectory(device)
-add_subdirectory(dual)
-add_subdirectory(host)
-add_subdirectory(typec)
+set(EXAMPLES_LIST
+  device
+  dual
+  host
+  typec
+  )
+set(MAPJSON_PATTERNS "")
+
+foreach (example ${EXAMPLES_LIST})
+  add_subdirectory(${example})
+  list(APPEND MAPJSON_PATTERNS "${CMAKE_BINARY_DIR}/${example}/*/*.map.json")
+endforeach ()
+
+# Post-build: run metrics.py on all map.json files
+add_custom_target(tinyusb_examples_metrics
+  COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../tools/metrics.py
+  -f tinyusb/src -j -o ${CMAKE_BINARY_DIR}/metrics
+  ${MAPJSON_PATTERNS}
+  COMMENT "Generating average code size metrics"
+  VERBATIM
+  )
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index e7dfc19c8..3ede95e3f 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -232,13 +232,13 @@ function(family_add_linkermap TARGET)
   endif ()
 
   add_custom_target(${TARGET}-linkermap
-    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    COMMAND python ${LINKERMAP_PY} -j ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM
     )
 
   # post build
   add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND python ${LINKERMAP_PY} -j -m ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    COMMAND python ${LINKERMAP_PY} -j ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM)
 endfunction()
 
diff --git a/tools/build.py b/tools/build.py
index 692853297..5392a9aa4 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -6,6 +6,8 @@ import sys
 import time
 import subprocess
 import shlex
+import glob
+import metrics
 from pathlib import Path
 from multiprocessing import Pool
 
@@ -111,18 +113,18 @@ def cmake_board(board, build_args, build_flags_on):
                 ])
                 ret[0 if rcmd.returncode == 0 else 1] += 1
     else:
-        rcmd = run_cmd([
-            'cmake', 'examples', '-B', build_dir, '-GNinja',
-            f'-DBOARD={board}', '-DCMAKE_BUILD_TYPE=MinSizeRel', '-DLINKERMAP_OPTION=-q -f tinyusb/src',
-            *build_args, *build_flags
-        ])
+        rcmd = run_cmd(['cmake', 'examples', '-B', build_dir, '-GNinja',
+                        f'-DBOARD={board}', '-DCMAKE_BUILD_TYPE=MinSizeRel', '-DLINKERMAP_OPTION=-q -f tinyusb/src',
+                        *build_args, *build_flags])
         if rcmd.returncode == 0:
-            cmd = [
-                "cmake", "--build", build_dir,
-                '--parallel', str(parallel_jobs)
-            ]
+            cmd = ["cmake", "--build", build_dir, '--parallel', str(parallel_jobs)]
             rcmd = run_cmd(cmd)
-        ret[0 if rcmd.returncode == 0 else 1] += 1
+        if rcmd.returncode == 0:
+            ret[0] += 1
+            rcmd = run_cmd(["cmake", "--build", build_dir, '--target', 'tinyusb_examples_metrics'])
+            # print(rcmd.stdout.decode("utf-8"))
+        else:
+            ret[1] += 1
 
     example = 'all'
     print_build_result(board, example, 0 if ret[1] == 0 else 1, time.monotonic() - start_time)
@@ -195,8 +197,18 @@ def build_boards_list(boards, build_defines, build_system, build_flags_on):
     return ret
 
 
-def build_family(family, build_defines, build_system, build_flags_on, one_per_family, boards):
-    skip_ci = ['pico_sdk']
+def get_family_boards(family, one_per_family, boards):
+    """Get list of boards for a family.
+
+    Args:
+        family: Family name
+        one_per_family: If True, return only one random board
+        boards: List of boards already specified via -b flag
+
+    Returns:
+        List of board names
+    """
+    skip_ci = []
     if os.getenv('GITHUB_ACTIONS') or os.getenv('CIRCLECI'):
         skip_ci_file = Path(f"hw/bsp/{family}/skip_ci.txt")
         if skip_ci_file.exists():
@@ -207,17 +219,15 @@ def build_family(family, build_defines, build_system, build_flags_on, one_per_fa
             all_boards.append(entry.name)
     all_boards.sort()
 
-    ret = [0, 0, 0]
     # If only-one flag is set, select one random board
     if one_per_family:
         for b in boards:
             # skip if -b already specify one in this family
             if find_family(b) == family:
-                return ret
+                return []
         all_boards = [random.choice(all_boards)]
 
-    ret = build_boards_list(all_boards, build_defines, build_system, build_flags_on)
-    return ret
+    return all_boards
 
 
 # -----------------------------
@@ -258,9 +268,8 @@ def main():
     print(build_separator)
     print(build_format.format('Board', 'Example', '\033[39mResult\033[0m', 'Time'))
     total_time = time.monotonic()
-    result = [0, 0, 0]
 
-    # build families
+    # get all families
     all_families = []
     if 'all' in families:
         for entry in os.scandir("hw/bsp"):
@@ -270,23 +279,19 @@ def main():
         all_families = list(families)
     all_families.sort()
 
-    # succeeded, failed, skipped
+    # get boards from families and append to boards list
+    all_boards = list(boards)
     for f in all_families:
-        r = build_family(f, build_defines, build_system, build_flags_on, one_per_family, boards)
-        result[0] += r[0]
-        result[1] += r[1]
-        result[2] += r[2]
+        all_boards.extend(get_family_boards(f, one_per_family, boards))
 
-    # build boards
-    r = build_boards_list(boards, build_defines, build_system, build_flags_on)
-    result[0] += r[0]
-    result[1] += r[1]
-    result[2] += r[2]
+    # build all boards
+    result = build_boards_list(all_boards, build_defines, build_system, build_flags_on)
 
     total_time = time.monotonic() - total_time
     print(build_separator)
     print(f"Build Summary: {result[0]} {STATUS_OK}, {result[1]} {STATUS_FAILED} and took {total_time:.2f}s")
     print(build_separator)
+
     return result[1]
 
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 5fb7e022c..029c33607 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        'ac1228d5bbde1e54cb2e17e928662094ae19c51d',
+                        '75d9d2c9e0f83297ddbc0da899f6cc0ab21076f0',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
diff --git a/tools/metrics.py b/tools/metrics.py
index d972d3681..c6cd49d57 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -2,6 +2,7 @@
 """Calculate average size from multiple linker map files."""
 
 import argparse
+import glob
 import sys
 import os
 
@@ -10,6 +11,24 @@ sys.path.insert(0, os.path.join(os.path.dirname(__file__), 'linkermap'))
 import linkermap
 
 
+def expand_files(file_patterns):
+    """Expand file patterns (globs) to list of files.
+
+    Args:
+        file_patterns: List of file paths or glob patterns
+
+    Returns:
+        List of expanded file paths
+    """
+    expanded = []
+    for pattern in file_patterns:
+        if '*' in pattern or '?' in pattern:
+            expanded.extend(glob.glob(pattern))
+        else:
+            expanded.append(pattern)
+    return expanded
+
+
 def combine_maps(map_files, filters=None):
     """Combine multiple map files into a list of json_data.
 
@@ -109,25 +128,37 @@ def compute_avg(all_json_data):
     return json_average
 
 
-def main():
+def main(argv=None):
     parser = argparse.ArgumentParser(description='Calculate average size from linker map files')
-    parser.add_argument('files', nargs='+', help='Path to map file(s)')
+    parser.add_argument('files', nargs='+', help='Path to map file(s) or glob pattern(s)')
     parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
                         help='Only include object files whose path contains this substring (can be repeated)')
     parser.add_argument('-o', '--out', dest='out', default='metrics',
                         help='Output path basename for JSON and Markdown files (default: metrics)')
-    args = parser.parse_args()
-
-    all_json_data = combine_maps(args.files, args.filters)
+    parser.add_argument('-j', '--json', dest='json_out', action='store_true',
+                        help='Write JSON output file')
+    parser.add_argument('-m', '--markdown', dest='markdown_out', action='store_true',
+                        help='Write Markdown output file')
+    parser.add_argument('-q', '--quiet', dest='quiet', action='store_true',
+                        help='Suppress summary output')
+    args = parser.parse_args(argv)
+
+    # Expand glob patterns
+    map_files = expand_files(args.files)
+
+    all_json_data = combine_maps(map_files, args.filters)
     json_average = compute_avg(all_json_data)
 
     if json_average is None:
         print("No valid map files found", file=sys.stderr)
         sys.exit(1)
 
-    linkermap.print_summary(json_average, False)
-    linkermap.write_json(json_average, args.out + '.json')
-    linkermap.write_markdown(json_average, args.out + '.md')
+    if not args.quiet:
+        linkermap.print_summary(json_average, False)
+    if args.json_out:
+        linkermap.write_json(json_average, args.out + '.json')
+    if args.markdown_out:
+        linkermap.write_markdown(json_average, args.out + '.md')
 
 
 if __name__ == '__main__':
-- 
cgit v1.3.1


From f51ca33f25841147e93c72458c927261806cdc0e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 3 Dec 2025 11:09:41 +0700
Subject: upload metrics.json and aggregate code metrics, post metrics comment
 fine tune ci matrix run

---
 .github/workflows/build.yml        | 416 ++++++++++++++++++++-----------------
 .github/workflows/build_util.yml   |   2 +-
 .github/workflows/ci_set_matrix.py |   6 +-
 examples/CMakeLists.txt            |   4 +-
 hw/bsp/family_support.cmake        |   6 +-
 tools/build.py                     |   2 +-
 tools/get_deps.py                  |   2 +-
 tools/metrics.py                   | 254 ++++++++++++++++++++--
 8 files changed, 472 insertions(+), 220 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 5e996d9d9..b0b636c65 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -83,6 +83,8 @@ jobs:
   code-metrics:
     needs: cmake
     runs-on: ubuntu-latest
+    permissions:
+      pull-requests: write
     steps:
       - name: Checkout TinyUSB
         uses: actions/checkout@v4
@@ -96,197 +98,233 @@ jobs:
 
       - name: Aggregate Code Metrics
         run: |
-          tree cmake-build
           python tools/get_deps.py
-          python tools/metrics.py -f tinyusb/src cmake-build/*/metrics.json
+          pip install tools/linkermap/
+          python tools/metrics.py combine -j -m -f tinyusb/src cmake-build/*/metrics.json
+
+      - name: Upload Metrics Artifact
+        if: github.event_name == 'push'
+        uses: actions/upload-artifact@v5
+        with:
+          name: metrics-tinyusb
+          path: metrics.json
+
+      - name: Download Base Branch Metrics
+        if: github.event_name == 'pull_request'
+        uses: dawidd6/action-download-artifact@v11
+        with:
+          workflow: build.yml
+          branch: ${{ github.base_ref }}
+          name: metrics-tinyusb
+          path: base-metrics
+        continue-on-error: true
+
+      - name: Compare with Base Branch
+        if: github.event_name == 'pull_request'
+        run: |
+          if [ -f base-metrics/metrics.json ]; then
+            python tools/metrics.py compare -f tinyusb/src base-metrics/metrics.json metrics.json
+            cat metrics_compare.md
+          else
+            echo "No base metrics found, skipping comparison"
+            cp metrics.md metrics_compare.md
+          fi
+
+      - name: Post Code Metrics as PR Comment
+        if: github.event_name == 'pull_request'
+        uses: marocchino/sticky-pull-request-comment@v2
+        with:
+          header: code-metrics
+          path: metrics_compare.md
+
 
   # ---------------------------------------
   # Build Make: only build on push with one-per-family
   # ---------------------------------------
-#  make:
-#    if: github.event_name == 'push'
-#    needs: set-matrix
-#    uses: ./.github/workflows/build_util.yml
-#    strategy:
-#      fail-fast: false
-#      matrix:
-#        toolchain:
-#          - 'aarch64-gcc'
-#          #- 'arm-clang'
-#          - 'arm-gcc'
-#          - 'msp430-gcc'
-#          - 'riscv-gcc'
-#          - 'rx-gcc'
-#    with:
-#      build-system: 'make'
-#      toolchain: ${{ matrix.toolchain }}
-#      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain]) }}
-#      one-per-family: true
-#
-#  # ---------------------------------------
-#  # Build IAR
-#  # Since IAR Token secret is not passed to forked PR, only build non-forked PR with make.
-#  # cmake is built by circle-ci. Due to IAR limit capacity, only build oe per family
-#  # ---------------------------------------
-#  arm-iar:
-#    if: false # disable for now since we got reach capacity limit too often
-#    #if: github.event_name == 'push' && github.repository_owner == 'hathach'
-#    needs: set-matrix
-#    uses: ./.github/workflows/build_util.yml
-#    secrets: inherit
-#    strategy:
-#      fail-fast: false
-#      matrix:
-#        build-system:
-#          - 'make'
-#    with:
-#      build-system: ${{ matrix.build-system }}
-#      toolchain: 'arm-iar'
-#      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['arm-iar']) }}
-#      one-per-family: true
-#
-#  # ---------------------------------------
-#  # Build Make/CMake on Windows/MacOS
-#  # ---------------------------------------
-#  build-os:
-#    if: github.event_name == 'pull_request'
-#    uses: ./.github/workflows/build_util.yml
-#    strategy:
-#      fail-fast: false
-#      matrix:
-#        os: [windows-latest, macos-latest]
-#        build-system: [ 'make', 'cmake' ]
-#    with:
-#      os: ${{ matrix.os }}
-#      build-system: ${{ matrix.build-system }}
-#      toolchain: 'arm-gcc-${{ matrix.os }}'
-#      build-args: '["stm32h7"]'
-#      one-per-family: true
-#
-#  # ---------------------------------------
-#  # Zephyr
-#  # ---------------------------------------
-#  zephyr:
-#    if: github.event_name == 'push'
-#    runs-on: ubuntu-latest
-#    steps:
-#      - name: Checkout TinyUSB
-#        uses: actions/checkout@v4
-#
-#      - name: Setup Zephyr project
-#        uses: zephyrproject-rtos/action-zephyr-setup@v1
-#        with:
-#          app-path: examples
-#          toolchains: arm-zephyr-eabi
-#
-#      - name: Build
-#        run: |
-#          west build -b nrf52840dk -d examples/device/cdc_msc/build examples/device/cdc_msc -- -DRTOS=zephyr
-#          west build -b nrf52840dk -d examples/device/msc_dual_lun/build examples/device/msc_dual_lun -- -DRTOS=zephyr
-#
-#  # ---------------------------------------
-#  # Hardware in the loop (HIL)
-#  # Run on PR only (hil-tinyusb), hil-hfp only run on non-forked PR
-#  # ---------------------------------------
-#  hil-build:
-#    if: |
-#      github.repository_owner == 'hathach' &&
-#      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
-#    needs: set-matrix
-#    uses: ./.github/workflows/build_util.yml
-#    strategy:
-#      fail-fast: false
-#      matrix:
-#        toolchain:
-#          - 'arm-gcc'
-#          - 'esp-idf'
-#    with:
-#      build-system: 'cmake'
-#      toolchain: ${{ matrix.toolchain }}
-#      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.hil_json)[matrix.toolchain]) }}
-#      one-per-family: true
-#      upload-artifacts: true
-#
-#  # ---------------------------------------
-#  # Hardware in the loop (HIL)
-#  # self-hosted on local VM, for attached hardware checkout HIL_JSON
-#  # ---------------------------------------
-#  hil-tinyusb:
-#    if: |
-#      github.repository_owner == 'hathach' &&
-#      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
-#    needs: hil-build
-#    runs-on: [self-hosted, X64, hathach, hardware-in-the-loop]
-#    steps:
-#      - name: Get Skip Boards from previous run
-#        if: github.run_attempt != '1'
-#        run: |
-#          if [ -f "${{ env.HIL_JSON }}.skip" ]; then
-#            SKIP_BOARDS=$(cat "${{ env.HIL_JSON }}.skip")
-#          else
-#            SKIP_BOARDS=""
-#          fi
-#          echo "SKIP_BOARDS=$SKIP_BOARDS"
-#          echo "SKIP_BOARDS=$SKIP_BOARDS" >> $GITHUB_ENV
-#
-#      - name: Clean workspace
-#        run: |
-#          echo "Cleaning up for the first run"
-#          rm -rf "${{ github.workspace }}"
-#          mkdir -p "${{ github.workspace }}"
-#
-#      - name: Checkout TinyUSB
-#        uses: actions/checkout@v4
-#
-#      - name: Download Artifacts
-#        uses: actions/download-artifact@v5
-#        with:
-#          path: cmake-build
-#          merge-multiple: true
-#
-#      - name: Test on actual hardware
-#        run: |
-#          python3 test/hil/hil_test.py ${{ env.HIL_JSON }} $SKIP_BOARDS
-#
-#  # ---------------------------------------
-#  # Hardware in the loop (HIL)
-#  # self-hosted by HFP, build with IAR toolchain, for attached hardware checkout test/hil/hfp.json
-#  # Since IAR Token secret is not passed to forked PR, only build non-forked PR
-#  # ---------------------------------------
-#  hil-hfp:
-#    if: |
-#      github.repository_owner == 'hathach' &&
-#      github.event.pull_request.head.repo.fork == false &&
-#      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
-#    runs-on: [self-hosted, Linux, X64, hifiphile]
-#    env:
-#      IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
-#    steps:
-#      - name: Clean workspace
-#        run: |
-#          echo "Cleaning up previous run"
-#          rm -rf "${{ github.workspace }}"3
-#          mkdir -p "${{ github.workspace }}"
-#
-#      - name: Toolchain version
-#        run: |
-#          iccarm --version
-#
-#      - name: Checkout TinyUSB
-#        uses: actions/checkout@v4
-#
-#      - name: Get build boards
-#        run: |
-#          MATRIX_JSON=$(python test/hil/hil_ci_set_matrix.py test/hil/hfp.json)
-#          BUILD_ARGS=$(echo $MATRIX_JSON | jq -r '.["arm-gcc"] | join(" ")')
-#          echo "BUILD_ARGS=$BUILD_ARGS"
-#          echo "BUILD_ARGS=$BUILD_ARGS" >> $GITHUB_ENV
-#
-#      - name: Get Dependencies
-#        run: python3 tools/get_deps.py $BUILD_ARGS
-#
-#      - name: Build
-#        run: python3 tools/build.py -j 4 --toolchain iar $BUILD_ARGS
-#
-#      - name: Test on actual hardware (hardware in the loop)
-#        run: python3 test/hil/hil_test.py hfp.json
+  make:
+    if: github.event_name == 'push'
+    needs: set-matrix
+    uses: ./.github/workflows/build_util.yml
+    strategy:
+      fail-fast: false
+      matrix:
+        toolchain:
+          - 'aarch64-gcc'
+          #- 'arm-clang'
+          - 'arm-gcc'
+          - 'msp430-gcc'
+          - 'riscv-gcc'
+          - 'rx-gcc'
+    with:
+      build-system: 'make'
+      toolchain: ${{ matrix.toolchain }}
+      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain]) }}
+      one-per-family: true
+
+  # ---------------------------------------
+  # Build IAR
+  # Since IAR Token secret is not passed to forked PR, only build non-forked PR with make.
+  # cmake is built by circle-ci. Due to IAR limit capacity, only build oe per family
+  # ---------------------------------------
+  arm-iar:
+    if: false # disable for now since we got reach capacity limit too often
+    #if: github.event_name == 'push' && github.repository_owner == 'hathach'
+    needs: set-matrix
+    uses: ./.github/workflows/build_util.yml
+    secrets: inherit
+    strategy:
+      fail-fast: false
+      matrix:
+        build-system:
+          - 'make'
+    with:
+      build-system: ${{ matrix.build-system }}
+      toolchain: 'arm-iar'
+      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['arm-iar']) }}
+      one-per-family: true
+
+  # ---------------------------------------
+  # Build Make/CMake on Windows/MacOS
+  # ---------------------------------------
+  build-os:
+    if: github.event_name == 'pull_request'
+    uses: ./.github/workflows/build_util.yml
+    strategy:
+      fail-fast: false
+      matrix:
+        os: [ windows-latest, macos-latest ]
+        build-system: [ 'make', 'cmake' ]
+    with:
+      os: ${{ matrix.os }}
+      build-system: ${{ matrix.build-system }}
+      toolchain: 'arm-gcc-${{ matrix.os }}'
+      build-args: '["stm32h7"]'
+      one-per-family: true
+
+  # ---------------------------------------
+  # Zephyr
+  # ---------------------------------------
+  zephyr:
+    if: github.event_name == 'push'
+    runs-on: ubuntu-latest
+    steps:
+      - name: Checkout TinyUSB
+        uses: actions/checkout@v4
+
+      - name: Setup Zephyr project
+        uses: zephyrproject-rtos/action-zephyr-setup@v1
+        with:
+          app-path: examples
+          toolchains: arm-zephyr-eabi
+
+      - name: Build
+        run: |
+          west build -b nrf52840dk -d examples/device/cdc_msc/build examples/device/cdc_msc -- -DRTOS=zephyr
+          west build -b nrf52840dk -d examples/device/msc_dual_lun/build examples/device/msc_dual_lun -- -DRTOS=zephyr
+
+  # ---------------------------------------
+  # Hardware in the loop (HIL)
+  # Run on PR only (hil-tinyusb), hil-hfp only run on non-forked PR
+  # ---------------------------------------
+  hil-build:
+    if: |
+      github.repository_owner == 'hathach' &&
+      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
+    needs: set-matrix
+    uses: ./.github/workflows/build_util.yml
+    strategy:
+      fail-fast: false
+      matrix:
+        toolchain:
+          - 'arm-gcc'
+          - 'esp-idf'
+    with:
+      build-system: 'cmake'
+      toolchain: ${{ matrix.toolchain }}
+      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.hil_json)[matrix.toolchain]) }}
+      one-per-family: true
+      upload-artifacts: true
+
+  # ---------------------------------------
+  # Hardware in the loop (HIL)
+  # self-hosted on local VM, for attached hardware checkout HIL_JSON
+  # ---------------------------------------
+  hil-tinyusb:
+    if: |
+      github.repository_owner == 'hathach' &&
+      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
+    needs: hil-build
+    runs-on: [ self-hosted, X64, hathach, hardware-in-the-loop ]
+    steps:
+      - name: Get Skip Boards from previous run
+        if: github.run_attempt != '1'
+        run: |
+          if [ -f "${{ env.HIL_JSON }}.skip" ]; then
+            SKIP_BOARDS=$(cat "${{ env.HIL_JSON }}.skip")
+          else
+            SKIP_BOARDS=""
+          fi
+          echo "SKIP_BOARDS=$SKIP_BOARDS"
+          echo "SKIP_BOARDS=$SKIP_BOARDS" >> $GITHUB_ENV
+
+      - name: Clean workspace
+        run: |
+          echo "Cleaning up for the first run"
+          rm -rf "${{ github.workspace }}"
+          mkdir -p "${{ github.workspace }}"
+
+      - name: Checkout TinyUSB
+        uses: actions/checkout@v4
+
+      - name: Download Artifacts
+        uses: actions/download-artifact@v5
+        with:
+          path: cmake-build
+          merge-multiple: true
+
+      - name: Test on actual hardware
+        run: |
+          python3 test/hil/hil_test.py ${{ env.HIL_JSON }} $SKIP_BOARDS
+
+  # ---------------------------------------
+  # Hardware in the loop (HIL)
+  # self-hosted by HFP, build with IAR toolchain, for attached hardware checkout test/hil/hfp.json
+  # Since IAR Token secret is not passed to forked PR, only build non-forked PR
+  # ---------------------------------------
+  hil-hfp:
+    if: |
+      github.repository_owner == 'hathach' &&
+      github.event.pull_request.head.repo.fork == false &&
+      (github.event_name == 'pull_request' || github.event_name == 'workflow_dispatch')
+    runs-on: [ self-hosted, Linux, X64, hifiphile ]
+    env:
+      IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
+    steps:
+      - name: Clean workspace
+        run: |
+          echo "Cleaning up previous run"
+          rm -rf "${{ github.workspace }}"3
+          mkdir -p "${{ github.workspace }}"
+
+      - name: Toolchain version
+        run: |
+          iccarm --version
+
+      - name: Checkout TinyUSB
+        uses: actions/checkout@v4
+
+      - name: Get build boards
+        run: |
+          MATRIX_JSON=$(python test/hil/hil_ci_set_matrix.py test/hil/hfp.json)
+          BUILD_ARGS=$(echo $MATRIX_JSON | jq -r '.["arm-gcc"] | join(" ")')
+          echo "BUILD_ARGS=$BUILD_ARGS"
+          echo "BUILD_ARGS=$BUILD_ARGS" >> $GITHUB_ENV
+
+      - name: Get Dependencies
+        run: python3 tools/get_deps.py $BUILD_ARGS
+
+      - name: Build
+        run: python3 tools/build.py -j 4 --toolchain iar $BUILD_ARGS
+
+      - name: Test on actual hardware (hardware in the loop)
+        run: python3 test/hil/hil_test.py hfp.json
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 2de0ed229..36043a1d5 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -75,7 +75,7 @@ jobs:
 
       - name: Upload Artifacts for Metrics
         if: ${{ inputs.upload-metrics }}
-        uses: actions/upload-artifact@v4
+        uses: actions/upload-artifact@v5
         with:
           name: metrics-${{ matrix.arg }}
           path: cmake-build/cmake-build-*/metrics.json
diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 5032c83ae..933a8375f 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -20,8 +20,7 @@ family_list = {
     "ch32v10x ch32v20x ch32v30x fomu gd32vf103": ["riscv-gcc"],
     "imxrt": ["arm-gcc", "arm-clang"],
     "kinetis_k kinetis_kl kinetis_k32l2": ["arm-gcc", "arm-clang"],
-    "lpc11 lpc13 lpc15": ["arm-gcc", "arm-clang"],
-    "lpc17 lpc18 lpc40 lpc43": ["arm-gcc", "arm-clang"],
+    "lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43": ["arm-gcc", "arm-clang"],
     "lpc51 lpc54 lpc55": ["arm-gcc", "arm-clang"],
     "maxim mcx mm32 msp432e4 tm4c": ["arm-gcc"],
     "msp430": ["msp430-gcc"],
@@ -36,8 +35,7 @@ family_list = {
     "stm32f7": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32g0 stm32g4 stm32h5": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32h7": ["arm-gcc", "arm-clang", "arm-iar"],
-    "stm32h7rs": ["arm-gcc", "arm-clang", "arm-iar"],
-    "stm32l0 stm32l4": ["arm-gcc", "arm-clang", "arm-iar"],
+    "stm32h7rs stm32l0 stm32l4": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32n6": ["arm-gcc"],
     "stm32u0 stm32u5 stm32wb stm32wba": ["arm-gcc", "arm-clang", "arm-iar"],
     "-bespressif_s2_devkitc": ["esp-idf"],
diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index 694681467..b34131c2b 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -20,9 +20,9 @@ endforeach ()
 
 # Post-build: run metrics.py on all map.json files
 find_package(Python3 REQUIRED COMPONENTS Interpreter)
-add_custom_target(tinyusb_examples_metrics
+add_custom_target(tinyusb_metrics
   COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../tools/metrics.py
-  -f tinyusb/src -j -o ${CMAKE_BINARY_DIR}/metrics
+  combine -f tinyusb/src -j -o ${CMAKE_BINARY_DIR}/metrics
   ${MAPJSON_PATTERNS}
   COMMENT "Generating average code size metrics"
   VERBATIM
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 3ede95e3f..15d9f1eae 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -351,8 +351,10 @@ function(family_configure_common TARGET RTOS)
     endif ()
   endif ()
 
-  # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
-  family_add_linkermap(${TARGET})
+  if (NOT RTOS STREQUAL zephyr)
+    # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
+    family_add_linkermap(${TARGET})
+  endif ()
 
   # run size after build
 #  find_program(SIZE_EXE ${CMAKE_SIZE})
diff --git a/tools/build.py b/tools/build.py
index b87af6c6a..e4909f45f 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -122,7 +122,7 @@ def cmake_board(board, build_args, build_flags_on):
             rcmd = run_cmd(cmd)
         if rcmd.returncode == 0:
             ret[0] += 1
-            run_cmd(["cmake", "--build", build_dir, '--target', 'tinyusb_examples_metrics'])
+            run_cmd(["cmake", "--build", build_dir, '--target', 'tinyusb_metrics'])
             # print(rcmd.stdout.decode("utf-8"))
         else:
             ret[1] += 1
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 9634451e2..99e406ce7 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        '46c3c2947db366fb66af6723709febf80d860bc1',
+                        '8a8206c39d0dfd7abfa615a676b3291165fcd65c',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
diff --git a/tools/metrics.py b/tools/metrics.py
index c6cd49d57..7e54531f5 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -3,6 +3,7 @@
 
 import argparse
 import glob
+import json
 import sys
 import os
 
@@ -39,8 +40,6 @@ def combine_maps(map_files, filters=None):
     Returns:
         all_json_data: Dictionary with mapfiles list and data from each map file
     """
-    import json
-
     filters = filters or []
     all_json_data = {"mapfiles": [], "data": []}
 
@@ -128,24 +127,185 @@ def compute_avg(all_json_data):
     return json_average
 
 
-def main(argv=None):
-    parser = argparse.ArgumentParser(description='Calculate average size from linker map files')
-    parser.add_argument('files', nargs='+', help='Path to map file(s) or glob pattern(s)')
-    parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
-                        help='Only include object files whose path contains this substring (can be repeated)')
-    parser.add_argument('-o', '--out', dest='out', default='metrics',
-                        help='Output path basename for JSON and Markdown files (default: metrics)')
-    parser.add_argument('-j', '--json', dest='json_out', action='store_true',
-                        help='Write JSON output file')
-    parser.add_argument('-m', '--markdown', dest='markdown_out', action='store_true',
-                        help='Write Markdown output file')
-    parser.add_argument('-q', '--quiet', dest='quiet', action='store_true',
-                        help='Suppress summary output')
-    args = parser.parse_args(argv)
+def compare_maps(base_file, new_file, filters=None):
+    """Compare two map/json files and generate difference report.
+
+    Args:
+        base_file: Path to base map/json file
+        new_file: Path to new map/json file
+        filters: List of path substrings to filter object files
+
+    Returns:
+        Dictionary with comparison data
+    """
+    filters = filters or []
+
+    # Load both files
+    base_data = combine_maps([base_file], filters)
+    new_data = combine_maps([new_file], filters)
+
+    if not base_data["data"] or not new_data["data"]:
+        return None
+
+    base_avg = compute_avg(base_data)
+    new_avg = compute_avg(new_data)
+
+    if not base_avg or not new_avg:
+        return None
+
+    # Collect all sections from both
+    all_sections = list(base_avg["sections"])
+    for s in new_avg["sections"]:
+        if s not in all_sections:
+            all_sections.append(s)
+
+    # Build file lookup
+    base_files = {f["file"]: f for f in base_avg["files"]}
+    new_files = {f["file"]: f for f in new_avg["files"]}
+
+    # Get all file names
+    all_file_names = set(base_files.keys()) | set(new_files.keys())
+
+    # Build comparison data
+    comparison = []
+    for fname in sorted(all_file_names):
+        base_f = base_files.get(fname)
+        new_f = new_files.get(fname)
+
+        row = {"file": fname, "sections": {}, "total": {}}
+
+        for section in all_sections:
+            base_val = base_f["sections"].get(section, 0) if base_f else 0
+            new_val = new_f["sections"].get(section, 0) if new_f else 0
+            row["sections"][section] = {"base": base_val, "new": new_val, "diff": new_val - base_val}
+
+        base_total = base_f["total"] if base_f else 0
+        new_total = new_f["total"] if new_f else 0
+        row["total"] = {"base": base_total, "new": new_total, "diff": new_total - base_total}
+
+        comparison.append(row)
+
+    return {
+        "base_file": base_file,
+        "new_file": new_file,
+        "sections": all_sections,
+        "files": comparison
+    }
 
-    # Expand glob patterns
-    map_files = expand_files(args.files)
 
+def format_diff(base, new, diff):
+    """Format a diff value with percentage."""
+    if base == 0 and new == 0:
+        return "0"
+    if base == 0:
+        return f"{new} (new)"
+    if new == 0:
+        return f"{base} ➡ 0"
+    if diff == 0:
+        return f"{base} ➡ {new}"
+    pct = (diff / base) * 100
+    sign = "+" if diff > 0 else ""
+    return f"{base} ➡ {new} ({sign}{diff}, {sign}{pct:.1f}%)"
+
+
+def get_sort_key(sort_order):
+    """Get sort key function based on sort order.
+
+    Args:
+        sort_order: One of 'size-', 'size+', 'name-', 'name+'
+
+    Returns:
+        Tuple of (key_func, reverse)
+    """
+    if sort_order == 'size-':
+        return lambda x: x.get('total', 0) if isinstance(x.get('total'), int) else x['total']['new'], True
+    elif sort_order == 'size+':
+        return lambda x: x.get('total', 0) if isinstance(x.get('total'), int) else x['total']['new'], False
+    elif sort_order == 'name-':
+        return lambda x: x.get('file', ''), True
+    else:  # name+
+        return lambda x: x.get('file', ''), False
+
+
+def write_compare_markdown(comparison, path, sort_order='size'):
+    """Write comparison data to markdown file."""
+    sections = comparison["sections"]
+
+    md_lines = [
+        "# TinyUSB Code Size Different Report",
+        "",
+        f"**Base:** `{comparison['base_file']}`",
+        f"**New:** `{comparison['new_file']}`",
+        "",
+    ]
+
+    # Build header
+    header = "| File |"
+    separator = "|:-----|"
+    for s in sections:
+        header += f" {s} |"
+        separator += "-----:|"
+    header += " Total |"
+    separator += "------:|"
+
+    md_lines.append(header)
+    md_lines.append(separator)
+
+    # Sort files based on sort_order
+    if sort_order == 'size-':
+        key_func = lambda x: abs(x["total"]["diff"])
+        reverse = True
+    elif sort_order in ('size', 'size+'):
+        key_func = lambda x: abs(x["total"]["diff"])
+        reverse = False
+    elif sort_order == 'name-':
+        key_func = lambda x: x['file']
+        reverse = True
+    else:  # name or name+
+        key_func = lambda x: x['file']
+        reverse = False
+    sorted_files = sorted(comparison["files"], key=key_func, reverse=reverse)
+
+    sum_base = {s: 0 for s in sections}
+    sum_base["total"] = 0
+    sum_new = {s: 0 for s in sections}
+    sum_new["total"] = 0
+
+    for f in sorted_files:
+        # Skip files with no changes
+        if f["total"]["diff"] == 0 and all(f["sections"][s]["diff"] == 0 for s in sections):
+            continue
+
+        row = f"| {f['file']} |"
+        for s in sections:
+            sd = f["sections"][s]
+            sum_base[s] += sd["base"]
+            sum_new[s] += sd["new"]
+            row += f" {format_diff(sd['base'], sd['new'], sd['diff'])} |"
+
+        td = f["total"]
+        sum_base["total"] += td["base"]
+        sum_new["total"] += td["new"]
+        row += f" {format_diff(td['base'], td['new'], td['diff'])} |"
+
+        md_lines.append(row)
+
+    # Add sum row
+    sum_row = "| **SUM** |"
+    for s in sections:
+        diff = sum_new[s] - sum_base[s]
+        sum_row += f" {format_diff(sum_base[s], sum_new[s], diff)} |"
+    total_diff = sum_new["total"] - sum_base["total"]
+    sum_row += f" {format_diff(sum_base['total'], sum_new['total'], total_diff)} |"
+    md_lines.append(sum_row)
+
+    with open(path, "w", encoding="utf-8") as f:
+        f.write("\n".join(md_lines))
+
+
+def cmd_combine(args):
+    """Handle combine subcommand."""
+    map_files = expand_files(args.files)
     all_json_data = combine_maps(map_files, args.filters)
     json_average = compute_avg(all_json_data)
 
@@ -154,11 +314,65 @@ def main(argv=None):
         sys.exit(1)
 
     if not args.quiet:
-        linkermap.print_summary(json_average, False)
+        linkermap.print_summary(json_average, False, args.sort)
     if args.json_out:
         linkermap.write_json(json_average, args.out + '.json')
     if args.markdown_out:
-        linkermap.write_markdown(json_average, args.out + '.md')
+        linkermap.write_markdown(json_average, args.out + '.md', sort_opt=args.sort,
+                                 title="TinyUSB Average Code Size Metrics")
+
+
+def cmd_compare(args):
+    """Handle compare subcommand."""
+    comparison = compare_maps(args.base, args.new, args.filters)
+
+    if comparison is None:
+        print("Failed to compare files", file=sys.stderr)
+        sys.exit(1)
+
+    write_compare_markdown(comparison, args.out + '.md', args.sort)
+    print(f"Comparison written to {args.out}.md")
+
+
+def main(argv=None):
+    parser = argparse.ArgumentParser(description='Code size metrics tool')
+    subparsers = parser.add_subparsers(dest='command', required=True, help='Available commands')
+
+    # Combine subcommand
+    combine_parser = subparsers.add_parser('combine', help='Combine and average multiple map files')
+    combine_parser.add_argument('files', nargs='+', help='Path to map file(s) or glob pattern(s)')
+    combine_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
+                                help='Only include object files whose path contains this substring (can be repeated)')
+    combine_parser.add_argument('-o', '--out', dest='out', default='metrics',
+                                help='Output path basename for JSON and Markdown files (default: metrics)')
+    combine_parser.add_argument('-j', '--json', dest='json_out', action='store_true',
+                                help='Write JSON output file')
+    combine_parser.add_argument('-m', '--markdown', dest='markdown_out', action='store_true',
+                                help='Write Markdown output file')
+    combine_parser.add_argument('-q', '--quiet', dest='quiet', action='store_true',
+                                help='Suppress summary output')
+    combine_parser.add_argument('-S', '--sort', dest='sort', default='name+',
+                                choices=['size', 'size-', 'size+', 'name', 'name-', 'name+'],
+                                help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: name+')
+
+    # Compare subcommand
+    compare_parser = subparsers.add_parser('compare', help='Compare two map files')
+    compare_parser.add_argument('base', help='Base map/json file')
+    compare_parser.add_argument('new', help='New map/json file')
+    compare_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
+                                help='Only include object files whose path contains this substring (can be repeated)')
+    compare_parser.add_argument('-o', '--out', dest='out', default='metrics_compare',
+                                help='Output path basename for Markdown file (default: metrics_compare)')
+    compare_parser.add_argument('-S', '--sort', dest='sort', default='name+',
+                                choices=['size', 'size-', 'size+', 'name', 'name-', 'name+'],
+                                help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: name+')
+
+    args = parser.parse_args(argv)
+
+    if args.command == 'combine':
+        cmd_combine(args)
+    elif args.command == 'compare':
+        cmd_compare(args)
 
 
 if __name__ == '__main__':
-- 
cgit v1.3.1


From e7105b1fa3ccd8200fe7fb8b0759d00afc9b07c1 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Thu, 4 Dec 2025 21:34:10 +0700
Subject: fine tune ci to build more with circleci (#3386)

* fine tune ci to build more with circleci
* skip make for arm-iar, esp-idf
* skip make + clang for circleci since llvm-objcopy got killed due to memory issue.
---
 .circleci/config.yml                               | 51 ++++++++++--------
 .circleci/config2.yml                              | 15 +++++-
 .github/workflows/build.yml                        | 60 +++-------------------
 .github/workflows/build_util.yml                   |  3 ++
 examples/build_system/make/toolchain/gcc_common.mk |  3 ++
 hw/bsp/kinetis_k/family.mk                         |  6 ++-
 hw/bsp/kinetis_kl/family.mk                        |  6 ++-
 tools/build.py                                     |  8 +--
 tools/metrics.py                                   | 19 +++----
 9 files changed, 74 insertions(+), 97 deletions(-)

(limited to 'hw')

diff --git a/.circleci/config.yml b/.circleci/config.yml
index 580f5fe2e..d04a33959 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -18,25 +18,34 @@ jobs:
             MATRIX_JSON=$(python .github/workflows/ci_set_matrix.py)
             echo "MATRIX_JSON=$MATRIX_JSON"
 
-            BUILDSYSTEM_TOOLCHAIN=(
-              "cmake aarch64-gcc"
-              "cmake arm-clang"
-              "cmake arm-gcc"
-              "cmake esp-idf"
-              "cmake msp430-gcc"
-              "cmake riscv-gcc"
+            BUILDSYSTEM_LIST=(
+              "cmake"
+              "make"
+            )
+
+            TOOLCHAIN_LIST=(
+              "aarch64-gcc"
+              "arm-clang"
+              "arm-gcc"
+              "esp-idf"
+              "msp430-gcc"
+              "riscv-gcc"
             )
 
             # only build IAR if not forked PR, since IAR token is not shared
             if [ -z $CIRCLE_PR_USERNAME ]; then
-              BUILDSYSTEM_TOOLCHAIN+=("cmake arm-iar")
+              TOOLCHAIN_LIST+=("arm-iar")
             fi
 
             gen_build_entry() {
               local build_system="$1"
               local toolchain="$2"
               local family="$3"
-              local resource_class="$4"
+              local build_args=""
+
+              if [[ "$toolchain" == "arm-iar" || "$build_system" == "make" ]]; then
+                build_args="--one-per-family"
+              fi
 
               if [[ "$toolchain" == "esp-idf" ]]; then
                 echo "      - build-vm:" >> .circleci/config2.yml
@@ -49,17 +58,21 @@ jobs:
               echo "              build-system: ['$build_system']" >> .circleci/config2.yml
               echo "              toolchain: ['$toolchain']" >> .circleci/config2.yml
               echo "              family: $family" >> .circleci/config2.yml
-              echo "              resource_class: ['$resource_class']" >> .circleci/config2.yml
+              echo "              resource_class: ['large']" >> .circleci/config2.yml
+              echo "              build-args: ['$build_args']" >> .circleci/config2.yml
             }
 
-            for e in "${BUILDSYSTEM_TOOLCHAIN[@]}"; do
-              e_arr=($e)
-              build_system="${e_arr[0]}"
-              toolchain="${e_arr[1]}"
-              FAMILY=$(echo $MATRIX_JSON | jq -r ".\"$toolchain\"")
-              echo "FAMILY_${toolchain}=$FAMILY"
+            for build_system in "${BUILDSYSTEM_LIST[@]}"; do
+              for toolchain in "${TOOLCHAIN_LIST[@]}"; do
+                # make does not support these toolchains
+                if [ "$build_system" == "make" ] && { [ "$toolchain" == "arm-clang" ] || [ "$toolchain" == "arm-iar" ] || [ "$toolchain" == "esp-idf" ]; }; then
+                  continue
+                fi
 
-              gen_build_entry "$build_system" "$toolchain" "$FAMILY" "large"
+                FAMILY=$(echo $MATRIX_JSON | jq -r ".\"$toolchain\"")
+                echo "FAMILY_${toolchain}=$FAMILY"
+                gen_build_entry "$build_system" "$toolchain" "$FAMILY"
+              done
             done
 
       - continuation/continue:
@@ -67,9 +80,5 @@ jobs:
 
 workflows:
   set-matrix:
-    # Only build PR here, Push will be built by github action.
-    when:
-      and:
-        - not: << pipeline.git.branch.is_default >>
     jobs:
       - set-matrix
diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index 869597289..77bc4f790 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -66,6 +66,9 @@ commands:
         type: string
       family:
         type: string
+      build-args:
+        type: string
+        default: ""
 
     steps:
       - checkout
@@ -107,7 +110,7 @@ commands:
           no_output_timeout: 20m
           command: |
             if [ << parameters.toolchain >> == esp-idf ]; then
-              docker run --rm -v $PWD:/project -w /project espressif/idf:v5.3.2 python tools/build.py << parameters.family >>
+              docker run --rm -v $PWD:/project -w /project espressif/idf:v5.3.2 python tools/build.py << parameters.build-args >> << parameters.family >>
             else
               # Toolchain option default is gcc
               if [ << parameters.toolchain >> == arm-clang ]; then
@@ -121,7 +124,7 @@ commands:
 
               # circleci docker return $nproc as 36 core, limit parallel to 4 (resource-class = large)
               # Required for IAR, also prevent crashed/killed by docker
-              python tools/build.py -s << parameters.build-system >> $TOOLCHAIN_OPTION -j 4 << parameters.family >>
+              python tools/build.py -s << parameters.build-system >> $TOOLCHAIN_OPTION -j 4 << parameters.build-args >> << parameters.family >>
             fi
 
 jobs:
@@ -137,6 +140,9 @@ jobs:
         type: string
       family:
         type: string
+      build-args:
+        type: string
+        default: ""
 
     docker:
       - image: cimg/base:current
@@ -147,6 +153,7 @@ jobs:
           build-system: << parameters.build-system >>
           toolchain: << parameters.toolchain >>
           family: << parameters.family >>
+          build-args: << parameters.build-args >>
 
   # Build using VM
   build-vm:
@@ -160,6 +167,9 @@ jobs:
         type: string
       family:
         type: string
+      build-args:
+        type: string
+        default: ""
 
     machine:
       image: ubuntu-2404:current
@@ -170,6 +180,7 @@ jobs:
           build-system: << parameters.build-system >>
           toolchain: << parameters.toolchain >>
           family: << parameters.family >>
+          build-args: << parameters.build-args >>
 
 workflows:
   build:
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 77f2d573f..a1bacbc27 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -56,10 +56,11 @@ jobs:
           echo "hil_matrix=$HIL_MATRIX_JSON"
           echo "hil_matrix=$HIL_MATRIX_JSON" >> $GITHUB_OUTPUT
 
-  # ---------------------------------------
-  # Build CMake: only one-per-family.
-  # Full built is done by CircleCI in PR
-  # ---------------------------------------
+  # ------------------------------------------------------------------------------
+  # CMake build: only one-per-family. Full built is done by CircleCI in PR
+  # Note:
+  # For Make and IAR build: will be done on CircleCI only (one-per-family too)
+  # ------------------------------------------------------------------------------
   cmake:
     needs: set-matrix
     uses: ./.github/workflows/build_util.yml
@@ -70,7 +71,7 @@ jobs:
           - 'aarch64-gcc'
           #- 'arm-clang'
           - 'arm-gcc'
-          - 'esp-idf'
+          #- 'esp-idf'
           - 'msp430-gcc'
           - 'riscv-gcc'
     with:
@@ -137,52 +138,6 @@ jobs:
           header: code-metrics
           path: metrics_compare.md
 
-
-  # ---------------------------------------
-  # Build Make: only build on push with one-per-family
-  # ---------------------------------------
-  make:
-    if: github.event_name == 'push'
-    needs: set-matrix
-    uses: ./.github/workflows/build_util.yml
-    strategy:
-      fail-fast: false
-      matrix:
-        toolchain:
-          - 'aarch64-gcc'
-          #- 'arm-clang'
-          - 'arm-gcc'
-          - 'msp430-gcc'
-          - 'riscv-gcc'
-          - 'rx-gcc'
-    with:
-      build-system: 'make'
-      toolchain: ${{ matrix.toolchain }}
-      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain]) }}
-      one-per-family: true
-
-  # ---------------------------------------
-  # Build IAR
-  # Since IAR Token secret is not passed to forked PR, only build non-forked PR with make.
-  # cmake is built by circle-ci. Due to IAR limit capacity, only build oe per family
-  # ---------------------------------------
-  arm-iar:
-    if: false # disable for now since we got reach capacity limit too often
-    #if: github.event_name == 'push' && github.repository_owner == 'hathach'
-    needs: set-matrix
-    uses: ./.github/workflows/build_util.yml
-    secrets: inherit
-    strategy:
-      fail-fast: false
-      matrix:
-        build-system:
-          - 'make'
-    with:
-      build-system: ${{ matrix.build-system }}
-      toolchain: 'arm-iar'
-      build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)['arm-iar']) }}
-      one-per-family: true
-
   # ---------------------------------------
   # Build Make/CMake on Windows/MacOS
   # ---------------------------------------
@@ -193,10 +148,9 @@ jobs:
       fail-fast: false
       matrix:
         os: [ windows-latest, macos-latest ]
-        build-system: [ 'make', 'cmake' ]
     with:
       os: ${{ matrix.os }}
-      build-system: ${{ matrix.build-system }}
+      build-system: 'cmake-make'
       toolchain: 'arm-gcc-${{ matrix.os }}'
       build-args: '["stm32h7"]'
       one-per-family: true
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 36043a1d5..2fc0eead0 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -68,6 +68,9 @@ jobs:
         run: |
           if [ "$TOOLCHAIN" == "esp-idf" ]; then
             docker run --rm -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py ${{ matrix.arg }}
+          elif [ "${{ inputs.build-system }}" == "cmake-make" ] || [ "${{ inputs.build-system }}" == "make-cmake" ]; then
+            python tools/build.py -s make ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
+            python tools/build.py -s cmake ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
           else
             python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
           fi
diff --git a/examples/build_system/make/toolchain/gcc_common.mk b/examples/build_system/make/toolchain/gcc_common.mk
index 0cbb6774d..42fd01183 100644
--- a/examples/build_system/make/toolchain/gcc_common.mk
+++ b/examples/build_system/make/toolchain/gcc_common.mk
@@ -31,6 +31,9 @@ CFLAGS += \
   -Wreturn-type \
   -Wredundant-decls \
 
+CFLAGS_CLANG += \
+  -Wno-error=unknown-warning-option
+
 #  -Wmissing-prototypes \
 # conversion is too strict for most mcu driver, may be disable sign/int/arith-conversion
 #  -Wconversion
diff --git a/hw/bsp/kinetis_k/family.mk b/hw/bsp/kinetis_k/family.mk
index e95cdb717..7a51a77d8 100644
--- a/hw/bsp/kinetis_k/family.mk
+++ b/hw/bsp/kinetis_k/family.mk
@@ -9,11 +9,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_KINETIS_K \
 
 LDFLAGS += \
-  -nostartfiles \
-  --specs=nosys.specs --specs=nano.specs \
   -Wl,--defsym,__stack_size__=0x400 \
   -Wl,--defsym,__heap_size__=0
 
+LDFLAGS_GCC += \
+  -nostartfiles \
+  --specs=nosys.specs --specs=nano.specs \
+
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
 	src/portable/nxp/khci/hcd_khci.c \
diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk
index 8d113aecf..aec53d486 100644
--- a/hw/bsp/kinetis_kl/family.mk
+++ b/hw/bsp/kinetis_kl/family.mk
@@ -9,11 +9,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_KINETIS_KL \
 
 LDFLAGS += \
-  -nostartfiles \
-  -specs=nosys.specs -specs=nano.specs \
   -Wl,--defsym,__stack_size__=0x400 \
   -Wl,--defsym,__heap_size__=0
 
+LDFLAGS_GCC += \
+  -nostartfiles \
+  -specs=nosys.specs -specs=nano.specs \
+
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
 	src/portable/nxp/khci/hcd_khci.c \
diff --git a/tools/build.py b/tools/build.py
index e4909f45f..c4f1558c0 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -142,16 +142,12 @@ def make_one_example(example, board, make_option):
         r = 2
     else:
         start_time = time.monotonic()
-        # skip -j for circleci
-        if not os.getenv('CIRCLECI'):
-            make_option += ' -j'
-        make_args = ["make", "-C", f"examples/{example}", f"BOARD={board}"]
+        make_args = ["make", "-C", f"examples/{example}", f"BOARD={board}", '-j', str(parallel_jobs)]
         if make_option:
             make_args += shlex.split(make_option)
-        make_args.append("all")
         if clean_build:
             run_cmd(make_args + ["clean"])
-        build_result = run_cmd(make_args)
+        build_result = run_cmd(make_args + ['all'])
         r = 0 if build_result.returncode == 0 else 1
         print_build_result(board, example, r, time.monotonic() - start_time)
 
diff --git a/tools/metrics.py b/tools/metrics.py
index bb84f803e..c3b366e42 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -195,17 +195,13 @@ def compare_maps(base_file, new_file, filters=None):
 
 def format_diff(base, new, diff):
     """Format a diff value with percentage."""
-    if base == 0 and new == 0:
-        return "0"
-    if base == 0:
-        return f"{new} (new)"
-    if new == 0:
-        return f"{base} ➡ 0"
     if diff == 0:
-        return f"{base} ➡ {new}"
+        return f"{new}"
+    if base == 0 or new == 0:
+        return f"{base} ➙ {new}"
     pct = (diff / base) * 100
     sign = "+" if diff > 0 else ""
-    return f"{base} ➡ {new} ({sign}{diff}, {sign}{pct:.1f}%)"
+    return f"{base} ➙ {new} ({sign}{diff}, {sign}{pct:.1f}%)"
 
 
 def get_sort_key(sort_order):
@@ -232,10 +228,11 @@ def write_compare_markdown(comparison, path, sort_order='size'):
     sections = comparison["sections"]
 
     md_lines = [
-        "# TinyUSB Code Size Different Report",
+        "# Size Difference Report",
         "",
-        f"**Base:** `{comparison['base_file']}`",
-        f"**New:** `{comparison['new_file']}`",
+        "Because TinyUSB code size varies by port and configuration, the metrics below represent the averaged totals across all example builds."
+        "",
+        "Note: If there is no change, only one value is shown.",
         "",
     ]
 
-- 
cgit v1.3.1


From 93b53158f02bce9497419298ac27150eebe567d3 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Fri, 5 Dec 2025 10:21:28 +0700
Subject: Run CI build with fixed set of boards (#3389)

* run cmake ci build on github with a fixed set of board to keep the size stable
* Size Difference Report contain major >1% and minor <1& table
---
 .circleci/config.yml             |  2 +-
 .github/workflows/build.yml      |  9 ++---
 .github/workflows/build_util.yml | 22 +++-------
 hw/bsp/rp2040/skip_ci.txt        |  7 ----
 tools/build.py                   | 62 ++++++++++++++++++++---------
 tools/metrics.py                 | 86 ++++++++++++++++++++++++++--------------
 6 files changed, 112 insertions(+), 76 deletions(-)
 delete mode 100644 hw/bsp/rp2040/skip_ci.txt

(limited to 'hw')

diff --git a/.circleci/config.yml b/.circleci/config.yml
index d04a33959..42b790c83 100644
--- a/.circleci/config.yml
+++ b/.circleci/config.yml
@@ -44,7 +44,7 @@ jobs:
               local build_args=""
 
               if [[ "$toolchain" == "arm-iar" || "$build_system" == "make" ]]; then
-                build_args="--one-per-family"
+                build_args="--one-random"
               fi
 
               if [[ "$toolchain" == "esp-idf" ]]; then
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index a1bacbc27..bc2fdac77 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -57,9 +57,9 @@ jobs:
           echo "hil_matrix=$HIL_MATRIX_JSON" >> $GITHUB_OUTPUT
 
   # ------------------------------------------------------------------------------
-  # CMake build: only one-per-family. Full built is done by CircleCI in PR
+  # CMake build: only one board per family (first alphabetically). Full build is done by CircleCI in PR
   # Note:
-  # For Make and IAR build: will be done on CircleCI only (one-per-family too)
+  # For Make and IAR build: will be done on CircleCI only (one random per family as well)
   # ------------------------------------------------------------------------------
   cmake:
     needs: set-matrix
@@ -78,7 +78,7 @@ jobs:
       build-system: 'cmake'
       toolchain: ${{ matrix.toolchain }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain]) }}
-      one-per-family: true
+      build-options: '--one-first'
       upload-metrics: true
 
   code-metrics:
@@ -153,7 +153,7 @@ jobs:
       build-system: 'cmake-make'
       toolchain: 'arm-gcc-${{ matrix.os }}'
       build-args: '["stm32h7"]'
-      one-per-family: true
+      build-options: '--one-random'
 
   # ---------------------------------------
   # Zephyr
@@ -196,7 +196,6 @@ jobs:
       build-system: 'cmake'
       toolchain: ${{ matrix.toolchain }}
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.hil_json)[matrix.toolchain]) }}
-      one-per-family: true
       upload-artifacts: true
 
   # ---------------------------------------
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 2fc0eead0..1cbd02f1b 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -12,10 +12,10 @@ on:
       build-args:
         required: true
         type: string
-      one-per-family:
+      build-options:
         required: false
-        default: false
-        type: boolean
+        default: ''
+        type: string
       upload-artifacts:
         required: false
         default: false
@@ -51,16 +51,6 @@ jobs:
         with:
           arg: ${{ matrix.arg }}
 
-      - name: Set build one-per-family option
-        id: set-one-per-family
-        run: |
-          if [[ "${{ inputs.one-per-family }}" == "true" ]]; then
-            BUILD_OPTION="--one-per-family"
-          fi
-          echo "build_option=$BUILD_OPTION"
-          echo "build_option=$BUILD_OPTION" >> $GITHUB_OUTPUT
-        shell: bash
-
       - name: Build
         env:
           IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
@@ -69,10 +59,10 @@ jobs:
           if [ "$TOOLCHAIN" == "esp-idf" ]; then
             docker run --rm -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py ${{ matrix.arg }}
           elif [ "${{ inputs.build-system }}" == "cmake-make" ] || [ "${{ inputs.build-system }}" == "make-cmake" ]; then
-            python tools/build.py -s make ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
-            python tools/build.py -s cmake ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
+            python tools/build.py -s make ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+            python tools/build.py -s cmake ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
           else
-            python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ steps.set-one-per-family.outputs.build_option }} ${{ matrix.arg }}
+            python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
           fi
         shell: bash
 
diff --git a/hw/bsp/rp2040/skip_ci.txt b/hw/bsp/rp2040/skip_ci.txt
deleted file mode 100644
index fe99c9f65..000000000
--- a/hw/bsp/rp2040/skip_ci.txt
+++ /dev/null
@@ -1,7 +0,0 @@
-# boards in this files are skipped when running CI with this family
-adafruit_feather_rp2040_usb_host
-adafruit_fruit_jam
-adafruit_metro_rp2350
-feather_rp2040_max3421
-pico_sdk
-raspberry_pi_pico_w
diff --git a/tools/build.py b/tools/build.py
index c4f1558c0..87064b7a0 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -27,6 +27,23 @@ verbose = False
 clean_build = False
 parallel_jobs = os.cpu_count()
 
+# CI board control lists (used when running under CI)
+ci_skip_boards = {
+    'rp2040': [
+        'adafruit_feather_rp2040_usb_host',
+        'adafruit_fruit_jam',
+        'adafruit_metro_rp2350',
+        'feather_rp2040_max3421',
+        'pico_sdk',
+        'raspberry_pi_pico_w',
+    ],
+}
+
+ci_preferred_boards = {
+    'stm32h7': ['stm32h743eval'],
+}
+
+
 # -----------------------------
 # Helper
 # -----------------------------
@@ -195,35 +212,40 @@ def build_boards_list(boards, build_defines, build_system, build_flags_on):
     return ret
 
 
-def get_family_boards(family, one_per_family, boards):
+def get_family_boards(family, one_random, one_first):
     """Get list of boards for a family.
 
     Args:
         family: Family name
-        one_per_family: If True, return only one random board
-        boards: List of boards already specified via -b flag
+        one_random: If True, return only one random board
+        one_first: If True, return only the first board (alphabetical)
 
     Returns:
         List of board names
     """
-    skip_ci = []
+    skip_list = []
+    preferred_list = []
     if os.getenv('GITHUB_ACTIONS') or os.getenv('CIRCLECI'):
-        skip_ci_file = Path(f"hw/bsp/{family}/skip_ci.txt")
-        if skip_ci_file.exists():
-            skip_ci = skip_ci_file.read_text().split()
+        skip_list = ci_skip_boards.get(family, [])
+        preferred_list = ci_preferred_boards.get(family, [])
+
     all_boards = []
     for entry in os.scandir(f"hw/bsp/{family}/boards"):
-        if entry.is_dir() and not entry.name in skip_ci:
+        if entry.is_dir() and entry.name not in skip_list:
             all_boards.append(entry.name)
+    if not all_boards:
+        print(f"No boards found for family '{family}'")
+        return []
     all_boards.sort()
 
-    # If only-one flag is set, select one random board
-    if one_per_family:
-        for b in boards:
-            # skip if -b already specify one in this family
-            if find_family(b) == family:
-                return []
-        all_boards = [random.choice(all_boards)]
+    # If only-one flags are set, honor select list first, then pick first or random
+    if one_first or one_random:
+        if preferred_list:
+            return [preferred_list[0]]
+        if one_first:
+            return [all_boards[0]]
+        if one_random:
+            return [random.choice(all_boards)]
 
     return all_boards
 
@@ -244,7 +266,10 @@ def main():
     parser.add_argument('-s', '--build-system', default='cmake', help='Build system to use, default is cmake')
     parser.add_argument('-D', '--define-symbol', action='append', default=[], help='Define to pass to build system')
     parser.add_argument('-f1', '--build-flags-on', action='append', default=[], help='Build flag to pass to build system')
-    parser.add_argument('-1', '--one-per-family', action='store_true', default=False, help='Build only one random board inside a family')
+    parser.add_argument('--one-random', action='store_true', default=False,
+                        help='Build only one random board of each specified family')
+    parser.add_argument('--one-first', action='store_true', default=False,
+                        help='Build only the first board (alphabetical) of each specified family')
     parser.add_argument('-j', '--jobs', type=int, default=os.cpu_count(), help='Number of jobs to run in parallel')
     parser.add_argument('-v', '--verbose', action='store_true', help='Verbose output')
     args = parser.parse_args()
@@ -255,7 +280,8 @@ def main():
     build_system = args.build_system
     build_defines = args.define_symbol
     build_flags_on = args.build_flags_on
-    one_per_family = args.one_per_family
+    one_random = args.one_random
+    one_first = args.one_first
     verbose = args.verbose
     clean_build = args.clean
     parallel_jobs = args.jobs
@@ -283,7 +309,7 @@ def main():
     # get boards from families and append to boards list
     all_boards = list(boards)
     for f in all_families:
-        all_boards.extend(get_family_boards(f, one_per_family, boards))
+        all_boards.extend(get_family_boards(f, one_random, one_first))
 
     # build all boards
     result = build_boards_list(all_boards, build_defines, build_system, build_flags_on)
diff --git a/tools/metrics.py b/tools/metrics.py
index c3b366e42..bdc64fccc 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -245,8 +245,18 @@ def write_compare_markdown(comparison, path, sort_order='size'):
     header += " Total |"
     separator += "------:|"
 
-    md_lines.append(header)
-    md_lines.append(separator)
+    def is_significant(file_row):
+        for s in sections:
+            sd = file_row["sections"][s]
+            diff = abs(sd["diff"])
+            base = sd["base"]
+            if base == 0:
+                if diff != 0:
+                    return True
+            else:
+                if (diff / base) * 100 > 1.0:
+                    return True
+        return False
 
     # Sort files based on sort_order
     if sort_order == 'size-':
@@ -263,38 +273,56 @@ def write_compare_markdown(comparison, path, sort_order='size'):
         reverse = False
     sorted_files = sorted(comparison["files"], key=key_func, reverse=reverse)
 
-    sum_base = {s: 0 for s in sections}
-    sum_base["total"] = 0
-    sum_new = {s: 0 for s in sections}
-    sum_new["total"] = 0
-
+    significant = []
+    minor = []
     for f in sorted_files:
         # Skip files with no changes
         if f["total"]["diff"] == 0 and all(f["sections"][s]["diff"] == 0 for s in sections):
             continue
-
-        row = f"| {f['file']} |"
+        (significant if is_significant(f) else minor).append(f)
+
+    def render_table(title, rows):
+        md_lines.append(f"## {title}")
+        if not rows:
+            md_lines.append("No entries.")
+            md_lines.append("")
+            return
+
+        md_lines.append(header)
+        md_lines.append(separator)
+
+        sum_base = {s: 0 for s in sections}
+        sum_base["total"] = 0
+        sum_new = {s: 0 for s in sections}
+        sum_new["total"] = 0
+
+        for f in rows:
+            row = f"| {f['file']} |"
+            for s in sections:
+                sd = f["sections"][s]
+                sum_base[s] += sd["base"]
+                sum_new[s] += sd["new"]
+                row += f" {format_diff(sd['base'], sd['new'], sd['diff'])} |"
+
+            td = f["total"]
+            sum_base["total"] += td["base"]
+            sum_new["total"] += td["new"]
+            row += f" {format_diff(td['base'], td['new'], td['diff'])} |"
+
+            md_lines.append(row)
+
+        # Add sum row
+        sum_row = "| **SUM** |"
         for s in sections:
-            sd = f["sections"][s]
-            sum_base[s] += sd["base"]
-            sum_new[s] += sd["new"]
-            row += f" {format_diff(sd['base'], sd['new'], sd['diff'])} |"
-
-        td = f["total"]
-        sum_base["total"] += td["base"]
-        sum_new["total"] += td["new"]
-        row += f" {format_diff(td['base'], td['new'], td['diff'])} |"
-
-        md_lines.append(row)
-
-    # Add sum row
-    sum_row = "| **SUM** |"
-    for s in sections:
-        diff = sum_new[s] - sum_base[s]
-        sum_row += f" {format_diff(sum_base[s], sum_new[s], diff)} |"
-    total_diff = sum_new["total"] - sum_base["total"]
-    sum_row += f" {format_diff(sum_base['total'], sum_new['total'], total_diff)} |"
-    md_lines.append(sum_row)
+            diff = sum_new[s] - sum_base[s]
+            sum_row += f" {format_diff(sum_base[s], sum_new[s], diff)} |"
+        total_diff = sum_new["total"] - sum_base["total"]
+        sum_row += f" {format_diff(sum_base['total'], sum_new['total'], total_diff)} |"
+        md_lines.append(sum_row)
+        md_lines.append("")
+
+    render_table("Changes >1% in any section", significant)
+    render_table("Changes <1% in all sections", minor)
 
     with open(path, "w", encoding="utf-8") as f:
         f.write("\n".join(md_lines))
-- 
cgit v1.3.1


From 16c92b50b07f29bd0a9ea1feb927bdcb95be8281 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 Dec 2025 16:27:39 +0700
Subject: update metrics to support bloaty

---
 examples/build_system/cmake/toolchain/common.cmake |   4 +
 hw/bsp/family_support.cmake                        |  45 +-
 src/common/tusb_compiler.h                         |  80 +--
 tools/get_deps.py                                  |   2 +-
 tools/metrics.py                                   | 715 ++++++++++++---------
 5 files changed, 487 insertions(+), 359 deletions(-)

(limited to 'hw')

diff --git a/examples/build_system/cmake/toolchain/common.cmake b/examples/build_system/cmake/toolchain/common.cmake
index 14449b01d..1ef04bc00 100644
--- a/examples/build_system/cmake/toolchain/common.cmake
+++ b/examples/build_system/cmake/toolchain/common.cmake
@@ -26,6 +26,7 @@ if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
     -ffunction-sections
 #    -fsingle-precision-constant # not supported by clang
     -fno-strict-aliasing
+    -g
     )
   list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
     -Wl,--print-memory-usage
@@ -33,6 +34,9 @@ if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
     -Wl,--cref
     )
 elseif (TOOLCHAIN STREQUAL "iar")
+  list(APPEND TOOLCHAIN_COMMON_FLAGS
+    --debug
+    )
   list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
     --diag_suppress=Li065
     )
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 15d9f1eae..62ec412e6 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -10,6 +10,7 @@ get_filename_component(TOP ${TOP} ABSOLUTE)
 
 set(UF2CONV_PY ${TOP}/tools/uf2/utils/uf2conv.py)
 set(LINKERMAP_PY ${TOP}/tools/linkermap/linkermap.py)
+set(METRICS_PY ${TOP}/tools/metrics.py)
 
 function(family_resolve_board BOARD_NAME BOARD_PATH_OUT)
   if ("${BOARD_NAME}" STREQUAL "")
@@ -224,6 +225,33 @@ function(family_initialize_project PROJECT DIR)
   endif()
 endfunction()
 
+# Add bloaty (https://github.com/google/bloaty/) target, required compile with -g (debug)
+function(family_add_bloaty TARGET)
+  find_program(BLOATY_EXE bloaty)
+  if (BLOATY_EXE STREQUAL BLOATY_EXE-NOTFOUND)
+    return()
+  endif ()
+
+  set(OPTION "--domain=vm -d compileunits") # add -d symbol if needed
+  if (DEFINED BLOATY_OPTION)
+    string(APPEND OPTION " ${BLOATY_OPTION}")
+  endif ()
+  separate_arguments(OPTION_LIST UNIX_COMMAND ${OPTION})
+
+  add_custom_target(${TARGET}-bloaty
+    DEPENDS ${TARGET}
+    COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > $<TARGET_FILE:${TARGET}>.bloaty.txt
+    COMMAND cat $<TARGET_FILE:${TARGET}>.bloaty.txt
+    VERBATIM)
+
+  # post build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > $<TARGET_FILE:${TARGET}>.bloaty.txt
+    COMMAND cat $<TARGET_FILE:${TARGET}>.bloaty.txt
+    VERBATIM
+    )
+endfunction()
+
 # Add linkermap target (https://github.com/hathach/linkermap)
 function(family_add_linkermap TARGET)
   set(LINKERMAP_OPTION_LIST)
@@ -232,14 +260,16 @@ function(family_add_linkermap TARGET)
   endif ()
 
   add_custom_target(${TARGET}-linkermap
-    COMMAND python ${LINKERMAP_PY} -j ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    COMMAND python ${LINKERMAP_PY} ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM
     )
 
-  # post build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND python ${LINKERMAP_PY} -j ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
-    VERBATIM)
+  # post build if bloaty not exist
+  if (NOT TARGET ${TARGET}-bloaty)
+    add_custom_command(TARGET ${TARGET} POST_BUILD
+      COMMAND python ${LINKERMAP_PY} ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+      VERBATIM)
+  endif ()
 endfunction()
 
 #-------------------------------------------------------------
@@ -352,8 +382,9 @@ function(family_configure_common TARGET RTOS)
   endif ()
 
   if (NOT RTOS STREQUAL zephyr)
-    # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
-    family_add_linkermap(${TARGET})
+    # Analyze size with bloaty and linkermap
+    family_add_bloaty(${TARGET})
+    family_add_linkermap(${TARGET}) # fall back to linkermap if bloaty not found
   endif ()
 
   # run size after build
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index 7719790d1..c8108264f 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -24,21 +24,13 @@
  * This file is part of the TinyUSB stack.
  */
 
-/** \ingroup Group_Common
- *  \defgroup Group_Compiler Compiler
- *  \brief Group_Compiler brief
- *  @{ */
-
-#ifndef TUSB_COMPILER_H_
-#define TUSB_COMPILER_H_
+#pragma once
 
 #define TU_TOKEN(x)           x
 #define TU_STRING(x)          #x                  ///< stringify without expand
 #define TU_XSTRING(x)         TU_STRING(x)        ///< expand then stringify
-
 #define TU_STRCAT(a, b)       a##b                ///< concat without expand
 #define TU_STRCAT3(a, b, c)   a##b##c             ///< concat without expand
-
 #define TU_XSTRCAT(a, b)      TU_STRCAT(a, b)     ///< expand then concat
 #define TU_XSTRCAT3(a, b, c)  TU_STRCAT3(a, b, c) ///< expand then concat 3 tokens
 
@@ -139,18 +131,20 @@
 #define TU_FUNC_OPTIONAL_ARG(func, ...)   TU_XSTRCAT(func##_arg, TU_ARGS_NUM(__VA_ARGS__))(__VA_ARGS__)
 
 //--------------------------------------------------------------------+
-// Compiler porting with Attribute and Endian
+// Compiler Attribute Abstraction
 //--------------------------------------------------------------------+
+#if defined(__GNUC__) || defined(__ICCARM__) || defined(__TI_COMPILER_VERSION__)
+  #if defined(__ICCARM__)
+    #include <intrinsics.h> // for builtin functions
+  #endif
 
-// TODO refactor since __attribute__ is supported across many compiler
-#if defined(__GNUC__)
-  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
-  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
-  #define TU_ATTR_PACKED                __attribute__ ((packed))
-  #define TU_ATTR_WEAK                  __attribute__ ((weak))
-  // #define TU_ATTR_WEAK_ALIAS(f)         __attribute__ ((weak, alias(#f)))
-  #ifndef TU_ATTR_ALWAYS_INLINE // allow to override for debug
-    #define TU_ATTR_ALWAYS_INLINE       __attribute__ ((always_inline))
+  #define TU_ATTR_ALIGNED(Bytes)    __attribute__((aligned(Bytes)))
+  #define TU_ATTR_SECTION(sec_name) __attribute__((section(#sec_name)))
+  #define TU_ATTR_PACKED            __attribute__((packed))
+  #define TU_ATTR_WEAK              __attribute__((weak))
+// #define TU_ATTR_WEAK_ALIAS(f)         __attribute__ ((weak, alias(#f)))
+  #ifndef TU_ATTR_ALWAYS_INLINE                                            // allow to override for debug
+    #define TU_ATTR_ALWAYS_INLINE __attribute__((always_inline))
   #endif
   #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
   #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
@@ -161,18 +155,17 @@
   #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
   #define TU_ATTR_BIT_FIELD_ORDER_END
 
-  #if __GNUC__ < 5
-    #define TU_ATTR_FALLTHROUGH         do {} while (0)  /* fallthrough */
+  #if (defined(__has_attribute) && __has_attribute(__fallthrough__)) || defined(__TI_COMPILER_VERSION__)
+    #define TU_ATTR_FALLTHROUGH __attribute__((fallthrough))
   #else
-    #if __has_attribute(__fallthrough__)
-      #define TU_ATTR_FALLTHROUGH         __attribute__((fallthrough))
-    #else
-      #define TU_ATTR_FALLTHROUGH         do {} while (0)  /* fallthrough */
-    #endif
+    #define TU_ATTR_FALLTHROUGH     \
+      do {                          \
+      } while (0) /* fallthrough */
   #endif
 
-  // Endian conversion use well-known host to network (big endian) naming
-  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
+// Endian conversion use well-known host to network (big endian) naming
+// For TI ARM compiler, __BYTE_ORDER__ is not defined for MSP430 but still LE
+  #if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__ || defined(__MSP430__)
     #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
   #else
     #define TU_BYTE_ORDER TU_BIG_ENDIAN
@@ -196,33 +189,6 @@
 		#pragma GCC poison tud_vendor_control_request_cb
 	#endif
 
-#elif defined(__TI_COMPILER_VERSION__)
-  #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
-  #define TU_ATTR_SECTION(sec_name)     __attribute__ ((section(#sec_name)))
-  #define TU_ATTR_PACKED                __attribute__ ((packed))
-  #define TU_ATTR_WEAK                  __attribute__ ((weak))
-  // #define TU_ATTR_WEAK_ALIAS(f)         __attribute__ ((weak, alias(#f)))
-  #define TU_ATTR_ALWAYS_INLINE         __attribute__ ((always_inline))
-  #define TU_ATTR_DEPRECATED(mess)      __attribute__ ((deprecated(mess))) // warn if function with this attribute is used
-  #define TU_ATTR_UNUSED                __attribute__ ((unused))           // Function/Variable is meant to be possibly unused
-  #define TU_ATTR_USED                  __attribute__ ((used))
-  #define TU_ATTR_FALLTHROUGH           __attribute__((fallthrough))
-
-  #define TU_ATTR_PACKED_BEGIN
-  #define TU_ATTR_PACKED_END
-  #define TU_ATTR_BIT_FIELD_ORDER_BEGIN
-  #define TU_ATTR_BIT_FIELD_ORDER_END
-
-  // __BYTE_ORDER is defined in the TI ARM compiler, but not MSP430 (which is little endian)
-  #if ((__BYTE_ORDER__) == (__ORDER_LITTLE_ENDIAN__)) || defined(__MSP430__)
-    #define TU_BYTE_ORDER TU_LITTLE_ENDIAN
-  #else
-    #define TU_BYTE_ORDER TU_BIG_ENDIAN
-  #endif
-
-  #define TU_BSWAP16(u16) (__builtin_bswap16(u16))
-  #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
-
 #elif defined(__ICCARM__)
   #include <intrinsics.h>
   #define TU_ATTR_ALIGNED(Bytes)        __attribute__ ((aligned(Bytes)))
@@ -316,7 +282,3 @@
 #else
   #error Byte order is undefined
 #endif
-
-#endif /* TUSB_COMPILER_H_ */
-
-/// @}
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 635f6d59e..f11d8d51e 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        '5f2956943beb76b98fec78d702d8197daa730117',
+                        '23d1c4c84c4866b84cb821fb368bb9991633871d',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
diff --git a/tools/metrics.py b/tools/metrics.py
index d0940c63a..f879a0d34 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -1,15 +1,14 @@
 #!/usr/bin/env python3
-"""Calculate average size from multiple linker map files."""
+"""Calculate average sizes using bloaty output."""
 
 import argparse
+import csv
 import glob
+import io
 import json
-import sys
 import os
-
-# Add linkermap module to path
-sys.path.insert(0, os.path.join(os.path.dirname(__file__), 'linkermap'))
-import linkermap
+import sys
+from collections import defaultdict
 
 
 def expand_files(file_patterns):
@@ -30,60 +29,105 @@ def expand_files(file_patterns):
     return expanded
 
 
-def combine_maps(map_files, filters=None):
-    """Combine multiple map files into a list of json_data.
+def parse_bloaty_csv(csv_text, filters=None):
+    """Parse bloaty CSV text and return normalized JSON data structure."""
 
-    Args:
-        map_files: List of paths to linker map files or JSON files
-        filters: List of path substrings to filter object files (default: [])
-
-    Returns:
-        all_json_data: Dictionary with mapfiles list and data from each map file
-    """
     filters = filters or []
-    all_json_data = {"mapfiles": [], "data": []}
+    reader = csv.DictReader(io.StringIO(csv_text))
+    size_by_unit = defaultdict(int)
+    symbols_by_unit: dict[str, defaultdict[str, int]] = defaultdict(lambda: defaultdict(int))
+    sections_by_unit: dict[str, defaultdict[str, int]] = defaultdict(lambda: defaultdict(int))
+
+    for row in reader:
+        compile_unit = row.get("compileunits") or row.get("compileunit") or row.get("path")
+        if compile_unit is None:
+            continue
 
-    def _normalize_json(json_data):
-        """Flatten verbose linkermap JSON (per-symbol dicts) to per-section totals."""
+        if str(compile_unit).upper() == "TOTAL":
+            continue
 
-        for f in json_data.get("files", []):
-            collapsed = {}
-            for section, val in f.get("sections", {}).items():
-                collapsed[section] = sum(val.values()) if isinstance(val, dict) else val
+        if filters and not any(filt in compile_unit for filt in filters):
+            continue
 
-            # Replace sections with collapsed totals
-            f["sections"] = collapsed
+        try:
+            vmsize = int(row.get("vmsize", 0))
+        except ValueError:
+            continue
 
-            # Ensure total is a number derived from sections
-            f["total"] = sum(collapsed.values())
+        size_by_unit[compile_unit] += vmsize
+        symbol_name = row.get("symbols", "")
+        if symbol_name:
+            symbols_by_unit[compile_unit][symbol_name] += vmsize
+        section_name = row.get("sections") or row.get("section")
+        if section_name and vmsize:
+            sections_by_unit[compile_unit][section_name] += vmsize
+
+    files = []
+    for unit_path, total_size in size_by_unit.items():
+        symbols = [
+            {"name": sym, "size": sz}
+            for sym, sz in sorted(symbols_by_unit[unit_path].items(), key=lambda x: x[1], reverse=True)
+        ]
+        sections = {sec: sz for sec, sz in sections_by_unit[unit_path].items() if sz}
+        files.append(
+            {
+                "file": os.path.basename(unit_path) or unit_path,
+                "path": unit_path,
+                "size": total_size,
+                "total": total_size,
+                "symbols": symbols,
+                "sections": sections,
+            }
+        )
+
+    total_all = sum(size_by_unit.values())
+    return {"files": files, "TOTAL": total_all}
+
+
+def combine_files(input_files, filters=None):
+    """Combine multiple bloaty outputs into a single data set."""
 
-        return json_data
+    filters = filters or []
+    all_json_data = {"file_list": [], "data": []}
 
-    for map_file in map_files:
-        if not os.path.exists(map_file):
-            print(f"Warning: {map_file} not found, skipping", file=sys.stderr)
+    for fin in input_files:
+        if not os.path.exists(fin):
+            print(f"Warning: {fin} not found, skipping", file=sys.stderr)
             continue
 
         try:
-            if map_file.endswith('.json'):
-                with open(map_file, 'r', encoding='utf-8') as f:
+            if fin.endswith(".json"):
+                with open(fin, "r", encoding="utf-8") as f:
                     json_data = json.load(f)
-
-                json_data = _normalize_json(json_data)
-
-                # Apply path filters to JSON data
                 if filters:
-                    filtered_files = [
-                        f for f in json_data.get("files", [])
+                    json_data["files"] = [
+                        f
+                        for f in json_data.get("files", [])
                         if f.get("path") and any(filt in f["path"] for filt in filters)
                     ]
-                    json_data["files"] = filtered_files
+            elif fin.endswith(".csv"):
+                with open(fin, "r", encoding="utf-8") as f:
+                    csv_text = f.read()
+                json_data = parse_bloaty_csv(csv_text, filters)
             else:
-                json_data = linkermap.analyze_map(map_file, filters=filters)
-            all_json_data["mapfiles"].append(map_file)
+                if fin.endswith(".elf"):
+                    print(f"Warning: {fin} is an ELF; please run bloaty with --csv output first. Skipping.",
+                          file=sys.stderr)
+                else:
+                    print(f"Warning: {fin} is not a supported CSV or JSON metrics input. Skipping.",
+                          file=sys.stderr)
+                continue
+
+            # Drop any fake TOTAL entries that slipped in as files
+            json_data["files"] = [
+                f for f in json_data.get("files", [])
+                if str(f.get("file", "")).upper() != "TOTAL"
+            ]
+
+            all_json_data["file_list"].append(fin)
             all_json_data["data"].append(json_data)
-        except Exception as e:
-            print(f"Warning: Failed to analyze {map_file}: {e}", file=sys.stderr)
+        except Exception as e:  # pragma: no cover - defensive
+            print(f"Warning: Failed to analyze {fin}: {e}", file=sys.stderr)
             continue
 
     return all_json_data
@@ -93,7 +137,7 @@ def compute_avg(all_json_data):
     """Compute average sizes from combined json_data.
 
     Args:
-        all_json_data: Dictionary with mapfiles and data from combine_maps()
+        all_json_data: Dictionary with file_list and data from combine_files()
 
     Returns:
         json_average: Dictionary with averaged size data
@@ -101,128 +145,133 @@ def compute_avg(all_json_data):
     if not all_json_data["data"]:
         return None
 
-    # Collect all sections preserving order
-    all_sections = []
-    for json_data in all_json_data["data"]:
-        for s in json_data["sections"]:
-            if s not in all_sections:
-                all_sections.append(s)
-
     # Merge files with the same 'file' value and compute averages
-    file_accumulator = {}  # key: file name, value: {"sections": {section: [sizes]}, "totals": [totals]}
+    file_accumulator = {}  # key: file name, value: {"sizes": [sizes], "totals": [totals], "symbols": {name: [sizes]}, "sections": {name: [sizes]}}
 
     for json_data in all_json_data["data"]:
-        for f in json_data["files"]:
+        for f in json_data.get("files", []):
             fname = f["file"]
             if fname not in file_accumulator:
-                file_accumulator[fname] = {"sections": {}, "totals": [], "path": f.get("path")}
-            file_accumulator[fname]["totals"].append(f["total"])
-            for section, size in f["sections"].items():
-                if section in file_accumulator[fname]["sections"]:
-                    file_accumulator[fname]["sections"][section].append(size)
-                else:
-                    file_accumulator[fname]["sections"][section] = [size]
+                file_accumulator[fname] = {
+                    "sizes": [],
+                    "totals": [],
+                    "path": f.get("path"),
+                    "symbols": defaultdict(list),
+                    "sections": defaultdict(list),
+                }
+            size_val = f.get("size", f.get("total", 0))
+            file_accumulator[fname]["sizes"].append(size_val)
+            file_accumulator[fname]["totals"].append(f.get("total", size_val))
+            for sym in f.get("symbols", []):
+                name = sym.get("name")
+                if name is None:
+                    continue
+                file_accumulator[fname]["symbols"][name].append(sym.get("size", 0))
+            sections_map = f.get("sections") or {}
+            if isinstance(sections_map, list):
+                sections_map = {
+                    s.get("name"): s.get("size", 0)
+                    for s in sections_map
+                    if isinstance(s, dict) and s.get("name")
+                }
+            for sname, ssize in sections_map.items():
+                file_accumulator[fname]["sections"][sname].append(ssize)
 
     # Build json_average with averaged values
     files_average = []
     for fname, data in file_accumulator.items():
-        avg_total = round(sum(data["totals"]) / len(data["totals"]))
-        avg_sections = {}
-        for section, sizes in data["sections"].items():
-            avg_sections[section] = round(sum(sizes) / len(sizes))
-        files_average.append({
-            "file": fname,
-            "path": data["path"],
-            "sections": avg_sections,
-            "total": avg_total
-        })
+        avg_size = round(sum(data["sizes"]) / len(data["sizes"])) if data["sizes"] else 0
+        symbols_avg = []
+        for sym_name, sizes in data["symbols"].items():
+            if not sizes:
+                continue
+            symbols_avg.append({"name": sym_name, "size": round(sum(sizes) / len(sizes))})
+        symbols_avg.sort(key=lambda x: x["size"], reverse=True)
+        sections_avg = {
+            sec_name: round(sum(sizes) / len(sizes))
+            for sec_name, sizes in data["sections"].items()
+            if sizes
+        }
+        files_average.append(
+            {
+                "file": fname,
+                "path": data["path"],
+                "size": avg_size,
+                "symbols": symbols_avg,
+                "sections": sections_avg,
+            }
+        )
+
+    totals_list = [d.get("TOTAL") for d in all_json_data["data"] if isinstance(d.get("TOTAL"), (int, float))]
+    total_size = round(sum(totals_list) / len(totals_list)) if totals_list else (
+            sum(f["size"] for f in files_average) or 1)
+
+    for f in files_average:
+        f["percent"] = (f["size"] / total_size) * 100 if total_size else 0
+        for sym in f["symbols"]:
+            sym["percent"] = (sym["size"] / f["size"]) * 100 if f["size"] else 0
 
     json_average = {
-        "mapfiles": all_json_data["mapfiles"],
-        "sections": all_sections,
-        "files": files_average
+        "file_list": all_json_data["file_list"],
+        "TOTAL": total_size,
+        "files": files_average,
     }
 
     return json_average
 
 
-def compare_maps(base_file, new_file, filters=None):
-    """Compare two map/json files and generate difference report.
-
-    Args:
-        base_file: Path to base map/json file
-        new_file: Path to new map/json file
-        filters: List of path substrings to filter object files
-
-    Returns:
-        Dictionary with comparison data
-    """
+def compare_files(base_file, new_file, filters=None):
+    """Compare two CSV or JSON inputs and generate difference report."""
     filters = filters or []
 
-    # Load both files
-    base_data = combine_maps([base_file], filters)
-    new_data = combine_maps([new_file], filters)
-
-    if not base_data["data"] or not new_data["data"]:
-        return None
-
-    base_avg = compute_avg(base_data)
-    new_avg = compute_avg(new_data)
+    base_avg = compute_avg(combine_files([base_file], filters))
+    new_avg = compute_avg(combine_files([new_file], filters))
 
     if not base_avg or not new_avg:
         return None
 
-    # Collect all sections from both
-    all_sections = list(base_avg["sections"])
-    for s in new_avg["sections"]:
-        if s not in all_sections:
-            all_sections.append(s)
-
-    # Build file lookup
     base_files = {f["file"]: f for f in base_avg["files"]}
     new_files = {f["file"]: f for f in new_avg["files"]}
-
-    # Get all file names
     all_file_names = set(base_files.keys()) | set(new_files.keys())
 
-    # Build comparison data
-    comparison = []
+    comparison_files = []
     for fname in sorted(all_file_names):
-        base_f = base_files.get(fname)
-        new_f = new_files.get(fname)
-
-        row = {"file": fname, "sections": {}, "total": {}}
-
-        for section in all_sections:
-            base_val = base_f["sections"].get(section, 0) if base_f else 0
-            new_val = new_f["sections"].get(section, 0) if new_f else 0
-            row["sections"][section] = {"base": base_val, "new": new_val, "diff": new_val - base_val}
-
-        base_total = base_f["total"] if base_f else 0
-        new_total = new_f["total"] if new_f else 0
-        row["total"] = {"base": base_total, "new": new_total, "diff": new_total - base_total}
+        b = base_files.get(fname, {})
+        n = new_files.get(fname, {})
+        b_size = b.get("size", 0)
+        n_size = n.get("size", 0)
+
+        # Symbol diffs
+        b_syms = {s["name"]: s for s in b.get("symbols", [])}
+        n_syms = {s["name"]: s for s in n.get("symbols", [])}
+        all_syms = set(b_syms.keys()) | set(n_syms.keys())
+        symbols = []
+        for sym in all_syms:
+            sb = b_syms.get(sym, {}).get("size", 0)
+            sn = n_syms.get(sym, {}).get("size", 0)
+            symbols.append({"name": sym, "base": sb, "new": sn, "diff": sn - sb})
+        symbols.sort(key=lambda x: abs(x["diff"]), reverse=True)
+
+        comparison_files.append({
+            "file": fname,
+            "size": {"base": b_size, "new": n_size, "diff": n_size - b_size},
+            "symbols": symbols,
+        })
 
-        comparison.append(row)
+    total = {
+        "base": base_avg.get("TOTAL", 0),
+        "new": new_avg.get("TOTAL", 0),
+        "diff": new_avg.get("TOTAL", 0) - base_avg.get("TOTAL", 0),
+    }
 
     return {
         "base_file": base_file,
         "new_file": new_file,
-        "sections": all_sections,
-        "files": comparison
+        "total": total,
+        "files": comparison_files,
     }
 
 
-def format_diff(base, new, diff):
-    """Format a diff value with percentage."""
-    if diff == 0:
-        return f"{new}"
-    if base == 0 or new == 0:
-        return f"{base} ➙ {new}"
-    pct = (diff / base) * 100
-    sign = "+" if diff > 0 else ""
-    return f"{base} ➙ {new} ({sign}{diff}, {sign}{pct:.1f}%)"
-
-
 def get_sort_key(sort_order):
     """Get sort key function based on sort order.
 
@@ -232,131 +281,148 @@ def get_sort_key(sort_order):
     Returns:
         Tuple of (key_func, reverse)
     """
+
+    def _size_val(entry):
+        if isinstance(entry.get('total'), int):
+            return entry.get('total', 0)
+        if isinstance(entry.get('total'), dict):
+            return entry['total'].get('new', 0)
+        return entry.get('size', 0)
+
     if sort_order == 'size-':
-        return lambda x: x.get('total', 0) if isinstance(x.get('total'), int) else x['total']['new'], True
+        return _size_val, True
     elif sort_order == 'size+':
-        return lambda x: x.get('total', 0) if isinstance(x.get('total'), int) else x['total']['new'], False
+        return _size_val, False
     elif sort_order == 'name-':
         return lambda x: x.get('file', ''), True
     else:  # name+
         return lambda x: x.get('file', ''), False
 
 
+def write_json_output(json_data, path):
+    """Write JSON output with indentation."""
+
+    with open(path, "w", encoding="utf-8") as outf:
+        json.dump(json_data, outf, indent=2)
+
+
+def render_combine_table(json_data, sort_order='name+'):
+    """Render averaged sizes as markdown table lines (no title)."""
+    files = json_data.get("files", [])
+    if not files:
+        return ["No entries."]
+
+    key_func, reverse = get_sort_key(sort_order)
+    files_sorted = sorted(files, key=key_func, reverse=reverse)
+
+    total_size = json_data.get("TOTAL") or (sum(f.get("size", 0) for f in files_sorted) or 1)
+
+    pct_strings = [
+        f"{(f.get('percent') if f.get('percent') is not None else (f.get('size', 0) / total_size * 100 if total_size else 0)):.1f}%"
+        for f in files_sorted]
+    pct_width = 6
+    size_width = max(len("size"), *(len(str(f.get("size", 0))) for f in files_sorted), len(str(total_size)))
+    file_width = max(len("File"), *(len(f.get("file", "")) for f in files_sorted), len("TOTAL"))
+
+    # Build section totals on the fly from file data
+    sections_global = defaultdict(int)
+    for f in files_sorted:
+        for name, size in (f.get("sections") or {}).items():
+            sections_global[name] += size
+    # Display sections in reverse alphabetical order for stable column layout
+    section_names = sorted(sections_global.keys(), reverse=True)
+    section_widths = {}
+    for name in section_names:
+        max_val = max((f.get("sections", {}).get(name, 0) for f in files_sorted), default=0)
+        section_widths[name] = max(len(name), len(str(max_val)), 1)
+
+    if not section_names:
+        header = f"| {'File':<{file_width}} | {'size':>{size_width}} | {'%':>{pct_width}} |"
+        separator = f"| :{'-' * (file_width - 1)} | {'-' * (size_width - 1)}: | {'-' * (pct_width - 1)}: |"
+    else:
+        header_parts = [f"| {'File':<{file_width}} |"]
+        sep_parts = [f"| :{'-' * (file_width - 1)} |"]
+        for name in section_names:
+            header_parts.append(f" {name:>{section_widths[name]}} |")
+            sep_parts.append(f" {'-' * (section_widths[name] - 1)}: |")
+        header_parts.append(f" {'size':>{size_width}} | {'%':>{pct_width}} |")
+        sep_parts.append(f" {'-' * (size_width - 1)}: | {'-' * (pct_width - 1)}: |")
+        header = "".join(header_parts)
+        separator = "".join(sep_parts)
+
+    lines = [header, separator]
+
+    for f, pct_str in zip(files_sorted, pct_strings):
+        size_val = f.get("size", 0)
+        parts = [f"| {f.get('file', ''):<{file_width}} |"]
+        if section_names:
+            sections_map = f.get("sections") or {}
+            if isinstance(sections_map, list):
+                sections_map = {
+                    s.get("name"): s.get("size", 0)
+                    for s in sections_map
+                    if isinstance(s, dict) and s.get("name")
+                }
+            for name in section_names:
+                parts.append(f" {sections_map.get(name, 0):>{section_widths[name]}} |")
+        parts.append(f" {size_val:>{size_width}} | {pct_str:>{pct_width}} |")
+        lines.append("".join(parts))
+
+    total_parts = [f"| {'TOTAL':<{file_width}} |"]
+    if section_names:
+        for name in section_names:
+            total_parts.append(f" {sections_global.get(name, 0):>{section_widths[name]}} |")
+    total_parts.append(f" {total_size:>{size_width}} | {'100.0%':>{pct_width}} |")
+    lines.append("".join(total_parts))
+    return lines
+
+
+def write_combine_markdown(json_data, path, sort_order='name+', title="TinyUSB Average Code Size Metrics"):
+    """Write averaged size data to a markdown file."""
+
+    md_lines = [f"# {title}", ""]
+    md_lines.extend(render_combine_table(json_data, sort_order))
+    md_lines.append("")
+
+    if json_data.get("file_list"):
+        md_lines.extend(["<details>", "<summary>Input files</summary>", ""])
+        md_lines.extend([f"- {mf}" for mf in json_data["file_list"]])
+        md_lines.extend(["", "</details>", ""])
+
+    with open(path, "w", encoding="utf-8") as f:
+        f.write("\n".join(md_lines))
+
+
 def write_compare_markdown(comparison, path, sort_order='size'):
     """Write comparison data to markdown file."""
-    sections = comparison["sections"]
-
     md_lines = [
         "# Size Difference Report",
         "",
-        "Because TinyUSB code size varies by port and configuration, the metrics below represent the averaged totals across all example builds."
+        "Because TinyUSB code size varies by port and configuration, the metrics below represent the averaged totals across all example builds.",
         "",
         "Note: If there is no change, only one value is shown.",
         "",
     ]
 
-    # Build header
-    header = "| File |"
-    separator = "|:-----|"
-    for s in sections:
-        header += f" {s} |"
-        separator += "-----:|"
-    header += " Total |"
-    separator += "------:|"
-
-    def is_significant(file_row):
-        for s in sections:
-            sd = file_row["sections"][s]
-            diff = abs(sd["diff"])
-            base = sd["base"]
-            if base == 0:
-                if diff != 0:
-                    return True
-            else:
-                if (diff / base) * 100 > 1.0:
-                    return True
-        return False
-
-    # Sort files based on sort_order
-    if sort_order == 'size-':
-        key_func = lambda x: abs(x["total"]["diff"])
-        reverse = True
-    elif sort_order in ('size', 'size+'):
-        key_func = lambda x: abs(x["total"]["diff"])
-        reverse = False
-    elif sort_order == 'name-':
-        key_func = lambda x: x['file']
-        reverse = True
-    else:  # name or name+
-        key_func = lambda x: x['file']
-        reverse = False
-    sorted_files = sorted(comparison["files"], key=key_func, reverse=reverse)
-
-    significant = []
-    minor = []
-    unchanged = []
-    for f in sorted_files:
-        no_change = f["total"]["diff"] == 0 and all(f["sections"][s]["diff"] == 0 for s in sections)
-        if no_change:
-            unchanged.append(f)
-        else:
-            (significant if is_significant(f) else minor).append(f)
+    significant, minor, unchanged = _split_by_significance(comparison["files"], sort_order)
 
-    def render_table(title, rows, collapsed=False):
+    def render(title, rows, collapsed=False):
         if collapsed:
             md_lines.append(f"<details><summary>{title}</summary>")
             md_lines.append("")
         else:
             md_lines.append(f"## {title}")
 
-        if not rows:
-            md_lines.append("No entries.")
-            md_lines.append("")
-            if collapsed:
-                md_lines.append("</details>")
-                md_lines.append("")
-            return
-
-        md_lines.append(header)
-        md_lines.append(separator)
-
-        sum_base = {s: 0 for s in sections}
-        sum_base["total"] = 0
-        sum_new = {s: 0 for s in sections}
-        sum_new["total"] = 0
-
-        for f in rows:
-            row = f"| {f['file']} |"
-            for s in sections:
-                sd = f["sections"][s]
-                sum_base[s] += sd["base"]
-                sum_new[s] += sd["new"]
-                row += f" {format_diff(sd['base'], sd['new'], sd['diff'])} |"
-
-            td = f["total"]
-            sum_base["total"] += td["base"]
-            sum_new["total"] += td["new"]
-            row += f" {format_diff(td['base'], td['new'], td['diff'])} |"
-
-            md_lines.append(row)
-
-        # Add sum row
-        sum_row = "| **SUM** |"
-        for s in sections:
-            diff = sum_new[s] - sum_base[s]
-            sum_row += f" {format_diff(sum_base[s], sum_new[s], diff)} |"
-        total_diff = sum_new["total"] - sum_base["total"]
-        sum_row += f" {format_diff(sum_base['total'], sum_new['total'], total_diff)} |"
-        md_lines.append(sum_row)
+        md_lines.extend(render_compare_table(_build_rows(rows, sort_order), include_sum=True))
         md_lines.append("")
 
         if collapsed:
             md_lines.append("</details>")
             md_lines.append("")
 
-    render_table("Changes >1% in any section", significant)
-    render_table("Changes <1% in all sections", minor)
-    render_table("No changes", unchanged, collapsed=True)
+    render("Changes >1% in size", significant)
+    render("Changes <1% in size", minor)
+    render("No changes", unchanged, collapsed=True)
 
     with open(path, "w", encoding="utf-8") as f:
         f.write("\n".join(md_lines))
@@ -365,14 +431,22 @@ def write_compare_markdown(comparison, path, sort_order='size'):
 def print_compare_summary(comparison, sort_order='name+'):
     """Print diff report to stdout in table form."""
 
-    sections = comparison["sections"]
     files = comparison["files"]
 
+    rows = _build_rows(files, sort_order)
+    lines = render_compare_table(rows, include_sum=True)
+    for line in lines:
+        print(line)
+
+
+def _build_rows(files, sort_order):
+    """Sort files and prepare printable fields."""
+
     def sort_key(file_row):
         if sort_order == 'size-':
-            return abs(file_row["total"]["diff"])
+            return abs(file_row["size"]["diff"])
         if sort_order in ('size', 'size+'):
-            return abs(file_row["total"]["diff"])
+            return abs(file_row["size"]["diff"])
         if sort_order == 'name-':
             return file_row['file']
         return file_row['file']
@@ -380,63 +454,118 @@ def print_compare_summary(comparison, sort_order='name+'):
     reverse = sort_order in ('size-', 'name-')
     files_sorted = sorted(files, key=sort_key, reverse=reverse)
 
-    # Build formatted rows first to compute column widths precisely
     rows = []
-    value_lengths = []
     for f in files_sorted:
-        section_vals = {}
-        for s in sections:
-            sd = f["sections"][s]
-            text = format_diff(sd['base'], sd['new'], sd['diff'])
-            section_vals[s] = text
-            value_lengths.append(len(text))
-        td = f["total"]
-        total_text = format_diff(td['base'], td['new'], td['diff'])
-        value_lengths.append(len(total_text))
-        rows.append({"file": f['file'], "sections": section_vals, "total": total_text, "raw": f})
-
-    # Column widths
-    name_width = max(len(r["file"]) for r in rows) if rows else len("File")
-    name_width = max(name_width, len("File"), 3)  # at least width of SUM
-    col_width = max(12, *(len(s) for s in sections), len("Total"), *(value_lengths or [0]))
-
-    ffmt = '{:' + f'>{name_width}' + '} |'
-    col_fmt = '{:' + f'>{col_width}' + '}'
-
-    header = ffmt.format('File') + ''.join(col_fmt.format(s) + ' |' for s in sections) + col_fmt.format('Total')
-    print(header)
-    print('-' * len(header))
-
-    sum_base = {s: 0 for s in sections}
-    sum_new = {s: 0 for s in sections}
-
-    for row in rows:
-        line = ffmt.format(row['file'])
-        for s in sections:
-            sd = row["raw"]["sections"][s]
-            sum_base[s] += sd["base"]
-            sum_new[s] += sd["new"]
-            line += col_fmt.format(row['sections'][s]) + ' |'
-
-        line += col_fmt.format(row['total'])
-        print(line)
+        sd = f["size"]
+        diff_val = sd['new'] - sd['base']
+        if sd['base'] == 0:
+            pct_str = "n/a"
+        else:
+            pct_val = (diff_val / sd['base']) * 100
+            pct_str = f"{pct_val:+.1f}%"
+        rows.append({
+            "file": f['file'],
+            "base": sd['base'],
+            "new": sd['new'],
+            "diff": diff_val,
+            "pct": pct_str,
+        })
+    return rows
 
-    # Sum row
-    sum_row = ffmt.format('SUM')
-    for s in sections:
-        diff = sum_new[s] - sum_base[s]
-        sum_row += col_fmt.format(format_diff(sum_base[s], sum_new[s], diff)) + ' |'
-    total_base = sum(sum_base.values())
-    total_new = sum(sum_new.values())
-    sum_row += col_fmt.format(format_diff(total_base, total_new, total_new - total_base))
-    print('-' * len(header))
-    print(sum_row)
+
+def _split_by_significance(files, sort_order):
+    """Split files into >1% changes, <1% changes, and no changes."""
+
+    def is_significant(file_row):
+        base = file_row["size"]["base"]
+        diff = abs(file_row["size"]["diff"])
+        if base == 0:
+            return diff != 0
+        return (diff / base) * 100 > 1.0
+
+    rows_sorted = sorted(
+        files,
+        key=lambda f: abs(f["size"]["diff"]) if sort_order.startswith("size") else f["file"],
+        reverse=sort_order in ('size-', 'name-'),
+    )
+
+    significant = []
+    minor = []
+    unchanged = []
+    for f in rows_sorted:
+        if f["size"]["diff"] == 0:
+            unchanged.append(f)
+        else:
+            (significant if is_significant(f) else minor).append(f)
+
+    return significant, minor, unchanged
+
+
+def render_compare_table(rows, include_sum):
+    """Return markdown table lines for given rows."""
+    if not rows:
+        return ["No entries.", ""]
+
+    sum_base = sum(r["base"] for r in rows)
+    sum_new = sum(r["new"] for r in rows)
+    total_diff = sum_new - sum_base
+    total_pct = "n/a" if sum_base == 0 else f"{(total_diff / sum_base) * 100:+.1f}%"
+
+    base_width = max(len("base"), *(len(str(r["base"])) for r in rows))
+    new_width = max(len("new"), *(len(str(r["new"])) for r in rows))
+    diff_width = max(len("diff"), *(len(f"{r['diff']:+}") for r in rows))
+    pct_width = max(len("% diff"), *(len(r["pct"]) for r in rows))
+    name_width = max(len("file"), *(len(r["file"]) for r in rows))
+
+    if include_sum:
+        base_width = max(base_width, len(str(sum_base)))
+        new_width = max(new_width, len(str(sum_new)))
+        diff_width = max(diff_width, len(f"{total_diff:+}"))
+        pct_width = max(pct_width, len(total_pct))
+        name_width = max(name_width, len("TOTAL"))
+
+    header = (
+        f"| {'file':<{name_width}} | "
+        f"{'base':>{base_width}} | "
+        f"{'new':>{new_width}} | "
+        f"{'diff':>{diff_width}} | "
+        f"{'% diff':>{pct_width}} |"
+    )
+    separator = (
+        f"| :{'-' * (name_width - 1)} | "
+        f"{'-' * base_width}:| "
+        f"{'-' * new_width}:| "
+        f"{'-' * diff_width}:| "
+        f"{'-' * pct_width}:|"
+    )
+
+    lines = [header, separator]
+
+    for r in rows:
+        diff_str = f"{r['diff']:+}"
+        lines.append(
+            f"| {r['file']:<{name_width}} | "
+            f"{str(r['base']):>{base_width}} | "
+            f"{str(r['new']):>{new_width}} | "
+            f"{diff_str:>{diff_width}} | "
+            f"{r['pct']:>{pct_width}} |"
+        )
+
+    if include_sum:
+        lines.append(
+            f"| {'TOTAL':<{name_width}} | "
+            f"{sum_base:>{base_width}} | "
+            f"{sum_new:>{new_width}} | "
+            f"{total_diff:+{diff_width}d} | "
+            f"{total_pct:>{pct_width}} |"
+        )
+    return lines
 
 
 def cmd_combine(args):
     """Handle combine subcommand."""
-    map_files = expand_files(args.files)
-    all_json_data = combine_maps(map_files, args.filters)
+    input_files = expand_files(args.files)
+    all_json_data = combine_files(input_files, args.filters)
     json_average = compute_avg(all_json_data)
 
     if json_average is None:
@@ -444,17 +573,18 @@ def cmd_combine(args):
         sys.exit(1)
 
     if not args.quiet:
-        linkermap.print_summary(json_average, False, args.sort)
+        for line in render_combine_table(json_average, sort_order=args.sort):
+            print(line)
     if args.json_out:
-        linkermap.write_json(json_average, args.out + '.json')
+        write_json_output(json_average, args.out + '.json')
     if args.markdown_out:
-        linkermap.write_markdown(json_average, args.out + '.md', sort_opt=args.sort,
-                                 title="TinyUSB Average Code Size Metrics")
+        write_combine_markdown(json_average, args.out + '.md', sort_order=args.sort,
+                               title="TinyUSB Average Code Size Metrics")
 
 
 def cmd_compare(args):
     """Handle compare subcommand."""
-    comparison = compare_maps(args.base, args.new, args.filters)
+    comparison = compare_files(args.base, args.new, args.filters)
 
     if comparison is None:
         print("Failed to compare files", file=sys.stderr)
@@ -472,10 +602,11 @@ def main(argv=None):
     subparsers = parser.add_subparsers(dest='command', required=True, help='Available commands')
 
     # Combine subcommand
-    combine_parser = subparsers.add_parser('combine', help='Combine and average multiple map files')
-    combine_parser.add_argument('files', nargs='+', help='Path to map file(s) or glob pattern(s)')
+    combine_parser = subparsers.add_parser('combine', help='Combine and average multiple bloaty outputs')
+    combine_parser.add_argument('files', nargs='+',
+                                help='Path to bloaty CSV output or JSON file(s) or glob pattern(s)')
     combine_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
-                                help='Only include object files whose path contains this substring (can be repeated)')
+                                help='Only include compile units whose path contains this substring (can be repeated)')
     combine_parser.add_argument('-o', '--out', dest='out', default='metrics',
                                 help='Output path basename for JSON and Markdown files (default: metrics)')
     combine_parser.add_argument('-j', '--json', dest='json_out', action='store_true',
@@ -484,16 +615,16 @@ def main(argv=None):
                                 help='Write Markdown output file')
     combine_parser.add_argument('-q', '--quiet', dest='quiet', action='store_true',
                                 help='Suppress summary output')
-    combine_parser.add_argument('-S', '--sort', dest='sort', default='name+',
+    combine_parser.add_argument('-S', '--sort', dest='sort', default='size-',
                                 choices=['size', 'size-', 'size+', 'name', 'name-', 'name+'],
-                                help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: name+')
+                                help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: size-')
 
     # Compare subcommand
-    compare_parser = subparsers.add_parser('compare', help='Compare two map files')
-    compare_parser.add_argument('base', help='Base map/json file')
-    compare_parser.add_argument('new', help='New map/json file')
+    compare_parser = subparsers.add_parser('compare', help='Compare two bloaty outputs (CSV) or JSON inputs')
+    compare_parser.add_argument('base', help='Base CSV/JSON file')
+    compare_parser.add_argument('new', help='New CSV/JSON file')
     compare_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
-                                help='Only include object files whose path contains this substring (can be repeated)')
+                                help='Only include compile units whose path contains this substring (can be repeated)')
     compare_parser.add_argument('-o', '--out', dest='out', default='metrics_compare',
                                 help='Output path basename for Markdown file (default: metrics_compare)')
     compare_parser.add_argument('-S', '--sort', dest='sort', default='name+',
-- 
cgit v1.3.1


From 919ee4b1527469e327710cff936366328f97294a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 9 Dec 2025 20:11:18 +0700
Subject: update metrics to support bloaty csv

---
 .circleci/config2.yml                              |   1 -
 .github/workflows/build.yml                        |   3 +-
 .../build_system/cmake/toolchain/arm_clang.cmake   |   1 -
 examples/build_system/cmake/toolchain/common.cmake |  41 +++---
 hw/bsp/family_support.cmake                        |  33 ++---
 src/common/tusb_compiler.h                         |   6 +-
 src/portable/synopsys/dwc2/hcd_dwc2.c              |   2 +-
 tools/get_deps.py                                  |   2 +-
 tools/metrics.py                                   | 152 ++++++++++++---------
 9 files changed, 124 insertions(+), 117 deletions(-)

(limited to 'hw')

diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index a39682067..352d0f4fa 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -227,7 +227,6 @@ jobs:
           name: Aggregate Code Metrics
           command: |
             python tools/get_deps.py
-            pip install tools/linkermap/
             # Combine all metrics files from all toolchain subdirectories
             ls -R /tmp/metrics
             if ls /tmp/metrics/*/*.json 1> /dev/null 2>&1; then
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 5017cb3cd..9d94a3b9b 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -100,7 +100,6 @@ jobs:
       - name: Aggregate Code Metrics
         run: |
           python tools/get_deps.py
-          pip install tools/linkermap/
           python tools/metrics.py combine -j -m -f tinyusb/src cmake-build/*/metrics.json
 
       - name: Upload Metrics Artifact
@@ -124,7 +123,7 @@ jobs:
         if: github.event_name != 'push'
         run: |
           if [ -f base-metrics/metrics.json ]; then
-            python tools/metrics.py compare -f tinyusb/src base-metrics/metrics.json metrics.json
+            python tools/metrics.py compare -m -f tinyusb/src base-metrics/metrics.json metrics.json
             cat metrics_compare.md
           else
             echo "No base metrics found, skipping comparison"
diff --git a/examples/build_system/cmake/toolchain/arm_clang.cmake b/examples/build_system/cmake/toolchain/arm_clang.cmake
index dba637367..e5ca82fab 100644
--- a/examples/build_system/cmake/toolchain/arm_clang.cmake
+++ b/examples/build_system/cmake/toolchain/arm_clang.cmake
@@ -7,7 +7,6 @@ if (NOT DEFINED CMAKE_CXX_COMPILER)
 endif ()
 
 set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
-set(TOOLCHAIN_ASM_FLAGS "-x assembler-with-cpp")
 
 find_program(CMAKE_SIZE llvm-size)
 find_program(CMAKE_OBJCOPY llvm-objcopy)
diff --git a/examples/build_system/cmake/toolchain/common.cmake b/examples/build_system/cmake/toolchain/common.cmake
index 1ef04bc00..e610a349b 100644
--- a/examples/build_system/cmake/toolchain/common.cmake
+++ b/examples/build_system/cmake/toolchain/common.cmake
@@ -20,41 +20,32 @@ include(${CMAKE_CURRENT_LIST_DIR}/../cpu/${CMAKE_SYSTEM_CPU}.cmake)
 # ----------------------------------------------------------------------------
 # Compile flags
 # ----------------------------------------------------------------------------
+set(TOOLCHAIN_C_FLAGS)
+set(TOOLCHAIN_ASM_FLAGS)
+set(TOOLCHAIN_EXE_LINKER_FLAGS)
+
 if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
   list(APPEND TOOLCHAIN_COMMON_FLAGS
     -fdata-sections
     -ffunction-sections
 #    -fsingle-precision-constant # not supported by clang
     -fno-strict-aliasing
-    -g
-    )
-  list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
-    -Wl,--print-memory-usage
-    -Wl,--gc-sections
-    -Wl,--cref
+    -g # include debug info for bloaty
     )
+  set(TOOLCHAIN_EXE_LINKER_FLAGS "-Wl,--print-memory-usage -Wl,--gc-sections -Wl,--cref")
+
+  if (TOOLCHAIN STREQUAL clang)
+    set(TOOLCHAIN_ASM_FLAGS "-x assembler-with-cpp")
+  endif ()
 elseif (TOOLCHAIN STREQUAL "iar")
-  list(APPEND TOOLCHAIN_COMMON_FLAGS
-    --debug
-    )
-  list(APPEND TOOLCHAIN_EXE_LINKER_FLAGS
-    --diag_suppress=Li065
-    )
+  set(TOOLCHAIN_C_FLAGS --debug)
+  set(TOOLCHAIN_EXE_LINKER_FLAGS --diag_suppress=Li065)
 endif ()
 
 # join the toolchain flags into a single string
 list(JOIN TOOLCHAIN_COMMON_FLAGS " " TOOLCHAIN_COMMON_FLAGS)
-foreach (LANG IN ITEMS C CXX ASM)
-  set(CMAKE_${LANG}_FLAGS_INIT ${TOOLCHAIN_COMMON_FLAGS})
-  # optimization flags for LOG, LOGGER ?
-  #set(CMAKE_${LANG}_FLAGS_RELEASE_INIT "-Os")
-  #set(CMAKE_${LANG}_FLAGS_DEBUG_INIT "-O0")
-endforeach ()
-
-# Assembler
-if (DEFINED TOOLCHAIN_ASM_FLAGS)
-  set(CMAKE_ASM_FLAGS_INIT "${CMAKE_ASM_FLAGS_INIT} ${TOOLCHAIN_ASM_FLAGS}")
-endif ()
 
-# Linker
-list(JOIN TOOLCHAIN_EXE_LINKER_FLAGS " " CMAKE_EXE_LINKER_FLAGS_INIT)
+set(CMAKE_C_FLAGS_INIT "${TOOLCHAIN_COMMON_FLAGS} ${TOOLCHAIN_C_FLAGS}")
+set(CMAKE_CXX_FLAGS_INIT "${TOOLCHAIN_COMMON_FLAGS} ${TOOLCHAIN_C_FLAGS}")
+set(CMAKE_ASM_FLAGS_INIT "${TOOLCHAIN_COMMON_FLAGS} ${TOOLCHAIN_ASM_FLAGS}")
+set(CMAKE_EXE_LINKER_FLAGS_INIT ${TOOLCHAIN_EXE_LINKER_FLAGS})
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 62ec412e6..5eadcdaa9 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -232,7 +232,7 @@ function(family_add_bloaty TARGET)
     return()
   endif ()
 
-  set(OPTION "--domain=vm -d compileunits") # add -d symbol if needed
+  set(OPTION "--domain=vm -d compileunits,sections,symbols")
   if (DEFINED BLOATY_OPTION)
     string(APPEND OPTION " ${BLOATY_OPTION}")
   endif ()
@@ -240,36 +240,33 @@ function(family_add_bloaty TARGET)
 
   add_custom_target(${TARGET}-bloaty
     DEPENDS ${TARGET}
-    COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > $<TARGET_FILE:${TARGET}>.bloaty.txt
-    COMMAND cat $<TARGET_FILE:${TARGET}>.bloaty.txt
+    COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>
     VERBATIM)
 
   # post build
-  add_custom_command(TARGET ${TARGET} POST_BUILD
-    COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > $<TARGET_FILE:${TARGET}>.bloaty.txt
-    COMMAND cat $<TARGET_FILE:${TARGET}>.bloaty.txt
-    VERBATIM
-    )
+  #  add_custom_command(TARGET ${TARGET} POST_BUILD
+  #    COMMAND ${BLOATY_EXE} --csv ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_bloaty.csv
+  #    VERBATIM
+  #    )
 endfunction()
 
 # Add linkermap target (https://github.com/hathach/linkermap)
 function(family_add_linkermap TARGET)
-  set(LINKERMAP_OPTION_LIST)
+  set(OPTION "-j")
   if (DEFINED LINKERMAP_OPTION)
-    separate_arguments(LINKERMAP_OPTION_LIST UNIX_COMMAND ${LINKERMAP_OPTION})
+    string(APPEND OPTION " ${LINKERMAP_OPTION}")
   endif ()
+  separate_arguments(OPTION_LIST UNIX_COMMAND ${OPTION})
 
   add_custom_target(${TARGET}-linkermap
-    COMMAND python ${LINKERMAP_PY} ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    COMMAND python ${LINKERMAP_PY} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
     VERBATIM
     )
 
-  # post build if bloaty not exist
-  if (NOT TARGET ${TARGET}-bloaty)
-    add_custom_command(TARGET ${TARGET} POST_BUILD
-      COMMAND python ${LINKERMAP_PY} ${LINKERMAP_OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
-      VERBATIM)
-  endif ()
+  # post build
+  add_custom_command(TARGET ${TARGET} POST_BUILD
+    COMMAND python ${LINKERMAP_PY} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
+    VERBATIM)
 endfunction()
 
 #-------------------------------------------------------------
@@ -384,7 +381,7 @@ function(family_configure_common TARGET RTOS)
   if (NOT RTOS STREQUAL zephyr)
     # Analyze size with bloaty and linkermap
     family_add_bloaty(${TARGET})
-    family_add_linkermap(${TARGET}) # fall back to linkermap if bloaty not found
+    family_add_linkermap(${TARGET})
   endif ()
 
   # run size after build
diff --git a/src/common/tusb_compiler.h b/src/common/tusb_compiler.h
index c8108264f..f20834cea 100644
--- a/src/common/tusb_compiler.h
+++ b/src/common/tusb_compiler.h
@@ -183,11 +183,11 @@
     #define TU_BSWAP32(u32) (__builtin_bswap32(u32))
   #endif
 
-	#ifndef __ARMCC_VERSION
   // List of obsolete callback function that is renamed and should not be defined.
   // Put it here since only gcc support this pragma
-		#pragma GCC poison tud_vendor_control_request_cb
-	#endif
+  #if !defined(__ARMCC_VERSION) && !defined(__ICCARM__)
+    #pragma GCC poison tud_vendor_control_request_cb
+  #endif
 
 #elif defined(__ICCARM__)
   #include <intrinsics.h>
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index b92448685..fc748c85f 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -821,7 +821,7 @@ static void channel_xfer_in_retry(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
   }
 }
 
-#if CFG_TUSB_DEBUG
+#if CFG_TUSB_DEBUG && 0
 TU_ATTR_ALWAYS_INLINE static inline void print_hcint(uint32_t hcint) {
   const char* str[] = {
     "XFRC", "HALTED", "AHBERR", "STALL",
diff --git a/tools/get_deps.py b/tools/get_deps.py
index f11d8d51e..0d9c1a8f1 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -15,7 +15,7 @@ deps_mandatory = {
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
-                        '23d1c4c84c4866b84cb821fb368bb9991633871d',
+                        '8e1f440fa15c567aceb5aa0d14f6d18c329cc67f',
                         'all'],
     'tools/uf2': ['https://github.com/microsoft/uf2.git',
                   'c594542b2faa01cc33a2b97c9fbebc38549df80a',
diff --git a/tools/metrics.py b/tools/metrics.py
index f879a0d34..50709d5ba 100644
--- a/tools/metrics.py
+++ b/tools/metrics.py
@@ -1,5 +1,5 @@
 #!/usr/bin/env python3
-"""Calculate average sizes using bloaty output."""
+"""Calculate average sizes from bloaty CSV or TinyUSB metrics JSON outputs."""
 
 import argparse
 import csv
@@ -85,7 +85,7 @@ def parse_bloaty_csv(csv_text, filters=None):
 
 
 def combine_files(input_files, filters=None):
-    """Combine multiple bloaty outputs into a single data set."""
+    """Combine multiple metrics inputs (bloaty CSV or metrics JSON) into a single data set."""
 
     filters = filters or []
     all_json_data = {"file_list": [], "data": []}
@@ -168,12 +168,6 @@ def compute_avg(all_json_data):
                     continue
                 file_accumulator[fname]["symbols"][name].append(sym.get("size", 0))
             sections_map = f.get("sections") or {}
-            if isinstance(sections_map, list):
-                sections_map = {
-                    s.get("name"): s.get("size", 0)
-                    for s in sections_map
-                    if isinstance(s, dict) and s.get("name")
-                }
             for sname, ssize in sections_map.items():
                 file_accumulator[fname]["sections"][sname].append(ssize)
 
@@ -240,6 +234,8 @@ def compare_files(base_file, new_file, filters=None):
         n = new_files.get(fname, {})
         b_size = b.get("size", 0)
         n_size = n.get("size", 0)
+        base_sections = b.get("sections") or {}
+        new_sections = n.get("sections") or {}
 
         # Symbol diffs
         b_syms = {s["name"]: s for s in b.get("symbols", [])}
@@ -256,6 +252,14 @@ def compare_files(base_file, new_file, filters=None):
             "file": fname,
             "size": {"base": b_size, "new": n_size, "diff": n_size - b_size},
             "symbols": symbols,
+            "sections": {
+                name: {
+                    "base": base_sections.get(name, 0),
+                    "new": new_sections.get(name, 0),
+                    "diff": new_sections.get(name, 0) - base_sections.get(name, 0),
+                }
+                for name in sorted(set(base_sections) | set(new_sections))
+            },
         })
 
     total = {
@@ -299,6 +303,17 @@ def get_sort_key(sort_order):
         return lambda x: x.get('file', ''), False
 
 
+def format_diff(base, new, diff):
+    """Format a diff value with percentage."""
+    if diff == 0:
+        return f"{new}"
+    if base == 0 or new == 0:
+        return f"{base} ➙ {new}"
+    pct = (diff / base) * 100
+    sign = "+" if diff > 0 else ""
+    return f"{base} ➙ {new} ({sign}{diff}, {sign}{pct:.1f}%)"
+
+
 def write_json_output(json_data, path):
     """Write JSON output with indentation."""
 
@@ -315,7 +330,7 @@ def render_combine_table(json_data, sort_order='name+'):
     key_func, reverse = get_sort_key(sort_order)
     files_sorted = sorted(files, key=key_func, reverse=reverse)
 
-    total_size = json_data.get("TOTAL") or (sum(f.get("size", 0) for f in files_sorted) or 1)
+    total_size = json_data.get("TOTAL") or sum(f.get("size", 0) for f in files_sorted)
 
     pct_strings = [
         f"{(f.get('percent') if f.get('percent') is not None else (f.get('size', 0) / total_size * 100 if total_size else 0)):.1f}%"
@@ -357,12 +372,6 @@ def render_combine_table(json_data, sort_order='name+'):
         parts = [f"| {f.get('file', ''):<{file_width}} |"]
         if section_names:
             sections_map = f.get("sections") or {}
-            if isinstance(sections_map, list):
-                sections_map = {
-                    s.get("name"): s.get("size", 0)
-                    for s in sections_map
-                    if isinstance(s, dict) and s.get("name")
-                }
             for name in section_names:
                 parts.append(f" {sections_map.get(name, 0):>{section_widths[name]}} |")
         parts.append(f" {size_val:>{size_width}} | {pct_str:>{pct_width}} |")
@@ -469,6 +478,7 @@ def _build_rows(files, sort_order):
             "new": sd['new'],
             "diff": diff_val,
             "pct": pct_str,
+            "sections": f.get("sections", {}),
         })
     return rows
 
@@ -506,59 +516,68 @@ def render_compare_table(rows, include_sum):
     if not rows:
         return ["No entries.", ""]
 
+    # collect section columns (reverse alpha)
+    section_names = sorted(
+        {name for r in rows for name in (r.get("sections") or {})},
+        reverse=True,
+    )
+
+    def fmt_abs(val_old, val_new):
+        diff = val_new - val_old
+        if diff == 0:
+            return f"{val_new}"
+        sign = "+" if diff > 0 else ""
+        return f"{val_old} ➙ {val_new} ({sign}{diff})"
+
     sum_base = sum(r["base"] for r in rows)
     sum_new = sum(r["new"] for r in rows)
     total_diff = sum_new - sum_base
     total_pct = "n/a" if sum_base == 0 else f"{(total_diff / sum_base) * 100:+.1f}%"
 
-    base_width = max(len("base"), *(len(str(r["base"])) for r in rows))
-    new_width = max(len("new"), *(len(str(r["new"])) for r in rows))
-    diff_width = max(len("diff"), *(len(f"{r['diff']:+}") for r in rows))
-    pct_width = max(len("% diff"), *(len(r["pct"]) for r in rows))
-    name_width = max(len("file"), *(len(r["file"]) for r in rows))
-
-    if include_sum:
-        base_width = max(base_width, len(str(sum_base)))
-        new_width = max(new_width, len(str(sum_new)))
-        diff_width = max(diff_width, len(f"{total_diff:+}"))
-        pct_width = max(pct_width, len(total_pct))
-        name_width = max(name_width, len("TOTAL"))
-
-    header = (
-        f"| {'file':<{name_width}} | "
-        f"{'base':>{base_width}} | "
-        f"{'new':>{new_width}} | "
-        f"{'diff':>{diff_width}} | "
-        f"{'% diff':>{pct_width}} |"
-    )
-    separator = (
-        f"| :{'-' * (name_width - 1)} | "
-        f"{'-' * base_width}:| "
-        f"{'-' * new_width}:| "
-        f"{'-' * diff_width}:| "
-        f"{'-' * pct_width}:|"
+    file_width = max(len("file"), *(len(r["file"]) for r in rows), len("TOTAL"))
+    size_width = max(
+        len("size"),
+        *(len(fmt_abs(r["base"], r["new"])) for r in rows),
+        len(fmt_abs(sum_base, sum_new)),
     )
+    pct_width = max(len("% diff"), *(len(r["pct"]) for r in rows), len(total_pct))
+    section_widths = {}
+    for name in section_names:
+        max_val_len = 0
+        for r in rows:
+            sec_entry = (r.get("sections") or {}).get(name, {"base": 0, "new": 0})
+            max_val_len = max(max_val_len, len(fmt_abs(sec_entry.get("base", 0), sec_entry.get("new", 0))))
+        section_widths[name] = max(len(name), max_val_len, 1)
+
+    header_parts = [f"| {'file':<{file_width}} |"]
+    sep_parts = [f"| :{'-' * (file_width - 1)} |"]
+    for name in section_names:
+        header_parts.append(f" {name:>{section_widths[name]}} |")
+        sep_parts.append(f" {'-' * (section_widths[name] - 1)}: |")
+    header_parts.append(f" {'size':>{size_width}} | {'% diff':>{pct_width}} |")
+    sep_parts.append(f" {'-' * (size_width - 1)}: | {'-' * (pct_width - 1)}: |")
+    header = "".join(header_parts)
+    separator = "".join(sep_parts)
 
     lines = [header, separator]
 
     for r in rows:
-        diff_str = f"{r['diff']:+}"
-        lines.append(
-            f"| {r['file']:<{name_width}} | "
-            f"{str(r['base']):>{base_width}} | "
-            f"{str(r['new']):>{new_width}} | "
-            f"{diff_str:>{diff_width}} | "
-            f"{r['pct']:>{pct_width}} |"
-        )
+        parts = [f"| {r['file']:<{file_width}} |"]
+        sections_map = r.get("sections") or {}
+        for name in section_names:
+            sec_entry = sections_map.get(name, {"base": 0, "new": 0})
+            parts.append(f" {fmt_abs(sec_entry.get('base', 0), sec_entry.get('new', 0)):>{section_widths[name]}} |")
+        parts.append(f" {fmt_abs(r['base'], r['new']):>{size_width}} | {r['pct']:>{pct_width}} |")
+        lines.append("".join(parts))
 
     if include_sum:
-        lines.append(
-            f"| {'TOTAL':<{name_width}} | "
-            f"{sum_base:>{base_width}} | "
-            f"{sum_new:>{new_width}} | "
-            f"{total_diff:+{diff_width}d} | "
-            f"{total_pct:>{pct_width}} |"
-        )
+        total_parts = [f"| {'TOTAL':<{file_width}} |"]
+        for name in section_names:
+            total_base = sum((r.get("sections") or {}).get(name, {}).get("base", 0) for r in rows)
+            total_new = sum((r.get("sections") or {}).get(name, {}).get("new", 0) for r in rows)
+            total_parts.append(f" {fmt_abs(total_base, total_new):>{section_widths[name]}} |")
+        total_parts.append(f" {fmt_abs(sum_base, sum_new):>{size_width}} | {total_pct:>{pct_width}} |")
+        lines.append("".join(total_parts))
     return lines
 
 
@@ -592,9 +611,10 @@ def cmd_compare(args):
 
     if not args.quiet:
         print_compare_summary(comparison, args.sort)
-    write_compare_markdown(comparison, args.out + '.md', args.sort)
-    if not args.quiet:
-        print(f"Comparison written to {args.out}.md")
+    if args.markdown_out:
+        write_compare_markdown(comparison, args.out + '.md', args.sort)
+        if not args.quiet:
+            print(f"Comparison written to {args.out}.md")
 
 
 def main(argv=None):
@@ -602,9 +622,9 @@ def main(argv=None):
     subparsers = parser.add_subparsers(dest='command', required=True, help='Available commands')
 
     # Combine subcommand
-    combine_parser = subparsers.add_parser('combine', help='Combine and average multiple bloaty outputs')
+    combine_parser = subparsers.add_parser('combine', help='Combine and average bloaty CSV outputs or metrics JSON files')
     combine_parser.add_argument('files', nargs='+',
-                                help='Path to bloaty CSV output or JSON file(s) or glob pattern(s)')
+                                help='Path to bloaty CSV output or TinyUSB metrics JSON file(s) (including linkermap-generated) or glob pattern(s)')
     combine_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
                                 help='Only include compile units whose path contains this substring (can be repeated)')
     combine_parser.add_argument('-o', '--out', dest='out', default='metrics',
@@ -620,13 +640,15 @@ def main(argv=None):
                                 help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: size-')
 
     # Compare subcommand
-    compare_parser = subparsers.add_parser('compare', help='Compare two bloaty outputs (CSV) or JSON inputs')
-    compare_parser.add_argument('base', help='Base CSV/JSON file')
-    compare_parser.add_argument('new', help='New CSV/JSON file')
+    compare_parser = subparsers.add_parser('compare', help='Compare two metrics inputs (bloaty CSV or metrics JSON)')
+    compare_parser.add_argument('base', help='Base CSV/metrics JSON file')
+    compare_parser.add_argument('new', help='New CSV/metrics JSON file')
     compare_parser.add_argument('-f', '--filter', dest='filters', action='append', default=[],
                                 help='Only include compile units whose path contains this substring (can be repeated)')
     compare_parser.add_argument('-o', '--out', dest='out', default='metrics_compare',
-                                help='Output path basename for Markdown file (default: metrics_compare)')
+                                help='Output path basename for Markdown/JSON files (default: metrics_compare)')
+    compare_parser.add_argument('-m', '--markdown', dest='markdown_out', action='store_true',
+                                help='Write Markdown output file')
     compare_parser.add_argument('-S', '--sort', dest='sort', default='name+',
                                 choices=['size', 'size-', 'size+', 'name', 'name-', 'name+'],
                                 help='Sort order: size/size- (descending), size+ (ascending), name/name+ (ascending), name- (descending). Default: name+')
-- 
cgit v1.3.1


From a70fbadeb9e8701401fb83c76d988876af1b44b6 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 10 Dec 2025 21:49:32 +0100
Subject: bsp/lpc55: add hcd_ip3516

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/bare_api/only.txt             |  1 +
 examples/host/cdc_msc_hid/only.txt          |  1 +
 examples/host/cdc_msc_hid_freertos/only.txt |  1 +
 examples/host/device_info/only.txt          |  1 +
 examples/host/hid_controller/only.txt       |  1 +
 examples/host/midi_rx/only.txt              |  1 +
 examples/host/msc_file_explorer/only.txt    |  1 +
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.h |  9 ++++
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.h | 10 +++++
 hw/bsp/lpc55/family.c                       | 69 +++++++++++------------------
 hw/bsp/lpc55/family.cmake                   | 23 ++++++++--
 11 files changed, 72 insertions(+), 46 deletions(-)

(limited to 'hw')

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index cba58f8e8..b39a23e40 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index cba58f8e8..b39a23e40 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index ef0a1ac96..b755df825 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -3,6 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 61a08f68d..2a3c5c583 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MAX3421
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index cba58f8e8..b39a23e40 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 133a7c9a0..b0afa4fc3 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -8,6 +8,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MAX3421
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index cba58f8e8..b39a23e40 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
index 907aee6a4..025172d0f 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
@@ -54,6 +54,15 @@
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
 
+// Power switch
+#define USBFS_POWER_PORT      1
+#define USBFS_POWER_PIN       12
+#define USBFS_POWER_STATE_ON  0
+
+#define USBHS_POWER_PORT      1
+#define USBHS_POWER_PIN       29
+#define USBHS_POWER_STATE_ON  0
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
index e18d5bbad..61b47646f 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
@@ -54,6 +54,16 @@
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
 
+// Power switch
+#define USBFS_POWER_PORT      1
+#define USBFS_POWER_PIN       12
+#define USBFS_POWER_STATE_ON  0
+
+#define USBHS_POWER_PORT      1
+#define USBHS_POWER_PIN       29
+#define USBHS_POWER_STATE_ON  0
+
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index ad0e502b5..8568d1743 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -227,36 +227,13 @@ void board_init(void) {
     /* enable USB Device clock */
     CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
   } else {
-    const uint32_t port1_pin12_config = (/* Pin is configured as USB0_PORTPWRN */
-                                         IOCON_PIO_FUNC4 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT1 PIN12 (coords: 67) is configured as USB0_PORTPWRN */
-    IOCON_PinMuxSet(IOCON, 1U, 12U, port1_pin12_config);
-
-    const uint32_t port0_pin28_config = (/* Pin is configured as USB0_OVERCURRENTN */
-                                         IOCON_PIO_FUNC7 |
-                                         /* Selects pull-up function */
-                                         IOCON_PIO_MODE_PULLUP |
-                                         /* Standard mode, output slew rate control is enabled */
-                                         IOCON_PIO_SLEW_STANDARD |
-                                         /* Input function is not inverted */
-                                         IOCON_PIO_INV_DI |
-                                         /* Enables digital function */
-                                         IOCON_PIO_DIGITAL_EN |
-                                         /* Open drain is disabled */
-                                         IOCON_PIO_OPENDRAIN_DI);
-    /* PORT0 PIN28 (coords: 66) is configured as USB0_OVERCURRENTN */
-    IOCON_PinMuxSet(IOCON, 0U, 28U, port0_pin28_config);
+  #ifdef USBFS_POWER_PORT
+    /* Configure USB0 Power Switch Pin */
+    IOCON_PinMuxSet(IOCON, USBFS_POWER_PORT, USBFS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
 
+    gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBFS_POWER_STATE_ON};
+    GPIO_PinInit(GPIO, USBFS_POWER_PORT, USBFS_POWER_PIN, &power_pin_config);
+  #endif
     CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll1, 48000000U);
     USBFSH->PORTMODE &= ~USBFSH_PORTMODE_DEV_ENABLE_MASK;
   }
@@ -274,18 +251,28 @@ void board_init(void) {
   RESET_PeripheralReset(kUSB1_RST_SHIFT_RSTn);
   RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
 
-  /* According to reference manual, device mode setting has to be set by access usb host register */
-  CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
+  if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) {
+    /* According to reference manual, device mode setting has to be set by access usb host register */
+    CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
 
-  USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
-  USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
+    USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
+    USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
 
-  CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
+    CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
+    /* enable USB Device clock */
+    CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
+  } else {
+  #ifdef USBHS_POWER_PORT
+    /* Configure USB1 Power Switch Pin */
+    IOCON_PinMuxSet(IOCON, USBHS_POWER_PORT, USBHS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
+
+    gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBHS_POWER_STATE_ON};
+    GPIO_PinInit(GPIO, USBHS_POWER_PORT, USBHS_POWER_PIN, &power_pin_config);
+  #endif
+    CLOCK_EnableUsbhs0HostClock(kCLOCK_UsbSrcUnused, 0U);
+  }
 
-  /* enable USB Device clock */
   CLOCK_EnableUsbhs0PhyPllClock(kCLOCK_UsbPhySrcExt, XTAL0_CLK_HZ);
-  CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
-  CLOCK_EnableClock(kCLOCK_UsbRam1);
 
   // Enable PHY support for Low speed device + LS via FS Hub
   USBPHY->CTRL |= USBPHY_CTRL_SET_ENUTMILEVEL2_MASK | USBPHY_CTRL_SET_ENUTMILEVEL3_MASK;
@@ -296,11 +283,9 @@ void board_init(void) {
   USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK;
   USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK;
 
-  // TX Timing
-//  uint32_t phytx = USBPHY->TX;
-//  phytx &= ~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK);
-//  phytx |= USBPHY_TX_D_CAL(0x0C) | USBPHY_TX_TXCAL45DP(0x06) | USBPHY_TX_TXCAL45DM(0x06);
-//  USBPHY->TX = phytx;
+  // PHY calibration values for LPCXPRESSO55S69 from mcux-sdk
+  USBPHY->TX = ((USBPHY->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
+               (USBPHY_TX_D_CAL(0x05U) | USBPHY_TX_TXCAL45DP(0x0AU) | USBPHY_TX_TXCAL45DM(0x0AU)));
 
   ARM_MPU_SetMemAttr(0, 0x44); // Normal memory, non-cacheable (inner and outer)
   ARM_MPU_SetRegion(0, ARM_MPU_RBAR(0x40100000, ARM_MPU_SH_NON, 0, 1, 1), ARM_MPU_RLAR(0x40104000, 0));
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 1f18f9bad..690e1c600 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -91,11 +91,12 @@ function(family_add_board BOARD_TARGET)
   # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
   if (RHPORT_DEVICE EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+      [=[CFG_TUD_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
       )
-  elseif (RHPORT_HOST EQUAL 1)
+  endif ()
+  if (RHPORT_HOST EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+      [=[CFG_TUH_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
       )
   endif ()
 
@@ -114,9 +115,19 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/lib/sct_neopixel/sct_neopixel.c
     ${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
-    ${TOP}/src/portable/ohci/ohci.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
+
+  if (RHPORT_HOST EQUAL 0)
+    target_sources(${TARGET} PUBLIC
+      ${TOP}/src/portable/ohci/ohci.c
+      )
+  elseif (RHPORT_HOST EQUAL 1)
+    target_sources(${TARGET} PUBLIC
+      ${TOP}/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
+      )
+  endif ()
+
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
@@ -128,6 +139,8 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       -nostartfiles
+      "LINKER:--defsym=__stack_size__=0x1000"
+      "LINKER:--defsym=__heap_size__=0"
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_link_options(${TARGET} PUBLIC
@@ -136,6 +149,8 @@ function(family_configure_example TARGET RTOS)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
+      "LINKER:--config_def=__stack_size__=0x1000"
+      "LINKER:--config_def=__heap_size__=0"
       )
   endif ()
 
-- 
cgit v1.3.1


From 6e01c061499122f7e03b7832f6b4068b229280cb Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 11 Dec 2025 19:29:18 +0100
Subject: bsp: migrate lpc51, lpc55 to new sdk repo

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake |  3 --
 hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk    |  2 +-
 hw/bsp/lpc51/family.cmake                       | 48 +++++++++++++---------
 hw/bsp/lpc51/family.mk                          | 42 ++++++++++----------
 hw/bsp/lpc55/family.cmake                       | 53 +++++++++++++++----------
 hw/bsp/lpc55/family.mk                          | 51 +++++++++++++-----------
 tools/get_deps.py                               | 10 ++++-
 7 files changed, 118 insertions(+), 91 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake
index 1f549bf50..6e632d266 100644
--- a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake
+++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.cmake
@@ -7,7 +7,4 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC51U68JBD64
     )
-  target_link_libraries(${TARGET} PUBLIC
-    ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower.a
-    )
 endfunction()
diff --git a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
index 5627cb024..072037e90 100644
--- a/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
+++ b/hw/bsp/lpc51/boards/lpcxpresso51u68/board.mk
@@ -1,4 +1,4 @@
-MCU = LPC51U68
+MCU_VARIANT = LPC51U68
 
 CFLAGS += \
   -DCPU_LPC51U68JBD64 \
diff --git a/hw/bsp/lpc51/family.cmake b/hw/bsp/lpc51/family.cmake
index 1823b64fc..00c6731ae 100644
--- a/hw/bsp/lpc51/family.cmake
+++ b/hw/bsp/lpc51/family.cmake
@@ -1,7 +1,8 @@
 include_guard()
 
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-lpc)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -16,41 +17,52 @@ set(FAMILY_MCUS LPC51 CACHE INTERNAL "")
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}_flash.ld)
+  set(LD_FILE_GNU ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/gcc/${MCU_VARIANT}_flash.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
+
 if (NOT DEFINED STARTUP_FILE_GNU)
-set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+  set(STARTUP_FILE_GNU ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
 endif ()
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+if (NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/iar/${MCU_VARIANT}_flash.icf)
+endif ()
+
+if (NOT DEFINED STARTUP_FILE_IAR)
+  set(STARTUP_FILE_IAR ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/iar/startup_${MCU_VARIANT}.s)
+endif ()
+
 #------------------------------------
 # Board Target
 #------------------------------------
 function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     # driver
-    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
-    ${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
+    ${MCUX_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${MCUX_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${MCUX_DIR}/drivers/flexcomm/usart/fsl_usart.c
     # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/drivers/fsl_reset.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${TOP}/lib/sct_neopixel
     # driver
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/flexcomm
-    ${SDK_DIR}/drivers/lpc_iocon
-    ${SDK_DIR}/drivers/lpc_gpio
-    ${SDK_DIR}/drivers/lpuart
+    ${MCUX_DIR}/drivers/common
+    ${MCUX_DIR}/drivers/common
+    ${MCUX_DIR}/drivers/flexcomm
+    ${MCUX_DIR}/drivers/flexcomm/usart
+    ${MCUX_DIR}/drivers/lpc_iocon
+    ${MCUX_DIR}/drivers/lpc_gpio
     # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}
+    ${SDK_DIR}/LPC51U68/${MCU_VARIANT}/drivers
     ${CMSIS_DIR}/CMSIS/Core/Include
+    ${SDK_DIR}/LPC51U68/periph
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk
index 91d1261cb..baca11c05 100644
--- a/hw/bsp/lpc51/family.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -1,8 +1,7 @@
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-
 include $(TOP)/$(BOARD_PATH)/board.mk
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 CPU_CORE ?= cortex-m0plus
+MCUX_DIR = /hw/mcu/nxp/mcuxsdk-core
+SDK_DIR = /hw/mcu/nxp/mcux-devices-lpc
 
 CFLAGS += \
   -flto \
@@ -18,29 +17,28 @@ LDFLAGS_GCC += \
   --specs=nosys.specs --specs=nano.specs \
 
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/$(MCU)_flash.ld
+LD_FILE = $(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/gcc/$(MCU_VARIANT)_flash.ld
 
 SRC_C += \
 	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/system_$(MCU).c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(MCU_DIR)/drivers/fsl_power.c \
-	$(MCU_DIR)/drivers/fsl_reset.c \
-	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
-	$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/system_$(MCU_VARIANT).c \
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/drivers/fsl_power.c \
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_gpio/fsl_gpio.c \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/fsl_flexcomm.c \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart/fsl_usart.c \
 
 INC += \
     $(TOP)/$(BOARD_PATH) \
     $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/flexcomm \
-	$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio
-
-SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
-
-LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower.a
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT) \
+	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(SDK_DIR)/LPC51U68/periph \
+	$(TOP)/$(MCUX_DIR)/drivers/common \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_iocon \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_gpio
+
+SRC_S += $(TOP)$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/gcc/startup_$(MCU_VARIANT).S
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index 690e1c600..a6f3bc167 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -1,7 +1,8 @@
 include_guard()
 
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-lpc)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -21,7 +22,7 @@ if (NOT DEFINED RHPORT_DEVICE)
   set(RHPORT_DEVICE 1)
 endif ()
 if (NOT DEFINED RHPORT_HOST)
-  set(RHPORT_HOST 0)
+  set(RHPORT_HOST 1)
 endif ()
 
 # port 0 is fullspeed, port 1 is highspeed
@@ -40,43 +41,52 @@ cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-  set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  set(LD_FILE_GNU ${SDK_DIR}/LPC5500/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
 
 if (NOT DEFINED STARTUP_FILE_GNU)
-  set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+  set(STARTUP_FILE_GNU ${SDK_DIR}/LPC5500/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
 endif ()
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+if (NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${SDK_DIR}/LPC5500/${MCU_VARIANT}/iar/${MCU_CORE}_flash.icf)
+endif ()
+
+if (NOT DEFINED STARTUP_FILE_IAR)
+  set(STARTUP_FILE_IAR ${SDK_DIR}/LPC5500/${MCU_VARIANT}/iar/startup_${MCU_CORE}.s)
+endif ()
+
 #------------------------------------
 # Board Target
 #------------------------------------
 function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     # driver
-    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/common/fsl_common_arm.c
-    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
-    ${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
+    ${MCUX_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${MCUX_DIR}/drivers/common/fsl_common_arm.c
+    ${MCUX_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${MCUX_DIR}/drivers/flexcomm/usart/fsl_usart.c
     # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_reset.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${TOP}/lib/sct_neopixel
     # driver
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/flexcomm
-    ${SDK_DIR}/drivers/flexcomm/usart
-    ${SDK_DIR}/drivers/lpc_iocon
-    ${SDK_DIR}/drivers/lpc_gpio
-    ${SDK_DIR}/drivers/sctimer
+    ${MCUX_DIR}/drivers/common
+    ${MCUX_DIR}/drivers/flexcomm
+    ${MCUX_DIR}/drivers/flexcomm/usart
+    ${MCUX_DIR}/drivers/lpc_iocon
+    ${MCUX_DIR}/drivers/lpc_gpio
+    ${MCUX_DIR}/drivers/sctimer
     # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}
+    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/LPC5500/periph
     ${CMSIS_DIR}/CMSIS/Core/Include
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
@@ -97,6 +107,7 @@ function(family_add_board BOARD_TARGET)
   if (RHPORT_HOST EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
       [=[CFG_TUH_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
+      CFG_TUH_USBIP_IP3516=1
       )
   endif ()
 
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index fadf852cd..7b1ab6b09 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -1,9 +1,9 @@
 UF2_FAMILY_ID = 0x2abc77ec
-SDK_DIR = hw/mcu/nxp/mcux-sdk
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m33
-MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
+MCUX_DIR = /hw/mcu/nxp/mcuxsdk-core
+SDK_DIR = /hw/mcu/nxp/mcux-devices-lpc
 
 # Default to Highspeed PORT1
 PORT ?= 1
@@ -31,33 +31,36 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal
 LDFLAGS_GCC += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
+  -Wl,--defsym=__stack_size__=0x1000 \
+  -Wl,--defsym=__heap_size__=0 \
 
 # All source paths should be relative to the top level.
-LD_FILE ?= $(MCU_DIR)/gcc/$(MCU_CORE)_flash.ld
+LD_FILE ?= $(SDK_DIR)/LPC5500/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
 
 SRC_C += \
-	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
-	$(MCU_DIR)/system_$(MCU_CORE).c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(MCU_DIR)/drivers/fsl_power.c \
-	$(MCU_DIR)/drivers/fsl_reset.c \
-	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/common/fsl_common_arm.c \
-	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
-	$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
-	lib/sct_neopixel/sct_neopixel.c
+	$(TOP)/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/system_$(MCU_CORE).c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_power.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_gpio/fsl_gpio.c \
+	$(TOP)/$(MCUX_DIR)/drivers/common/fsl_common_arm.c \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/fsl_flexcomm.c \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart/fsl_usart.c \
+	$(TOP)/lib/sct_neopixel/sct_neopixel.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/sct_neopixel \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
-	$(TOP)/$(SDK_DIR)/drivers/flexcomm/ \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_iocon \
-	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio \
-	$(TOP)/$(SDK_DIR)/drivers/sctimer
-
-SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_CORE).S
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT) \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(SDK_DIR)/LPC5500/periph \
+	$(TOP)/$(MCUX_DIR)/drivers/common \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart \
+	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/ \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_iocon \
+	$(TOP)/$(MCUX_DIR)/drivers/lpc_gpio \
+	$(TOP)/$(MCUX_DIR)/drivers/sctimer
+
+SRC_S += $(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 0d9c1a8f1..213567949 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -58,9 +58,15 @@ deps_optional = {
     'hw/mcu/nxp/lpcopen': ['https://github.com/hathach/nxp_lpcopen.git',
                            'b41cf930e65c734d8ec6de04f1d57d46787c76ae',
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
+    'hw/mcu/nxp/mcuxsdk-core': ['https://github.com/nxp-mcuxpresso/mcuxsdk-core',
+                            '0c5c6b16deb211110e06bde896cdff59ab213e16',
+                            'lpc51 lpc55'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
+                            'kinetis_k kinetis_k32l2 kinetis_kl mcx imxrt'],
+    'hw/mcu/nxp/mcux-devices-lpc': ['https://github.com/nxp-mcuxpresso/mcux-devices-lpc',
+                            '8096b783ec09d0d1c8629025a5f9d8e7df26e520',
+                            'lpc51 lpc55'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                          'rp2040'],
@@ -254,7 +260,7 @@ deps_optional = {
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-                    'ra stm32n6'],
+                    'ra stm32n6 lpc51 lpc55'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From 143987702e8bf10bda12c2759a6f55de6963da90 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 11 Dec 2025 21:51:45 +0100
Subject: bsp/mcx to new sdk repo

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/mcx/boards/frdm_mcxa153/board.cmake         |   7 +-
 hw/bsp/mcx/boards/frdm_mcxa153/board.mk            |   7 +-
 .../mcx/boards/frdm_mcxa153/board/clock_config.c   | 559 ---------------------
 .../mcx/boards/frdm_mcxa153/board/clock_config.h   | 385 --------------
 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c     | 492 ------------------
 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h     | 211 --------
 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c      | 559 +++++++++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h      | 385 ++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c           | 492 ++++++++++++++++++
 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h           | 211 ++++++++
 hw/bsp/mcx/boards/frdm_mcxa156/board.cmake         |   4 +
 hw/bsp/mcx/boards/frdm_mcxa156/board.mk            |   4 +
 hw/bsp/mcx/boards/frdm_mcxn947/board.cmake         |   4 +
 hw/bsp/mcx/boards/frdm_mcxn947/board.mk            |   4 +
 hw/bsp/mcx/boards/mcxn947brk/board.cmake           |   4 +
 hw/bsp/mcx/boards/mcxn947brk/board.mk              |   4 +
 hw/bsp/mcx/family.cmake                            |  51 +-
 hw/bsp/mcx/family.mk                               |  45 +-
 tools/get_deps.py                                  |  11 +-
 19 files changed, 1743 insertions(+), 1696 deletions(-)
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
 delete mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
 create mode 100644 hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h

(limited to 'hw')

diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake b/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
index e6619992f..f0bf9510b 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board.cmake
@@ -1,4 +1,5 @@
 set(MCU_VARIANT MCXA153)
+set(MCU_FAMILY MCXA)
 set(MCU_CORE MCXA153)
 
 set(JLINK_DEVICE MCXA153_M33)
@@ -15,10 +16,10 @@ function(update_board TARGET)
     CFG_EXAMPLE_VIDEO_READONLY
     )
   target_sources(${TARGET} PRIVATE
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board/clock_config.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board/pin_mux.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
     )
   target_include_directories(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/board
+    ${SDK_DIR}/${MCU_FAMILY}/periph
     )
 endfunction()
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board.mk b/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
index 34558b43e..caa2e5a3b 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/board.mk
@@ -1,4 +1,5 @@
 MCU_VARIANT = MCXA153
+MCU_FAMILY = MCXA
 MCU_CORE = MCXA153
 PORT = 0
 
@@ -9,11 +10,11 @@ CFLAGS += \
 	-DCFG_EXAMPLE_VIDEO_READONLY
 
 SRC_C += \
-  ${BOARD_PATH}/board/clock_config.c \
-  ${BOARD_PATH}/board/pin_mux.c
+  ${BOARD_PATH}/clock_config.c \
+  ${BOARD_PATH}/pin_mux.c
 
 INC += \
-	$(TOP)/$(BOARD_PATH)/board
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/periph
 
 JLINK_DEVICE = MCXA153
 PYOCD_TARGET = MCXA153
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
deleted file mode 100644
index 599110d7a..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.c
+++ /dev/null
@@ -1,559 +0,0 @@
-/*
- * Copyright 2025 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to setup clock using clock driver functions:
- *
- * 1. Setup clock sources.
- *
- * 2. Set up wait states of the flash.
- *
- * 3. Set up all dividers.
- *
- * 4. Set up all selectors to provide selected clocks.
- *
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v18.0
-processor: MCXA153
-package_id: MCXA153VLH
-mcu_data: ksdk2_0
-processor_version: 25.09.10
-board: FRDM-MCXA153
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_clock.h"
-#include "clock_config.h"
-#include "fsl_spc.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockFRO96M();
-}
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO12M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CPU_clock.outFreq, value: 12 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: MAIN_clock.outFreq, value: 12 MHz}
-- {id: Slow_clock.outFreq, value: 3 MHz}
-- {id: System_clock.outFreq, value: 12 MHz}
-- {id: TRACE_clock.outFreq, value: 12 MHz}
-- {id: UTICK_clock.outFreq, value: 1 MHz}
-- {id: WWDT0_clock.outFreq, value: 1 MHz}
-settings:
-- {id: SCGMode, value: SIRC}
-- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
-- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO12M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-
-    /*!< Set up system dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO12M */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO24M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO24M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 24 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
-- {id: FRO_HF_clock.outFreq, value: 48 MHz}
-- {id: MAIN_clock.outFreq, value: 48 MHz}
-- {id: Slow_clock.outFreq, value: 6 MHz}
-- {id: System_clock.outFreq, value: 24 MHz}
-- {id: TRACE_clock.outFreq, value: 24 MHz}
-- {id: UTICK_clock.outFreq, value: 1 MHz}
-- {id: WWDT0_clock.outFreq, value: 1 MHz}
-settings:
-- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SYSCON.AHBCLKDIV.scale, value: '2'}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO24M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-
-    /*!< Set up system dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U);               /* !< Set AHBCLKDIV divider to value 2 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO48M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO48M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 48 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
-- {id: FRO_HF_clock.outFreq, value: 48 MHz}
-- {id: MAIN_clock.outFreq, value: 48 MHz}
-- {id: Slow_clock.outFreq, value: 12 MHz}
-- {id: System_clock.outFreq, value: 48 MHz}
-- {id: TRACE_clock.outFreq, value: 48 MHz}
-- {id: UTICK_clock.outFreq, value: 1 MHz}
-- {id: WWDT0_clock.outFreq, value: 1 MHz}
-settings:
-- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO48M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-
-    /*!< Set up system dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO64M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO64M
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 64 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz}
-- {id: FRO_HF_clock.outFreq, value: 64 MHz}
-- {id: MAIN_clock.outFreq, value: 64 MHz}
-- {id: Slow_clock.outFreq, value: 16 MHz}
-- {id: System_clock.outFreq, value: 64 MHz}
-- {id: TRACE_clock.outFreq, value: 64 MHz}
-- {id: UTICK_clock.outFreq, value: 1 MHz}
-- {id: WWDT0_clock.outFreq, value: 1 MHz}
-settings:
-- {id: VDD_CORE, value: voltage_1v1}
-- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
-sources:
-- {id: SCG.FIRC.outFreq, value: 64 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO64M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-
-    /*!< Set up system dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    CLOCK_SetupFROHFClocking(64000000U);               /*!< Enable FRO HF(64MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK;
-}
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO96M **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockFRO96M
-called_from_default_init: true
-outputs:
-- {id: CLK_1M_clock.outFreq, value: 1 MHz}
-- {id: CLK_48M_clock.outFreq, value: 48 MHz}
-- {id: CPU_clock.outFreq, value: 96 MHz}
-- {id: FRO_12M_clock.outFreq, value: 12 MHz}
-- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz}
-- {id: FRO_HF_clock.outFreq, value: 96 MHz}
-- {id: MAIN_clock.outFreq, value: 96 MHz}
-- {id: Slow_clock.outFreq, value: 24 MHz}
-- {id: System_clock.outFreq, value: 96 MHz}
-- {id: TRACE_clock.outFreq, value: 96 MHz}
-- {id: UTICK_clock.outFreq, value: 1 MHz}
-- {id: WWDT0_clock.outFreq, value: 1 MHz}
-settings:
-- {id: VDD_CORE, value: voltage_1v1}
-- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
-- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
-sources:
-- {id: SCG.FIRC.outFreq, value: 96 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-/*******************************************************************************
- * Code for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-void BOARD_BootClockFRO96M(void)
-{
-    uint32_t coreFreq;
-    spc_active_mode_core_ldo_option_t ldoOption;
-    spc_sram_voltage_config_t sramOption;
-
-    /* Get the CPU Core frequency */
-    coreFreq = CLOCK_GetCoreSysClkFreq();
-
-    /* The flow of increasing voltage and frequency */
-    if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-    }
-
-
-    /*!< Set up system dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
-
-    CLOCK_SetupFROHFClocking(96000000U);               /*!< Enable FRO HF(96MHz) output */
-
-    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
-
-    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
-
-    /* The flow of decreasing voltage and frequency */
-    if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
-        /* Configure Flash to support different voltage level and frequency */
-        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
-        /* Specifies the operating voltage for the SRAM's read/write timing margin */
-        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
-        sramOption.requestVoltageUpdate =  true;
-        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
-        /* Set the LDO_CORE VDD regulator level */
-        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
-        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
-        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
-    }
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
-    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
-
-    /*!< Set up dividers */
-    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
-    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
-
-    /* Set SystemCoreClock variable */
-    SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK;
-}
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h b/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
deleted file mode 100644
index d609eb468..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board/clock_config.h
+++ /dev/null
@@ -1,385 +0,0 @@
-/*
- * Copyright 2025 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO12M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKFRO12M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
-#define BOARD_BOOTCLOCKFRO12M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO12M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
-#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
-#define BOARD_BOOTCLOCKFRO12M_CLK_48M_CLOCK           0UL            /* Clock consumers of CLK_48M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO12M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO12M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO12M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO12M_CPU_CLOCK               12000000UL     /* Clock consumers of CPU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
-#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
-#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
-#define BOARD_BOOTCLOCKFRO12M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO12M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO12M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_FRO_HF_DIV_CLOCK        0UL            /* Clock consumers of FRO_HF_DIV_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_FRO_HF_CLOCK            0UL            /* Clock consumers of FRO_HF_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO12M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
-#define BOARD_BOOTCLOCKFRO12M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
-#define BOARD_BOOTCLOCKFRO12M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
-#define BOARD_BOOTCLOCKFRO12M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
-#define BOARD_BOOTCLOCKFRO12M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
-#define BOARD_BOOTCLOCKFRO12M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
-#define BOARD_BOOTCLOCKFRO12M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
-#define BOARD_BOOTCLOCKFRO12M_MAIN_CLOCK              12000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
-#define BOARD_BOOTCLOCKFRO12M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
-#define BOARD_BOOTCLOCKFRO12M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_SLOW_CLOCK              3000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
-#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             12000000UL     /* Clock consumers of TRACE_clock output : SWD */
-#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
-#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
-#define BOARD_BOOTCLOCKFRO12M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO12M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO12M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO12M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO24M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK           24000000U  /*!< Core clock frequency: 24000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKFRO24M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
-#define BOARD_BOOTCLOCKFRO24M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO24M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
-#define BOARD_BOOTCLOCKFRO24M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
-#define BOARD_BOOTCLOCKFRO24M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO24M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO24M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO24M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO24M_CPU_CLOCK               24000000UL     /* Clock consumers of CPU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
-#define BOARD_BOOTCLOCKFRO24M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
-#define BOARD_BOOTCLOCKFRO24M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
-#define BOARD_BOOTCLOCKFRO24M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO24M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO24M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO24M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
-#define BOARD_BOOTCLOCKFRO24M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
-#define BOARD_BOOTCLOCKFRO24M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
-#define BOARD_BOOTCLOCKFRO24M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
-#define BOARD_BOOTCLOCKFRO24M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
-#define BOARD_BOOTCLOCKFRO24M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
-#define BOARD_BOOTCLOCKFRO24M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
-#define BOARD_BOOTCLOCKFRO24M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
-#define BOARD_BOOTCLOCKFRO24M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
-#define BOARD_BOOTCLOCKFRO24M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_SLOW_CLOCK              6000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO24M_SYSTEM_CLOCK            24000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
-#define BOARD_BOOTCLOCKFRO24M_TRACE_CLOCK             24000000UL     /* Clock consumers of TRACE_clock output : SWD */
-#define BOARD_BOOTCLOCKFRO24M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
-#define BOARD_BOOTCLOCKFRO24M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
-#define BOARD_BOOTCLOCKFRO24M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO24M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO24M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO24M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO48M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK           48000000U  /*!< Core clock frequency: 48000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKFRO48M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
-#define BOARD_BOOTCLOCKFRO48M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO48M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
-#define BOARD_BOOTCLOCKFRO48M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
-#define BOARD_BOOTCLOCKFRO48M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO48M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO48M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO48M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO48M_CPU_CLOCK               48000000UL     /* Clock consumers of CPU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
-#define BOARD_BOOTCLOCKFRO48M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
-#define BOARD_BOOTCLOCKFRO48M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
-#define BOARD_BOOTCLOCKFRO48M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO48M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO48M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO48M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
-#define BOARD_BOOTCLOCKFRO48M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
-#define BOARD_BOOTCLOCKFRO48M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
-#define BOARD_BOOTCLOCKFRO48M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
-#define BOARD_BOOTCLOCKFRO48M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
-#define BOARD_BOOTCLOCKFRO48M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
-#define BOARD_BOOTCLOCKFRO48M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
-#define BOARD_BOOTCLOCKFRO48M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
-#define BOARD_BOOTCLOCKFRO48M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
-#define BOARD_BOOTCLOCKFRO48M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_SLOW_CLOCK              12000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO48M_SYSTEM_CLOCK            48000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
-#define BOARD_BOOTCLOCKFRO48M_TRACE_CLOCK             48000000UL     /* Clock consumers of TRACE_clock output : SWD */
-#define BOARD_BOOTCLOCKFRO48M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
-#define BOARD_BOOTCLOCKFRO48M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
-#define BOARD_BOOTCLOCKFRO48M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO48M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO48M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO48M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO64M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK           64000000U  /*!< Core clock frequency: 64000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKFRO64M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
-#define BOARD_BOOTCLOCKFRO64M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO64M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
-#define BOARD_BOOTCLOCKFRO64M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
-#define BOARD_BOOTCLOCKFRO64M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO64M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO64M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO64M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO64M_CPU_CLOCK               64000000UL     /* Clock consumers of CPU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
-#define BOARD_BOOTCLOCKFRO64M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
-#define BOARD_BOOTCLOCKFRO64M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
-#define BOARD_BOOTCLOCKFRO64M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO64M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO64M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_FRO_HF_DIV_CLOCK        64000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_FRO_HF_CLOCK            64000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO64M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
-#define BOARD_BOOTCLOCKFRO64M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
-#define BOARD_BOOTCLOCKFRO64M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
-#define BOARD_BOOTCLOCKFRO64M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
-#define BOARD_BOOTCLOCKFRO64M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
-#define BOARD_BOOTCLOCKFRO64M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
-#define BOARD_BOOTCLOCKFRO64M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
-#define BOARD_BOOTCLOCKFRO64M_MAIN_CLOCK              64000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
-#define BOARD_BOOTCLOCKFRO64M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
-#define BOARD_BOOTCLOCKFRO64M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_SLOW_CLOCK              16000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO64M_SYSTEM_CLOCK            64000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
-#define BOARD_BOOTCLOCKFRO64M_TRACE_CLOCK             64000000UL     /* Clock consumers of TRACE_clock output : SWD */
-#define BOARD_BOOTCLOCKFRO64M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
-#define BOARD_BOOTCLOCKFRO64M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
-#define BOARD_BOOTCLOCKFRO64M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO64M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO64M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO64M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ******************** Configuration BOARD_BootClockFRO96M **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK           96000000U  /*!< Core clock frequency: 96000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKFRO96M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
-#define BOARD_BOOTCLOCKFRO96M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO96M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
-#define BOARD_BOOTCLOCKFRO96M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
-#define BOARD_BOOTCLOCKFRO96M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO96M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
-#define BOARD_BOOTCLOCKFRO96M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO96M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
-#define BOARD_BOOTCLOCKFRO96M_CPU_CLOCK               96000000UL     /* Clock consumers of CPU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
-#define BOARD_BOOTCLOCKFRO96M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
-#define BOARD_BOOTCLOCKFRO96M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
-#define BOARD_BOOTCLOCKFRO96M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO96M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
-#define BOARD_BOOTCLOCKFRO96M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_FRO_HF_DIV_CLOCK        96000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_FRO_HF_CLOCK            96000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
-#define BOARD_BOOTCLOCKFRO96M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
-#define BOARD_BOOTCLOCKFRO96M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
-#define BOARD_BOOTCLOCKFRO96M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
-#define BOARD_BOOTCLOCKFRO96M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
-#define BOARD_BOOTCLOCKFRO96M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
-#define BOARD_BOOTCLOCKFRO96M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
-#define BOARD_BOOTCLOCKFRO96M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
-#define BOARD_BOOTCLOCKFRO96M_MAIN_CLOCK              96000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
-#define BOARD_BOOTCLOCKFRO96M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
-#define BOARD_BOOTCLOCKFRO96M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_SLOW_CLOCK              24000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
-#define BOARD_BOOTCLOCKFRO96M_SYSTEM_CLOCK            96000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
-#define BOARD_BOOTCLOCKFRO96M_TRACE_CLOCK             96000000UL     /* Clock consumers of TRACE_clock output : SWD */
-#define BOARD_BOOTCLOCKFRO96M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
-#define BOARD_BOOTCLOCKFRO96M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
-#define BOARD_BOOTCLOCKFRO96M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
-#define BOARD_BOOTCLOCKFRO96M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
-
-
-/*******************************************************************************
- * API for BOARD_BootClockFRO96M configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockFRO96M(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
deleted file mode 100644
index 58b0f47e9..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.c
+++ /dev/null
@@ -1,492 +0,0 @@
-/*
- * Copyright 2025 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v17.0
-processor: MCXA153
-package_id: MCXA153VLH
-mcu_data: ksdk2_0
-processor_version: 25.09.10
-board: FRDM-MCXA153
-external_user_signals: {}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-#include "fsl_common.h"
-#include "fsl_port.h"
-#include "fsl_gpio.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void)
-{
-    BOARD_InitDEBUG_UARTPins();
-    BOARD_InitLEDsPins();
-    BOARD_InitBUTTONsPins();
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitDEBUG_UARTPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '51', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
-    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '52', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1, slew_rate: fast, open_drain: disable,
-    drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitDEBUG_UARTPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitDEBUG_UARTPins(void)
-{
-    /* Write to PORT0: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT0);
-    /* LPUART0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
-    /* PORT0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
-
-    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
-                                             .pullSelect = kPORT_PullDisable,
-                                             /* Low internal pull resistor value is selected. */
-                                             .pullValueSelect = kPORT_LowPullResistor,
-                                             /* Fast slew rate is configured */
-                                             .slewRate = kPORT_FastSlewRate,
-                                             /* Passive input filter is disabled */
-                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                             /* Open drain output is disabled */
-                                             .openDrainEnable = kPORT_OpenDrainDisable,
-                                             /* High drive strength is configured */
-                                             .driveStrength = kPORT_HighDriveStrength,
-                                             /* Normal drive strength is configured */
-                                             .driveStrength1 = kPORT_NormalDriveStrength,
-                                             /* Pin is configured as LPUART0_RXD */
-                                             .mux = kPORT_MuxAlt2,
-                                             /* Digital input enabled */
-                                             .inputBuffer = kPORT_InputBufferEnable,
-                                             /* Digital input is not inverted */
-                                             .invertInput = kPORT_InputNormal,
-                                             /* Pin Control Register fields [15:0] are not locked */
-                                             .lockRegister = kPORT_UnlockRegister};
-    /* PORT0_2 (pin 51) is configured as LPUART0_RXD */
-    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
-
-    const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up resistor is enabled */
-                                             .pullSelect = kPORT_PullUp,
-                                             /* Low internal pull resistor value is selected. */
-                                             .pullValueSelect = kPORT_LowPullResistor,
-                                             /* Fast slew rate is configured */
-                                             .slewRate = kPORT_FastSlewRate,
-                                             /* Passive input filter is disabled */
-                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                             /* Open drain output is disabled */
-                                             .openDrainEnable = kPORT_OpenDrainDisable,
-                                             /* Low drive strength is configured */
-                                             .driveStrength = kPORT_LowDriveStrength,
-                                             /* Normal drive strength is configured */
-                                             .driveStrength1 = kPORT_NormalDriveStrength,
-                                             /* Pin is configured as LPUART0_TXD */
-                                             .mux = kPORT_MuxAlt2,
-                                             /* Digital input enabled */
-                                             .inputBuffer = kPORT_InputBufferEnable,
-                                             /* Digital input is not inverted */
-                                             .invertInput = kPORT_InputNormal,
-                                             /* Pin Control Register fields [15:0] are not locked */
-                                             .lockRegister = kPORT_UnlockRegister};
-    /* PORT0_3 (pin 52) is configured as LPUART0_TXD */
-    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitSWD_DEBUGPins:
-- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '50', peripheral: SWD, signal: SWCLK, pin_signal: P0_1/TCLK/SWCLK/LPUART0_CTS_B/LPSPI0_SDI/CT_INP1, slew_rate: fast, open_drain: disable, drive_strength: low,
-    pull_select: down, pull_enable: enable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '49', peripheral: SWD, signal: SWDIO, pin_signal: P0_0/TMS/SWDIO/LPUART0_RTS_B/LPSPI0_PCS0/CT_INP0, slew_rate: fast, open_drain: disable, drive_strength: high,
-    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '51', peripheral: SWD, signal: SWO, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
-    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitSWD_DEBUGPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitSWD_DEBUGPins(void)
-{
-    /* Write to PORT0: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT0);
-    /* PORT0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
-    /* LPUART0 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
-
-    const port_pin_config_t DEBUG_SWD_SWDIO = {/* Internal pull-up resistor is enabled */
-                                               .pullSelect = kPORT_PullUp,
-                                               /* Low internal pull resistor value is selected. */
-                                               .pullValueSelect = kPORT_LowPullResistor,
-                                               /* Fast slew rate is configured */
-                                               .slewRate = kPORT_FastSlewRate,
-                                               /* Passive input filter is disabled */
-                                               .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                               /* Open drain output is disabled */
-                                               .openDrainEnable = kPORT_OpenDrainDisable,
-                                               /* High drive strength is configured */
-                                               .driveStrength = kPORT_HighDriveStrength,
-                                               /* Normal drive strength is configured */
-                                               .driveStrength1 = kPORT_NormalDriveStrength,
-                                               /* Pin is configured as SWDIO */
-                                               .mux = kPORT_MuxAlt1,
-                                               /* Digital input enabled */
-                                               .inputBuffer = kPORT_InputBufferEnable,
-                                               /* Digital input is not inverted */
-                                               .invertInput = kPORT_InputNormal,
-                                               /* Pin Control Register fields [15:0] are not locked */
-                                               .lockRegister = kPORT_UnlockRegister};
-    /* PORT0_0 (pin 49) is configured as SWDIO */
-    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, &DEBUG_SWD_SWDIO);
-
-    const port_pin_config_t DEBUG_SWD_SWDCLK = {/* Internal pull-down resistor is enabled */
-                                                .pullSelect = kPORT_PullDown,
-                                                /* Low internal pull resistor value is selected. */
-                                                .pullValueSelect = kPORT_LowPullResistor,
-                                                /* Fast slew rate is configured */
-                                                .slewRate = kPORT_FastSlewRate,
-                                                /* Passive input filter is disabled */
-                                                .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                                /* Open drain output is disabled */
-                                                .openDrainEnable = kPORT_OpenDrainDisable,
-                                                /* Low drive strength is configured */
-                                                .driveStrength = kPORT_LowDriveStrength,
-                                                /* Normal drive strength is configured */
-                                                .driveStrength1 = kPORT_NormalDriveStrength,
-                                                /* Pin is configured as SWCLK */
-                                                .mux = kPORT_MuxAlt1,
-                                                /* Digital input enabled */
-                                                .inputBuffer = kPORT_InputBufferEnable,
-                                                /* Digital input is not inverted */
-                                                .invertInput = kPORT_InputNormal,
-                                                /* Pin Control Register fields [15:0] are not locked */
-                                                .lockRegister = kPORT_UnlockRegister};
-    /* PORT0_1 (pin 50) is configured as SWCLK */
-    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, &DEBUG_SWD_SWDCLK);
-
-    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
-                                             .pullSelect = kPORT_PullDisable,
-                                             /* Low internal pull resistor value is selected. */
-                                             .pullValueSelect = kPORT_LowPullResistor,
-                                             /* Fast slew rate is configured */
-                                             .slewRate = kPORT_FastSlewRate,
-                                             /* Passive input filter is disabled */
-                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                             /* Open drain output is disabled */
-                                             .openDrainEnable = kPORT_OpenDrainDisable,
-                                             /* High drive strength is configured */
-                                             .driveStrength = kPORT_HighDriveStrength,
-                                             /* Normal drive strength is configured */
-                                             .driveStrength1 = kPORT_NormalDriveStrength,
-                                             /* Pin is configured as SWO */
-                                             .mux = kPORT_MuxAlt1,
-                                             /* Digital input enabled */
-                                             .inputBuffer = kPORT_InputBufferEnable,
-                                             /* Digital input is not inverted */
-                                             .invertInput = kPORT_InputNormal,
-                                             /* Pin Control Register fields [15:0] are not locked */
-                                             .lockRegister = kPORT_UnlockRegister};
-    /* PORT0_2 (pin 51) is configured as SWO */
-    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitLEDsPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '37', peripheral: GPIO3, signal: 'GPIO, 13', pin_signal: P3_13/LPUART2_CTS_B/CT1_MAT3/PWM0_X1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
-    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
-    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '46', peripheral: GPIO3, signal: 'GPIO, 0', pin_signal: P3_0/WUU0_IN22/TRIG_IN0/CT_INP16/PWM0_A0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
-    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitLEDsPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitLEDsPins(void)
-{
-    /* Write to GPIO3: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GateGPIO3);
-    /* Write to PORT3: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT3);
-    /* GPIO3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
-    /* PORT3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
-
-    gpio_pin_config_t LED_BLUE_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO3_0 (pin 46)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
-
-    gpio_pin_config_t LED_RED_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO3_12 (pin 38)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
-
-    gpio_pin_config_t LED_GREEN_config = {
-        .pinDirection = kGPIO_DigitalOutput,
-        .outputLogic = 1U
-    };
-    /* Initialize GPIO functionality on pin PIO3_13 (pin 37)  */
-    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
-
-    /* PORT3_0 (pin 46) is configured as P3_0 */
-    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, kPORT_MuxAlt0);
-
-    PORT3->PCR[0] =
-        ((PORT3->PCR[0] &
-          /* Mask bits to zero which are setting */
-          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
-
-         /* Pull Select: Enables internal pullup resistor. */
-         | PORT_PCR_PS(PCR_PS_ps1)
-
-         /* Pull Enable: Disables. */
-         | PORT_PCR_PE(PCR_PE_pe0)
-
-         /* Slew Rate Enable: Fast. */
-         | PORT_PCR_SRE(PCR_SRE_sre0)
-
-         /* Passive Filter Enable: Disables. */
-         | PORT_PCR_PFE(PCR_PFE_pfe0)
-
-         /* Open Drain Enable: Disables. */
-         | PORT_PCR_ODE(PCR_ODE_ode0)
-
-         /* Drive Strength Enable: Low. */
-         | PORT_PCR_DSE(PCR_DSE_dse0)
-
-         /* Input Buffer Enable: Enables. */
-         | PORT_PCR_IBE(PCR_IBE_ibe1)
-
-         /* Invert Input: Does not invert. */
-         | PORT_PCR_INV(PCR_INV_inv0));
-
-    /* PORT3_12 (pin 38) is configured as P3_12 */
-    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, kPORT_MuxAlt0);
-
-    PORT3->PCR[12] =
-        ((PORT3->PCR[12] &
-          /* Mask bits to zero which are setting */
-          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
-
-         /* Pull Select: Enables internal pullup resistor. */
-         | PORT_PCR_PS(PCR_PS_ps1)
-
-         /* Pull Enable: Disables. */
-         | PORT_PCR_PE(PCR_PE_pe0)
-
-         /* Slew Rate Enable: Fast. */
-         | PORT_PCR_SRE(PCR_SRE_sre0)
-
-         /* Open Drain Enable: Disables. */
-         | PORT_PCR_ODE(PCR_ODE_ode0)
-
-         /* Drive Strength Enable: Low. */
-         | PORT_PCR_DSE(PCR_DSE_dse0)
-
-         /* Input Buffer Enable: Enables. */
-         | PORT_PCR_IBE(PCR_IBE_ibe1)
-
-         /* Invert Input: Does not invert. */
-         | PORT_PCR_INV(PCR_INV_inv0));
-
-    /* PORT3_13 (pin 37) is configured as P3_13 */
-    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, kPORT_MuxAlt0);
-
-    PORT3->PCR[13] =
-        ((PORT3->PCR[13] &
-          /* Mask bits to zero which are setting */
-          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
-
-         /* Pull Select: Enables internal pullup resistor. */
-         | PORT_PCR_PS(PCR_PS_ps1)
-
-         /* Pull Enable: Disables. */
-         | PORT_PCR_PE(PCR_PE_pe0)
-
-         /* Slew Rate Enable: Fast. */
-         | PORT_PCR_SRE(PCR_SRE_sre0)
-
-         /* Open Drain Enable: Disables. */
-         | PORT_PCR_ODE(PCR_ODE_ode0)
-
-         /* Drive Strength Enable: Low. */
-         | PORT_PCR_DSE(PCR_DSE_dse0)
-
-         /* Input Buffer Enable: Enables. */
-         | PORT_PCR_IBE(PCR_IBE_ibe1)
-
-         /* Invert Input: Does not invert. */
-         | PORT_PCR_INV(PCR_INV_inv0));
-}
-
-/* clang-format off */
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitBUTTONsPins:
-- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '1', peripheral: GPIO1, signal: 'GPIO, 7', pin_signal: P1_7/WUU0_IN9/TRIG_OUT2/LPUART2_CTS_B/CT_INP7/ADC0_A23, slew_rate: fast, open_drain: disable,
-    drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
-  - {pin_num: '8', peripheral: GPIO1, signal: 'GPIO, 29', pin_signal: P1_29/RESET_B/SPC_LPREQ, slew_rate: fast, open_drain: enable, drive_strength: low, pull_select: up,
-    pull_enable: enable, passive_filter: enable, pull_value: low, input_buffer: enable, invert_input: normal}
-  - {pin_num: '32', peripheral: GPIO3, signal: 'GPIO, 29', pin_signal: P3_29/WUU0_IN27/ISPMODE_N/CT_INP3/ADC0_A14, slew_rate: fast, open_drain: disable, drive_strength: low,
-    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-/* clang-format on */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBUTTONsPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBUTTONsPins(void)
-{
-    /* Write to PORT1: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT1);
-    /* Write to PORT3: Peripheral clock is enabled */
-    CLOCK_EnableClock(kCLOCK_GatePORT3);
-    /* GPIO1 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kGPIO1_RST_SHIFT_RSTn);
-    /* PORT1 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT1_RST_SHIFT_RSTn);
-    /* GPIO3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
-    /* PORT3 peripheral is released from reset */
-    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
-
-    const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */
-                                   .pullSelect = kPORT_PullUp,
-                                   /* Low internal pull resistor value is selected. */
-                                   .pullValueSelect = kPORT_LowPullResistor,
-                                   /* Fast slew rate is configured */
-                                   .slewRate = kPORT_FastSlewRate,
-                                   /* Passive input filter is enabled */
-                                   .passiveFilterEnable = kPORT_PassiveFilterEnable,
-                                   /* Open drain output is enabled */
-                                   .openDrainEnable = kPORT_OpenDrainEnable,
-                                   /* Low drive strength is configured */
-                                   .driveStrength = kPORT_LowDriveStrength,
-                                   /* Normal drive strength is configured */
-                                   .driveStrength1 = kPORT_NormalDriveStrength,
-                                   /* Pin is configured as P1_29 */
-                                   .mux = kPORT_MuxAlt0,
-                                   /* Digital input enabled */
-                                   .inputBuffer = kPORT_InputBufferEnable,
-                                   /* Digital input is not inverted */
-                                   .invertInput = kPORT_InputNormal,
-                                   /* Pin Control Register fields [15:0] are not locked */
-                                   .lockRegister = kPORT_UnlockRegister};
-    /* PORT1_29 (pin 8) is configured as P1_29 */
-    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW1_PORT, BOARD_INITBUTTONSPINS_SW1_PIN, &SW1);
-
-    const port_pin_config_t SW3 = {/* Internal pull-up/down resistor is disabled */
-                                   .pullSelect = kPORT_PullDisable,
-                                   /* Low internal pull resistor value is selected. */
-                                   .pullValueSelect = kPORT_LowPullResistor,
-                                   /* Fast slew rate is configured */
-                                   .slewRate = kPORT_FastSlewRate,
-                                   /* Passive input filter is disabled */
-                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                   /* Open drain output is disabled */
-                                   .openDrainEnable = kPORT_OpenDrainDisable,
-                                   /* Low drive strength is configured */
-                                   .driveStrength = kPORT_LowDriveStrength,
-                                   /* Normal drive strength is configured */
-                                   .driveStrength1 = kPORT_NormalDriveStrength,
-                                   /* Pin is configured as P1_7 */
-                                   .mux = kPORT_MuxAlt0,
-                                   /* Digital input enabled */
-                                   .inputBuffer = kPORT_InputBufferEnable,
-                                   /* Digital input is not inverted */
-                                   .invertInput = kPORT_InputNormal,
-                                   /* Pin Control Register fields [15:0] are not locked */
-                                   .lockRegister = kPORT_UnlockRegister};
-    /* PORT1_7 (pin 1) is configured as P1_7 */
-    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW3_PORT, BOARD_INITBUTTONSPINS_SW3_PIN, &SW3);
-
-    const port_pin_config_t ISP = {/* Internal pull-up resistor is enabled */
-                                   .pullSelect = kPORT_PullUp,
-                                   /* Low internal pull resistor value is selected. */
-                                   .pullValueSelect = kPORT_LowPullResistor,
-                                   /* Fast slew rate is configured */
-                                   .slewRate = kPORT_FastSlewRate,
-                                   /* Passive input filter is disabled */
-                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
-                                   /* Open drain output is disabled */
-                                   .openDrainEnable = kPORT_OpenDrainDisable,
-                                   /* Low drive strength is configured */
-                                   .driveStrength = kPORT_LowDriveStrength,
-                                   /* Normal drive strength is configured */
-                                   .driveStrength1 = kPORT_NormalDriveStrength,
-                                   /* Pin is configured as P3_29 */
-                                   .mux = kPORT_MuxAlt0,
-                                   /* Digital input enabled */
-                                   .inputBuffer = kPORT_InputBufferEnable,
-                                   /* Digital input is not inverted */
-                                   .invertInput = kPORT_InputNormal,
-                                   /* Pin Control Register fields [15:0] are not locked */
-                                   .lockRegister = kPORT_UnlockRegister};
-    /* PORT3_29 (pin 32) is configured as P3_29 */
-    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_ISP_PORT, BOARD_INITBUTTONSPINS_ISP_PIN, &ISP);
-}
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h b/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
deleted file mode 100644
index 4a42f266d..000000000
--- a/hw/bsp/mcx/boards/frdm_mcxa153/board/pin_mux.h
+++ /dev/null
@@ -1,211 +0,0 @@
-/*
- * Copyright 2025 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
-  @{ */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
-                                                                        /* @} */
-
-/*! @name PORT0_3 (number 52), P0_3/J25[1]/J18[8]
-  @{ */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 3U                   /*!<@brief PORT pin number */
-#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 3U)      /*!<@brief PORT pin mask */
-                                                                        /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitDEBUG_UARTPins(void);
-
-/*! @name PORT0_1 (number 50), P0_1/SWCLK/JP10[2]/J18[4]
-  @{ */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT PORT0               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 1U                   /*!<@brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 1U)      /*!<@brief PORT pin mask */
-                                                                          /* @} */
-
-/*! @name PORT0_0 (number 49), P0_0/SWDIO/J18[2]
-  @{ */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT PORT0               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 0U                   /*!<@brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
-                                                                         /* @} */
-
-/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
-  @{ */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
-#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
-                                                                       /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitSWD_DEBUGPins(void);
-
-#define PCR_DSE_dse0 0x00u /*!<@brief Drive Strength Enable: Low */
-#define PCR_IBE_ibe1 0x01u /*!<@brief Input Buffer Enable: Enables */
-#define PCR_INV_inv0 0x00u /*!<@brief Invert Input: Does not invert */
-#define PCR_ODE_ode0 0x00u /*!<@brief Open Drain Enable: Disables */
-#define PCR_PE_pe0 0x00u   /*!<@brief Pull Enable: Disables */
-#define PCR_PFE_pfe0 0x00u /*!<@brief Passive Filter Enable: Disables */
-#define PCR_PS_ps1 0x01u   /*!<@brief Pull Select: Enables internal pullup resistor */
-#define PCR_SRE_sre0 0x00u /*!<@brief Slew Rate Enable: Fast */
-
-/*! @name PORT3_13 (number 37), P3_13/J1[14]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_GREEN_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 13U              /*!<@brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITLEDSPINS_LED_GREEN_PORT PORT3                /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_GREEN_PIN 13U                   /*!<@brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
-                                                               /* @} */
-
-/*! @name PORT3_12 (number 38), P3_12/J1[12]/J5[1]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_RED_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U              /*!<@brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITLEDSPINS_LED_RED_PORT PORT3                /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_RED_PIN 12U                   /*!<@brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 12U)      /*!<@brief PORT pin mask */
-                                                             /* @} */
-
-/*! @name PORT3_0 (number 46), P3_0/J1[8]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO3               /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_BLUE_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
-#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 0U              /*!<@brief GPIO pin number */
-#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 0U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITLEDSPINS_LED_BLUE_PORT PORT3               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITLEDSPINS_LED_BLUE_PIN 0U                   /*!<@brief PORT pin number */
-#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
-                                                             /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitLEDsPins(void);
-
-/*! @name PORT1_7 (number 1), P1_7/J1[1]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITBUTTONSPINS_SW3_GPIO GPIO1               /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN 7U              /*!<@brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITBUTTONSPINS_SW3_PORT PORT1               /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_SW3_PIN 7U                   /*!<@brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_SW3_PIN_MASK (1U << 7U)      /*!<@brief PORT pin mask */
-                                                           /* @} */
-
-/*! @name PORT1_29 (number 8), P1_29/J3[6]/J18[10]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO1                /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 29U              /*!<@brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITBUTTONSPINS_SW1_PORT PORT1                /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_SW1_PIN 29U                   /*!<@brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_SW1_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
-                                                            /* @} */
-
-/*! @name PORT3_29 (number 32), P3_29/J18[7]/J4[11]
-  @{ */
-
-/* Symbols to be used with GPIO driver */
-#define BOARD_INITBUTTONSPINS_ISP_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN 29U              /*!<@brief GPIO pin number */
-#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
-
-/* Symbols to be used with PORT driver */
-#define BOARD_INITBUTTONSPINS_ISP_PORT PORT3                /*!<@brief PORT peripheral base pointer */
-#define BOARD_INITBUTTONSPINS_ISP_PIN 29U                   /*!<@brief PORT pin number */
-#define BOARD_INITBUTTONSPINS_ISP_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
-                                                            /* @} */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitBUTTONsPins(void);
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
new file mode 100644
index 000000000..599110d7a
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.c
@@ -0,0 +1,559 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ *
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: MCXA153
+package_id: MCXA153VLH
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: FRDM-MCXA153
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_clock.h"
+#include "clock_config.h"
+#include "fsl_spc.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockFRO96M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CPU_clock.outFreq, value: 12 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: MAIN_clock.outFreq, value: 12 MHz}
+- {id: Slow_clock.outFreq, value: 3 MHz}
+- {id: System_clock.outFreq, value: 12 MHz}
+- {id: TRACE_clock.outFreq, value: 12 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: SCGMode, value: SIRC}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
+- {id: SCG_FIRCCSR_FIRCEN_CFG, value: Disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO12M */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO12M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO24M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO24M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 24 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 48 MHz}
+- {id: Slow_clock.outFreq, value: 6 MHz}
+- {id: System_clock.outFreq, value: 24 MHz}
+- {id: TRACE_clock.outFreq, value: 24 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SYSCON.AHBCLKDIV.scale, value: '2'}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO24M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 2U);               /* !< Set AHBCLKDIV divider to value 2 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO24M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x0U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO24M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO48M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO48M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 48 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 48 MHz}
+- {id: FRO_HF_clock.outFreq, value: 48 MHz}
+- {id: MAIN_clock.outFreq, value: 48 MHz}
+- {id: Slow_clock.outFreq, value: 12 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+- {id: TRACE_clock.outFreq, value: 48 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO48M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(48000000U);               /*!< Enable FRO HF(48MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO48M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P0V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_MidDriveVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO48M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO64M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO64M
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 64 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 64 MHz}
+- {id: FRO_HF_clock.outFreq, value: 64 MHz}
+- {id: MAIN_clock.outFreq, value: 64 MHz}
+- {id: Slow_clock.outFreq, value: 16 MHz}
+- {id: System_clock.outFreq, value: 64 MHz}
+- {id: TRACE_clock.outFreq, value: 64 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: VDD_CORE, value: voltage_1v1}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FROHFDIV.scale, value: '1', locked: true}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+- {id: SYSCON.AHBCLKDIV.scale, value: '1', locked: true}
+sources:
+- {id: SCG.FIRC.outFreq, value: 64 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO64M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(64000000U);               /*!< Enable FRO HF(64MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO64M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x1U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO64M_CORE_CLOCK;
+}
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO96M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO96M
+called_from_default_init: true
+outputs:
+- {id: CLK_1M_clock.outFreq, value: 1 MHz}
+- {id: CLK_48M_clock.outFreq, value: 48 MHz}
+- {id: CPU_clock.outFreq, value: 96 MHz}
+- {id: FRO_12M_clock.outFreq, value: 12 MHz}
+- {id: FRO_HF_DIV_clock.outFreq, value: 96 MHz}
+- {id: FRO_HF_clock.outFreq, value: 96 MHz}
+- {id: MAIN_clock.outFreq, value: 96 MHz}
+- {id: Slow_clock.outFreq, value: 24 MHz}
+- {id: System_clock.outFreq, value: 96 MHz}
+- {id: TRACE_clock.outFreq, value: 96 MHz}
+- {id: UTICK_clock.outFreq, value: 1 MHz}
+- {id: WWDT0_clock.outFreq, value: 1 MHz}
+settings:
+- {id: VDD_CORE, value: voltage_1v1}
+- {id: MRCC.FREQMEREFCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.FREQMETARGETCLKSEL.sel, value: MRCC.aoi0_out0}
+- {id: MRCC.OSTIMERCLKSEL.sel, value: VBAT.CLK16K_1}
+sources:
+- {id: SCG.FIRC.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO96M(void)
+{
+    uint32_t coreFreq;
+    spc_active_mode_core_ldo_option_t ldoOption;
+    spc_sram_voltage_config_t sramOption;
+
+    /* Get the CPU Core frequency */
+    coreFreq = CLOCK_GetCoreSysClkFreq();
+
+    /* The flow of increasing voltage and frequency */
+    if (coreFreq <= BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+    }
+
+
+    /*!< Set up system dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivAHBCLK, 1U);               /* !< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivFRO_HF_DIV, 1U);           /* !< Set FROHFDIV divider to value 1 */
+
+    CLOCK_SetupFROHFClocking(96000000U);               /*!< Enable FRO HF(96MHz) output */
+
+    CLOCK_SetupFRO12MClocking();                /*!< Setup FRO12M clock */
+
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);       /* !< Switch MAIN_CLK to FRO_HF */
+
+    /* The flow of decreasing voltage and frequency */
+    if (coreFreq > BOARD_BOOTCLOCKFRO96M_CORE_CLOCK) {
+        /* Configure Flash to support different voltage level and frequency */
+        FMU0->FCTRL = (FMU0->FCTRL & ~((uint32_t)FMU_FCTRL_RWSC_MASK)) | (FMU_FCTRL_RWSC(0x2U));
+        /* Specifies the operating voltage for the SRAM's read/write timing margin */
+        sramOption.operateVoltage = kSPC_sramOperateAt1P1V;
+        sramOption.requestVoltageUpdate =  true;
+        (void)SPC_SetSRAMOperateVoltage(SPC0, &sramOption);
+        /* Set the LDO_CORE VDD regulator level */
+        ldoOption.CoreLDOVoltage = kSPC_CoreLDO_NormalVoltage;
+        ldoOption.CoreLDODriveStrength = kSPC_CoreLDO_NormalDriveStrength;
+        (void)SPC_SetActiveModeCoreLDORegulatorConfig(SPC0, &ldoOption);
+    }
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kCPU_CLK_to_TRACE);                    /* !< Switch TRACE to CPU_CLK */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI0);                /* !< Switch LPSPI0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPSPI1);                /* !< Switch LPSPI1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPI2C0);                /* !< Switch LPI2C0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART0);               /* !< Switch LPUART0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART1);               /* !< Switch LPUART1 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPUART2);               /* !< Switch LPUART2 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_LPTMR0);                /* !< Switch LPTMR0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_I3C0FCLK);              /* !< Switch I3C0FCLK to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP0);                  /* !< Switch CMP0 to FRO_HF_DIV */
+    CLOCK_AttachClk(kFRO_HF_DIV_to_CMP1);                  /* !< Switch CMP1 to FRO_HF_DIV */
+
+    /*!< Set up dividers */
+    CLOCK_SetClockDiv(kCLOCK_DivTRACE, 1U);                /* !< Set TRACECLKDIV divider to value 1 */
+    CLOCK_SetClockDiv(kCLOCK_DivWWDT0, 1U);                /* !< Set WWDT0CLKDIV divider to value 1 */
+
+    /* Set SystemCoreClock variable */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO96M_CORE_CLOCK;
+}
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
new file mode 100644
index 000000000..d609eb468
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/clock_config.h
@@ -0,0 +1,385 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO12M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO12M_CLK_48M_CLOCK           0UL            /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO12M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO12M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO12M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO12M_CPU_CLOCK               12000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO12M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO12M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_FRO_HF_DIV_CLOCK        0UL            /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_FRO_HF_CLOCK            0UL            /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO12M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO12M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO12M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO12M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO12M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO12M_MAIN_CLOCK              12000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SLOW_CLOCK              3000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             12000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO24M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO24M_CORE_CLOCK           24000000U  /*!< Core clock frequency: 24000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO24M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO24M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO24M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO24M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO24M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO24M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO24M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO24M_CPU_CLOCK               24000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO24M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO24M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO24M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO24M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO24M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO24M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO24M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO24M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO24M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO24M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO24M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO24M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_SLOW_CLOCK              6000000UL      /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO24M_SYSTEM_CLOCK            24000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO24M_TRACE_CLOCK             24000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO24M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO24M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO24M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO24M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO24M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO24M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO48M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO48M_CORE_CLOCK           48000000U  /*!< Core clock frequency: 48000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO48M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO48M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO48M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO48M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO48M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO48M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO48M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO48M_CPU_CLOCK               48000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO48M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO48M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO48M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO48M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_FRO_HF_DIV_CLOCK        48000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_FRO_HF_CLOCK            48000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO48M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO48M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO48M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO48M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO48M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO48M_MAIN_CLOCK              48000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO48M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO48M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_SLOW_CLOCK              12000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO48M_SYSTEM_CLOCK            48000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO48M_TRACE_CLOCK             48000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO48M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO48M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO48M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO48M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO48M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO48M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO64M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO64M_CORE_CLOCK           64000000U  /*!< Core clock frequency: 64000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO64M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO64M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO64M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO64M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO64M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO64M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO64M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO64M_CPU_CLOCK               64000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO64M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO64M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO64M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO64M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_FRO_HF_DIV_CLOCK        64000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_FRO_HF_CLOCK            64000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO64M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO64M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO64M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO64M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO64M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO64M_MAIN_CLOCK              64000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO64M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO64M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_SLOW_CLOCK              16000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO64M_SYSTEM_CLOCK            64000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO64M_TRACE_CLOCK             64000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO64M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO64M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO64M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO64M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO64M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO64M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO96M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO96M_CORE_CLOCK           96000000U  /*!< Core clock frequency: 96000000Hz */
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO96M_ADC0_CLOCK              0UL            /* Clock consumers of ADC0_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO96M_CLK16K_0_CLOCK          0UL            /* Clock consumers of CLK16K_0_clock output : CMP0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO96M_CLK16K_1_CLOCK          0UL            /* Clock consumers of CLK16K_1_clock output : CMP1, LPTMR0, WAKETIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CLK_1M_CLOCK            1000000UL      /* Clock consumers of CLK_1M_clock output : CMC */
+#define BOARD_BOOTCLOCKFRO96M_CLK_48M_CLOCK           48000000UL     /* Clock consumers of CLK_48M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CLK_IN_CLOCK            0UL            /* Clock consumers of CLK_IN_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CMP0FDIV_CLOCK          0UL            /* Clock consumers of CMP0FDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO96M_CMP0RRDIV_CLOCK         0UL            /* Clock consumers of CMP0RRDIV_clock output : CMP0 */
+#define BOARD_BOOTCLOCKFRO96M_CMP1FDIV_CLOCK          0UL            /* Clock consumers of CMP1FDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO96M_CMP1RRDIV_CLOCK         0UL            /* Clock consumers of CMP1RRDIV_clock output : CMP1 */
+#define BOARD_BOOTCLOCKFRO96M_CPU_CLOCK               96000000UL     /* Clock consumers of CPU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO96M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO96M_FREQME_REFERENCE_CLOCK  0UL            /* Clock consumers of FREQME_reference_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO96M_FREQME_TARGET_CLOCK     0UL            /* Clock consumers of FREQME_target_clock output : FREQME0 */
+#define BOARD_BOOTCLOCKFRO96M_FRO_12M_CLOCK           12000000UL     /* Clock consumers of FRO_12M_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_FRO_HF_DIV_CLOCK        96000000UL     /* Clock consumers of FRO_HF_DIV_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_FRO_HF_CLOCK            96000000UL     /* Clock consumers of FRO_HF_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_I3C_FCLK_CLOCK          0UL            /* Clock consumers of I3C_FCLK_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_TC_CLOCK       0UL            /* Clock consumers of I3C_SLOW_TC_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_I3C_SLOW_CLOCK          0UL            /* Clock consumers of I3C_SLOW_clock output : I3C0 */
+#define BOARD_BOOTCLOCKFRO96M_LPI2C0_CLOCK            0UL            /* Clock consumers of LPI2C0_clock output : LPI2C0 */
+#define BOARD_BOOTCLOCKFRO96M_LPSPI0_CLOCK            0UL            /* Clock consumers of LPSPI0_clock output : LPSPI0 */
+#define BOARD_BOOTCLOCKFRO96M_LPSPI1_CLOCK            0UL            /* Clock consumers of LPSPI1_clock output : LPSPI1 */
+#define BOARD_BOOTCLOCKFRO96M_LPTMR0_CLOCK            0UL            /* Clock consumers of LPTMR0_clock output : LPTMR0 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART0_CLOCK           0UL            /* Clock consumers of LPUART0_clock output : LPUART0 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART1_CLOCK           0UL            /* Clock consumers of LPUART1_clock output : LPUART1 */
+#define BOARD_BOOTCLOCKFRO96M_LPUART2_CLOCK           0UL            /* Clock consumers of LPUART2_clock output : LPUART2 */
+#define BOARD_BOOTCLOCKFRO96M_MAIN_CLOCK              96000000UL     /* Clock consumers of MAIN_clock output : FLEXPWM0 */
+#define BOARD_BOOTCLOCKFRO96M_OSTIMER_CLOCK           0UL            /* Clock consumers of OSTIMER_clock output : OSTIMER0 */
+#define BOARD_BOOTCLOCKFRO96M_FIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.FIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_SIRC_TRIM_CLOCK         0UL            /* Clock consumers of SCG.SIRC_TRIM_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_SLOW_CLOCK              24000000UL     /* Clock consumers of Slow_clock output : AOI0, CMC, CMP0, LPTMR0, WAKETIMER0, WUU0 */
+#define BOARD_BOOTCLOCKFRO96M_SYSTEM_CLOCK            96000000UL     /* Clock consumers of System_clock output : ADC0, CMP1, CTIMER0, CTIMER1, CTIMER2, DMA0, FLEXPWM0, FREQME0, GPIO0, GPIO1, GPIO2, GPIO3, I3C0, INPUTMUX0, LPI2C0, LPSPI0, LPSPI1, LPUART0, LPUART1, LPUART2, OSTIMER0, PORT0, PORT1, PORT2, PORT3, QDC0, SWD, SysTick, USB0, UTICK0, WWDT0 */
+#define BOARD_BOOTCLOCKFRO96M_TRACE_CLOCK             96000000UL     /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO96M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0 */
+#define BOARD_BOOTCLOCKFRO96M_UTICK_CLOCK             1000000UL      /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO96M_WUU_CLOCK               0UL            /* Clock consumers of WUU_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO96M_WWDT0_CLOCK             1000000UL      /* Clock consumers of WWDT0_clock output : WWDT0 */
+
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
new file mode 100644
index 000000000..58b0f47e9
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.c
@@ -0,0 +1,492 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: MCXA153
+package_id: MCXA153VLH
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: FRDM-MCXA153
+external_user_signals: {}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_port.h"
+#include "fsl_gpio.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '51', peripheral: LPUART0, signal: RX, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
+    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '52', peripheral: LPUART0, signal: TX, pin_signal: P0_3/TDI/LPUART0_TXD/LPSPI0_SDO/CT0_MAT1/UTICK_CAP1/CMP0_OUT/CMP1_IN1, slew_rate: fast, open_drain: disable,
+    drive_strength: low, pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Write to PORT0: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT0);
+    /* LPUART0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
+    /* PORT0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
+
+    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
+                                             .pullSelect = kPORT_PullDisable,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* High drive strength is configured */
+                                             .driveStrength = kPORT_HighDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as LPUART0_RXD */
+                                             .mux = kPORT_MuxAlt2,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_2 (pin 51) is configured as LPUART0_RXD */
+    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
+
+    const port_pin_config_t DEBUG_UART_TX = {/* Internal pull-up resistor is enabled */
+                                             .pullSelect = kPORT_PullUp,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* Low drive strength is configured */
+                                             .driveStrength = kPORT_LowDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as LPUART0_TXD */
+                                             .mux = kPORT_MuxAlt2,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_3 (pin 52) is configured as LPUART0_TXD */
+    PORT_SetPinConfig(BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, &DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '50', peripheral: SWD, signal: SWCLK, pin_signal: P0_1/TCLK/SWCLK/LPUART0_CTS_B/LPSPI0_SDI/CT_INP1, slew_rate: fast, open_drain: disable, drive_strength: low,
+    pull_select: down, pull_enable: enable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '49', peripheral: SWD, signal: SWDIO, pin_signal: P0_0/TMS/SWDIO/LPUART0_RTS_B/LPSPI0_PCS0/CT_INP0, slew_rate: fast, open_drain: disable, drive_strength: high,
+    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '51', peripheral: SWD, signal: SWO, pin_signal: P0_2/TDO/SWO/LPUART0_RXD/LPSPI0_SCK/CT0_MAT0/UTICK_CAP0/I3C0_PUR, slew_rate: fast, open_drain: disable,
+    drive_strength: high, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Write to PORT0: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT0);
+    /* PORT0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT0_RST_SHIFT_RSTn);
+    /* LPUART0 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kLPUART0_RST_SHIFT_RSTn);
+
+    const port_pin_config_t DEBUG_SWD_SWDIO = {/* Internal pull-up resistor is enabled */
+                                               .pullSelect = kPORT_PullUp,
+                                               /* Low internal pull resistor value is selected. */
+                                               .pullValueSelect = kPORT_LowPullResistor,
+                                               /* Fast slew rate is configured */
+                                               .slewRate = kPORT_FastSlewRate,
+                                               /* Passive input filter is disabled */
+                                               .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                               /* Open drain output is disabled */
+                                               .openDrainEnable = kPORT_OpenDrainDisable,
+                                               /* High drive strength is configured */
+                                               .driveStrength = kPORT_HighDriveStrength,
+                                               /* Normal drive strength is configured */
+                                               .driveStrength1 = kPORT_NormalDriveStrength,
+                                               /* Pin is configured as SWDIO */
+                                               .mux = kPORT_MuxAlt1,
+                                               /* Digital input enabled */
+                                               .inputBuffer = kPORT_InputBufferEnable,
+                                               /* Digital input is not inverted */
+                                               .invertInput = kPORT_InputNormal,
+                                               /* Pin Control Register fields [15:0] are not locked */
+                                               .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_0 (pin 49) is configured as SWDIO */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, &DEBUG_SWD_SWDIO);
+
+    const port_pin_config_t DEBUG_SWD_SWDCLK = {/* Internal pull-down resistor is enabled */
+                                                .pullSelect = kPORT_PullDown,
+                                                /* Low internal pull resistor value is selected. */
+                                                .pullValueSelect = kPORT_LowPullResistor,
+                                                /* Fast slew rate is configured */
+                                                .slewRate = kPORT_FastSlewRate,
+                                                /* Passive input filter is disabled */
+                                                .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                                /* Open drain output is disabled */
+                                                .openDrainEnable = kPORT_OpenDrainDisable,
+                                                /* Low drive strength is configured */
+                                                .driveStrength = kPORT_LowDriveStrength,
+                                                /* Normal drive strength is configured */
+                                                .driveStrength1 = kPORT_NormalDriveStrength,
+                                                /* Pin is configured as SWCLK */
+                                                .mux = kPORT_MuxAlt1,
+                                                /* Digital input enabled */
+                                                .inputBuffer = kPORT_InputBufferEnable,
+                                                /* Digital input is not inverted */
+                                                .invertInput = kPORT_InputNormal,
+                                                /* Pin Control Register fields [15:0] are not locked */
+                                                .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_1 (pin 50) is configured as SWCLK */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, &DEBUG_SWD_SWDCLK);
+
+    const port_pin_config_t DEBUG_UART_RX = {/* Internal pull-up/down resistor is disabled */
+                                             .pullSelect = kPORT_PullDisable,
+                                             /* Low internal pull resistor value is selected. */
+                                             .pullValueSelect = kPORT_LowPullResistor,
+                                             /* Fast slew rate is configured */
+                                             .slewRate = kPORT_FastSlewRate,
+                                             /* Passive input filter is disabled */
+                                             .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                             /* Open drain output is disabled */
+                                             .openDrainEnable = kPORT_OpenDrainDisable,
+                                             /* High drive strength is configured */
+                                             .driveStrength = kPORT_HighDriveStrength,
+                                             /* Normal drive strength is configured */
+                                             .driveStrength1 = kPORT_NormalDriveStrength,
+                                             /* Pin is configured as SWO */
+                                             .mux = kPORT_MuxAlt1,
+                                             /* Digital input enabled */
+                                             .inputBuffer = kPORT_InputBufferEnable,
+                                             /* Digital input is not inverted */
+                                             .invertInput = kPORT_InputNormal,
+                                             /* Pin Control Register fields [15:0] are not locked */
+                                             .lockRegister = kPORT_UnlockRegister};
+    /* PORT0_2 (pin 51) is configured as SWO */
+    PORT_SetPinConfig(BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN, &DEBUG_UART_RX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '37', peripheral: GPIO3, signal: 'GPIO, 13', pin_signal: P3_13/LPUART2_CTS_B/CT1_MAT3/PWM0_X1, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '38', peripheral: GPIO3, signal: 'GPIO, 12', pin_signal: P3_12/LPUART2_RTS_B/CT1_MAT2/PWM0_X0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '46', peripheral: GPIO3, signal: 'GPIO, 0', pin_signal: P3_0/WUU0_IN22/TRIG_IN0/CT_INP16/PWM0_A0, direction: OUTPUT, gpio_init_state: 'true', slew_rate: fast,
+    open_drain: disable, drive_strength: low, pull_select: up, pull_enable: disable, passive_filter: disable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitLEDsPins(void)
+{
+    /* Write to GPIO3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GateGPIO3);
+    /* Write to PORT3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT3);
+    /* GPIO3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
+    /* PORT3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_0 (pin 46)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_12 (pin 38)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO3_13 (pin 37)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
+
+    /* PORT3_0 (pin 46) is configured as P3_0 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[0] =
+        ((PORT3->PCR[0] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_PFE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Passive Filter Enable: Disables. */
+         | PORT_PCR_PFE(PCR_PFE_pfe0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+
+    /* PORT3_12 (pin 38) is configured as P3_12 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[12] =
+        ((PORT3->PCR[12] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+
+    /* PORT3_13 (pin 37) is configured as P3_13 */
+    PORT_SetPinMux(BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, kPORT_MuxAlt0);
+
+    PORT3->PCR[13] =
+        ((PORT3->PCR[13] &
+          /* Mask bits to zero which are setting */
+          (~(PORT_PCR_PS_MASK | PORT_PCR_PE_MASK | PORT_PCR_SRE_MASK | PORT_PCR_ODE_MASK | PORT_PCR_DSE_MASK | PORT_PCR_IBE_MASK | PORT_PCR_INV_MASK)))
+
+         /* Pull Select: Enables internal pullup resistor. */
+         | PORT_PCR_PS(PCR_PS_ps1)
+
+         /* Pull Enable: Disables. */
+         | PORT_PCR_PE(PCR_PE_pe0)
+
+         /* Slew Rate Enable: Fast. */
+         | PORT_PCR_SRE(PCR_SRE_sre0)
+
+         /* Open Drain Enable: Disables. */
+         | PORT_PCR_ODE(PCR_ODE_ode0)
+
+         /* Drive Strength Enable: Low. */
+         | PORT_PCR_DSE(PCR_DSE_dse0)
+
+         /* Input Buffer Enable: Enables. */
+         | PORT_PCR_IBE(PCR_IBE_ibe1)
+
+         /* Invert Input: Does not invert. */
+         | PORT_PCR_INV(PCR_INV_inv0));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '1', peripheral: GPIO1, signal: 'GPIO, 7', pin_signal: P1_7/WUU0_IN9/TRIG_OUT2/LPUART2_CTS_B/CT_INP7/ADC0_A23, slew_rate: fast, open_drain: disable,
+    drive_strength: low, pull_select: down, pull_enable: disable, input_buffer: enable, invert_input: normal}
+  - {pin_num: '8', peripheral: GPIO1, signal: 'GPIO, 29', pin_signal: P1_29/RESET_B/SPC_LPREQ, slew_rate: fast, open_drain: enable, drive_strength: low, pull_select: up,
+    pull_enable: enable, passive_filter: enable, pull_value: low, input_buffer: enable, invert_input: normal}
+  - {pin_num: '32', peripheral: GPIO3, signal: 'GPIO, 29', pin_signal: P3_29/WUU0_IN27/ISPMODE_N/CT_INP3/ADC0_A14, slew_rate: fast, open_drain: disable, drive_strength: low,
+    pull_select: up, pull_enable: enable, input_buffer: enable, invert_input: normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Write to PORT1: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT1);
+    /* Write to PORT3: Peripheral clock is enabled */
+    CLOCK_EnableClock(kCLOCK_GatePORT3);
+    /* GPIO1 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO1_RST_SHIFT_RSTn);
+    /* PORT1 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT1_RST_SHIFT_RSTn);
+    /* GPIO3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kGPIO3_RST_SHIFT_RSTn);
+    /* PORT3 peripheral is released from reset */
+    RESET_ReleasePeripheralReset(kPORT3_RST_SHIFT_RSTn);
+
+    const port_pin_config_t SW1 = {/* Internal pull-up resistor is enabled */
+                                   .pullSelect = kPORT_PullUp,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is enabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterEnable,
+                                   /* Open drain output is enabled */
+                                   .openDrainEnable = kPORT_OpenDrainEnable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P1_29 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT1_29 (pin 8) is configured as P1_29 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW1_PORT, BOARD_INITBUTTONSPINS_SW1_PIN, &SW1);
+
+    const port_pin_config_t SW3 = {/* Internal pull-up/down resistor is disabled */
+                                   .pullSelect = kPORT_PullDisable,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is disabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                   /* Open drain output is disabled */
+                                   .openDrainEnable = kPORT_OpenDrainDisable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P1_7 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT1_7 (pin 1) is configured as P1_7 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_SW3_PORT, BOARD_INITBUTTONSPINS_SW3_PIN, &SW3);
+
+    const port_pin_config_t ISP = {/* Internal pull-up resistor is enabled */
+                                   .pullSelect = kPORT_PullUp,
+                                   /* Low internal pull resistor value is selected. */
+                                   .pullValueSelect = kPORT_LowPullResistor,
+                                   /* Fast slew rate is configured */
+                                   .slewRate = kPORT_FastSlewRate,
+                                   /* Passive input filter is disabled */
+                                   .passiveFilterEnable = kPORT_PassiveFilterDisable,
+                                   /* Open drain output is disabled */
+                                   .openDrainEnable = kPORT_OpenDrainDisable,
+                                   /* Low drive strength is configured */
+                                   .driveStrength = kPORT_LowDriveStrength,
+                                   /* Normal drive strength is configured */
+                                   .driveStrength1 = kPORT_NormalDriveStrength,
+                                   /* Pin is configured as P3_29 */
+                                   .mux = kPORT_MuxAlt0,
+                                   /* Digital input enabled */
+                                   .inputBuffer = kPORT_InputBufferEnable,
+                                   /* Digital input is not inverted */
+                                   .invertInput = kPORT_InputNormal,
+                                   /* Pin Control Register fields [15:0] are not locked */
+                                   .lockRegister = kPORT_UnlockRegister};
+    /* PORT3_29 (pin 32) is configured as P3_29 */
+    PORT_SetPinConfig(BOARD_INITBUTTONSPINS_ISP_PORT, BOARD_INITBUTTONSPINS_ISP_PIN, &ISP);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h
new file mode 100644
index 000000000..4a42f266d
--- /dev/null
+++ b/hw/bsp/mcx/boards/frdm_mcxa153/pin_mux.h
@@ -0,0 +1,211 @@
+/*
+ * Copyright 2025 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
+                                                                        /* @} */
+
+/*! @name PORT0_3 (number 52), P0_3/J25[1]/J18[8]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 3U                   /*!<@brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 3U)      /*!<@brief PORT pin mask */
+                                                                        /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void);
+
+/*! @name PORT0_1 (number 50), P0_1/SWCLK/JP10[2]/J18[4]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 1U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 1U)      /*!<@brief PORT pin mask */
+                                                                          /* @} */
+
+/*! @name PORT0_0 (number 49), P0_0/SWDIO/J18[2]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 0U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
+                                                                         /* @} */
+
+/*! @name PORT0_2 (number 51), P0_2/SWO/J25[3]/J18[6]
+  @{ */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PORT PORT0               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN 2U                   /*!<@brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_UART_RX_PIN_MASK (1U << 2U)      /*!<@brief PORT pin mask */
+                                                                       /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void);
+
+#define PCR_DSE_dse0 0x00u /*!<@brief Drive Strength Enable: Low */
+#define PCR_IBE_ibe1 0x01u /*!<@brief Input Buffer Enable: Enables */
+#define PCR_INV_inv0 0x00u /*!<@brief Invert Input: Does not invert */
+#define PCR_ODE_ode0 0x00u /*!<@brief Open Drain Enable: Disables */
+#define PCR_PE_pe0 0x00u   /*!<@brief Pull Enable: Disables */
+#define PCR_PFE_pfe0 0x00u /*!<@brief Passive Filter Enable: Disables */
+#define PCR_PS_ps1 0x01u   /*!<@brief Pull Select: Enables internal pullup resistor */
+#define PCR_SRE_sre0 0x00u /*!<@brief Slew Rate Enable: Fast */
+
+/*! @name PORT3_13 (number 37), P3_13/J1[14]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN 13U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 13U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PORT3_12 (number 38), P3_12/J1[12]/J5[1]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_INIT_GPIO_VALUE 1U        /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN 12U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 12U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_RED_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 12U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 12U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*! @name PORT3_0 (number 46), P3_0/J1[8]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO3               /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN 0U              /*!<@brief GPIO pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 0U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT PORT3               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 0U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void);
+
+/*! @name PORT1_7 (number 1), P1_7/J1[1]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO GPIO1               /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN 7U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_SW3_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_SW3_PORT PORT1               /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW3_PIN 7U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_SW3_PIN_MASK (1U << 7U)      /*!<@brief PORT pin mask */
+                                                           /* @} */
+
+/*! @name PORT1_29 (number 8), P1_29/J3[6]/J18[10]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO GPIO1                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN 29U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_SW1_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_SW1_PORT PORT1                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_SW1_PIN 29U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_SW1_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*! @name PORT3_29 (number 32), P3_29/J18[7]/J4[11]
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO GPIO3                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN 29U              /*!<@brief GPIO pin number */
+#define BOARD_INITBUTTONSPINS_ISP_GPIO_PIN_MASK (1U << 29U) /*!<@brief GPIO pin mask */
+
+/* Symbols to be used with PORT driver */
+#define BOARD_INITBUTTONSPINS_ISP_PORT PORT3                /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_ISP_PIN 29U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_ISP_PIN_MASK (1U << 29U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/mcx/boards/frdm_mcxa156/board.cmake b/hw/bsp/mcx/boards/frdm_mcxa156/board.cmake
index a6aa6c2e4..0d8ec3229 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa156/board.cmake
+++ b/hw/bsp/mcx/boards/frdm_mcxa156/board.cmake
@@ -1,4 +1,5 @@
 set(MCU_VARIANT MCXA156)
+set(MCU_FAMILY MCXA)
 set(MCU_CORE MCXA156)
 
 set(JLINK_DEVICE MCXA156_M33)
@@ -18,4 +19,7 @@ function(update_board TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
     )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/${MCU_FAMILY}/periph1
+    )
 endfunction()
diff --git a/hw/bsp/mcx/boards/frdm_mcxa156/board.mk b/hw/bsp/mcx/boards/frdm_mcxa156/board.mk
index d4a59b32a..9d24b5fab 100644
--- a/hw/bsp/mcx/boards/frdm_mcxa156/board.mk
+++ b/hw/bsp/mcx/boards/frdm_mcxa156/board.mk
@@ -1,4 +1,5 @@
 MCU_VARIANT = MCXA156
+MCU_FAMILY = MCXA
 MCU_CORE = MCXA156
 PORT = 0
 
@@ -7,6 +8,9 @@ CFLAGS += \
 	-DCPU_MCXA156VLH \
 	-DCFG_TUSB_MCU=OPT_MCU_MCXA15 \
 
+INC += \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/periph1
+
 JLINK_DEVICE = MCXA156
 PYOCD_TARGET = MCXA156
 
diff --git a/hw/bsp/mcx/boards/frdm_mcxn947/board.cmake b/hw/bsp/mcx/boards/frdm_mcxn947/board.cmake
index 8c3280743..3bf7851bd 100644
--- a/hw/bsp/mcx/boards/frdm_mcxn947/board.cmake
+++ b/hw/bsp/mcx/boards/frdm_mcxn947/board.cmake
@@ -1,4 +1,5 @@
 set(MCU_VARIANT MCXN947)
+set(MCU_FAMILY MCXN)
 set(MCU_CORE MCXN947_cm33_core0)
 
 set(JLINK_DEVICE MCXN947_M33_0)
@@ -18,4 +19,7 @@ function(update_board TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
     )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/${MCU_FAMILY}/periph
+    )
 endfunction()
diff --git a/hw/bsp/mcx/boards/frdm_mcxn947/board.mk b/hw/bsp/mcx/boards/frdm_mcxn947/board.mk
index 22fefd79b..ee1c94f94 100644
--- a/hw/bsp/mcx/boards/frdm_mcxn947/board.mk
+++ b/hw/bsp/mcx/boards/frdm_mcxn947/board.mk
@@ -1,4 +1,5 @@
 MCU_VARIANT = MCXN947
+MCU_FAMILY = MCXN
 MCU_CORE = MCXN947_cm33_core0
 PORT ?= 1
 
@@ -7,6 +8,9 @@ CFLAGS += \
 	-DCPU_MCXN947VDF_cm33_core0 \
 	-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
 
+INC += \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/periph
+
 JLINK_DEVICE = MCXN947_M33_0
 PYOCD_TARGET = MCXN947
 
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.cmake b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
index 8c3280743..3bf7851bd 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.cmake
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.cmake
@@ -1,4 +1,5 @@
 set(MCU_VARIANT MCXN947)
+set(MCU_FAMILY MCXN)
 set(MCU_CORE MCXN947_cm33_core0)
 
 set(JLINK_DEVICE MCXN947_M33_0)
@@ -18,4 +19,7 @@ function(update_board TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
     )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/${MCU_FAMILY}/periph
+    )
 endfunction()
diff --git a/hw/bsp/mcx/boards/mcxn947brk/board.mk b/hw/bsp/mcx/boards/mcxn947brk/board.mk
index 22fefd79b..ee1c94f94 100644
--- a/hw/bsp/mcx/boards/mcxn947brk/board.mk
+++ b/hw/bsp/mcx/boards/mcxn947brk/board.mk
@@ -1,4 +1,5 @@
 MCU_VARIANT = MCXN947
+MCU_FAMILY = MCXN
 MCU_CORE = MCXN947_cm33_core0
 PORT ?= 1
 
@@ -7,6 +8,9 @@ CFLAGS += \
 	-DCPU_MCXN947VDF_cm33_core0 \
 	-DCFG_TUSB_MCU=OPT_MCU_MCXN9 \
 
+INC += \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/periph
+
 JLINK_DEVICE = MCXN947_M33_0
 PYOCD_TARGET = MCXN947
 
diff --git a/hw/bsp/mcx/family.cmake b/hw/bsp/mcx/family.cmake
index d062cec16..89e2aadf2 100644
--- a/hw/bsp/mcx/family.cmake
+++ b/hw/bsp/mcx/family.cmake
@@ -1,7 +1,8 @@
 include_guard()
 
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-mcx)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -26,46 +27,55 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  set(LD_FILE_GNU ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
+
 if (NOT DEFINED STARTUP_FILE_GNU)
-set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+  set(STARTUP_FILE_GNU ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
 endif()
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+if (NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/iar/${MCU_CORE}_flash.icf)
+endif ()
+
+if (NOT DEFINED STARTUP_FILE_IAR)
+  set(STARTUP_FILE_IAR ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/iar/startup_${MCU_CORE}.s)
+endif ()
+
 #------------------------------------
 # Board Target
 #------------------------------------
 function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     # driver
-    ${SDK_DIR}/drivers/gpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/common/fsl_common_arm.c
-    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${MCUX_DIR}/drivers/gpio/fsl_gpio.c
+    ${MCUX_DIR}/drivers/common/fsl_common_arm.c
+    ${MCUX_DIR}/drivers/lpuart/fsl_lpuart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/drivers/spc/fsl_spc.c
     # mcu
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/fsl_reset.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/drivers/gpio/
-    ${SDK_DIR}/drivers/lpuart
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/port
+    ${MCUX_DIR}/drivers/gpio/
+    ${MCUX_DIR}/drivers/lpuart
+    ${MCUX_DIR}/drivers/common
+    ${MCUX_DIR}/drivers/port
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/drivers/spc
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}
+    ${SDK_DIR}/${MCU_FAMILY}/${MCU_VARIANT}/drivers
     )
 
   if (${FAMILY_MCUS} STREQUAL "MCXN9")
     target_sources(${BOARD_TARGET} PRIVATE
-      ${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
+      ${MCUX_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
       )
     target_include_directories(${BOARD_TARGET} PUBLIC
-      ${SDK_DIR}/drivers/lpflexcomm
+      ${MCUX_DIR}/drivers/lpflexcomm
       )
   elseif(${FAMILY_MCUS} STREQUAL "MCXA15")
   endif()
@@ -100,7 +110,8 @@ function(family_configure_example TARGET RTOS)
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
-      #-nostartfiles
+      "LINKER:--defsym=__stack_size__=0x1000"
+      "LINKER:--defsym=__heap_size__=0"
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_link_options(${TARGET} PUBLIC
@@ -109,6 +120,8 @@ function(family_configure_example TARGET RTOS)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
+      "LINKER:--config_def=__stack_size__=0x1000"
+      "LINKER:--config_def=__heap_size__=0"
       )
   endif ()
 
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
index 4321e654a..3d63eb238 100644
--- a/hw/bsp/mcx/family.mk
+++ b/hw/bsp/mcx/family.mk
@@ -1,7 +1,9 @@
 UF2_FAMILY_ID = 0x2abc77ec
-SDK_DIR = hw/mcu/nxp/mcux-sdk
 
 include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m33
+MCUX_DIR = hw/mcu/nxp/mcuxsdk-core
+SDK_DIR = hw/mcu/nxp/mcux-devices-mcx
 
 # Default to Highspeed PORT1
 PORT ?= 1
@@ -13,10 +15,13 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS_GCC += \
+  --specs=nosys.specs --specs=nano.specs \
+  -Wl,--defsym=__stack_size__=0x1000 \
+  -Wl,--defsym=__heap_size__=0 \
 
 # All source paths should be relative to the top level.
-LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
+LD_FILE ?= $(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
 
 # TinyUSB: Port0 is chipidea FS, Port1 is chipidea HS
 ifeq ($(PORT), 1)
@@ -30,17 +35,17 @@ else
 endif
 
 SRC_C += \
-	$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
-	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
-	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
-	${SDK_DIR}/drivers/gpio/fsl_gpio.c \
-	${SDK_DIR}/drivers/lpuart/fsl_lpuart.c \
-	${SDK_DIR}/drivers/common/fsl_common_arm.c\
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/system_$(MCU_CORE).c \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(TOP)/$(MCUX_DIR)/drivers/gpio/fsl_gpio.c \
+	$(TOP)/$(MCUX_DIR)/drivers/lpuart/fsl_lpuart.c \
+	$(TOP)/$(MCUX_DIR)/drivers/common/fsl_common_arm.c \
 	hw/bsp/mcx/drivers/spc/fsl_spc.c
 
 # fsl_lpflexcomm for MCXN9
 ifeq ($(MCU_VARIANT), MCXN947)
-	SRC_C += ${SDK_DIR}/drivers/lpflexcomm/fsl_lpflexcomm.c
+	SRC_C += $(MCUX_DIR)/drivers/lpflexcomm/fsl_lpflexcomm.c
 endif
 
 # fsl_spc for MCXNA15
@@ -50,15 +55,15 @@ endif
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
-	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/ \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(SDK_DIR)/drivers/lpflexcomm \
-	$(TOP)/$(SDK_DIR)/drivers/common\
-	$(TOP)/$(SDK_DIR)/drivers/gpio\
-	$(TOP)/$(SDK_DIR)/drivers/port\
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT) \
+	$(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(MCUX_DIR)/drivers/ \
+	$(TOP)/$(MCUX_DIR)/drivers/lpuart \
+	$(TOP)/$(MCUX_DIR)/drivers/lpflexcomm \
+	$(TOP)/$(MCUX_DIR)/drivers/common \
+	$(TOP)/$(MCUX_DIR)/drivers/gpio \
+	$(TOP)/$(MCUX_DIR)/drivers/port \
 	$(TOP)/hw/bsp/mcx/drivers/spc
 
-SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
+SRC_S += $(TOP)/$(SDK_DIR)/$(MCU_FAMILY)/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 213567949..c8cb4a81b 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -60,13 +60,16 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcuxsdk-core': ['https://github.com/nxp-mcuxpresso/mcuxsdk-core',
                             '0c5c6b16deb211110e06bde896cdff59ab213e16',
-                            'lpc51 lpc55'],
+                            'lpc51 lpc55 mcx'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl mcx imxrt'],
+                            'kinetis_k kinetis_k32l2 kinetis_kl imxrt'],
     'hw/mcu/nxp/mcux-devices-lpc': ['https://github.com/nxp-mcuxpresso/mcux-devices-lpc',
                             '8096b783ec09d0d1c8629025a5f9d8e7df26e520',
                             'lpc51 lpc55'],
+    'hw/mcu/nxp/mcux-devices-mcx': ['https://github.com/nxp-mcuxpresso/mcux-devices-mcx',
+                            'ada1c97c761123ec0c179bb9bb9f744bf9a11475',
+                            'mcx'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                          'rp2040'],
@@ -252,7 +255,7 @@ deps_optional = {
                                'at32f413'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
-                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
+                    'imxrt kinetis_k32l2 kinetis_kl lpc54 mm32 msp432e4 nrf saml2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
                     'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba '
@@ -260,7 +263,7 @@ deps_optional = {
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-                    'ra stm32n6 lpc51 lpc55'],
+                    'ra stm32n6 lpc51 lpc55 mcx'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From ba9bc1a79d2c00290e64a93907f37cd3db7140f8 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 12 Dec 2025 12:30:36 +0100
Subject: update LPC54

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 README.rst                                   |   4 +-
 examples/host/bare_api/only.txt              |   1 +
 examples/host/cdc_msc_hid/only.txt           |   1 +
 examples/host/cdc_msc_hid_freertos/only.txt  |   1 +
 examples/host/device_info/only.txt           |   1 +
 examples/host/hid_controller/only.txt        |   1 +
 examples/host/midi_rx/only.txt               |   1 +
 examples/host/msc_file_explorer/only.txt     |   1 +
 hw/bsp/lpc54/boards/lpcxpresso54114/board.h  |  12 +
 hw/bsp/lpc54/boards/lpcxpresso54608/board.h  |  21 +
 hw/bsp/lpc54/boards/lpcxpresso54628/board.h  |  12 +
 hw/bsp/lpc54/family.c                        |  78 ++--
 hw/bsp/lpc54/family.cmake                    |  72 ++-
 hw/bsp/lpc54/iar/LPC54608_flash.icf          |  85 ++++
 hw/bsp/lpc54/iar/LPC54628_flash.icf          |  83 ++++
 hw/bsp/lpc54/iar/startup_LPC54608.s          | 654 +++++++++++++++++++++++++++
 hw/bsp/lpc54/iar/startup_LPC54628.s          | 654 +++++++++++++++++++++++++++
 src/common/tusb_mcu.h                        |   4 +
 src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c |  26 +-
 19 files changed, 1665 insertions(+), 47 deletions(-)
 create mode 100644 hw/bsp/lpc54/iar/LPC54608_flash.icf
 create mode 100644 hw/bsp/lpc54/iar/LPC54628_flash.icf
 create mode 100644 hw/bsp/lpc54/iar/startup_LPC54608.s
 create mode 100644 hw/bsp/lpc54/iar/startup_LPC54628.s

(limited to 'hw')

diff --git a/README.rst b/README.rst
index 6a6f07825..64583f2cc 100644
--- a/README.rst
+++ b/README.rst
@@ -203,7 +203,9 @@ Supported CPUs
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
 |              |         | 51u               | ✔      | ✖    | ✖         | lpc_ip3511             |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
-|              |         | 54, 55            | ✔      |      | ✔         | lpc_ip3511             |                   |
+|              |         | 54                | ⚠      | ⚠    | ✔         | lpc_ip3511, lpc_ip3516 | NRND, read errata |
+|              |         +-------------------+--------+------+-----------+------------------------+-------------------+
+|              |         | 55                | ✔      | ✔    | ✔         | lpc_ip3511, lpc_ip3516 |                   |
 |              +---------+-------------------+--------+------+-----------+------------------------+-------------------+
 |              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs, ehci     |                   |
 |              |         +-------------------+--------+------+-----------+------------------------+-------------------+
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index b39a23e40..31b35f7b9 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index b39a23e40..31b35f7b9 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index b755df825..54a9fee51 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -3,6 +3,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 2a3c5c583..36be2124d 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MAX3421
 mcu:MIMXRT1XXX
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index b39a23e40..31b35f7b9 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index b0afa4fc3..9c4771de0 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -8,6 +8,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MAX3421
 mcu:MIMXRT1XXX
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index b39a23e40..31b35f7b9 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -5,6 +5,7 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
+mcu:LPC54
 mcu:LPC55
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54114/board.h b/hw/bsp/lpc54/boards/lpcxpresso54114/board.h
index c43ca9d7d..1158d0675 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54114/board.h
+++ b/hw/bsp/lpc54/boards/lpcxpresso54114/board.h
@@ -36,6 +36,18 @@
  extern "C" {
 #endif
 
+// IOCON pin mux
+#define IOCON_PIO_DIGITAL_EN     0x80u   // Enables digital function
+#define IOCON_PIO_FUNC0          0x00u
+#define IOCON_PIO_FUNC1          0x01u   // Selects pin function 1
+#define IOCON_PIO_FUNC7          0x07u   // Selects pin function 7
+#define IOCON_PIO_INPFILT_OFF    0x0100u // Input filter disabled
+#define IOCON_PIO_INV_DI         0x00u   // Input function is not inverted
+#define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
+#define IOCON_PIO_MODE_PULLUP    0x10u
+#define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
+#define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
+
 // LED
 #define LED_PORT              0
 #define LED_PIN               29
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.h b/hw/bsp/lpc54/boards/lpcxpresso54608/board.h
index e985e97e0..7a5cbea87 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54608/board.h
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.h
@@ -36,6 +36,18 @@
  extern "C" {
 #endif
 
+// IOCON pin mux
+#define IOCON_PIO_DIGITAL_EN     0x0100u   // Enables digital function
+#define IOCON_PIO_FUNC0          0x00u
+#define IOCON_PIO_FUNC1          0x01u   // Selects pin function 1
+#define IOCON_PIO_FUNC7          0x07u   // Selects pin function 7
+#define IOCON_PIO_INPFILT_OFF    0x0200u // Input filter disabled
+#define IOCON_PIO_INV_DI         0x00u   // Input function is not inverted
+#define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
+#define IOCON_PIO_MODE_PULLUP    0x10u
+#define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
+#define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
+
 // LED
 #define LED_PORT              2
 #define LED_PIN               2
@@ -54,6 +66,15 @@
 // USB0 VBUS
 #define USB0_VBUS_PINMUX      0, 22, IOCON_PIO_DIG_FUNC7_EN
 
+// Power switch
+#define USBFS_POWER_PORT      4
+#define USBFS_POWER_PIN       7
+#define USBFS_POWER_STATE_ON  0
+
+#define USBHS_POWER_PORT      4
+#define USBHS_POWER_PIN       9
+#define USBHS_POWER_STATE_ON  0
+
 // XTAL
 //#define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
 
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.h b/hw/bsp/lpc54/boards/lpcxpresso54628/board.h
index 837d26aef..5c858ed99 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.h
+++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.h
@@ -36,6 +36,18 @@
  extern "C" {
 #endif
 
+// IOCON pin mux
+#define IOCON_PIO_DIGITAL_EN     0x0100u   // Enables digital function
+#define IOCON_PIO_FUNC0          0x00u
+#define IOCON_PIO_FUNC1          0x01u   // Selects pin function 1
+#define IOCON_PIO_FUNC7          0x07u   // Selects pin function 7
+#define IOCON_PIO_INPFILT_OFF    0x0200u // Input filter disabled
+#define IOCON_PIO_INV_DI         0x00u   // Input function is not inverted
+#define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
+#define IOCON_PIO_MODE_PULLUP    0x10u
+#define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
+#define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
+
 // LED
 #define LED_PORT              2
 #define LED_PIN               2
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 7bb73afbc..3d5bb8d5a 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -41,18 +41,6 @@
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-// IOCON pin mux
-#define IOCON_PIO_DIGITAL_EN     0x80u   // Enables digital function
-#define IOCON_PIO_FUNC0          0x00u
-#define IOCON_PIO_FUNC1          0x01u   // Selects pin function 1
-#define IOCON_PIO_FUNC7          0x07u   // Selects pin function 7
-#define IOCON_PIO_INPFILT_OFF    0x0100u // Input filter disabled
-#define IOCON_PIO_INV_DI         0x00u   // Input function is not inverted
-#define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
-#define IOCON_PIO_MODE_PULLUP    0x10u
-#define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
-#define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
-
 // Digital pin function n enabled
 #define IOCON_PIO_DIG_FUNC0_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_INPFILT_OFF | IOCON_PIO_FUNC0)
 #define IOCON_PIO_DIG_FUNC1_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_INPFILT_OFF | IOCON_PIO_FUNC1)
@@ -149,37 +137,71 @@ void board_init(void) {
   USART_Init(UART_DEV, &uart_config, 12000000);
 #endif
 
-  // USB
-  IOCON_PinMuxSet(IOCON, USB0_VBUS_PINMUX);
-
 #if defined(FSL_FEATURE_SOC_USBHSD_COUNT) && FSL_FEATURE_SOC_USBHSD_COUNT
   // LPC546xx and LPC540xx has OTG 1 FS + 1 HS rhports
-  #if defined(BOARD_TUD_RHPORT) && BOARD_TUD_RHPORT == 0
+  #if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0)
+    /* PORT0 PIN22 configured as USB0_VBUS */
+    IOCON_PinMuxSet(IOCON, USB0_VBUS_PINMUX);
+
     // Port0 is Full Speed
     POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); /*< Turn on USB Phy */
     CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 1, false);
     CLOCK_AttachClk(kFRO_HF_to_USB0_CLK);
 
-    /*According to reference manual, device mode setting has to be set by access usb host register */
-    CLOCK_EnableClock(kCLOCK_Usbhsl0); /* enable usb0 host clock */
-    USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
-    CLOCK_DisableClock(kCLOCK_Usbhsl0); /* disable usb0 host clock */
-
-    CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq());
+    if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) {
+      /*According to reference manual, device mode setting has to be set by access usb host register */
+      CLOCK_EnableClock(kCLOCK_Usbhsl0); /* enable usb0 host clock */
+      USBFSH->PORTMODE |= USBFSH_PORTMODE_DEV_ENABLE_MASK;
+      CLOCK_DisableClock(kCLOCK_Usbhsl0); /* disable usb0 host clock */
+
+      CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq());
+    } else {
+    #ifdef USBFS_POWER_PORT
+      /* Configure USB0 Power Switch Pin */
+      IOCON_PinMuxSet(IOCON, USBFS_POWER_PORT, USBFS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
+
+      gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBFS_POWER_STATE_ON};
+      GPIO_PinInit(GPIO, USBFS_POWER_PORT, USBFS_POWER_PIN, &power_pin_config);
+    #endif
+      CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbSrcFro, CLOCK_GetFroHfFreq());
+      USBFSH->PORTMODE &= ~USBFSH_PORTMODE_DEV_ENABLE_MASK;
+    }
   #endif
 
-  #if defined(BOARD_TUD_RHPORT) && BOARD_TUD_RHPORT == 1
-    // Port1 is High Speed
-    POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY);
+ #if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 1)
+  // Port1 is High Speed
+
+  /* Turn on USB1 Phy */
+  POWER_DisablePD(kPDRUNCFG_PD_USB1_PHY);
 
-    /*According to reference manual, device mode setting has to be set by access usb host register */
-    CLOCK_EnableClock(kCLOCK_Usbh1); /* enable usb1 host clock */
+  /* reset the IP to make sure it's in reset state. */
+  RESET_PeripheralReset(kUSB1H_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB1D_RST_SHIFT_RSTn);
+  RESET_PeripheralReset(kUSB1RAM_RST_SHIFT_RSTn);
+
+  if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) {
+    /* According to reference manual, device mode setting has to be set by access usb host register */
+    CLOCK_EnableClock(kCLOCK_Usbh1); // enable usb0 host clock
+
+    USBHSH->PORTMODE = USBHSH_PORTMODE_SW_PDCOM_MASK; // Put PHY powerdown under software control
     USBHSH->PORTMODE |= USBHSH_PORTMODE_DEV_ENABLE_MASK;
-    CLOCK_DisableClock(kCLOCK_Usbh1); /* enable usb1 host clock */
 
+    CLOCK_DisableClock(kCLOCK_Usbh1); // disable usb0 host clock
+    /* enable USB Device clock */
     CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUsbPll, 0U);
+  } else {
+  #ifdef USBHS_POWER_PORT
+    /* Configure USB1 Power Switch Pin */
+    IOCON_PinMuxSet(IOCON, USBHS_POWER_PORT, USBHS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
+
+    gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBHS_POWER_STATE_ON};
+    GPIO_PinInit(GPIO, USBHS_POWER_PORT, USBHS_POWER_PIN, &power_pin_config);
+  #endif
+    CLOCK_EnableUsbhs0HostClock(kCLOCK_UsbSrcUsbPll, 0U);
+  }
   #endif
 #else
+  IOCON_PinMuxSet(IOCON, USB0_VBUS_PINMUX);
   // LPC5411x series only has full speed device
   POWER_DisablePD(kPDRUNCFG_PD_USB0_PHY); // Turn on USB Phy
   CLOCK_EnableUsbfs0Clock(kCLOCK_UsbSrcFro, CLOCK_GetFreq(kCLOCK_FroHf)); /* enable USB IP clock */
diff --git a/hw/bsp/lpc54/family.cmake b/hw/bsp/lpc54/family.cmake
index c6145bd41..ebc0689fd 100644
--- a/hw/bsp/lpc54/family.cmake
+++ b/hw/bsp/lpc54/family.cmake
@@ -12,13 +12,29 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 
 set(FAMILY_MCUS LPC54 CACHE INTERNAL "")
 
-if (NOT DEFINED PORT)
-  set(PORT 0)
-endif()
+# ----------------------
+# Port & Speed Selection
+# ----------------------
 
-# Host port will be the other port if available
-set(HOST_PORT $<NOT:${PORT}>)
+# default device port to USB1 highspeed, host to USB0 fullspeed
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 1)
+endif ()
+
+# port 0 is fullspeed, port 1 is highspeed
+set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+
+if (NOT DEFINED RHPORT_DEVICE_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+endif ()
+if (NOT DEFINED RHPORT_HOST_SPEED)
+  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+endif ()
 
+cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_SPEED)
 #------------------------------------
 # Startup & Linker script
 #------------------------------------
@@ -26,11 +42,20 @@ if (NOT DEFINED LD_FILE_GNU)
 set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
+
 if (NOT DEFINED STARTUP_FILE_GNU)
 set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
 endif ()
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
+if (NOT DEFINED LD_FILE_IAR)
+  set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/iar/${MCU_CORE}_flash.icf)
+endif ()
+
+if (NOT DEFINED STARTUP_FILE_IAR)
+  set(STARTUP_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/iar/startup_${MCU_CORE}.s)
+endif ()
+
 #------------------------------------
 # Board Target
 #------------------------------------
@@ -64,24 +89,23 @@ function(family_add_board BOARD_TARGET)
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
-    BOARD_TUD_RHPORT=${PORT}
-    BOARD_TUH_RHPORT=${HOST_PORT}
+    BOARD_TUD_RHPORT=${RHPORT_DEVICE}
+    BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
+    BOARD_TUH_RHPORT=${RHPORT_HOST}
+    BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
     __STARTUP_CLEAR_BSS
     )
 
-  # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
-  if (PORT EQUAL 1)
+ # Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
+  if (RHPORT_DEVICE EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-      BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
-      CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+      [=[CFG_TUD_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
       )
-  else ()
+  endif ()
+  if (RHPORT_HOST EQUAL 1)
     target_compile_definitions(${BOARD_TARGET} PUBLIC
-      BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
-      BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
-      CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
-      #CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
+      [=[CFG_TUH_MEM_SECTION=__attribute__((section("m_usb_global")))]=]
+      CFG_TUH_USBIP_IP3516=1
       )
   endif ()
 
@@ -107,11 +131,23 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
 
+  if (RHPORT_HOST EQUAL 0)
+    target_sources(${TARGET} PUBLIC
+      ${TOP}/src/portable/ohci/ohci.c
+      )
+  elseif (RHPORT_HOST EQUAL 1)
+    target_sources(${TARGET} PUBLIC
+      ${TOP}/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
+      )
+  endif ()
+
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
       -nostartfiles
+      "LINKER:--defsym=__stack_size__=0x1000"
+      "LINKER:--defsym=__heap_size__=0"
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_link_options(${TARGET} PUBLIC
@@ -120,6 +156,8 @@ function(family_configure_example TARGET RTOS)
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
+      "LINKER:--config_def=__stack_size__=0x1000"
+      "LINKER:--config_def=__heap_size__=0"
       )
   endif ()
 
diff --git a/hw/bsp/lpc54/iar/LPC54608_flash.icf b/hw/bsp/lpc54/iar/LPC54608_flash.icf
new file mode 100644
index 000000000..2a7885541
--- /dev/null
+++ b/hw/bsp/lpc54/iar/LPC54608_flash.icf
@@ -0,0 +1,85 @@
+/*
+** ###################################################################
+**     Processors:          LPC54608J512BD208
+**                          LPC54608J512ET180
+**
+**     Compiler:            IAR ANSI C/C++ Compiler for ARM
+**     Reference manual:    LPC546xx User manual Rev.1.9  5 June 2017
+**     Version:             rev. 1.2, 2017-06-08
+**     Build:               b241125
+**
+**     Abstract:
+**         Linker file for the IAR ANSI C/C++ Compiler for ARM
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2024 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+define symbol m_interrupts_start       = 0x00000000;
+define symbol m_interrupts_end         = 0x000003FF;
+
+define symbol m_text_start             = 0x00000400;
+define symbol m_text_end               = 0x0007FFFF;
+
+define symbol m_data_start             = 0x20000000;
+define symbol m_data_end               = 0x20027FFF;
+
+define symbol m_usb_sram_start         = 0x40100000;
+define symbol m_usb_sram_end           = 0x40101FFF;
+
+/* USB BDT size */
+define symbol usb_bdt_size             = 0x0;
+/* Sizes */
+if (isdefinedsymbol(__stack_size__)) {
+  define symbol __size_cstack__        = __stack_size__;
+} else {
+  define symbol __size_cstack__        = 0x0400;
+}
+
+if (isdefinedsymbol(__heap_size__)) {
+  define symbol __size_heap__          = __heap_size__;
+} else {
+  define symbol __size_heap__          = 0x0400;
+}
+
+
+define memory mem with size = 4G;
+define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
+                          | mem:[from m_text_start to m_text_end];
+define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
+define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
+
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block RW        { readwrite };
+define block ZI        { zi };
+
+/* regions for USB */
+define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
+define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
+place in USB_BDT_region                     { section m_usb_bdt };
+place in USB_SRAM_region                    { section m_usb_global };
+
+initialize by copy { readwrite, section .textrw };
+
+if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
+{
+  /* Required in a multi-threaded application */
+  initialize by copy with packing = none { section __DLIB_PERTHREAD };
+}
+
+do not initialize  { section .noinit, section m_usb_bdt, section m_usb_global };
+
+place at address mem: m_interrupts_start    { readonly section .intvec };
+place in TEXT_region                        { readonly };
+place in DATA_region                        { block RW };
+place in DATA_region                        { block ZI };
+place in DATA_region                        { last block HEAP };
+place in CSTACK_region                      { block CSTACK };
+
diff --git a/hw/bsp/lpc54/iar/LPC54628_flash.icf b/hw/bsp/lpc54/iar/LPC54628_flash.icf
new file mode 100644
index 000000000..7cca18159
--- /dev/null
+++ b/hw/bsp/lpc54/iar/LPC54628_flash.icf
@@ -0,0 +1,83 @@
+/*
+** ###################################################################
+**     Processor:           LPC54628J512ET180
+**     Compiler:            IAR ANSI C/C++ Compiler for ARM
+**     Reference manual:    LPC546xx User manual Rev.1.9  5 June 2017
+**     Version:             rev. 1.2, 2017-06-08
+**     Build:               b241125
+**
+**     Abstract:
+**         Linker file for the IAR ANSI C/C++ Compiler for ARM
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2024 NXP
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+define symbol m_interrupts_start       = 0x00000000;
+define symbol m_interrupts_end         = 0x000003FF;
+
+define symbol m_text_start             = 0x00000400;
+define symbol m_text_end               = 0x0007FFFF;
+
+define symbol m_data_start             = 0x20000000;
+define symbol m_data_end               = 0x20027FFF;
+
+define symbol m_usb_sram_start         = 0x40100000;
+define symbol m_usb_sram_end           = 0x40101FFF;
+
+/* USB BDT size */
+define symbol usb_bdt_size             = 0x0;
+/* Sizes */
+if (isdefinedsymbol(__stack_size__)) {
+  define symbol __size_cstack__        = __stack_size__;
+} else {
+  define symbol __size_cstack__        = 0x0400;
+}
+
+if (isdefinedsymbol(__heap_size__)) {
+  define symbol __size_heap__          = __heap_size__;
+} else {
+  define symbol __size_heap__          = 0x0400;
+}
+
+
+define memory mem with size = 4G;
+define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
+                          | mem:[from m_text_start to m_text_end];
+define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
+define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
+
+define block CSTACK    with alignment = 8, size = __size_cstack__   { };
+define block HEAP      with alignment = 8, size = __size_heap__     { };
+define block RW        { readwrite };
+define block ZI        { zi };
+
+/* regions for USB */
+define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
+define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
+place in USB_BDT_region                     { section m_usb_bdt };
+place in USB_SRAM_region                    { section m_usb_global };
+
+initialize by copy { readwrite, section .textrw };
+
+if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
+{
+  /* Required in a multi-threaded application */
+  initialize by copy with packing = none { section __DLIB_PERTHREAD };
+}
+
+do not initialize  { section .noinit, section m_usb_bdt, section m_usb_global };
+
+place at address mem: m_interrupts_start    { readonly section .intvec };
+place in TEXT_region                        { readonly };
+place in DATA_region                        { block RW };
+place in DATA_region                        { block ZI };
+place in DATA_region                        { last block HEAP };
+place in CSTACK_region                      { block CSTACK };
+
diff --git a/hw/bsp/lpc54/iar/startup_LPC54608.s b/hw/bsp/lpc54/iar/startup_LPC54608.s
new file mode 100644
index 000000000..05c4350e5
--- /dev/null
+++ b/hw/bsp/lpc54/iar/startup_LPC54608.s
@@ -0,0 +1,654 @@
+; -------------------------------------------------------------------------
+;  @file:    startup_LPC54608.s
+;  @purpose: CMSIS Cortex-M4 Core Device Startup File
+;            LPC54608
+;  @version: 2.0
+;  @date:    2024-10-29
+;  @build:   b250521
+; -------------------------------------------------------------------------
+;
+; Copyright 1997-2016 Freescale Semiconductor, Inc.
+; Copyright 2016-2025 NXP
+; SPDX-License-Identifier: BSD-3-Clause
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+        PUBLIC  __vector_table_0x1c
+        PUBLIC  __Vectors
+        PUBLIC  __Vectors_End
+        PUBLIC  __Vectors_Size
+
+        DATA
+
+__iar_init$$done:              ; The vector table is not needed
+                      ; until after copy initialization is done
+
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler
+
+        DCD     NMI_Handler                                   ;NMI Handler
+        DCD     HardFault_Handler                             ;Hard Fault Handler
+        DCD     MemManage_Handler                             ;MPU Fault Handler
+        DCD     BusFault_Handler                              ;Bus Fault Handler
+        DCD     UsageFault_Handler                            ;Usage Fault Handler
+__vector_table_0x1c
+        DCD     0                                             ;Reserved
+        DCD     0xFFFFFFFF                                    ;ECRP
+        DCD     0                                             ;Reserved
+        DCD     0                                             ;Reserved
+        DCD     SVC_Handler                                   ;SVCall Handler
+        DCD     DebugMon_Handler                              ;Debug Monitor Handler
+        DCD     0                                             ;Reserved
+        DCD     PendSV_Handler                                ;PendSV Handler
+        DCD     SysTick_Handler                               ;SysTick Handler
+
+                                                              ;External Interrupts
+        DCD     WDT_BOD_IRQHandler                            ;Windowed watchdog timer, Brownout detect
+        DCD     DMA0_IRQHandler                               ;DMA controller
+        DCD     GINT0_IRQHandler                              ;GPIO group 0
+        DCD     GINT1_IRQHandler                              ;GPIO group 1
+        DCD     PIN_INT0_IRQHandler                           ;Pin interrupt 0 or pattern match engine slice 0
+        DCD     PIN_INT1_IRQHandler                           ;Pin interrupt 1or pattern match engine slice 1
+        DCD     PIN_INT2_IRQHandler                           ;Pin interrupt 2 or pattern match engine slice 2
+        DCD     PIN_INT3_IRQHandler                           ;Pin interrupt 3 or pattern match engine slice 3
+        DCD     UTICK0_IRQHandler                             ;Micro-tick Timer
+        DCD     MRT0_IRQHandler                               ;Multi-rate timer
+        DCD     CTIMER0_IRQHandler                            ;Standard counter/timer CTIMER0
+        DCD     CTIMER1_IRQHandler                            ;Standard counter/timer CTIMER1
+        DCD     SCT0_IRQHandler                               ;SCTimer/PWM
+        DCD     CTIMER3_IRQHandler                            ;Standard counter/timer CTIMER3
+        DCD     FLEXCOMM0_IRQHandler                          ;Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM1_IRQHandler                          ;Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM2_IRQHandler                          ;Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM3_IRQHandler                          ;Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM4_IRQHandler                          ;Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM5_IRQHandler                          ;Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
+        DCD     FLEXCOMM6_IRQHandler                          ;Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
+        DCD     FLEXCOMM7_IRQHandler                          ;Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
+        DCD     ADC0_SEQA_IRQHandler                          ;ADC0 sequence A completion.
+        DCD     ADC0_SEQB_IRQHandler                          ;ADC0 sequence B completion.
+        DCD     ADC0_THCMP_IRQHandler                         ;ADC0 threshold compare and error.
+        DCD     DMIC0_IRQHandler                              ;Digital microphone and DMIC subsystem
+        DCD     HWVAD0_IRQHandler                             ;Hardware Voice Activity Detector
+        DCD     USB0_NEEDCLK_IRQHandler                       ;USB Activity Wake-up Interrupt
+        DCD     USB0_IRQHandler                               ;USB device
+        DCD     RTC_IRQHandler                                ;RTC alarm and wake-up interrupts
+        DCD     Reserved46_IRQHandler                         ;Reserved interrupt
+        DCD     Reserved47_IRQHandler                         ;Reserved interrupt
+        DCD     PIN_INT4_IRQHandler                           ;Pin interrupt 4 or pattern match engine slice 4 int
+        DCD     PIN_INT5_IRQHandler                           ;Pin interrupt 5 or pattern match engine slice 5 int
+        DCD     PIN_INT6_IRQHandler                           ;Pin interrupt 6 or pattern match engine slice 6 int
+        DCD     PIN_INT7_IRQHandler                           ;Pin interrupt 7 or pattern match engine slice 7 int
+        DCD     CTIMER2_IRQHandler                            ;Standard counter/timer CTIMER2
+        DCD     CTIMER4_IRQHandler                            ;Standard counter/timer CTIMER4
+        DCD     RIT_IRQHandler                                ;Repetitive Interrupt Timer
+        DCD     SPIFI0_IRQHandler                             ;SPI flash interface
+        DCD     FLEXCOMM8_IRQHandler                          ;Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM9_IRQHandler                          ;Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
+        DCD     SDIO_IRQHandler                               ;SD/MMC
+        DCD     CAN0_IRQ0_IRQHandler                          ;CAN0 interrupt0
+        DCD     CAN0_IRQ1_IRQHandler                          ;CAN0 interrupt1
+        DCD     CAN1_IRQ0_IRQHandler                          ;CAN1 interrupt0
+        DCD     CAN1_IRQ1_IRQHandler                          ;CAN1 interrupt1
+        DCD     USB1_IRQHandler                               ;USB1 interrupt
+        DCD     USB1_NEEDCLK_IRQHandler                       ;USB1 activity
+        DCD     ETHERNET_IRQHandler                           ;Ethernet
+        DCD     ETHERNET_PMT_IRQHandler                       ;Ethernet power management interrupt
+        DCD     ETHERNET_MACLP_IRQHandler                     ;Ethernet MAC interrupt
+        DCD     EEPROM_IRQHandler                             ;EEPROM interrupt
+        DCD     LCD_IRQHandler                                ;LCD interrupt
+        DCD     SHA_IRQHandler                                ;SHA interrupt
+        DCD     SMARTCARD0_IRQHandler                         ;Smart card 0 interrupt
+        DCD     SMARTCARD1_IRQHandler                         ;Smart card 1 interrupt
+__Vectors_End
+
+__Vectors       EQU   __vector_table
+__Vectors_Size  EQU   __Vectors_End - __Vectors
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+        MOVS    r0,#56
+        LDR     r1, =0x40000220
+        STR     r0, [r1]           ;Enable SRAM clock used by Stack
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+        B .
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+        B .
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+MemManage_Handler
+        B .
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+        B .
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+        B .
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+        B .
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+        B .
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+        B .
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+        B .
+
+        PUBWEAK WDT_BOD_IRQHandler
+        PUBWEAK WDT_BOD_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+WDT_BOD_IRQHandler
+        LDR     R0, =WDT_BOD_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK DMA0_IRQHandler
+        PUBWEAK DMA0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+DMA0_IRQHandler
+        LDR     R0, =DMA0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK GINT0_IRQHandler
+        PUBWEAK GINT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+GINT0_IRQHandler
+        LDR     R0, =GINT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK GINT1_IRQHandler
+        PUBWEAK GINT1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+GINT1_IRQHandler
+        LDR     R0, =GINT1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT0_IRQHandler
+        PUBWEAK PIN_INT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT0_IRQHandler
+        LDR     R0, =PIN_INT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT1_IRQHandler
+        PUBWEAK PIN_INT1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT1_IRQHandler
+        LDR     R0, =PIN_INT1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT2_IRQHandler
+        PUBWEAK PIN_INT2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT2_IRQHandler
+        LDR     R0, =PIN_INT2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT3_IRQHandler
+        PUBWEAK PIN_INT3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT3_IRQHandler
+        LDR     R0, =PIN_INT3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK UTICK0_IRQHandler
+        PUBWEAK UTICK0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+UTICK0_IRQHandler
+        LDR     R0, =UTICK0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK MRT0_IRQHandler
+        PUBWEAK MRT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+MRT0_IRQHandler
+        LDR     R0, =MRT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER0_IRQHandler
+        PUBWEAK CTIMER0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER0_IRQHandler
+        LDR     R0, =CTIMER0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER1_IRQHandler
+        PUBWEAK CTIMER1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER1_IRQHandler
+        LDR     R0, =CTIMER1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SCT0_IRQHandler
+        PUBWEAK SCT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SCT0_IRQHandler
+        LDR     R0, =SCT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER3_IRQHandler
+        PUBWEAK CTIMER3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER3_IRQHandler
+        LDR     R0, =CTIMER3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM0_IRQHandler
+        PUBWEAK FLEXCOMM0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM0_IRQHandler
+        LDR     R0, =FLEXCOMM0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM1_IRQHandler
+        PUBWEAK FLEXCOMM1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM1_IRQHandler
+        LDR     R0, =FLEXCOMM1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM2_IRQHandler
+        PUBWEAK FLEXCOMM2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM2_IRQHandler
+        LDR     R0, =FLEXCOMM2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM3_IRQHandler
+        PUBWEAK FLEXCOMM3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM3_IRQHandler
+        LDR     R0, =FLEXCOMM3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM4_IRQHandler
+        PUBWEAK FLEXCOMM4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM4_IRQHandler
+        LDR     R0, =FLEXCOMM4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM5_IRQHandler
+        PUBWEAK FLEXCOMM5_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM5_IRQHandler
+        LDR     R0, =FLEXCOMM5_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM6_IRQHandler
+        PUBWEAK FLEXCOMM6_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM6_IRQHandler
+        LDR     R0, =FLEXCOMM6_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM7_IRQHandler
+        PUBWEAK FLEXCOMM7_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM7_IRQHandler
+        LDR     R0, =FLEXCOMM7_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_SEQA_IRQHandler
+        PUBWEAK ADC0_SEQA_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_SEQA_IRQHandler
+        LDR     R0, =ADC0_SEQA_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_SEQB_IRQHandler
+        PUBWEAK ADC0_SEQB_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_SEQB_IRQHandler
+        LDR     R0, =ADC0_SEQB_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_THCMP_IRQHandler
+        PUBWEAK ADC0_THCMP_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_THCMP_IRQHandler
+        LDR     R0, =ADC0_THCMP_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK DMIC0_IRQHandler
+        PUBWEAK DMIC0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+DMIC0_IRQHandler
+        LDR     R0, =DMIC0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK HWVAD0_IRQHandler
+        PUBWEAK HWVAD0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+HWVAD0_IRQHandler
+        LDR     R0, =HWVAD0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB0_NEEDCLK_IRQHandler
+        PUBWEAK USB0_NEEDCLK_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB0_NEEDCLK_IRQHandler
+        LDR     R0, =USB0_NEEDCLK_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB0_IRQHandler
+        PUBWEAK USB0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB0_IRQHandler
+        LDR     R0, =USB0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK RTC_IRQHandler
+        PUBWEAK RTC_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+RTC_IRQHandler
+        LDR     R0, =RTC_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK Reserved46_IRQHandler
+        PUBWEAK Reserved46_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reserved46_IRQHandler
+        LDR     R0, =Reserved46_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK Reserved47_IRQHandler
+        PUBWEAK Reserved47_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reserved47_IRQHandler
+        LDR     R0, =Reserved47_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT4_IRQHandler
+        PUBWEAK PIN_INT4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT4_IRQHandler
+        LDR     R0, =PIN_INT4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT5_IRQHandler
+        PUBWEAK PIN_INT5_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT5_IRQHandler
+        LDR     R0, =PIN_INT5_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT6_IRQHandler
+        PUBWEAK PIN_INT6_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT6_IRQHandler
+        LDR     R0, =PIN_INT6_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT7_IRQHandler
+        PUBWEAK PIN_INT7_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT7_IRQHandler
+        LDR     R0, =PIN_INT7_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER2_IRQHandler
+        PUBWEAK CTIMER2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER2_IRQHandler
+        LDR     R0, =CTIMER2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER4_IRQHandler
+        PUBWEAK CTIMER4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER4_IRQHandler
+        LDR     R0, =CTIMER4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK RIT_IRQHandler
+        PUBWEAK RIT_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+RIT_IRQHandler
+        LDR     R0, =RIT_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SPIFI0_IRQHandler
+        PUBWEAK SPIFI0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SPIFI0_IRQHandler
+        LDR     R0, =SPIFI0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM8_IRQHandler
+        PUBWEAK FLEXCOMM8_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM8_IRQHandler
+        LDR     R0, =FLEXCOMM8_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM9_IRQHandler
+        PUBWEAK FLEXCOMM9_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM9_IRQHandler
+        LDR     R0, =FLEXCOMM9_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SDIO_IRQHandler
+        PUBWEAK SDIO_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SDIO_IRQHandler
+        LDR     R0, =SDIO_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN0_IRQ0_IRQHandler
+        PUBWEAK CAN0_IRQ0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN0_IRQ0_IRQHandler
+        LDR     R0, =CAN0_IRQ0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN0_IRQ1_IRQHandler
+        PUBWEAK CAN0_IRQ1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN0_IRQ1_IRQHandler
+        LDR     R0, =CAN0_IRQ1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN1_IRQ0_IRQHandler
+        PUBWEAK CAN1_IRQ0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN1_IRQ0_IRQHandler
+        LDR     R0, =CAN1_IRQ0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN1_IRQ1_IRQHandler
+        PUBWEAK CAN1_IRQ1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN1_IRQ1_IRQHandler
+        LDR     R0, =CAN1_IRQ1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB1_IRQHandler
+        PUBWEAK USB1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB1_IRQHandler
+        LDR     R0, =USB1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB1_NEEDCLK_IRQHandler
+        PUBWEAK USB1_NEEDCLK_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB1_NEEDCLK_IRQHandler
+        LDR     R0, =USB1_NEEDCLK_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_IRQHandler
+        PUBWEAK ETHERNET_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_IRQHandler
+        LDR     R0, =ETHERNET_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_PMT_IRQHandler
+        PUBWEAK ETHERNET_PMT_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_PMT_IRQHandler
+        LDR     R0, =ETHERNET_PMT_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_MACLP_IRQHandler
+        PUBWEAK ETHERNET_MACLP_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_MACLP_IRQHandler
+        LDR     R0, =ETHERNET_MACLP_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK EEPROM_IRQHandler
+        PUBWEAK EEPROM_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+EEPROM_IRQHandler
+        LDR     R0, =EEPROM_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK LCD_IRQHandler
+        PUBWEAK LCD_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+LCD_IRQHandler
+        LDR     R0, =LCD_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SHA_IRQHandler
+        PUBWEAK SHA_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SHA_IRQHandler
+        LDR     R0, =SHA_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SMARTCARD0_IRQHandler
+        PUBWEAK SMARTCARD0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SMARTCARD0_IRQHandler
+        LDR     R0, =SMARTCARD0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SMARTCARD1_IRQHandler
+        PUBWEAK SMARTCARD1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SMARTCARD1_IRQHandler
+        LDR     R0, =SMARTCARD1_DriverIRQHandler
+        BX      R0
+
+WDT_BOD_DriverIRQHandler
+DMA0_DriverIRQHandler
+GINT0_DriverIRQHandler
+GINT1_DriverIRQHandler
+PIN_INT0_DriverIRQHandler
+PIN_INT1_DriverIRQHandler
+PIN_INT2_DriverIRQHandler
+PIN_INT3_DriverIRQHandler
+UTICK0_DriverIRQHandler
+MRT0_DriverIRQHandler
+CTIMER0_DriverIRQHandler
+CTIMER1_DriverIRQHandler
+SCT0_DriverIRQHandler
+CTIMER3_DriverIRQHandler
+FLEXCOMM0_DriverIRQHandler
+FLEXCOMM1_DriverIRQHandler
+FLEXCOMM2_DriverIRQHandler
+FLEXCOMM3_DriverIRQHandler
+FLEXCOMM4_DriverIRQHandler
+FLEXCOMM5_DriverIRQHandler
+FLEXCOMM6_DriverIRQHandler
+FLEXCOMM7_DriverIRQHandler
+ADC0_SEQA_DriverIRQHandler
+ADC0_SEQB_DriverIRQHandler
+ADC0_THCMP_DriverIRQHandler
+DMIC0_DriverIRQHandler
+HWVAD0_DriverIRQHandler
+USB0_NEEDCLK_DriverIRQHandler
+USB0_DriverIRQHandler
+RTC_DriverIRQHandler
+Reserved46_DriverIRQHandler
+Reserved47_DriverIRQHandler
+PIN_INT4_DriverIRQHandler
+PIN_INT5_DriverIRQHandler
+PIN_INT6_DriverIRQHandler
+PIN_INT7_DriverIRQHandler
+CTIMER2_DriverIRQHandler
+CTIMER4_DriverIRQHandler
+RIT_DriverIRQHandler
+SPIFI0_DriverIRQHandler
+FLEXCOMM8_DriverIRQHandler
+FLEXCOMM9_DriverIRQHandler
+SDIO_DriverIRQHandler
+CAN0_IRQ0_DriverIRQHandler
+CAN0_IRQ1_DriverIRQHandler
+CAN1_IRQ0_DriverIRQHandler
+CAN1_IRQ1_DriverIRQHandler
+USB1_DriverIRQHandler
+USB1_NEEDCLK_DriverIRQHandler
+ETHERNET_DriverIRQHandler
+ETHERNET_PMT_DriverIRQHandler
+ETHERNET_MACLP_DriverIRQHandler
+EEPROM_DriverIRQHandler
+LCD_DriverIRQHandler
+SHA_DriverIRQHandler
+SMARTCARD0_DriverIRQHandler
+SMARTCARD1_DriverIRQHandler
+DefaultISR
+        B .
+
+        END
diff --git a/hw/bsp/lpc54/iar/startup_LPC54628.s b/hw/bsp/lpc54/iar/startup_LPC54628.s
new file mode 100644
index 000000000..fec5f7fca
--- /dev/null
+++ b/hw/bsp/lpc54/iar/startup_LPC54628.s
@@ -0,0 +1,654 @@
+; -------------------------------------------------------------------------
+;  @file:    startup_LPC54628.s
+;  @purpose: CMSIS Cortex-M4 Core Device Startup File
+;            LPC54628
+;  @version: 2.0
+;  @date:    2024-10-29
+;  @build:   b250521
+; -------------------------------------------------------------------------
+;
+; Copyright 1997-2016 Freescale Semiconductor, Inc.
+; Copyright 2016-2025 NXP
+; SPDX-License-Identifier: BSD-3-Clause
+;
+; The modules in this file are included in the libraries, and may be replaced
+; by any user-defined modules that define the PUBLIC symbol _program_start or
+; a user defined start symbol.
+; To override the cstartup defined in the library, simply add your modified
+; version to the workbench project.
+;
+; The vector table is normally located at address 0.
+; When debugging in RAM, it can be located in RAM, aligned to at least 2^6.
+; The name "__vector_table" has special meaning for C-SPY:
+; it is where the SP start value is found, and the NVIC vector
+; table register (VTOR) is initialized to this address if != 0.
+;
+; Cortex-M version
+;
+
+        MODULE  ?cstartup
+
+        ;; Forward declaration of sections.
+        SECTION CSTACK:DATA:NOROOT(3)
+
+        SECTION .intvec:CODE:NOROOT(2)
+
+        EXTERN  __iar_program_start
+        EXTERN  SystemInit
+        PUBLIC  __vector_table
+        PUBLIC  __vector_table_0x1c
+        PUBLIC  __Vectors
+        PUBLIC  __Vectors_End
+        PUBLIC  __Vectors_Size
+
+        DATA
+
+__iar_init$$done:              ; The vector table is not needed
+                      ; until after copy initialization is done
+
+__vector_table
+        DCD     sfe(CSTACK)
+        DCD     Reset_Handler
+
+        DCD     NMI_Handler                                   ;NMI Handler
+        DCD     HardFault_Handler                             ;Hard Fault Handler
+        DCD     MemManage_Handler                             ;MPU Fault Handler
+        DCD     BusFault_Handler                              ;Bus Fault Handler
+        DCD     UsageFault_Handler                            ;Usage Fault Handler
+__vector_table_0x1c
+        DCD     0                                             ;Reserved
+        DCD     0xFFFFFFFF                                    ;ECRP
+        DCD     0                                             ;Reserved
+        DCD     0                                             ;Reserved
+        DCD     SVC_Handler                                   ;SVCall Handler
+        DCD     DebugMon_Handler                              ;Debug Monitor Handler
+        DCD     0                                             ;Reserved
+        DCD     PendSV_Handler                                ;PendSV Handler
+        DCD     SysTick_Handler                               ;SysTick Handler
+
+                                                              ;External Interrupts
+        DCD     WDT_BOD_IRQHandler                            ;Windowed watchdog timer, Brownout detect
+        DCD     DMA0_IRQHandler                               ;DMA controller
+        DCD     GINT0_IRQHandler                              ;GPIO group 0
+        DCD     GINT1_IRQHandler                              ;GPIO group 1
+        DCD     PIN_INT0_IRQHandler                           ;Pin interrupt 0 or pattern match engine slice 0
+        DCD     PIN_INT1_IRQHandler                           ;Pin interrupt 1or pattern match engine slice 1
+        DCD     PIN_INT2_IRQHandler                           ;Pin interrupt 2 or pattern match engine slice 2
+        DCD     PIN_INT3_IRQHandler                           ;Pin interrupt 3 or pattern match engine slice 3
+        DCD     UTICK0_IRQHandler                             ;Micro-tick Timer
+        DCD     MRT0_IRQHandler                               ;Multi-rate timer
+        DCD     CTIMER0_IRQHandler                            ;Standard counter/timer CTIMER0
+        DCD     CTIMER1_IRQHandler                            ;Standard counter/timer CTIMER1
+        DCD     SCT0_IRQHandler                               ;SCTimer/PWM
+        DCD     CTIMER3_IRQHandler                            ;Standard counter/timer CTIMER3
+        DCD     FLEXCOMM0_IRQHandler                          ;Flexcomm Interface 0 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM1_IRQHandler                          ;Flexcomm Interface 1 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM2_IRQHandler                          ;Flexcomm Interface 2 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM3_IRQHandler                          ;Flexcomm Interface 3 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM4_IRQHandler                          ;Flexcomm Interface 4 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM5_IRQHandler                          ;Flexcomm Interface 5 (USART, SPI, I2C,, FLEXCOMM)
+        DCD     FLEXCOMM6_IRQHandler                          ;Flexcomm Interface 6 (USART, SPI, I2C, I2S,, FLEXCOMM)
+        DCD     FLEXCOMM7_IRQHandler                          ;Flexcomm Interface 7 (USART, SPI, I2C, I2S,, FLEXCOMM)
+        DCD     ADC0_SEQA_IRQHandler                          ;ADC0 sequence A completion.
+        DCD     ADC0_SEQB_IRQHandler                          ;ADC0 sequence B completion.
+        DCD     ADC0_THCMP_IRQHandler                         ;ADC0 threshold compare and error.
+        DCD     DMIC0_IRQHandler                              ;Digital microphone and DMIC subsystem
+        DCD     HWVAD0_IRQHandler                             ;Hardware Voice Activity Detector
+        DCD     USB0_NEEDCLK_IRQHandler                       ;USB Activity Wake-up Interrupt
+        DCD     USB0_IRQHandler                               ;USB device
+        DCD     RTC_IRQHandler                                ;RTC alarm and wake-up interrupts
+        DCD     Reserved46_IRQHandler                         ;Reserved interrupt
+        DCD     Reserved47_IRQHandler                         ;Reserved interrupt
+        DCD     PIN_INT4_IRQHandler                           ;Pin interrupt 4 or pattern match engine slice 4 int
+        DCD     PIN_INT5_IRQHandler                           ;Pin interrupt 5 or pattern match engine slice 5 int
+        DCD     PIN_INT6_IRQHandler                           ;Pin interrupt 6 or pattern match engine slice 6 int
+        DCD     PIN_INT7_IRQHandler                           ;Pin interrupt 7 or pattern match engine slice 7 int
+        DCD     CTIMER2_IRQHandler                            ;Standard counter/timer CTIMER2
+        DCD     CTIMER4_IRQHandler                            ;Standard counter/timer CTIMER4
+        DCD     RIT_IRQHandler                                ;Repetitive Interrupt Timer
+        DCD     SPIFI0_IRQHandler                             ;SPI flash interface
+        DCD     FLEXCOMM8_IRQHandler                          ;Flexcomm Interface 8 (USART, SPI, I2C, FLEXCOMM)
+        DCD     FLEXCOMM9_IRQHandler                          ;Flexcomm Interface 9 (USART, SPI, I2C, FLEXCOMM)
+        DCD     SDIO_IRQHandler                               ;SD/MMC
+        DCD     CAN0_IRQ0_IRQHandler                          ;CAN0 interrupt0
+        DCD     CAN0_IRQ1_IRQHandler                          ;CAN0 interrupt1
+        DCD     CAN1_IRQ0_IRQHandler                          ;CAN1 interrupt0
+        DCD     CAN1_IRQ1_IRQHandler                          ;CAN1 interrupt1
+        DCD     USB1_IRQHandler                               ;USB1 interrupt
+        DCD     USB1_NEEDCLK_IRQHandler                       ;USB1 activity
+        DCD     ETHERNET_IRQHandler                           ;Ethernet
+        DCD     ETHERNET_PMT_IRQHandler                       ;Ethernet power management interrupt
+        DCD     ETHERNET_MACLP_IRQHandler                     ;Ethernet MAC interrupt
+        DCD     EEPROM_IRQHandler                             ;EEPROM interrupt
+        DCD     LCD_IRQHandler                                ;LCD interrupt
+        DCD     SHA_IRQHandler                                ;SHA interrupt
+        DCD     SMARTCARD0_IRQHandler                         ;Smart card 0 interrupt
+        DCD     SMARTCARD1_IRQHandler                         ;Smart card 1 interrupt
+__Vectors_End
+
+__Vectors       EQU   __vector_table
+__Vectors_Size  EQU   __Vectors_End - __Vectors
+
+
+;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
+;;
+;; Default interrupt handlers.
+;;
+        THUMB
+
+        PUBWEAK Reset_Handler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reset_Handler
+        MOVS    r0,#56
+        LDR     r1, =0x40000220
+        STR     r0, [r1]           ;Enable SRAM clock used by Stack
+        LDR     R0, =SystemInit
+        BLX     R0
+        LDR     R0, =__iar_program_start
+        BX      R0
+
+        PUBWEAK NMI_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+NMI_Handler
+        B .
+
+        PUBWEAK HardFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+HardFault_Handler
+        B .
+
+        PUBWEAK MemManage_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+MemManage_Handler
+        B .
+
+        PUBWEAK BusFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+BusFault_Handler
+        B .
+
+        PUBWEAK UsageFault_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+UsageFault_Handler
+        B .
+
+        PUBWEAK SVC_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SVC_Handler
+        B .
+
+        PUBWEAK DebugMon_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+DebugMon_Handler
+        B .
+
+        PUBWEAK PendSV_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+PendSV_Handler
+        B .
+
+        PUBWEAK SysTick_Handler
+        SECTION .text:CODE:REORDER:NOROOT(1)
+SysTick_Handler
+        B .
+
+        PUBWEAK WDT_BOD_IRQHandler
+        PUBWEAK WDT_BOD_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+WDT_BOD_IRQHandler
+        LDR     R0, =WDT_BOD_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK DMA0_IRQHandler
+        PUBWEAK DMA0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+DMA0_IRQHandler
+        LDR     R0, =DMA0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK GINT0_IRQHandler
+        PUBWEAK GINT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+GINT0_IRQHandler
+        LDR     R0, =GINT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK GINT1_IRQHandler
+        PUBWEAK GINT1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+GINT1_IRQHandler
+        LDR     R0, =GINT1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT0_IRQHandler
+        PUBWEAK PIN_INT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT0_IRQHandler
+        LDR     R0, =PIN_INT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT1_IRQHandler
+        PUBWEAK PIN_INT1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT1_IRQHandler
+        LDR     R0, =PIN_INT1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT2_IRQHandler
+        PUBWEAK PIN_INT2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT2_IRQHandler
+        LDR     R0, =PIN_INT2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT3_IRQHandler
+        PUBWEAK PIN_INT3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT3_IRQHandler
+        LDR     R0, =PIN_INT3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK UTICK0_IRQHandler
+        PUBWEAK UTICK0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+UTICK0_IRQHandler
+        LDR     R0, =UTICK0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK MRT0_IRQHandler
+        PUBWEAK MRT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+MRT0_IRQHandler
+        LDR     R0, =MRT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER0_IRQHandler
+        PUBWEAK CTIMER0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER0_IRQHandler
+        LDR     R0, =CTIMER0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER1_IRQHandler
+        PUBWEAK CTIMER1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER1_IRQHandler
+        LDR     R0, =CTIMER1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SCT0_IRQHandler
+        PUBWEAK SCT0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SCT0_IRQHandler
+        LDR     R0, =SCT0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER3_IRQHandler
+        PUBWEAK CTIMER3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER3_IRQHandler
+        LDR     R0, =CTIMER3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM0_IRQHandler
+        PUBWEAK FLEXCOMM0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM0_IRQHandler
+        LDR     R0, =FLEXCOMM0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM1_IRQHandler
+        PUBWEAK FLEXCOMM1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM1_IRQHandler
+        LDR     R0, =FLEXCOMM1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM2_IRQHandler
+        PUBWEAK FLEXCOMM2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM2_IRQHandler
+        LDR     R0, =FLEXCOMM2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM3_IRQHandler
+        PUBWEAK FLEXCOMM3_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM3_IRQHandler
+        LDR     R0, =FLEXCOMM3_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM4_IRQHandler
+        PUBWEAK FLEXCOMM4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM4_IRQHandler
+        LDR     R0, =FLEXCOMM4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM5_IRQHandler
+        PUBWEAK FLEXCOMM5_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM5_IRQHandler
+        LDR     R0, =FLEXCOMM5_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM6_IRQHandler
+        PUBWEAK FLEXCOMM6_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM6_IRQHandler
+        LDR     R0, =FLEXCOMM6_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM7_IRQHandler
+        PUBWEAK FLEXCOMM7_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM7_IRQHandler
+        LDR     R0, =FLEXCOMM7_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_SEQA_IRQHandler
+        PUBWEAK ADC0_SEQA_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_SEQA_IRQHandler
+        LDR     R0, =ADC0_SEQA_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_SEQB_IRQHandler
+        PUBWEAK ADC0_SEQB_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_SEQB_IRQHandler
+        LDR     R0, =ADC0_SEQB_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ADC0_THCMP_IRQHandler
+        PUBWEAK ADC0_THCMP_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ADC0_THCMP_IRQHandler
+        LDR     R0, =ADC0_THCMP_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK DMIC0_IRQHandler
+        PUBWEAK DMIC0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+DMIC0_IRQHandler
+        LDR     R0, =DMIC0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK HWVAD0_IRQHandler
+        PUBWEAK HWVAD0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+HWVAD0_IRQHandler
+        LDR     R0, =HWVAD0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB0_NEEDCLK_IRQHandler
+        PUBWEAK USB0_NEEDCLK_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB0_NEEDCLK_IRQHandler
+        LDR     R0, =USB0_NEEDCLK_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB0_IRQHandler
+        PUBWEAK USB0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB0_IRQHandler
+        LDR     R0, =USB0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK RTC_IRQHandler
+        PUBWEAK RTC_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+RTC_IRQHandler
+        LDR     R0, =RTC_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK Reserved46_IRQHandler
+        PUBWEAK Reserved46_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reserved46_IRQHandler
+        LDR     R0, =Reserved46_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK Reserved47_IRQHandler
+        PUBWEAK Reserved47_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+Reserved47_IRQHandler
+        LDR     R0, =Reserved47_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT4_IRQHandler
+        PUBWEAK PIN_INT4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT4_IRQHandler
+        LDR     R0, =PIN_INT4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT5_IRQHandler
+        PUBWEAK PIN_INT5_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT5_IRQHandler
+        LDR     R0, =PIN_INT5_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT6_IRQHandler
+        PUBWEAK PIN_INT6_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT6_IRQHandler
+        LDR     R0, =PIN_INT6_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK PIN_INT7_IRQHandler
+        PUBWEAK PIN_INT7_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+PIN_INT7_IRQHandler
+        LDR     R0, =PIN_INT7_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER2_IRQHandler
+        PUBWEAK CTIMER2_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER2_IRQHandler
+        LDR     R0, =CTIMER2_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CTIMER4_IRQHandler
+        PUBWEAK CTIMER4_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CTIMER4_IRQHandler
+        LDR     R0, =CTIMER4_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK RIT_IRQHandler
+        PUBWEAK RIT_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+RIT_IRQHandler
+        LDR     R0, =RIT_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SPIFI0_IRQHandler
+        PUBWEAK SPIFI0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SPIFI0_IRQHandler
+        LDR     R0, =SPIFI0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM8_IRQHandler
+        PUBWEAK FLEXCOMM8_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM8_IRQHandler
+        LDR     R0, =FLEXCOMM8_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK FLEXCOMM9_IRQHandler
+        PUBWEAK FLEXCOMM9_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+FLEXCOMM9_IRQHandler
+        LDR     R0, =FLEXCOMM9_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SDIO_IRQHandler
+        PUBWEAK SDIO_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SDIO_IRQHandler
+        LDR     R0, =SDIO_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN0_IRQ0_IRQHandler
+        PUBWEAK CAN0_IRQ0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN0_IRQ0_IRQHandler
+        LDR     R0, =CAN0_IRQ0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN0_IRQ1_IRQHandler
+        PUBWEAK CAN0_IRQ1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN0_IRQ1_IRQHandler
+        LDR     R0, =CAN0_IRQ1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN1_IRQ0_IRQHandler
+        PUBWEAK CAN1_IRQ0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN1_IRQ0_IRQHandler
+        LDR     R0, =CAN1_IRQ0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK CAN1_IRQ1_IRQHandler
+        PUBWEAK CAN1_IRQ1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+CAN1_IRQ1_IRQHandler
+        LDR     R0, =CAN1_IRQ1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB1_IRQHandler
+        PUBWEAK USB1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB1_IRQHandler
+        LDR     R0, =USB1_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK USB1_NEEDCLK_IRQHandler
+        PUBWEAK USB1_NEEDCLK_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+USB1_NEEDCLK_IRQHandler
+        LDR     R0, =USB1_NEEDCLK_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_IRQHandler
+        PUBWEAK ETHERNET_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_IRQHandler
+        LDR     R0, =ETHERNET_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_PMT_IRQHandler
+        PUBWEAK ETHERNET_PMT_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_PMT_IRQHandler
+        LDR     R0, =ETHERNET_PMT_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK ETHERNET_MACLP_IRQHandler
+        PUBWEAK ETHERNET_MACLP_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+ETHERNET_MACLP_IRQHandler
+        LDR     R0, =ETHERNET_MACLP_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK EEPROM_IRQHandler
+        PUBWEAK EEPROM_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+EEPROM_IRQHandler
+        LDR     R0, =EEPROM_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK LCD_IRQHandler
+        PUBWEAK LCD_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+LCD_IRQHandler
+        LDR     R0, =LCD_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SHA_IRQHandler
+        PUBWEAK SHA_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SHA_IRQHandler
+        LDR     R0, =SHA_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SMARTCARD0_IRQHandler
+        PUBWEAK SMARTCARD0_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SMARTCARD0_IRQHandler
+        LDR     R0, =SMARTCARD0_DriverIRQHandler
+        BX      R0
+
+        PUBWEAK SMARTCARD1_IRQHandler
+        PUBWEAK SMARTCARD1_DriverIRQHandler
+        SECTION .text:CODE:REORDER:NOROOT(2)
+SMARTCARD1_IRQHandler
+        LDR     R0, =SMARTCARD1_DriverIRQHandler
+        BX      R0
+
+WDT_BOD_DriverIRQHandler
+DMA0_DriverIRQHandler
+GINT0_DriverIRQHandler
+GINT1_DriverIRQHandler
+PIN_INT0_DriverIRQHandler
+PIN_INT1_DriverIRQHandler
+PIN_INT2_DriverIRQHandler
+PIN_INT3_DriverIRQHandler
+UTICK0_DriverIRQHandler
+MRT0_DriverIRQHandler
+CTIMER0_DriverIRQHandler
+CTIMER1_DriverIRQHandler
+SCT0_DriverIRQHandler
+CTIMER3_DriverIRQHandler
+FLEXCOMM0_DriverIRQHandler
+FLEXCOMM1_DriverIRQHandler
+FLEXCOMM2_DriverIRQHandler
+FLEXCOMM3_DriverIRQHandler
+FLEXCOMM4_DriverIRQHandler
+FLEXCOMM5_DriverIRQHandler
+FLEXCOMM6_DriverIRQHandler
+FLEXCOMM7_DriverIRQHandler
+ADC0_SEQA_DriverIRQHandler
+ADC0_SEQB_DriverIRQHandler
+ADC0_THCMP_DriverIRQHandler
+DMIC0_DriverIRQHandler
+HWVAD0_DriverIRQHandler
+USB0_NEEDCLK_DriverIRQHandler
+USB0_DriverIRQHandler
+RTC_DriverIRQHandler
+Reserved46_DriverIRQHandler
+Reserved47_DriverIRQHandler
+PIN_INT4_DriverIRQHandler
+PIN_INT5_DriverIRQHandler
+PIN_INT6_DriverIRQHandler
+PIN_INT7_DriverIRQHandler
+CTIMER2_DriverIRQHandler
+CTIMER4_DriverIRQHandler
+RIT_DriverIRQHandler
+SPIFI0_DriverIRQHandler
+FLEXCOMM8_DriverIRQHandler
+FLEXCOMM9_DriverIRQHandler
+SDIO_DriverIRQHandler
+CAN0_IRQ0_DriverIRQHandler
+CAN0_IRQ1_DriverIRQHandler
+CAN1_IRQ0_DriverIRQHandler
+CAN1_IRQ1_DriverIRQHandler
+USB1_DriverIRQHandler
+USB1_NEEDCLK_DriverIRQHandler
+ETHERNET_DriverIRQHandler
+ETHERNET_PMT_DriverIRQHandler
+ETHERNET_MACLP_DriverIRQHandler
+EEPROM_DriverIRQHandler
+LCD_DriverIRQHandler
+SHA_DriverIRQHandler
+SMARTCARD0_DriverIRQHandler
+SMARTCARD1_DriverIRQHandler
+DefaultISR
+        B .
+
+        END
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c4b1155f3..3dc3fb4b6 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -74,6 +74,10 @@
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
   #define TUP_USBIP_IP3516
+  #define TUP_USBIP_OHCI
+  #define TUP_USBIP_OHCI_NXP
+  #define TUP_OHCI_RHPORTS     1 // 1 downstream port
+
   #define TUP_DCD_ENDPOINT_MAX 6
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC55)
diff --git a/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c b/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
index 16936e2c1..32ef99418 100644
--- a/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
+++ b/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
@@ -36,7 +36,7 @@
 #include "host/usbh.h"
 #include "hcd_lpc_ip3516.h"
 
-#if CFG_TUSB_MCU == OPT_MCU_LPC55
+#if TU_CHECK_MCU(OPT_MCU_LPC55, OPT_MCU_LPC54)
   #include "fsl_device_registers.h"
 #else
   #error "Unsupported MCUs"
@@ -46,6 +46,30 @@
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
 
+#if TU_CHECK_MCU(OPT_MCU_LPC54)
+  #define ATLPTD ATL_PTD_BASE_ADDR
+  #define INTPTD INT_PTD_BASE_ADDR
+  #define ISOPTD ISO_PTD_BASE_ADDR
+  #define ATLPTDD ATL_PTD_DONE_MAP
+  #define INTPTDD INT_PTD_DONE_MAP
+  #define ISOPTDD ISO_PTD_DONE_MAP
+  #define ATLPTDS ATL_PTD_SKIP_MAP
+  #define INTPTDS INT_PTD_SKIP_MAP
+  #define ISOPTDS ISO_PTD_SKIP_MAP
+  #define DATAPAYLOAD DATA_PAYLOAD_BASE_ADDR
+  #define LASTPTD LAST_PTD_INUSE
+
+  #define USBHSH_ATLPTD_ATL_BASE_MASK USBHSH_ATL_PTD_BASE_ADDR_ATL_BASE_MASK
+  #define USBHSH_INTPTD_INT_BASE_MASK USBHSH_INT_PTD_BASE_ADDR_INT_BASE_MASK
+  #define USBHSH_ISOPTD_ISO_BASE_MASK USBHSH_ISO_PTD_BASE_ADDR_ISO_BASE_MASK
+
+  #define USBHSH_DATAPAYLOAD_DAT_BASE_MASK USBHSH_DATA_PAYLOAD_BASE_ADDR_DAT_BASE_MASK
+
+  #define USBHSH_LASTPTD_ATL_LAST USBHSH_LAST_PTD_INUSE_ATL_LAST
+  #define USBHSH_LASTPTD_INT_LAST USBHSH_LAST_PTD_INUSE_INT_LAST
+  #define USBHSH_LASTPTD_ISO_LAST USBHSH_LAST_PTD_INUSE_ISO_LAST
+#endif
+
 #define USBHSH_PORTSC1_W1C_MASK (USBHSH_PORTSC1_CSC_MASK | USBHSH_PORTSC1_PEDC_MASK | USBHSH_PORTSC1_OCC_MASK)
 
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From b43b99a571e81fb99f6603d9534f7d4bb55e8d02 Mon Sep 17 00:00:00 2001
From: gab-k <gabriel@koppenstein.com>
Date: Sun, 14 Dec 2025 01:30:12 +0100
Subject: bsp: nxp: add support for RW612 (FRDM-RW612)

- Added `rw61x` family support.
- Added `frdm_rw612` board support.
- Update `get_deps.py` to include mcux-sdk for RW61x.
- Add ci_hs_rw61x include to ChipIdea HS driver and enable host examples.
---
 examples/host/bare_api/only.txt               |   1 +
 examples/host/cdc_msc_hid/only.txt            |   1 +
 examples/host/cdc_msc_hid_freertos/only.txt   |   1 +
 examples/host/device_info/only.txt            |   1 +
 examples/host/hid_controller/only.txt         |   1 +
 examples/host/midi_rx/only.txt                |   1 +
 examples/host/msc_file_explorer/only.txt      |   1 +
 hw/bsp/rw61x/FreeRTOSConfig/FreeRTOSConfig.h  | 150 +++++++++++++++++
 hw/bsp/rw61x/boards/frdm_rw612/board.cmake    |  30 ++++
 hw/bsp/rw61x/boards/frdm_rw612/board.h        |  76 +++++++++
 hw/bsp/rw61x/boards/frdm_rw612/board.mk       |  20 +++
 hw/bsp/rw61x/boards/frdm_rw612/clock_config.c | 170 ++++++++++++++++++++
 hw/bsp/rw61x/boards/frdm_rw612/clock_config.h | 116 ++++++++++++++
 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c      | 223 ++++++++++++++++++++++++++
 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h      | 146 +++++++++++++++++
 hw/bsp/rw61x/family.c                         | 135 ++++++++++++++++
 hw/bsp/rw61x/family.cmake                     | 102 ++++++++++++
 hw/bsp/rw61x/family.mk                        |  52 ++++++
 src/portable/chipidea/ci_hs/hcd_ci_hs.c       |   3 +
 tools/get_deps.py                             |   4 +-
 20 files changed, 1232 insertions(+), 2 deletions(-)
 create mode 100644 hw/bsp/rw61x/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/board.cmake
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/board.h
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/board.mk
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
 create mode 100644 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
 create mode 100644 hw/bsp/rw61x/family.c
 create mode 100644 hw/bsp/rw61x/family.cmake
 create mode 100644 hw/bsp/rw61x/family.mk

(limited to 'hw')

diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index cba58f8e8..1c9ae72eb 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -8,6 +8,7 @@ mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index cba58f8e8..1c9ae72eb 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -8,6 +8,7 @@ mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index ef0a1ac96..5c5b7c56d 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -6,6 +6,7 @@ mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:MSP432E4
 mcu:RX65X
 mcu:MAX3421
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 61a08f68d..892cbf4b8 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -9,6 +9,7 @@ mcu:MAX3421
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:MSP432E4
 mcu:RP2040
 mcu:RX65X
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index cba58f8e8..1c9ae72eb 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -8,6 +8,7 @@ mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 133a7c9a0..ff9c0bcb8 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -12,6 +12,7 @@ mcu:MAX3421
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:MSP432E4
 mcu:RP2040
 mcu:RX65X
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index cba58f8e8..1c9ae72eb 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -8,6 +8,7 @@ mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:RW61X
 mcu:RP2040
 mcu:MSP432E4
 mcu:RX65X
diff --git a/hw/bsp/rw61x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/rw61x/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..281b4d40c
--- /dev/null
+++ b/hw/bsp/rw61x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,150 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "fsl_device_registers.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        0 // RW61x has FPU but is disabled due to using cortex-m33-nodsp-nofp.mk
+#define configENABLE_TRUSTZONE                  0
+#define configRUN_FREERTOS_SECURE_ONLY          1 // Cortex-M33 runs in secure mode after reset by default!
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       3
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/board.cmake b/hw/bsp/rw61x/boards/frdm_rw612/board.cmake
new file mode 100644
index 000000000..09feb0cab
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/board.cmake
@@ -0,0 +1,30 @@
+set(MCU_VARIANT RW612)
+set(MCU_CORE    RW612)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+set(PYOCD_TARGET rw612eta2i)
+
+set(BOARD_DIR ${SDK_DIR}/boards/frdmrw612)
+
+set(PORT 1)
+
+
+function(update_board BOARD_TARGET)
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CPU_RW612ETA2I
+    BOARD_TUD_RHPORT=${PORT}
+    BOARD_TUH_RHPORT=${PORT}
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    BOOT_HEADER_ENABLE=1
+    )
+
+  target_sources(${BOARD_TARGET} PUBLIC
+    ${BOARD_DIR}/flash_config/flash_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/pin_mux.c
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${BOARD_DIR}/flash_config
+    )
+endfunction()
\ No newline at end of file
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/board.h b/hw/bsp/rw61x/boards/frdm_rw612/board.h
new file mode 100644
index 000000000..ebb357c29
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/board.h
@@ -0,0 +1,76 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ * Copyright (c) 2025, Gabriel Koppenstein
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: FRDM-RW612
+   url: https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-RW612
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+
+// LED - Green channel of RGB LED
+#define LED_GPIO              BOARD_INITLEDPINS_LED_GREEN_PERIPHERAL
+#define LED_CLK               kCLOCK_HsGpio0
+#define LED_PIN               BOARD_INITLEDPINS_LED_GREEN_PIN 
+#define LED_PORT              BOARD_INITLEDPINS_LED_GREEN_PORT 
+#define LED_STATE_ON          0
+
+// WAKE button (Dummy, use unused pin
+#define BUTTON_GPIO           BOARD_INITPINS_WAKEUP_BTN_PERIPHERAL
+#define BUTTON_CLK            kCLOCK_HsGpio0
+#define BUTTON_PIN            BOARD_INITPINS_WAKEUP_BTN_PIN
+#define BUTTON_PORT           BOARD_INITPINS_WAKEUP_BTN_PORT
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_DEV                   USART3
+#define LP_FLEXCOMM_INST           3U
+
+#define BOARD_DEBUG_UART_FRG_CLK \
+    (&(const clock_frg_clk_config_t){3, kCLOCK_FrgPllDiv, 255, 0}) /*!< Select FRG3 mux as frg_pll */
+#define BOARD_DEBUG_UART_CLK_ATTACH kFRG_to_FLEXCOMM3
+
+
+static inline void board_uart_init_clock(void) {
+  /* attach FRG0 clock to FLEXCOMM3/USART3 */
+  CLOCK_SetFRGClock(BOARD_DEBUG_UART_FRG_CLK);
+  CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
+
+
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/board.mk b/hw/bsp/rw61x/boards/frdm_rw612/board.mk
new file mode 100644
index 000000000..c6a169b23
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/board.mk
@@ -0,0 +1,20 @@
+MCU_VARIANT = RW612
+MCU_CORE = RW612
+
+CPU_CORE = cortex-m33-nodsp-nofp
+CFLAGS += \
+	-DCPU_RW612ETA2I \
+	-DCFG_TUSB_MCU=OPT_MCU_RW61X \
+	-DBOOT_HEADER_ENABLE=1 \
+
+JLINK_DEVICE = ${MCU_VARIANT}
+PYOCD_TARGET = rw612eta2i
+
+SRC_C += \
+	$(SDK_DIR)/boards/frdmrw612/flash_config/flash_config.c \
+
+INC += \
+	$(TOP)/$(SDK_DIR)/boards/frdmrw612/flash_config/ \
+
+# flash using pyocd
+flash: flash-jlink
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
new file mode 100644
index 000000000..513e40f66
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
@@ -0,0 +1,170 @@
+/*
+ * Copyright 2024,2025 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to set up clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up all selectors to provide selected clocks.
+ *
+ * 3. Set up all dividers.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v15.0
+processor: RW612
+package_id: RW612ETA2I
+mcu_data: ksdk2_0
+processor_version: 24.12.10
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_power.h"
+#include "fsl_clock.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: audio_pll_clk.outFreq, value: 4246732800/345600007 MHz}
+- {id: aux0_pll_clk.outFreq, value: 260 MHz}
+- {id: avpll_ch1_clkout.outFreq, value: 4246732800/345600007 MHz}
+- {id: avpll_ch2_clkout.outFreq, value: 1415577600/22118401 MHz}
+- {id: cau_slp_clk.outFreq, value: 4 MHz}
+- {id: clk_32k.outFreq, value: 32 kHz}
+- {id: clk_pmu_sys.outFreq, value: 52 MHz}
+- {id: els_128m_clk.outFreq, value: 128 MHz}
+- {id: els_256m_clk.outFreq, value: 256 MHz}
+- {id: els_64m_clk.outFreq, value: 64 MHz}
+- {id: ffro_clk_div4.outFreq, value: 640/53 MHz}
+- {id: hclk.outFreq, value: 260 MHz}
+- {id: lposc_clk_i.outFreq, value: 1 MHz}
+- {id: main_clk.outFreq, value: 260 MHz}
+- {id: main_pll_clk.outFreq, value: 260 MHz}
+- {id: otp_fuse_32m_clk.outFreq, value: 32 MHz}
+- {id: refclk_phy.outFreq, value: 40 MHz}
+- {id: sfro_clk_i.outFreq, value: 16 MHz}
+- {id: systick_fclk.outFreq, value: 260 MHz}
+- {id: t3pll_mci_256m.outFreq, value: 256 MHz}
+- {id: t3pll_mci_48_60m_irc.outFreq, value: 2560/53 MHz}
+- {id: tcpu_mci_clk.outFreq, value: 260 MHz}
+- {id: tddr_mci_flexspi_clk.outFreq, value: 320 MHz}
+settings:
+- {id: CLKCTL0.MAINCLKSELB.sel, value: CLKCTL0.MAINPLLCLKDIV}
+- {id: CLKCTL0.MAINPLLCLKDIV.scale, value: '1', locked: true}
+- {id: CLKCTL0.PMUFCLKDIV.scale, value: '5', locked: true}
+- {id: CLKCTL0.SYSCPUAHBCLKDIV.scale, value: '1', locked: true}
+- {id: CLKCTL0.SYSTICKFCLKSEL.sel, value: CLKCTL0.SYSTICKFCLKDIV}
+- {id: CLKCTL0.WDT0FCLKSEL.sel, value: NO_CLOCK}
+- {id: CLKCTL1.FRGPLLCLKDIV.scale, value: '13', locked: true}
+- {id: CLKCTL1.OSEVENTFCLKSEL.sel, value: NO_CLOCK}
+- {id: REFCLK_SYS_Config, value: Disabled}
+- {id: SYSCTL2.CH1_M.scale, value: '2621440', locked: true}
+- {id: SYSCTL2.CH1_OFFSET_DIV.scale, value: '345600007', locked: true}
+- {id: SYSCTL2.CH2_M.scale, value: '2621440', locked: true}
+- {id: SYSCTL2.CH2_OFFSET_DIV.scale, value: '66355203', locked: true}
+- {id: SYSCTL2.T3_FBDIV.scale, value: '64', locked: true}
+- {id: SYSCTL2.T3_REFDIV.scale, value: '1', locked: true}
+- {id: T3PLL_MCI_213P3M_Config, value: Disabled}
+- {id: T3PLL_MCI_FLEXSPI_Config, value: Disabled}
+- {id: TCPU_MCI_FLEXSPI_CLK_Config, value: Disabled}
+- {id: TDDR_MCI_ENET_CLK_Config, value: Disabled}
+sources:
+- {id: CAU.XTAL_OSC.outFreq, value: 40 MHz, enabled: true}
+- {id: PMU.XTAL32K.outFreq, value: 32.768 kHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const clock_avpll_config_t avpllConfig_BOARD_BootClockRUN =
+    {
+        .ch1Freq = kCLOCK_AvPllChFreq12p288m,     /* AVPLL channel frequency 12.288 MHz */
+        .ch2Freq = kCLOCK_AvPllChFreq64m,         /* AVPLL channel frequency 64 MHz */
+        .enableCali = true,                       /* AVPLL calibration is enabled */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Disable GDET and VSensors */
+    POWER_DisableGDetVSensors();
+    /* Enable CAU sleep clock for PMU */
+    if ((PMU->CAU_SLP_CTRL & PMU_CAU_SLP_CTRL_SOC_SLP_RDY_MASK) == 0U)
+    {
+        /* Enable the CAU sleep clock. */
+        CLOCK_EnableClock(kCLOCK_RefClkCauSlp);
+    }
+    if ((SYSCTL2->SOURCE_CLK_GATE & SYSCTL2_SOURCE_CLK_GATE_REFCLK_SYS_CG_MASK) != 0U)
+    {
+        /* Enable the REFCLK_SYS clock. */
+        CLOCK_EnableClock(kCLOCK_RefClkSys);
+    }
+    /* Initialize T3 PLL and enable outputs that are not clock gated. */
+    CLOCK_InitT3RefClk(kCLOCK_T3MciIrc48m);
+    /* Enable FFRO - T3 PLL 48/60 MHz IRC clock output */
+    CLOCK_EnableClock(kCLOCK_T3PllMciIrcClk);
+    /* Enable T3 PLL 256 MHz clock output */
+    CLOCK_EnableClock(kCLOCK_T3PllMci256mClk);
+    /* Set core clock to safe system oscillator clock for initialization of other sources. */
+    CLOCK_AttachClk(kSYSOSC_to_MAIN_CLK);
+    CLOCK_SetClkDiv(kCLOCK_DivSysCpuAhbClk, 1);
+    /* Enable TCPU PLL MCI clock output */
+    CLOCK_EnableClock(kCLOCK_TcpuMciClk);
+    /* Initialize TDDR PLL and enable outputs that are not clock gated. */
+    CLOCK_InitTddrRefClk(kCLOCK_TddrFlexspiDiv10);
+    /* Enable TDDR PLL FlexSPI clock output */
+    CLOCK_EnableClock(kCLOCK_TddrMciFlexspiClk);
+    /* Initialize AVPLL and enable both channels. */
+    CLOCK_InitAvPll(&avpllConfig_BOARD_BootClockRUN);
+    /* Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kRC32K_to_CLK32K);                 /* Switch CLK32K to RC32K */
+    /*!< Please note SYSTICK_CLK source is used only if the SysTick SYST_CSR register CLKSOURCE bit is set to 0. */
+    CLOCK_AttachClk(kSYSTICK_DIV_to_SYSTICK_CLK);                 /* Switch SYSTICK_CLK to SYSTICK_DIV */
+    /* Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAudioPllClk, 1U);         /* Set .AUDIOPLLCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivPllFrgClk, 13U);         /* Set .FRGPLLCLKDIV divider to value 13 */
+    CLOCK_SetClkDiv(kCLOCK_DivMainPllClk, 1U);         /* Set .MAINPLLCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivAux0PllClk, 1U);         /* Set .AUX0PLLCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivSystickClk, 1U);         /* Set .SYSTICKFCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivPmuFclk, 5U);         /* Set .PMUFCLKDIV divider to value 5 */
+    /* Select the main clock source for the main system clock (MAINCLKSELA and MAINCLKSELB). */
+    CLOCK_AttachClk(kMAIN_PLL_to_MAIN_CLK);
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_HCLK;
+}
+
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
new file mode 100644
index 000000000..3b467d869
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
@@ -0,0 +1,116 @@
+/*
+ * Copyright 2024 NXP
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKRUN_AUDIO_PLL_CLK              12287999UL     /* Clock consumers of audio_pll_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_AUX0_PLL_CLK               260000000UL    /* Clock consumers of aux0_pll_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_AUX1_PLL_CLK               0UL            /* Clock consumers of aux1_pll_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_AVPLL_CH1_CLKOUT           12287999UL     /* Clock consumers of avpll_ch1_clkout output : N/A */
+#define BOARD_BOOTCLOCKRUN_AVPLL_CH2_CLKOUT           63999997UL     /* Clock consumers of avpll_ch2_clkout output : N/A */
+#define BOARD_BOOTCLOCKRUN_CAU_SLP_CLK                4000000UL      /* Clock consumers of cau_slp_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLK_32K                    32000UL        /* Clock consumers of clk_32k output : RTC */
+#define BOARD_BOOTCLOCKRUN_CLK_OUT                    0UL            /* Clock consumers of clk_out output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLK_PMU_SYS                52000000UL     /* Clock consumers of clk_pmu_sys output : PMU */
+#define BOARD_BOOTCLOCKRUN_CTIMER0_FCLK               0UL            /* Clock consumers of ctimer0_fclk output : CTIMER0 */
+#define BOARD_BOOTCLOCKRUN_CTIMER1_FCLK               0UL            /* Clock consumers of ctimer1_fclk output : CTIMER1 */
+#define BOARD_BOOTCLOCKRUN_CTIMER2_FCLK               0UL            /* Clock consumers of ctimer2_fclk output : CTIMER2 */
+#define BOARD_BOOTCLOCKRUN_CTIMER3_FCLK               0UL            /* Clock consumers of ctimer3_fclk output : CTIMER3 */
+#define BOARD_BOOTCLOCKRUN_DMIC_FCLK                  0UL            /* Clock consumers of dmic_fclk output : DMIC0 */
+#define BOARD_BOOTCLOCKRUN_ELS_128M_CLK               128000000UL    /* Clock consumers of els_128m_clk output : ELS */
+#define BOARD_BOOTCLOCKRUN_ELS_256M_CLK               256000000UL    /* Clock consumers of els_256m_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_ELS_64M_CLK                64000000UL     /* Clock consumers of els_64m_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_ELS_FCLK                   0UL            /* Clock consumers of els_fclk output : ELS */
+#define BOARD_BOOTCLOCKRUN_FFRO_CLK_DIV4              12075471UL     /* Clock consumers of ffro_clk_div4 output : N/A */
+#define BOARD_BOOTCLOCKRUN_FLEXCOMM0_FCLK             0UL            /* Clock consumers of flexcomm0_fclk output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKRUN_FLEXCOMM14_FCLK            0UL            /* Clock consumers of flexcomm14_fclk output : FLEXCOMM14 */
+#define BOARD_BOOTCLOCKRUN_FLEXCOMM1_FCLK             0UL            /* Clock consumers of flexcomm1_fclk output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKRUN_FLEXCOMM2_FCLK             0UL            /* Clock consumers of flexcomm2_fclk output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKRUN_FLEXCOMM3_FCLK             0UL            /* Clock consumers of flexcomm3_fclk output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_FCLK               0UL            /* Clock consumers of flexspi_fclk output : FLEXSPI */
+#define BOARD_BOOTCLOCKRUN_GAU_FCLK                   0UL            /* Clock consumers of gau_fclk output : GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1 */
+#define BOARD_BOOTCLOCKRUN_HCLK                       260000000UL    /* Clock consumers of hclk output : AHB_SECURE_CTRL, APU0, APU1, BLEAPU, BLECTRL, BUCK11, BUCK18, CACHE64_CTRL0, CACHE64_CTRL1, CACHE64_POLSEL0, CACHE64_POLSEL1, CAU, CDOG, CLKCTL0, CLKCTL1, CRC, CTIMER0, CTIMER1, CTIMER2, CTIMER3, DMA0, DMA1, DMIC0, ELS, ENET, FLEXCOMM0, FLEXCOMM1, FLEXCOMM14, FLEXCOMM2, FLEXCOMM3, FLEXSPI, FREQME, GAU_ACOMP, GAU_BG, GAU_DAC0, GAU_GPADC0, GAU_GPADC1, GDMA, GPIO, INPUTMUX, ITRC, LCDIC, MCI_IO_MUX, MRT0, MRT1, OCOTP, OSTIMER, PINT, PKC, PMU, POWERQUAD, PUF, ROMCP, RSTCTL0, RSTCTL1, RTC, SCT0, SDU_FBR_CARD, SDU_FN0_CARD, SDU_FN_CARD, SECGPIO, SENSOR_CTRL, SOCCTRL, SOC_OTP_CTRL, SYSCTL0, SYSCTL1, SYSCTL2, SysTick, TRNG, USBOTG, USIM, UTICK, WLAPU, WLCTRL, WWDT0 */
+#define BOARD_BOOTCLOCKRUN_LCD_FCLK                   0UL            /* Clock consumers of lcd_fclk output : LCDIC */
+#define BOARD_BOOTCLOCKRUN_LPOSC_CLK_I                1000000UL      /* Clock consumers of lposc_clk_i output : N/A */
+#define BOARD_BOOTCLOCKRUN_MAIN_CLK                   260000000UL    /* Clock consumers of main_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_MAIN_PLL_CLK               260000000UL    /* Clock consumers of main_pll_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_MCLK_OUT                   0UL            /* Clock consumers of mclk_out output : N/A */
+#define BOARD_BOOTCLOCKRUN_OSEVENT_FCLK               0UL            /* Clock consumers of osevent_fclk output : OSTIMER */
+#define BOARD_BOOTCLOCKRUN_OTP_FUSE_32M_CLK           32000000UL     /* Clock consumers of otp_fuse_32m_clk output : OCOTP */
+#define BOARD_BOOTCLOCKRUN_REFCLK_PHY                 40000000UL     /* Clock consumers of refclk_phy output : USBOTG */
+#define BOARD_BOOTCLOCKRUN_REFCLK_SYS                 0UL            /* Clock consumers of refclk_sys output : N/A */
+#define BOARD_BOOTCLOCKRUN_SCT_FCLK                   0UL            /* Clock consumers of sct_fclk output : SCT0 */
+#define BOARD_BOOTCLOCKRUN_SFRO_CLK_I                 16000000UL     /* Clock consumers of sfro_clk_i output : N/A */
+#define BOARD_BOOTCLOCKRUN_SYSOSC_CLK_I               0UL            /* Clock consumers of sysosc_clk_i output : N/A */
+#define BOARD_BOOTCLOCKRUN_SYSTICK_FCLK               260000000UL    /* Clock consumers of systick_fclk output : SysTick */
+#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_213P3M           0UL            /* Clock consumers of t3pll_mci_213p3m output : N/A */
+#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_256M             256000000UL    /* Clock consumers of t3pll_mci_256m output : N/A */
+#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_48_60M_IRC       48301886UL     /* Clock consumers of t3pll_mci_48_60m_irc output : N/A */
+#define BOARD_BOOTCLOCKRUN_T3PLL_MCI_FLEXSPI_CLK      0UL            /* Clock consumers of t3pll_mci_flexspi_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_TCPU_MCI_CLK               260000000UL    /* Clock consumers of tcpu_mci_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_TCPU_MCI_FLEXSPI_CLK       0UL            /* Clock consumers of tcpu_mci_flexspi_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_TDDR_MCI_ENET_CLK          0UL            /* Clock consumers of tddr_mci_enet_clk output : ENET */
+#define BOARD_BOOTCLOCKRUN_TDDR_MCI_FLEXSPI_CLK       320000000UL    /* Clock consumers of tddr_mci_flexspi_clk output : N/A */
+#define BOARD_BOOTCLOCKRUN_USIM_FCLK                  0UL            /* Clock consumers of usim_fclk output : USIM */
+#define BOARD_BOOTCLOCKRUN_UTICK_FCLK                 0UL            /* Clock consumers of utick_fclk output : UTICK */
+#define BOARD_BOOTCLOCKRUN_WDT0_FCLK                  0UL            /* Clock consumers of wdt0_fclk output : WWDT0 */
+
+/*! @brief AVPLL set for BOARD_BootClockRUN configuration.
+ */
+extern const clock_avpll_config_t avpllConfig_BOARD_BootClockRUN;
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+
+#endif /* _CLOCK_CONFIG_H_ */
+
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
new file mode 100644
index 000000000..49b74b2bb
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
@@ -0,0 +1,223 @@
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: RW612
+package_id: RW612ETA2I
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: FRDM-RW612
+pin_labels:
+- {pin_num: M2, pin_signal: GPIO_11, label: 'J1[6]/WAKEUP_BTN', identifier: WAKEUP;WAKEUP_BTN}
+- {pin_num: L7, pin_signal: GPIO_5, label: 'J1[7]/MCLK', identifier: MCLKOUT}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_io_mux.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitPins();
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitSWD_DEBUGPins();
+    BOARD_InitLEDPins();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins:
+- options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
+- pin_list:
+  - {pin_num: M2, peripheral: GPIO, signal: 'PIO0, 11', pin_signal: GPIO_11, identifier: WAKEUP_BTN, direction: INPUT}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins
+ * Description   : 
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 */
+void BOARD_InitPins(void)
+{
+    /* Enables the clock for the GPIO0 module */
+    GPIO_PortInit(GPIO, 0);
+
+    gpio_pin_config_t WAKEUP_BTN_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO0_11 (pin M2)  */
+    GPIO_PinInit(BOARD_INITPINS_WAKEUP_BTN_GPIO, BOARD_INITPINS_WAKEUP_BTN_PORT, BOARD_INITPINS_WAKEUP_BTN_PIN, &WAKEUP_BTN_config);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
+- pin_list:
+  - {pin_num: E5, peripheral: FLEXCOMM3, signal: USART_RXD, pin_signal: GPIO_24}
+  - {pin_num: F6, peripheral: FLEXCOMM3, signal: USART_TXD, pin_signal: GPIO_26}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Initialize FC3_USART_DATA functionality on pin GPIO_24, GPIO_26 (pin E5_F6) */
+    IO_MUX_SetPinMux(IO_MUX_FC3_USART_DATA);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
+- pin_list:
+  - {pin_num: G5, peripheral: SWD, signal: CLK, pin_signal: GPIO_13}
+  - {pin_num: K4, peripheral: SWD, signal: IO, pin_signal: GPIO_14}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+
+    MCI_IO_MUX->C_TIMER_IN = ((MCI_IO_MUX->C_TIMER_IN &
+                               /* Mask bits to zero which are setting */
+                               (~(MCI_IO_MUX_C_TIMER_IN_CT_INP3_SEL_MASK | MCI_IO_MUX_C_TIMER_IN_CT_INP4_SEL_MASK)))
+
+                              /* sel GPIO-13 as ct_inp3: 0x00u */
+                              | MCI_IO_MUX_C_TIMER_IN_CT_INP3_SEL(0x00u)
+                              /* sel GPIO-14 as ct_inp4: 0x00u */
+                              | MCI_IO_MUX_C_TIMER_IN_CT_INP4_SEL(0x00u));
+
+    MCI_IO_MUX->C_TIMER_OUT = ((MCI_IO_MUX->C_TIMER_OUT &
+                                /* Mask bits to zero which are setting */
+                                (~(MCI_IO_MUX_C_TIMER_OUT_CT0MAT3_SEL_MASK | MCI_IO_MUX_C_TIMER_OUT_CT1MAT0_SEL_MASK)))
+
+                               /* sel GPIO-13 as ct0mat3: 0x00u */
+                               | MCI_IO_MUX_C_TIMER_OUT_CT0MAT3_SEL(0x00u)
+                               /* sel GPIO-14 as ct1mat0: 0x00u */
+                               | MCI_IO_MUX_C_TIMER_OUT_CT1MAT0_SEL(0x00u));
+
+    MCI_IO_MUX->FC2 =
+        ((MCI_IO_MUX->FC2 &
+          /* Mask bits to zero which are setting */
+          (~(MCI_IO_MUX_FC2_SEL_FC2_I2C_MASK | MCI_IO_MUX_FC2_SEL_FC2_I2S_MASK | MCI_IO_MUX_FC2_SEL_FC2_SPI_MASK | MCI_IO_MUX_FC2_SEL_FC2_I2S_DATA_ONLY_MASK | MCI_IO_MUX_FC2_SEL_FC2_USART_DATA_MASK)))
+
+         /* flexcomm2:select GPIO-13/14 as i2c function: 0x00u */
+         | MCI_IO_MUX_FC2_SEL_FC2_I2C(0x00u)
+         /* flexcomm2:select GPIO-13/14/15 as i2s function: 0x00u */
+         | MCI_IO_MUX_FC2_SEL_FC2_I2S(0x00u)
+         /* flexcomm2:select GPIO-13/14/15/16 as spi function: 0x00u */
+         | MCI_IO_MUX_FC2_SEL_FC2_SPI(0x00u)
+         /* flexcomm2:select GPIO-13 as i2s data function: 0x00u */
+         | MCI_IO_MUX_FC2_SEL_FC2_I2S_DATA_ONLY(0x00u)
+         /* flexcomm2:select GPIO-13/14 as usart rxd/txd: 0x00u */
+         | MCI_IO_MUX_FC2_SEL_FC2_USART_DATA(0x00u));
+
+    MCI_IO_MUX->GPIO_GRP0 = ((MCI_IO_MUX->GPIO_GRP0 &
+                              /* Mask bits to zero which are setting */
+                              (~(MCI_IO_MUX_GPIO_GRP0_SEL_13_MASK | MCI_IO_MUX_GPIO_GRP0_SEL_14_MASK)))
+
+                             /* pio0[31:0] selection, high valid; sel[i]->pio0[i]->GPIO[i]: 0x00u */
+                             | MCI_IO_MUX_GPIO_GRP0_SEL(0x00u));
+
+    SOCCTRL->MCI_IOMUX_EN0 = ((SOCCTRL->MCI_IOMUX_EN0 &
+                               /* Mask bits to zero which are setting */
+                               (~(SOCCIU_MCI_IOMUX_EN0_EN_21_0_13_MASK | SOCCIU_MCI_IOMUX_EN0_EN_21_0_14_MASK)))
+
+                              /* Bitwise enable control for mci_io_mux GPIO[21:0]: 0x00u */
+                              | SOCCIU_MCI_IOMUX_EN0_EN_21_0(0x00u));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDPins:
+- options: {callFromInitBoot: 'true', coreID: cm33, enableClock: 'true'}
+- pin_list:
+  - {pin_num: M1, peripheral: GPIO, signal: 'PIO0, 0', pin_signal: GPIO_0, direction: OUTPUT, gpio_init_state: 'true'}
+  - {pin_num: N2, peripheral: GPIO, signal: 'PIO0, 1', pin_signal: GPIO_1, direction: OUTPUT, gpio_init_state: 'true'}
+  - {pin_num: N8, peripheral: GPIO, signal: 'PIO0, 12', pin_signal: GPIO_12, direction: OUTPUT, gpio_init_state: 'true'}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 */
+void BOARD_InitLEDPins(void)
+{
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_HsGpio0);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO0_0 (pin M1)  */
+    GPIO_PinInit(BOARD_INITLEDPINS_LED_BLUE_GPIO, BOARD_INITLEDPINS_LED_BLUE_PORT, BOARD_INITLEDPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO0_1 (pin N2)  */
+    GPIO_PinInit(BOARD_INITLEDPINS_LED_RED_GPIO, BOARD_INITLEDPINS_LED_RED_PORT, BOARD_INITLEDPINS_LED_RED_PIN, &LED_RED_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO0_12 (pin N8)  */
+    GPIO_PinInit(BOARD_INITLEDPINS_LED_GREEN_GPIO, BOARD_INITLEDPINS_LED_GREEN_PORT, BOARD_INITLEDPINS_LED_GREEN_PIN, &LED_GREEN_config);
+    /* Initialize GPIO0 functionality on pin GPIO_0 (pin M1) */
+    IO_MUX_SetPinMux(IO_MUX_GPIO0);
+    /* Initialize GPIO1 functionality on pin GPIO_1 (pin N2) */
+    IO_MUX_SetPinMux(IO_MUX_GPIO1);
+    /* Initialize GPIO12 functionality on pin GPIO_12 (pin N8) */
+    IO_MUX_SetPinMux(IO_MUX_GPIO12);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
new file mode 100644
index 000000000..f4c9a9127
--- /dev/null
+++ b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
@@ -0,0 +1,146 @@
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+/*!
+ * @brief mclk direction control: MCLK is in the output direction. */
+#define MCLKPINDIR_MCLKPINDIR_OUTPUT_DIRECTION 0x01u
+
+/*! @name GPIO_5 (coord L7), J1[7]/MCLK
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITPINS_MCLKOUT_PERIPHERAL CLKCTL1                 /*!<@brief Peripheral name */
+#define BOARD_INITPINS_MCLKOUT_SIGNAL MCLK                        /*!<@brief Signal name */
+#define BOARD_INITPINS_MCLKOUT_GPIO_PIN 5U                        /*!<@brief GPIO pin number */
+#define BOARD_INITPINS_MCLKOUT_PORT 0U                            /*!<@brief PORT number */
+#define BOARD_INITPINS_MCLKOUT_PIN 5U                             /*!<@brief PORT pin number */
+#define BOARD_INITPINS_MCLKOUT_PIN_MASK (1U << 5U)                /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name GPIO_11 (coord M2), J1[6]/WAKEUP_BTN
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITPINS_WAKEUP_BTN_PERIPHERAL GPIO          /*!<@brief Peripheral name */
+#define BOARD_INITPINS_WAKEUP_BTN_SIGNAL PIO0              /*!<@brief Signal name */
+#define BOARD_INITPINS_WAKEUP_BTN_CHANNEL 11               /*!<@brief Signal channel */
+#define BOARD_INITPINS_WAKEUP_BTN_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITPINS_WAKEUP_BTN_GPIO_PIN 11U             /*!<@brief GPIO pin number */
+#define BOARD_INITPINS_WAKEUP_BTN_PORT 0U                  /*!<@brief PORT number */
+#define BOARD_INITPINS_WAKEUP_BTN_PIN 11U                  /*!<@brief PORT pin number */
+#define BOARD_INITPINS_WAKEUP_BTN_PIN_MASK (1U << 11U)     /*!<@brief PORT pin mask */
+                                                           /* @} */
+
+/*!
+ * @brief 
+ *
+ */
+void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 */
+
+/*!
+ * @brief pio0[31:0] selection, high valid; sel[i]->pio0[i]->GPIO[i] Mask for item 13. */
+#define MCI_IO_MUX_GPIO_GRP0_SEL_13_MASK 0x2000u
+/*!
+ * @brief pio0[31:0] selection, high valid; sel[i]->pio0[i]->GPIO[i] Mask for item 14. */
+#define MCI_IO_MUX_GPIO_GRP0_SEL_14_MASK 0x4000u
+/*!
+ * @brief Bitwise enable control for mci_io_mux GPIO[21:0] Mask for item 13. */
+#define SOCCIU_MCI_IOMUX_EN0_EN_21_0_13_MASK 0x2000u
+/*!
+ * @brief Bitwise enable control for mci_io_mux GPIO[21:0] Mask for item 14. */
+#define SOCCIU_MCI_IOMUX_EN0_EN_21_0_14_MASK 0x4000u
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 */
+
+/*! @name GPIO_0 (coord M1), J1[14]/LED_BLUE
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITLEDPINS_LED_BLUE_PERIPHERAL GPIO                    /*!<@brief Peripheral name */
+#define BOARD_INITLEDPINS_LED_BLUE_SIGNAL PIO0                        /*!<@brief Signal name */
+#define BOARD_INITLEDPINS_LED_BLUE_CHANNEL 0                          /*!<@brief Signal channel */
+#define BOARD_INITLEDPINS_LED_BLUE_GPIO GPIO                          /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDPINS_LED_BLUE_INIT_GPIO_VALUE 1U                 /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDPINS_LED_BLUE_GPIO_PIN 0U                        /*!<@brief GPIO pin number */
+#define BOARD_INITLEDPINS_LED_BLUE_PORT 0U                            /*!<@brief PORT number */
+#define BOARD_INITLEDPINS_LED_BLUE_PIN 0U                             /*!<@brief PORT pin number */
+#define BOARD_INITLEDPINS_LED_BLUE_PIN_MASK (1U << 0U)                /*!<@brief PORT pin mask */
+                                                                      /* @} */
+
+/*! @name GPIO_1 (coord N2), J5[1]/LED_RED
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITLEDPINS_LED_RED_PERIPHERAL GPIO                    /*!<@brief Peripheral name */
+#define BOARD_INITLEDPINS_LED_RED_SIGNAL PIO0                        /*!<@brief Signal name */
+#define BOARD_INITLEDPINS_LED_RED_CHANNEL 1                          /*!<@brief Signal channel */
+#define BOARD_INITLEDPINS_LED_RED_GPIO GPIO                          /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDPINS_LED_RED_INIT_GPIO_VALUE 1U                 /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDPINS_LED_RED_GPIO_PIN 1U                        /*!<@brief GPIO pin number */
+#define BOARD_INITLEDPINS_LED_RED_PORT 0U                            /*!<@brief PORT number */
+#define BOARD_INITLEDPINS_LED_RED_PIN 1U                             /*!<@brief PORT pin number */
+#define BOARD_INITLEDPINS_LED_RED_PIN_MASK (1U << 1U)                /*!<@brief PORT pin mask */
+                                                                     /* @} */
+
+/*! @name GPIO_12 (coord N8), LED_GREEN
+  @{ */
+/* Routed pin properties */
+#define BOARD_INITLEDPINS_LED_GREEN_PERIPHERAL GPIO                    /*!<@brief Peripheral name */
+#define BOARD_INITLEDPINS_LED_GREEN_SIGNAL PIO0                        /*!<@brief Signal name */
+#define BOARD_INITLEDPINS_LED_GREEN_CHANNEL 12                         /*!<@brief Signal channel */
+#define BOARD_INITLEDPINS_LED_GREEN_GPIO GPIO                          /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDPINS_LED_GREEN_INIT_GPIO_VALUE 1U                 /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDPINS_LED_GREEN_GPIO_PIN 12U                       /*!<@brief GPIO pin number */
+#define BOARD_INITLEDPINS_LED_GREEN_PORT 0U                            /*!<@brief PORT number */
+#define BOARD_INITLEDPINS_LED_GREEN_PIN 12U                            /*!<@brief PORT pin number */
+#define BOARD_INITLEDPINS_LED_GREEN_PIN_MASK (1U << 12U)               /*!<@brief PORT pin mask */
+                                                                       /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDPins(void); /* Function assigned for the Cortex-M33 */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/rw61x/family.c b/hw/bsp/rw61x/family.c
new file mode 100644
index 000000000..226956f15
--- /dev/null
+++ b/hw/bsp/rw61x/family.c
@@ -0,0 +1,135 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ * Copyright (c) 2025, Gabriel Koppenstein
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: NXP
+*/
+
+#include "bsp/board_api.h"
+#include "fsl_device_registers.h"
+#include "fsl_gpio.h"
+#include "board.h"
+#include "fsl_usart.h"
+#include "fsl_clock.h"
+
+#include "pin_mux.h"
+#include "clock_config.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+
+void USB_IRQHandler(void) {
+  tusb_int_handler(1, true);
+}
+
+void board_init(void) {
+
+  // Init button pin, LED pins, SWD pins & UART pins
+  BOARD_InitBootPins();
+  
+  // Init Clocks
+  BOARD_InitBootClocks();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+#ifdef NEOPIXEL_PIN
+  // No neo pixel support yet
+#endif
+
+#ifdef UART_DEV
+  // Enable UART when debug log is on
+  board_uart_init_clock();
+  usart_config_t uart_config;
+  USART_GetDefaultConfig(&uart_config);
+  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
+  uart_config.enableRx = true;
+  uart_config.enableTx = true;
+  USART_Init(UART_DEV, &uart_config, CLOCK_GetFlexCommClkFreq(LP_FLEXCOMM_INST));
+#endif
+
+  // USB Initialization
+  // Reset USB
+  RESET_PeripheralReset(kUSB_RST_SHIFT_RSTn);
+
+  // Enable USB Clock
+  CLOCK_EnableClock(kCLOCK_Usb);
+  
+  // Enable USB PHY 
+  CLOCK_EnableUsbhsPhyClock();
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  GPIO_PinWrite(LED_GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_GPIO
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BOARD_INITPINS_WAKEUP_BTN_PORT, BUTTON_PIN);
+#endif
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const* buf, int len) {
+#ifdef UART_DEV
+  USART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
+  return len;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+
+#endif
diff --git a/hw/bsp/rw61x/family.cmake b/hw/bsp/rw61x/family.cmake
new file mode 100644
index 000000000..5428b7e50
--- /dev/null
+++ b/hw/bsp/rw61x/family.cmake
@@ -0,0 +1,102 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
+set(CMSIS_5 ${TOP}/lib/CMSIS_5)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m33-nodsp-nofp CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS RW61X CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+
+set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
+    ${SDK_DIR}/drivers/common/fsl_common_arm.c
+    ${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
+    ${SDK_DIR}/drivers/flexcomm/usart/fsl_usart.c
+    ${SDK_DIR}/drivers/flexspi/fsl_flexspi.c
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_5}/CMSIS/Core/Include
+    ${SDK_DIR}/devices/${MCU_VARIANT}
+    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
+    ${SDK_DIR}/drivers
+    ${SDK_DIR}/drivers/common
+    ${SDK_DIR}/drivers/lpc_gpio
+    ${SDK_DIR}/drivers/flexcomm
+    ${SDK_DIR}/drivers/flexcomm/usart
+    ${SDK_DIR}/drivers/flexspi
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_RW61X)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+
+    # ChipIdea HS
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+
+    # Startup File
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+
+  # Add Board specific includes
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  # Linker Options
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs 
+      --specs=nano.specs
+      )
+  endif()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
+  # Handle Startup File Properties (Linting/Warnings)
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w
+    )
+
+  # Flashing & Binary Generation
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
\ No newline at end of file
diff --git a/hw/bsp/rw61x/family.mk b/hw/bsp/rw61x/family.mk
new file mode 100644
index 000000000..e715adfa8
--- /dev/null
+++ b/hw/bsp/rw61x/family.mk
@@ -0,0 +1,52 @@
+UF2_FAMILY_ID = 0x2abc77ec
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# Default to Highspeed PORT1
+PORT ?= 1
+
+CFLAGS += \
+  -flto \
+  -DBOARD_TUD_RHPORT=$(PORT) \
+  -DBOARD_TUH_RHPORT=$(PORT) \
+  -DSERIAL_PORT_TYPE_UART=1 \
+  -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \
+  -DBOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED	\
+  
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
+
+LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+
+# All source paths should be relative to the top level.
+LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
+
+SRC_C += \
+	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
+	src/portable/chipidea/ci_hs/hcd_ci_hs.c \
+	src/portable/ehci/ehci.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/system_$(MCU_CORE).c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers/fsl_power.c \
+	$(SDK_DIR)/drivers/lpc_gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/common/fsl_common_arm.c\
+	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
+	$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
+	$(SDK_DIR)/drivers/flexspi/fsl_flexspi.c \
+	
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT) \
+	$(TOP)/$(SDK_DIR)/devices/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(SDK_DIR)/drivers/ \
+	$(TOP)/$(SDK_DIR)/drivers/common\
+	$(TOP)/$(SDK_DIR)/drivers/lpc_gpio\
+	$(TOP)/$(SDK_DIR)/drivers/flexcomm \
+    $(TOP)/$(SDK_DIR)/drivers/flexcomm/usart \
+    $(TOP)/$(SDK_DIR)/drivers/flexspi \
+
+
+SRC_S += $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/startup_$(MCU_CORE).S
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index b5324a754..fe2895f6a 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -61,6 +61,9 @@ bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
 
 #include "ci_hs_lpc18_43.h"
 
+#elif TU_CHECK_MCU(OPT_MCU_RW61X)
+#include "ci_hs_rw61x.h"
+
 #else
 #error "Unsupported MCUs"
 #endif
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 0d9c1a8f1..17c2ab8b8 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -60,7 +60,7 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt'],
+                            'kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx rw61x imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                          'rp2040'],
@@ -246,7 +246,7 @@ deps_optional = {
                                'at32f413'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
-                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
+                    'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx rw61x mm32 msp432e4 nrf saml2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
                     'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba '
-- 
cgit v1.3.1


From 1583864e0b1379cc2f03717f1bed2429e5473407 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 15 Dec 2025 13:28:24 +0700
Subject: minor clean up

---
 README.rst                                    | 260 +++++++++++++-------------
 examples/host/bare_api/only.txt               |  15 +-
 examples/host/cdc_msc_hid/only.txt            |  15 +-
 examples/host/cdc_msc_hid_freertos/only.txt   |  13 +-
 examples/host/device_info/only.txt            |  13 +-
 examples/host/hid_controller/only.txt         |  15 +-
 examples/host/midi_rx/only.txt                |  13 +-
 examples/host/msc_file_explorer/only.txt      |  15 +-
 hw/bsp/stm32u5/family.mk                      |   6 +-
 src/device/usbd.c                             |   6 +-
 src/portable/st/stm32_fsdev/fsdev_common.c    |  16 +-
 src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c |  10 +-
 12 files changed, 211 insertions(+), 186 deletions(-)

(limited to 'hw')

diff --git a/README.rst b/README.rst
index 75f93f656..da1f49fcd 100644
--- a/README.rst
+++ b/README.rst
@@ -129,138 +129,134 @@ TinyUSB is completely thread-safe by pushing all Interrupt Service Request (ISR)
 Supported CPUs
 --------------
 
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Manufacturer | Family                      | Device | Host | Highspeed | Driver                 | Note                   |
-+==============+=============================+========+======+===========+========================+========================+
-| Allwinner    | F1C100s/F1C200s             | ✔      |      | ✔         | sunxi                  | musb variant           |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Analog       | MAX3421E                    |        | ✔    | ✖         | max3421                | via SPI                |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | MAX32 650, 666, 690,        | ✔      |      | ✔         | musb                   | 1-dir ep               |
-|              | MAX78002                    |        |      |           |                        |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Artery AT32  | F403a_407, F413             | ✔      |      |           | fsdev                  |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | F415, F435_437, F423, F425  | ✔      | ✔    |           | dwc2                   |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | F402_F405                   | ✔      | ✔    | ✔         | dwc2                   | F405 is HS             |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Bridgetek    | FT90x                       | ✔      |      | ✔         | ft9xx                  | 1-dir ep               |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Broadcom     | BCM2711, BCM2837            | ✔      |      | ✔         | dwc2                   |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Dialog       | DA1469x                     | ✔      | ✖    | ✖         | da146xx                |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Espressif    | S2, S3                      | ✔      | ✔    | ✖         | dwc2                   |                        |
-| ESP32        +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | P4                          | ✔      | ✔    | ✔         | dwc2                   |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | H4                          | ✔      | ✔    | ✖         | dwc2                   |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| GigaDevice   | GD32VF103                   | ✔      |      | ✖         | dwc2                   |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Infineon     | XMC4500                     | ✔      | ✔    | ✖         | dwc2                   |                        |
-+--------------+-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-| MicroChip    | SAM | D11, D21, L21, L22    | ✔      |      | ✖         | samd                   |                        |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | D51, E5x              | ✔      |      | ✖         | samd                   |                        |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | G55                   | ✔      |      | ✖         | samg                   | 1-dir ep               |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | E70,S70,V70,V71       | ✔      |      | ✔         | samx7x                 | 1-dir ep               |
-|              +-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-|              | PIC | 24                    | ✔      |      |           | pic                    | ci_fs variant          |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | 32 mm, mk, mx         | ✔      |      |           | pic                    | ci_fs variant          |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | dsPIC33               | ✔      |      |           | pic                    | ci_fs variant          |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | 32mz                  | ✔      |      |           | pic32mz                | musb variant           |
-+--------------+-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-| MindMotion   | mm32                        | ✔      |      | ✖         | mm32f327x_otg          | ci_fs variant          |
-+--------------+-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-| NordicSemi   | nRF 52833, 52840, 5340      | ✔      | ✖    | ✖         | nrf5x                  | only ep8 is IO         |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Nuvoton      | NUC120                      | ✔      | ✖    | ✖         | nuc120                 |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | NUC121/NUC125               | ✔      | ✖    | ✖         | nuc121                 |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | NUC126                      | ✔      | ✖    | ✖         | nuc121                 |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | NUC505                      | ✔      |      | ✔         | nuc505                 |                        |
-+--------------+---------+-------------------+--------+------+-----------+------------------------+------------------------+
-| NXP          | iMXRT   | RT 10xx, 11xx     | ✔      | ✔    | ✔         | ci_hs, ehci            |                        |
-|              +---------+-------------------+--------+------+-----------+------------------------+------------------------+
-|              | Kinetis | KL                | ✔      | ⚠    | ✖         | ci_fs, khci            |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | K32L2             | ✔      |      | ✖         | khci                   | ci_fs variant          |
-|              +---------+-------------------+--------+------+-----------+------------------------+------------------------+
-|              | LPC     | 11u, 13, 15       | ✔      | ✖    | ✖         | lpc_ip3511             |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | 17, 40            | ✔      | ⚠    | ✖         | lpc17_40, ohci         |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | 18, 43            | ✔      | ✔    | ✔         | ci_hs, ehci            |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | 51u               | ✔      | ✖    | ✖         | lpc_ip3511             |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | 54, 55            | ✔      |      | ✔         | lpc_ip3511             |                        |
-|              +---------+-------------------+--------+------+-----------+------------------------+------------------------+
-|              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs, ehci     |                        |
-|              |         +-------------------+--------+------+-----------+------------------------+------------------------+
-|              |         | A15               | ✔      |      |           | ci_fs                  |                        |
-+--------------+---------+-------------------+--------+------+-----------+------------------------+------------------------+
-| Raspberry Pi | RP2040, RP2350              | ✔      | ✔    | ✖         | rp2040, pio_usb        |                        |
-+--------------+-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-| Renesas      | RX  | 63N, 65N, 72N         | ✔      | ✔    | ✖         | rusb2                  |                        |
-|              +-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-|              | RA  | 4M1, 4M3, 6M1         | ✔      | ✔    | ✖         | rusb2                  |                        |
-|              |     +-----------------------+--------+------+-----------+------------------------+------------------------+
-|              |     | 6M5                   | ✔      | ✔    | ✔         | rusb2                  |                        |
-+--------------+-----+-----------------------+--------+------+-----------+------------------------+------------------------+
-| Silabs       | EFM32GG12                   | ✔      |      | ✖         | dwc2                   |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| Sony         | CXD56                       | ✔      | ✖    | ✔         | cxd56                  |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| ST STM32     | F0, F3, L0, L1, L5, WBx5    | ✔      | ✖    | ✖         | stm32_fsdev            |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | F1 | 102, 103               | ✔      | ✖    | ✖         | stm32_fsdev            |                        |
-|              |    +------------------------+--------+------+-----------+------------------------+------------------------+
-|              |    | 105, 107               | ✔      | ✔    | ✖         | dwc2                   |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | F2, F4, F7, H7, H7RS        | ✔      | ✔    | ✔         | dwc2                   |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | C0, G0, H5                  | ✔      | ✔    | ✖         | stm32_fsdev            | Host tested on C0, H5  |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | G4                          | ✔      | ✖    | ✖         | stm32_fsdev            |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | L4 | 4x2, 4x3               | ✔      | ✖    | ✖         | stm32_fsdev            |                        |
-|              |    +------------------------+--------+------+-----------+------------------------+------------------------+
-|              |    | 4x5, 4x6, 4+           | ✔      | ✔    | ✖         | dwc2                   |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | N6                          | ✔      | ✔    | ✔         | dwc2                   |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | U0                          | ✔      | ✖    | ✖         | stm32_fsdev            |                        |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | U3                          | ✔      | ✔    | ✖         | stm32_fsdev            | Host tested on C0, H5  |
-|              +----+------------------------+--------+------+-----------+------------------------+------------------------+
-|              | U5 | 535, 545               | ✔      | ✔    | ✖         | stm32_fsdev            | Host tested on C0, H5  |
-|              |    +------------------------+--------+------+-----------+------------------------+------------------------+
-|              |    | 575, 585               | ✔      | ✔    | ✖         | dwc2                   |                        |
-|              |    +------------------------+--------+------+-----------+------------------------+------------------------+
-|              |    | 59x,5Ax,5Fx,5Gx        | ✔      | ✔    | ✔         | dwc2                   |                        |
-+--------------+----+------------------------+--------+------+-----------+------------------------+------------------------+
-| TI           | MSP430                      | ✔      | ✖    | ✖         | msp430x5xx             |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | MSP432E4, TM4C123           | ✔      |      | ✖         | musb                   |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| ValentyUSB   | eptri                       | ✔      | ✖    | ✖         | eptri                  |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
-| WCH          | CH32F20x                    | ✔      |      | ✔         | ch32_usbhs             |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | CH32V20x                    | ✔      |      | ✖         | stm32_fsdev/ch32_usbfs |                        |
-|              +-----------------------------+--------+------+-----------+------------------------+------------------------+
-|              | CH32V305, CH32V307          | ✔      |      | ✔         | ch32_usbfs/hs          |                        |
-+--------------+-----------------------------+--------+------+-----------+------------------------+------------------------+
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Manufacturer | Family                      | Device | Host | Highspeed | Driver                 | Note               |
++==============+=============================+========+======+===========+========================+====================+
+| Allwinner    | F1C100s/F1C200s             | ✔      |      | ✔         | sunxi                  | musb variant       |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Analog       | MAX3421E                    |        | ✔    | ✖         | max3421                | via SPI            |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | MAX32 650, 666, 690,        | ✔      |      | ✔         | musb                   | 1-dir ep           |
+|              | MAX78002                    |        |      |           |                        |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Artery AT32  | F403a_407, F413             | ✔      |      |           | fsdev                  | Packet SRAM 512    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | F415, F435_437, F423, F425  | ✔      | ✔    |           | dwc2                   |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | F402_F405                   | ✔      | ✔    | ✔         | dwc2                   | F405 is HS         |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Bridgetek    | FT90x                       | ✔      |      | ✔         | ft9xx                  | 1-dir ep           |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Broadcom     | BCM2711, BCM2837            | ✔      |      | ✔         | dwc2                   |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Dialog       | DA1469x                     | ✔      | ✖    | ✖         | da146xx                |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Espressif    | S2, S3                      | ✔      | ✔    | ✖         | dwc2                   |                    |
+| ESP32        +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | P4                          | ✔      | ✔    | ✔         | dwc2                   |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | H4                          | ✔      | ✔    | ✖         | dwc2                   |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| GigaDevice   | GD32VF103                   | ✔      |      | ✖         | dwc2                   |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Infineon     | XMC4500                     | ✔      | ✔    | ✖         | dwc2                   |                    |
++--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+| MicroChip    | SAM | D11, D21, L21, L22    | ✔      |      | ✖         | samd                   |                    |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | D51, E5x              | ✔      |      | ✖         | samd                   |                    |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | G55                   | ✔      |      | ✖         | samg                   | 1-dir ep           |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | E70,S70,V70,V71       | ✔      |      | ✔         | samx7x                 | 1-dir ep           |
+|              +-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+|              | PIC | 24                    | ✔      |      |           | pic                    | ci_fs variant      |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | 32 mm, mk, mx         | ✔      |      |           | pic                    | ci_fs variant      |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | dsPIC33               | ✔      |      |           | pic                    | ci_fs variant      |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | 32mz                  | ✔      |      |           | pic32mz                | musb variant       |
++--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+| MindMotion   | mm32                        | ✔      |      | ✖         | mm32f327x_otg          | ci_fs variant      |
++--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+| NordicSemi   | nRF 52833, 52840, 5340      | ✔      | ✖    | ✖         | nrf5x                  | only ep8 is ISO    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Nuvoton      | NUC120                      | ✔      | ✖    | ✖         | nuc120                 |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | NUC121/NUC125, NUC126       | ✔      | ✖    | ✖         | nuc121                 |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | NUC505                      | ✔      |      | ✔         | nuc505                 |                    |
++--------------+---------+-------------------+--------+------+-----------+------------------------+--------------------+
+| NXP          | iMXRT   | RT 10xx, 11xx     | ✔      | ✔    | ✔         | ci_hs, ehci            |                    |
+|              +---------+-------------------+--------+------+-----------+------------------------+--------------------+
+|              | Kinetis | KL                | ✔      | ⚠    | ✖         | ci_fs, khci            |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | K32L2             | ✔      |      | ✖         | khci                   | ci_fs variant      |
+|              +---------+-------------------+--------+------+-----------+------------------------+--------------------+
+|              | LPC     | 11u, 13, 15       | ✔      | ✖    | ✖         | lpc_ip3511             |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | 17, 40            | ✔      | ⚠    | ✖         | lpc17_40, ohci         |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | 18, 43            | ✔      | ✔    | ✔         | ci_hs, ehci            |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | 51u               | ✔      | ✖    | ✖         | lpc_ip3511             |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | 54, 55            | ✔      |      | ✔         | lpc_ip3511             |                    |
+|              +---------+-------------------+--------+------+-----------+------------------------+--------------------+
+|              | MCX     | N9                | ✔      |      | ✔         | ci_fs, ci_hs, ehci     |                    |
+|              |         +-------------------+--------+------+-----------+------------------------+--------------------+
+|              |         | A15               | ✔      |      |           | ci_fs                  |                    |
++--------------+---------+-------------------+--------+------+-----------+------------------------+--------------------+
+| Raspberry Pi | RP2040, RP2350              | ✔      | ✔    | ✖         | rp2040, pio_usb        |                    |
++--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+| Renesas      | RX  | 63N, 65N, 72N         | ✔      | ✔    | ✖         | rusb2                  |                    |
+|              +-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+|              | RA  | 4M1, 4M3, 6M1         | ✔      | ✔    | ✖         | rusb2                  |                    |
+|              |     +-----------------------+--------+------+-----------+------------------------+--------------------+
+|              |     | 6M5                   | ✔      | ✔    | ✔         | rusb2                  |                    |
++--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
+| Silabs       | EFM32GG12                   | ✔      |      | ✖         | dwc2                   |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| Sony         | CXD56                       | ✔      | ✖    | ✔         | cxd56                  |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| ST STM32     | F0, F3, L0, L1, L5, WBx5    | ✔      | ✖    | ✖         | stm32_fsdev            |                    |
+|              +----+------------------------+--------+------+-----------+------------------------+--------------------+
+|              | F1 | 102, 103               | ✔      | ✖    | ✖         | stm32_fsdev            | Packet SRAM 512    |
+|              |    +------------------------+--------+------+-----------+------------------------+--------------------+
+|              |    | 105, 107               | ✔      | ✔    | ✖         | dwc2                   |                    |
+|              +----+------------------------+--------+------+-----------+------------------------+--------------------+
+|              | F2, F4, F7, H7, H7RS        | ✔      | ✔    | ✔         | dwc2                   |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | C0, G0, H5, U3              | ✔      | ✔    | ✖         | stm32_fsdev            | Packet SRAM 2KB    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | G4                          | ✔      | ✖    | ✖         | stm32_fsdev            | Packet SRAM 1KB    |
+|              +----+------------------------+--------+------+-----------+------------------------+--------------------+
+|              | L4 | 4x2, 4x3               | ✔      | ✖    | ✖         | stm32_fsdev            | Packet SRAM 1KB    |
+|              |    +------------------------+--------+------+-----------+------------------------+--------------------+
+|              |    | 4x5, 4x6, 4+           | ✔      | ✔    | ✖         | dwc2                   |                    |
+|              +----+------------------------+--------+------+-----------+------------------------+--------------------+
+|              | N6                          | ✔      | ✔    | ✔         | dwc2                   |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | U0                          | ✔      | ✖    | ✖         | stm32_fsdev            | Packet SRAM 1KB    |
+|              +----+------------------------+--------+------+-----------+------------------------+--------------------+
+|              | U5 | 535, 545               | ✔      | ✔    | ✖         | stm32_fsdev            | Packet SRAM 2KB    |
+|              |    +------------------------+--------+------+-----------+------------------------+--------------------+
+|              |    | 575, 585               | ✔      | ✔    | ✖         | dwc2                   |                    |
+|              |    +------------------------+--------+------+-----------+------------------------+--------------------+
+|              |    | 59x,5Ax,5Fx,5Gx        | ✔      | ✔    | ✔         | dwc2                   |                    |
++--------------+----+------------------------+--------+------+-----------+------------------------+--------------------+
+| TI           | MSP430                      | ✔      | ✖    | ✖         | msp430x5xx             |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | MSP432E4, TM4C123           | ✔      |      | ✖         | musb                   |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| ValentyUSB   | eptri                       | ✔      | ✖    | ✖         | eptri                  |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
+| WCH          | CH32F20x                    | ✔      |      | ✔         | ch32_usbhs             |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | CH32V20x                    | ✔      |      | ✖         | stm32_fsdev/ch32_usbfs |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | CH32V305, CH32V307          | ✔      |      | ✔         | ch32_usbfs/hs          |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
 
 Table Legend
 ^^^^^^^^^^^^
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 4cd457879..52e51242c 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -1,3 +1,5 @@
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
 mcu:KINETIS_KL
 mcu:LPC175X_6X
@@ -5,20 +7,21 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT1XXX
+mcu:MAX3421
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
-mcu:RP2040
+mcu:MIMXRT1XXX
 mcu:MSP432E4
-mcu:RX65X
 mcu:RAXXX
-mcu:MAX3421
+mcu:RP2040
+mcu:RX65X
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 4cd457879..52e51242c 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -1,3 +1,5 @@
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
 mcu:KINETIS_KL
 mcu:LPC175X_6X
@@ -5,20 +7,21 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT1XXX
+mcu:MAX3421
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
-mcu:RP2040
+mcu:MIMXRT1XXX
 mcu:MSP432E4
-mcu:RX65X
 mcu:RAXXX
-mcu:MAX3421
+mcu:RP2040
+mcu:RX65X
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index 2322d4ecf..4cff741c3 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -1,21 +1,24 @@
+family:espressif
+family:samd21
+family:samd5x_e5x
 mcu:LPC175X_6X
 mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT1XXX
+mcu:MAX3421
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:MIMXRT1XXX
 mcu:MSP432E4
 mcu:RX65X
-mcu:MAX3421
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:espressif
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 5b68f0774..becc8252d 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -1,3 +1,6 @@
+family:espressif
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
 mcu:KINETIS_KL
 mcu:LPC175X_6X
@@ -6,20 +9,20 @@ mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
 mcu:MAX3421
-mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:MIMXRT1XXX
 mcu:MSP432E4
+mcu:RAXXX
 mcu:RP2040
 mcu:RX65X
-mcu:RAXXX
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:espressif
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/hid_controller/only.txt b/examples/host/hid_controller/only.txt
index b859b4cc0..35b7c2361 100644
--- a/examples/host/hid_controller/only.txt
+++ b/examples/host/hid_controller/only.txt
@@ -1,3 +1,5 @@
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
 mcu:KINETIS_KL
 mcu:LPC175X_6X
@@ -5,19 +7,20 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT1XXX
+mcu:MAX3421
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
-mcu:RP2040
+mcu:MIMXRT1XXX
 mcu:MSP432E4
-mcu:RX65X
 mcu:RAXXX
-mcu:MAX3421
+mcu:RP2040
+mcu:RX65X
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index 09d725860..a3976f08d 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -1,7 +1,9 @@
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
+mcu:ESP32P4
 mcu:ESP32S2
 mcu:ESP32S3
-mcu:ESP32P4
 mcu:KINETIS_KL
 mcu:LPC175X_6X
 mcu:LPC177X_8X
@@ -9,19 +11,20 @@ mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
 mcu:MAX3421
-mcu:MIMXRT1XXX
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
+mcu:MIMXRT1XXX
 mcu:MSP432E4
+mcu:RAXXX
 mcu:RP2040
 mcu:RX65X
-mcu:RAXXX
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 4cd457879..52e51242c 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -1,3 +1,5 @@
+family:samd21
+family:samd5x_e5x
 mcu:CH32V20X
 mcu:KINETIS_KL
 mcu:LPC175X_6X
@@ -5,20 +7,21 @@ mcu:LPC177X_8X
 mcu:LPC18XX
 mcu:LPC40XX
 mcu:LPC43XX
-mcu:MIMXRT1XXX
+mcu:MAX3421
 mcu:MIMXRT10XX
 mcu:MIMXRT11XX
-mcu:RP2040
+mcu:MIMXRT1XXX
 mcu:MSP432E4
-mcu:RX65X
 mcu:RAXXX
-mcu:MAX3421
+mcu:RP2040
+mcu:RX65X
 mcu:STM32C0
 mcu:STM32F4
 mcu:STM32F7
+mcu:STM32G0
 mcu:STM32H5
 mcu:STM32H7
 mcu:STM32H7RS
 mcu:STM32N6
-family:samd21
-family:samd5x_e5x
+mcu:STM32U3
+mcu:STM32U5
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 79f181a68..47aed10a9 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -37,11 +37,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
 
-ifeq ($(MCU_VARIANT),stm32u545xx)
-SRC_C += \
-	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
-	src/portable/st/stm32_fsdev/fsdev_common.c
-else ifeq ($(MCU_VARIANT),stm32u535xx)
+ifneq ($(filter stm32u545xx stm32u535xx,$(MCU_VARIANT)),)
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
 	src/portable/st/stm32_fsdev/fsdev_common.c
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 5365ae2c2..1a9eb630c 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -574,6 +574,8 @@ bool tud_deinit(uint8_t rhport) {
 
   TU_LOG_USBD("USBD deinit on controller %u\r\n", rhport);
 
+  const uint8_t cfg_num = _usbd_dev.cfg_num;
+
   // Deinit device controller driver
   dcd_int_disable(rhport);
   dcd_disconnect(rhport);
@@ -604,7 +606,9 @@ bool tud_deinit(uint8_t rhport) {
 
   _usbd_rhport = RHPORT_INVALID;
 
-  tud_umount_cb();
+  if (cfg_num > 0) {
+    tud_umount_cb();
+  }
 
   return true;
 }
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 60ef339a6..5d60ad9a2 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -78,7 +78,9 @@ void fsdev_deinit(void) {
 // - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
 // - Uses unaligned for RAM (since M0 cannot access unaligned address)
 bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
+  if (nbytes == 0) {
+    return true;
+  }
   uint32_t n_write = nbytes / FSDEV_BUS_SIZE;
 
   fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(dst);
@@ -107,7 +109,9 @@ bool fsdev_write_packet_memory(uint16_t dst, const void *__restrict src, uint16_
 // - Packet memory must be either strictly 16-bit or 32-bit depending on FSDEV_BUS_32BIT
 // - Uses unaligned for RAM (since M0 cannot access unaligned address)
 bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbytes) {
-  if (nbytes == 0) return true;
+  if (nbytes == 0) {
+    return true;
+  }
   uint32_t n_read = nbytes / FSDEV_BUS_SIZE;
 
   fsdev_pma_buf_t* pma_buf = PMA_BUF_AT(src);
@@ -134,7 +138,9 @@ bool fsdev_read_packet_memory(void *__restrict dst, uint16_t src, uint16_t nbyte
 
 // Write to PMA from FIFO
 bool fsdev_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes) {
-  if (wNBytes == 0) return true;
+  if (wNBytes == 0) {
+    return true;
+  }
 
   // Since we copy from a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   tu_fifo_buffer_info_t info;
@@ -183,7 +189,9 @@ bool fsdev_write_packet_memory_ff(tu_fifo_t *ff, uint16_t dst, uint16_t wNBytes)
 
 // Read from PMA to FIFO
 bool fsdev_read_packet_memory_ff(tu_fifo_t *ff, uint16_t src, uint16_t wNBytes) {
-  if (wNBytes == 0) return true;
+  if (wNBytes == 0) {
+    return true;
+  }
 
   // Since we copy into a ring buffer FIFO, a wrap might occur making it necessary to conduct two copies
   // Check for first linear part
diff --git a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
index 212f620ac..da9c6961c 100644
--- a/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
@@ -28,11 +28,11 @@
  * This driver provides USB Host controller support for STM32 MCUs with "USB A"/"PCD"/"HCD" peripheral.
  * This covers these MCU families:
  *
- * C0                             2048 byte buffer; 32-bit bus; host mode
- * G0                             2048 byte buffer; 32-bit bus; host mode
- * U3                             2048 byte buffer; 32-bit bus; host mode
- * H5                             2048 byte buffer; 32-bit bus; host mode
- * U535, U545                     2048 byte buffer; 32-bit bus; host mode
+ * C0           2048 byte buffer; 32-bit bus; host mode
+ * G0           2048 byte buffer; 32-bit bus; host mode
+ * U3           2048 byte buffer; 32-bit bus; host mode
+ * H5           2048 byte buffer; 32-bit bus; host mode
+ * U535, U545   2048 byte buffer; 32-bit bus; host mode
  *
  */
 
-- 
cgit v1.3.1


From ba3319d90d546143d169b398166b457082ad21d4 Mon Sep 17 00:00:00 2001
From: Zhihong Chen <zhihong.chen@hpmicro.com>
Date: Mon, 8 Dec 2025 13:59:21 +0800
Subject: support hpmicro chips

Signed-off-by: Zhihong Chen <zhihong.chen@hpmicro.com>
---
 hw/bsp/hpmicro/boards/hpm6750evk2/board.c     | 295 +++++++++
 hw/bsp/hpmicro/boards/hpm6750evk2/board.cmake |  22 +
 hw/bsp/hpmicro/boards/hpm6750evk2/board.h     | 105 ++++
 hw/bsp/hpmicro/boards/hpm6750evk2/board.mk    |  16 +
 hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.c    | 862 ++++++++++++++++++++++++++
 hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.h    |  89 +++
 hw/bsp/hpmicro/family.c                       | 115 ++++
 hw/bsp/hpmicro/family.cmake                   | 131 ++++
 hw/bsp/hpmicro/family.mk                      |  76 +++
 src/common/tusb_mcu.h                         |  12 +
 src/portable/chipidea/ci_hs/ci_hs_hpm.h       |  54 ++
 src/portable/chipidea/ci_hs/dcd_ci_hs.c       |  14 +-
 src/portable/chipidea/ci_hs/hcd_ci_hs.c       |   8 +
 src/portable/ehci/ehci.c                      |  12 +
 src/tusb_option.h                             |   3 +
 tools/get_deps.py                             |   3 +
 16 files changed, 1816 insertions(+), 1 deletion(-)
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/board.c
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/board.cmake
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/board.h
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/board.mk
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.c
 create mode 100644 hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.h
 create mode 100644 hw/bsp/hpmicro/family.c
 create mode 100644 hw/bsp/hpmicro/family.cmake
 create mode 100644 hw/bsp/hpmicro/family.mk
 create mode 100644 src/portable/chipidea/ci_hs/ci_hs_hpm.h

(limited to 'hw')

diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/board.c b/hw/bsp/hpmicro/boards/hpm6750evk2/board.c
new file mode 100644
index 000000000..c281356e3
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/board.c
@@ -0,0 +1,295 @@
+/*
+ * Copyright (c) 2025 HPMicro
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#include "board.h"
+#include "pinmux.h"
+#include "hpm_pmp_drv.h"
+#include "hpm_pllctl_drv.h"
+#include "hpm_clock_drv.h"
+#include "hpm_sysctl_drv.h"
+#include "hpm_pcfg_drv.h"
+#include "hpm_uart_drv.h"
+#include "hpm_gpio_drv.h"
+
+/**
+ * @brief FLASH configuration option definitions:
+ * option[0]:
+ *    [31:16] 0xfcf9 - FLASH configuration option tag
+ *    [15:4]  0 - Reserved
+ *    [3:0]   option words (exclude option[0])
+ * option[1]:
+ *    [31:28] Flash probe type
+ *      0 - SFDP SDR / 1 - SFDP DDR
+ *      2 - 1-4-4 Read (0xEB, 24-bit address) / 3 - 1-2-2 Read(0xBB, 24-bit address)
+ *      4 - HyperFLASH 1.8V / 5 - HyperFLASH 3V
+ *      6 - OctaBus DDR (SPI -> OPI DDR)
+ *      8 - Xccela DDR (SPI -> OPI DDR)
+ *      10 - EcoXiP DDR (SPI -> OPI DDR)
+ *    [27:24] Command Pads after Power-on Reset
+ *      0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
+ *    [23:20] Command Pads after Configuring FLASH
+ *      0 - SPI / 1 - DPI / 2 - QPI / 3 - OPI
+ *    [19:16] Quad Enable Sequence (for the device support SFDP 1.0 only)
+ *      0 - Not needed
+ *      1 - QE bit is at bit 6 in Status Register 1
+ *      2 - QE bit is at bit1 in Status Register 2
+ *      3 - QE bit is at bit7 in Status Register 2
+ *      4 - QE bit is at bit1 in Status Register 2 and should be programmed by 0x31
+ *    [15:8] Dummy cycles
+ *      0 - Auto-probed / detected / default value
+ *      Others - User specified value, for DDR read, the dummy cycles should be 2 * cycles on FLASH datasheet
+ *    [7:4] Misc.
+ *      0 - Not used
+ *      1 - SPI mode
+ *      2 - Internal loopback
+ *      3 - External DQS
+ *    [3:0] Frequency option
+ *      1 - 30MHz / 2 - 50MHz / 3 - 66MHz / 4 - 80MHz / 5 - 100MHz / 6 - 120MHz / 7 - 133MHz / 8 - 166MHz
+ *
+ * option[2] (Effective only if the bit[3:0] in option[0] > 1)
+ *    [31:20]  Reserved
+ *    [19:16] IO voltage
+ *      0 - 3V / 1 - 1.8V
+ *    [15:12] Pin group
+ *      0 - 1st group / 1 - 2nd group
+ *    [11:8] Connection selection
+ *      0 - CA_CS0 / 1 - CB_CS0 / 2 - CA_CS0 + CB_CS0 (Two FLASH connected to CA and CB respectively)
+ *    [7:0] Drive Strength
+ *      0 - Default value
+ * option[3] (Effective only if the bit[3:0] in option[0] > 2, required only for the QSPI NOR FLASH that not supports
+ *              JESD216)
+ *    [31:16] reserved
+ *    [15:12] Sector Erase Command Option, not required here
+ *    [11:8]  Sector Size Option, not required here
+ *    [7:0] Flash Size Option
+ *      0 - 4MB / 1 - 8MB / 2 - 16MB
+ */
+#if defined(FLASH_XIP) && FLASH_XIP
+__attribute__ ((section(".nor_cfg_option"), used)) const uint32_t option[4] = {0xfcf90002, 0x00000007, 0xE, 0x0};
+#endif
+
+#if defined(FLASH_UF2) && FLASH_UF2
+ATTR_PLACE_AT(".uf2_signature") __attribute__((used)) const uint32_t uf2_signature = BOARD_UF2_SIGNATURE;
+#endif
+
+
+/* static function declarations */
+static void board_turnoff_rgb_led(void);
+static void init_uart_pins(UART_Type *ptr);
+static uint32_t board_init_uart_clock(UART_Type *ptr);
+static void init_gpio_pins(void);
+static void init_usb_pins(USB_Type *ptr);
+
+/* extern function definitions */
+void board_init_clock(void)
+{
+    uint32_t cpu0_freq = clock_get_frequency(clock_cpu0);
+    if (cpu0_freq == PLLCTL_SOC_PLL_REFCLK_FREQ) {
+        /* Configure the External OSC ramp-up time: ~9ms */
+        pllctl_xtal_set_rampup_time(HPM_PLLCTL, 32UL * 1000UL * 9U);
+
+        /* Select clock setting preset1 */
+        sysctl_clock_set_preset(HPM_SYSCTL, sysctl_preset_1);
+    }
+
+    /* Add clocks to group 0 */
+    clock_add_to_group(clock_cpu0, 0);
+    clock_add_to_group(clock_mchtmr0, 0);
+    clock_add_to_group(clock_axi0, 0);
+    clock_add_to_group(clock_axi1, 0);
+    clock_add_to_group(clock_axi2, 0);
+    clock_add_to_group(clock_ahb, 0);
+    clock_add_to_group(clock_xdma, 0);
+    clock_add_to_group(clock_hdma, 0);
+    clock_add_to_group(clock_xpi0, 0);
+    clock_add_to_group(clock_xpi1, 0);
+    clock_add_to_group(clock_ram0, 0);
+    clock_add_to_group(clock_ram1, 0);
+    clock_add_to_group(clock_lmm0, 0);
+    clock_add_to_group(clock_lmm1, 0);
+    clock_add_to_group(clock_gpio, 0);
+    clock_add_to_group(clock_mot0, 0);
+    clock_add_to_group(clock_mot1, 0);
+    clock_add_to_group(clock_mot2, 0);
+    clock_add_to_group(clock_mot3, 0);
+    clock_add_to_group(clock_synt, 0);
+    clock_add_to_group(clock_ptpc, 0);
+    /* Connect Group0 to CPU0 */
+    clock_connect_group_to_cpu(0, 0);
+
+    /* Add clocks to Group1 */
+    clock_add_to_group(clock_cpu1, 1);
+    clock_add_to_group(clock_mchtmr1, 1);
+    /* Connect Group1 to CPU1 */
+    clock_connect_group_to_cpu(1, 1);
+
+    /* Bump up DCDC voltage to 1275mv */
+    pcfg_dcdc_set_voltage(HPM_PCFG, 1275);
+    pcfg_dcdc_switch_to_dcm_mode(HPM_PCFG);
+
+    if (status_success != pllctl_init_int_pll_with_freq(HPM_PLLCTL, 0, BOARD_CPU_FREQ)) {
+        printf("Failed to set pll0_clk0 to %ldHz\n", BOARD_CPU_FREQ);
+        while (1) {
+        }
+    }
+
+    clock_set_source_divider(clock_cpu0, clk_src_pll0_clk0, 1);
+    clock_set_source_divider(clock_cpu1, clk_src_pll0_clk0, 1);
+    clock_update_core_clock();
+
+    clock_set_source_divider(clock_ahb, clk_src_pll1_clk1, 2); /*200m hz*/
+    clock_set_source_divider(clock_mchtmr0, clk_src_osc24m, 1);
+    clock_set_source_divider(clock_mchtmr1, clk_src_osc24m, 1);
+}
+
+void board_init_pmp(void)
+{
+    uint32_t start_addr;
+    uint32_t end_addr;
+    uint32_t length;
+    pmp_entry_t pmp_entry[16] = {0};
+    uint8_t index = 0;
+
+    /* Init noncachable memory */
+    extern uint32_t __noncacheable_start__[];
+    extern uint32_t __noncacheable_end__[];
+    start_addr = (uint32_t) __noncacheable_start__;
+    end_addr = (uint32_t) __noncacheable_end__;
+    length = end_addr - start_addr;
+    if (length > 0) {
+        /* Ensure the address and the length are power of 2 aligned */
+        assert((length & (length - 1U)) == 0U);
+        assert((start_addr & (length - 1U)) == 0U);
+        pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
+        pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
+        pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
+        pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
+        index++;
+    }
+
+    /* Init share memory */
+    extern uint32_t __share_mem_start__[];
+    extern uint32_t __share_mem_end__[];
+    start_addr = (uint32_t)__share_mem_start__;
+    end_addr = (uint32_t)__share_mem_end__;
+    length = end_addr - start_addr;
+    if (length > 0) {
+        /* Ensure the address and the length are power of 2 aligned */
+        assert((length & (length - 1U)) == 0U);
+        assert((start_addr & (length - 1U)) == 0U);
+        pmp_entry[index].pmp_addr = PMP_NAPOT_ADDR(start_addr, length);
+        pmp_entry[index].pmp_cfg.val = PMP_CFG(READ_EN, WRITE_EN, EXECUTE_EN, ADDR_MATCH_NAPOT, REG_UNLOCK);
+        pmp_entry[index].pma_addr = PMA_NAPOT_ADDR(start_addr, length);
+        pmp_entry[index].pma_cfg.val = PMA_CFG(ADDR_MATCH_NAPOT, MEM_TYPE_MEM_NON_CACHE_BUF, AMO_EN);
+        index++;
+    }
+
+    pmp_config(&pmp_entry[0], index);
+}
+
+void board_init_console(void)
+{
+    uart_config_t config = {0};
+    uint32_t freq;
+
+    /* uart needs to configure pin function before enabling clock, otherwise the level change of
+    uart rx pin when configuring pin function will cause a wrong data to be received.
+    And a uart rx dma request will be generated by default uart fifo dma trigger level. */
+    init_uart_pins((UART_Type *) BOARD_CONSOLE_UART_BASE);
+
+    freq = board_init_uart_clock((UART_Type *)BOARD_CONSOLE_UART_BASE);
+
+    uart_default_config((UART_Type *)BOARD_CONSOLE_UART_BASE, &config);
+    config.src_freq_in_hz = freq;
+    config.baudrate = BOARD_CONSOLE_UART_BAUDRATE;
+    uart_init((UART_Type *)BOARD_CONSOLE_UART_BASE, &config);
+}
+
+void board_init_gpio_pins(void)
+{
+    init_gpio_pins();
+}
+
+void board_init_led_pins(void)
+{
+    board_turnoff_rgb_led();
+    init_led_pins_as_gpio();
+    gpio_set_pin_output_with_initial(BOARD_R_GPIO_CTRL, BOARD_R_GPIO_INDEX, BOARD_R_GPIO_PIN, BOARD_LED_OFF_LEVEL);
+    gpio_set_pin_output_with_initial(BOARD_G_GPIO_CTRL, BOARD_G_GPIO_INDEX, BOARD_G_GPIO_PIN, BOARD_LED_OFF_LEVEL);
+    gpio_set_pin_output_with_initial(BOARD_B_GPIO_CTRL, BOARD_B_GPIO_INDEX, BOARD_B_GPIO_PIN, BOARD_LED_OFF_LEVEL);
+}
+
+void board_init_usb(USB_Type *ptr)
+{
+    clock_name_t usb_clk = (ptr == HPM_USB0) ? clock_usb0 : clock_usb1;
+
+    init_usb_pins(ptr);
+    clock_add_to_group(usb_clk, 0);
+}
+
+/* static function definitions */
+static void board_turnoff_rgb_led(void)
+{
+    uint32_t pad_ctl = IOC_PAD_PAD_CTL_PE_SET(1) | IOC_PAD_PAD_CTL_PS_SET(BOARD_LED_OFF_LEVEL);
+    HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = IOC_PB11_FUNC_CTL_GPIO_B_11;
+    HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PB12_FUNC_CTL_GPIO_B_12;
+    HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PB13_FUNC_CTL_GPIO_B_13;
+
+    HPM_IOC->PAD[IOC_PAD_PB11].PAD_CTL = pad_ctl;
+    HPM_IOC->PAD[IOC_PAD_PB12].PAD_CTL = pad_ctl;
+    HPM_IOC->PAD[IOC_PAD_PB13].PAD_CTL = pad_ctl;
+}
+
+static void init_uart_pins(UART_Type *ptr)
+{
+    if (ptr == HPM_UART0) {
+        init_uart0_pins();
+    } else if (ptr == HPM_UART2) {
+        init_uart2_pins();
+    } else if (ptr == HPM_UART13) {
+        init_uart13_pins();
+    } else if (ptr == HPM_PUART) {
+        init_puart_pins();
+    }
+}
+
+static uint32_t board_init_uart_clock(UART_Type *ptr)
+{
+    uint32_t freq = 0U;
+    if (ptr == HPM_UART0) {
+        clock_add_to_group(clock_uart0, 0);
+        freq = clock_get_frequency(clock_uart0);
+    } else if (ptr == HPM_UART6) {
+        clock_add_to_group(clock_uart6, 0);
+        freq = clock_get_frequency(clock_uart6);
+    } else if (ptr == HPM_UART13) {
+        clock_add_to_group(clock_uart13, 0);
+        freq = clock_get_frequency(clock_uart13);
+    } else if (ptr == HPM_UART14) {
+        clock_add_to_group(clock_uart14, 0);
+        freq = clock_get_frequency(clock_uart14);
+    } else {
+        /* Not supported */
+    }
+    return freq;
+}
+
+static void init_gpio_pins(void)
+{
+    init_gpio_pins_with_pull_up();
+#ifdef USING_GPIO0_FOR_GPIOZ
+    init_gpio_pins_using_gpio0();
+#endif
+}
+
+static void init_usb_pins(USB_Type *ptr)
+{
+    if (ptr == HPM_USB0) {
+        init_usb0_pins();
+    } else if (ptr == HPM_USB1) {
+        init_usb1_pins();
+    }
+}
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/board.cmake b/hw/bsp/hpmicro/boards/hpm6750evk2/board.cmake
new file mode 100644
index 000000000..b15911cb5
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/board.cmake
@@ -0,0 +1,22 @@
+set(MCU_VARIANT HPM6750xVMx)
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+set(JLINK_IF jtag)
+
+set(HPM_SOC ${SDK_DIR}/soc/HPM6700/HPM6750)
+set(HPM_IP_REGS ${SDK_DIR}/soc/HPM6700/ip)
+
+set(BOARD_FLASH_SIZE 16M)
+set(BOARD_STACK_SIZE 16K)
+set(BOARD_HEAP_SIZE 16K)
+
+set(HPM_PLLCTL_DRV_FILE hpm_pllctl_drv.c)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    BOARD_TUD_RHPORT=0
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    BOARD_TUH_RHPORT=1
+    BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+endfunction()
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/board.h b/hw/bsp/hpmicro/boards/hpm6750evk2/board.h
new file mode 100644
index 000000000..0636a4722
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/board.h
@@ -0,0 +1,105 @@
+/*
+ * Copyright (c) 2021-2025 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ */
+
+#ifndef _HPM_BOARD_H
+#define _HPM_BOARD_H
+
+#include <stdio.h>
+#include "hpm_common.h"
+#include "hpm_soc.h"
+#include "hpm_soc_feature.h"
+#include "pinmux.h"
+
+#define BOARD_NAME          "hpm6750evk2"
+
+#ifndef BOARD_RUNNING_CORE
+#define BOARD_RUNNING_CORE HPM_CORE0
+#endif
+
+#define BOARD_CPU_FREQ (816000000UL)
+
+/* console section */
+#if BOARD_RUNNING_CORE == HPM_CORE0
+    #define BOARD_CONSOLE_UART_BASE       HPM_UART0
+    #define BOARD_CONSOLE_UART_CLK_NAME   clock_uart0
+    #define BOARD_CONSOLE_UART_IRQ        IRQn_UART0
+    #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART0_TX
+    #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART0_RX
+#else
+    #define BOARD_CONSOLE_UART_BASE       HPM_UART13
+    #define BOARD_CONSOLE_UART_CLK_NAME   clock_uart13
+    #define BOARD_CONSOLE_UART_IRQ        IRQn_UART13
+    #define BOARD_CONSOLE_UART_TX_DMA_REQ HPM_DMA_SRC_UART13_TX
+    #define BOARD_CONSOLE_UART_RX_DMA_REQ HPM_DMA_SRC_UART13_RX
+#endif
+
+#define BOARD_CONSOLE_UART_BAUDRATE (115200UL)
+
+/* sdram section */
+#define BOARD_SDRAM_ADDRESS          (0x40000000UL)
+#define BOARD_SDRAM_SIZE             (32 * SIZE_1MB)
+#define BOARD_SDRAM_CS               FEMC_SDRAM_CS0
+#define BOARD_SDRAM_PORT_SIZE        FEMC_SDRAM_PORT_SIZE_32_BITS
+#define BOARD_SDRAM_COLUMN_ADDR_BITS FEMC_SDRAM_COLUMN_ADDR_9_BITS
+#define BOARD_SDRAM_REFRESH_COUNT    (8192UL)
+#define BOARD_SDRAM_REFRESH_IN_MS    (64UL)
+
+#define BOARD_FLASH_BASE_ADDRESS (0x80000000UL)
+#define BOARD_FLASH_SIZE         (16 << 20)
+
+/* gpio section */
+#define BOARD_R_GPIO_CTRL  HPM_GPIO0
+#define BOARD_R_GPIO_INDEX GPIO_DI_GPIOB
+#define BOARD_R_GPIO_PIN   11
+#define BOARD_G_GPIO_CTRL  HPM_GPIO0
+#define BOARD_G_GPIO_INDEX GPIO_DI_GPIOB
+#define BOARD_G_GPIO_PIN   12
+#define BOARD_B_GPIO_CTRL  HPM_GPIO0
+#define BOARD_B_GPIO_INDEX GPIO_DI_GPIOB
+#define BOARD_B_GPIO_PIN   13
+
+#define BOARD_LED_GPIO_CTRL HPM_GPIO0
+
+#define BOARD_LED_GPIO_INDEX GPIO_DI_GPIOB
+#define BOARD_LED_GPIO_PIN   12
+#define BOARD_LED_OFF_LEVEL  0
+#define BOARD_LED_ON_LEVEL   1
+
+#define BOARD_LED_TOGGLE_RGB 1
+
+#define BOARD_APP_GPIO_INDEX GPIO_DI_GPIOZ
+#define BOARD_APP_GPIO_PIN   2
+#define BOARD_BUTTON_PRESSED_VALUE 0
+
+#define USING_GPIO0_FOR_GPIOZ
+#ifndef USING_GPIO0_FOR_GPIOZ
+#define BOARD_APP_GPIO_CTRL HPM_BGPIO
+#define BOARD_APP_GPIO_IRQ  IRQn_BGPIO
+#else
+#define BOARD_APP_GPIO_CTRL HPM_GPIO0
+#define BOARD_APP_GPIO_IRQ  IRQn_GPIO0_Z
+#endif
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+
+void board_init_clock(void);
+void board_init_pmp(void);
+void board_init_console(void);
+void board_init_gpio_pins(void);
+void board_init_led_pins(void);
+void board_init_usb(USB_Type *ptr);
+void board_print_banner(void);
+void board_print_clock_freq(void);
+
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus */
+#endif /* _HPM_BOARD_H */
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/board.mk b/hw/bsp/hpmicro/boards/hpm6750evk2/board.mk
new file mode 100644
index 000000000..26981ce28
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/board.mk
@@ -0,0 +1,16 @@
+MCU_VARIANT = HPM6750xVMx
+JLINK_DEVICE = ${MCU_VARIANT}
+
+JLINK_IF = jtag
+
+HPM_SOC = $(SDK_DIR)/soc/HPM6700/HPM6750
+HPM_IP_REGS = $(SDK_DIR)/soc/HPM6700/ip
+
+BOARD_FLASH_SIZE = 16M
+BOARD_STACK_SIZE = 16K
+BOARD_HEAP_SIZE = 16K
+
+BOARD_TUD_RHPORT = 0
+BOARD_TUH_RHPORT = 1
+
+HPM_PLLCTL_DRV_FILE = hpm_pllctl_drv.c
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.c b/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.c
new file mode 100644
index 000000000..7554e3a76
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.c
@@ -0,0 +1,862 @@
+
+/*
+ * Copyright (c) 2025 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ *
+ * Automatically generated by HPM Pinmux Tool
+ *
+ *
+ * Note:
+ * PY and PZ IOs: if any SOC pin function needs to be routed to these IOs,
+ * besides of IOC, PIOC/BIOC needs to be configured SOC_GPIO_X_xx, so that
+ * expected SoC function can be enabled on these IOs.
+ */
+
+#include "pinmux.h"
+#include "board.h"
+#include "hpm_trgm_drv.h"
+
+
+/* PY port IO needs to configure PIOC as well */
+void init_uart0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PY07].FUNC_CTL = IOC_PY07_FUNC_CTL_UART0_RXD;
+    HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = PIOC_PY07_FUNC_CTL_SOC_PY_07;
+
+    HPM_IOC->PAD[IOC_PAD_PY06].FUNC_CTL = IOC_PY06_FUNC_CTL_UART0_TXD;
+    HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = PIOC_PY06_FUNC_CTL_SOC_PY_06;
+}
+
+void init_uart2_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE16].FUNC_CTL = IOC_PE16_FUNC_CTL_UART2_TXD;
+
+    HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PE21_FUNC_CTL_UART2_RXD;
+}
+
+/* PZ port IO needs to configure BIOC as well */
+void init_uart13_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ08].FUNC_CTL = IOC_PZ08_FUNC_CTL_UART13_RXD;
+    HPM_BIOC->PAD[IOC_PAD_PZ08].FUNC_CTL = BIOC_PZ08_FUNC_CTL_SOC_PZ_08;
+
+    HPM_IOC->PAD[IOC_PAD_PZ09].FUNC_CTL = IOC_PZ09_FUNC_CTL_UART13_TXD;
+    HPM_BIOC->PAD[IOC_PAD_PZ09].FUNC_CTL = BIOC_PZ09_FUNC_CTL_SOC_PZ_09;
+}
+
+void init_puart_pins(void)
+{
+    HPM_PIOC->PAD[IOC_PAD_PY06].FUNC_CTL = PIOC_PY06_FUNC_CTL_PUART_TXD;
+
+    HPM_PIOC->PAD[IOC_PAD_PY07].FUNC_CTL = PIOC_PY07_FUNC_CTL_PUART_RXD;
+}
+
+/*
+ * PZ port IO needs to configure BIOC as well.
+ * PZ08 and PZ09 need pull up.
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_uart13_pins_as_gpio(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ08].FUNC_CTL = IOC_PZ08_FUNC_CTL_GPIO_Z_08;
+    HPM_BIOC->PAD[IOC_PAD_PZ08].FUNC_CTL = BIOC_PZ08_FUNC_CTL_SOC_PZ_08;
+    HPM_IOC->PAD[IOC_PAD_PZ08].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PZ09].FUNC_CTL = IOC_PZ09_FUNC_CTL_GPIO_Z_09;
+    HPM_BIOC->PAD[IOC_PAD_PZ09].FUNC_CTL = BIOC_PZ09_FUNC_CTL_SOC_PZ_09;
+}
+
+void init_lcd0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB03].FUNC_CTL = IOC_PB03_FUNC_CTL_DIS0_R_0;
+
+    HPM_IOC->PAD[IOC_PAD_PB04].FUNC_CTL = IOC_PB04_FUNC_CTL_DIS0_R_1;
+
+    HPM_IOC->PAD[IOC_PAD_PB00].FUNC_CTL = IOC_PB00_FUNC_CTL_DIS0_R_2;
+
+    HPM_IOC->PAD[IOC_PAD_PA31].FUNC_CTL = IOC_PA31_FUNC_CTL_DIS0_R_3;
+
+    HPM_IOC->PAD[IOC_PAD_PA26].FUNC_CTL = IOC_PA26_FUNC_CTL_DIS0_R_4;
+
+    HPM_IOC->PAD[IOC_PAD_PA21].FUNC_CTL = IOC_PA21_FUNC_CTL_DIS0_R_5;
+
+    HPM_IOC->PAD[IOC_PAD_PA27].FUNC_CTL = IOC_PA27_FUNC_CTL_DIS0_R_6;
+
+    HPM_IOC->PAD[IOC_PAD_PA28].FUNC_CTL = IOC_PA28_FUNC_CTL_DIS0_R_7;
+
+    HPM_IOC->PAD[IOC_PAD_PB06].FUNC_CTL = IOC_PB06_FUNC_CTL_DIS0_G_0;
+
+    HPM_IOC->PAD[IOC_PAD_PB01].FUNC_CTL = IOC_PB01_FUNC_CTL_DIS0_G_1;
+
+    HPM_IOC->PAD[IOC_PAD_PA22].FUNC_CTL = IOC_PA22_FUNC_CTL_DIS0_G_2;
+
+    HPM_IOC->PAD[IOC_PAD_PA23].FUNC_CTL = IOC_PA23_FUNC_CTL_DIS0_G_3;
+
+    HPM_IOC->PAD[IOC_PAD_PA29].FUNC_CTL = IOC_PA29_FUNC_CTL_DIS0_G_4;
+
+    HPM_IOC->PAD[IOC_PAD_PA24].FUNC_CTL = IOC_PA24_FUNC_CTL_DIS0_G_5;
+
+    HPM_IOC->PAD[IOC_PAD_PA30].FUNC_CTL = IOC_PA30_FUNC_CTL_DIS0_G_6;
+
+    HPM_IOC->PAD[IOC_PAD_PA25].FUNC_CTL = IOC_PA25_FUNC_CTL_DIS0_G_7;
+
+    HPM_IOC->PAD[IOC_PAD_PB05].FUNC_CTL = IOC_PB05_FUNC_CTL_DIS0_B_0;
+
+    HPM_IOC->PAD[IOC_PAD_PB07].FUNC_CTL = IOC_PB07_FUNC_CTL_DIS0_B_1;
+
+    HPM_IOC->PAD[IOC_PAD_PB02].FUNC_CTL = IOC_PB02_FUNC_CTL_DIS0_B_2;
+
+    HPM_IOC->PAD[IOC_PAD_PA16].FUNC_CTL = IOC_PA16_FUNC_CTL_DIS0_B_3;
+
+    HPM_IOC->PAD[IOC_PAD_PA12].FUNC_CTL = IOC_PA12_FUNC_CTL_DIS0_B_4;
+
+    HPM_IOC->PAD[IOC_PAD_PA17].FUNC_CTL = IOC_PA17_FUNC_CTL_DIS0_B_5;
+
+    HPM_IOC->PAD[IOC_PAD_PA13].FUNC_CTL = IOC_PA13_FUNC_CTL_DIS0_B_6;
+
+    HPM_IOC->PAD[IOC_PAD_PA18].FUNC_CTL = IOC_PA18_FUNC_CTL_DIS0_B_7;
+
+    HPM_IOC->PAD[IOC_PAD_PA20].FUNC_CTL = IOC_PA20_FUNC_CTL_DIS0_CLK;
+
+    HPM_IOC->PAD[IOC_PAD_PA15].FUNC_CTL = IOC_PA15_FUNC_CTL_DIS0_EN;
+
+    HPM_IOC->PAD[IOC_PAD_PA19].FUNC_CTL = IOC_PA19_FUNC_CTL_DIS0_HSYNC;
+
+    HPM_IOC->PAD[IOC_PAD_PA14].FUNC_CTL = IOC_PA14_FUNC_CTL_DIS0_VSYNC;
+
+    /* PWM */
+    HPM_IOC->PAD[IOC_PAD_PB10].FUNC_CTL = IOC_PB10_FUNC_CTL_GPIO_B_10;
+
+    /* RST */
+    HPM_IOC->PAD[IOC_PAD_PB16].FUNC_CTL = IOC_PB16_FUNC_CTL_GPIO_B_16;
+
+    HPM_IOC->PAD[IOC_PAD_PZ00].FUNC_CTL = IOC_PZ00_FUNC_CTL_GPIO_Z_00;
+    HPM_BIOC->PAD[IOC_PAD_PZ00].FUNC_CTL = BIOC_PZ00_FUNC_CTL_SOC_PZ_00;
+    HPM_IOC->PAD[IOC_PAD_PZ00].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+/*
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_cap_pins(void)
+{
+    /* CAP_INT */
+    HPM_IOC->PAD[IOC_PAD_PB08].FUNC_CTL = IOC_PB08_FUNC_CTL_GPIO_B_08;
+    HPM_IOC->PAD[IOC_PAD_PB08].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(1);
+
+    /* CAP_RST */
+    HPM_IOC->PAD[IOC_PAD_PB09].FUNC_CTL = IOC_PB09_FUNC_CTL_GPIO_B_09;
+    HPM_IOC->PAD[IOC_PAD_PB09].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(1);
+}
+
+/* PZ port IO needs to configure BIOC as well */
+void init_i2c0_pins_as_gpio(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ11].FUNC_CTL = IOC_PZ11_FUNC_CTL_GPIO_Z_11;
+    HPM_BIOC->PAD[IOC_PAD_PZ11].FUNC_CTL = BIOC_PZ11_FUNC_CTL_SOC_PZ_11;
+
+    HPM_IOC->PAD[IOC_PAD_PZ10].FUNC_CTL = IOC_PZ10_FUNC_CTL_GPIO_Z_10;
+    HPM_BIOC->PAD[IOC_PAD_PZ10].FUNC_CTL = BIOC_PZ10_FUNC_CTL_SOC_PZ_10;
+}
+
+/* PZ port IO needs to configure BIOC as well */
+void init_i2c0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ11].FUNC_CTL = IOC_PZ11_FUNC_CTL_I2C0_SCL | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_BIOC->PAD[IOC_PAD_PZ11].FUNC_CTL = BIOC_PZ11_FUNC_CTL_SOC_PZ_11;
+    HPM_IOC->PAD[IOC_PAD_PZ11].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PZ10].FUNC_CTL = IOC_PZ10_FUNC_CTL_I2C0_SDA | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_BIOC->PAD[IOC_PAD_PZ10].FUNC_CTL = BIOC_PZ10_FUNC_CTL_SOC_PZ_10;
+    HPM_IOC->PAD[IOC_PAD_PZ10].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1);
+}
+
+void init_femc_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PC01].FUNC_CTL = IOC_PC01_FUNC_CTL_FEMC_DQ_16;
+
+    HPM_IOC->PAD[IOC_PAD_PC00].FUNC_CTL = IOC_PC00_FUNC_CTL_FEMC_DQ_17;
+
+    HPM_IOC->PAD[IOC_PAD_PB31].FUNC_CTL = IOC_PB31_FUNC_CTL_FEMC_DQ_18;
+
+    HPM_IOC->PAD[IOC_PAD_PB30].FUNC_CTL = IOC_PB30_FUNC_CTL_FEMC_DQ_30;
+
+    HPM_IOC->PAD[IOC_PAD_PB29].FUNC_CTL = IOC_PB29_FUNC_CTL_FEMC_DQ_31;
+
+    HPM_IOC->PAD[IOC_PAD_PB28].FUNC_CTL = IOC_PB28_FUNC_CTL_FEMC_DQ_19;
+
+    HPM_IOC->PAD[IOC_PAD_PB27].FUNC_CTL = IOC_PB27_FUNC_CTL_FEMC_DQ_20;
+
+    HPM_IOC->PAD[IOC_PAD_PB26].FUNC_CTL = IOC_PB26_FUNC_CTL_FEMC_DQ_21;
+
+    HPM_IOC->PAD[IOC_PAD_PB25].FUNC_CTL = IOC_PB25_FUNC_CTL_FEMC_DQ_28;
+
+    HPM_IOC->PAD[IOC_PAD_PB24].FUNC_CTL = IOC_PB24_FUNC_CTL_FEMC_DQ_29;
+
+    HPM_IOC->PAD[IOC_PAD_PB23].FUNC_CTL = IOC_PB23_FUNC_CTL_FEMC_DQ_22;
+
+    HPM_IOC->PAD[IOC_PAD_PB22].FUNC_CTL = IOC_PB22_FUNC_CTL_FEMC_DQ_26;
+
+    HPM_IOC->PAD[IOC_PAD_PB21].FUNC_CTL = IOC_PB21_FUNC_CTL_FEMC_DQ_27;
+
+    HPM_IOC->PAD[IOC_PAD_PB20].FUNC_CTL = IOC_PB20_FUNC_CTL_FEMC_DQ_23;
+
+    HPM_IOC->PAD[IOC_PAD_PB19].FUNC_CTL = IOC_PB19_FUNC_CTL_FEMC_DQ_24;
+
+    HPM_IOC->PAD[IOC_PAD_PB18].FUNC_CTL = IOC_PB18_FUNC_CTL_FEMC_DQ_25;
+
+    HPM_IOC->PAD[IOC_PAD_PD13].FUNC_CTL = IOC_PD13_FUNC_CTL_FEMC_DQ_14;
+
+    HPM_IOC->PAD[IOC_PAD_PD12].FUNC_CTL = IOC_PD12_FUNC_CTL_FEMC_DQ_15;
+
+    HPM_IOC->PAD[IOC_PAD_PD10].FUNC_CTL = IOC_PD10_FUNC_CTL_FEMC_DQ_12;
+
+    HPM_IOC->PAD[IOC_PAD_PD09].FUNC_CTL = IOC_PD09_FUNC_CTL_FEMC_DQ_13;
+
+    HPM_IOC->PAD[IOC_PAD_PD08].FUNC_CTL = IOC_PD08_FUNC_CTL_FEMC_DQ_00;
+
+    HPM_IOC->PAD[IOC_PAD_PD07].FUNC_CTL = IOC_PD07_FUNC_CTL_FEMC_DQ_10;
+
+    HPM_IOC->PAD[IOC_PAD_PD06].FUNC_CTL = IOC_PD06_FUNC_CTL_FEMC_DQ_11;
+
+    HPM_IOC->PAD[IOC_PAD_PD05].FUNC_CTL = IOC_PD05_FUNC_CTL_FEMC_DQ_01;
+
+    HPM_IOC->PAD[IOC_PAD_PD04].FUNC_CTL = IOC_PD04_FUNC_CTL_FEMC_DQ_08;
+
+    HPM_IOC->PAD[IOC_PAD_PD03].FUNC_CTL = IOC_PD03_FUNC_CTL_FEMC_DQ_09;
+
+    HPM_IOC->PAD[IOC_PAD_PD02].FUNC_CTL = IOC_PD02_FUNC_CTL_FEMC_DQ_04;
+
+    HPM_IOC->PAD[IOC_PAD_PD01].FUNC_CTL = IOC_PD01_FUNC_CTL_FEMC_DQ_03;
+
+    HPM_IOC->PAD[IOC_PAD_PD00].FUNC_CTL = IOC_PD00_FUNC_CTL_FEMC_DQ_02;
+
+    HPM_IOC->PAD[IOC_PAD_PC29].FUNC_CTL = IOC_PC29_FUNC_CTL_FEMC_DQ_07;
+
+    HPM_IOC->PAD[IOC_PAD_PC28].FUNC_CTL = IOC_PC28_FUNC_CTL_FEMC_DQ_06;
+
+    HPM_IOC->PAD[IOC_PAD_PC27].FUNC_CTL = IOC_PC27_FUNC_CTL_FEMC_DQ_05;
+
+    /* SRAM #WE */
+    HPM_IOC->PAD[IOC_PAD_PC21].FUNC_CTL = IOC_PC21_FUNC_CTL_FEMC_A_11;
+
+    HPM_IOC->PAD[IOC_PAD_PC17].FUNC_CTL = IOC_PC17_FUNC_CTL_FEMC_A_09;
+
+    HPM_IOC->PAD[IOC_PAD_PC15].FUNC_CTL = IOC_PC15_FUNC_CTL_FEMC_A_10;
+
+    HPM_IOC->PAD[IOC_PAD_PC12].FUNC_CTL = IOC_PC12_FUNC_CTL_FEMC_A_08;
+
+    HPM_IOC->PAD[IOC_PAD_PC11].FUNC_CTL = IOC_PC11_FUNC_CTL_FEMC_A_07;
+
+    HPM_IOC->PAD[IOC_PAD_PC10].FUNC_CTL = IOC_PC10_FUNC_CTL_FEMC_A_06;
+
+    HPM_IOC->PAD[IOC_PAD_PC09].FUNC_CTL = IOC_PC09_FUNC_CTL_FEMC_A_01;
+
+    HPM_IOC->PAD[IOC_PAD_PC08].FUNC_CTL = IOC_PC08_FUNC_CTL_FEMC_A_00;
+
+    HPM_IOC->PAD[IOC_PAD_PC07].FUNC_CTL = IOC_PC07_FUNC_CTL_FEMC_A_05;
+
+    HPM_IOC->PAD[IOC_PAD_PC06].FUNC_CTL = IOC_PC06_FUNC_CTL_FEMC_A_04;
+
+    HPM_IOC->PAD[IOC_PAD_PC05].FUNC_CTL = IOC_PC05_FUNC_CTL_FEMC_A_03;
+
+    HPM_IOC->PAD[IOC_PAD_PC04].FUNC_CTL = IOC_PC04_FUNC_CTL_FEMC_A_02;
+
+    /* SRAM #ADV */
+    HPM_IOC->PAD[IOC_PAD_PC14].FUNC_CTL = IOC_PC14_FUNC_CTL_FEMC_BA1;
+
+    HPM_IOC->PAD[IOC_PAD_PC13].FUNC_CTL = IOC_PC13_FUNC_CTL_FEMC_BA0;
+
+    HPM_IOC->PAD[IOC_PAD_PC16].FUNC_CTL = IOC_PC16_FUNC_CTL_FEMC_DQS | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+
+    HPM_IOC->PAD[IOC_PAD_PC26].FUNC_CTL = IOC_PC26_FUNC_CTL_FEMC_CLK;
+
+    HPM_IOC->PAD[IOC_PAD_PC25].FUNC_CTL = IOC_PC25_FUNC_CTL_FEMC_CKE;
+
+    HPM_IOC->PAD[IOC_PAD_PC19].FUNC_CTL = IOC_PC19_FUNC_CTL_FEMC_CS_0;
+
+    HPM_IOC->PAD[IOC_PAD_PC18].FUNC_CTL = IOC_PC18_FUNC_CTL_FEMC_RAS;
+
+    HPM_IOC->PAD[IOC_PAD_PC23].FUNC_CTL = IOC_PC23_FUNC_CTL_FEMC_CAS;
+
+    HPM_IOC->PAD[IOC_PAD_PC24].FUNC_CTL = IOC_PC24_FUNC_CTL_FEMC_WE;
+
+    /* SRAM #LB */
+    HPM_IOC->PAD[IOC_PAD_PC30].FUNC_CTL = IOC_PC30_FUNC_CTL_FEMC_DM_0;
+
+    /* SRAM #UB */
+    HPM_IOC->PAD[IOC_PAD_PC31].FUNC_CTL = IOC_PC31_FUNC_CTL_FEMC_DM_1;
+
+    HPM_IOC->PAD[IOC_PAD_PC02].FUNC_CTL = IOC_PC02_FUNC_CTL_FEMC_DM_2;
+
+    HPM_IOC->PAD[IOC_PAD_PC03].FUNC_CTL = IOC_PC03_FUNC_CTL_FEMC_DM_3;
+
+    /* SRAM #CE */
+    HPM_IOC->PAD[IOC_PAD_PC20].FUNC_CTL = IOC_PC20_FUNC_CTL_FEMC_CS_1;
+
+    /* SRAM #OE */
+    HPM_IOC->PAD[IOC_PAD_PC22].FUNC_CTL = IOC_PC22_FUNC_CTL_FEMC_A_12;
+}
+
+/*
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_gpio_pins_with_pull_up(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PB12_FUNC_CTL_GPIO_B_12;
+    HPM_IOC->PAD[IOC_PAD_PB12].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(0);
+}
+
+/*
+ * PZ port IO needs to configure BIOC as well.
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_gpio_pins_using_gpio0(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ02].FUNC_CTL = IOC_PZ02_FUNC_CTL_GPIO_Z_02;
+    HPM_BIOC->PAD[IOC_PAD_PZ02].FUNC_CTL = BIOC_PZ02_FUNC_CTL_SOC_PZ_02;
+    HPM_IOC->PAD[IOC_PAD_PZ02].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+/*
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_spi2_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE31].FUNC_CTL = IOC_PE31_FUNC_CTL_SPI2_CSN;
+    HPM_IOC->PAD[IOC_PAD_PE31].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PE30].FUNC_CTL = IOC_PE30_FUNC_CTL_SPI2_MOSI;
+    HPM_IOC->PAD[IOC_PAD_PE30].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+
+    HPM_IOC->PAD[IOC_PAD_PE27].FUNC_CTL = IOC_PE27_FUNC_CTL_SPI2_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PE27].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+
+    HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PE28_FUNC_CTL_SPI2_MISO;
+    HPM_IOC->PAD[IOC_PAD_PE28].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+}
+
+/*
+ * Errata: E00029：IOC PAD_CTL register write restrictions.
+ * When the PE bit is 1, bit [3] must be set to 1,
+ * and DS can only be selected as 0b001 (low drive strength) or 0b110 (high drive strength).
+ */
+void init_spi2_pins_with_gpio_as_cs(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE27].FUNC_CTL = IOC_PE27_FUNC_CTL_SPI2_SCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PE27].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+
+    HPM_IOC->PAD[IOC_PAD_PE28].FUNC_CTL = IOC_PE28_FUNC_CTL_SPI2_MISO;
+    HPM_IOC->PAD[IOC_PAD_PE28].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+
+    HPM_IOC->PAD[IOC_PAD_PE30].FUNC_CTL = IOC_PE30_FUNC_CTL_SPI2_MOSI;
+    HPM_IOC->PAD[IOC_PAD_PE30].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08;
+
+    HPM_IOC->PAD[IOC_PAD_PE31].FUNC_CTL = IOC_PE31_FUNC_CTL_GPIO_E_31;
+    HPM_IOC->PAD[IOC_PAD_PE31].PAD_CTL = IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_gptmr3_pins(void)
+{
+    /* TMR3 compare 1 */
+    HPM_IOC->PAD[IOC_PAD_PE24].FUNC_CTL = IOC_PE24_FUNC_CTL_GPTMR3_COMP_1;
+}
+
+void init_gptmr4_pins(void)
+{
+    /* TMR4 capture 1 */
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PE25_FUNC_CTL_GPTMR4_CAPT_1;
+}
+
+void init_gptmr5_pins(void)
+{
+    /* TMR5 compare 2 */
+    HPM_IOC->PAD[IOC_PAD_PD24].FUNC_CTL = IOC_PD24_FUNC_CTL_TRGM2_P_10;
+
+    /* TMR5 compare 3 */
+    HPM_IOC->PAD[IOC_PAD_PD23].FUNC_CTL = IOC_PD23_FUNC_CTL_TRGM2_P_11;
+
+    trgm_output_t trgm2_io_config0 = {0};
+    trgm2_io_config0.invert = 0;
+    trgm2_io_config0.type = trgm_output_same_as_input;
+    trgm2_io_config0.input = HPM_TRGM2_INPUT_SRC_GPTMR5_OUT2;
+    trgm_output_config(HPM_TRGM2, HPM_TRGM2_OUTPUT_SRC_TRGM2_P10, &trgm2_io_config0);
+
+    trgm_enable_io_output(HPM_TRGM2, 1 << 10);
+
+    trgm_output_t trgm2_io_config1 = {0};
+    trgm2_io_config1.invert = 0;
+    trgm2_io_config1.type = trgm_output_same_as_input;
+    trgm2_io_config1.input = HPM_TRGM2_INPUT_SRC_GPTMR5_OUT3;
+    trgm_output_config(HPM_TRGM2, HPM_TRGM2_OUTPUT_SRC_TRGM2_P11, &trgm2_io_config1);
+
+    trgm_enable_io_output(HPM_TRGM2, 1 << 11);
+}
+
+void init_hall_trgm_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PD16].FUNC_CTL = IOC_PD16_FUNC_CTL_TRGM2_P_06;
+
+    HPM_IOC->PAD[IOC_PAD_PD20].FUNC_CTL = IOC_PD20_FUNC_CTL_TRGM2_P_07;
+
+    HPM_IOC->PAD[IOC_PAD_PD25].FUNC_CTL = IOC_PD25_FUNC_CTL_TRGM2_P_08;
+}
+
+void init_qei_trgm_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PD19].FUNC_CTL = IOC_PD19_FUNC_CTL_TRGM2_P_09;
+
+    HPM_IOC->PAD[IOC_PAD_PD24].FUNC_CTL = IOC_PD24_FUNC_CTL_TRGM2_P_10;
+}
+
+void init_i2s0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PF02].FUNC_CTL = IOC_PF02_FUNC_CTL_I2S0_RXD_2;
+
+    HPM_IOC->PAD[IOC_PAD_PF03].FUNC_CTL = IOC_PF03_FUNC_CTL_I2S0_MCLK;
+
+    HPM_IOC->PAD[IOC_PAD_PF04].FUNC_CTL = IOC_PF04_FUNC_CTL_I2S0_TXD_2;
+
+    HPM_IOC->PAD[IOC_PAD_PF06].FUNC_CTL = IOC_PF06_FUNC_CTL_I2S0_BCLK;
+
+    HPM_IOC->PAD[IOC_PAD_PF09].FUNC_CTL = IOC_PF09_FUNC_CTL_I2S0_FCLK;
+}
+
+/* PY port IO needs to configure PIOC */
+void init_dao_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PY08].FUNC_CTL = IOC_PY08_FUNC_CTL_DAOR_P;
+    HPM_PIOC->PAD[IOC_PAD_PY08].FUNC_CTL = PIOC_PY08_FUNC_CTL_SOC_PY_08;
+
+    HPM_IOC->PAD[IOC_PAD_PY09].FUNC_CTL = IOC_PY09_FUNC_CTL_DAOR_N;
+    HPM_PIOC->PAD[IOC_PAD_PY09].FUNC_CTL = PIOC_PY09_FUNC_CTL_SOC_PY_09;
+}
+
+/* PY port IO needs to configure PIOC */
+void init_pdm_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PY10].FUNC_CTL = IOC_PY10_FUNC_CTL_PDM0_CLK;
+    HPM_PIOC->PAD[IOC_PAD_PY10].FUNC_CTL = PIOC_PY10_FUNC_CTL_SOC_PY_10;
+
+    HPM_IOC->PAD[IOC_PAD_PY11].FUNC_CTL = IOC_PY11_FUNC_CTL_PDM0_D_0;
+    HPM_PIOC->PAD[IOC_PAD_PY11].FUNC_CTL = PIOC_PY11_FUNC_CTL_SOC_PY_11;
+}
+
+void init_vad_pins(void)
+{
+    HPM_PIOC->PAD[IOC_PAD_PY10].FUNC_CTL = PIOC_PY10_FUNC_CTL_VAD_CLK;
+
+    HPM_PIOC->PAD[IOC_PAD_PY11].FUNC_CTL = PIOC_PY11_FUNC_CTL_VAD_DAT;
+}
+
+void init_cam_pins(void)
+{
+    /* configure rst pin function, PY port IO needs to configure PIOC */
+    HPM_IOC->PAD[IOC_PAD_PY05].FUNC_CTL = IOC_PY05_FUNC_CTL_GPIO_Y_05;
+    HPM_PIOC->PAD[IOC_PAD_PY05].FUNC_CTL = PIOC_PY05_FUNC_CTL_SOC_PY_05;
+
+    HPM_IOC->PAD[IOC_PAD_PA07].FUNC_CTL = IOC_PA07_FUNC_CTL_CAM0_D_2;
+
+    HPM_IOC->PAD[IOC_PAD_PA03].FUNC_CTL = IOC_PA03_FUNC_CTL_CAM0_D_3;
+
+    HPM_IOC->PAD[IOC_PAD_PA08].FUNC_CTL = IOC_PA08_FUNC_CTL_CAM0_D_4;
+
+    HPM_IOC->PAD[IOC_PAD_PA09].FUNC_CTL = IOC_PA09_FUNC_CTL_CAM0_D_5;
+
+    HPM_IOC->PAD[IOC_PAD_PA00].FUNC_CTL = IOC_PA00_FUNC_CTL_CAM0_D_6;
+
+    HPM_IOC->PAD[IOC_PAD_PA04].FUNC_CTL = IOC_PA04_FUNC_CTL_CAM0_D_7;
+
+    HPM_IOC->PAD[IOC_PAD_PA01].FUNC_CTL = IOC_PA01_FUNC_CTL_CAM0_D_8;
+
+    HPM_IOC->PAD[IOC_PAD_PA02].FUNC_CTL = IOC_PA02_FUNC_CTL_CAM0_D_9;
+
+    HPM_IOC->PAD[IOC_PAD_PA10].FUNC_CTL = IOC_PA10_FUNC_CTL_CAM0_XCLK;
+
+    HPM_IOC->PAD[IOC_PAD_PA05].FUNC_CTL = IOC_PA05_FUNC_CTL_CAM0_HSYNC;
+
+    HPM_IOC->PAD[IOC_PAD_PA06].FUNC_CTL = IOC_PA06_FUNC_CTL_CAM0_VSYNC;
+
+    HPM_IOC->PAD[IOC_PAD_PA11].FUNC_CTL = IOC_PA11_FUNC_CTL_CAM0_PIXCLK;
+}
+
+void init_butn_pins(void)
+{
+    HPM_BIOC->PAD[IOC_PAD_PZ02].FUNC_CTL = BIOC_PZ02_FUNC_CTL_PBUTN;
+
+    HPM_BIOC->PAD[IOC_PAD_PZ03].FUNC_CTL = BIOC_PZ03_FUNC_CTL_WBUTN;
+
+    HPM_BIOC->PAD[IOC_PAD_PZ04].FUNC_CTL = BIOC_PZ04_FUNC_CTL_PLED;
+
+    HPM_BIOC->PAD[IOC_PAD_PZ05].FUNC_CTL = BIOC_PZ05_FUNC_CTL_WLED;
+}
+
+void init_acmp_pins(void)
+{
+    /* configure to ACMP_COMP_1(ALT16) function */
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PE25_FUNC_CTL_ACMP_COMP_1;
+
+    /* configure to CMP1_INP7 function */
+    HPM_IOC->PAD[IOC_PAD_PE23].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+
+    /* configure to CMP1_INN6 function */
+    HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+}
+
+void init_enet0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PF00].FUNC_CTL = IOC_PF00_FUNC_CTL_GPIO_F_00;
+
+    HPM_IOC->PAD[IOC_PAD_PE23].FUNC_CTL = IOC_PE23_FUNC_CTL_ETH0_MDIO;
+
+    HPM_IOC->PAD[IOC_PAD_PE22].FUNC_CTL = IOC_PE22_FUNC_CTL_ETH0_MDC;
+
+    HPM_IOC->PAD[IOC_PAD_PD31].FUNC_CTL = IOC_PD31_FUNC_CTL_ETH0_RXD_0;
+
+    HPM_IOC->PAD[IOC_PAD_PE04].FUNC_CTL = IOC_PE04_FUNC_CTL_ETH0_RXD_1;
+
+    HPM_IOC->PAD[IOC_PAD_PE02].FUNC_CTL = IOC_PE02_FUNC_CTL_ETH0_RXD_2;
+
+    HPM_IOC->PAD[IOC_PAD_PE07].FUNC_CTL = IOC_PE07_FUNC_CTL_ETH0_RXD_3;
+
+    HPM_IOC->PAD[IOC_PAD_PE03].FUNC_CTL = IOC_PE03_FUNC_CTL_ETH0_RXCK;
+
+    HPM_IOC->PAD[IOC_PAD_PD30].FUNC_CTL = IOC_PD30_FUNC_CTL_ETH0_RXDV;
+
+    HPM_IOC->PAD[IOC_PAD_PE06].FUNC_CTL = IOC_PE06_FUNC_CTL_ETH0_TXD_0;
+
+    HPM_IOC->PAD[IOC_PAD_PD29].FUNC_CTL = IOC_PD29_FUNC_CTL_ETH0_TXD_1;
+
+    HPM_IOC->PAD[IOC_PAD_PD28].FUNC_CTL = IOC_PD28_FUNC_CTL_ETH0_TXD_2;
+
+    HPM_IOC->PAD[IOC_PAD_PE05].FUNC_CTL = IOC_PE05_FUNC_CTL_ETH0_TXD_3;
+
+    HPM_IOC->PAD[IOC_PAD_PE01].FUNC_CTL = IOC_PE01_FUNC_CTL_ETH0_TXCK;
+
+    HPM_IOC->PAD[IOC_PAD_PE00].FUNC_CTL = IOC_PE00_FUNC_CTL_ETH0_TXEN;
+}
+
+void init_enet1_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE26].FUNC_CTL = IOC_PE26_FUNC_CTL_GPIO_E_26;
+
+    HPM_IOC->PAD[IOC_PAD_PD11].FUNC_CTL = IOC_PD11_FUNC_CTL_ETH1_MDC;
+
+    HPM_IOC->PAD[IOC_PAD_PD14].FUNC_CTL = IOC_PD14_FUNC_CTL_ETH1_MDIO;
+
+    HPM_IOC->PAD[IOC_PAD_PE20].FUNC_CTL = IOC_PE20_FUNC_CTL_ETH1_RXD_0;
+
+    HPM_IOC->PAD[IOC_PAD_PE18].FUNC_CTL = IOC_PE18_FUNC_CTL_ETH1_RXD_1;
+
+    HPM_IOC->PAD[IOC_PAD_PE15].FUNC_CTL = IOC_PE15_FUNC_CTL_ETH1_RXDV;
+
+    HPM_IOC->PAD[IOC_PAD_PE19].FUNC_CTL = IOC_PE19_FUNC_CTL_ETH1_TXD_0;
+
+    HPM_IOC->PAD[IOC_PAD_PE17].FUNC_CTL = IOC_PE17_FUNC_CTL_ETH1_TXD_1;
+
+    HPM_IOC->PAD[IOC_PAD_PE14].FUNC_CTL = IOC_PE14_FUNC_CTL_ETH1_TXEN;
+
+    HPM_IOC->PAD[IOC_PAD_PE16].FUNC_CTL = IOC_PE16_FUNC_CTL_ETH1_REFCLK | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+}
+
+void init_pwm2_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PD28].FUNC_CTL = IOC_PD28_FUNC_CTL_PWM2_P_5;
+
+    HPM_IOC->PAD[IOC_PAD_PD29].FUNC_CTL = IOC_PD29_FUNC_CTL_PWM2_P_4;
+
+    HPM_IOC->PAD[IOC_PAD_PD30].FUNC_CTL = IOC_PD30_FUNC_CTL_PWM2_P_1;
+
+    HPM_IOC->PAD[IOC_PAD_PD31].FUNC_CTL = IOC_PD31_FUNC_CTL_PWM2_P_0;
+
+    HPM_IOC->PAD[IOC_PAD_PE03].FUNC_CTL = IOC_PE03_FUNC_CTL_PWM2_P_3;
+
+    HPM_IOC->PAD[IOC_PAD_PE04].FUNC_CTL = IOC_PE04_FUNC_CTL_PWM2_P_2;
+}
+
+void init_pwm3_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE17].FUNC_CTL = IOC_PE17_FUNC_CTL_PWM3_P_6;
+
+    HPM_IOC->PAD[IOC_PAD_PE18].FUNC_CTL = IOC_PE18_FUNC_CTL_PWM3_P_7;
+}
+
+void init_adc12_pins(void)
+{
+    /* ADC0.VIN11 */
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+}
+
+void init_adc16_pins(void)
+{
+    /* ADC3.INA2 */
+    HPM_IOC->PAD[IOC_PAD_PE29].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+}
+
+void init_adc_bldc_pins(void)
+{
+    /* ADC0.VINP7 */
+    HPM_IOC->PAD[IOC_PAD_PE21].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+
+    /* ADC1.VINP10 */
+    HPM_IOC->PAD[IOC_PAD_PE24].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+
+    /* ADC2.VINP11 */
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PAD_FUNC_CTL_ANALOG_MASK;
+}
+
+void init_usb0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PF10].FUNC_CTL = IOC_PF10_FUNC_CTL_USB0_ID;
+
+    HPM_IOC->PAD[IOC_PAD_PF08].FUNC_CTL = IOC_PF08_FUNC_CTL_USB0_OC;
+}
+
+void init_usb1_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PF07].FUNC_CTL = IOC_PF07_FUNC_CTL_USB1_ID;
+
+    HPM_IOC->PAD[IOC_PAD_PF05].FUNC_CTL = IOC_PF05_FUNC_CTL_USB1_OC;
+}
+
+void init_can0_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB15].FUNC_CTL = IOC_PB15_FUNC_CTL_CAN0_TXD;
+
+    HPM_IOC->PAD[IOC_PAD_PB17].FUNC_CTL = IOC_PB17_FUNC_CTL_CAN0_RXD;
+}
+
+void init_mcan0_transceiver_phy_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB14].FUNC_CTL = IOC_PB14_FUNC_CTL_GPIO_B_14;
+}
+
+void init_sdxc1_cmd_pin_enable_1v8_enable_opendrain(void)
+{
+    /* SDXC1.CMD */
+    HPM_IOC->PAD[IOC_PAD_PD21].FUNC_CTL = IOC_PD21_FUNC_CTL_SDC1_CMD | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PD21].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_OD_SET(1);
+}
+
+void init_sdxc1_cmd_pin_enable_1v8_disable_opendrain(void)
+{
+    /* SDXC1.CMD */
+    HPM_IOC->PAD[IOC_PAD_PD21].FUNC_CTL = IOC_PD21_FUNC_CTL_SDC1_CMD | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PD21].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_OD_SET(0);
+}
+
+void init_sdxc1_cmd_pin_disable_1v8_enable_opendrain(void)
+{
+    /* SDXC1.CMD */
+    HPM_IOC->PAD[IOC_PAD_PD21].FUNC_CTL = IOC_PD21_FUNC_CTL_SDC1_CMD | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PD21].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_OD_SET(1);
+}
+
+void init_sdxc1_cmd_pin_disable_1v8_disable_opendrain(void)
+{
+    /* SDXC1.CMD */
+    HPM_IOC->PAD[IOC_PAD_PD21].FUNC_CTL = IOC_PD21_FUNC_CTL_SDC1_CMD | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_IOC->PAD[IOC_PAD_PD21].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1) | IOC_PAD_PAD_CTL_OD_SET(0);
+}
+
+void init_sdxc1_cd_pin(void)
+{
+    /* SDXC1.CDN */
+    HPM_IOC->PAD[IOC_PAD_PD15].FUNC_CTL = IOC_PD15_FUNC_CTL_GPIO_D_15;
+    HPM_IOC->PAD[IOC_PAD_PD15].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_sdxc1_clk_data_pins_enable_1v8(void)
+{
+    /* SDXC1.CLK */
+    HPM_IOC->PAD[IOC_PAD_PD22].FUNC_CTL = IOC_PD22_FUNC_CTL_SDC1_CLK;
+    HPM_IOC->PAD[IOC_PAD_PD22].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA0 */
+    HPM_IOC->PAD[IOC_PAD_PD18].FUNC_CTL = IOC_PD18_FUNC_CTL_SDC1_DATA_0;
+    HPM_IOC->PAD[IOC_PAD_PD18].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_sdxc1_clk_data_pins_disable_1v8(void)
+{
+    /* SDXC1.CLK */
+    HPM_IOC->PAD[IOC_PAD_PD22].FUNC_CTL = IOC_PD22_FUNC_CTL_SDC1_CLK;
+    HPM_IOC->PAD[IOC_PAD_PD22].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA0 */
+    HPM_IOC->PAD[IOC_PAD_PD18].FUNC_CTL = IOC_PD18_FUNC_CTL_SDC1_DATA_0;
+    HPM_IOC->PAD[IOC_PAD_PD18].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_sdxc1_clk_data_pins_width4_enable_1v8(void)
+{
+    /* SDXC1.DATA1 */
+    HPM_IOC->PAD[IOC_PAD_PD17].FUNC_CTL = IOC_PD17_FUNC_CTL_SDC1_DATA_1;
+    HPM_IOC->PAD[IOC_PAD_PD17].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA2 */
+    HPM_IOC->PAD[IOC_PAD_PD27].FUNC_CTL = IOC_PD27_FUNC_CTL_SDC1_DATA_2;
+    HPM_IOC->PAD[IOC_PAD_PD27].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA3 */
+    HPM_IOC->PAD[IOC_PAD_PD26].FUNC_CTL = IOC_PD26_FUNC_CTL_SDC1_DATA_3;
+    HPM_IOC->PAD[IOC_PAD_PD26].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.CLK */
+    HPM_IOC->PAD[IOC_PAD_PD22].FUNC_CTL = IOC_PD22_FUNC_CTL_SDC1_CLK;
+    HPM_IOC->PAD[IOC_PAD_PD22].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA0 */
+    HPM_IOC->PAD[IOC_PAD_PD18].FUNC_CTL = IOC_PD18_FUNC_CTL_SDC1_DATA_0;
+    HPM_IOC->PAD[IOC_PAD_PD18].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_sdxc1_clk_data_pins_width4_disable_1v8(void)
+{
+    /* SDXC1.DATA1 */
+    HPM_IOC->PAD[IOC_PAD_PD17].FUNC_CTL = IOC_PD17_FUNC_CTL_SDC1_DATA_1;
+    HPM_IOC->PAD[IOC_PAD_PD17].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA2 */
+    HPM_IOC->PAD[IOC_PAD_PD27].FUNC_CTL = IOC_PD27_FUNC_CTL_SDC1_DATA_2;
+    HPM_IOC->PAD[IOC_PAD_PD27].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA3 */
+    HPM_IOC->PAD[IOC_PAD_PD26].FUNC_CTL = IOC_PD26_FUNC_CTL_SDC1_DATA_3;
+    HPM_IOC->PAD[IOC_PAD_PD26].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.CLK */
+    HPM_IOC->PAD[IOC_PAD_PD22].FUNC_CTL = IOC_PD22_FUNC_CTL_SDC1_CLK;
+    HPM_IOC->PAD[IOC_PAD_PD22].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+
+    /* SDXC1.DATA0 */
+    HPM_IOC->PAD[IOC_PAD_PD18].FUNC_CTL = IOC_PD18_FUNC_CTL_SDC1_DATA_0;
+    HPM_IOC->PAD[IOC_PAD_PD18].PAD_CTL = IOC_PAD_PAD_CTL_MS_SET(0) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_DS_SET(6) | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_sdxc1_pwr_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PC20].FUNC_CTL = IOC_PC20_FUNC_CTL_GPIO_C_20;
+    HPM_IOC->PAD[IOC_PAD_PC20].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_clk_obs_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB02].FUNC_CTL = IOC_PB02_FUNC_CTL_SYSCTL_CLK_OBS_0;
+}
+
+void init_rgb_pwm_pins(void)
+{
+    /* Red */
+    HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = IOC_PB11_FUNC_CTL_TRGM1_P_01;
+
+    /* Green */
+    HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PB12_FUNC_CTL_TRGM0_P_06;
+
+    /* BLUE */
+    HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PB13_FUNC_CTL_TRGM1_P_03;
+}
+
+void init_led_pins_as_gpio(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PB11].FUNC_CTL = IOC_PB11_FUNC_CTL_GPIO_B_11;
+
+    HPM_IOC->PAD[IOC_PAD_PB12].FUNC_CTL = IOC_PB12_FUNC_CTL_GPIO_B_12;
+
+    HPM_IOC->PAD[IOC_PAD_PB13].FUNC_CTL = IOC_PB13_FUNC_CTL_GPIO_B_13;
+}
+
+void init_enet_pps_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PF05].FUNC_CTL = IOC_PF05_FUNC_CTL_ETH0_EVTO_0;
+}
+
+void init_enet_pps_capture_pins(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PE25_FUNC_CTL_ETH0_EVTI_1;
+}
+
+void init_tamper_pins(void)
+{
+    HPM_BIOC->PAD[IOC_PAD_PZ08].FUNC_CTL = BIOC_PZ08_FUNC_CTL_TAMP_08 | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+
+    HPM_BIOC->PAD[IOC_PAD_PZ09].FUNC_CTL = BIOC_PZ09_FUNC_CTL_TAMP_09;
+
+    HPM_BIOC->PAD[IOC_PAD_PZ10].FUNC_CTL = BIOC_PZ10_FUNC_CTL_TAMP_10;
+}
+
+/* for uart_rx_line_status case, need to a gpio pin to sent break signal */
+void init_uart_break_signal_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE31].FUNC_CTL = IOC_PE31_FUNC_CTL_GPIO_E_31;
+    HPM_IOC->PAD[IOC_PAD_PE31].PAD_CTL = IOC_PAD_PAD_CTL_DS_SET(1) | IOC_PAD_PAD_CTL_PE_SET(1) | 0x08 | IOC_PAD_PAD_CTL_PS_SET(1);
+}
+
+void init_gptmr3_channel_pin_as_output(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE24].FUNC_CTL = IOC_PE24_FUNC_CTL_GPTMR3_COMP_1;
+}
+
+void init_gptmr4_channel_pin_as_capture(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE25].FUNC_CTL = IOC_PE25_FUNC_CTL_GPTMR4_CAPT_1;
+}
+
+void init_gptmr5_channel2_pin_as_output(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PD24].FUNC_CTL = IOC_PD24_FUNC_CTL_TRGM2_P_10;
+
+    trgm_output_t trgm2_io_config0 = {0};
+    trgm2_io_config0.invert = 0;
+    trgm2_io_config0.type = trgm_output_same_as_input;
+    trgm2_io_config0.input = HPM_TRGM2_INPUT_SRC_GPTMR5_OUT2;
+    trgm_output_config(HPM_TRGM2, HPM_TRGM2_OUTPUT_SRC_TRGM2_P10, &trgm2_io_config0);
+
+    trgm_enable_io_output(HPM_TRGM2, 1 << 10);
+}
+
+void init_gptmr5_channel3_pin_as_output(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PD23].FUNC_CTL = IOC_PD23_FUNC_CTL_TRGM2_P_11;
+
+    trgm_output_t trgm2_io_config0 = {0};
+    trgm2_io_config0.invert = 0;
+    trgm2_io_config0.type = trgm_output_same_as_input;
+    trgm2_io_config0.input = HPM_TRGM2_INPUT_SRC_GPTMR5_OUT3;
+    trgm_output_config(HPM_TRGM2, HPM_TRGM2_OUTPUT_SRC_TRGM2_P11, &trgm2_io_config0);
+
+    trgm_enable_io_output(HPM_TRGM2, 1 << 11);
+}
+
+void init_clk_ref_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE24].FUNC_CTL = IOC_PE24_FUNC_CTL_SOC_REF1;
+}
+
+void init_brownout_indicate_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PE30].FUNC_CTL = IOC_PE30_FUNC_CTL_GPIO_E_30;
+}
+
+void board_init_i2c_eeprom_pin(void)
+{
+    HPM_IOC->PAD[IOC_PAD_PZ11].FUNC_CTL = IOC_PZ11_FUNC_CTL_I2C0_SCL | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_BIOC->PAD[IOC_PAD_PZ11].FUNC_CTL = BIOC_PZ11_FUNC_CTL_SOC_PZ_11;
+    HPM_IOC->PAD[IOC_PAD_PZ11].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1);
+
+    HPM_IOC->PAD[IOC_PAD_PZ10].FUNC_CTL = IOC_PZ10_FUNC_CTL_I2C0_SDA | IOC_PAD_FUNC_CTL_LOOP_BACK_MASK;
+    HPM_BIOC->PAD[IOC_PAD_PZ10].FUNC_CTL = BIOC_PZ10_FUNC_CTL_SOC_PZ_10;
+    HPM_IOC->PAD[IOC_PAD_PZ10].PAD_CTL = IOC_PAD_PAD_CTL_OD_SET(1);
+}
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.h b/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.h
new file mode 100644
index 000000000..460feded2
--- /dev/null
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/pinmux.h
@@ -0,0 +1,89 @@
+
+/*
+ * Copyright (c) 2025 HPMicro
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ *
+ *
+ * Automatically generated by HPM Pinmux Tool
+ *
+ *
+ * Note:
+ * PY and PZ IOs: if any SOC pin function needs to be routed to these IOs,
+ * besides of IOC, PIOC/BIOC needs to be configured SOC_GPIO_X_xx, so that
+ * expected SoC function can be enabled on these IOs.
+ */
+
+#ifndef HPM_PINMUX_H
+#define HPM_PINMUX_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void init_uart0_pins(void);
+void init_uart2_pins(void);
+void init_uart13_pins(void);
+void init_puart_pins(void);
+void init_uart13_pins_as_gpio(void);
+void init_lcd0_pins(void);
+void init_cap_pins(void);
+void init_i2c0_pins_as_gpio(void);
+void init_i2c0_pins(void);
+void init_femc_pins(void);
+void init_gpio_pins_with_pull_up(void);
+void init_gpio_pins_using_gpio0(void);
+void init_spi2_pins(void);
+void init_spi2_pins_with_gpio_as_cs(void);
+void init_gptmr3_pins(void);
+void init_gptmr4_pins(void);
+void init_gptmr5_pins(void);
+void init_hall_trgm_pins(void);
+void init_qei_trgm_pins(void);
+void init_i2s0_pins(void);
+void init_dao_pins(void);
+void init_pdm_pins(void);
+void init_vad_pins(void);
+void init_cam_pins(void);
+void init_butn_pins(void);
+void init_acmp_pins(void);
+void init_enet0_pins(void);
+void init_enet1_pins(void);
+void init_pwm2_pins(void);
+void init_pwm3_pins(void);
+void init_adc12_pins(void);
+void init_adc16_pins(void);
+void init_adc_bldc_pins(void);
+void init_usb0_pins(void);
+void init_usb1_pins(void);
+void init_can0_pins(void);
+void init_mcan0_transceiver_phy_pin(void);
+void init_sdxc1_cmd_pin_enable_1v8_enable_opendrain(void);
+void init_sdxc1_cmd_pin_enable_1v8_disable_opendrain(void);
+void init_sdxc1_cmd_pin_disable_1v8_enable_opendrain(void);
+void init_sdxc1_cmd_pin_disable_1v8_disable_opendrain(void);
+void init_sdxc1_cd_pin(void);
+void init_sdxc1_clk_data_pins_enable_1v8(void);
+void init_sdxc1_clk_data_pins_disable_1v8(void);
+void init_sdxc1_clk_data_pins_width4_enable_1v8(void);
+void init_sdxc1_clk_data_pins_width4_disable_1v8(void);
+void init_sdxc1_pwr_pin(void);
+void init_clk_obs_pins(void);
+void init_rgb_pwm_pins(void);
+void init_led_pins_as_gpio(void);
+void init_enet_pps_pins(void);
+void init_enet_pps_capture_pins(void);
+void init_tamper_pins(void);
+void init_uart_break_signal_pin(void);
+void init_gptmr3_channel_pin_as_output(void);
+void init_gptmr4_channel_pin_as_capture(void);
+void init_gptmr5_channel2_pin_as_output(void);
+void init_gptmr5_channel3_pin_as_output(void);
+void init_clk_ref_pin(void);
+void init_brownout_indicate_pin(void);
+void board_init_i2c_eeprom_pin(void);
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* HPM_PINMUX_H */
diff --git a/hw/bsp/hpmicro/family.c b/hw/bsp/hpmicro/family.c
new file mode 100644
index 000000000..ffec2523a
--- /dev/null
+++ b/hw/bsp/hpmicro/family.c
@@ -0,0 +1,115 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: HPMicro
+*/
+
+#include "bsp/board_api.h"
+#include "board.h"
+#include "hpm_clock_drv.h"
+#include "hpm_uart_drv.h"
+#include "hpm_gpio_drv.h"
+#include "hpm_romapi.h"
+
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+// Initialize on-board peripherals : led, button, uart and USB
+void board_init(void) {
+  board_init_clock();
+  board_init_pmp();
+
+  board_init_usb(HPM_USB0);
+#ifdef HPM_USB1
+  board_init_usb(HPM_USB1);
+#endif
+
+  board_init_console();
+  board_init_gpio_pins();
+  board_init_led_pins();
+}
+
+//--------------------------------------------------------------------+
+// USB Interrupt Handler
+//--------------------------------------------------------------------+
+SDK_DECLARE_EXT_ISR_M(IRQn_USB0, isr_usb0)
+void isr_usb0(void) {
+  tusb_int_handler(0, true);
+}
+
+#ifdef HPM_USB1_BASE
+SDK_DECLARE_EXT_ISR_M(IRQn_USB1, isr_usb1)
+void isr_usb1(void) {
+  tusb_int_handler(1, true);
+}
+#endif
+
+void board_led_write(bool state) {
+  if (state) {
+    gpio_write_pin(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, BOARD_LED_ON_LEVEL);
+  } else {
+    gpio_write_pin(BOARD_LED_GPIO_CTRL, BOARD_LED_GPIO_INDEX, BOARD_LED_GPIO_PIN, BOARD_LED_OFF_LEVEL);
+  }
+}
+
+uint32_t board_button_read(void) {
+  return (gpio_read_pin(BOARD_APP_GPIO_CTRL, BOARD_APP_GPIO_INDEX, BOARD_APP_GPIO_PIN) == BOARD_BUTTON_PRESSED_VALUE) ? 1 : 0;
+}
+
+// Get characters from UART. Return number of read bytes
+int board_uart_read(uint8_t *buf, int len) {
+  int        count = 0;
+  hpm_stat_t status;
+
+  while (count < len) {
+    status = uart_try_receive_byte((UART_Type *)BOARD_CONSOLE_UART_BASE, (uint8_t *)&buf[count]);
+    if (status == status_success) {
+      count++;
+    } else {
+      break;
+    }
+  }
+
+  return count;
+}
+
+// Send characters to UART. Return number of sent bytes
+int board_uart_write(void const *buf, int len) {
+  uart_send_data((UART_Type *)BOARD_CONSOLE_UART_BASE, (uint8_t const *)buf, len);
+
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+// Get current milliseconds, must be implemented when no RTOS is used
+uint32_t board_millis(void) {
+  return (hpm_csr_get_core_cycle() / clock_get_core_clock_ticks_per_ms());
+}
+
+#endif
diff --git a/hw/bsp/hpmicro/family.cmake b/hw/bsp/hpmicro/family.cmake
new file mode 100644
index 000000000..4500f326f
--- /dev/null
+++ b/hw/bsp/hpmicro/family.cmake
@@ -0,0 +1,131 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/hpmicro/hpm_sdk)
+
+set(CROSS_COMPILE "riscv32-unknown-elf-")
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+if (NOT DEFINED CMAKE_SYSTEM_CPU)
+  set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor")
+endif ()
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS HPMIRCO CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${HPM_SOC}/toolchains/gcc/flash_xip.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+set(STARTUP_FILE_GNU ${HPM_SOC}/toolchains/gcc/start.S)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/pinmux.c
+    ${HPM_SOC}/boot/hpm_bootheader.c
+    ${HPM_SOC}/toolchains/gcc/initfini.c
+    ${HPM_SOC}/toolchains/reset.c
+    ${HPM_SOC}/toolchains/trap.c
+    ${HPM_SOC}/system.c
+    ${HPM_SOC}/hpm_sysctl_drv.c
+    ${HPM_SOC}/hpm_clock_drv.c
+    ${HPM_SOC}/hpm_otp_drv.c
+    ${SDK_DIR}/arch/riscv/l1c/hpm_l1c_drv.c
+    ${SDK_DIR}/drivers/src/hpm_gpio_drv.c
+    ${SDK_DIR}/drivers/src/hpm_uart_drv.c
+    ${SDK_DIR}/drivers/src/hpm_usb_drv.c
+    ${SDK_DIR}/drivers/src/hpm_pcfg_drv.c
+    ${SDK_DIR}/drivers/src/hpm_pmp_drv.c
+    ${SDK_DIR}/drivers/src/${HPM_PLLCTL_DRV_FILE}
+    )
+
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    FLASH_XIP
+    [=[CFG_TUD_MEM_SECTION=__attribute__((section(".noncacheable.non_init")))]=]
+    [=[CFG_TUH_MEM_SECTION=__attribute__((section(".noncacheable.non_init")))]=]
+    )
+
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
+    ${HPM_SOC}
+    ${HPM_IP_REGS}
+    ${HPM_SOC}/boot
+    ${HPM_SOC}/toolchains
+    ${HPM_SOC}/toolchains/gcc
+    ${SDK_DIR}/arch
+    ${SDK_DIR}/arch/riscv/intc
+    ${SDK_DIR}/arch/riscv/l1c
+    ${SDK_DIR}/drivers/inc
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_HPM)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${SDK_DIR}/utils/hpm_sbrk.c
+    ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+    ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+    ${TOP}/src/portable/ehci/ehci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${TOP}/src/portable/chipidea/ci_hs
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      -Wl,--defsym,_flash_size=${BOARD_FLASH_SIZE}
+      -Wl,--defsym,_stack_size=${BOARD_STACK_SIZE}
+      -Wl,--defsym,_heap_size=${BOARD_HEAP_SIZE}
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -Wl,--defsym,_flash_size=${BOARD_FLASH_SIZE}
+      -Wl,--defsym,_stack_size=${BOARD_STACK_SIZE}
+      -Wl,--defsym,_heap_size=${BOARD_HEAP_SIZE}
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(
+      ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      ${SDK_DIR}/utils/hpm_sbrk.c
+      PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-cast-align -Wno-discarded-qualifiers"
+    )
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/hpmicro/family.mk b/hw/bsp/hpmicro/family.mk
new file mode 100644
index 000000000..9721e2f7d
--- /dev/null
+++ b/hw/bsp/hpmicro/family.mk
@@ -0,0 +1,76 @@
+SDK_DIR = hw/mcu/hpmicro/hpm_sdk
+
+CROSS_COMPILE ?= riscv32-unknown-elf-
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= rv32imac-ilp32
+
+# All source paths should be relative to the top level.
+LD_FILE = $(HPM_SOC)/toolchains/gcc/flash_xip.ld
+
+CFLAGS += \
+  -DFLASH_XIP \
+  -DCFG_TUSB_MCU=OPT_MCU_HPM \
+  -DCFG_TUD_MEM_SECTION='__attribute__((section(".noncacheable.non_init")))' \
+  -DCFG_TUH_MEM_SECTION='__attribute__((section(".noncacheable.non_init")))'
+
+ifdef BOARD_TUD_RHPORT
+CFLAGS += -DBOARD_TUD_RHPORT=$(BOARD_TUD_RHPORT)
+CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+endif
+
+ifdef BOARD_TUH_RHPORT
+CFLAGS += -DBOARD_TUH_RHPORT=$(BOARD_TUH_RHPORT)
+CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+endif
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=cast-align -Wno-error=double-promotion -Wno-error=discarded-qualifiers \
+          -Wno-error=undef -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+LDFLAGS_GCC += \
+  -nostartfiles \
+  --specs=nosys.specs --specs=nano.specs
+
+LDFLAGS += -Wl,--defsym,_flash_size=$(BOARD_FLASH_SIZE)
+LDFLAGS += -Wl,--defsym,_stack_size=$(BOARD_STACK_SIZE)
+LDFLAGS += -Wl,--defsym,_heap_size=$(BOARD_HEAP_SIZE)
+
+SRC_C += \
+	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
+	src/portable/chipidea/ci_hs/hcd_ci_hs.c \
+	src/portable/ehci/ehci.c \
+	${BOARD_PATH}/board.c \
+	${BOARD_PATH}/pinmux.c \
+	$(HPM_SOC)/boot/hpm_bootheader.c \
+	$(HPM_SOC)/toolchains/gcc/initfini.c \
+	$(HPM_SOC)/toolchains/reset.c \
+	$(HPM_SOC)/toolchains/trap.c \
+	$(HPM_SOC)/system.c \
+	$(HPM_SOC)/hpm_sysctl_drv.c \
+	$(HPM_SOC)/hpm_clock_drv.c \
+	$(HPM_SOC)/hpm_otp_drv.c \
+	$(SDK_DIR)/arch/riscv/l1c/hpm_l1c_drv.c \
+	$(SDK_DIR)/utils/hpm_sbrk.c \
+	$(SDK_DIR)/drivers/src/hpm_gpio_drv.c \
+	$(SDK_DIR)/drivers/src/hpm_uart_drv.c \
+	$(SDK_DIR)/drivers/src/hpm_usb_drv.c \
+	$(SDK_DIR)/drivers/src/hpm_pcfg_drv.c \
+	$(SDK_DIR)/drivers/src/hpm_pmp_drv.c \
+	$(SDK_DIR)/drivers/src/$(HPM_PLLCTL_DRV_FILE) \
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/src/portable/chipidea/ci_hs \
+	$(TOP)/$(HPM_SOC) \
+	$(TOP)/$(HPM_IP_REGS) \
+	$(TOP)/$(HPM_SOC)/boot \
+	$(TOP)/$(HPM_SOC)/toolchains \
+	$(TOP)/$(HPM_SOC)/toolchains/gcc \
+	$(TOP)/$(SDK_DIR)/arch \
+	$(TOP)/$(SDK_DIR)/arch/riscv/intc \
+	$(TOP)/$(SDK_DIR)/arch/riscv/l1c \
+	$(TOP)/$(SDK_DIR)/drivers/inc \
+
+SRC_S += $(HPM_SOC)/toolchains/gcc/start.S
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 1e773bf96..95fbc061f 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -653,6 +653,18 @@
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 8
 
+//--------------------------------------------------------------------+
+// HPMicro
+//--------------------------------------------------------------------+
+#elif TU_CHECK_MCU(OPT_MCU_HPM)
+  #define TUP_USBIP_CHIPIDEA_HS
+  #define TUP_USBIP_EHCI
+
+  #define TUP_DCD_ENDPOINT_MAX    16
+  #define TUP_RHPORT_HIGHSPEED    1
+
+  #define TU_ATTR_FAST_FUNC __attribute__((section(".fast")))
+
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/chipidea/ci_hs/ci_hs_hpm.h b/src/portable/chipidea/ci_hs/ci_hs_hpm.h
new file mode 100644
index 000000000..68211448c
--- /dev/null
+++ b/src/portable/chipidea/ci_hs/ci_hs_hpm.h
@@ -0,0 +1,54 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef _CI_HS_HPM_H_
+#define _CI_HS_HPM_H_
+
+#include "ci_hs_type.h"
+#include "hpm_soc.h"
+#include "hpm_interrupt.h"
+#include "hpm_usb_drv.h"
+
+static const ci_hs_controller_t _ci_controller[] =
+{
+    { .reg_base = HPM_USB0_BASE, .irqnum = IRQn_USB0},
+    #ifdef HPM_USB1_BASE
+    { .reg_base = HPM_USB1_BASE, .irqnum = IRQn_USB1},
+    #endif
+};
+
+#define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
+
+//------------- DCD -------------//
+#define CI_DCD_INT_ENABLE(_p)   intc_m_enable_irq (_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  intc_m_disable_irq(_ci_controller[_p].irqnum)
+
+//------------- HCD -------------//
+#define CI_HCD_INT_ENABLE(_p)   intc_m_enable_irq (_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  intc_m_disable_irq(_ci_controller[_p].irqnum)
+
+
+#endif
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 4a5e5c91f..00df434d8 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -55,6 +55,10 @@ bool dcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
   // MCX N9 only port 1 use this controller
   #include "ci_hs_mcx.h"
 
+#elif TU_CHECK_MCU(OPT_MCU_HPM)
+
+  #include "ci_hs_hpm.h"
+
 #else
   #error "Unsupported MCUs"
 #endif
@@ -230,6 +234,10 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 
   TU_ASSERT(ci_ep_count(dcd_reg) <= TUP_DCD_ENDPOINT_MAX);
 
+#if TU_CHECK_MCU(OPT_MCU_HPM)
+  usb_phy_init((USB_Type *)dcd_reg, false);
+#endif
+
   // Reset controller
   dcd_reg->USBCMD |= USBCMD_RESET;
   while( dcd_reg->USBCMD & USBCMD_RESET ) {}
@@ -246,7 +254,11 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 #endif
 
 #if !TUD_OPT_HIGH_SPEED
-  dcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
+  dcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
+#endif
+
+#if TU_CHECK_MCU(OPT_MCU_HPM)
+  dcd_reg->PORTSC1 &= ~USB_PORTSC1_STS_MASK;
 #endif
 
   dcd_dcache_clean_invalidate(&_dcd_data, sizeof(dcd_data_t));
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index b5324a754..922d32989 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -61,6 +61,10 @@ bool hcd_dcache_clean_invalidate(void const* addr, uint32_t data_size) {
 
 #include "ci_hs_lpc18_43.h"
 
+#elif TU_CHECK_MCU(OPT_MCU_HPM)
+
+#include "ci_hs_hpm.h"
+
 #else
 #error "Unsupported MCUs"
 #endif
@@ -77,6 +81,10 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   (void) rh_init;
   ci_hs_regs_t *hcd_reg = CI_HS_REG(rhport);
 
+#if CFG_TUSB_MCU == OPT_MCU_HPM
+  usb_phy_init((USB_Type *)hcd_reg, true);
+#endif
+
   // Reset controller
   hcd_reg->USBCMD |= USBCMD_RESET;
   while ( hcd_reg->USBCMD & USBCMD_RESET ) {}
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index c33c970e4..0d6f5ef12 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -44,6 +44,10 @@
 #include "fsl_device_registers.h"
 #endif
 
+#if TU_CHECK_MCU(OPT_MCU_HPM)
+#include "ci_hs_hpm.h"
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO CONSTANT TYPEDEF
 //--------------------------------------------------------------------+
@@ -237,6 +241,14 @@ void hcd_port_reset(uint8_t rhport) {
   // mask out Write-1-to-Clear bits
   uint32_t portsc = regs->portsc & ~EHCI_PORTSC_MASK_W1C;
 
+#if TU_CHECK_MCU(OPT_MCU_HPM)
+  if (usb_phy_get_line_state((USB_Type *)CI_HS_REG(rhport)) == usb_line_state2) {
+      portsc |= USB_PORTSC1_STS_MASK;
+  } else {
+      portsc &= ~USB_PORTSC1_STS_MASK;
+  }
+#endif
+
   // EHCI Table 2-16 PortSC
   // when software writes Port Reset bit to a one, it must also write a zero to the Port Enable bit.
   portsc &= ~(EHCI_PORTSC_MASK_PORT_EANBLED);
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 1dc920d84..cd131c119 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -216,6 +216,9 @@
 #define OPT_MCU_AT32F425         2505  ///< ArteryTek AT32F425
 #define OPT_MCU_AT32F413         2506  ///< ArteryTek AT32F413
 
+// HPMicro
+#define OPT_MCU_HPM              2600  ///< HPMicro
+
 // Check if configured MCU is one of listed
 // Apply TU_MCU_IS_EQUAL with || as separator to list of input
 #define TU_MCU_IS_EQUAL(_m)  (CFG_TUSB_MCU == (_m))
diff --git a/tools/get_deps.py b/tools/get_deps.py
index b1b50d319..42ead17ff 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -244,6 +244,9 @@ deps_optional = {
     'hw/mcu/artery/at32f413': ['https://github.com/ArteryTek/AT32F413_Firmware_Library.git',
                                'f6fe62dfec9fd40c5b63d92fc5ef2c2b5e77a450',
                                'at32f413'],
+    'hw/mcu/hpmicro/hpm_sdk': ['https://github.com/hpmicro/hpm_sdk',
+                               '8d2af741ecc4aaa82d7ee395dc1ce25d7070c3ff',
+                               'hpm_sdk hpmicro hpm6750 hpm6300 hpm6200 hpm6800 hpm5300 hpm6e00 hpm5e00'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
                     'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
-- 
cgit v1.3.1


From 15e3324579f3506730b6669730d8243a150d67ff Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Thu, 11 Dec 2025 10:56:18 +0100
Subject: cleanup, add preset

Signed-off-by: Zixun LI <admin@hifiphile.com>
Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/BoardPresets.json    | 66 +++++++++++++++------------------------------
 hw/bsp/hpmicro/family.cmake |  4 +--
 hw/bsp/hpmicro/family.mk    |  2 --
 tools/get_deps.py           |  2 +-
 4 files changed, 24 insertions(+), 50 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 5df924138..8829e65f8 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -234,6 +234,10 @@
       "name": "frdm_mcxn947",
       "inherits": "default"
     },
+    {
+      "name": "hpm6750evk2",
+      "inherits": "default"
+    },
     {
       "name": "itsybitsy_m0",
       "inherits": "default"
@@ -362,10 +366,6 @@
       "name": "metro_m7_1011_sd",
       "inherits": "default"
     },
-    {
-      "name": "metro_nrf52840",
-      "inherits": "default"
-    },
     {
       "name": "mimxrt1010_evk",
       "inherits": "default"
@@ -518,10 +518,6 @@
       "name": "raspberry_pi_pico2",
       "inherits": "default"
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "inherits": "default"
-    },
     {
       "name": "raspberry_pi_pico_w",
       "inherits": "default"
@@ -1228,6 +1224,11 @@
       "description": "Build preset for the frdm_mcxn947 board",
       "configurePreset": "frdm_mcxn947"
     },
+    {
+      "name": "hpm6750evk2",
+      "description": "Build preset for the hpm6750evk2 board",
+      "configurePreset": "hpm6750evk2"
+    },
     {
       "name": "itsybitsy_m0",
       "description": "Build preset for the itsybitsy_m0 board",
@@ -1388,11 +1389,6 @@
       "description": "Build preset for the metro_m7_1011_sd board",
       "configurePreset": "metro_m7_1011_sd"
     },
-    {
-      "name": "metro_nrf52840",
-      "description": "Build preset for the metro_nrf52840 board",
-      "configurePreset": "metro_nrf52840"
-    },
     {
       "name": "mimxrt1010_evk",
       "description": "Build preset for the mimxrt1010_evk board",
@@ -1583,11 +1579,6 @@
       "description": "Build preset for the raspberry_pi_pico2 board",
       "configurePreset": "raspberry_pi_pico2"
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "description": "Build preset for the raspberry_pi_pico2_riscv board",
-      "configurePreset": "raspberry_pi_pico2_riscv"
-    },
     {
       "name": "raspberry_pi_pico_w",
       "description": "Build preset for the raspberry_pi_pico_w board",
@@ -2854,6 +2845,19 @@
         }
       ]
     },
+    {
+      "name": "hpm6750evk2",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "hpm6750evk2"
+        },
+        {
+          "type": "build",
+          "name": "hpm6750evk2"
+        }
+      ]
+    },
     {
       "name": "itsybitsy_m0",
       "steps": [
@@ -3270,19 +3274,6 @@
         }
       ]
     },
-    {
-      "name": "metro_nrf52840",
-      "steps": [
-        {
-          "type": "configure",
-          "name": "metro_nrf52840"
-        },
-        {
-          "type": "build",
-          "name": "metro_nrf52840"
-        }
-      ]
-    },
     {
       "name": "mimxrt1010_evk",
       "steps": [
@@ -3777,19 +3768,6 @@
         }
       ]
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "steps": [
-        {
-          "type": "configure",
-          "name": "raspberry_pi_pico2_riscv"
-        },
-        {
-          "type": "build",
-          "name": "raspberry_pi_pico2_riscv"
-        }
-      ]
-    },
     {
       "name": "raspberry_pi_pico_w",
       "steps": [
diff --git a/hw/bsp/hpmicro/family.cmake b/hw/bsp/hpmicro/family.cmake
index 4500f326f..1289859d3 100644
--- a/hw/bsp/hpmicro/family.cmake
+++ b/hw/bsp/hpmicro/family.cmake
@@ -2,8 +2,6 @@ include_guard()
 
 set(SDK_DIR ${TOP}/hw/mcu/hpmicro/hpm_sdk)
 
-set(CROSS_COMPILE "riscv32-unknown-elf-")
-
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 
@@ -13,7 +11,7 @@ if (NOT DEFINED CMAKE_SYSTEM_CPU)
 endif ()
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS HPMIRCO CACHE INTERNAL "")
+set(FAMILY_MCUS HPMICRO CACHE INTERNAL "")
 
 #------------------------------------
 # Startup & Linker script
diff --git a/hw/bsp/hpmicro/family.mk b/hw/bsp/hpmicro/family.mk
index 9721e2f7d..f8cde55eb 100644
--- a/hw/bsp/hpmicro/family.mk
+++ b/hw/bsp/hpmicro/family.mk
@@ -1,7 +1,5 @@
 SDK_DIR = hw/mcu/hpmicro/hpm_sdk
 
-CROSS_COMPILE ?= riscv32-unknown-elf-
-
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= rv32imac-ilp32
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 42ead17ff..9d9e8149f 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -246,7 +246,7 @@ deps_optional = {
                                'at32f413'],
     'hw/mcu/hpmicro/hpm_sdk': ['https://github.com/hpmicro/hpm_sdk',
                                '8d2af741ecc4aaa82d7ee395dc1ce25d7070c3ff',
-                               'hpm_sdk hpmicro hpm6750 hpm6300 hpm6200 hpm6800 hpm5300 hpm6e00 hpm5e00'],
+                               'hpmicro'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
                     'imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x '
-- 
cgit v1.3.1


From 5a7e5db78770d6fd37992b5812f910c3546f2a72 Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Tue, 16 Dec 2025 11:09:16 +0100
Subject: fix riscv toolchain

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 examples/build_system/make/toolchain/riscv_gcc.mk |  2 +-
 hw/bsp/family_support.mk                          | 17 +++++++++++++++--
 2 files changed, 16 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/examples/build_system/make/toolchain/riscv_gcc.mk b/examples/build_system/make/toolchain/riscv_gcc.mk
index 843aff38c..b5de12a83 100644
--- a/examples/build_system/make/toolchain/riscv_gcc.mk
+++ b/examples/build_system/make/toolchain/riscv_gcc.mk
@@ -1,7 +1,7 @@
 # makefile for arm gcc toolchain
 
 # Can be set by family, default to ARM GCC
-CROSS_COMPILE ?= riscv-none-embed-
+CROSS_COMPILE ?= riscv-none-elf-
 
 CC = $(CROSS_COMPILE)gcc
 CXX = $(CROSS_COMPILE)g++
diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
index db410a657..7122a7764 100644
--- a/hw/bsp/family_support.mk
+++ b/hw/bsp/family_support.mk
@@ -131,8 +131,21 @@ ifdef CPU_CORE
   include ${TOP}/examples/build_system/make/cpu/$(CPU_CORE).mk
 endif
 
-# toolchain specific
-include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
+# toolchain specific - select based on CPU architecture
+ifdef CPU_CORE
+  ifneq (,$(filter cortex% arm%,$(CPU_CORE)))
+    # ARM/Cortex architecture
+    include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
+  else ifneq (,$(filter rv%,$(CPU_CORE)))
+    # RISC-V architecture
+    include ${TOP}/examples/build_system/make/toolchain/riscv_$(TOOLCHAIN).mk
+  else
+    $(error Unsupported CPU_CORE architecture: $(CPU_CORE). Must start with cortex, arm, or rv)
+  endif
+else
+  # Default to ARM if CPU_CORE not specified
+  include ${TOP}/examples/build_system/make/toolchain/arm_$(TOOLCHAIN).mk
+endif
 
 #---------------------- FreeRTOS -----------------------
 FREERTOS_SRC = lib/FreeRTOS-Kernel
-- 
cgit v1.3.1


From 412f4d306901f6d373213b972191b2decba330a1 Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Tue, 16 Dec 2025 12:14:35 +0100
Subject: update preset

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 hw/bsp/BoardPresets.json | 66 ++++++++++++++++--------------------------------
 1 file changed, 22 insertions(+), 44 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 5df924138..5fbc378d2 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -234,6 +234,10 @@
       "name": "frdm_mcxn947",
       "inherits": "default"
     },
+    {
+      "name": "frdm_rw612",
+      "inherits": "default"
+    },
     {
       "name": "itsybitsy_m0",
       "inherits": "default"
@@ -362,10 +366,6 @@
       "name": "metro_m7_1011_sd",
       "inherits": "default"
     },
-    {
-      "name": "metro_nrf52840",
-      "inherits": "default"
-    },
     {
       "name": "mimxrt1010_evk",
       "inherits": "default"
@@ -518,10 +518,6 @@
       "name": "raspberry_pi_pico2",
       "inherits": "default"
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "inherits": "default"
-    },
     {
       "name": "raspberry_pi_pico_w",
       "inherits": "default"
@@ -1228,6 +1224,11 @@
       "description": "Build preset for the frdm_mcxn947 board",
       "configurePreset": "frdm_mcxn947"
     },
+    {
+      "name": "frdm_rw612",
+      "description": "Build preset for the frdm_rw612 board",
+      "configurePreset": "frdm_rw612"
+    },
     {
       "name": "itsybitsy_m0",
       "description": "Build preset for the itsybitsy_m0 board",
@@ -1388,11 +1389,6 @@
       "description": "Build preset for the metro_m7_1011_sd board",
       "configurePreset": "metro_m7_1011_sd"
     },
-    {
-      "name": "metro_nrf52840",
-      "description": "Build preset for the metro_nrf52840 board",
-      "configurePreset": "metro_nrf52840"
-    },
     {
       "name": "mimxrt1010_evk",
       "description": "Build preset for the mimxrt1010_evk board",
@@ -1583,11 +1579,6 @@
       "description": "Build preset for the raspberry_pi_pico2 board",
       "configurePreset": "raspberry_pi_pico2"
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "description": "Build preset for the raspberry_pi_pico2_riscv board",
-      "configurePreset": "raspberry_pi_pico2_riscv"
-    },
     {
       "name": "raspberry_pi_pico_w",
       "description": "Build preset for the raspberry_pi_pico_w board",
@@ -2854,6 +2845,19 @@
         }
       ]
     },
+    {
+      "name": "frdm_rw612",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "frdm_rw612"
+        },
+        {
+          "type": "build",
+          "name": "frdm_rw612"
+        }
+      ]
+    },
     {
       "name": "itsybitsy_m0",
       "steps": [
@@ -3270,19 +3274,6 @@
         }
       ]
     },
-    {
-      "name": "metro_nrf52840",
-      "steps": [
-        {
-          "type": "configure",
-          "name": "metro_nrf52840"
-        },
-        {
-          "type": "build",
-          "name": "metro_nrf52840"
-        }
-      ]
-    },
     {
       "name": "mimxrt1010_evk",
       "steps": [
@@ -3777,19 +3768,6 @@
         }
       ]
     },
-    {
-      "name": "raspberry_pi_pico2_riscv",
-      "steps": [
-        {
-          "type": "configure",
-          "name": "raspberry_pi_pico2_riscv"
-        },
-        {
-          "type": "build",
-          "name": "raspberry_pi_pico2_riscv"
-        }
-      ]
-    },
     {
       "name": "raspberry_pi_pico_w",
       "steps": [
-- 
cgit v1.3.1


From c130fc07c628a0b2d79f35b743857aa53d79130b Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Tue, 16 Dec 2025 12:29:04 +0100
Subject: fix pre-commit

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 hw/bsp/rw61x/boards/frdm_rw612/board.cmake    | 2 +-
 hw/bsp/rw61x/boards/frdm_rw612/board.h        | 6 ++----
 hw/bsp/rw61x/boards/frdm_rw612/clock_config.c | 1 -
 hw/bsp/rw61x/boards/frdm_rw612/clock_config.h | 1 -
 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c      | 2 +-
 hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h      | 2 +-
 hw/bsp/rw61x/family.c                         | 6 +++---
 hw/bsp/rw61x/family.cmake                     | 4 ++--
 hw/bsp/rw61x/family.mk                        | 4 ++--
 src/tusb_option.h                             | 2 +-
 10 files changed, 13 insertions(+), 17 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rw61x/boards/frdm_rw612/board.cmake b/hw/bsp/rw61x/boards/frdm_rw612/board.cmake
index 09feb0cab..7d77956fa 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/board.cmake
+++ b/hw/bsp/rw61x/boards/frdm_rw612/board.cmake
@@ -27,4 +27,4 @@ function(update_board BOARD_TARGET)
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${BOARD_DIR}/flash_config
     )
-endfunction()
\ No newline at end of file
+endfunction()
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/board.h b/hw/bsp/rw61x/boards/frdm_rw612/board.h
index ebb357c29..fd9eec8b6 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/board.h
+++ b/hw/bsp/rw61x/boards/frdm_rw612/board.h
@@ -41,8 +41,8 @@
 // LED - Green channel of RGB LED
 #define LED_GPIO              BOARD_INITLEDPINS_LED_GREEN_PERIPHERAL
 #define LED_CLK               kCLOCK_HsGpio0
-#define LED_PIN               BOARD_INITLEDPINS_LED_GREEN_PIN 
-#define LED_PORT              BOARD_INITLEDPINS_LED_GREEN_PORT 
+#define LED_PIN               BOARD_INITLEDPINS_LED_GREEN_PIN
+#define LED_PORT              BOARD_INITLEDPINS_LED_GREEN_PORT
 #define LED_STATE_ON          0
 
 // WAKE button (Dummy, use unused pin
@@ -72,5 +72,3 @@ static inline void board_uart_init_clock(void) {
 #endif
 
 #endif
-
-
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
index 513e40f66..9ad78fe43 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
+++ b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.c
@@ -167,4 +167,3 @@ void BOARD_BootClockRUN(void)
     /*!< Set SystemCoreClock variable. */
     SystemCoreClock = BOARD_BOOTCLOCKRUN_HCLK;
 }
-
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
index 3b467d869..57e3bbb4d 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
+++ b/hw/bsp/rw61x/boards/frdm_rw612/clock_config.h
@@ -113,4 +113,3 @@ void BOARD_BootClockRUN(void);
 
 
 #endif /* _CLOCK_CONFIG_H_ */
-
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
index 49b74b2bb..eba6b4123 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
+++ b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.c
@@ -53,7 +53,7 @@ BOARD_InitPins:
 /* FUNCTION ************************************************************************************************************
  *
  * Function Name : BOARD_InitPins
- * Description   : 
+ * Description   :
  *
  * END ****************************************************************************************************************/
 /* Function assigned for the Cortex-M33 */
diff --git a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
index f4c9a9127..c43b304d5 100644
--- a/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
+++ b/hw/bsp/rw61x/boards/frdm_rw612/pin_mux.h
@@ -54,7 +54,7 @@ void BOARD_InitBootPins(void);
                                                            /* @} */
 
 /*!
- * @brief 
+ * @brief
  *
  */
 void BOARD_InitPins(void); /* Function assigned for the Cortex-M33 */
diff --git a/hw/bsp/rw61x/family.c b/hw/bsp/rw61x/family.c
index 226956f15..265d5fcc0 100644
--- a/hw/bsp/rw61x/family.c
+++ b/hw/bsp/rw61x/family.c
@@ -51,7 +51,7 @@ void board_init(void) {
 
   // Init button pin, LED pins, SWD pins & UART pins
   BOARD_InitBootPins();
-  
+
   // Init Clocks
   BOARD_InitBootClocks();
 
@@ -86,8 +86,8 @@ void board_init(void) {
 
   // Enable USB Clock
   CLOCK_EnableClock(kCLOCK_Usb);
-  
-  // Enable USB PHY 
+
+  // Enable USB PHY
   CLOCK_EnableUsbhsPhyClock();
 }
 
diff --git a/hw/bsp/rw61x/family.cmake b/hw/bsp/rw61x/family.cmake
index 5428b7e50..62233a404 100644
--- a/hw/bsp/rw61x/family.cmake
+++ b/hw/bsp/rw61x/family.cmake
@@ -81,7 +81,7 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs 
+      --specs=nosys.specs
       --specs=nano.specs
       )
   endif()
@@ -99,4 +99,4 @@ function(family_configure_example TARGET RTOS)
   # Flashing & Binary Generation
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-endfunction()
\ No newline at end of file
+endfunction()
diff --git a/hw/bsp/rw61x/family.mk b/hw/bsp/rw61x/family.mk
index e715adfa8..08eafddbc 100644
--- a/hw/bsp/rw61x/family.mk
+++ b/hw/bsp/rw61x/family.mk
@@ -13,7 +13,7 @@ CFLAGS += \
   -DSERIAL_PORT_TYPE_UART=1 \
   -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED \
   -DBOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED	\
-  
+
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
 
@@ -35,7 +35,7 @@ SRC_C += \
 	$(SDK_DIR)/drivers/flexcomm/fsl_flexcomm.c \
 	$(SDK_DIR)/drivers/flexcomm/usart/fsl_usart.c \
 	$(SDK_DIR)/drivers/flexspi/fsl_flexspi.c \
-	
+
 INC += \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 413bf2a82..caf8c4156 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -199,7 +199,7 @@
 // NXP LPC MCX
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
 #define OPT_MCU_MCXA15           2301  ///< NXP MCX A15 Series
-#define OPT_MCU_RW61X            2302  ///< NXP RW61x Series 
+#define OPT_MCU_RW61X            2302  ///< NXP RW61x Series
 
 // Analog Devices
 #define OPT_MCU_MAX32690         2400  ///< ADI MAX32690
-- 
cgit v1.3.1


From cb1873881e3cc51f522978e165748ad7ef7a7b0a Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Tue, 16 Dec 2025 12:40:44 +0100
Subject: fix build

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 hw/bsp/rw61x/family.cmake | 14 +++++++++++---
 1 file changed, 11 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rw61x/family.cmake b/hw/bsp/rw61x/family.cmake
index 62233a404..8c332f96e 100644
--- a/hw/bsp/rw61x/family.cmake
+++ b/hw/bsp/rw61x/family.cmake
@@ -81,10 +81,18 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs
-      --specs=nano.specs
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
       )
-  endif()
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-- 
cgit v1.3.1


From ce7b15d6f94b1f8efe917f40eb61b8c3a703d0f8 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Tue, 16 Dec 2025 21:11:13 +0100
Subject: more fixes

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 .github/workflows/ci_set_matrix.py | 4 ++--
 README.rst                         | 4 ++--
 hw/bsp/rw61x/family.cmake          | 1 -
 hw/bsp/stm32h5/family.mk           | 1 +
 4 files changed, 5 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index b682da1a2..c276d5253 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -21,8 +21,8 @@ family_list = {
     "imxrt": ["arm-gcc", "arm-clang"],
     "kinetis_k kinetis_kl kinetis_k32l2": ["arm-gcc", "arm-clang"],
     "lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43": ["arm-gcc", "arm-clang"],
-    "lpc51 lpc54 lpc55 mcx rw61x": ["arm-gcc", "arm-clang"],
-    "maxim mm32 msp432e4 tm4c": ["arm-gcc"],
+    "lpc51 lpc54 lpc55": ["arm-gcc", "arm-clang"],
+    "maxim mcx mm32 msp432e4 rw61x tm4c": ["arm-gcc"],
     "msp430": ["msp430-gcc"],
     "nrf": ["arm-gcc", "arm-clang"],
     "nuc100_120 nuc121_125 nuc126 nuc505 xmc4000": ["arm-gcc"],
diff --git a/README.rst b/README.rst
index 58a9e393e..178a084ce 100644
--- a/README.rst
+++ b/README.rst
@@ -209,8 +209,8 @@ Supported CPUs
 |              |         +-------------------+--------+------+-----------+------------------------+--------------------+
 |              |         | A15               | ✔      |      |           | ci_fs                  |                    |
 |              +---------+-------------------+--------+------+-----------+------------------------+--------------------+
-|              | RW61x                       | ✔      | ✔    | ✔         | ci_hs, ehci            |                   |
-+--------------+-----------------------------+--------+------+-----------+------------------------+-------------------+
+|              | RW61x                       | ✔      | ✔    | ✔         | ci_hs, ehci            |                    |
++--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
 | Raspberry Pi | RP2040, RP2350              | ✔      | ✔    | ✖         | rp2040, pio_usb        |                    |
 +--------------+-----+-----------------------+--------+------+-----------+------------------------+--------------------+
 | Renesas      | RX  | 63N, 65N, 72N         | ✔      | ✔    | ✖         | rusb2                  |                    |
diff --git a/hw/bsp/rw61x/family.cmake b/hw/bsp/rw61x/family.cmake
index 8c332f96e..6782e87e3 100644
--- a/hw/bsp/rw61x/family.cmake
+++ b/hw/bsp/rw61x/family.cmake
@@ -82,7 +82,6 @@ function(family_configure_example TARGET RTOS)
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_link_options(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk
index 89a2eddd5..e34bb513e 100644
--- a/hw/bsp/stm32h5/family.mk
+++ b/hw/bsp/stm32h5/family.mk
@@ -49,6 +49,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_i2c.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_dma.c
 
 INC += \
-- 
cgit v1.3.1


From 49a8529dcf8f5b2616640e6f96dcb27e930d1f0d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 19 Dec 2025 12:24:06 +0700
Subject: clean up cmake, remove family_get_project_name()

---
 examples/CMakeLists.txt                            |  7 ++++++-
 examples/device/audio_4_channel_mic/CMakeLists.txt | 17 +++++++----------
 .../audio_4_channel_mic_freertos/CMakeLists.txt    | 17 +++++++----------
 examples/device/audio_test/CMakeLists.txt          | 15 ++++++---------
 examples/device/audio_test_freertos/CMakeLists.txt | 15 ++++++---------
 .../device/audio_test_multi_rate/CMakeLists.txt    | 15 ++++++---------
 examples/device/board_test/CMakeLists.txt          |  9 +++------
 examples/device/cdc_dual_ports/CMakeLists.txt      | 15 ++++++---------
 examples/device/cdc_msc/CMakeLists.txt             | 10 +++-------
 examples/device/cdc_msc_freertos/CMakeLists.txt    | 15 ++++++---------
 examples/device/cdc_uac2/CMakeLists.txt            | 17 +++++++----------
 examples/device/dfu/CMakeLists.txt                 | 15 ++++++---------
 examples/device/dfu_runtime/CMakeLists.txt         | 15 ++++++---------
 .../device/dynamic_configuration/CMakeLists.txt    | 15 ++++++---------
 examples/device/hid_boot_interface/CMakeLists.txt  | 15 ++++++---------
 examples/device/hid_composite/CMakeLists.txt       | 15 ++++++---------
 .../device/hid_composite_freertos/CMakeLists.txt   | 15 ++++++---------
 examples/device/hid_generic_inout/CMakeLists.txt   | 15 ++++++---------
 .../device/hid_multiple_interface/CMakeLists.txt   | 15 ++++++---------
 examples/device/midi_test/CMakeLists.txt           | 15 ++++++---------
 examples/device/midi_test_freertos/CMakeLists.txt  | 15 ++++++---------
 examples/device/msc_dual_lun/CMakeLists.txt        |  9 +++------
 examples/device/mtp/CMakeLists.txt                 |  9 +++------
 examples/device/net_lwip_webserver/CMakeLists.txt  | 22 ++++++++++------------
 examples/device/uac2_headset/CMakeLists.txt        | 15 ++++++---------
 examples/device/uac2_speaker_fb/CMakeLists.txt     | 15 ++++++---------
 examples/device/usbtmc/CMakeLists.txt              | 15 ++++++---------
 examples/device/video_capture/CMakeLists.txt       | 17 +++++++----------
 examples/device/video_capture_2ch/CMakeLists.txt   | 17 +++++++----------
 examples/device/webusb_serial/CMakeLists.txt       | 15 ++++++---------
 .../dual/host_hid_to_device_cdc/CMakeLists.txt     | 17 +++++++----------
 .../dual/host_info_to_device_cdc/CMakeLists.txt    | 17 +++++++----------
 examples/host/bare_api/CMakeLists.txt              | 15 ++++++---------
 examples/host/cdc_msc_hid/CMakeLists.txt           | 15 ++++++---------
 examples/host/cdc_msc_hid_freertos/CMakeLists.txt  | 15 ++++++---------
 examples/host/device_info/CMakeLists.txt           | 15 ++++++---------
 examples/host/hid_controller/CMakeLists.txt        | 15 ++++++---------
 examples/host/midi_rx/CMakeLists.txt               | 15 ++++++---------
 examples/host/msc_file_explorer/CMakeLists.txt     | 15 ++++++---------
 examples/typec/power_delivery/CMakeLists.txt       | 15 ++++++---------
 hw/bsp/family_support.cmake                        |  5 -----
 hw/bsp/rp2040/family.cmake                         |  2 +-
 src/common/tusb_debug.h                            |  9 +++++++++
 test/fuzz/device/cdc/CMakeLists.txt                | 15 ++++++---------
 test/fuzz/device/msc/CMakeLists.txt                | 15 ++++++---------
 test/fuzz/device/net/CMakeLists.txt                | 15 ++++++---------
 46 files changed, 267 insertions(+), 384 deletions(-)

(limited to 'hw')

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index b34131c2b..b458c9ce3 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -1,6 +1,5 @@
 cmake_minimum_required(VERSION 3.20)
 
-#set(CMAKE_EXPORT_COMPILE_COMMANDS ON)
 include(${CMAKE_CURRENT_SOURCE_DIR}/../hw/bsp/family_support.cmake)
 
 project(tinyusb_examples C CXX ASM)
@@ -27,3 +26,9 @@ add_custom_target(tinyusb_metrics
   COMMENT "Generating average code size metrics"
   VERBATIM
   )
+
+#add_custom_command(TARGET tinyusb_metrics POST_BUILD
+#  COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../tools/metrics.py compare ${TOP}/cmake-build/cmake-build-${BOARD}/metrics.json ${CMAKE_BINARY_DIR}/metrics.json
+#  COMMENT "Generating average code size metrics"
+#  VERBATIM
+#  )
diff --git a/examples/device/audio_4_channel_mic/CMakeLists.txt b/examples/device/audio_4_channel_mic/CMakeLists.txt
index c8086ae46..5d7ffa4fc 100644
--- a/examples/device/audio_4_channel_mic/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic/CMakeLists.txt
@@ -2,37 +2,34 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(audio_4_channel_mic C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Add libm for GCC
 if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-  target_link_libraries(${PROJECT} PUBLIC m)
+  target_link_libraries(${PROJECT_NAME} PUBLIC m)
 endif()
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt b/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
index c50d4fef7..d43a72e58 100644
--- a/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
+++ b/examples/device/audio_4_channel_mic_freertos/CMakeLists.txt
@@ -2,37 +2,34 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(audio_4_channel_mic_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Add libm for GCC
 if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-  target_link_libraries(${PROJECT} PUBLIC m)
+  target_link_libraries(${PROJECT_NAME} PUBLIC m)
 endif()
 
 # Configure compilation flags and libraries for the example with FreeRTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} freertos)
+family_configure_device_example(${PROJECT_NAME} freertos)
diff --git a/examples/device/audio_test/CMakeLists.txt b/examples/device/audio_test/CMakeLists.txt
index 6a7e68c3d..3382530c6 100644
--- a/examples/device/audio_test/CMakeLists.txt
+++ b/examples/device/audio_test/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(audio_test C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/audio_test_freertos/CMakeLists.txt b/examples/device/audio_test_freertos/CMakeLists.txt
index 6ce9e72fe..71d65eccc 100644
--- a/examples/device/audio_test_freertos/CMakeLists.txt
+++ b/examples/device/audio_test_freertos/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(audio_test_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example with FreeRTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} freertos)
+family_configure_device_example(${PROJECT_NAME} freertos)
diff --git a/examples/device/audio_test_multi_rate/CMakeLists.txt b/examples/device/audio_test_multi_rate/CMakeLists.txt
index 6a7e68c3d..c17831cda 100644
--- a/examples/device/audio_test_multi_rate/CMakeLists.txt
+++ b/examples/device/audio_test_multi_rate/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(audio_test_multi_rate C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/board_test/CMakeLists.txt b/examples/device/board_test/CMakeLists.txt
index 9a604a732..bd7b8e0ca 100644
--- a/examples/device/board_test/CMakeLists.txt
+++ b/examples/device/board_test/CMakeLists.txt
@@ -2,13 +2,10 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(board_test C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
@@ -18,7 +15,7 @@ endif()
 if (RTOS STREQUAL zephyr)
   set(EXE_NAME app)
 else()
-  set(EXE_NAME ${PROJECT})
+  set(EXE_NAME ${PROJECT_NAME})
   add_executable(${EXE_NAME})
 endif()
 
diff --git a/examples/device/cdc_dual_ports/CMakeLists.txt b/examples/device/cdc_dual_ports/CMakeLists.txt
index 6a7e68c3d..697906b83 100644
--- a/examples/device/cdc_dual_ports/CMakeLists.txt
+++ b/examples/device/cdc_dual_ports/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_dual_ports C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/cdc_msc/CMakeLists.txt b/examples/device/cdc_msc/CMakeLists.txt
index b07f92342..293b497a7 100644
--- a/examples/device/cdc_msc/CMakeLists.txt
+++ b/examples/device/cdc_msc/CMakeLists.txt
@@ -1,15 +1,11 @@
 cmake_minimum_required(VERSION 3.20)
-#set_property(GLOBAL PROPERTY USE_FOLDERS ON)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_msc C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
@@ -19,7 +15,7 @@ endif()
 if (RTOS STREQUAL zephyr)
   set(EXE_NAME app)
 else()
-  set(EXE_NAME ${PROJECT})
+  set(EXE_NAME ${PROJECT_NAME})
   add_executable(${EXE_NAME})
 endif()
 
diff --git a/examples/device/cdc_msc_freertos/CMakeLists.txt b/examples/device/cdc_msc_freertos/CMakeLists.txt
index f7636a07a..429000427 100644
--- a/examples/device/cdc_msc_freertos/CMakeLists.txt
+++ b/examples/device/cdc_msc_freertos/CMakeLists.txt
@@ -2,33 +2,30 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_msc_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example with FreeRTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} freertos)
+family_configure_device_example(${PROJECT_NAME} freertos)
diff --git a/examples/device/cdc_uac2/CMakeLists.txt b/examples/device/cdc_uac2/CMakeLists.txt
index c8c797637..fb14dc184 100644
--- a/examples/device/cdc_uac2/CMakeLists.txt
+++ b/examples/device/cdc_uac2/CMakeLists.txt
@@ -2,23 +2,20 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_uac2 C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/uac2_app.c
@@ -26,13 +23,13 @@ target_sources(${PROJECT} PUBLIC
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example... see the corresponding function
 # in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
 
 # Uncomment me to enable UART based debugging
-# pico_enable_stdio_uart(${PROJECT} 1)
+# pico_enable_stdio_uart(${PROJECT_NAME} 1)
diff --git a/examples/device/dfu/CMakeLists.txt b/examples/device/dfu/CMakeLists.txt
index 3da8ee3df..61d169460 100644
--- a/examples/device/dfu/CMakeLists.txt
+++ b/examples/device/dfu/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(dfu C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/dfu_runtime/CMakeLists.txt b/examples/device/dfu_runtime/CMakeLists.txt
index 3da8ee3df..8f6df9f75 100644
--- a/examples/device/dfu_runtime/CMakeLists.txt
+++ b/examples/device/dfu_runtime/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(dfu_runtime C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/dynamic_configuration/CMakeLists.txt b/examples/device/dynamic_configuration/CMakeLists.txt
index 8a62d6ba2..4a1b67a69 100644
--- a/examples/device/dynamic_configuration/CMakeLists.txt
+++ b/examples/device/dynamic_configuration/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(dynamic_configuration C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/hid_boot_interface/CMakeLists.txt b/examples/device/hid_boot_interface/CMakeLists.txt
index 3da8ee3df..2fee46517 100644
--- a/examples/device/hid_boot_interface/CMakeLists.txt
+++ b/examples/device/hid_boot_interface/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_boot_interface C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/hid_composite/CMakeLists.txt b/examples/device/hid_composite/CMakeLists.txt
index 3da8ee3df..f1ddbd125 100644
--- a/examples/device/hid_composite/CMakeLists.txt
+++ b/examples/device/hid_composite/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_composite C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/hid_composite_freertos/CMakeLists.txt b/examples/device/hid_composite_freertos/CMakeLists.txt
index 6ce9e72fe..b52373011 100644
--- a/examples/device/hid_composite_freertos/CMakeLists.txt
+++ b/examples/device/hid_composite_freertos/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_composite_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example with FreeRTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} freertos)
+family_configure_device_example(${PROJECT_NAME} freertos)
diff --git a/examples/device/hid_generic_inout/CMakeLists.txt b/examples/device/hid_generic_inout/CMakeLists.txt
index 3da8ee3df..b363c161b 100644
--- a/examples/device/hid_generic_inout/CMakeLists.txt
+++ b/examples/device/hid_generic_inout/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_generic_inout C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/hid_multiple_interface/CMakeLists.txt b/examples/device/hid_multiple_interface/CMakeLists.txt
index 3da8ee3df..f4a9895d5 100644
--- a/examples/device/hid_multiple_interface/CMakeLists.txt
+++ b/examples/device/hid_multiple_interface/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_multiple_interface C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/midi_test/CMakeLists.txt b/examples/device/midi_test/CMakeLists.txt
index 6a7e68c3d..09fbf20f0 100644
--- a/examples/device/midi_test/CMakeLists.txt
+++ b/examples/device/midi_test/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(midi_test C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/midi_test_freertos/CMakeLists.txt b/examples/device/midi_test_freertos/CMakeLists.txt
index 6ce9e72fe..7e5d3e89e 100644
--- a/examples/device/midi_test_freertos/CMakeLists.txt
+++ b/examples/device/midi_test_freertos/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(midi_test_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example with FreeRTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} freertos)
+family_configure_device_example(${PROJECT_NAME} freertos)
diff --git a/examples/device/msc_dual_lun/CMakeLists.txt b/examples/device/msc_dual_lun/CMakeLists.txt
index 3955bfb49..72a55eebc 100644
--- a/examples/device/msc_dual_lun/CMakeLists.txt
+++ b/examples/device/msc_dual_lun/CMakeLists.txt
@@ -2,13 +2,10 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(msc_dual_lun C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
@@ -18,7 +15,7 @@ endif()
 if (RTOS STREQUAL zephyr)
   set(EXE_NAME app)
 else()
-  set(EXE_NAME ${PROJECT})
+  set(EXE_NAME ${PROJECT_NAME})
   add_executable(${EXE_NAME})
 endif()
 
diff --git a/examples/device/mtp/CMakeLists.txt b/examples/device/mtp/CMakeLists.txt
index e91eb8fd9..a9f2f1a90 100644
--- a/examples/device/mtp/CMakeLists.txt
+++ b/examples/device/mtp/CMakeLists.txt
@@ -2,13 +2,10 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(mtp C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
@@ -18,7 +15,7 @@ endif()
 if (RTOS STREQUAL zephyr)
   set(EXE_NAME app)
 else()
-  set(EXE_NAME ${PROJECT})
+  set(EXE_NAME ${PROJECT_NAME})
   add_executable(${EXE_NAME})
 endif()
 
diff --git a/examples/device/net_lwip_webserver/CMakeLists.txt b/examples/device/net_lwip_webserver/CMakeLists.txt
index 87b92f4dc..9c4349d24 100644
--- a/examples/device/net_lwip_webserver/CMakeLists.txt
+++ b/examples/device/net_lwip_webserver/CMakeLists.txt
@@ -2,8 +2,6 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_LIST_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
 
 # Prefer the tinyusb lwip
 set(LWIP ${TOP}/lib/lwip)
@@ -14,25 +12,25 @@ if (NOT EXISTS ${LWIP}/src)
 endif()
 
 if (NOT EXISTS ${LWIP}/src)
-  family_example_missing_dependency(${PROJECT} "lib/lwip")
+  family_example_missing_dependency(${PROJECT_NAME} "lib/lwip")
   return()
 endif()
 
-project(${PROJECT} C CXX ASM)
+project(net_lwip_webserver C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_LIST_DIR}/src/main.c
   ${CMAKE_CURRENT_LIST_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_LIST_DIR}/src
   ${LWIP}/src/include
   ${LWIP}/src/include/ipv4
@@ -41,14 +39,14 @@ target_include_directories(${PROJECT} PUBLIC
   )
 
 # lib/networking sources
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${TOP}/lib/networking/dhserver.c
   ${TOP}/lib/networking/dnserver.c
   ${TOP}/lib/networking/rndis_reports.c
   )
 
 # lwip sources
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${LWIP}/src/core/altcp.c
   ${LWIP}/src/core/altcp_alloc.c
   ${LWIP}/src/core/altcp_tcp.c
@@ -86,7 +84,7 @@ target_sources(${PROJECT} PUBLIC
 
 # due to warnings from other net source, we need to prevent error from some of the warnings options
 if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-  target_compile_options(${PROJECT} PUBLIC
+  target_compile_options(${PROJECT_NAME} PUBLIC
     -Wno-error=null-dereference
     -Wno-error=conversion
     -Wno-error=sign-conversion
@@ -98,4 +96,4 @@ endif ()
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/uac2_headset/CMakeLists.txt b/examples/device/uac2_headset/CMakeLists.txt
index ced98a909..52b88aac0 100644
--- a/examples/device/uac2_headset/CMakeLists.txt
+++ b/examples/device/uac2_headset/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(uac2_headset C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/uac2_speaker_fb/CMakeLists.txt b/examples/device/uac2_speaker_fb/CMakeLists.txt
index ced98a909..cddbf6a31 100644
--- a/examples/device/uac2_speaker_fb/CMakeLists.txt
+++ b/examples/device/uac2_speaker_fb/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(uac2_speaker_fb C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/usbtmc/CMakeLists.txt b/examples/device/usbtmc/CMakeLists.txt
index d2deb72d5..6181c303b 100644
--- a/examples/device/usbtmc/CMakeLists.txt
+++ b/examples/device/usbtmc/CMakeLists.txt
@@ -2,33 +2,30 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(usbtmc C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usbtmc_app.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/video_capture/CMakeLists.txt b/examples/device/video_capture/CMakeLists.txt
index 90788fa60..1f9b851ff 100644
--- a/examples/device/video_capture/CMakeLists.txt
+++ b/examples/device/video_capture/CMakeLists.txt
@@ -2,38 +2,35 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(video_capture C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 if (FORCE_READONLY)
-target_compile_definitions(${PROJECT} PRIVATE
+target_compile_definitions(${PROJECT_NAME} PRIVATE
   CFG_EXAMPLE_VIDEO_READONLY
 )
 endif()
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
 )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
 )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/video_capture_2ch/CMakeLists.txt b/examples/device/video_capture_2ch/CMakeLists.txt
index 90788fa60..cb1785d1f 100644
--- a/examples/device/video_capture_2ch/CMakeLists.txt
+++ b/examples/device/video_capture_2ch/CMakeLists.txt
@@ -2,38 +2,35 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(video_capture_2ch C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 if (FORCE_READONLY)
-target_compile_definitions(${PROJECT} PRIVATE
+target_compile_definitions(${PROJECT_NAME} PRIVATE
   CFG_EXAMPLE_VIDEO_READONLY
 )
 endif()
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
 )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
 )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/device/webusb_serial/CMakeLists.txt b/examples/device/webusb_serial/CMakeLists.txt
index ced98a909..3b214e7c9 100644
--- a/examples/device/webusb_serial/CMakeLists.txt
+++ b/examples/device/webusb_serial/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(webusb_serial C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
index 6ae5b5766..38c678cf2 100644
--- a/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_hid_to_device_cdc/CMakeLists.txt
@@ -2,34 +2,31 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(host_hid_to_device_cdc C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_dual_usb_example(${PROJECT} noos)
+family_configure_dual_usb_example(${PROJECT_NAME} noos)
 
 # due to warnings from Pico-PIO-USB
 if (FAMILY STREQUAL rp2040)
-  target_compile_options(${PROJECT} PUBLIC
+  target_compile_options(${PROJECT_NAME} PUBLIC
     -Wno-error=shadow
     -Wno-error=cast-align
     -Wno-error=cast-qual
diff --git a/examples/dual/host_info_to_device_cdc/CMakeLists.txt b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
index ad3c5ddf0..87b5336f1 100644
--- a/examples/dual/host_info_to_device_cdc/CMakeLists.txt
+++ b/examples/dual/host_info_to_device_cdc/CMakeLists.txt
@@ -2,39 +2,36 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(host_info_to_device_cdc C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_dual_usb_example(${PROJECT} ${RTOS})
+family_configure_dual_usb_example(${PROJECT_NAME} ${RTOS})
 
 # due to warnings from Pico-PIO-USB
 if (FAMILY STREQUAL rp2040)
-  target_compile_options(${PROJECT} PUBLIC
+  target_compile_options(${PROJECT_NAME} PUBLIC
     -Wno-error=shadow
     -Wno-error=cast-align
     -Wno-error=cast-qual
diff --git a/examples/host/bare_api/CMakeLists.txt b/examples/host/bare_api/CMakeLists.txt
index 0efe84b60..4993f93b9 100644
--- a/examples/host/bare_api/CMakeLists.txt
+++ b/examples/host/bare_api/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(bare_api C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/host/cdc_msc_hid/CMakeLists.txt b/examples/host/cdc_msc_hid/CMakeLists.txt
index e8928cda5..3098c37fa 100644
--- a/examples/host/cdc_msc_hid/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid/CMakeLists.txt
@@ -2,23 +2,20 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_msc_hid C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
@@ -26,10 +23,10 @@ target_sources(${PROJECT} PUBLIC
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/host/cdc_msc_hid_freertos/CMakeLists.txt b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
index 78b2784fe..3ceefb3f4 100644
--- a/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
+++ b/examples/host/cdc_msc_hid_freertos/CMakeLists.txt
@@ -2,23 +2,20 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(cdc_msc_hid_freertos C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/cdc_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
@@ -26,10 +23,10 @@ target_sources(${PROJECT} PUBLIC
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} freertos)
+family_configure_host_example(${PROJECT_NAME} freertos)
diff --git a/examples/host/device_info/CMakeLists.txt b/examples/host/device_info/CMakeLists.txt
index 33953233d..9b96a8af8 100644
--- a/examples/host/device_info/CMakeLists.txt
+++ b/examples/host/device_info/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(device_info C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/host/hid_controller/CMakeLists.txt b/examples/host/hid_controller/CMakeLists.txt
index fb5faf210..287e9fb7f 100644
--- a/examples/host/hid_controller/CMakeLists.txt
+++ b/examples/host/hid_controller/CMakeLists.txt
@@ -2,32 +2,29 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(hid_controller C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/hid_app.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/host/midi_rx/CMakeLists.txt b/examples/host/midi_rx/CMakeLists.txt
index 33953233d..62bb89e95 100644
--- a/examples/host/midi_rx/CMakeLists.txt
+++ b/examples/host/midi_rx/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(midi_rx C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index e9c15b7c1..21703030c 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -2,23 +2,20 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(msc_file_explorer C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_app.c
   ${TOP}/lib/fatfs/source/ff.c
@@ -34,7 +31,7 @@ if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
 endif ()
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   ${TOP}/lib/fatfs/source
   ${TOP}/lib/embedded-cli
@@ -42,4 +39,4 @@ target_include_directories(${PROJECT} PUBLIC
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_host_example(${PROJECT} noos)
+family_configure_host_example(${PROJECT_NAME} noos)
diff --git a/examples/typec/power_delivery/CMakeLists.txt b/examples/typec/power_delivery/CMakeLists.txt
index 837b4996a..728221eb4 100644
--- a/examples/typec/power_delivery/CMakeLists.txt
+++ b/examples/typec/power_delivery/CMakeLists.txt
@@ -2,31 +2,28 @@ cmake_minimum_required(VERSION 3.20)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT} C CXX ASM)
+project(power_delivery C CXX ASM)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
 # Espressif has its own cmake build system
 if(FAMILY STREQUAL "espressif")
   return()
 endif()
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 5eadcdaa9..baa8422fe 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -207,11 +207,6 @@ function(family_add_subdirectory DIR)
   endif()
 endfunction()
 
-function(family_get_project_name OUTPUT_NAME DIR)
-  get_filename_component(SHORT_NAME ${DIR} NAME)
-  set(${OUTPUT_NAME} ${TINYUSB_FAMILY_PROJECT_NAME_PREFIX}${SHORT_NAME} PARENT_SCOPE)
-endfunction()
-
 function(family_initialize_project PROJECT DIR)
   # set output suffix to .elf (skip espressif and rp2040)
   if(NOT FAMILY STREQUAL "espressif" AND NOT FAMILY STREQUAL "rp2040")
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 390d6072c..1602e35eb 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -296,7 +296,7 @@ function(family_configure_host_example TARGET RTOS)
 		# Pico-PIO-USB does not compile with all pico-sdk supported compilers, so check before enabling it
 		is_compiler_supported_by_pico_pio_usb(PICO_PIO_USB_COMPILER_SUPPORTED)
 		if (PICO_PIO_USB_COMPILER_SUPPORTED)
-			family_add_pico_pio_usb(${PROJECT})
+			family_add_pico_pio_usb(${TARGET})
 		endif()
 	endif()
 
diff --git a/src/common/tusb_debug.h b/src/common/tusb_debug.h
index 470a8a18b..ba5b4afd1 100644
--- a/src/common/tusb_debug.h
+++ b/src/common/tusb_debug.h
@@ -117,7 +117,16 @@ static inline const char* tu_lookup_find(tu_lookup_table_t const* p_table, uint3
     }
   }
 
+  #ifndef CFG_TUSB_DEBUG_PRINTF
+  // not found return the key value in hex if no custom printf is defined
+  static char not_found[11];
+  if (snprintf(not_found, sizeof(not_found), "0x%08lX", (unsigned long)key) <= 0) {
+    not_found[0] = 0;
+  }
+  return not_found;
+  #else
   return "NotFound";
+  #endif
 }
 
 #endif // CFG_TUSB_DEBUG
diff --git a/test/fuzz/device/cdc/CMakeLists.txt b/test/fuzz/device/cdc/CMakeLists.txt
index c60f292b9..85094cfb1 100644
--- a/test/fuzz/device/cdc/CMakeLists.txt
+++ b/test/fuzz/device/cdc/CMakeLists.txt
@@ -2,28 +2,25 @@ cmake_minimum_required(VERSION 3.5)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT})
+project(cdc)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
   ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
   )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
   )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/test/fuzz/device/msc/CMakeLists.txt b/test/fuzz/device/msc/CMakeLists.txt
index 8bff217cb..6eb6c8c46 100644
--- a/test/fuzz/device/msc/CMakeLists.txt
+++ b/test/fuzz/device/msc/CMakeLists.txt
@@ -2,28 +2,25 @@ cmake_minimum_required(VERSION 3.5)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT})
+project(msc)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
diff --git a/test/fuzz/device/net/CMakeLists.txt b/test/fuzz/device/net/CMakeLists.txt
index 8bff217cb..84e92ad2f 100644
--- a/test/fuzz/device/net/CMakeLists.txt
+++ b/test/fuzz/device/net/CMakeLists.txt
@@ -2,28 +2,25 @@ cmake_minimum_required(VERSION 3.5)
 
 include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
 
-# gets PROJECT name for the example (e.g. <BOARD>-<DIR_NAME>)
-family_get_project_name(PROJECT ${CMAKE_CURRENT_LIST_DIR})
-
-project(${PROJECT})
+project(net)
 
 # Checks this example is valid for the family and initializes the project
-family_initialize_project(${PROJECT} ${CMAKE_CURRENT_LIST_DIR})
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
 
-add_executable(${PROJECT})
+add_executable(${PROJECT_NAME})
 
 # Example source
-target_sources(${PROJECT} PUBLIC
+target_sources(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/msc_disk.c
         ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
         )
 
 # Example include
-target_include_directories(${PROJECT} PUBLIC
+target_include_directories(${PROJECT_NAME} PUBLIC
         ${CMAKE_CURRENT_SOURCE_DIR}/src
         )
 
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
-family_configure_device_example(${PROJECT} noos)
+family_configure_device_example(${PROJECT_NAME} noos)
-- 
cgit v1.3.1


From 5c8d5fbcc0e88c3ea40936f88c7912862b652d6c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 20 Dec 2025 23:08:40 +0700
Subject: SCB_EnableDCache() is required for rt1011

---
 hw/bsp/imxrt/family.c     | 19 +++++++------------
 hw/bsp/imxrt/family.cmake | 28 +++++++++-------------------
 hw/bsp/imxrt/family.mk    |  1 +
 3 files changed, 17 insertions(+), 31 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index 18833da80..d54b41bdb 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -107,6 +107,13 @@ static void init_usb_phy(uint8_t usb_id) {
 }
 
 void board_init(void) {
+// make sure the dcache is on.
+#if defined(__DCACHE_PRESENT) && __DCACHE_PRESENT
+  if (SCB_CCR_DC_Msk != (SCB_CCR_DC_Msk & SCB->CCR)) {
+    SCB_EnableDCache();
+  }
+#endif
+
   BOARD_InitBootPins();
   BOARD_BootClockRUN();
   SystemCoreClockUpdate();
@@ -237,21 +244,9 @@ uint32_t board_millis(void) {
 }
 #endif
 
-
-#ifndef __ICCARM__
-// Implement _start() since we use linker flag '-nostartfiles'.
-// Requires defined __STARTUP_CLEAR_BSS,
-extern int main(void);
-TU_ATTR_UNUSED void _start(void) {
-  // called by startup code
-  main();
-  while (1) {}
-}
-
 #ifdef __clang__
 void _exit(int __status) {
   (void) __status;
   while (1) {}
 }
 #endif
-#endif
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index 11cc00983..d946b591d 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -44,7 +44,6 @@ function(family_add_board BOARD_TARGET)
     ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
     ${SDK_DIR}/drivers/ocotp/fsl_ocotp.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT_WITH_CORE}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
     )
 
@@ -56,11 +55,6 @@ function(family_add_board BOARD_TARGET)
     endif()
   endforeach()
 
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    __STARTUP_CLEAR_BSS
-    [=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
-    )
-
   if (NOT M4 STREQUAL "1")
     target_compile_definitions(${BOARD_TARGET} PUBLIC
       XIP_EXTERNAL_FLASH=1
@@ -74,7 +68,6 @@ function(family_add_board BOARD_TARGET)
     ${CMSIS_DIR}/CMSIS/Core/Include
     ${SDK_DIR}/devices/${MCU_VARIANT}
     ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    #${SDK_DIR}/drivers/adc_12b1msps_sar
     ${SDK_DIR}/drivers/common
     ${SDK_DIR}/drivers/igpio
     ${SDK_DIR}/drivers/lpspi
@@ -92,12 +85,13 @@ function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
   family_add_tinyusb(${TARGET} OPT_MCU_MIMXRT1XXX)
 
-  target_sources(${TARGET} PUBLIC
+  target_sources(${TARGET} PRIVATE
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
+    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
@@ -105,26 +99,22 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     )
+  target_compile_definitions(${TARGET} PUBLIC
+    __START=main # required with -nostartfiles
+    __STARTUP_CLEAR_BSS
+    [=[CFG_TUSB_MEM_SECTION=__attribute__((section("NonCacheable")))]=]
+    )
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--script=${LD_FILE_GNU}"
       -nostartfiles
       --specs=nosys.specs --specs=nano.specs
-      # force linker to look for these symbols
-      -Wl,-uimage_vector_table
-      -Wl,-ug_boot_data
       )
   elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      -Wl,-uimage_vector_table
-      -Wl,-ug_boot_data
-      )
+    target_link_options(${TARGET} PRIVATE "LINKER:--script=${LD_FILE_GNU}")
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
+    target_link_options(${TARGET} PRIVATE "LINKER:--config=${LD_FILE_IAR}")
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 353f64e57..42000671d 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -8,6 +8,7 @@ MCU_VARIANT_WITH_CORE = ${MCU_VARIANT}${MCU_CORE}
 MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
 
 CFLAGS += \
+	-D__START=main \
   -D__STARTUP_CLEAR_BSS \
   -DCFG_TUSB_MCU=OPT_MCU_MIMXRT1XXX \
   -DCFG_TUSB_MEM_SECTION='__attribute__((section("NonCacheable")))' \
-- 
cgit v1.3.1


From 239e20ba7399fc026325c4cd8c98c08a160a9773 Mon Sep 17 00:00:00 2001
From: zhiqiang-ch <zhiqiangyou@arterytek.com>
Date: Tue, 30 Dec 2025 10:44:03 +0800
Subject: support for the AT32F45X series

---
 README.rst                                       |   3 +-
 docs/reference/boards.rst                        |   3 +
 docs/reference/dependencies.rst                  |   1 +
 hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h  | 177 ++++++++++++++++
 hw/bsp/at32f45x/at32f45x_clock.c                 | 114 ++++++++++
 hw/bsp/at32f45x/at32f45x_clock.h                 |  45 ++++
 hw/bsp/at32f45x/at32f45x_conf.h                  | 174 +++++++++++++++
 hw/bsp/at32f45x/at32f45x_int.c                   | 101 +++++++++
 hw/bsp/at32f45x/at32f45x_int.h                   |  60 ++++++
 hw/bsp/at32f45x/boards/at_start_f455/board.cmake |   8 +
 hw/bsp/at32f45x/boards/at_start_f455/board.h     |  96 +++++++++
 hw/bsp/at32f45x/boards/at_start_f455/board.mk    |   7 +
 hw/bsp/at32f45x/boards/at_start_f456/board.cmake |   8 +
 hw/bsp/at32f45x/boards/at_start_f456/board.h     |  96 +++++++++
 hw/bsp/at32f45x/boards/at_start_f456/board.mk    |   7 +
 hw/bsp/at32f45x/boards/at_start_f457/board.cmake |   8 +
 hw/bsp/at32f45x/boards/at_start_f457/board.h     |  96 +++++++++
 hw/bsp/at32f45x/boards/at_start_f457/board.mk    |   7 +
 hw/bsp/at32f45x/family.c                         | 258 +++++++++++++++++++++++
 hw/bsp/at32f45x/family.cmake                     |  97 +++++++++
 hw/bsp/at32f45x/family.mk                        |  40 ++++
 src/common/tusb_mcu.h                            |   5 +
 src/portable/synopsys/dwc2/dwc2_at32.h           |   5 +
 src/tusb_option.h                                |   1 +
 tools/get_deps.py                                |   3 +
 25 files changed, 1419 insertions(+), 1 deletion(-)
 create mode 100644 hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/at32f45x/at32f45x_clock.c
 create mode 100644 hw/bsp/at32f45x/at32f45x_clock.h
 create mode 100644 hw/bsp/at32f45x/at32f45x_conf.h
 create mode 100644 hw/bsp/at32f45x/at32f45x_int.c
 create mode 100644 hw/bsp/at32f45x/at32f45x_int.h
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f455/board.cmake
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f455/board.h
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f455/board.mk
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f456/board.cmake
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f456/board.h
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f456/board.mk
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f457/board.cmake
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f457/board.h
 create mode 100644 hw/bsp/at32f45x/boards/at_start_f457/board.mk
 create mode 100644 hw/bsp/at32f45x/family.c
 create mode 100644 hw/bsp/at32f45x/family.cmake
 create mode 100644 hw/bsp/at32f45x/family.mk

(limited to 'hw')

diff --git a/README.rst b/README.rst
index 178a084ce..29b2f4fca 100644
--- a/README.rst
+++ b/README.rst
@@ -141,7 +141,8 @@ Supported CPUs
 +--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
 | Artery AT32  | F403a_407, F413             | ✔      |      |           | fsdev                  | Packet SRAM 512    |
 |              +-----------------------------+--------+------+-----------+------------------------+--------------------+
-|              | F415, F435_437, F423, F425  | ✔      | ✔    |           | dwc2                   |                    |
+|              | F415, F435_437, F423,       | ✔      | ✔    |           | dwc2                   |                    |
+|              | F425, F45x                  |        |      |           |                        |                    |
 |              +-----------------------------+--------+------+-----------+------------------------+--------------------+
 |              | F402_F405                   | ✔      | ✔    | ✔         | dwc2                   | F405 is HS         |
 +--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 12da5c90b..cacf52e1a 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -44,6 +44,9 @@ at_start_f423              AT-START-F423                  at32f423       https:/
 at_start_f425              AT-START-F425                  at32f425       https://www.arterychip.com/en/product/AT32F425.jsp
 at_start_f435              AT-START-F435                  at32f435_437   https://www.arterychip.com/en/product/AT32F435.jsp
 at_start_f437              AT-START-F437                  at32f435_437   https://www.arterychip.com/en/product/AT32F437.jsp
+at_start_f455              AT-START-F455                  at32f45x       https://www.arterychip.com/en/product/AT32F455.jsp
+at_start_f456              AT-START-F456                  at32f45x       https://www.arterychip.com/en/product/AT32F456.jsp
+at_start_f457              AT-START-F457                  at32f45x       https://www.arterychip.com/en/product/AT32F457.jsp
 =========================  =============================  =============  ====================================================  ======
 
 Bridgetek
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index de1603383..ce5f265d5 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -16,6 +16,7 @@ hw/mcu/artery/at32f415                    https://github.com/ArteryTek/AT32F415_
 hw/mcu/artery/at32f423                    https://github.com/ArteryTek/AT32F423_Firmware_Library.git        2afa7f12852e57a9e8aab3a892c641e1a8635a18  at32f423
 hw/mcu/artery/at32f425                    https://github.com/ArteryTek/AT32F425_Firmware_Library.git        620233e1357d5c1b7e2bde6b9dd5196822b91817  at32f425
 hw/mcu/artery/at32f435_437                https://github.com/ArteryTek/AT32F435_437_Firmware_Library.git    25439cc6650a8ae0345934e8707a5f38c7ae41f8  at32f435_437
+hw/mcu/artery/at32f45x                    https://github.com/ArteryTek/AT32F45x_Firmware_Library.git        3d4a1b38be8ebac292e2350ca53bc4bfa4430233  at32f45x
 hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                       91060164afe239fcb394122e8bf9eb24d3194eb1  brtmm90x
 hw/mcu/broadcom                           https://github.com/adafruit/broadcom-peripherals.git              08370086080759ed54ac1136d62d2ad24c6fa267  broadcom_32bit broadcom_64bit
 hw/mcu/gd/nuclei-sdk                      https://github.com/Nuclei-Software/nuclei-sdk.git                 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7  gd32vf103
diff --git a/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..8a9906d39
--- /dev/null
+++ b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,177 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+// Include MCU header
+  #include "at32f45x.h"
+
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU								        0
+#define configENABLE_FPU								        1
+#define configENABLE_TRUSTZONE					        0
+#define configMINIMAL_SECURE_STACK_SIZE					( 1024 )
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+#ifdef __RX__
+/* Renesas RX series */
+#define vSoftwareInterruptISR					        INT_Excep_ICU_SWINT
+#define vTickISR								              INT_Excep_CMT0_CMI0
+#define configPERIPHERAL_CLOCK_HZ				      (configCPU_CLOCK_HZ/2)
+#define configKERNEL_INTERRUPT_PRIORITY			  1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY	4
+
+#else
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+#if defined(__NVIC_PRIO_BITS)
+  // For Cortex-M specific: __NVIC_PRIO_BITS is defined in core_cmx.h
+	#define configPRIO_BITS       __NVIC_PRIO_BITS
+
+#elif defined(__ECLIC_INTCTLBITS)
+  // RISC-V Bumblebee core from nuclei
+  #define configPRIO_BITS       __ECLIC_INTCTLBITS
+
+#elif defined(__IASMARM__)
+  // FIXME: IAR Assembler cannot include mcu header directly to get __NVIC_PRIO_BITS.
+  // Therefore we will hard coded it to minimum value of 2 to get pass ci build.
+  // IAR user must update this to correct value of the target MCU
+  #message "configPRIO_BITS is hard coded to 2 to pass IAR build only. User should update it per MCU"
+  #define configPRIO_BITS       2
+
+#else
+  #error "FreeRTOS configPRIO_BITS to be defined"
+#endif
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/at32f45x/at32f45x_clock.c b/hw/bsp/at32f45x/at32f45x_clock.c
new file mode 100644
index 000000000..12003cf5a
--- /dev/null
+++ b/hw/bsp/at32f45x/at32f45x_clock.c
@@ -0,0 +1,114 @@
+/**
+  **************************************************************************
+  * @file     at32f45x_clock.c
+  * @brief    system clock config program
+  **************************************************************************
+  *
+  * Copyright (c) 2025, Artery Technology, All rights reserved.
+  *
+  * The software Board Support Package (BSP) that is made available to
+  * download from Artery official website is the copyrighted work of Artery.
+  * Artery authorizes customers to use, copy, and distribute the BSP
+  * software and its related documentation for the purpose of design and
+  * development in conjunction with Artery microcontrollers. Use of the
+  * software is governed by this copyright notice and the following disclaimer.
+  *
+  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
+  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
+  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
+  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
+  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
+  *
+  **************************************************************************
+  */
+
+/* includes ------------------------------------------------------------------*/
+#include "at32f45x_clock.h"
+
+/**
+  * @brief  system clock config program
+  * @note   the system clock is configured as follow:
+  *         - system clock        = (hext * pll_ns)/(pll_ms * pll_fp)
+  *         - system clock source = pll (hext)
+  *         - hext                = 8000000
+  *         - sclk                = 192000000
+  *         - ahbdiv              = 1
+  *         - ahbclk              = 192000000
+  *         - apb2div             = 1
+  *         - apb2clk             = 192000000
+  *         - apb1div             = 1
+  *         - apb1clk             = 192000000
+  *         - pll_ns              = 96
+  *         - pll_ms              = 1
+  *         - pll_fp              = 4
+  * @param  none
+  * @retval none
+  */
+void system_clock_config(void)
+{
+  /* reset crm */
+  crm_reset();
+
+  /* set the flash clock divider */
+  flash_psr_set(FLASH_WAIT_CYCLE_5);
+
+    /* enable pwc periph clock */
+  crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
+ 
+  /* config ldo voltage */
+  pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
+
+  crm_clock_source_enable(CRM_CLOCK_SOURCE_HEXT, TRUE);
+
+  /* wait till hext is ready */
+  while(crm_hext_stable_wait() == ERROR)
+  {
+  }
+
+  /* config pll clock resource */
+  crm_pll_config(CRM_PLL_SOURCE_HEXT, 96, 1, CRM_PLL_FP_4);
+
+  /* config pllu divider */
+  crm_pllu_div_set(CRM_PLL_FU_16);
+
+  /* pllu enable  */
+  crm_pllu_output_set(TRUE);
+
+  /* enable pll */
+  crm_clock_source_enable(CRM_CLOCK_SOURCE_PLL, TRUE);
+
+  /* wait till pll is ready */
+  while(crm_flag_get(CRM_PLL_STABLE_FLAG) != SET)
+  {
+  }
+
+  /* config ahbclk */
+  crm_ahb_div_set(CRM_AHB_DIV_1);
+
+  /* config apb3clk, the maximum frequency of APB3 clock is 90 MHz */
+  crm_apb3_div_set(CRM_APB3_DIV_4);
+
+  /* config apb2clk, the maximum frequency of APB2 clock is 192 MHz */
+  crm_apb2_div_set(CRM_APB2_DIV_1);
+
+  /* config apb1clk, the maximum frequency of APB1 clock is 192 MHz */
+  crm_apb1_div_set(CRM_APB1_DIV_1);
+
+  /* enable auto step mode */
+  crm_auto_step_mode_enable(TRUE);
+
+  /* select pll as system clock source */
+  crm_sysclk_switch(CRM_SCLK_PLL);
+
+  /* wait till pll is used as system clock source */
+  while(crm_sysclk_switch_status_get() != CRM_SCLK_PLL)
+  {
+  }
+
+  /* disable auto step mode */
+  crm_auto_step_mode_enable(FALSE);
+
+  /* update system_core_clock global variable */
+  system_core_clock_update();
+}
diff --git a/hw/bsp/at32f45x/at32f45x_clock.h b/hw/bsp/at32f45x/at32f45x_clock.h
new file mode 100644
index 000000000..1fd2035aa
--- /dev/null
+++ b/hw/bsp/at32f45x/at32f45x_clock.h
@@ -0,0 +1,45 @@
+/**
+  **************************************************************************
+  * @file     at32f45x_clock.h
+  * @brief    header file of clock program
+  **************************************************************************
+  *
+  * Copyright (c) 2025, Artery Technology, All rights reserved.
+  *
+  * The software Board Support Package (BSP) that is made available to
+  * download from Artery official website is the copyrighted work of Artery.
+  * Artery authorizes customers to use, copy, and distribute the BSP
+  * software and its related documentation for the purpose of design and
+  * development in conjunction with Artery microcontrollers. Use of the
+  * software is governed by this copyright notice and the following disclaimer.
+  *
+  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
+  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
+  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
+  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
+  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
+  *
+  **************************************************************************
+  */
+
+/* define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AT32F45x_CLOCK_H
+#define __AT32F45x_CLOCK_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* includes ------------------------------------------------------------------*/
+#include "at32f45x.h"
+
+/* exported functions ------------------------------------------------------- */
+void system_clock_config(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/hw/bsp/at32f45x/at32f45x_conf.h b/hw/bsp/at32f45x/at32f45x_conf.h
new file mode 100644
index 000000000..90182437f
--- /dev/null
+++ b/hw/bsp/at32f45x/at32f45x_conf.h
@@ -0,0 +1,174 @@
+/**
+  **************************************************************************
+  * @file     at32f45x_conf.h
+  * @brief    at32f45x config header file
+  **************************************************************************
+  *
+  * Copyright (c) 2025, Artery Technology, All rights reserved.
+  *
+  * The software Board Support Package (BSP) that is made available to
+  * download from Artery official website is the copyrighted work of Artery.
+  * Artery authorizes customers to use, copy, and distribute the BSP
+  * software and its related documentation for the purpose of design and
+  * development in conjunction with Artery microcontrollers. Use of the
+  * software is governed by this copyright notice and the following disclaimer.
+  *
+  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
+  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
+  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
+  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
+  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
+  *
+  **************************************************************************
+  */
+
+/* define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AT32F45x_CONF_H
+#define __AT32F45x_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/**
+  * @brief in the following line adjust the value of high speed external crystal (hext)
+  * used in your application
+  *
+  * tip: to avoid modifying this file each time you need to use different hext, you
+  *      can define the hext value in your toolchain compiler preprocessor.
+  *
+  */
+#if !defined  HEXT_VALUE
+#define HEXT_VALUE                       ((uint32_t)8000000) /*!< value of the high speed external crystal in hz */
+#endif
+
+/**
+  * @brief in the following line adjust the high speed external crystal (hext) startup
+  * timeout value
+  */
+#define HEXT_STARTUP_TIMEOUT             ((uint16_t)0x3000)  /*!< time out for hext start up */
+#define HICK_VALUE                       ((uint32_t)8000000) /*!< value of the high speed internal clock in hz */
+#define LEXT_VALUE                       ((uint32_t)32768)   /*!< value of the low speed external clock in hz */
+
+/* module define -------------------------------------------------------------*/
+#define ACC_MODULE_ENABLED
+#define ADC_MODULE_ENABLED
+#define AES_MODULE_ENABLED
+#define CAN_MODULE_ENABLED
+#define CRC_MODULE_ENABLED
+#define CRM_MODULE_ENABLED
+#define DAC_MODULE_ENABLED
+#define DEBUG_MODULE_ENABLED
+#define DMA_MODULE_ENABLED
+#define EMAC_MODULE_ENABLED
+#define ERTC_MODULE_ENABLED
+#define EXINT_MODULE_ENABLED
+#define FLASH_MODULE_ENABLED
+#define GPIO_MODULE_ENABLED
+#define I2C_MODULE_ENABLED
+#define MISC_MODULE_ENABLED
+#define PWC_MODULE_ENABLED
+#define QSPI_MODULE_ENABLED
+#define SCFG_MODULE_ENABLED
+#define SDIO_MODULE_ENABLED
+#define SPI_MODULE_ENABLED
+#define TMR_MODULE_ENABLED
+#define TRNG_MODULE_ENABLED
+#define USART_MODULE_ENABLED
+#define USB_MODULE_ENABLED
+#define WWDT_MODULE_ENABLED
+#define WDT_MODULE_ENABLED
+#define XMC_MODULE_ENABLED
+
+/* includes ------------------------------------------------------------------*/
+#ifdef ACC_MODULE_ENABLED
+#include "at32f45x_acc.h"
+#endif
+#ifdef ADC_MODULE_ENABLED
+#include "at32f45x_adc.h"
+#endif
+#ifdef AES_MODULE_ENABLED
+#include "at32f45x_aes.h"
+#endif
+#ifdef CAN_MODULE_ENABLED
+#include "at32f45x_can.h"
+#endif
+#ifdef CRC_MODULE_ENABLED
+#include "at32f45x_crc.h"
+#endif
+#ifdef CRM_MODULE_ENABLED
+#include "at32f45x_crm.h"
+#endif
+#ifdef DAC_MODULE_ENABLED
+#include "at32f45x_dac.h"
+#endif
+#ifdef DEBUG_MODULE_ENABLED
+#include "at32f45x_debug.h"
+#endif
+#ifdef DMA_MODULE_ENABLED
+#include "at32f45x_dma.h"
+#endif
+#ifdef EMAC_MODULE_ENABLED
+#include "at32f45x_emac.h"
+#endif
+#ifdef ERTC_MODULE_ENABLED
+#include "at32f45x_ertc.h"
+#endif
+#ifdef EXINT_MODULE_ENABLED
+#include "at32f45x_exint.h"
+#endif
+#ifdef FLASH_MODULE_ENABLED
+#include "at32f45x_flash.h"
+#endif
+#ifdef GPIO_MODULE_ENABLED
+#include "at32f45x_gpio.h"
+#endif
+#ifdef I2C_MODULE_ENABLED
+#include "at32f45x_i2c.h"
+#endif
+#ifdef MISC_MODULE_ENABLED
+#include "at32f45x_misc.h"
+#endif
+#ifdef PWC_MODULE_ENABLED
+#include "at32f45x_pwc.h"
+#endif
+#ifdef QSPI_MODULE_ENABLED
+#include "at32f45x_qspi.h"
+#endif
+#ifdef SCFG_MODULE_ENABLED
+#include "at32f45x_scfg.h"
+#endif
+#ifdef SDIO_MODULE_ENABLED
+#include "at32f45x_sdio.h"
+#endif
+#ifdef SPI_MODULE_ENABLED
+#include "at32f45x_spi.h"
+#endif
+#ifdef TMR_MODULE_ENABLED
+#include "at32f45x_tmr.h"
+#endif
+#ifdef TRNG_MODULE_ENABLED
+#include "at32f45x_trng.h"
+#endif
+#ifdef USART_MODULE_ENABLED
+#include "at32f45x_usart.h"
+#endif
+#ifdef USB_MODULE_ENABLED
+#include "at32f45x_usb.h"
+#endif
+#ifdef WDT_MODULE_ENABLED
+#include "at32f45x_wdt.h"
+#endif
+#ifdef WWDT_MODULE_ENABLED
+#include "at32f45x_wwdt.h"
+#endif
+#ifdef XMC_MODULE_ENABLED
+#include "at32f45x_xmc.h"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/at32f45x/at32f45x_int.c b/hw/bsp/at32f45x/at32f45x_int.c
new file mode 100644
index 000000000..15798e381
--- /dev/null
+++ b/hw/bsp/at32f45x/at32f45x_int.c
@@ -0,0 +1,101 @@
+/**
+  **************************************************************************
+  * @file     at32f45x_int.c
+  * @brief    main interrupt service routines.
+  **************************************************************************
+  *
+  * Copyright (c) 2025, Artery Technology, All rights reserved.
+  *
+  * The software Board Support Package (BSP) that is made available to
+  * download from Artery official website is the copyrighted work of Artery.
+  * Artery authorizes customers to use, copy, and distribute the BSP
+  * software and its related documentation for the purpose of design and
+  * development in conjunction with Artery microcontrollers. Use of the
+  * software is governed by this copyright notice and the following disclaimer.
+  *
+  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
+  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
+  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
+  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
+  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
+  *
+  **************************************************************************
+  */
+
+/* includes ------------------------------------------------------------------*/
+#include "at32f45x_int.h"
+
+/** @addtogroup AT32F455_periph_examples
+  * @{
+  */
+
+/** @addtogroup 455_USB_device_keyboard
+  * @{
+  */
+
+/**
+  * @brief  this function handles nmi exception.
+  * @param  none
+  * @retval none
+  */
+void NMI_Handler(void)
+{
+}
+
+/**
+  * @brief  this function handles memory manage exception.
+  * @param  none
+  * @retval none
+  */
+void MemManage_Handler(void)
+{
+  /* go to infinite loop when memory manage exception occurs */
+  while(1)
+  {
+  }
+}
+
+/**
+  * @brief  this function handles bus fault exception.
+  * @param  none
+  * @retval none
+  */
+void BusFault_Handler(void)
+{
+  /* go to infinite loop when bus fault exception occurs */
+  while(1)
+  {
+  }
+}
+
+/**
+  * @brief  this function handles usage fault exception.
+  * @param  none
+  * @retval none
+  */
+void UsageFault_Handler(void)
+{
+  /* go to infinite loop when usage fault exception occurs */
+  while(1)
+  {
+  }
+}
+
+/**
+  * @brief  this function handles debug monitor exception.
+  * @param  none
+  * @retval none
+  */
+void DebugMon_Handler(void)
+{
+}
+
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
diff --git a/hw/bsp/at32f45x/at32f45x_int.h b/hw/bsp/at32f45x/at32f45x_int.h
new file mode 100644
index 000000000..64930f29e
--- /dev/null
+++ b/hw/bsp/at32f45x/at32f45x_int.h
@@ -0,0 +1,60 @@
+/**
+  **************************************************************************
+  * @file     at32f45x_int.h
+  * @brief    header file of main interrupt service routines.
+  **************************************************************************
+  *
+  * Copyright (c) 2025, Artery Technology, All rights reserved.
+  *
+  * The software Board Support Package (BSP) that is made available to
+  * download from Artery official website is the copyrighted work of Artery.
+  * Artery authorizes customers to use, copy, and distribute the BSP
+  * software and its related documentation for the purpose of design and
+  * development in conjunction with Artery microcontrollers. Use of the
+  * software is governed by this copyright notice and the following disclaimer.
+  *
+  * THIS SOFTWARE IS PROVIDED ON "AS IS" BASIS WITHOUT WARRANTIES,
+  * GUARANTEES OR REPRESENTATIONS OF ANY KIND. ARTERY EXPRESSLY DISCLAIMS,
+  * TO THE FULLEST EXTENT PERMITTED BY LAW, ALL EXPRESS, IMPLIED OR
+  * STATUTORY OR OTHER WARRANTIES, GUARANTEES OR REPRESENTATIONS,
+  * INCLUDING BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY,
+  * FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT.
+  *
+  **************************************************************************
+  */
+
+/* define to prevent recursive inclusion -------------------------------------*/
+#ifndef __AT32F45x_INT_H
+#define __AT32F45x_INT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* includes ------------------------------------------------------------------*/
+#include "at32f45x.h"
+
+/* exported types ------------------------------------------------------------*/
+/* exported constants --------------------------------------------------------*/
+/* exported macro ------------------------------------------------------------*/
+/* exported functions ------------------------------------------------------- */
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void MemManage_Handler(void);
+void BusFault_Handler(void);
+void UsageFault_Handler(void);
+void SVC_Handler(void);
+void DebugMon_Handler(void);
+void PendSV_Handler(void);
+void SysTick_Handler(void);
+
+void OTGFS1_IRQHandler(void);
+void OTGFS1_WKUP_IRQHandler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
diff --git a/hw/bsp/at32f45x/boards/at_start_f455/board.cmake b/hw/bsp/at32f45x/boards/at_start_f455/board.cmake
new file mode 100644
index 000000000..f06f9599e
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f455/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F455ZET7)
+set(MCU_LINKER_NAME AT32F455xE)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
diff --git a/hw/bsp/at32f45x/boards/at_start_f455/board.h b/hw/bsp/at32f45x/boards/at_start_f455/board.h
new file mode 100644
index 000000000..64e27c016
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f455/board.h
@@ -0,0 +1,96 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F455
+   url: https://www.arterychip.com/en/product/AT32F455.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define USB_VBUS_IGNORE
+
+// LED
+#define LED_PORT              GPIOD
+#define LED_PIN               GPIO_PINS_13
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// UART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7
+
+//USB
+#define USB_ID                           0
+#define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
+#define OTG_IRQ                          OTGFS1_IRQn
+#define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
+#define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
+#define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
+#define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
+#define OTG_PIN_GPIO                     GPIOA
+#define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_DP                       GPIO_PINS_12
+#define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE12
+#define OTG_PIN_DM                       GPIO_PINS_11
+#define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE11
+#define OTG_PIN_VBUS                     GPIO_PINS_9
+#define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
+#define OTG_PIN_ID                       GPIO_PINS_10
+#define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
+#define OTG_PIN_SOF_GPIO                 GPIOA
+#define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_SOF                      GPIO_PINS_8
+#define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
+#define OTG_PIN_MUX                      GPIO_MUX_10
+
+//Vbus
+static inline void board_vbus_sense_init(void)
+{
+    *(int*)(0x50000038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/at32f45x/boards/at_start_f455/board.mk b/hw/bsp/at32f45x/boards/at_start_f455/board.mk
new file mode 100644
index 000000000..7c24ad288
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f455/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F455ZET7
+MCU_LINKER_NAME = AT32F455xE
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
diff --git a/hw/bsp/at32f45x/boards/at_start_f456/board.cmake b/hw/bsp/at32f45x/boards/at_start_f456/board.cmake
new file mode 100644
index 000000000..a5048d3b1
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f456/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F456ZET7)
+set(MCU_LINKER_NAME AT32F456xE)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
diff --git a/hw/bsp/at32f45x/boards/at_start_f456/board.h b/hw/bsp/at32f45x/boards/at_start_f456/board.h
new file mode 100644
index 000000000..d3d734a9b
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f456/board.h
@@ -0,0 +1,96 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F456
+   url: https://www.arterychip.com/en/product/AT32F456.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define USB_VBUS_IGNORE
+
+// LED
+#define LED_PORT              GPIOD
+#define LED_PIN               GPIO_PINS_13
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// UART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7
+
+//USB
+#define USB_ID                           0
+#define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
+#define OTG_IRQ                          OTGFS1_IRQn
+#define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
+#define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
+#define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
+#define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
+#define OTG_PIN_GPIO                     GPIOA
+#define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_DP                       GPIO_PINS_12
+#define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE12
+#define OTG_PIN_DM                       GPIO_PINS_11
+#define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE11
+#define OTG_PIN_VBUS                     GPIO_PINS_9
+#define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
+#define OTG_PIN_ID                       GPIO_PINS_10
+#define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
+#define OTG_PIN_SOF_GPIO                 GPIOA
+#define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_SOF                      GPIO_PINS_8
+#define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
+#define OTG_PIN_MUX                      GPIO_MUX_10
+
+//Vbus
+static inline void board_vbus_sense_init(void)
+{
+    *(int*)(0x50000038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/at32f45x/boards/at_start_f456/board.mk b/hw/bsp/at32f45x/boards/at_start_f456/board.mk
new file mode 100644
index 000000000..596d99d61
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f456/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F456ZET7
+MCU_LINKER_NAME = AT32F456xE
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
diff --git a/hw/bsp/at32f45x/boards/at_start_f457/board.cmake b/hw/bsp/at32f45x/boards/at_start_f457/board.cmake
new file mode 100644
index 000000000..c8cd886be
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f457/board.cmake
@@ -0,0 +1,8 @@
+set(MCU_VARIANT AT32F457ZET7)
+set(MCU_LINKER_NAME AT32F457xE)
+
+set(JLINK_DEVICE ${MCU_VARIANT})
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC ${MCU_VARIANT})
+endfunction()
diff --git a/hw/bsp/at32f45x/boards/at_start_f457/board.h b/hw/bsp/at32f45x/boards/at_start_f457/board.h
new file mode 100644
index 000000000..2216b1ed3
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f457/board.h
@@ -0,0 +1,96 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: AT-START-F457
+   url: https://www.arterychip.com/en/product/AT32F457.jsp
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define USB_VBUS_IGNORE
+
+// LED
+#define LED_PORT              GPIOD
+#define LED_PIN               GPIO_PINS_13
+#define LED_STATE_ON          0 // Active Low
+#define LED_GPIO_CLK_EN()     crm_periph_clock_enable(CRM_GPIOD_PERIPH_CLOCK, TRUE)
+
+// Button
+#define BUTTON_PORT           GPIOA
+#define BUTTON_PIN            GPIO_PINS_0
+#define BUTTON_STATE_ACTIVE   1
+#define BUTTON_GPIO_CLK_EN()  crm_periph_clock_enable(CRM_GPIOA_PERIPH_CLOCK, TRUE)
+
+// UART
+#define PRINT_UART                       USART1
+#define PRINT_UART_CRM_CLK               CRM_USART1_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN                GPIO_PINS_9
+#define PRINT_UART_TX_GPIO               GPIOA
+#define PRINT_UART_TX_GPIO_CRM_CLK       CRM_GPIOA_PERIPH_CLOCK
+#define PRINT_UART_TX_PIN_SOURCE         GPIO_PINS_SOURCE9
+#define PRINT_UART_TX_PIN_MUX_NUM        GPIO_MUX_7
+
+//USB
+#define USB_ID                           0
+#define OTG_CLOCK                        CRM_OTGFS1_PERIPH_CLOCK
+#define OTG_IRQ                          OTGFS1_IRQn
+#define OTG_IRQ_HANDLER                  OTGFS1_IRQHandler
+#define OTG_WKUP_IRQ                     OTGFS1_WKUP_IRQn
+#define OTG_WKUP_HANDLER                 OTGFS1_WKUP_IRQHandler
+#define OTG_WKUP_EXINT_LINE              EXINT_LINE_18
+#define OTG_PIN_GPIO                     GPIOA
+#define OTG_PIN_GPIO_CLOCK               CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_DP                       GPIO_PINS_12
+#define OTG_PIN_DP_SOURCE                GPIO_PINS_SOURCE12
+#define OTG_PIN_DM                       GPIO_PINS_11
+#define OTG_PIN_DM_SOURCE                GPIO_PINS_SOURCE11
+#define OTG_PIN_VBUS                     GPIO_PINS_9
+#define OTG_PIN_VBUS_SOURCE              GPIO_PINS_SOURCE9
+#define OTG_PIN_ID                       GPIO_PINS_10
+#define OTG_PIN_ID_SOURCE                GPIO_PINS_SOURCE10
+#define OTG_PIN_SOF_GPIO                 GPIOA
+#define OTG_PIN_SOF_GPIO_CLOCK           CRM_GPIOA_PERIPH_CLOCK
+#define OTG_PIN_SOF                      GPIO_PINS_8
+#define OTG_PIN_SOF_SOURCE               GPIO_PINS_SOURCE8
+#define OTG_PIN_MUX                      GPIO_MUX_10
+
+//Vbus
+static inline void board_vbus_sense_init(void)
+{
+    *(int*)(0x50000038) |= (1<<21);
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/at32f45x/boards/at_start_f457/board.mk b/hw/bsp/at32f45x/boards/at_start_f457/board.mk
new file mode 100644
index 000000000..4cb4adad5
--- /dev/null
+++ b/hw/bsp/at32f45x/boards/at_start_f457/board.mk
@@ -0,0 +1,7 @@
+MCU_VARIANT = AT32F457ZET7
+MCU_LINKER_NAME = AT32F457xE
+
+JLINK_DEVICE = ${MCU_VARIANT}
+
+CFLAGS += \
+  -D${MCU_VARIANT}
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
new file mode 100644
index 000000000..32bae96af
--- /dev/null
+++ b/hw/bsp/at32f45x/family.c
@@ -0,0 +1,258 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: Artery
+*/
+
+#include "at32f45x_clock.h"
+#include "at32f45x_int.h"
+#include "board.h"
+#include "bsp/board_api.h"
+
+void usb_clock48m_select(usb_clk48_s clk_s);
+void led_and_button_init(void);
+void uart_print_init(uint32_t baudrate);
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void OTGFS1_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+void OTGFS1_WKUP_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+void board_init(void) {
+  /* config nvic priority group */
+  nvic_priority_group_config(NVIC_PRIORITY_GROUP_4);
+
+  /* config system clock */
+  system_clock_config();
+
+  /* enable usb clock */
+  crm_periph_clock_enable(OTG_CLOCK, TRUE);
+
+  /* select usb 48m clcok source */
+  usb_clock48m_select(USB_CLK_HEXT);
+
+  /* vbus ignore */
+  board_vbus_sense_init();
+
+  /* configure systick */
+  systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
+  SysTick_Config(SystemCoreClock / 1000);
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+/* otgfs use vbus pin */
+#ifndef USB_VBUS_IGNORE
+  gpio_init_type gpio_init_struct;
+  crm_periph_clock_enable(OTG_PIN_GPIO_CLOCK, TRUE);
+  gpio_default_para_init(&gpio_init_struct);
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_pins = OTG_PIN_VBUS;
+  gpio_init_struct.gpio_pull = GPIO_PULL_DOWN;
+  gpio_pin_mux_config(OTG_PIN_GPIO, OTG_PIN_VBUS_SOURCE, OTG_PIN_MUX);
+  gpio_init(OTG_PIN_GPIO, &gpio_init_struct);
+#endif
+
+  /* config led and key */
+  led_and_button_init();
+
+  /* config usart printf */
+  uart_print_init(115200);
+  printf("usart printf config success!\r\n");
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+/**
+  * @brief  usb 48M clock select
+  * @param  clk_s:USB_CLK_HICK, USB_CLK_HEXT
+  * @retval none
+  */
+void usb_clock48m_select(usb_clk48_s clk_s)
+{
+  if(clk_s == USB_CLK_HICK)
+  {
+    crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_HICK);
+
+    /* enable the acc calibration ready interrupt */
+    crm_periph_clock_enable(CRM_ACC_PERIPH_CLOCK, TRUE);
+
+    /* update the c1\c2\c3 value */
+    acc_write_c1(7980);
+    acc_write_c2(8000);
+    acc_write_c3(8020);
+
+    /* open acc calibration */
+    acc_calibration_mode_enable(ACC_CAL_HICKTRIM, TRUE);
+  }
+  else
+  {
+    crm_usb_clock_source_select(CRM_USB_CLOCK_SOURCE_PLLU);
+  }
+}
+
+void uart_print_init(uint32_t baudrate) {
+  gpio_init_type gpio_init_struct;
+  /* enable the uart and gpio clock */
+  crm_periph_clock_enable(PRINT_UART_CRM_CLK, TRUE);
+  crm_periph_clock_enable(PRINT_UART_TX_GPIO_CRM_CLK, TRUE);
+  gpio_default_para_init(&gpio_init_struct);
+  /* configure the uart tx pin */
+  gpio_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+  gpio_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_init_struct.gpio_mode = GPIO_MODE_MUX;
+  gpio_init_struct.gpio_pins = PRINT_UART_TX_PIN;
+  gpio_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(PRINT_UART_TX_GPIO, &gpio_init_struct);
+  gpio_pin_mux_config(PRINT_UART_TX_GPIO, PRINT_UART_TX_PIN_SOURCE, PRINT_UART_TX_PIN_MUX_NUM);
+  /* configure uart param */
+  usart_init(PRINT_UART, baudrate, USART_DATA_8BITS, USART_STOP_1_BIT);
+  usart_transmitter_enable(PRINT_UART, TRUE);
+  usart_enable(PRINT_UART, TRUE);
+}
+
+void led_and_button_init(void) {
+  /* LED */
+  gpio_init_type gpio_led_init_struct;
+  /* enable the led clock */
+  LED_GPIO_CLK_EN();
+  /* set default parameter */
+  gpio_default_para_init(&gpio_led_init_struct);
+  /* configure the led gpio */
+  gpio_led_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+  gpio_led_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_led_init_struct.gpio_mode = GPIO_MODE_OUTPUT;
+  gpio_led_init_struct.gpio_pins = LED_PIN;
+  gpio_led_init_struct.gpio_pull = GPIO_PULL_NONE;
+  gpio_init(LED_PORT, &gpio_led_init_struct);
+  /* Button */
+  gpio_init_type gpio_button_init_struct;
+  /* enable the button clock */
+  BUTTON_GPIO_CLK_EN();
+  /* set default parameter */
+  gpio_default_para_init(&gpio_button_init_struct);
+  /* configure the button gpio */
+  gpio_button_init_struct.gpio_drive_strength = GPIO_DRIVE_STRENGTH_STRONGER;
+  gpio_button_init_struct.gpio_out_type = GPIO_OUTPUT_PUSH_PULL;
+  gpio_button_init_struct.gpio_mode = GPIO_MODE_INPUT;
+  gpio_button_init_struct.gpio_pins = BUTTON_PIN;
+  gpio_button_init_struct.gpio_pull = GPIO_PULL_DOWN;
+  gpio_init(BUTTON_PORT, &gpio_button_init_struct);
+}
+
+void board_led_write(bool state) {
+  gpio_bits_write(LED_PORT, LED_PIN, state ^ (!LED_STATE_ON));
+}
+
+uint32_t board_button_read(void) {
+  return gpio_input_data_bit_read(BUTTON_PORT, BUTTON_PIN);
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t *at32_uuid = ((volatile uint32_t *) 0x1FFFF7E8);
+  uint32_t *id32 = (uint32_t *) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = at32_uuid[0];
+  id32[1] = at32_uuid[1];
+  id32[2] = at32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const *buf, int len) {
+#if CFG_TUSB_OS == OPT_OS_NONE
+  int txsize = len;
+  u16 timeout = 0xffff;
+  while (txsize--) {
+    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
+      timeout--;
+      if (timeout == 0) {
+        return 0;
+      }
+    }
+    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
+    buf++;
+  }
+  return len;
+#else
+  (void) buf;
+  (void) len;
+  return 0;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+
+void SVC_Handler(void) {
+}
+
+void PendSV_Handler(void) {
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void);
+void _init(void) {
+}
+
+#ifdef USE_FULL_ASSERT
+void assert_failed(const char *file, uint32_t line) {
+  /* USER CODE BEGIN 6 */
+  /* User can add his own implementation to report the file name and line number,
+     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+  /* USER CODE END 6 */
+}
+#endif /* USE_FULL_ASSERT */
diff --git a/hw/bsp/at32f45x/family.cmake b/hw/bsp/at32f45x/family.cmake
new file mode 100644
index 000000000..fe13347af
--- /dev/null
+++ b/hw/bsp/at32f45x/family.cmake
@@ -0,0 +1,97 @@
+include_guard()
+
+set(AT32_FAMILY at32f45x)
+set(AT32_SDK_LIB ${TOP}/hw/mcu/artery/${AT32_FAMILY}/libraries)
+
+string(TOUPPER ${AT32_FAMILY} AT32_FAMILY_UPPER)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS ${AT32_FAMILY_UPPER} CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(STARTUP_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s)
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+set(STARTUP_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s)
+if (NOT DEFINED LD_FILE_GNU)
+set(LD_FILE_GNU ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+set(LD_FILE_IAR ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf)
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${AT32_SDK_LIB}/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
+    ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_gpio.c
+    ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_misc.c
+    ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_usart.c
+    ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_acc.c
+    ${AT32_SDK_LIB}/drivers/src/${AT32_FAMILY}_crm.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${AT32_SDK_LIB}/cmsis/cm4/core_support
+    ${AT32_SDK_LIB}/cmsis/cm4/device_support
+    ${AT32_SDK_LIB}/drivers/inc
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${AT32_FAMILY_UPPER})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_clock.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${AT32_FAMILY}_int.c
+    ${TOP}/src/portable/synopsys/dwc2/dcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/hcd_dwc2.c
+    ${TOP}/src/portable/synopsys/dwc2/dwc2_common.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+endfunction()
diff --git a/hw/bsp/at32f45x/family.mk b/hw/bsp/at32f45x/family.mk
new file mode 100644
index 000000000..e42f27557
--- /dev/null
+++ b/hw/bsp/at32f45x/family.mk
@@ -0,0 +1,40 @@
+AT32_FAMILY = at32f45x
+AT32_SDK_LIB = hw/mcu/artery/${AT32_FAMILY}/libraries
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+CPU_CORE ?= cortex-m4
+
+CFLAGS_GCC += \
+  -flto
+
+CFLAGS += \
+	-DCFG_TUSB_MCU=OPT_MCU_AT32F45X \
+
+LDFLAGS_GCC += \
+	-flto --specs=nosys.specs -nostdlib -nostartfiles
+
+SRC_C += \
+	src/portable/synopsys/dwc2/dcd_dwc2.c \
+	src/portable/synopsys/dwc2/hcd_dwc2.c \
+	src/portable/synopsys/dwc2/dwc2_common.c \
+	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_gpio.c \
+	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_misc.c \
+	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_usart.c \
+	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_crm.c \
+	$(AT32_SDK_LIB)/drivers/src/${AT32_FAMILY}_acc.c \
+	$(AT32_SDK_LIB)/cmsis/cm4/device_support/system_${AT32_FAMILY}.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(AT32_SDK_LIB)/drivers/inc \
+	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
+	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
+
+SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
+SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+
+LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
+LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+
+flash: flash-atlink
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 55f7e0b7c..ce690acb8 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -661,6 +661,11 @@
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 8
 
+#elif TU_CHECK_MCU(OPT_MCU_AT32F45X)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_AT32
+  #define TUP_DCD_ENDPOINT_MAX 8
+
 //--------------------------------------------------------------------+
 // HPMicro
 //--------------------------------------------------------------------+
diff --git a/src/portable/synopsys/dwc2/dwc2_at32.h b/src/portable/synopsys/dwc2/dwc2_at32.h
index 513495eb1..10824ae92 100644
--- a/src/portable/synopsys/dwc2/dwc2_at32.h
+++ b/src/portable/synopsys/dwc2/dwc2_at32.h
@@ -61,6 +61,11 @@
   #define OTG1_FIFO_SIZE           1280
   #define OTG1_IRQn                OTGFS1_IRQn
   #define DWC2_OTG1_REG_BASE       0x50000000UL
+#elif CFG_TUSB_MCU == OPT_MCU_AT32F45X
+  #include <at32f45x.h>
+  #define OTG1_FIFO_SIZE           1280
+  #define OTG1_IRQn                OTGFS1_IRQn
+  #define DWC2_OTG1_REG_BASE       0x50000000UL
 #endif
 
 #ifdef __cplusplus
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 64fe899db..35a0d97db 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -216,6 +216,7 @@
 #define OPT_MCU_AT32F402_405     2504  ///< ArteryTek AT32F402_405
 #define OPT_MCU_AT32F425         2505  ///< ArteryTek AT32F425
 #define OPT_MCU_AT32F413         2506  ///< ArteryTek AT32F413
+#define OPT_MCU_AT32F45X         2507  ///< ArteryTek AT32F45x
 
 // HPMicro
 #define OPT_MCU_HPM              2600  ///< HPMicro
diff --git a/tools/get_deps.py b/tools/get_deps.py
index deacbb23b..773445adc 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -244,6 +244,9 @@ deps_optional = {
     'hw/mcu/artery/at32f413': ['https://github.com/ArteryTek/AT32F413_Firmware_Library.git',
                                'f6fe62dfec9fd40c5b63d92fc5ef2c2b5e77a450',
                                'at32f413'],
+    'hw/mcu/artery/at32f45x': ['https://github.com/ArteryTek/AT32F45x_Firmware_Library.git',
+                               '3d4a1b38be8ebac292e2350ca53bc4bfa4430233',
+                               'at32f45x'],
     'hw/mcu/hpmicro/hpm_sdk': ['https://github.com/hpmicro/hpm_sdk',
                                '8d2af741ecc4aaa82d7ee395dc1ce25d7070c3ff',
                                'hpmicro'],
-- 
cgit v1.3.1


From 0e5241aa83c52792959ad8a2ef0535a3759530a7 Mon Sep 17 00:00:00 2001
From: Rémi Berthoz <remi.berthoz@gmail.com>
Date: Wed, 7 Jan 2026 17:04:48 +0100
Subject: Adjust printer device class to 0.20.0 and fix compilation warnings

---
 examples/device/printer_to_hid/src/main.c          |  73 +++---
 .../device/printer_to_hid/src/usb_descriptors.c    | 278 +++++++--------------
 .../device/printer_to_hid/src/usb_descriptors.h    |  48 +++-
 hw/bsp/rp2040/family.cmake                         |   1 +
 src/class/printer/printer.h                        |   9 +-
 src/class/printer/printer_device.c                 |  13 +-
 src/device/usbd.h                                  |  13 +
 src/tusb.h                                         |   4 +
 8 files changed, 208 insertions(+), 231 deletions(-)

(limited to 'hw')

diff --git a/examples/device/printer_to_hid/src/main.c b/examples/device/printer_to_hid/src/main.c
index f5012478c..46203b9db 100644
--- a/examples/device/printer_to_hid/src/main.c
+++ b/examples/device/printer_to_hid/src/main.c
@@ -39,7 +39,7 @@
 // usb interface pointer
 uint8_t printer_itf = 0;
 // pendings bytes in usb endpoint buffer ; must process these bytes
-uint8_t pending_bytes_on_usb_ep = 0;
+size_t pending_bytes_on_usb_ep = 0;
 
 
 // -------------------------------------------------------------------+
@@ -72,7 +72,7 @@ uint8_t next_keycode_is_release = false;
 // next_keycode and place it in the HID report, then set next_is_null
 // such that the key is released by the next report. This seem to help
 // stroking the same key twice when the character is repeated in the data.
-void hid_tx_task(void) {
+static void hid_tx_task(void) {
   // Poll every 10ms
   const uint32_t  interval_ms = 10;
   static uint32_t start_ms    = 0;
@@ -104,28 +104,30 @@ void hid_tx_task(void) {
 // overwrite local data that is not processed yet, so we use data_buffer as a fifo.
 // We do not have to take care of reading correctly from the endpoint buffer, as all
 // is done well by tud_printer_n_read().
-void printer_rx_task(void) {
-  if (pending_bytes_on_usb_ep > 0) {
-    size_t len1 = data_available;
-    size_t len2 = 0;
-    if (len1 < 0) {
-      len1 = 0;
-    }
-    if (data_rx_offset + len1 > sizeof(data_buffer)) {
-      len2 = len1 - (sizeof(data_buffer) - data_rx_offset);
-      len1 = sizeof(data_buffer) - data_rx_offset;
-    }
-    uint32_t count = tud_printer_n_read(printer_itf, data_buffer + data_rx_offset, len1);
-    if (len2 > 0) {
-      count += tud_printer_n_read(printer_itf, data_buffer, len2);
-    }
+static void printer_rx_task(void) {
 
-    if (count > 0) {
-      data_available -= count;
-      pending_bytes_on_usb_ep -= count;
-      data_rx_offset = (data_rx_offset + count) % sizeof(data_buffer);
-    }
+  if (pending_bytes_on_usb_ep == 0) {
+    return;
+  }
+
+  size_t len1 = data_available;
+  size_t len2 = 0;
+  if (data_rx_offset + len1 > sizeof(data_buffer)) {
+    len2 = len1 - (sizeof(data_buffer) - data_rx_offset);
+    len1 = sizeof(data_buffer) - data_rx_offset;
+  }
+  uint32_t count = tud_printer_n_read(printer_itf, data_buffer + data_rx_offset, len1);
+  if (len2 > 0) {
+    count += tud_printer_n_read(printer_itf, data_buffer, len2);
   }
+
+  if (count == 0) {
+    return;
+  }
+
+  data_available -= count;
+  pending_bytes_on_usb_ep -= count;
+  data_rx_offset = (data_rx_offset + count) % sizeof(data_buffer);
 }
 
 // The HID keycodes are not binary mapped like UTF8 codes. If we want to send the
@@ -134,7 +136,7 @@ void printer_rx_task(void) {
 // hosts expecting hid data from a QWERTY keyboard. Also note that only a-zA-Z0-9
 // characters are converted, for simplicity of the example. Other characters are
 // converted to spaces.
-void translation_task(void) {
+static void translation_task(void) {
   if (data_tx_offset != data_rx_offset || data_available == 0) {
     // If data_tx_offset and data_rx_offset have different values, then we
     // can proceed: translate, prepare for TX, and advance data_tx_offset.
@@ -177,18 +179,22 @@ void translation_task(void) {
 }
 
 int main(void) {
-
   board_init();
-  tud_init(BOARD_TUD_RHPORT); // init device stack on configured roothub port
-  if (board_init_after_tusb) {
-    board_init_after_tusb();
-  }
+  // init device and host stack on configured roothub port
+  tusb_rhport_init_t dev_init = {.role = TUSB_ROLE_DEVICE, .speed = TUSB_SPEED_AUTO};
+  tusb_init(BOARD_TUD_RHPORT, &dev_init);
+  board_init_after_tusb();
 
   while (1) {
     tud_task();         // tinyusb device task
     printer_rx_task();  // read data sent by host on our printer interface
     translation_task(); // translate printer's UTF8 to HID keycodes
     hid_tx_task();      // send data to host with our HID interface
+    if (pending_bytes_on_usb_ep > 0) {
+      board_led_on();
+    } else {
+      board_led_off();
+    }
   }
 }
 
@@ -197,7 +203,6 @@ int main(void) {
 // Printer callbacks
 //--------------------------------------------------------------------+
 
-// Data was received on endpoint buffer
 void tud_printer_rx_cb(uint8_t itf, size_t n) {
   printer_itf = itf;            // get interface from which to read endpoint buffer
   pending_bytes_on_usb_ep += n; // count pending bytes, counter must decrement when reading from the endpoint buffer
@@ -210,10 +215,20 @@ void tud_printer_rx_cb(uint8_t itf, size_t n) {
 
 uint16_t tud_hid_get_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, uint8_t *buffer,
                                uint16_t reqlen) {
+  (void)instance;
+  (void)report_id;
+  (void)report_type;
+  (void)buffer;
+  (void)reqlen;
   return 0;
 }
 
 void tud_hid_set_report_cb(uint8_t instance, uint8_t report_id, hid_report_type_t report_type, const uint8_t *buffer,
                            uint16_t bufsize) {
+  (void)instance;
+  (void)report_id;
+  (void)report_type;
+  (void)buffer;
+  (void)bufsize;
   return;
 }
diff --git a/examples/device/printer_to_hid/src/usb_descriptors.c b/examples/device/printer_to_hid/src/usb_descriptors.c
index 161bbb7c5..7d529e724 100644
--- a/examples/device/printer_to_hid/src/usb_descriptors.c
+++ b/examples/device/printer_to_hid/src/usb_descriptors.c
@@ -1,7 +1,7 @@
 /*
  * The MIT License (MIT)
  *
- * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2026 Ha Thach (tinyusb.org)
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -25,223 +25,119 @@
 
 #include "bsp/board_api.h"
 #include "tusb.h"
-#include "usb_descriptors.h"
-
-/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
- * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
- *
- * Auto ProductID layout's Bitmap:
- *   [MSB]         HID | MSC | CDC          [LSB]
- */
-#define PID_MAP(itf, n)  ((CFG_TUD_##itf) ? (1 << (n)) : 0)
-#define USB_PID           (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
-                           PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4) )
-
-#define USB_VID   0xCafe
-#define USB_BCD   0x0200
-
-//--------------------------------------------------------------------+
-// Device Descriptors
-//--------------------------------------------------------------------+
-static tusb_desc_device_t const desc_device =
-{
-    .bLength            = sizeof(tusb_desc_device_t),
-    .bDescriptorType    = TUSB_DESC_DEVICE,
-    .bcdUSB             = USB_BCD,
-    .bDeviceClass       = 0x00,
-    .bDeviceSubClass    = 0x00,
-    .bDeviceProtocol    = 0x00,
-    .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
-
-    .idVendor           = USB_VID,
-    .idProduct          = USB_PID,
-    .bcdDevice          = 0x0100,
-
-    .iManufacturer      = 0x01,
-    .iProduct           = 0x02,
-    .iSerialNumber      = 0x03,
-
-    .bNumConfigurations = 0x01
-};
-
-// Invoked when received GET DEVICE DESCRIPTOR
-// Application return pointer to descriptor
-uint8_t const * tud_descriptor_device_cb(void)
-{
-  return (uint8_t const *) &desc_device;
-}
 
-//--------------------------------------------------------------------+
-// HID Report Descriptor
-//--------------------------------------------------------------------+
-
-uint8_t const desc_hid_report[] =
-{
-  TUD_HID_REPORT_DESC_KEYBOARD( HID_REPORT_ID(REPORT_ID_KEYBOARD         ))
-};
+#include "usb_descriptors.h"
 
-// Invoked when received GET HID REPORT DESCRIPTOR
-// Application return pointer to descriptor
-// Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_hid_descriptor_report_cb(uint8_t instance)
-{
-  (void) instance;
-  return desc_hid_report;
-}
 
 //--------------------------------------------------------------------+
-// Configuration Descriptor
+// Report definitions
 //--------------------------------------------------------------------+
 
-enum
-{
-  ITF_NUM_HID,
-  ITF_NUM_PRINTER,
-  ITF_NUM_TOTAL
+// Values of the string descriptors. Order must match the order defined by STRING_DESCRIPTOR_INDICES.
+const char *STRING_DESCRIPTOR_VALUES[] = {
+  (const char[]){0x09, 0x04}, // 0: Supported language is English (0x0409)
+  "TinyUSB",                  // 1: Manufacturer
+  "TinyUSB Device",           // 2: Product
+  NULL,                       // 3: Serial number, will use unique ID from the Pi Pico board hardware
+  "Config1",                  // 4: Configuration
+  "Hid1",                     // 5: HID interface
+  "Print1",                   // 6: Printer interface
 };
 
-#define  CONFIG_TOTAL_LEN  (TUD_CONFIG_DESC_LEN + TUD_HID_DESC_LEN + TUD_PRINTER_DESC_LEN)
+uint8_t HID_REPORT_DESCRIPTOR[] = {TUD_HID_REPORT_DESC_KEYBOARD(HID_REPORT_ID(REPORT_ID_KEYBOARD))};
 
-// HID interface endpoints
-#define EPADDR_HID   0x81  // Interrupt In, MSB must be 1
-// Printer interface endpoints
-#define EPADDR_PRINTER_OUT 0x01  // Bulk Out, MSB must be 0
-#define EPADDR_PRINTER_IN  0x82  // Bulk In, MSB must be 1
-
-uint8_t const desc_configuration[] =
-{
+uint8_t CONFIG_INTERFACE_ENDPOINT_DESCRIPTOR[] = {
   // Config number, interface count, string index, total length, attribute, power in mA
-  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
+  TUD_CONFIG_DESCRIPTOR(1, ITF_COUNT, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
 
   // HID:
   // Interface number, string index, protocol, report descriptor len, EP In address, size & polling interval
-  TUD_HID_DESCRIPTOR(ITF_NUM_HID, 0, HID_ITF_PROTOCOL_NONE, sizeof(desc_hid_report), EPADDR_HID, CFG_TUD_HID_EP_BUFSIZE, 5),
+  TUD_HID_DESCRIPTOR(ITF_HID, 0, HID_ITF_PROTOCOL_NONE, sizeof(HID_REPORT_DESCRIPTOR), EPADDR_HID,
+                     CFG_TUD_HID_EP_BUFSIZE, 5),
 
   // Printer:
   // Interface number, string index, EP Bulk Out address, EP Bulk In address, EP size
-  TUD_PRINTER_DESCRIPTOR(ITF_NUM_PRINTER, 0, EPADDR_PRINTER_OUT, EPADDR_PRINTER_IN, CFG_TUD_PRINTER_EP_BUFSIZE)
+  TUD_PRINTER_DESCRIPTOR(ITF_PRINTER, 0, EPADDR_PRINTER_OUT, EPADDR_PRINTER_IN, CFG_TUD_PRINTER_EP_BUFSIZE)};
+
+static const tusb_desc_device_t DEVICE_DESCRIPTOR = {
+  .bLength         = sizeof(tusb_desc_device_t),
+  .bDescriptorType = TUSB_DESC_DEVICE,
+  .bcdUSB          = USB_BCD,
+  .bDeviceClass    = 0x00, // Define class at interface level
+  .bDeviceSubClass = 0x00,
+  .bDeviceProtocol = 0x00,
+  .bMaxPacketSize0 = CFG_TUD_ENDPOINT0_SIZE,
+
+  .idVendor  = USB_VID,
+  .idProduct = USB_PID,
+  .bcdDevice = 0x0100,
+
+  .iManufacturer = STR_MANUFACTURER,
+  .iProduct      = STR_PRODUCT,
+  .iSerialNumber = STR_SERIAL,
+
+  .bNumConfigurations = 0x01
 };
 
-#if TUD_OPT_HIGH_SPEED
-// Per USB specs: high speed capable device must report device_qualifier and other_speed_configuration
-
-// other speed configuration
-static uint8_t desc_other_speed_config[CONFIG_TOTAL_LEN];
-
-// device qualifier is mostly similar to device descriptor since we don't change configuration based on speed
-static tusb_desc_device_qualifier_t const desc_device_qualifier =
-{
-  .bLength            = sizeof(tusb_desc_device_qualifier_t),
-  .bDescriptorType    = TUSB_DESC_DEVICE_QUALIFIER,
-  .bcdUSB             = USB_BCD,
 
-  .bDeviceClass       = 0x00,
-  .bDeviceSubClass    = 0x00,
-  .bDeviceProtocol    = 0x00,
-
-  .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
-  .bNumConfigurations = 0x01,
-  .bReserved          = 0x00
-};
+//--------------------------------------------------------------------+
+// TinyUSB callbacks (descriptor requests)
+//--------------------------------------------------------------------+
 
-// Invoked when received GET DEVICE QUALIFIER DESCRIPTOR request
-// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete.
-// device_qualifier descriptor describes information about a high-speed capable device that would
-// change if the device were operating at the other speed. If not highspeed capable stall this request.
-uint8_t const* tud_descriptor_device_qualifier_cb(void)
-{
-  return (uint8_t const*) &desc_device_qualifier;
+// TinyUSB GET HID REPORT DESCRIPTOR callback.
+const uint8_t *tud_hid_descriptor_report_cb(uint8_t instance) {
+  (void)instance;
+  return HID_REPORT_DESCRIPTOR;
 }
 
-// Invoked when received GET OTHER SEED CONFIGURATION DESCRIPTOR request
-// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-// Configuration descriptor in the other speed e.g if high speed then this is for full speed and vice versa
-uint8_t const* tud_descriptor_other_speed_configuration_cb(uint8_t index)
-{
-  (void) index; // for multiple configurations
-
-  // other speed config is basically configuration with type = OTHER_SPEED_CONFIG
-  memcpy(desc_other_speed_config, desc_configuration, CONFIG_TOTAL_LEN);
-  desc_other_speed_config[1] = TUSB_DESC_OTHER_SPEED_CONFIG;
-
-  // this example use the same configuration for both high and full speed mode
-  return desc_other_speed_config;
+// TinyUSB GET CONFIGURATION DESCRIPTOR callback.
+const uint8_t *tud_descriptor_configuration_cb(uint8_t index) {
+  (void)index;
+  return CONFIG_INTERFACE_ENDPOINT_DESCRIPTOR;
 }
 
-#endif // highspeed
-
-// Invoked when received GET CONFIGURATION DESCRIPTOR
-// Application return pointer to descriptor
-// Descriptor contents must exist long enough for transfer to complete
-uint8_t const * tud_descriptor_configuration_cb(uint8_t index)
-{
-  (void) index; // for multiple configurations
-
-  // This example use the same configuration for both high and full speed mode
-  return desc_configuration;
+// TinyUSB GET DEVICE DESCRIPTOR callback.
+const uint8_t *tud_descriptor_device_cb(void) {
+  return (const uint8_t *)&DEVICE_DESCRIPTOR;
 }
 
-//--------------------------------------------------------------------+
-// String Descriptors
-//--------------------------------------------------------------------+
-
-// String Descriptor Index
-enum {
-  STRID_LANGID = 0,
-  STRID_MANUFACTURER,
-  STRID_PRODUCT,
-  STRID_SERIAL,
-};
-
-// array of pointer to string descriptors
-static char const *string_desc_arr[] =
-{
-  (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
-  "TinyUSB",                     // 1: Manufacturer
-  "TinyUSB Device",              // 2: Product
-  NULL,                          // 3: Serials will use unique ID if possible
-};
-
-static uint16_t _desc_str[32 + 1];
-
-// Invoked when received GET STRING DESCRIPTOR request
-// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
-uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
-  (void) langid;
-  size_t chr_count;
-
-  switch ( index ) {
-    case STRID_LANGID:
-      memcpy(&_desc_str[1], string_desc_arr[0], 2);
-      chr_count = 1;
-      break;
-
-    case STRID_SERIAL:
-      chr_count = board_usb_get_serial(_desc_str + 1, 32);
-      break;
-
-    default:
-      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
-      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
-
-      if ( !(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0])) ) return NULL;
-
-      const char *str = string_desc_arr[index];
-
-      // Cap at max char
-      chr_count = strlen(str);
-      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
-      if ( chr_count > max_count ) chr_count = max_count;
-
-      // Convert ASCII string into UTF-16
-      for ( size_t i = 0; i < chr_count; i++ ) {
-        _desc_str[1 + i] = str[i];
-      }
-      break;
+// Storage buffer array for string descriptor to be sent to host.
+static uint16_t string_descriptor_buffer[STRING_DESCRIPTOR_MAX_LENGTH + 1];
+
+// TinyUSB GET STRING DESCRIPTOR callback.
+const uint16_t *tud_descriptor_string_cb(uint8_t index, [[maybe_unused]] uint16_t langid) {
+  size_t utf16_string_length;
+
+  if (index == LANGID) {
+    // langid is not a string as in a series of characters: language ID code is binary, 2 bytes
+    memcpy(string_descriptor_buffer + 1, STRING_DESCRIPTOR_VALUES[LANGID], 2);
+    utf16_string_length = 1; // 2 bytes = 1 UTF16 word
+
+  } else if (index == STR_SERIAL) {
+    // serialnumber is generated from pi pico: see note in STRING_DESCRIPTOR_VALUES definition
+    utf16_string_length = board_usb_get_serial(string_descriptor_buffer + 1, STRING_DESCRIPTOR_MAX_LENGTH);
+
+  } else if (index < STRING_COUNT) {
+    // Get adequate descriptor string
+    const char *str     = STRING_DESCRIPTOR_VALUES[index];
+    utf16_string_length = strlen(str);
+    if (utf16_string_length > STRING_DESCRIPTOR_MAX_LENGTH) {
+      utf16_string_length = STRING_DESCRIPTOR_MAX_LENGTH;
+    }
+    // Convert ASCII string from memory (char*) to UTF16 (for buffer),
+    // store in buffer with 1 UTF16 word offset (2 bytes, for buffer header)
+    for (size_t i = 0; i < utf16_string_length; i++) {
+      string_descriptor_buffer[i + 1] = str[i];
+    }
+
+  } else {
+    return NULL;
   }
 
-  // first byte is length (including header), second byte is string type
-  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
+  // Set buffer header:
+  // byte 1 - buffer length in bytes (including header)
+  // byte 0 - string descriptor type (0x03).
+  string_descriptor_buffer[0] = (uint16_t)((TUSB_DESC_STRING << 8) | (2 * utf16_string_length + 2));
 
-  return _desc_str;
+  return string_descriptor_buffer;
 }
diff --git a/examples/device/printer_to_hid/src/usb_descriptors.h b/examples/device/printer_to_hid/src/usb_descriptors.h
index 53c4e1fbd..0d9793a9c 100644
--- a/examples/device/printer_to_hid/src/usb_descriptors.h
+++ b/examples/device/printer_to_hid/src/usb_descriptors.h
@@ -25,6 +25,52 @@
 #ifndef USB_DESCRIPTORS_H_
 #define USB_DESCRIPTORS_H_
 
-REPORT_ID_KEYBOARD = 1
+#include "bsp/board_api.h"
+#include "tusb.h"
+
+#define USB_VID 0xCafe // unassigned vendor id
+#define USB_PID 0x4004 // random product id
+#define USB_BCD 0x0200 // binary coded version: 2.00
+
+// Configuration
+#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_HID_DESC_LEN + TUD_PRINTER_DESC_LEN)
+
+// HID interface endpoints
+#define EPADDR_HID 0x81 // Interrupt In, MSB must be 1
+// Printer interface endpoints
+#define EPADDR_PRINTER_OUT 0x01 // Bulk Out, MSB must be 0
+#define EPADDR_PRINTER_IN  0x82 // Bulk In, MSB must be 1
+
+// HID report ID
+#define REPORT_ID_KEYBOARD 1
+
+// The maximum length of the string that will be sent to the host via the STRING DESCRIPTOR. Note that the
+// string descriptor itself is two bytes wider than the string.
+#define STRING_DESCRIPTOR_MAX_LENGTH 32
+
+//--------------------------------------------------------------------+
+// Configuration, interface, endpoint descriptors
+//--------------------------------------------------------------------+
+
+enum {
+  ITF_HID,
+  ITF_PRINTER,
+  ITF_COUNT,
+};
+
+//--------------------------------------------------------------------+
+// String Descriptors
+//--------------------------------------------------------------------+
+
+enum {
+  LANGID = 0,
+  STR_MANUFACTURER,
+  STR_PRODUCT,
+  STR_SERIAL,
+  STR_CONFIGURATION,
+  STR_HID_INTERFACE,
+  STR_PRINTER_INTERFACE,
+  STRING_COUNT,
+};
 
 #endif /* USB_DESCRIPTORS_H_ */
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 1602e35eb..55ce6e1f8 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -98,6 +98,7 @@ target_sources(tinyusb_device_base INTERFACE
 		${TOP}/src/class/mtp/mtp_device.c
 		${TOP}/src/class/net/ecm_rndis_device.c
 		${TOP}/src/class/net/ncm_device.c
+		${TOP}/src/class/printer/printer_device.c
 		${TOP}/src/class/usbtmc/usbtmc_device.c
 		${TOP}/src/class/vendor/vendor_device.c
 		${TOP}/src/class/video/video_device.c
diff --git a/src/class/printer/printer.h b/src/class/printer/printer.h
index 27e95b997..c9ed3cebc 100644
--- a/src/class/printer/printer.h
+++ b/src/class/printer/printer.h
@@ -30,19 +30,18 @@
 #include "common/tusb_common.h"
 
 #ifdef __cplusplus
- extern "C" {
+extern "C" {
 #endif
 
 /// Printer Class Specific Control Request
-typedef enum
-{
+typedef enum {
   PRINTER_REQ_CONTROL_GET_DEVICE_ID   = 0x01, ///< Get device ID
   PRINTER_REQ_CONTROL_GET_PORT_STATUS = 0x02, ///< Get port status
   PRINTER_REQ_CONTROL_SOFT_RESET      = 0x03, ///< Soft reset
-}printer_request_enum_t;
+} printer_request_enum_t;
 
 #ifdef __cplusplus
- }
+}
 #endif
 
 #endif /* _TUSB_PRINTER_H__ */
diff --git a/src/class/printer/printer_device.c b/src/class/printer/printer_device.c
index efeae100f..76151949b 100644
--- a/src/class/printer/printer_device.c
+++ b/src/class/printer/printer_device.c
@@ -96,7 +96,7 @@ static bool _prep_out_transaction(uint8_t itf) {
   available = tu_fifo_remaining(&p_printer->rx_ff);
 
   if (available >= CFG_TUD_PRINTER_EP_BUFSIZE) {
-    return usbd_edpt_xfer(rhport, p_printer->ep_out, p_epbuf->epout, CFG_TUD_PRINTER_EP_BUFSIZE);
+    return usbd_edpt_xfer(rhport, p_printer->ep_out, p_epbuf->epout, CFG_TUD_PRINTER_EP_BUFSIZE, false);
   } else {
     // Release endpoint since we don't make any transfer
     usbd_edpt_release(rhport, p_printer->ep_out);
@@ -189,7 +189,7 @@ void printerd_reset(uint8_t rhport) {
   for (uint8_t i = 0; i < CFG_TUD_PRINTER; i++) {
     printer_interface_t *p_printer = &_printer_itf[i];
 
-    tu_memclr(p_printer, sizeof(p_printer));
+    tu_memclr(p_printer, sizeof(&p_printer));
     if (!_printer_fifo_cfg.rx_persistent) {
       tu_fifo_clear(&p_printer->rx_ff);
     }
@@ -202,6 +202,7 @@ void printerd_reset(uint8_t rhport) {
 }
 
 uint16_t printerd_open(uint8_t rhport, const tusb_desc_interface_t *itf_desc, uint16_t max_len) {
+  (void)max_len;
   TU_VERIFY(TUSB_CLASS_PRINTER == itf_desc->bInterfaceClass, 0);
 
   // Identify available interface to open
@@ -257,13 +258,13 @@ bool printerd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_
         break;
       case PRINTER_REQ_CONTROL_GET_PORT_STATUS:
         if (stage == CONTROL_STAGE_SETUP) {
-          static uint8_t port_status = (0 << 3) | (1 << 1) | (1 << 2); // ~Paper empty + Selected + NoError
+          static uint8_t port_status = 0b00011000; // paper not empty, selected, no error
           return tud_control_xfer(rhport, request, &port_status, sizeof(port_status));
         }
         break;
       case PRINTER_REQ_CONTROL_SOFT_RESET:
         if (stage == CONTROL_STAGE_SETUP) {
-          return false; // what to do ?
+          return false; // TODO: reset buffers, reset Bulk In and Out endpoints, clear stall conditions
         }
         break;
       default:
@@ -276,6 +277,8 @@ bool printerd_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_
 }
 
 bool printerd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
+  (void)rhport;
+  (void)result;
   uint8_t              itf;
   printer_interface_t *p_printer;
 
@@ -293,7 +296,7 @@ bool printerd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uin
   if (ep_addr == p_printer->ep_out) {
     tu_fifo_write_n(&p_printer->rx_ff, p_epbuf->epout, (uint16_t)xferred_bytes);
     // invoke receive callback (if there is still data)
-    if (tud_printer_rx_cb && !tu_fifo_empty(&p_printer->rx_ff)) {
+    if (!tu_fifo_empty(&p_printer->rx_ff)) {
       tud_printer_rx_cb(itf, xferred_bytes);
     }
     // prepare for OUT transaction
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 3b296feea..d473aea2a 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -292,6 +292,19 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
   /* Endpoint In */\
   7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
 
+//--------------------------------------------------------------------+
+// Printer Descriptor Templates
+//--------------------------------------------------------------------+
+
+#define TUD_PRINTER_DESC_LEN (9 + 7 + 7)  // one interface, two endpoints
+
+#define TUD_PRINTER_DESCRIPTOR(_itfnum, _stridx, _epout, _epin, _epsize) \
+  /* Interface */\
+  9, TUSB_DESC_INTERFACE, _itfnum, 0, 2, TUSB_CLASS_PRINTER, 1, 2, _stridx,\
+  /* Endpoint Out */\
+  7, TUSB_DESC_ENDPOINT, _epout, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0,\
+  /* Endpoint In */\
+  7, TUSB_DESC_ENDPOINT, _epin, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0
 
 //--------------------------------------------------------------------+
 // MTP Descriptor Templates
diff --git a/src/tusb.h b/src/tusb.h
index 256a239e7..1f4d4b73a 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -88,6 +88,10 @@
     #include "class/msc/msc_device.h"
   #endif
 
+  #if CFG_TUD_PRINTER
+    #include "class/printer/printer_device.h"
+  #endif
+
   #if CFG_TUD_MTP
     #include "class/mtp/mtp_device.h"
   #endif
-- 
cgit v1.3.1


From 0b970e6a6633f703acb0f40b52b741cf492ff166 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 00:08:43 +0700
Subject: only apply errata E5 and E15 for rp2040. rp2350 already fixes these

---
 hw/bsp/rp2040/family.cmake                   |   6 +-
 src/portable/raspberrypi/rp2040/dcd_rp2040.c |  14 ++--
 src/portable/raspberrypi/rp2040/hcd_rp2040.c | 119 ++++++++++-----------------
 src/portable/raspberrypi/rp2040/rp2040_usb.c |  25 +++---
 src/portable/raspberrypi/rp2040/rp2040_usb.h |  67 +++++++++------
 5 files changed, 109 insertions(+), 122 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 1602e35eb..9dc28fc70 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -126,7 +126,7 @@ target_compile_definitions(tinyusb_host_base INTERFACE
 
 #------------------------------------
 # Host MAX3421
-#------------------------------------
+#------------------------------------1
 add_library(tinyusb_host_max3421 INTERFACE)
 target_sources(tinyusb_host_max3421 INTERFACE
 	${TOP}/src/portable/analog/max3421/hcd_max3421.c
@@ -157,10 +157,12 @@ target_link_libraries(tinyusb_bsp INTERFACE
 # tinyusb_additions will hold our extra settings for examples
 add_library(tinyusb_additions INTERFACE)
 
+if (PICO_PLATFORM STREQUAL rp2040)
 target_compile_definitions(tinyusb_additions INTERFACE
 	PICO_RP2040_USB_DEVICE_ENUMERATION_FIX=1
 	PICO_RP2040_USB_DEVICE_UFRAME_FIX=1
-)
+	)
+endif ()
 
 if(LOGGER STREQUAL "RTT" OR LOGGER STREQUAL "rtt")
 	target_compile_definitions(tinyusb_additions INTERFACE
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index 952245cb1..bdd0d1728 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -92,6 +92,12 @@ static void hw_endpoint_init(hw_endpoint_t *ep, uint8_t ep_addr, uint16_t wMaxPa
     // double buffered Bulk endpoint
     if (transfer_type == TUSB_XFER_BULK) {
       size *= 2u;
+
+  #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+      if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
+        ep->e15_bulk_in = true;
+      }
+  #endif
     }
 
     // assign buffer
@@ -221,17 +227,14 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void) {
       struct hw_endpoint *ep = hw_endpoint_get(i, TUSB_DIR_IN);
 
       // Active Bulk IN endpoint requires SOF
-      if ((ep->transfer_type == TUSB_XFER_BULK) && ep->active) {
+      if (ep->e15_bulk_in && ep->active) {
         keep_sof_alive = true;
 
         hw_endpoint_lock_update(ep, 1);
-
-        // Deferred enable?
         if (ep->pending) {
           ep->pending = 0;
           hw_endpoint_start_next_buffer(ep);
         }
-
         hw_endpoint_lock_update(ep, -1);
       }
     }
@@ -292,7 +295,7 @@ static void __tusb_irq_path_func(dcd_rp2040_irq)(void) {
     dcd_event_bus_reset(0, TUSB_SPEED_FULL, true);
     usb_hw_clear->sie_status = USB_SIE_STATUS_BUS_RESET_BITS;
 
-#if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
+  #if TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
     // Only run enumeration workaround if pull up is enabled
     if (usb_hw->sie_ctrl & USB_SIE_CTRL_PULLUP_EN_BITS) {
       rp2040_usb_device_enumeration_fix();
@@ -491,7 +494,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *ep_desc)
 
 void dcd_edpt_close_all(uint8_t rhport) {
   (void) rhport;
-
   // may need to use EP Abort
   reset_non_control_endpoints();
 }
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index db3a81c87..1193009ef 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -82,15 +82,13 @@ TU_ATTR_ALWAYS_INLINE static inline uint8_t dev_speed(void) {
   return (usb_hw->sie_status & USB_SIE_STATUS_SPEED_BITS) >> USB_SIE_STATUS_SPEED_LSB;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool need_pre(uint8_t dev_addr)
-{
+TU_ATTR_ALWAYS_INLINE static inline bool need_pre(uint8_t dev_addr) {
   // If this device is different to the speed of the root device
   // (i.e. is a low speed device on a full speed hub) then need pre
   return hcd_port_speed_get(0) != tuh_speed_get(dev_addr);
 }
 
-static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result)
-{
+static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_result_t xfer_result) {
   // Mark transfer as done before we tell the tinyusb stack
   uint8_t dev_addr = ep->dev_addr;
   uint8_t ep_addr = ep->ep_addr;
@@ -99,35 +97,28 @@ static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_
   hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true);
 }
 
-static void __tusb_irq_path_func(_handle_buff_status_bit)(uint bit, struct hw_endpoint *ep) {
+static void __tusb_irq_path_func(handle_hhwbuf_status_bit)(uint bit, struct hw_endpoint *ep) {
   usb_hw_clear->buf_status = bit;
-  // EP may have been stalled?
-  assert(ep->active);
-  bool done = hw_endpoint_xfer_continue(ep);
-  if ( done )
-  {
+  const bool done          = hw_endpoint_xfer_continue(ep);
+  if (done) {
     hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
   }
 }
 
 static void __tusb_irq_path_func(handle_hwbuf_status)(void) {
-  uint32_t remaining_buffers = usb_hw->buf_status;
-  pico_trace("buf_status 0x%08lx\n", remaining_buffers);
+  uint32_t buf_status = usb_hw->buf_status;
+  pico_trace("buf_status 0x%08lx\n", buf_status);
 
   // Check EPX first
   uint bit = 0b1;
-  if (remaining_buffers & bit) {
-    remaining_buffers &= ~bit;
+  if (buf_status & bit) {
+    buf_status &= ~bit;
     struct hw_endpoint * ep = &epx;
-
-    // uint32_t ep_ctrl = *hwep_ctrl_reg_host(ep);
-    // TU_LOG_HEX(3, ep_ctrl);
-
-    _handle_buff_status_bit(bit, ep);
+    handle_hhwbuf_status_bit(bit, ep);
   }
 
   // Check "interrupt" (asynchronous) endpoints for both IN and OUT
-  for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && remaining_buffers; i++) {
+  for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && buf_status; i++) {
     // EPX is bit 0 & 1
     // IEP1 IN  is bit 2
     // IEP1 OUT is bit 3
@@ -138,15 +129,15 @@ static void __tusb_irq_path_func(handle_hwbuf_status)(void) {
     // etc
     for (uint j = 0; j < 2; j++) {
       bit = 1 << (i * 2 + j);
-      if (remaining_buffers & bit) {
-        remaining_buffers &= ~bit;
-        _handle_buff_status_bit(bit, &ep_pool[i]);
+      if (buf_status & bit) {
+        buf_status &= ~bit;
+        handle_hhwbuf_status_bit(bit, &ep_pool[i]);
       }
     }
   }
 
-  if (remaining_buffers) {
-    panic("Unhandled buffer %d\n", remaining_buffers);
+  if (buf_status) {
+    panic("Unhandled buffer %d\n", buf_status);
   }
 }
 
@@ -251,7 +242,7 @@ static struct hw_endpoint *_next_free_interrupt_ep(void)
     ep = &ep_pool[i];
     if ( !ep->configured )
     {
-      // Will be configured by _hw_endpoint_init / _hw_endpoint_allocate
+      // Will be configured by hw_endpoint_init / hw_endpoint_allocate
       ep->interrupt_num = (uint8_t) (i - 1);
       return ep;
     }
@@ -259,12 +250,13 @@ static struct hw_endpoint *_next_free_interrupt_ep(void)
   return ep;
 }
 
-static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
-{
-  struct hw_endpoint * ep = NULL;
+static hw_endpoint_t *hw_endpoint_allocate(uint8_t transfer_type) {
+  hw_endpoint_t *ep = NULL;
 
-  if ( transfer_type != TUSB_XFER_CONTROL )
-  {
+  if (transfer_type == TUSB_XFER_CONTROL) {
+    ep              = &epx;
+    ep->hw_data_buf = &usbh_dpram->epx_data[0];
+  } else {
     // Note: even though datasheet name these "Interrupt" endpoints. These are actually
     // "Asynchronous" endpoints and can be used for other type such as: Bulk  (ISO need confirmation)
     ep = _next_free_interrupt_ep();
@@ -276,17 +268,12 @@ static struct hw_endpoint *_hw_endpoint_allocate(uint8_t transfer_type)
     // etc
     ep->hw_data_buf = &usbh_dpram->epx_data[64 * (ep->interrupt_num + 2)];
   }
-  else
-  {
-    ep = &epx;
-    ep->hw_data_buf = &usbh_dpram->epx_data[0];
-  }
 
   return ep;
 }
 
-static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint16_t wMaxPacketSize, uint8_t transfer_type, uint8_t bmInterval)
-{
+static void hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t ep_addr, uint16_t wMaxPacketSize,
+                             uint8_t transfer_type, uint8_t bmInterval) {
   // Already has data buffer, endpoint control, and buffer control allocated at this point
   assert(ep->hw_data_buf);
 
@@ -299,7 +286,6 @@ static void _hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t
   // Response to a setup packet on EP0 starts with pid of 1
   ep->next_pid = (num == 0 ? 1u : 0u);
   ep->wMaxPacketSize = wMaxPacketSize;
-  ep->transfer_type = transfer_type;
 
   pico_trace("hw_endpoint_init dev %d ep %02X xfer %d\n", ep->dev_addr, ep->ep_addr, ep->transfer_type);
   pico_trace("dev %d ep %02X setup buffer @ 0x%p\n", ep->dev_addr, ep->ep_addr, ep->hw_data_buf);
@@ -463,46 +449,33 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
   }
 }
 
-uint32_t hcd_frame_number(uint8_t rhport)
-{
-  (void) rhport;
+uint32_t hcd_frame_number(uint8_t rhport) {
+  (void)rhport;
   return usb_hw->sof_rd;
 }
 
-void hcd_int_enable(uint8_t rhport)
-{
-  (void) rhport;
-  assert(rhport == 0);
+void hcd_int_enable(uint8_t rhport) {
+  (void)rhport;
   irq_set_enabled(USBCTRL_IRQ, true);
 }
 
-void hcd_int_disable(uint8_t rhport)
-{
-  (void) rhport;
+void hcd_int_disable(uint8_t rhport) {
+  (void)rhport;
   // todo we should check this is disabling from the correct core; note currently this is never called
-  assert(rhport == 0);
   irq_set_enabled(USBCTRL_IRQ, false);
 }
 
 //--------------------------------------------------------------------+
 // Endpoint API
 //--------------------------------------------------------------------+
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const * ep_desc)
-{
-  (void) rhport;
-
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, const tusb_desc_endpoint_t *ep_desc) {
+  (void)rhport;
   pico_trace("hcd_edpt_open dev_addr %d, ep_addr %d\n", dev_addr, ep_desc->bEndpointAddress);
-
-  // Allocated differently based on if it's an interrupt endpoint or not
-  struct hw_endpoint *ep = _hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
+  hw_endpoint_t *ep = hw_endpoint_allocate(ep_desc->bmAttributes.xfer);
   TU_ASSERT(ep);
 
-  _hw_endpoint_init(ep,
-                    dev_addr,
-                    ep_desc->bEndpointAddress,
-                    tu_edpt_packet_size(ep_desc),
-                    ep_desc->bmAttributes.xfer,
-                    ep_desc->bInterval);
+  hw_endpoint_init(ep, dev_addr, ep_desc->bEndpointAddress, tu_edpt_packet_size(ep_desc), ep_desc->bmAttributes.xfer,
+                   ep_desc->bInterval);
 
   return true;
 }
@@ -512,13 +485,12 @@ bool hcd_edpt_close(uint8_t rhport, uint8_t daddr, uint8_t ep_addr) {
   return false; // TODO not implemented yet
 }
 
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t * buffer, uint16_t buflen)
-{
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *buffer, uint16_t buflen) {
   (void) rhport;
 
   pico_trace("hcd_edpt_xfer dev_addr %d, ep_addr 0x%x, len %d\n", dev_addr, ep_addr, buflen);
 
-  uint8_t const ep_num = tu_edpt_number(ep_addr);
+  const uint8_t    ep_num = tu_edpt_number(ep_addr);
   tusb_dir_t const ep_dir = tu_edpt_dir(ep_addr);
 
   // Get appropriate ep. Either EPX or interrupt endpoint
@@ -530,19 +502,17 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
   assert(!ep->active);
 
   // Control endpoint can change direction 0x00 <-> 0x80
-  if ( ep_addr != ep->ep_addr )
-  {
+  if (ep_addr != ep->ep_addr) {
     assert(ep_num == 0);
 
     // Direction has flipped on endpoint control so re init it but with same properties
-    _hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, ep->transfer_type, 0);
+    hw_endpoint_init(ep, dev_addr, ep_addr, ep->wMaxPacketSize, TUSB_XFER_CONTROL, 0);
   }
 
   // If a normal transfer (non-interrupt) then initiate using
   // sie ctrl registers. Otherwise, interrupt ep registers should
   // already be configured
-  if ( ep == &epx )
-  {
+  if (ep == &epx) {
     hw_endpoint_xfer_start(ep, buffer, buflen);
 
     // That has set up buffer control, endpoint control etc
@@ -558,8 +528,7 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr, uint8_t *
     usb_hw->sie_ctrl = flags & ~USB_SIE_CTRL_START_TRANS_BITS;
     busy_wait_at_least_cycles(12);
     usb_hw->sie_ctrl = flags;
-  }else
-  {
+  } else {
     hw_endpoint_xfer_start(ep, buffer, buflen);
   }
 
@@ -584,14 +553,14 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   }
 
   // Configure EP0 struct with setup info for the trans complete
-  struct hw_endpoint * ep = _hw_endpoint_allocate( (uint8_t) TUSB_XFER_CONTROL);
+  hw_endpoint_t *ep = hw_endpoint_allocate((uint8_t)TUSB_XFER_CONTROL);
   TU_ASSERT(ep);
 
   // EPX should be inactive
   assert(!ep->active);
 
   // EP0 out
-  _hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0);
+  hw_endpoint_init(ep, dev_addr, 0x00, ep->wMaxPacketSize, 0, 0);
   assert(ep->configured);
 
   ep->remaining_len = 8;
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index 9c9255518..8f91ecf22 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -38,10 +38,8 @@
 static void hwep_xfer_sync(hw_endpoint_t *ep);
 
   #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
-static bool e15_is_bulkin_ep(struct hw_endpoint *ep);
 static bool e15_is_critical_frame_period(struct hw_endpoint *ep);
   #else
-    #define e15_is_bulkin_ep(x)             (false)
     #define e15_is_critical_frame_period(x) (false)
   #endif
 
@@ -228,13 +226,16 @@ void hw_endpoint_xfer_start(struct hw_endpoint* ep, uint8_t* buffer, uint16_t to
   ep->active = true;
   ep->user_buf = buffer;
 
-  if (e15_is_bulkin_ep(ep)) {
+  #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  if (ep->e15_bulk_in) {
     usb_hw_set->inte = USB_INTS_DEV_SOF_BITS;
   }
 
   if (e15_is_critical_frame_period(ep)) {
-    ep->pending = 1;
-  } else {
+    ep->pending = 1; // skip transfer if we are in critical frame period
+  } else
+  #endif
+  {
     hw_endpoint_start_next_buffer(ep);
   }
 
@@ -360,9 +361,12 @@ bool __tusb_irq_path_func(hw_endpoint_xfer_continue)(struct hw_endpoint* ep) {
     hw_endpoint_lock_update(ep, -1);
     return true;
   } else {
+  #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
     if (e15_is_critical_frame_period(ep)) {
       ep->pending = 1;
-    } else {
+    } else
+  #endif
+    {
       hw_endpoint_start_next_buffer(ep);
     }
   }
@@ -397,15 +401,12 @@ bool __tusb_irq_path_func(hw_endpoint_xfer_continue)(struct hw_endpoint* ep) {
 
 volatile uint32_t e15_last_sof = 0;
 
-// check if Errata 15 is needed for this endpoint i.e device bulk-in
-static bool __tusb_irq_path_func(e15_is_bulkin_ep)(struct hw_endpoint *ep) {
-  return (!rp2usb_is_host_mode() && tu_edpt_dir(ep->ep_addr) == TUSB_DIR_IN && ep->transfer_type == TUSB_XFER_BULK);
-}
-
 // check if we need to apply Errata 15 workaround : i.e
 // Endpoint is BULK IN and is currently in critical frame period i.e 20% of last usb frame
 static bool __tusb_irq_path_func(e15_is_critical_frame_period)(struct hw_endpoint* ep) {
-  TU_VERIFY(e15_is_bulkin_ep(ep));
+  if (!ep->e15_bulk_in) {
+    return false;
+  }
 
   /* Avoid the last 200us (uframe 6.5-7) of a frame, up to the EOF2 point.
    * The device state machine cannot recover from receiving an incorrect PID
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index 368bb6509..944d604bc 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -13,17 +13,30 @@
   #error TinyUSB device and host mode not supported at the same time
 #endif
 
-#if defined(PICO_RP2040_USB_DEVICE_ENUMERATION_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX)
-#define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX
+// E5 and E15 only apply to RP2040
+#if defined(PICO_RP2040) && PICO_RP2040 == 1
+  // RP2040 E5: USB device fails to exit RESET state on busy USB bus.
+  #if defined(PICO_RP2040_USB_DEVICE_ENUMERATION_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX)
+    #define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX PICO_RP2040_USB_DEVICE_ENUMERATION_FIX
+  #endif
+
+  // RP2040 E15: USB Device controller will hang if certain bus errors occur during an IN transfer.
+  #if defined(PICO_RP2040_USB_DEVICE_UFRAME_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX)
+    #define TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX PICO_RP2040_USB_DEVICE_UFRAME_FIX
+  #endif
 #endif
 
-#if defined(PICO_RP2040_USB_DEVICE_UFRAME_FIX) && !defined(TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX)
-#define TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX PICO_RP2040_USB_DEVICE_UFRAME_FIX
+#ifndef TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX
+  #define TUD_OPT_RP2040_USB_DEVICE_ENUMERATION_FIX 0
+#endif
+
+#ifndef TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  #define TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX 0
 #endif
 
 #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
-#undef PICO_RP2040_USB_FAST_IRQ
-#define PICO_RP2040_USB_FAST_IRQ 1
+  #undef PICO_RP2040_USB_FAST_IRQ
+  #define PICO_RP2040_USB_FAST_IRQ 1
 #endif
 
 #ifndef PICO_RP2040_USB_FAST_IRQ
@@ -46,36 +59,36 @@
 #define pico_trace(...) TU_LOG(3, __VA_ARGS__)
 
 // Hardware information per endpoint
-typedef struct hw_endpoint
-{
-    uint8_t ep_addr;
-    uint8_t next_pid;
-    // Interrupt, bulk, etc
-    uint8_t transfer_type;
+typedef struct hw_endpoint {
+  uint8_t ep_addr;
+  uint8_t next_pid;
+  uint8_t transfer_type;
 
-    bool    active;  // Endpoint is in use
-    uint8_t pending; // Transfer scheduled but not active
+  bool active;         // transferring data
 
-    uint16_t wMaxPacketSize;
+#if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
+  bool    e15_bulk_in; // Errata15 device bulk in
+  uint8_t pending;     // Transfer scheduled but not active
+#endif
 
-    uint8_t *hw_data_buf; // Buffer pointer in usb dpram
+  uint16_t wMaxPacketSize;
+  uint8_t *hw_data_buf; // Buffer pointer in usb dpram
 
-    // Current transfer information
-    uint8_t *user_buf; // User buffer in main memory
-    uint16_t remaining_len;
-    uint16_t xferred_len;
+  // Current transfer information
+  uint8_t *user_buf; // User buffer in main memory
+  uint16_t remaining_len;
+  uint16_t xferred_len;
 
 #if CFG_TUH_ENABLED
-    // Is this a valid struct
-    bool configured;
+  // Is this a valid struct
+  bool configured;
 
-    // Only needed for host
-    uint8_t dev_addr;
+  // Only needed for host
+  uint8_t dev_addr;
 
-    // If interrupt endpoint
-    uint8_t interrupt_num;
+  // If interrupt endpoint
+  uint8_t interrupt_num;
 #endif
-
 } hw_endpoint_t;
 
 #if TUD_OPT_RP2040_USB_DEVICE_UFRAME_FIX
-- 
cgit v1.3.1


From e69494d94a680c7b5aa5310338c206921d57640b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 10:47:50 +0700
Subject: fix pre-commit, clean up tusb_mcu.h, add at32f45x to ci build

---
 .github/workflows/ci_set_matrix.py |  3 ++-
 hw/bsp/at32f45x/at32f45x_clock.c   |  2 +-
 hw/bsp/at32f45x/at32f45x_clock.h   |  1 -
 hw/bsp/at32f45x/at32f45x_int.c     |  1 -
 hw/bsp/at32f45x/at32f45x_int.h     |  1 -
 src/common/tusb_mcu.h              | 22 +---------------------
 6 files changed, 4 insertions(+), 26 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index c276d5253..237a34b9f 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -15,7 +15,8 @@ toolchain_list = [
 
 # family: [supported toolchain]
 family_list = {
-    "at32f402_405 at32f403a_407 at32f413 at32f415 at32f423 at32f425 at32f435_437 broadcom_32bit da1469x": ["arm-gcc"],
+    "at32f45x at32f402_405 at32f403a_407 at32f413 at32f415 at32f423 at32f425 at32f435_437 broadcom_32bit da1469x": [
+        "arm-gcc"],
     "broadcom_64bit": ["aarch64-gcc"],
     "ch32v10x ch32v20x ch32v30x fomu gd32vf103 hpmicro": ["riscv-gcc"],
     "imxrt": ["arm-gcc", "arm-clang"],
diff --git a/hw/bsp/at32f45x/at32f45x_clock.c b/hw/bsp/at32f45x/at32f45x_clock.c
index 12003cf5a..a6724e23f 100644
--- a/hw/bsp/at32f45x/at32f45x_clock.c
+++ b/hw/bsp/at32f45x/at32f45x_clock.c
@@ -55,7 +55,7 @@ void system_clock_config(void)
 
     /* enable pwc periph clock */
   crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
- 
+
   /* config ldo voltage */
   pwc_ldo_output_voltage_set(PWC_LDO_OUTPUT_1V3);
 
diff --git a/hw/bsp/at32f45x/at32f45x_clock.h b/hw/bsp/at32f45x/at32f45x_clock.h
index 1fd2035aa..a372a605b 100644
--- a/hw/bsp/at32f45x/at32f45x_clock.h
+++ b/hw/bsp/at32f45x/at32f45x_clock.h
@@ -42,4 +42,3 @@ void system_clock_config(void);
 #endif
 
 #endif
-
diff --git a/hw/bsp/at32f45x/at32f45x_int.c b/hw/bsp/at32f45x/at32f45x_int.c
index 15798e381..15ff90c64 100644
--- a/hw/bsp/at32f45x/at32f45x_int.c
+++ b/hw/bsp/at32f45x/at32f45x_int.c
@@ -98,4 +98,3 @@ void DebugMon_Handler(void)
 /**
   * @}
   */
-
diff --git a/hw/bsp/at32f45x/at32f45x_int.h b/hw/bsp/at32f45x/at32f45x_int.h
index 64930f29e..3a2667e9d 100644
--- a/hw/bsp/at32f45x/at32f45x_int.h
+++ b/hw/bsp/at32f45x/at32f45x_int.h
@@ -57,4 +57,3 @@ void OTGFS1_WKUP_IRQHandler(void);
 #endif
 
 #endif
-
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index cbdcd2dfc..5b9497b9a 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -635,17 +635,7 @@
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 4
 
-#elif TU_CHECK_MCU(OPT_MCU_AT32F435_437)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F423)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405)
+#elif TU_CHECK_MCU(OPT_MCU_AT32F402_405, OPT_MCU_AT32F423, OPT_MCU_AT32F425, OPT_MCU_AT32F435_437, OPT_MCU_AT32F45X)
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_AT32
   #define TUP_DCD_ENDPOINT_MAX 8
@@ -657,16 +647,6 @@
     #define TUP_RHPORT_HIGHSPEED 1 // Port0: FS, Port1: HS
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_AT32F425)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
-#elif TU_CHECK_MCU(OPT_MCU_AT32F45X)
-  #define TUP_USBIP_DWC2
-  #define TUP_USBIP_DWC2_AT32
-  #define TUP_DCD_ENDPOINT_MAX 8
-
 //--------------------------------------------------------------------+
 // HPMicro
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From 9465ce985bcf5732795d2aea5df4fd6315896cf9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 11:01:58 +0700
Subject: apply copilot suggestion

---
 hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h | 2 +-
 hw/bsp/at32f45x/at32f45x_clock.c                | 2 +-
 hw/bsp/at32f45x/at32f45x_int.c                  | 4 ++--
 hw/bsp/at32f45x/family.c                        | 4 ++--
 tools/build.py                                  | 4 +++-
 5 files changed, 9 insertions(+), 7 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
index 8a9906d39..7a4393ad7 100644
--- a/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -49,7 +49,7 @@
 
 #endif
 
-/* Cortex M23/M33 port configuration. */
+/* Cortex-M4 port configuration. */
 #define configENABLE_MPU								        0
 #define configENABLE_FPU								        1
 #define configENABLE_TRUSTZONE					        0
diff --git a/hw/bsp/at32f45x/at32f45x_clock.c b/hw/bsp/at32f45x/at32f45x_clock.c
index a6724e23f..a66a8b1aa 100644
--- a/hw/bsp/at32f45x/at32f45x_clock.c
+++ b/hw/bsp/at32f45x/at32f45x_clock.c
@@ -53,7 +53,7 @@ void system_clock_config(void)
   /* set the flash clock divider */
   flash_psr_set(FLASH_WAIT_CYCLE_5);
 
-    /* enable pwc periph clock */
+  /* enable pwc periph clock */
   crm_periph_clock_enable(CRM_PWC_PERIPH_CLOCK, TRUE);
 
   /* config ldo voltage */
diff --git a/hw/bsp/at32f45x/at32f45x_int.c b/hw/bsp/at32f45x/at32f45x_int.c
index 15ff90c64..b3ba6ad9c 100644
--- a/hw/bsp/at32f45x/at32f45x_int.c
+++ b/hw/bsp/at32f45x/at32f45x_int.c
@@ -26,11 +26,11 @@
 /* includes ------------------------------------------------------------------*/
 #include "at32f45x_int.h"
 
-/** @addtogroup AT32F455_periph_examples
+/** @addtogroup AT32F45X_BSP
   * @{
   */
 
-/** @addtogroup 455_USB_device_keyboard
+/** @addtogroup AT32F45X_USB_Device_Keyboard
   * @{
   */
 
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
index 32bae96af..79da6aec2 100644
--- a/hw/bsp/at32f45x/family.c
+++ b/hw/bsp/at32f45x/family.c
@@ -202,7 +202,7 @@ int board_uart_read(uint8_t *buf, int len) {
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
   int txsize = len;
-  u16 timeout = 0xffff;
+  uint16_t timeout = 0xffff;
   while (txsize--) {
     while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
       timeout--;
@@ -252,7 +252,7 @@ void _init(void) {
 void assert_failed(const char *file, uint32_t line) {
   /* USER CODE BEGIN 6 */
   /* User can add his own implementation to report the file name and line number,
-     tex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
+     e.g.: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
   /* USER CODE END 6 */
 }
 #endif /* USE_FULL_ASSERT */
diff --git a/tools/build.py b/tools/build.py
index 87064b7a0..d22d06a0b 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -40,7 +40,9 @@ ci_skip_boards = {
 }
 
 ci_preferred_boards = {
-    'stm32h7': ['stm32h743eval'],
+    'samd2x_l2x': ['metro_m0_express'],
+    'samd5x_e5x': ['metro_m4_express'],
+    'stm32h7': ['stm32h743eval']
 }
 
 
-- 
cgit v1.3.1


From 6ab368f655f8aff3bf684066af85ccd4287aadad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 11:22:55 +0700
Subject: fix missing SystemCoreClock

---
 hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h | 3 +--
 hw/bsp/at32f45x/family.c                        | 2 +-
 2 files changed, 2 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
index 7a4393ad7..c5b89452e 100644
--- a/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/at32f45x/FreeRTOSConfig/FreeRTOSConfig.h
@@ -46,7 +46,6 @@
 #ifndef __IASMARM__
 // Include MCU header
   #include "at32f45x.h"
-
 #endif
 
 /* Cortex-M4 port configuration. */
@@ -57,7 +56,7 @@
 
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
-#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configCPU_CLOCK_HZ                      system_core_clock
 #define configTICK_RATE_HZ                      ( 1000 )
 #define configMAX_PRIORITIES                    ( 5 )
 #define configMINIMAL_STACK_SIZE                ( 128 )
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
index 79da6aec2..0593e5115 100644
--- a/hw/bsp/at32f45x/family.c
+++ b/hw/bsp/at32f45x/family.c
@@ -64,7 +64,7 @@ void board_init(void) {
 
   /* configure systick */
   systick_clock_source_config(SYSTICK_CLOCK_SOURCE_AHBCLK_NODIV);
-  SysTick_Config(SystemCoreClock / 1000);
+  SysTick_Config(system_core_clock / 1000);
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(OTG_IRQ, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-- 
cgit v1.3.1


From 8452dfe3055c876a1c8cb1f52c7bceeae6678452 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 10:28:27 +0700
Subject: clean up

---
 .idea/debugServers/mcxa153.xml               | 13 ++++++++++
 .idea/debugServers/ra6m1.xml                 | 13 ++++++++++
 .idea/debugServers/ra6m5.xml                 | 13 ++++++++++
 .idea/debugServers/rt1011.xml                | 13 ++++++++++
 .idea/debugServers/rt1170.xml                | 13 ++++++++++
 .idea/debugServers/stm32f072.xml             | 13 ++++++++++
 .idea/debugServers/stm32f303.xml             | 13 ++++++++++
 .idea/debugServers/stm32l053.xml             | 13 ++++++++++
 hw/bsp/rp2040/family.cmake                   |  2 +-
 src/portable/raspberrypi/rp2040/dcd_rp2040.c |  4 ++--
 src/portable/raspberrypi/rp2040/hcd_rp2040.c | 36 +++++++++++++---------------
 src/tusb_option.h                            |  2 +-
 12 files changed, 125 insertions(+), 23 deletions(-)
 create mode 100644 .idea/debugServers/mcxa153.xml
 create mode 100644 .idea/debugServers/ra6m1.xml
 create mode 100644 .idea/debugServers/ra6m5.xml
 create mode 100644 .idea/debugServers/rt1011.xml
 create mode 100644 .idea/debugServers/rt1170.xml
 create mode 100644 .idea/debugServers/stm32f072.xml
 create mode 100644 .idea/debugServers/stm32f303.xml
 create mode 100644 .idea/debugServers/stm32l053.xml

(limited to 'hw')

diff --git a/.idea/debugServers/mcxa153.xml b/.idea/debugServers/mcxa153.xml
new file mode 100644
index 000000000..0e493cbd5
--- /dev/null
+++ b/.idea/debugServers/mcxa153.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="mcxa153" uniqueID="6a023429-69e6-4f8c-a592-4995cdf255db">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="MCXA153" reset-before="false" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/ra6m1.xml b/.idea/debugServers/ra6m1.xml
new file mode 100644
index 000000000..17c902ec4
--- /dev/null
+++ b/.idea/debugServers/ra6m1.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="ra6m1" uniqueID="c8cdc79a-939b-4342-92b1-d24da72d12fe">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="R7FA6M1AD" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/ra6m5.xml b/.idea/debugServers/ra6m5.xml
new file mode 100644
index 000000000..d8dfbdeeb
--- /dev/null
+++ b/.idea/debugServers/ra6m5.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="ra6m5" uniqueID="19100d9f-7329-47da-b566-f9faf297f47c">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="R7FA6M5BH" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/rt1011.xml b/.idea/debugServers/rt1011.xml
new file mode 100644
index 000000000..b4be501bd
--- /dev/null
+++ b/.idea/debugServers/rt1011.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="rt1011" uniqueID="e10c53c4-acf5-4a6f-a05d-32b7b042d70a">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="MIMXRT1011xxx5A" reset-before="false" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/rt1170.xml b/.idea/debugServers/rt1170.xml
new file mode 100644
index 000000000..9a564ed57
--- /dev/null
+++ b/.idea/debugServers/rt1170.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="rt1170" uniqueID="cfc772e4-782e-49a3-99fb-b6f726e14f9d">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="MIMXRT1176xxxA_M7" reset-before="false" frequency="16000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32f072.xml b/.idea/debugServers/stm32f072.xml
new file mode 100644
index 000000000..c56f5a8fb
--- /dev/null
+++ b/.idea/debugServers/stm32f072.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32f072" uniqueID="f5c65701-0f8d-4923-a7ea-3ee2547147ae">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="STM32F072RB" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32f303.xml b/.idea/debugServers/stm32f303.xml
new file mode 100644
index 000000000..84aafc1e3
--- /dev/null
+++ b/.idea/debugServers/stm32f303.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32f303" uniqueID="1cdd63e5-1736-42be-bff3-4c48e1f169fa">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="STM32F303VC" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/.idea/debugServers/stm32l053.xml b/.idea/debugServers/stm32l053.xml
new file mode 100644
index 000000000..5365189cc
--- /dev/null
+++ b/.idea/debugServers/stm32l053.xml
@@ -0,0 +1,13 @@
+<component name="DebugServers">
+  <jlink-debug-target name="stm32l053" uniqueID="51d156d7-86a6-4006-814a-ed14981d7b49">
+    <debugger version="1">
+      <debugger kind="GDB" isBundled="true" />
+      <env />
+    </debugger>
+    <gdbserver exe="/usr/bin/JLinkGDBServerCLExe" />
+    <console port="19021" />
+    <target device="STM32L053R8" reset-before="false" frequency="12000" />
+    <connection extended-remote="false" port="4444" warmup-ms="500" />
+    <swo />
+  </jlink-debug-target>
+</component>
\ No newline at end of file
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 9dc28fc70..40eee082d 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -126,7 +126,7 @@ target_compile_definitions(tinyusb_host_base INTERFACE
 
 #------------------------------------
 # Host MAX3421
-#------------------------------------1
+#------------------------------------
 add_library(tinyusb_host_max3421 INTERFACE)
 target_sources(tinyusb_host_max3421 INTERFACE
 	${TOP}/src/portable/analog/max3421/hcd_max3421.c
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index bdd0d1728..71d5cf19c 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -39,9 +39,9 @@
 #include "device/dcd.h"
 
 // Current implementation force vbus detection as always present, causing device think it is always plugged into host.
-// Therefore it cannot detect disconnect event, mistaken it as suspend.
+// Therefore, it cannot detect disconnect event, mistaken it as suspend.
 // Note: won't work if change to 0 (for now)
-#define FORCE_VBUS_DETECT 1
+  #define FORCE_VBUS_DETECT 1
 
   #define USB_INTS_ERROR_BITS                                                                 \
     (USB_INTS_ERROR_DATA_SEQ_BITS | USB_INTS_ERROR_BIT_STUFF_BITS | USB_INTS_ERROR_CRC_BITS | \
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 1193009ef..7bf247ced 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -97,7 +97,7 @@ static void __tusb_irq_path_func(hw_xfer_complete)(struct hw_endpoint *ep, xfer_
   hcd_event_xfer_complete(dev_addr, ep_addr, xferred_len, xfer_result, true);
 }
 
-static void __tusb_irq_path_func(handle_hhwbuf_status_bit)(uint bit, struct hw_endpoint *ep) {
+static void __tusb_irq_path_func(handle_hwbuf_status_bit)(uint bit, struct hw_endpoint *ep) {
   usb_hw_clear->buf_status = bit;
   const bool done          = hw_endpoint_xfer_continue(ep);
   if (done) {
@@ -110,11 +110,11 @@ static void __tusb_irq_path_func(handle_hwbuf_status)(void) {
   pico_trace("buf_status 0x%08lx\n", buf_status);
 
   // Check EPX first
-  uint bit = 0b1;
+  uint32_t bit = 1u;
   if (buf_status & bit) {
     buf_status &= ~bit;
     struct hw_endpoint * ep = &epx;
-    handle_hhwbuf_status_bit(bit, ep);
+    handle_hwbuf_status_bit(bit, ep);
   }
 
   // Check "interrupt" (asynchronous) endpoints for both IN and OUT
@@ -131,7 +131,7 @@ static void __tusb_irq_path_func(handle_hwbuf_status)(void) {
       bit = 1 << (i * 2 + j);
       if (buf_status & bit) {
         buf_status &= ~bit;
-        handle_hhwbuf_status_bit(bit, &ep_pool[i]);
+        handle_hwbuf_status_bit(bit, &ep_pool[i]);
       }
     }
   }
@@ -287,39 +287,37 @@ static void hw_endpoint_init(struct hw_endpoint *ep, uint8_t dev_addr, uint8_t e
   ep->next_pid = (num == 0 ? 1u : 0u);
   ep->wMaxPacketSize = wMaxPacketSize;
 
-  pico_trace("hw_endpoint_init dev %d ep %02X xfer %d\n", ep->dev_addr, ep->ep_addr, ep->transfer_type);
+  pico_trace("hw_endpoint_init dev %d ep %02X xfer %d\n", ep->dev_addr, ep->ep_addr, transfer_type);
   pico_trace("dev %d ep %02X setup buffer @ 0x%p\n", ep->dev_addr, ep->ep_addr, ep->hw_data_buf);
   uint dpram_offset = hw_data_offset(ep->hw_data_buf);
   // Bits 0-5 should be 0
   assert(!(dpram_offset & 0b111111));
 
   // Fill in endpoint control register with buffer offset
-  uint32_t ep_reg = EP_CTRL_ENABLE_BITS | EP_CTRL_INTERRUPT_PER_BUFFER |
-                    ((uint)transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset;
-  if ( bmInterval )
-  {
-    ep_reg |= (uint32_t) ((bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB);
+  uint32_t ctrl_value = EP_CTRL_ENABLE_BITS | EP_CTRL_INTERRUPT_PER_BUFFER |
+                        ((uint32_t)transfer_type << EP_CTRL_BUFFER_TYPE_LSB) | dpram_offset;
+  if (bmInterval) {
+    ctrl_value |= (uint32_t)((bmInterval - 1) << EP_CTRL_HOST_INTERRUPT_INTERVAL_LSB);
   }
-  *hwep_ctrl_reg_host(ep) = ep_reg;
-  // pico_trace("endpoint control (0x%p) <- 0x%lx\n", ep->endpoint_control, ep_reg);
+
+  io_rw_32 *ctrl_reg = hwep_ctrl_reg_host(ep);
+  *ctrl_reg          = ctrl_value;
+  pico_trace("endpoint control (0x%p) <- 0x%lx\n", ctrl_reg, ctrl_value);
   ep->configured = true;
 
-  if ( ep != &epx )
-  {
+  if (ep != &epx) {
     // Endpoint has its own addr_endp and interrupt bits to be setup!
     // This is an interrupt/async endpoint. so need to set up ADDR_ENDP register with:
     // - device address
     // - endpoint number / direction
     // - preamble
-    uint32_t reg = (uint32_t) (dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB));
+    uint32_t reg = (uint32_t)(dev_addr | (num << USB_ADDR_ENDP1_ENDPOINT_LSB));
 
-    if ( dir == TUSB_DIR_OUT )
-    {
+    if (dir == TUSB_DIR_OUT) {
       reg |= USB_ADDR_ENDP1_INTEP_DIR_BITS;
     }
 
-    if ( need_pre(dev_addr) )
-    {
+    if (need_pre(dev_addr)) {
       reg |= USB_ADDR_ENDP1_INTEP_PREAMBLE_BITS;
     }
     usb_hw->int_ep_addr_ctrl[ep->interrupt_num] = reg;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 08a0ba2ef..9b0da3ac7 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -335,7 +335,7 @@
   #define CFG_TUD_EDPT_DEDICATED_HWFIFO 1
 #endif
 
-//------------- pio-usb -------------//
+//------------- Raspberry Pi -------------//
 // Enable PIO-USB software host controller
 #ifndef CFG_TUH_RPI_PIO_USB
   #define CFG_TUH_RPI_PIO_USB 0
-- 
cgit v1.3.1


From 09b8f4008450e55caea2f8ee559a3d0abcd87a36 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 9 Jan 2026 23:34:00 +0700
Subject: remove transfer_type from hw_endpoint

---
 hw/bsp/rp2040/family.cmake                   |  1 +
 src/portable/raspberrypi/rp2040/dcd_rp2040.c |  1 -
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 12 ++++++------
 src/portable/raspberrypi/rp2040/rp2040_usb.h |  1 -
 4 files changed, 7 insertions(+), 8 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 40eee082d..e617ab3ca 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -251,6 +251,7 @@ function(family_configure_target TARGET RTOS)
 	family_flash_jlink(${TARGET})
 
   # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
+	family_add_bloaty(${TARGET})
   family_add_linkermap(${TARGET})
 endfunction()
 
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index f25d808d4..240e6c727 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -74,7 +74,6 @@ static void hw_endpoint_init(hw_endpoint_t *ep, uint8_t ep_addr, uint16_t wMaxPa
   ep->ep_addr        = ep_addr;
   ep->next_pid       = 0u;
   ep->wMaxPacketSize = wMaxPacketSize;
-  ep->transfer_type  = transfer_type;
 
   // Clear existing buffer control state
   io_rw_32 *buf_ctrl_reg = hwbuf_ctrl_reg_device(ep);
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index bde45db1b..3b65f57a4 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -47,22 +47,20 @@ static bool e15_is_critical_frame_period(struct hw_endpoint *ep);
 // Implementation
 //--------------------------------------------------------------------+
 // Provide own byte by byte memcpy as not all copies are aligned
-static void unaligned_memcpy(void *dst, const void *src, size_t n) {
-  uint8_t *dst_byte = (uint8_t*)dst;
-  const uint8_t *src_byte = (const uint8_t*)src;
+static void unaligned_memcpy(uint8_t *dst, const uint8_t *src, size_t n) {
   while (n--) {
-    *dst_byte++ = *src_byte++;
+    *dst++ = *src++;
   }
 }
 
 void tu_hwfifo_write(volatile void *hwfifo, const uint8_t *src, uint16_t len, const tu_hwfifo_access_t *access_mode) {
   (void)access_mode;
-  unaligned_memcpy((void *)(uintptr_t)hwfifo, src, len);
+  unaligned_memcpy((uint8_t *)(uintptr_t)hwfifo, src, len);
 }
 
 void tu_hwfifo_read(const volatile void *hwfifo, uint8_t *dest, uint16_t len, const tu_hwfifo_access_t *access_mode) {
   (void)access_mode;
-  unaligned_memcpy(dest, (const void *)(uintptr_t)hwfifo, len);
+  unaligned_memcpy(dest, (const uint8_t *)(uintptr_t)hwfifo, len);
 }
 
 void rp2usb_init(void) {
@@ -141,6 +139,7 @@ static uint32_t __tusb_irq_path_func(prepare_ep_buffer)(struct hw_endpoint *ep,
       // Copy data from user buffer/fifo to hw buffer
       uint8_t *hw_buf = ep->hw_data_buf + buf_id * 64;
       if (ep->is_xfer_fifo) {
+        // not in sram, may mess up timing with E15 workaround
         tu_hwfifo_write_from_fifo(hw_buf, ep->user_fifo, buflen, NULL);
       } else {
         unaligned_memcpy(hw_buf, ep->user_buf, buflen);
@@ -286,6 +285,7 @@ static uint16_t __tusb_irq_path_func(sync_ep_buffer)(hw_endpoint_t *ep, io_rw_32
 
     uint8_t *hw_buf = ep->hw_data_buf + buf_id * 64;
     if (ep->is_xfer_fifo) {
+      // not in sram, may mess up timing with E15 workaround
       tu_hwfifo_read_to_fifo(hw_buf, ep->user_fifo, xferred_bytes, NULL);
     } else {
       unaligned_memcpy(ep->user_buf, hw_buf, xferred_bytes);
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.h b/src/portable/raspberrypi/rp2040/rp2040_usb.h
index cce868540..c03dc34b2 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.h
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.h
@@ -64,7 +64,6 @@
 typedef struct hw_endpoint {
   uint8_t ep_addr;
   uint8_t next_pid;
-  uint8_t transfer_type;
   bool    active;       // transferring data
   bool    is_xfer_fifo; // transfer using fifo
 
-- 
cgit v1.3.1


From 104d3f2545e460ead95dc8482fcadcf98c3749e1 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 14 Jan 2026 00:18:26 +0100
Subject: bsp: add TI EK-TM4C1294XL

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 docs/reference/boards.rst                       |  1 +
 examples/device/dfu/skip.txt                    |  2 +-
 hw/bsp/BoardPresets.json                        | 44 ++++++++++++++
 hw/bsp/tm4c/FreeRTOSConfig/FreeRTOSConfig.h     |  8 ++-
 hw/bsp/tm4c/boards/ek_tm4c123gxl/board.h        |  6 ++
 hw/bsp/tm4c/boards/ek_tm4c123gxl/tm4c123.ld     |  2 +-
 hw/bsp/tm4c/boards/ek_tm4c1294xl/TM4C1294NC.icf | 28 +++++++++
 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.cmake    | 13 +++++
 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.h        | 75 ++++++++++++++++++++++++
 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk       | 16 ++++++
 hw/bsp/tm4c/boards/ek_tm4c1294xl/tm4c1294nc.ld  | 66 +++++++++++++++++++++
 hw/bsp/tm4c/family.c                            | 76 ++++++++++++++++++++-----
 hw/bsp/tm4c/family.cmake                        | 14 ++---
 hw/bsp/tm4c/family.mk                           |  6 +-
 src/portable/mentor/musb/musb_ti.h              |  5 +-
 src/portable/mentor/musb/musb_type.h            |  2 +-
 16 files changed, 333 insertions(+), 31 deletions(-)
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c1294xl/TM4C1294NC.icf
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.cmake
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.h
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
 create mode 100644 hw/bsp/tm4c/boards/ek_tm4c1294xl/tm4c1294nc.ld

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index cacf52e1a..09c90e08f 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -333,6 +333,7 @@ Board              Name                   Family    URL
 msp_exp430f5529lp  MSP430F5529 LaunchPad  msp430    https://www.ti.com/tool/MSP-EXP430F5529LP
 msp_exp432e401y    MSP432E401Y LaunchPad  msp432e4  https://www.ti.com/tool/MSP-EXP432E401Y
 ek_tm4c123gxl      TM4C123G LaunchPad     tm4c      https://www.ti.com/tool/EK-TM4C123GXL
+ek_tm4c1294xl      TM4C1294 LaunchPad     tm4c      https://www.ti.com/tool/EK-TM4C1294XL
 =================  =====================  ========  =========================================  ======
 
 Tomu
diff --git a/examples/device/dfu/skip.txt b/examples/device/dfu/skip.txt
index 9dde06c30..79d3da9d2 100644
--- a/examples/device/dfu/skip.txt
+++ b/examples/device/dfu/skip.txt
@@ -1,3 +1,3 @@
-mcu:TM4C123
+mcu:TM4C
 mcu:BCM2835
 family:espressif
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 440ef8733..fabbeed93 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -174,6 +174,10 @@
       "name": "ek_tm4c123gxl",
       "inherits": "default"
     },
+    {
+      "name": "ek_tm4c1294xl",
+      "inherits": "default"
+    },
     {
       "name": "f1c100s",
       "inherits": "default"
@@ -718,6 +722,10 @@
       "name": "stm32h745disco",
       "inherits": "default"
     },
+    {
+      "name": "stm32h747disco",
+      "inherits": "default"
+    },
     {
       "name": "stm32h750_weact",
       "inherits": "default"
@@ -1108,6 +1116,11 @@
       "description": "Build preset for the ek_tm4c123gxl board",
       "configurePreset": "ek_tm4c123gxl"
     },
+    {
+      "name": "ek_tm4c1294xl",
+      "description": "Build preset for the ek_tm4c1294xl board",
+      "configurePreset": "ek_tm4c1294xl"
+    },
     {
       "name": "espressif_addax_1",
       "description": "Build preset for the espressif_addax_1 board",
@@ -1833,6 +1846,11 @@
       "description": "Build preset for the stm32h745disco board",
       "configurePreset": "stm32h745disco"
     },
+    {
+      "name": "stm32h747disco",
+      "description": "Build preset for the stm32h747disco board",
+      "configurePreset": "stm32h747disco"
+    },
     {
       "name": "stm32h750_weact",
       "description": "Build preset for the stm32h750_weact board",
@@ -2542,6 +2560,19 @@
         }
       ]
     },
+    {
+      "name": "ek_tm4c1294xl",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ek_tm4c1294xl"
+        },
+        {
+          "type": "build",
+          "name": "ek_tm4c1294xl"
+        }
+      ]
+    },
     {
       "name": "espressif_addax_1",
       "steps": [
@@ -4427,6 +4458,19 @@
         }
       ]
     },
+    {
+      "name": "stm32h747disco",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h747disco"
+        },
+        {
+          "type": "build",
+          "name": "stm32h747disco"
+        }
+      ]
+    },
     {
       "name": "stm32h750_weact",
       "steps": [
diff --git a/hw/bsp/tm4c/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/tm4c/FreeRTOSConfig/FreeRTOSConfig.h
index 454b085e9..b4423e269 100644
--- a/hw/bsp/tm4c/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/tm4c/FreeRTOSConfig/FreeRTOSConfig.h
@@ -44,7 +44,13 @@
 
 // skip if included from IAR assembler
 #ifndef __IASMARM__
-  #include "TM4C123.h"
+  #ifdef TM4C123GH6PM
+    #include "TM4C123.h"
+  #elif TM4C1294NCPDT
+    #include "TM4C129.h"
+  #else
+      #error "Unknown TM4C device"
+  #endif
 #endif
 
 /* Cortex M23/M33 port configuration. */
diff --git a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.h b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.h
index c0ceb4cd8..fc0ab4c60 100644
--- a/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.h
+++ b/hw/bsp/tm4c/boards/ek_tm4c123gxl/board.h
@@ -36,20 +36,26 @@
  extern "C" {
 #endif
 
+#include "TM4C123.h"
+
 #define BOARD_UART            UART0
 #define BOARD_UART_PORT       GPIOA
 
+#define BTN_PORT_CLK          5
 #define BOARD_BTN_PORT        GPIOF
 #define BOARD_BTN             4
 #define BOARD_BTN_Msk         (1u<<4)
 #define BUTTON_STATE_ACTIVE   0
 
+#define LED_PORT_CLK          5
 #define LED_PORT              GPIOF
 #define LED_PIN_RED           1
 #define LED_PIN_BLUE          2
 #define LED_PIN_GREEN         3
 #define LED_STATE_ON          1
 
+#define BOARD_LED_PIN         LED_PIN_BLUE
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/tm4c/boards/ek_tm4c123gxl/tm4c123.ld b/hw/bsp/tm4c/boards/ek_tm4c123gxl/tm4c123.ld
index 11e9608cc..3f06d8f03 100644
--- a/hw/bsp/tm4c/boards/ek_tm4c123gxl/tm4c123.ld
+++ b/hw/bsp/tm4c/boards/ek_tm4c123gxl/tm4c123.ld
@@ -17,7 +17,7 @@ SECTIONS
     .text :
     {
         . = ALIGN(4) ;
-        *(.vectors)
+        KEEP(*(.vectors))
         *(.text)
         *(.text.*)
         *(.init)
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/TM4C1294NC.icf b/hw/bsp/tm4c/boards/ek_tm4c1294xl/TM4C1294NC.icf
new file mode 100644
index 000000000..2dba41866
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/TM4C1294NC.icf
@@ -0,0 +1,28 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x00000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__   = 0x00000000;
+define symbol __ICFEDIT_region_ROM_end__     = 0x000FFFFF;
+define symbol __ICFEDIT_region_RAM_start__   = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__     = 0x2003FFFF;
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__   = 0x8000;
+define symbol __ICFEDIT_size_heap__     = 0x10000;
+/**** End of ICF editor section. ###ICF###*/
+
+define memory mem with size = 4G;
+define region ROM_region   = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region   = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.cmake b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.cmake
new file mode 100644
index 000000000..3e03b3f72
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.cmake
@@ -0,0 +1,13 @@
+set(MCU_SUB_VARIANT 129)
+
+set(JLINK_DEVICE TM4C1294NCPDT)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/tm4c1294nc.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/TM4C1294NC.icf)
+
+set(OPENOCD_OPTION "-f board/ti_ek-tm4c1294xl.cfg")
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    TM4C1294NCPDT
+    )
+endfunction()
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.h b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.h
new file mode 100644
index 000000000..4530e9430
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.h
@@ -0,0 +1,75 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: TM4C1294 LaunchPad
+   url: https://www.ti.com/tool/EK-TM4C1294XL
+*/
+
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#include "TM4C129.h"
+
+#define BOARD_UART            UART0
+#define BOARD_UART_PORT       GPIOA
+
+#define BTN_PORT_CLK          8
+#define BOARD_BTN_PORT        GPIOJ
+#define BOARD_BTN             0
+#define BOARD_BTN_Msk         (1u<<0)
+#define BUTTON_STATE_ACTIVE   0
+
+#define LED_PORT_CLK          12
+#define LED_PORT              GPION
+#define LED_PIN_1             1
+#define LED_PIN_2             0
+#define LED_STATE_ON          1
+
+#define BOARD_LED_PIN         LED_PIN_2
+
+#define GPIOA                 GPIOA_AHB
+#define GPIOB                 GPIOB_AHB
+#define GPIOC                 GPIOC_AHB
+#define GPIOD                 GPIOD_AHB
+#define GPIOE                 GPIOE_AHB
+#define GPIOF                 GPIOF_AHB
+#define GPIOG                 GPIOG_AHB
+#define GPIOH                 GPIOH_AHB
+#define GPIOI                 GPIOI_AHB
+#define GPIOJ                 GPIOJ_AHB
+
+#define GPIOA_Type            GPIOA_AHB_Type
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
new file mode 100644
index 000000000..b01977674
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
@@ -0,0 +1,16 @@
+MCU_SUB_VARIANT = 129
+
+CFLAGS += -DTM4C1294NCPDT
+
+LD_FILE_GCC = $(BOARD_PATH)/tm4c1294nc.ld
+LD_FILE_IAR = $(BOARD_PATH)/TM4C1294NC.icf
+
+# For flash-jlink target
+JLINK_DEVICE = TM4C1294NCPDT
+
+# flash using openocd
+OPENOCD_OPTION = -f board/ti_ek-tm4c1294xl.cfg
+
+UNIFLASH_OPTION = -c ${TOP}/${BOARD_PATH}/${BOARD}.ccxml -r 1
+
+flash: flash-openocd
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/tm4c1294nc.ld b/hw/bsp/tm4c/boards/ek_tm4c1294xl/tm4c1294nc.ld
new file mode 100644
index 000000000..fa4ea4dc5
--- /dev/null
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/tm4c1294nc.ld
@@ -0,0 +1,66 @@
+ENTRY(Reset_Handler)
+
+_estack = 0x20008000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0;      /* required amount of heap  */
+_Min_Stack_Size = 0x1000; /* required amount of stack */
+
+
+MEMORY
+{
+    FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x00100000
+    SRAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00040000
+}
+
+SECTIONS
+{
+    .text :
+    {
+        . = ALIGN(4) ;
+        _text = . ;
+        KEEP(*(.isr_vector))
+        *(.text)
+        *(.text.*)
+        *(.init)
+        *(.fini)
+        *(.rodata)
+        *(.rodata.*)
+        *(.ARM.exidx*)
+        _etext = . ;
+        . = ALIGN(4) ;
+    } >FLASH
+
+    .data : AT(ADDR(.text) + SIZEOF(.text))
+    {
+        _data = .;
+        . = ALIGN(4);
+        _ldata = LOADADDR (.data);
+        *(.data)
+        *(.data.*)
+        _edata = .;
+        . = ALIGN(4);
+
+    } >SRAM
+
+    .bss :
+    {
+        . = ALIGN(4) ;
+        _bss = .;
+        *(.bss)
+        *(.bss.*)
+        *(.COMMON)
+        _ebss = .;
+        . = ALIGN(4);
+    }>SRAM
+
+    /* User_heap_stack section, used to check that there is enough RAM left */
+    ._user_heap_stack :
+    {
+        . = ALIGN(8);
+        PROVIDE ( end = . );
+        PROVIDE ( _end = . );
+        . = . + _Min_Heap_Size;
+        . = . + _Min_Stack_Size;
+        . = ALIGN(8);
+    } >SRAM
+}
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index ee1fa2a3c..ae7f22f00 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -2,7 +2,6 @@
    manufacturer: Texas Instruments
 */
 
-#include "TM4C123.h"
 #include "bsp/board_api.h"
 #include "board.h"
 
@@ -27,6 +26,9 @@ static void board_uart_init(void) {
   SYSCTL->RCGCUART |= (1 << 0);                // Enable the clock to UART0
   SYSCTL->RCGCGPIO |= (1 << 0);                // Enable the clock to GPIOA
 
+  while (!(SYSCTL->PRGPIO & (1 << 0))) {}      // Wait for the GPIOA clock to stabilize
+  while (!(SYSCTL->PRUART & (1 << 0))) {}      // Wait for the UART0 clock to stabilize
+
   GPIOA->AFSEL |= (1 << 1) | (1 << 0);         // Enable the alternate function on pin PA0 & PA1
   GPIOA->PCTL |= (1 << 0) | (1 << 4);          // Configure the GPIOPCTL register to select UART0 in PA0 and PA1
   GPIOA->DEN |= (1 << 0) | (1 << 1);           // Enable the digital functionality in PA0 and PA1
@@ -44,12 +46,26 @@ static void board_uart_init(void) {
   UART0->CTL = (1 << 0) | (1 << 8) | (1 << 9); // UART0 Enable, Transmit Enable, Receive Enable
 }
 
-static void initialize_board_led(GPIOA_Type* port, uint8_t PinMsk, uint8_t dirmsk) {
-  /* Enable PortF Clock */
-  SYSCTL->RCGCGPIO |= (1 << 5);
+static void board_button_init(GPIOA_Type* port, uint8_t PinMsk) {
+  /* Enable Port Clock */
+  SYSCTL->RCGCGPIO |= (1 << BTN_PORT_CLK);
+
+  /* Let the clock stabilize */
+  while (!((SYSCTL->PRGPIO) & (1 << BTN_PORT_CLK))) {}
+
+  /* Port Digital Enable */
+  port->DEN |= PinMsk;
+
+  /* Set direction */
+  port->DIR &= ~PinMsk;
+}
+
+static void board_led_init(GPIOA_Type* port, uint8_t PinMsk, uint8_t dirmsk) {
+  /* Enable Port Clock */
+  SYSCTL->RCGCGPIO |= (1 << LED_PORT_CLK);
 
   /* Let the clock stabilize */
-  while (!((SYSCTL->PRGPIO) & (1 << 5))) {}
+  while (!((SYSCTL->PRGPIO) & (1 << LED_PORT_CLK))) {}
 
   /* Port Digital Enable */
   port->DEN |= PinMsk;
@@ -71,7 +87,9 @@ static uint32_t ReadGPIOPin(GPIOA_Type* port, uint8_t pinMsk) {
 }
 
 void board_init(void) {
+#ifdef TM4C123_H
   SystemCoreClockUpdate();
+#endif
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -83,6 +101,7 @@ void board_init(void) {
   NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
+#ifdef TM4C123_H
   /* Reset USB */
   SYSCTL->SRCR2 |= (1u << 16);
 
@@ -99,7 +118,7 @@ void board_init(void) {
   /* USB IO Initialization */
   SYSCTL->RCGCGPIO |= (1u << 3);
 
-  /* Let the clock stabilize */
+    /* Let the clock stabilize */
   while (!(SYSCTL->PRGPIO & (1u << 3))) {}
 
   /* USB IOs to Analog Mode */
@@ -107,16 +126,43 @@ void board_init(void) {
   GPIOD->DEN &= ~((1u << 4) | (1u << 5));
   GPIOD->AMSEL |= ((1u << 4) | (1u << 5));
 
-  uint8_t leds = (1 << LED_PIN_RED) | (1 << LED_PIN_BLUE) | (1 << LED_PIN_GREEN);
-  uint8_t dirmsk = (1 << LED_PIN_RED) | (1 << LED_PIN_BLUE) | (1 << LED_PIN_GREEN);
+#else // TM4C129
+  /* Reset USB */
+  SYSCTL->SRUSB = 1;
 
-  /* Configure GPIO for board LED */
-  initialize_board_led(LED_PORT, leds, dirmsk);
+  for (volatile uint8_t i = 0; i < 20; i++) {}
+
+  SYSCTL->SRUSB = 0;
 
-  /* Configure GPIO for board switch */
-  GPIOF->DIR &= ~(1 << BOARD_BTN);
-  GPIOF->PUR |= (1 << BOARD_BTN);
-  GPIOF->DEN |= (1 << BOARD_BTN);
+  /* Open the USB clock gate */
+  SYSCTL->RCGCUSB = 1;
+
+  /* Let the clock stabilize */
+  while(!(SYSCTL->PRUSB & 1)) {}
+
+  /* USB IO Initialization */
+  SYSCTL->RCGCGPIO |= (1u << 10);
+
+  /* Let the clock stabilize */
+  while (!(SYSCTL->PRGPIO & (1u << 10))) {}
+
+  /* USB IOs to Analog Mode */
+  GPIOL->AFSEL &= ~((1u << 6) | (1u << 7));
+  GPIOL->DEN &= ~((1u << 6) | (1u << 7));
+  GPIOL->AMSEL |= ((1u << 6) | (1u << 7));
+
+  /* USB Clock Configuration */
+  USB0->CC = 0x207;
+#endif
+
+  uint8_t leds = 1 << BOARD_LED_PIN;
+  uint8_t dirmsk = 1 << BOARD_LED_PIN;
+
+  /* Configure GPIO for board button */
+  board_button_init(BOARD_BTN_PORT, BOARD_BTN_Msk);
+
+  /* Configure GPIO for board LED */
+  board_led_init(LED_PORT, leds, dirmsk);
 
   /* Initialize board UART */
   board_uart_init();
@@ -125,7 +171,7 @@ void board_init(void) {
 }
 
 void board_led_write(bool state) {
-  WriteGPIOPin(LED_PORT, (1 << LED_PIN_BLUE), state);
+  WriteGPIOPin(LED_PORT, (1 << BOARD_LED_PIN), state);
 }
 
 uint32_t board_button_read(void) {
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 12f0448a3..9cef96b9d 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -5,14 +5,14 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 set(MCU_VARIANT tm4c${MCU_SUB_VARIANT})
 set(MCU_VARIANT_UPPER TM4C${MCU_SUB_VARIANT})
 
-set(SDK_DIR ${TOP}/hw/mcu/ti/${MCU_VARIANT}xx)
+set(SDK_DIR ${TOP}/hw/mcu/ti/tm4c)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
 
 # toolchain set up
 set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS TM4C123 CACHE INTERNAL "")
+set(FAMILY_MCUS TM4C CACHE INTERNAL "")
 
 #------------------------------------
 # Startup & Linker script
@@ -20,7 +20,7 @@ set(FAMILY_MCUS TM4C123 CACHE INTERNAL "")
 set(LD_FILE_Clang ${LD_FILE_GNU})
 set(STARTUP_FILE_GNU ${SDK_DIR}/Source/GCC/${MCU_VARIANT}_startup.c)
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
+set(STARTUP_FILE_IAR ${SDK_DIR}/Source/IAR/${MCU_VARIANT}_startup.c)
 #------------------------------------
 # Board Target
 #------------------------------------
@@ -29,7 +29,7 @@ function(family_add_board BOARD_TARGET)
     ${SDK_DIR}/Source/system_${MCU_VARIANT_UPPER}.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
-    ${SDK_DIR}/Include/${MCU_VARIANT_UPPER}
+    ${SDK_DIR}/Include
     ${CMSIS_DIR}/CMSIS/Core/Include
     )
 
@@ -41,7 +41,7 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-  family_add_tinyusb(${TARGET} OPT_MCU_TM4C123)
+  family_add_tinyusb(${TARGET} OPT_MCU_TM4C${MCU_SUB_VARIANT})
 
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
@@ -72,12 +72,10 @@ function(family_configure_example TARGET RTOS)
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   endif ()
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
-    SKIP_LINTING ON
-    COMPILE_OPTIONS -w)
 
   # Flashing
   family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
   family_flash_openocd(${TARGET})
   family_flash_uniflash(${TARGET})
 endfunction()
diff --git a/hw/bsp/tm4c/family.mk b/hw/bsp/tm4c/family.mk
index 76ae785b2..bc966d98e 100644
--- a/hw/bsp/tm4c/family.mk
+++ b/hw/bsp/tm4c/family.mk
@@ -4,11 +4,11 @@ CPU_CORE ?= cortex-m4
 MCU_VARIANT = tm4c${MCU_SUB_VARIANT}
 MCU_VARIANT_UPPER = TM4C${MCU_SUB_VARIANT}
 
-SDK_DIR = hw/mcu/ti/${MCU_VARIANT}xx
+SDK_DIR = hw/mcu/ti/tm4c
 
 CFLAGS += \
   -flto \
-  -DCFG_TUSB_MCU=OPT_MCU_TM4C123 \
+  -DCFG_TUSB_MCU=OPT_MCU_TM4C${MCU_SUB_VARIANT} \
   -uvectors \
 
 # mcu driver cause following warnings
@@ -18,7 +18,7 @@ LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
 
 INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(SDK_DIR)/Include/${MCU_VARIANT_UPPER} \
+	$(TOP)/$(SDK_DIR)/Include \
 	$(TOP)/$(BOARD_PATH)
 
 SRC_C += \
diff --git a/src/portable/mentor/musb/musb_ti.h b/src/portable/mentor/musb/musb_ti.h
index d17e836ee..68e89d77d 100644
--- a/src/portable/mentor/musb/musb_ti.h
+++ b/src/portable/mentor/musb/musb_ti.h
@@ -35,7 +35,10 @@
   #include "TM4C123.h"
   #define FIFO0_WORD FIFO0
   #define FIFO1_WORD FIFO1
-//#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
+#elif CFG_TUSB_MCU == OPT_MCU_TM4C129
+  #include "TM4C129.h"
+  #define FIFO0_WORD FIFOA
+  #define FIFO1_WORD FIFOB
 #elif CFG_TUSB_MCU == OPT_MCU_MSP432E4
   #include "msp.h"
 #else
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index 4e448c0ed..b2f6492fa 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -147,7 +147,7 @@ typedef struct TU_ATTR_PACKED {
 
 TU_VERIFY_STATIC(sizeof(musb_ep_csr_t) == 16, "size is not correct");
 
-typedef struct TU_ATTR_PACKED {
+typedef struct {
   //------------- Common -------------//
   __IO uint8_t  faddr;             // 0x00: FADDR
   union {
-- 
cgit v1.3.1


From 7a4e3d0821fb7913fbcca55018b41e66a6339df6 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 14 Jan 2026 00:19:49 +0100
Subject: bsp: add STM32H747-DISCO

Signed-off-by: HiFiPhile <admin@hifiphile.com>
Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 docs/reference/boards.rst                        |   1 +
 hw/bsp/stm32h7/boards/stm32h747disco/board.cmake |  23 +++
 hw/bsp/stm32h7/boards/stm32h747disco/board.h     | 169 +++++++++++++++++++++
 hw/bsp/stm32h7/boards/stm32h747disco/board.mk    |  15 ++
 hw/bsp/stm32h7/linker/stm32h747xx_flash_CM7.ld   | 184 +++++++++++++++++++++++
 5 files changed, 392 insertions(+)
 create mode 100644 hw/bsp/stm32h7/boards/stm32h747disco/board.cmake
 create mode 100644 hw/bsp/stm32h7/boards/stm32h747disco/board.h
 create mode 100644 hw/bsp/stm32h7/boards/stm32h747disco/board.mk
 create mode 100644 hw/bsp/stm32h7/linker/stm32h747xx_flash_CM7.ld

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 09c90e08f..f6dd3cd91 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -292,6 +292,7 @@ stm32h723nucleo      STM32 H723 Nucleo                  stm32h7    https://www.s
 stm32h743eval        STM32 H743 Eval                    stm32h7    https://www.st.com/en/evaluation-tools/stm32h743i-eval.html
 stm32h743nucleo      STM32 H743 Nucleo                  stm32h7    https://www.st.com/en/evaluation-tools/nucleo-h743zi.html
 stm32h745disco       STM32 H745 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
+stm32h747disco       STM32 H747 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
 stm32h750_weact      STM32 H750 WeAct                   stm32h7    https://www.adafruit.com/product/5032
 stm32h750bdk         STM32 H750b Discovery Kit          stm32h7    https://www.st.com/en/evaluation-tools/stm32h750b-dk.html
 waveshare_openh743i  Waveshare Open H743i               stm32h7    https://www.waveshare.com/openh743i-c-standard.htm
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.cmake b/hw/bsp/stm32h7/boards/stm32h747disco/board.cmake
new file mode 100644
index 000000000..8bce542a5
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.cmake
@@ -0,0 +1,23 @@
+set(MCU_VARIANT stm32h747xx)
+set(JLINK_DEVICE stm32h747xi_m7)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash_CM7.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash_CM7.icf)
+
+set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
+
+# device default to PORT 1 High Speed
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 1)
+endif()
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H747xx
+    HSE_VALUE=25000000
+    CORE_CM7
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.h b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
new file mode 100644
index 000000000..71e8b1427
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
@@ -0,0 +1,169 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: STM32 H745 Discovery
+   url: https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// UART
+#define UART_DEV              USART3
+#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+
+// VBUS Sense detection
+#define OTG_FS_VBUS_SENSE     1
+#define OTG_HS_VBUS_SENSE     0
+
+// USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7
+#define ULPI_PINS \
+  {GPIOA, GPIO_PIN_3 }, {GPIOA, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_0 }, {GPIOB, GPIO_PIN_1 }, \
+  {GPIOB, GPIO_PIN_5 }, {GPIOB, GPIO_PIN_10}, {GPIOB, GPIO_PIN_11}, {GPIOB, GPIO_PIN_12}, \
+  {GPIOB, GPIO_PIN_13}, {GPIOC, GPIO_PIN_0 }, {GPIOH, GPIO_PIN_4 }, {GPIOI, GPIO_PIN_11}
+
+#define PINID_LED      0
+#define PINID_BUTTON   1
+#define PINID_UART_TX  2
+#define PINID_UART_RX  3
+
+static board_pindef_t board_pindef[] = {
+  { // LED
+    .port = GPIOI,
+    .pin_init = { .Pin = GPIO_PIN_12, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
+    .active_state = 0
+  },
+  { // Button
+    .port = GPIOC,
+    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
+    .active_state = 1
+  },
+  { // UART TX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_9, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 },
+    .active_state = 0
+  },
+  { // UART RX
+    .port = GPIOA,
+    .pin_init = { .Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_PP, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = GPIO_AF7_USART3 },
+    .active_state = 0
+  }
+};
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void SystemClock_Config(void)
+{
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
+  RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = { 0 };
+
+  /*!< Supply configuration update enable */
+  /* For STM32H750XB, use "HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);" */
+  HAL_PWREx_ConfigSupply(PWR_DIRECT_SMPS_SUPPLY);
+
+  /* The voltage scaling allows optimizing the power consumption when the
+     device is clocked below the maximum system frequency, to update the
+     voltage scaling value regarding system frequency refer to product
+     datasheet.  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  while ((PWR->D3CR & (PWR_D3CR_VOSRDY)) != PWR_D3CR_VOSRDY) {}
+
+  /* Enable HSE Oscillator and activate PLL with HSE as source */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.HSIState = RCC_HSI_OFF;
+  RCC_OscInitStruct.CSIState = RCC_CSI_OFF;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+
+  /* PLL1 for System Clock */
+  RCC_OscInitStruct.PLL.PLLM = 5;
+  RCC_OscInitStruct.PLL.PLLN = 160;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 4;
+
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  /* PLL3 for USB Clock */
+  PeriphClkInitStruct.PLL3.PLL3M = 25;
+  PeriphClkInitStruct.PLL3.PLL3N = 336;
+  PeriphClkInitStruct.PLL3.PLL3FRACN = 0;
+  PeriphClkInitStruct.PLL3.PLL3P = 2;
+  PeriphClkInitStruct.PLL3.PLL3R = 2;
+  PeriphClkInitStruct.PLL3.PLL3Q = 7;
+
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_PLL3;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
+
+  /* Select PLL as system clock source and configure  bus clocks dividers */
+  RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_D1PCLK1 | RCC_CLOCKTYPE_PCLK1 | \
+  RCC_CLOCKTYPE_PCLK2  | RCC_CLOCKTYPE_D3PCLK1);
+
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV1;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
+
+  /*activate CSI clock mondatory for I/O Compensation Cell*/
+  __HAL_RCC_CSI_ENABLE() ;
+
+  /* Enable SYSCFG clock mondatory for I/O Compensation Cell */
+  __HAL_RCC_SYSCFG_CLK_ENABLE() ;
+
+  /* Enables the I/O Compensation Cell */
+  HAL_EnableCompensationCell();
+}
+
+static inline void board_init2(void) {
+  // For this board does nothing
+}
+
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void) rhport;
+  (void) state;
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.mk b/hw/bsp/stm32h7/boards/stm32h747disco/board.mk
new file mode 100644
index 000000000..4b17246e2
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.mk
@@ -0,0 +1,15 @@
+# STM32H747I-DISCO uses OTG_FS
+# FIXME: Reset enumerates, un/replug USB plug does not enumerate
+MCU_VARIANT = stm32h747xx
+CFLAGS += -DSTM32H747xx -DCORE_CM7 -DHSE_VALUE=25000000
+
+# Default is FulSpeed port
+PORT ?= 0
+
+LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash_CM7.ld
+LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h747xx_flash_CM7.icf
+
+# For flash-jlink target
+JLINK_DEVICE = stm32h747xi_m7
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32h7/linker/stm32h747xx_flash_CM7.ld b/hw/bsp/stm32h7/linker/stm32h747xx_flash_CM7.ld
new file mode 100644
index 000000000..5b7fe4528
--- /dev/null
+++ b/hw/bsp/stm32h7/linker/stm32h747xx_flash_CM7.ld
@@ -0,0 +1,184 @@
+/*
+******************************************************************************
+**
+
+**  File        : LinkerScript.ld
+**
+**
+**  Abstract    : Linker script for STM32H7 series
+**                1024Kbytes FLASH and 192Kbytes RAM
+**
+**                Set heap size, stack size and stack location according
+**                to application requirements.
+**
+**                Set memory bank area and size if external memory is used.
+**
+**  Target      : STMicroelectronics STM32
+**
+**  Distribution: The file is distributed as is without any warranty
+**                of any kind.
+**
+*****************************************************************************
+** @attention
+**
+** Copyright (c) 2019 STMicroelectronics.
+** All rights reserved.
+**
+** This software is licensed under terms that can be found in the LICENSE file
+** in the root directory of this software component.
+** If no LICENSE file comes with this software, it is provided AS-IS.
+**
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Highest address of the user mode stack */
+_estack = 0x20020000;    /* end of RAM */
+/* Generate a link error if heap and stack don't fit into RAM */
+_Min_Heap_Size = 0x200;      /* required amount of heap  */
+_Min_Stack_Size = 0x400; /* required amount of stack */
+
+/* Specify the memory areas */
+MEMORY
+{
+FLASH (rx)      : ORIGIN = 0x08000000, LENGTH = 1024K
+RAM (xrw)      : ORIGIN = 0x20000000, LENGTH = 128K
+ITCMRAM (xrw)      : ORIGIN = 0x00000000, LENGTH = 64K
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into FLASH */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data goes into FLASH */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data goes into FLASH */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab :
+  {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+  .ARM :
+  {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections goes into RAM, load LMA copy after code */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+  } >RAM AT> FLASH
+
+
+  /* Uninitialized data section */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough RAM left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+
+
+  /* Remove information from the standard libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
-- 
cgit v1.3.1


From 46af312b610f6d85196f41ca3f1b80bc7e8ccfac Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Wed, 14 Jan 2026 10:12:54 +0100
Subject: ci fix

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 hw/bsp/tm4c/family.cmake | 3 +++
 1 file changed, 3 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 9cef96b9d..41b8a597a 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -71,6 +71,9 @@ function(family_configure_example TARGET RTOS)
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+      SKIP_LINTING ON
+      COMPILE_OPTIONS -w)
   endif ()
 
   # Flashing
-- 
cgit v1.3.1


From 1a299a0a0c694ffda39333e67a33dfebf1ca074f Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:24:58 +0100
Subject: bsp/stm32f2: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32f2/family.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index 8ea8ec5a5..f863a59f0 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -31,7 +31,6 @@
 #include "stm32f2xx_hal.h"
 #include "bsp/board_api.h"
 #include "board.h"
-
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -105,9 +104,14 @@ void board_init(void) {
   /* Enable USB FS Clocks */
   __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 
+#if CFG_TUD_ENABLED
   // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS;
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = true
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
 }
 
 //--------------------------------------------------------------------+
-- 
cgit v1.3.1


From d0594fbd86addc7c923af67f4eab22218a95f9ae Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:25:52 +0100
Subject: bsp/stm32f4: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32f4/boards/feather_stm32f405/board.h  | 10 ++--------
 hw/bsp/stm32f4/boards/pyboardv11/board.h         | 10 ++--------
 hw/bsp/stm32f4/boards/stm32f401blackpill/board.h | 11 ++---------
 hw/bsp/stm32f4/boards/stm32f407blackvet/board.h  | 11 ++---------
 hw/bsp/stm32f4/boards/stm32f407disco/board.h     | 10 ++--------
 hw/bsp/stm32f4/boards/stm32f411blackpill/board.h | 11 ++---------
 hw/bsp/stm32f4/boards/stm32f411disco/board.h     | 10 ++--------
 hw/bsp/stm32f4/boards/stm32f412disco/board.h     |  9 ++-------
 hw/bsp/stm32f4/boards/stm32f412nucleo/board.h    |  9 ++-------
 hw/bsp/stm32f4/boards/stm32f439nucleo/board.h    | 10 ++--------
 hw/bsp/stm32f4/family.c                          |  9 +++++++--
 11 files changed, 27 insertions(+), 83 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
index 11e976a42..2db42b98a 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
@@ -43,6 +43,8 @@
 #define PINID_UART_TX  2
 #define PINID_UART_RX  3
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOC,
@@ -106,14 +108,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART3_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if  (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   (void) rhport; (void) state;
 }
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.h b/hw/bsp/stm32f4/boards/pyboardv11/board.h
index 9583a924b..319d2336a 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/board.h
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.h
@@ -43,6 +43,8 @@
 #define PINID_UART_TX  2
 #define PINID_UART_RX  3
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOB,
@@ -106,14 +108,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if  (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   (void) rhport; (void) state;
 }
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
index 8a3fe8409..b69ebbeaf 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
@@ -44,6 +44,8 @@
 #define PINID_UART_TX  2
 #define PINID_UART_RX  3
 
+#define VBUS_SENSE_EN  0
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOC,
@@ -107,15 +109,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  // Blackpill doesn't use VBUS sense (B device) explicitly disable it
-  if  (rhport == 0) {
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   (void) rhport; (void) state;
 }
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
index effbf2be8..ebefeb988 100644
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
@@ -44,6 +44,8 @@
 #define PINID_UART_TX  2
 #define PINID_UART_RX  3
 
+#define VBUS_SENSE_EN  0
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOA,
@@ -106,15 +108,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if (rhport == 0) {
-    // Black F407VET6 doesn't use VBUS sense (B device) explicitly disable it
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   (void) rhport; (void) state;
 }
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.h b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
index 19a029768..bcfa6059a 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
@@ -46,6 +46,8 @@
 #define PINID_UART_RX  3
 #define PINID_VBUS0_EN 4
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOD,
@@ -114,14 +116,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   if (rhport == 0) {
     board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
index 61e5de70d..0faf6fe11 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
@@ -43,6 +43,8 @@
 #define PINID_UART_TX  2
 #define PINID_UART_RX  3
 
+#define VBUS_SENSE_EN  0
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOC,
@@ -106,15 +108,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  // Blackpill doesn't use VBUS sense (B device) explicitly disable it
-  if  (rhport == 0) {
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSBSEN;
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBUSASEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   (void) rhport; (void) state;
 }
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.h b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
index d7b02e79d..1a289dfb5 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
@@ -44,6 +44,8 @@
 #define PINID_UART_RX  3
 #define PINID_VBUS0_EN 4
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOD,
@@ -111,14 +113,6 @@ static inline void board_clock_init(void) {
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  // Enable VBUS sense (B device) via pin PA9
-  if (rhport == 0) {
-    USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   if (rhport == 0) {
     board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.h b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
index d5146ae3c..0689dfe87 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
@@ -45,6 +45,8 @@
 #define PINID_UART_RX  3
 #define PINID_VBUS0_EN 4
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOE,
@@ -127,13 +129,6 @@ static inline void board_clock_init(void) {
   __HAL_RCC_USART2_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   if (rhport == 0) {
     board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
index f7026ce61..be58f8ae7 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
@@ -45,6 +45,8 @@
 #define PINID_UART_RX  3
 #define PINID_VBUS0_EN 4
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOB,
@@ -128,13 +130,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART3_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   if (rhport == 0) {
     board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
index 9a348f33f..b1633b395 100644
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
@@ -46,6 +46,8 @@
 #define PINID_UART_RX  3
 #define PINID_VBUS0_EN 4
 
+#define VBUS_SENSE_EN  1
+
 static board_pindef_t board_pindef[] = {
   { // LED
     .port = GPIOB,
@@ -117,14 +119,6 @@ static inline void board_clock_init(void)
   __HAL_RCC_USART3_CLK_ENABLE();
 }
 
-static inline void board_vbus_sense_init(uint8_t rhport) {
-  if (rhport == 0) {
-    // Enable VBUS sense (B device) via pin PA9
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_NOVBUSSENS;
-    USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBUSBSEN;
-  }
-}
-
 static inline void board_vbus_set(uint8_t rhport, bool state) {
   if (rhport == 0) {
     board_pindef_t* pindef = &board_pindef[PINID_VBUS0_EN];
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 025f6a08c..2170faca7 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -180,11 +180,16 @@ void board_init(void) {
 #endif
 
 #if CFG_TUD_ENABLED
-  board_vbus_sense_init(BOARD_TUD_RHPORT);
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = VBUS_SENSE_EN
+  };
+  tud_configure(BOARD_TUD_RHPORT, TUD_CFGID_DWC2, &cfg);
+  board_vbus_set(BOARD_TUD_RHPORT, false);
 #endif
 
 #if CFG_TUH_ENABLED
-  board_vbus_set(BOARD_TUD_RHPORT, true);
+  board_vbus_set(BOARD_TUH_RHPORT, true);
 #endif
 }
 
-- 
cgit v1.3.1


From 6c4be07c74883290f5fbb13787be63f3be533898 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:26:35 +0100
Subject: bsp/stm32f7: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32f7/boards/stm32f723disco/board.h |  2 +-
 hw/bsp/stm32f7/boards/stm32f746disco/board.h |  4 +--
 hw/bsp/stm32f7/family.c                      | 40 +++++++++++++---------------
 3 files changed, 21 insertions(+), 25 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.h b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
index 35102c1f2..ca9641c68 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
@@ -41,7 +41,7 @@
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
-#define OTG_HS_VBUS_SENSE     0
+#define OTG_HS_VBUS_SENSE     1
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.h b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
index 2964ebada..f57ffb317 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
@@ -40,8 +40,8 @@
 #define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
 
 // VBUS Sense detection
-#define OTG_FS_VBUS_SENSE     0
-#define OTG_HS_VBUS_SENSE     0
+#define OTG_FS_VBUS_SENSE     1
+#define OTG_HS_VBUS_SENSE     1
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index ac22c606f..fc1c0bd13 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -154,18 +154,16 @@ void board_init(void) {
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-#else
-  // Disable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
 #endif // vbus sense
 
+#if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_FS_VBUS_SENSE
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
+
   //------------- rhport1: OTG_HS -------------//
 #ifdef USB_HS_PHYC
   // MCU with built-in HS PHY such as F723, F733, F730
@@ -178,9 +176,6 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
-  // Enable HS VBUS sense (B device) via pin PB13
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-
   /* Configure OTG-HS ID pin */
   GPIO_InitStruct.Pin       = GPIO_PIN_13;
   GPIO_InitStruct.Mode      = GPIO_MODE_AF_OD;
@@ -243,17 +238,18 @@ void board_init(void) {
   __HAL_RCC_USB_OTG_HS_ULPI_CLK_ENABLE();
   __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
 
-#if OTG_HS_VBUS_SENSE
-  #error OTG HS VBUS Sense enabled is not implemented
-#else
-  // No VBUS sense
-  USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
+#if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_HS_VBUS_SENSE
+  };
+  tud_configure(1, TUD_CFGID_DWC2, &cfg);
 #endif
 
+  // Turn off device vbus
+#if CFG_TUD_ENABLED
+  board_vbus_set(BOARD_TUD_RHPORT, false);
+#endif
   // Turn on host vbus
 #if CFG_TUH_ENABLED
   board_vbus_set(BOARD_TUH_RHPORT, true);
-- 
cgit v1.3.1


From f89ef31a3ac2b3b388a6d4b371ddedd7901e45d9 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:27:05 +0100
Subject: bsp/stm32h7: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h7/boards/stm32h743eval/board.h  |  2 +-
 hw/bsp/stm32h7/boards/stm32h747disco/board.h |  2 +-
 hw/bsp/stm32h7/family.c                      | 46 +++++++++++++---------------
 3 files changed, 23 insertions(+), 27 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 96bfc24e1..44ca58dc5 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -44,7 +44,7 @@
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
-#define OTG_HS_VBUS_SENSE     0
+#define OTG_HS_VBUS_SENSE     1
 
 // USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7
 #define ULPI_PINS \
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.h b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
index 71e8b1427..458aa48b6 100644
--- a/hw/bsp/stm32h7/boards/stm32h747disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
@@ -42,7 +42,7 @@
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
-#define OTG_HS_VBUS_SENSE     0
+#define OTG_HS_VBUS_SENSE     1
 
 // USB HS External PHY Pin: CLK, STP, DIR, NXT, D0-D7
 #define ULPI_PINS \
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 054d7855f..920f222d7 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -180,18 +180,16 @@ void board_init(void) {
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-#else
-  // Disable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
 #endif // vbus sense
 
+#if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_FS_VBUS_SENSE
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
+
   //------------- USB HS -------------//
 #if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 1)
   // Despite being call USB2_OTG
@@ -216,28 +214,26 @@ void board_init(void) {
   __HAL_RCC_USB1_OTG_HS_ULPI_CLK_ENABLE();
   __HAL_RCC_USB1_OTG_HS_CLK_ENABLE();
 
-#if OTG_HS_VBUS_SENSE
-  #error OTG HS VBUS Sense enabled is not implemented
-#else
-  // No VBUS sense
-  USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
-#endif
-
-  // Force device mode
-  USB_OTG_HS->GUSBCFG &= ~USB_OTG_GUSBCFG_FHMOD;
-  USB_OTG_HS->GUSBCFG |= USB_OTG_GUSBCFG_FDMOD;
+  #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_HS_VBUS_SENSE
+  };
+  tud_configure(1, TUD_CFGID_DWC2, &cfg);
+  #endif
 #endif
 
   HAL_PWREx_EnableUSBVoltageDetector();
 
   board_init2(); // optional init
 
+  // Turn off device vbus
+#if CFG_TUD_ENABLED
+  board_vbus_set(BOARD_TUD_RHPORT, false);
+#endif
+  // Turn on host vbus
 #if CFG_TUH_ENABLED
-  board_vbus_set(BOARD_TUH_RHPORT, 1);
+  board_vbus_set(BOARD_TUH_RHPORT, true);
 #endif
 
 }
-- 
cgit v1.3.1


From e19dace3fb83754891d7c05f6e00237b02323fdc Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:29:07 +0100
Subject: bsp/stm32h7rs: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h |  2 +-
 hw/bsp/stm32h7rs/family.c                       | 53 ++++++++++++-------------
 2 files changed, 27 insertions(+), 28 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
index 4fb72cce8..16c2fd335 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
@@ -44,7 +44,7 @@
 #define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
 
 // VBUS Sense detection
-#define OTG_FS_VBUS_SENSE     1
+#define OTG_FS_VBUS_SENSE     0
 #define OTG_HS_VBUS_SENSE     0
 
 #define PINID_LED      0
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 784c92465..b1980f2ed 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -356,17 +356,16 @@ void board_init(void) {
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
   HAL_GPIO_Init(GPIOM, &GPIO_InitStruct);
+#endif // vbus sense
 
-  // Enable VBUS sense (B device) via pin PM14
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-#else
-  // Disable VBUS sense (B device)
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
+#if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_FS_VBUS_SENSE
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
 
-  // B-peripheral session valid override enable
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
-#endif // vbus sense
 #endif
 
   //------------- USB HS -------------//
@@ -382,33 +381,33 @@ void board_init(void) {
 
 #if OTG_HS_VBUS_SENSE
   // Configure VBUS Pin
-  GPIO_InitStruct.Pin = GPIO_PIN_9;
-  GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
-  HAL_GPIO_Init(GPIOM, &GPIO_InitStruct);
-
-  // Enable VBUS sense (B device) via pin PM9
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-#else
-  // Disable VBUS sense (B device)
-  USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
+  GPIO_InitTypeDef GPIO_InitStruct2;
+  GPIO_InitStruct2.Pin = GPIO_PIN_8;
+  GPIO_InitStruct2.Mode = GPIO_MODE_INPUT;
+  GPIO_InitStruct2.Pull = GPIO_NOPULL;
+  GPIO_InitStruct2.Alternate = GPIO_AF10_OTG_HS;
+  HAL_GPIO_Init(GPIOM, &GPIO_InitStruct2);
+#endif
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
-  // B-peripheral session valid override enable
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALEXTOEN;
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALOVAL;
-#else
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_PULLDOWNEN;
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = OTG_HS_VBUS_SENSE
+  };
+  tud_configure(1, TUD_CFGID_DWC2, &cfg);
 #endif
 
-#endif
 #endif
 
   board_init2();
 
+  // Turn off device vbus
+#if CFG_TUD_ENABLED
+  board_vbus_set(BOARD_TUD_RHPORT, false);
+#endif
+  // Turn on host vbus
 #if CFG_TUH_ENABLED
-  board_vbus_set(BOARD_TUH_RHPORT, 1);
+  board_vbus_set(BOARD_TUH_RHPORT, true);
 #endif
 }
 
-- 
cgit v1.3.1


From 0e88879f676fd44c1c48f2b1427c441f70d82d97 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:29:32 +0100
Subject: bsp/stm32l4: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32l4/boards/stm32l476disco/board.h  | 11 ++---------
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.h |  8 ++------
 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h |  8 ++------
 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h |  8 ++------
 hw/bsp/stm32l4/family.c                       | 12 ++++++++++--
 5 files changed, 18 insertions(+), 29 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.h b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
index 8c766d8ea..cf84d3e66 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
@@ -51,6 +51,8 @@
 #define UART_TX_PIN           GPIO_PIN_5
 #define UART_RX_PIN           GPIO_PIN_6
 
+#define VBUS_SENSE_EN         0
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -128,15 +130,6 @@ static inline void board_clock_init(void)
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4);
 }
 
-static inline void board_vbus_sense_init(void)
-{
-  // L476Disco use general GPIO PC11 for VBUS sensing instead of dedicated PA9 as others
-  // Disable VBUS Sense and force device mode
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN | USB_OTG_GOTGCTL_BVALOVAL;
-}
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
index 607210cec..3b031e00f 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
@@ -52,6 +52,8 @@
 #define UART_TX_PIN           GPIO_PIN_7
 #define UART_RX_PIN           GPIO_PIN_8
 
+#define VBUS_SENSE_EN         1
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -145,12 +147,6 @@ static inline void board_clock_init(void)
   HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
 }
 
-static inline void board_vbus_sense_init(void)
-{
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-}
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
index f522e7522..94978638e 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
@@ -51,6 +51,8 @@
 #define UART_TX_PIN           GPIO_PIN_7
 #define UART_RX_PIN           GPIO_PIN_8
 
+#define VBUS_SENSE_EN         1
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -129,12 +131,6 @@ static inline void board_clock_init(void)
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 }
 
-static inline void board_vbus_sense_init(void)
-{
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-}
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
index c181f5d4a..f603ae855 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
@@ -51,6 +51,8 @@
 #define UART_TX_PIN           GPIO_PIN_7
 #define UART_RX_PIN           GPIO_PIN_8
 
+#define VBUS_SENSE_EN         1
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -129,12 +131,6 @@ static inline void board_clock_init(void)
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 }
 
-static inline void board_vbus_sense_init(void)
-{
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-}
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index e69ae8e3b..b51a9fc8f 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -170,10 +170,18 @@ void board_init(void) {
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 #endif
 
-  /* Enable USB FS Clocks */
 #if defined(USB_OTG_FS)
+  /* Enable USB FS Clocks */
   __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
-  board_vbus_sense_init();
+
+  #if CFG_TUD_ENABLED
+  /* Set Vbus sense */
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = VBUS_SENSE_EN
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+  #endif
 #else
   __HAL_RCC_USB_CLK_ENABLE();
 #endif
-- 
cgit v1.3.1


From 08e50a01d77c33458faf35ef475426f8c996b1f2 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:30:27 +0100
Subject: bsp/stm32n6: update jlink device

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32n6/boards/stm32n6570dk/board.cmake    | 2 +-
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake | 2 +-
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk    | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.cmake b/hw/bsp/stm32n6/boards/stm32n6570dk/board.cmake
index e88efefb9..00efc974c 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.cmake
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT stm32n657xx)
-set(JLINK_DEVICE stm32n6xx)
+set(JLINK_DEVICE stm32n657x0)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_AXISRAM2_fsbl.ld)
 
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
index e88efefb9..00efc974c 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT stm32n657xx)
-set(JLINK_DEVICE stm32n6xx)
+set(JLINK_DEVICE stm32n657x0)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_AXISRAM2_fsbl.ld)
 
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
index 05717699c..ef27c0793 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
@@ -1,6 +1,6 @@
 MCU_VARIANT = stm32n657xx
 CFLAGS += -DSTM32N657xx
-JLINK_DEVICE = stm32n6xx
+JLINK_DEVICE = stm32n657x0
 
 LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
 
-- 
cgit v1.3.1


From 7a854cf50fe6048c1a76c3bbbe07dfb1e6b0d73c Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:34:47 +0100
Subject: bsp/stm32u5: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h   |   5 ++
 hw/bsp/stm32u5/boards/stm32u545nucleo/board.h |   3 +
 hw/bsp/stm32u5/boards/stm32u575eval/board.h   |   5 ++
 hw/bsp/stm32u5/boards/stm32u575nucleo/board.h | 102 +++++++++++++++++++++++++
 hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h | 106 +++++++++++++++++++++++++-
 hw/bsp/stm32u5/family.c                       |  34 +++++----
 hw/bsp/stm32u5/family.cmake                   |   5 +-
 hw/bsp/stm32u5/family.mk                      |   7 +-
 hw/bsp/stm32u5/stm32u5xx_hal_conf.h           |   4 +-
 9 files changed, 249 insertions(+), 22 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h b/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
index cf3f63ea5..c99743738 100644
--- a/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
+++ b/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
@@ -55,6 +55,8 @@ extern "C"
 #define UART_TX_PIN GPIO_PIN_9
 #define UART_RX_PIN GPIO_PIN_10
 
+#define VBUS_SENSE_EN 0
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -110,6 +112,9 @@ static void SystemClock_Config(void) {
 static void SystemPower_Config(void) {
 }
 
+static inline void board_vbus_sense_init(void) {
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
index 0c3439b2c..eb2b63721 100644
--- a/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
@@ -110,6 +110,9 @@ static void SystemClock_Config(void) {
 static void SystemPower_Config(void) {
 }
 
+static inline void board_vbus_sense_init(void) {
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.h b/hw/bsp/stm32u5/boards/stm32u575eval/board.h
index b11f6a747..cce3e38b3 100644
--- a/hw/bsp/stm32u5/boards/stm32u575eval/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.h
@@ -56,6 +56,8 @@ extern "C"
 #define UART_TX_PIN GPIO_PIN_9
 #define UART_RX_PIN GPIO_PIN_10
 
+#define VBUS_SENSE_EN 0
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -111,6 +113,9 @@ static void SystemClock_Config(void) {
 static void SystemPower_Config(void) {
 }
 
+static inline void board_vbus_sense_init(void) {
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
index be037b68a..b6b60f021 100644
--- a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
@@ -37,6 +37,8 @@ extern "C"
 {
 #endif
 
+#include "stm32u5xx_ll_tim.h"
+
 // LED GREEN
 #define LED_PORT GPIOC
 #define LED_PIN GPIO_PIN_7
@@ -55,6 +57,8 @@ extern "C"
 #define UART_TX_PIN GPIO_PIN_7
 #define UART_RX_PIN GPIO_PIN_8
 
+#define VBUS_SENSE_EN 0
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
@@ -110,6 +114,104 @@ static void SystemClock_Config(void) {
 static void SystemPower_Config(void) {
 }
 
+static inline void board_vbus_sense_init(void) {
+  /* ADC config */
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC;
+  PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSE;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  __HAL_RCC_ADC12_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  GPIO_InitStruct.Pin = GPIO_PIN_2;
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  ADC_HandleTypeDef hadc1;
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
+  hadc1.Init.Resolution = ADC_RESOLUTION_14B;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+  hadc1.Init.DMAContinuousRequests = DISABLE;
+  hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
+  hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK) {
+    Error_Handler();
+  }
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+  sConfig.Channel = ADC_CHANNEL_3;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_68CYCLES;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
+    Error_Handler();
+  }
+  HAL_NVIC_EnableIRQ(ADC1_IRQn);
+
+  /* TIM1 init for TRGO */
+  __HAL_RCC_TIM1_CLK_ENABLE();
+  TIM_HandleTypeDef htim1;
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 159;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 999;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK) {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) {
+    Error_Handler();
+  }
+  LL_TIM_SetTriggerOutput(htim1.Instance, LL_TIM_TRGO_UPDATE);
+
+  HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
+  HAL_ADC_Start_IT(&hadc1);
+  HAL_TIM_Base_Start(&htim1);
+}
+
+void ADC1_IRQHandler(void) {
+  if(LL_ADC_IsActiveFlag_EOC(ADC1) != 0) {
+    /* Clear flag ADC group regular end of unitary conversion */
+    LL_ADC_ClearFlag_EOC(ADC1);
+    /* ADC code = 4.5V * R2 / (R1 + R2) * (2^14) / 3.3V
+     * with R1 = 330kOhm and R2 = 50kOhm
+     */
+    const uint32_t threshold = 4500 * 50 / (50 + 330) * 16384 / 3300;
+    if((ADC1->DR > threshold) && (USB_OTG_FS->GOTGCTL & USB_OTG_GOTGCTL_BVALOEN)) {
+      USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
+    } else {
+      USB_OTG_FS->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOVAL;
+    }
+  }
+  if(LL_ADC_IsActiveFlag_OVR(ADC1) != 0) {
+    /* Clear flag ADC group regular overrun */
+    LL_ADC_ClearFlag_OVR(ADC1);
+  }
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
index 0785fb36b..15106aee6 100644
--- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
@@ -37,6 +37,8 @@ extern "C"
 {
 #endif
 
+#include "stm32u5xx_ll_tim.h"
+
 // LED GREEN
 #define LED_PORT GPIOC
 #define LED_PIN GPIO_PIN_7
@@ -55,11 +57,13 @@ extern "C"
 #define UART_TX_PIN GPIO_PIN_9
 #define UART_RX_PIN GPIO_PIN_10
 
+#define VBUS_SENSE_EN 0
+
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
 
-static void SystemClock_Config(void) {
+static inline void SystemClock_Config(void) {
   RCC_OscInitTypeDef RCC_OscInitStruct = { 0 };
   RCC_ClkInitTypeDef RCC_ClkInitStruct = { 0 };
 
@@ -128,7 +132,7 @@ static void SystemClock_Config(void) {
   }
 }
 
-static void SystemPower_Config(void) {
+static inline void SystemPower_Config(void) {
   HAL_PWREx_EnableVddIO2();
 
   /*
@@ -141,7 +145,105 @@ static void SystemPower_Config(void) {
 /* USER CODE END PWR */
 }
 
+static inline void board_vbus_sense_init(void) {
+  /* ADC config */
+  GPIO_InitTypeDef GPIO_InitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADCDAC;
+  PeriphClkInit.AdcDacClockSelection = RCC_ADCDACCLKSOURCE_HSE;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
+  {
+    Error_Handler();
+  }
+  __HAL_RCC_ADC12_CLK_ENABLE();
+  __HAL_RCC_GPIOC_CLK_ENABLE();
+  GPIO_InitStruct.Pin = GPIO_PIN_2;
+  GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
+  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+  ADC_HandleTypeDef hadc1;
+  hadc1.Instance = ADC1;
+  hadc1.Init.ClockPrescaler = ADC_CLOCK_ASYNC_DIV1;
+  hadc1.Init.Resolution = ADC_RESOLUTION_14B;
+  hadc1.Init.GainCompensation = 0;
+  hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
+  hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
+  hadc1.Init.EOCSelection = ADC_EOC_SINGLE_CONV;
+  hadc1.Init.LowPowerAutoWait = DISABLE;
+  hadc1.Init.ContinuousConvMode = DISABLE;
+  hadc1.Init.NbrOfConversion = 1;
+  hadc1.Init.DiscontinuousConvMode = DISABLE;
+  hadc1.Init.ExternalTrigConv = ADC_EXTERNALTRIG_T1_TRGO;
+  hadc1.Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_RISING;
+  hadc1.Init.DMAContinuousRequests = DISABLE;
+  hadc1.Init.TriggerFrequencyMode = ADC_TRIGGER_FREQ_HIGH;
+  hadc1.Init.Overrun = ADC_OVR_DATA_OVERWRITTEN;
+  hadc1.Init.LeftBitShift = ADC_LEFTBITSHIFT_NONE;
+  hadc1.Init.ConversionDataManagement = ADC_CONVERSIONDATA_DR;
+  hadc1.Init.OversamplingMode = DISABLE;
+  if (HAL_ADC_Init(&hadc1) != HAL_OK) {
+    Error_Handler();
+  }
+
+  ADC_ChannelConfTypeDef sConfig = {0};
+  sConfig.Channel = ADC_CHANNEL_3;
+  sConfig.Rank = ADC_REGULAR_RANK_1;
+  sConfig.SamplingTime = ADC_SAMPLETIME_68CYCLES;
+  sConfig.SingleDiff = ADC_SINGLE_ENDED;
+  sConfig.OffsetNumber = ADC_OFFSET_NONE;
+  sConfig.Offset = 0;
+  if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK) {
+    Error_Handler();
+  }
+  HAL_NVIC_EnableIRQ(ADC1_2_IRQn);
+
+  /* TIM1 init for TRGO */
+  __HAL_RCC_TIM1_CLK_ENABLE();
+  TIM_HandleTypeDef htim1;
+  TIM_ClockConfigTypeDef sClockSourceConfig = {0};
+  htim1.Instance = TIM1;
+  htim1.Init.Prescaler = 159;
+  htim1.Init.CounterMode = TIM_COUNTERMODE_UP;
+  htim1.Init.Period = 999;
+  htim1.Init.ClockDivision = TIM_CLOCKDIVISION_DIV1;
+  htim1.Init.RepetitionCounter = 0;
+  htim1.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE;
+  if (HAL_TIM_Base_Init(&htim1) != HAL_OK) {
+    Error_Handler();
+  }
+  sClockSourceConfig.ClockSource = TIM_CLOCKSOURCE_INTERNAL;
+  if (HAL_TIM_ConfigClockSource(&htim1, &sClockSourceConfig) != HAL_OK) {
+    Error_Handler();
+  }
+  LL_TIM_SetTriggerOutput(htim1.Instance, LL_TIM_TRGO_UPDATE);
+
+  HAL_ADCEx_Calibration_Start(&hadc1, ADC_CALIB_OFFSET, ADC_SINGLE_ENDED);
+  HAL_ADC_Start_IT(&hadc1);
+  HAL_TIM_Base_Start(&htim1);
+}
 
+void ADC1_2_IRQHandler(void) {
+  if(LL_ADC_IsActiveFlag_EOC(ADC1) != 0) {
+    /* Clear flag ADC group regular end of unitary conversion */
+    LL_ADC_ClearFlag_EOC(ADC1);
+    /* ADC code = 4.5V * R2 / (R1 + R2) * (2^14) / 3.3V
+     * with R1 = 330kOhm and R2 = 50kOhm
+     */
+    const uint32_t threshold = 4500 * 50 / (50 + 330) * 16384 / 3300;
+    if((ADC1->DR > threshold) && (USB_OTG_HS->GOTGCTL & USB_OTG_GOTGCTL_BVALOEN)) {
+      USB_OTG_HS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
+      USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALOVAL;
+    } else {
+      USB_OTG_HS->GOTGCTL &= ~USB_OTG_GOTGCTL_BVALOVAL;
+      USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBVALOVAL;
+    }
+  }
+  if(LL_ADC_IsActiveFlag_OVR(ADC1) != 0) {
+    /* Clear flag ADC group regular overrun */
+    LL_ADC_ClearFlag_OVR(ADC1);
+  }
+}
 #ifdef __cplusplus
 }
 #endif
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 26d72d6a0..c2ea270df 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -179,18 +179,16 @@ void board_init(void) {
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
-
-  // Enable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG |= USB_OTG_GCCFG_VBDEN;
-  #else
-  // Disable VBUS sense (B device) via pin PA9
-  USB_OTG_FS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOEN;
-  USB_OTG_FS->GOTGCTL |= USB_OTG_GOTGCTL_BVALOVAL;
   #endif // vbus sense
 
+#if CFG_TUD_ENABLED
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = VBUS_SENSE_EN
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
+
   /* Enable USB power on Pwrctrl CR2 register */
   HAL_PWREx_EnableVddUSB();
 
@@ -218,13 +216,17 @@ void board_init(void) {
   /*Configuring the SYSCFG registers OTG_HS PHY*/
   HAL_SYSCFG_EnableOTGPHY(SYSCFG_OTG_HS_PHY_ENABLE);
 
-  // Disable VBUS sense (B device)
-  USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALEXTOEN;
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALOVAL;
+#if CFG_TUD_ENABLED
+  tud_configure_dwc2_t cfg = {
+    .bm_double_buffered = 0,
+    .vbus_sensing = VBUS_SENSE_EN
+  };
+  tud_configure(0, TUD_CFGID_DWC2, &cfg);
+#endif
 #endif // USB_OTG_FS
+
+  /* Non-standard VBus sense settings */
+  board_vbus_sense_init();
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32u5/family.cmake b/hw/bsp/stm32u5/family.cmake
index 58dc63ae3..3d23c554d 100644
--- a/hw/bsp/stm32u5/family.cmake
+++ b/hw/bsp/stm32u5/family.cmake
@@ -45,6 +45,9 @@ function(family_add_board BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_adc.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_adc_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_tim.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -96,7 +99,7 @@ function(family_configure_example TARGET RTOS)
   endif ()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes -Wno-self-assign")
   endif ()
   set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 47aed10a9..3dab8c610 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -16,6 +16,7 @@ CFLAGS_GCC += \
   -Wno-error=undef \
   -Wno-error=unused-parameter \
   -Wno-error=type-limits \
+  -Wno-self-assign \
 
 ifeq ($(TOOLCHAIN),gcc)
 CFLAGS_GCC += -Wno-error=maybe-uninitialized
@@ -35,11 +36,15 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
-	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_adc.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_adc_ex.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim.c
 
 ifneq ($(filter stm32u545xx stm32u535xx,$(MCU_VARIANT)),)
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
 	src/portable/st/stm32_fsdev/fsdev_common.c
 else
 SRC_C += \
diff --git a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
index 87c3683de..5d95862f6 100644
--- a/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
+++ b/hw/bsp/stm32u5/stm32u5xx_hal_conf.h
@@ -36,7 +36,7 @@
 
 #define HAL_MODULE_ENABLED
 
-/*#define HAL_ADC_MODULE_ENABLED */
+#define HAL_ADC_MODULE_ENABLED
 /*#define HAL_MDF_MODULE_ENABLED */
 /*#define HAL_COMP_MODULE_ENABLED */
 /*#define HAL_CORDIC_MODULE_ENABLED */
@@ -76,7 +76,7 @@
 /*#define HAL_SMBUS_MODULE_ENABLED */
 /*#define HAL_SPI_MODULE_ENABLED */
 /*#define HAL_SRAM_MODULE_ENABLED */
-/*#define HAL_TIM_MODULE_ENABLED */
+#define HAL_TIM_MODULE_ENABLED
 /*#define HAL_TSC_MODULE_ENABLED */
 /*#define HAL_RAMCFG_MODULE_ENABLED */
 #define HAL_UART_MODULE_ENABLED
-- 
cgit v1.3.1


From 42f623a2a7dbd2246368ac2df0ed8c90480d7156 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 30 Jan 2026 19:34:54 +0100
Subject: bsp/stm32wba: update vbus sense

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32wba/family.c | 9 +--------
 1 file changed, 1 insertion(+), 8 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c
index 8dc6547ae..d05415755 100644
--- a/hw/bsp/stm32wba/family.c
+++ b/hw/bsp/stm32wba/family.c
@@ -172,14 +172,7 @@ void board_init(void) {
 
   // Configuring the SYSCFG registers OTG_HS PHY
   SYSCFG->OTGHSPHYCR |= SYSCFG_OTGHSPHYCR_EN;
-
-  // Disable VBUS sense (B device)
-  USB_OTG_HS->GCCFG &= ~USB_OTG_GCCFG_VBDEN;
-
-  // B-peripheral session valid override enable
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALEXTOEN;
-  USB_OTG_HS->GCCFG |= USB_OTG_GCCFG_VBVALOVAL;
-  #endif // USB_OTG_FS
+  #endif // USB_OTG_HS
 }
 
 void board_led_write(bool state) { HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); }
-- 
cgit v1.3.1


From be24a38a65d8e22fed461b4058e3deb97d5a2907 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sat, 31 Jan 2026 17:11:31 +0100
Subject: bsp/stm32n6: make both ports work

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32n6/boards/stm32n6570dk/board.h        |  41 +--
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake |   7 +
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h     |  33 +-
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk    |   3 +
 hw/bsp/stm32n6/family.c                           | 120 ++++++-
 hw/bsp/stm32n6/family.cmake                       |   7 +-
 hw/bsp/stm32n6/family.mk                          |   6 +-
 hw/bsp/stm32n6/setup_iar.mac                      |  12 +
 hw/bsp/stm32n6/stm32n6.jdebug                     | 362 ++++++++++++++++++++++
 hw/bsp/stm32n6/stm32n6xx_hal_conf.h               |   2 +-
 10 files changed, 539 insertions(+), 54 deletions(-)
 create mode 100644 hw/bsp/stm32n6/setup_iar.mac
 create mode 100644 hw/bsp/stm32n6/stm32n6.jdebug

(limited to 'hw')

diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
index bbcad6340..8c2ec66dc 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
@@ -44,17 +44,16 @@ extern "C" {
 #define UART_DEV USART1
 #define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
 
-#define BOARD_TUD_RHPORT 1
-
 // VBUS Sense detection
-#define OTG_FS_VBUS_SENSE 1
-#define OTG_HS_VBUS_SENSE 1
+#define OTG_FS_VBUS_SENSE 0
+#define OTG_HS_VBUS_SENSE 0
 
 #define PINID_LED 0
 #define PINID_BUTTON 1
 #define PINID_UART_TX 2
 #define PINID_UART_RX 3
 #define PINID_TCPP0203_EN 4
+#define PINID_PWR_USB2 8
 
 static board_pindef_t board_pindef[] = {
     {// LED
@@ -77,21 +76,22 @@ static board_pindef_t board_pindef[] = {
      .port = GPIOA,
      .pin_init = {.Pin = GPIO_PIN_4, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
      .active_state = 0},
-    {
-        // I2C SCL for TCPP0203
-        .port = GPIOD,
-        .pin_init = {.Pin = GPIO_PIN_14, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    { // I2C SCL for TCPP0203
+      .port = GPIOD,
+      .pin_init = {.Pin = GPIO_PIN_14, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
     },
-    {
-        // I2C SDA for TCPP0203
-        .port = GPIOD,
-        .pin_init = {.Pin = GPIO_PIN_4, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    {// I2C SDA for TCPP0203
+      .port = GPIOD,
+      .pin_init = {.Pin = GPIO_PIN_4, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
     },
-    {
-        // INT for TCPP0203
-        .port = GPIOD,
-        .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+    {// INT for TCPP0203
+      .port = GPIOD,
+      .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
     },
+    {// PWR for USB2
+      .port = GPIOB,
+      .pin_init = {.Pin = GPIO_PIN_9, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+    }
 };
 
 //--------------------------------------------------------------------+
@@ -262,9 +262,12 @@ static inline void board_init2(void) {
 }
 
 void board_vbus_set(uint8_t rhport, bool state) {
-  (void) state;
-  if (rhport == 1) {
-    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+  if (rhport == 0) {
+    uint8_t switch_state = state ? TCPP0203_GD_PROVIDER_SWITCH_CLOSED : TCPP0203_GD_PROVIDER_SWITCH_OPEN;
+    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, switch_state) == TCPP0203_OK, );
+  } else if (rhport == 1) {
+    board_pindef_t *pindef = &board_pindef[PINID_PWR_USB2];
+    HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, state ? GPIO_PIN_SET : GPIO_PIN_RESET);
   }
 }
 
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
index 00efc974c..e682cabcb 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.cmake
@@ -3,6 +3,13 @@ set(JLINK_DEVICE stm32n657x0)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32N657XX_AXISRAM2_fsbl.ld)
 
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 0)
+endif ()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
+endif ()
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32N657xx
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
index 33c68f7cf..5bdbaff3c 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
@@ -44,11 +44,9 @@ extern "C" {
 #define UART_DEV USART1
 #define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
 
-#define BOARD_TUD_RHPORT 1
-
 // VBUS Sense detection
-#define OTG_FS_VBUS_SENSE 1
-#define OTG_HS_VBUS_SENSE 1
+#define OTG_FS_VBUS_SENSE 0
+#define OTG_HS_VBUS_SENSE 0
 
 #define PINID_LED 0
 #define PINID_BUTTON 1
@@ -77,20 +75,17 @@ static board_pindef_t board_pindef[] = {
      .port = GPIOA,
      .pin_init = {.Pin = GPIO_PIN_7, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
      .active_state = 0},
-    {
-        // I2C SCL for TCPP0203
-        .port = GPIOB,
-        .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    {// I2C SCL for TCPP0203
+      .port = GPIOB,
+      .pin_init = {.Pin = GPIO_PIN_10, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
     },
-    {
-        // I2C SDA for TCPP0203
-        .port = GPIOB,
-        .pin_init = {.Pin = GPIO_PIN_11, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
+    {// I2C SDA for TCPP0203
+      .port = GPIOB,
+      .pin_init = {.Pin = GPIO_PIN_11, .Mode = GPIO_MODE_AF_OD, .Pull = GPIO_NOPULL, .Speed = GPIO_SPEED_FREQ_LOW, .Alternate = GPIO_AF4_I2C2},
     },
-    {
-        // INT for TCPP0203
-        .port = GPIOD,
-        .pin_init = {.Pin = GPIO_PIN_2, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
+    {// INT for TCPP0203
+      .port = GPIOD,
+      .pin_init = {.Pin = GPIO_PIN_2, .Mode = GPIO_MODE_IT_FALLING, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0},
     },
 };
 
@@ -262,9 +257,9 @@ static inline void board_init2(void) {
 }
 
 void board_vbus_set(uint8_t rhport, bool state) {
-  (void) state;
-  if (rhport == 1) {
-    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, TCPP0203_GD_PROVIDER_SWITCH_CLOSED) == TCPP0203_OK, );
+  if (rhport == 0) {
+    uint8_t switch_state = state ? TCPP0203_GD_PROVIDER_SWITCH_CLOSED : TCPP0203_GD_PROVIDER_SWITCH_OPEN;
+    TU_ASSERT(TCPP0203_SetGateDriverProvider(&tcpp0203_obj, switch_state) == TCPP0203_OK, );
   }
 }
 
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
index ef27c0793..efbb82611 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
@@ -4,6 +4,9 @@ JLINK_DEVICE = stm32n657x0
 
 LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
 
+RHPORT_DEVICE ?= 0
+RHPORT_HOST ?= 0
+
 # flash target using on-board stlink
 flash: flash-stlink
 
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 567bb7294..c839e6b3e 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -48,7 +48,8 @@
 TU_ATTR_UNUSED static void Error_Handler(void) { }
 
 void HardFault_Handler(void);
-
+static void MPU_Config(void);
+static void SystemIsolation_Config(void);
 typedef struct {
   GPIO_TypeDef* port;
   GPIO_InitTypeDef pin_init;
@@ -87,20 +88,25 @@ static UART_HandleTypeDef UartHandle = {
 // Despite being call USB2_OTG_FS on some MCUs
 // OTG_FS is marked as RHPort0 by TinyUSB to be consistent across stm32 port
 void USB2_OTG_HS_IRQHandler(void) {
-  tusb_int_handler(0, true);
+  tusb_int_handler(1, true);
 }
 
 // Despite being call USB1_OTG_HS on some MCUs
 // OTG_HS is marked as RHPort1 by TinyUSB to be consistent across stm32 port
 void USB1_OTG_HS_IRQHandler(void) {
-  tusb_int_handler(1, true);
+  tusb_int_handler(0, true);
 }
 
 void board_init(void) {
-
   /* Enable BusFault and SecureFault handlers (HardFault is default) */
   SCB->SHCSR |= (SCB_SHCSR_BUSFAULTENA_Msk | SCB_SHCSR_SECUREFAULTENA_Msk);
 
+  MPU_Config();
+  SystemIsolation_Config();
+
+  SCB_EnableICache();
+  SCB_EnableDCache();
+
   HAL_PWREx_EnableVddA();
   HAL_PWREx_EnableVddIO2();
   HAL_PWREx_EnableVddIO3();
@@ -126,8 +132,6 @@ void board_init(void) {
   __HAL_RCC_GPIOP_CLK_ENABLE();
   __HAL_RCC_GPIOQ_CLK_ENABLE();
 
-  // HAL_ICACHE_Enable();
-
   for (uint8_t i = 0; i < TU_ARRAY_SIZE(board_pindef); i++) {
     HAL_GPIO_Init(board_pindef[i].port, &board_pindef[i].pin_init);
   }
@@ -155,7 +159,7 @@ void board_init(void) {
   HAL_UART_Init(&UartHandle);
 #endif
 
-
+#if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0)
   __HAL_RCC_USB1_OTG_HS_CLK_ENABLE();
   __HAL_RCC_PWR_CLK_ENABLE();
   HAL_PWREx_EnableVddUSBVMEN();
@@ -196,11 +200,109 @@ void board_init(void) {
   /* Peripheral PHY clock enable */
   __HAL_RCC_USB1_OTG_HS_PHY_CLK_ENABLE();
 
-  board_init2();
+#if CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0
+  board_vbus_set(BOARD_TUH_RHPORT, 1);
+#endif
+#endif
+
+#if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 1)
+  __HAL_RCC_USB2_OTG_HS_CLK_ENABLE();
+  __HAL_RCC_PWR_CLK_ENABLE();
+  HAL_PWREx_EnableVddUSBVMEN();
+  while(__HAL_PWR_GET_FLAG(PWR_FLAG_USB33RDY));
+  HAL_PWREx_EnableVddUSB();
+
+  LL_AHB5_GRP1_ForceReset(0x00800000);
+  __HAL_RCC_USB2_OTG_HS_FORCE_RESET();
+  __HAL_RCC_USB2_OTG_HS_PHY_FORCE_RESET();
+
+  LL_RCC_HSE_SelectHSEDiv2AsDiv2Clock();
+  LL_AHB5_GRP1_ReleaseReset(0x00800000);
+
+  /* Peripheral clock enable */
+  __HAL_RCC_USB2_OTG_HS_CLK_ENABLE();
+
+  /* Required few clock cycles before accessing USB PHY Controller Registers */
+  for (volatile uint32_t i = 0; i < 10; i++) {
+      __NOP(); // No Operation instruction to create a delay
+  }
+
+  USB2_HS_PHYC->USBPHYC_CR &= ~(0x7 << 0x4);
+
+  USB2_HS_PHYC->USBPHYC_CR |= (0x1 << 16) |
+                              (0x2 << 4)  |
+                              (0x1 << 2)  |
+                                0x1U;
 
-#if CFG_TUH_ENABLED
+  __HAL_RCC_USB2_OTG_HS_PHY_RELEASE_RESET();
+
+  /* Required few clock cycles before Releasing Reset */
+  for (volatile uint32_t i = 0; i < 10; i++) {
+      __NOP(); // No Operation instruction to create a delay
+  }
+
+  __HAL_RCC_USB2_OTG_HS_RELEASE_RESET();
+
+  /* Peripheral PHY clock enable */
+  __HAL_RCC_USB2_OTG_HS_PHY_CLK_ENABLE();
+
+#if CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 1
   board_vbus_set(BOARD_TUH_RHPORT, 1);
 #endif
+#endif
+
+  board_init2();
+}
+
+static void MPU_Config(void)
+{
+  MPU_Region_InitTypeDef default_config = {0};
+  MPU_Attributes_InitTypeDef attr_config = {0};
+  uint32_t primask_bit = __get_PRIMASK();
+  __disable_irq();
+
+  /* disable the MPU */
+  HAL_MPU_Disable();
+
+  /* create an attribute configuration for the MPU */
+  attr_config.Attributes = INNER_OUTER(MPU_NOT_CACHEABLE);
+  attr_config.Number = MPU_ATTRIBUTES_NUMBER0;
+
+  HAL_MPU_ConfigMemoryAttributes(&attr_config);
+
+  /* Create a non cacheable region */
+  /*Normal memory type, code execution allowed */
+  default_config.Enable = MPU_REGION_ENABLE;
+  default_config.Number = MPU_REGION_NUMBER0;
+  default_config.BaseAddress = __NON_CACHEABLE_SECTION_BEGIN;
+  default_config.LimitAddress =  __NON_CACHEABLE_SECTION_END;
+  default_config.DisableExec = MPU_INSTRUCTION_ACCESS_ENABLE;
+  default_config.AccessPermission = MPU_REGION_ALL_RW;
+  default_config.IsShareable = MPU_ACCESS_NOT_SHAREABLE;
+  default_config.AttributesIndex = MPU_ATTRIBUTES_NUMBER0;
+  HAL_MPU_ConfigRegion(&default_config);
+
+  /* enable the MPU */
+  HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
+
+  /* Exit critical section to lock the system and avoid any issue around MPU mechanisme */
+  __set_PRIMASK(primask_bit);
+}
+
+static void SystemIsolation_Config(void) {
+  /* set all required IPs as secure privileged */
+  __HAL_RCC_RIFSC_CLK_ENABLE();
+  RIMC_MasterConfig_t RIMC_master = {0};
+  RIMC_master.MasterCID = RIF_CID_1;
+  RIMC_master.SecPriv = RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV;
+
+  /*RIMC configuration*/
+  HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_OTG1, &RIMC_master);
+  HAL_RIF_RIMC_ConfigMasterAttributes(RIF_MASTER_INDEX_OTG2, &RIMC_master);
+
+  /*RISUP configuration*/
+  HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_OTG1HS , RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);
+  HAL_RIF_RISC_SetSlaveSecureAttributes(RIF_RISC_PERIPH_INDEX_OTG2HS , RIF_ATTRIBUTE_SEC | RIF_ATTRIBUTE_PRIV);
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32n6/family.cmake b/hw/bsp/stm32n6/family.cmake
index 6c7aaea61..972138018 100644
--- a/hw/bsp/stm32n6/family.cmake
+++ b/hw/bsp/stm32n6/family.cmake
@@ -21,7 +21,7 @@ set(FAMILY_MCUS STM32N6 CACHE INTERNAL "")
 # Port & Speed Selection
 # ----------------------
 if (NOT DEFINED RHPORT_DEVICE)
-  set(RHPORT_DEVICE 1)
+  set(RHPORT_DEVICE 0)
 endif ()
 if (NOT DEFINED RHPORT_HOST)
   set(RHPORT_HOST 1)
@@ -68,6 +68,7 @@ function(family_add_board BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rif.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
@@ -80,8 +81,8 @@ function(family_add_board BOARD_TARGET)
     BOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED}
     BOARD_TUH_RHPORT=${RHPORT_HOST}
     BOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
-    SEGGER_RTT_SECTION="noncacheable_buffer"
-    BUFFER_SIZE_UP=0x3000
+    SEGGER_RTT_SECTION=".noncacheable"
+    BUFFER_SIZE_UP=0x4000
     )
 
   update_board(${BOARD_TARGET})
diff --git a/hw/bsp/stm32n6/family.mk b/hw/bsp/stm32n6/family.mk
index 45554e251..9fef533b1 100644
--- a/hw/bsp/stm32n6/family.mk
+++ b/hw/bsp/stm32n6/family.mk
@@ -12,7 +12,7 @@ CPU_CORE ?= cortex-m55
 # ----------------------
 # Port & Speed Selection
 # ----------------------
-RHPORT_DEVICE ?= 1
+RHPORT_DEVICE ?= 0
 RHPORT_HOST ?= 1
 
 ifndef RHPORT_DEVICE_SPEED
@@ -32,8 +32,8 @@ CFLAGS += \
 	-DBOARD_TUD_MAX_SPEED=${RHPORT_DEVICE_SPEED} \
 	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
 	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
-	-DSEGGER_RTT_SECTION=\"noncacheable_buffer\" \
-	-DBUFFER_SIZE_UP=0x3000 \
+	-DSEGGER_RTT_SECTION="\".noncacheable\"" \
+	-DBUFFER_SIZE_UP=0x4000 \
 
 # GCC Flags
 CFLAGS_GCC += \
diff --git a/hw/bsp/stm32n6/setup_iar.mac b/hw/bsp/stm32n6/setup_iar.mac
new file mode 100644
index 000000000..b6f2bc97a
--- /dev/null
+++ b/hw/bsp/stm32n6/setup_iar.mac
@@ -0,0 +1,12 @@
+/* Called once after the target reset. */
+execUserReset()
+{
+    /* Re-load image as AIXRAM2 is erased after CPU reset */
+    __loadImage("$EXE_DIR$\\$TARGET_BNAME$.hex", 0, 0);
+
+    __restoreSoftwareBreakpoints();
+
+     #PC = __readMemory32(0x34180404, "Memory");
+
+     #SP = 0x341FFD00;
+}
diff --git a/hw/bsp/stm32n6/stm32n6.jdebug b/hw/bsp/stm32n6/stm32n6.jdebug
new file mode 100644
index 000000000..81490db5d
--- /dev/null
+++ b/hw/bsp/stm32n6/stm32n6.jdebug
@@ -0,0 +1,362 @@
+/*********************************************************************
+*                 (c) SEGGER Microcontroller GmbH                    *
+*                      The Embedded Experts                          *
+*                         www.segger.com                             *
+**********************************************************************
+
+File          :
+Created       : 31. Jan 2026 16:34
+Ozone Version : V3.40e
+*/
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  //
+  // Dialog-generated settings
+  //
+  Project.SetDevice ("STM32N657X0");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("4 MHz");
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M55F.svd");
+  //
+  // User settings
+  //
+  File.Open ("$(ProjectDir)/../../../examples/device/cdc_msc/build/stm32n6570dk/RelWithDebInfo/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*       OnStartupComplete
+*
+* Function description
+*   Called when program execution has reached/passed
+*   the startup completion point. Optional.
+*
+**********************************************************************
+*/
+//void OnStartupComplete (void) {
+//}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging an application in RAM on a Cortex-M target device.
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//  //
+//  // Set up initial stack pointer
+//  //
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//  }
+//  //
+//  // Set up entry point PC
+//  //
+//  PC = Elf.GetEntryPointPC();
+//
+//  if (PC != 0xFFFFFFFF) {
+//    Target.SetReg("PC", PC);
+//  } else if (VectorTableAddr != 0xFFFFFFFF) {
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  } else {
+//    Util.Error("Project file error: failed to set entry point PC", 1);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+**
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+  _SetupTarget();
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*   The default implementation initializes SP and PC to reset values.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+  //_SetupTarget();
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetResume
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetResume (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotLoad
+*
+* Function description
+*   Called upon loading a snapshot. Optional.
+*
+* Additional information
+*   This function is used to restore the target state in cases
+*   where values cannot simply be written to the target.
+*   Typical use: GPIO clock needs to be enabled, before
+*   GPIO is configured.
+*
+**********************************************************************
+*/
+//void OnSnapshotLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       OnSnapshotSave
+*
+* Function description
+*   Called upon saving a snapshot. Optional.
+*
+* Additional information
+*   This function is usually used to save values of the target
+*   state which can either not be trivially read,
+*   or need to be restored in a specific way or order.
+*   Typically use: Memory Mapped Registers,
+*   such as PLL and GPIO configuration.
+*
+**********************************************************************
+*/
+//void OnSnapshotSave (void) {
+//}
+
+/*********************************************************************
+*
+*       OnError
+*
+* Function description
+*   Called when an error occurred. Optional.
+*
+**********************************************************************
+*/
+//void OnError (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterProjectLoad
+*
+* Function description
+*   After Project load routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterProjectLoad (void) {
+//}
+
+/*********************************************************************
+*
+*       OnDebugStartBreakSymbolReached
+*
+* Function description
+*   Called when program execution has reached/passed
+*   the symbol to be breaked at during debug start. Optional.
+*
+**********************************************************************
+*/
+//void OnDebugStartBreakSymReached (void) {
+//}
+
+/*********************************************************************
+*
+*       _SetupTarget
+*
+* Function description
+*   Setup the target.
+*   Called by AfterTargetReset() and AfterTargetDownload().
+*
+*   Auto-generated function. May be overridden by Ozone.
+*
+**********************************************************************
+*/
+void _SetupTarget(void) {
+  unsigned int SP;
+  unsigned int PC;
+  unsigned int VectorTableAddr;
+
+	Debug.Download();
+  Debug.Halt();
+
+  VectorTableAddr = Elf.GetBaseAddr();
+  //
+  // Set up initial stack pointer
+  //
+  SP = Target.ReadU32(VectorTableAddr);
+  if (SP != 0xFFFFFFFF) {
+    Target.SetReg("SP", SP);
+  }
+  //
+  // Set up entry point PC
+  //
+  PC = Elf.GetEntryPointPC();
+  if (PC != 0xFFFFFFFF) {
+    Target.SetReg("PC", PC);
+  } else {
+    Util.Error("Project script error: failed to set up entry point PC", 1);
+  }
+}
diff --git a/hw/bsp/stm32n6/stm32n6xx_hal_conf.h b/hw/bsp/stm32n6/stm32n6xx_hal_conf.h
index 00cb31159..49ca767fe 100644
--- a/hw/bsp/stm32n6/stm32n6xx_hal_conf.h
+++ b/hw/bsp/stm32n6/stm32n6xx_hal_conf.h
@@ -67,7 +67,7 @@
 /*#define HAL_PKA_MODULE_ENABLED      */
 /*#define HAL_PSSI_MODULE_ENABLED     */
 /*#define HAL_RAMCFG_MODULE_ENABLED   */
-/*#define HAL_RIF_MODULE_ENABLED      */
+#define HAL_RIF_MODULE_ENABLED
 /*#define HAL_RNG_MODULE_ENABLED      */
 /*#define HAL_RTC_MODULE_ENABLED      */
 /*#define HAL_SAI_MODULE_ENABLED      */
-- 
cgit v1.3.1


From 3cef022737e4529c1ae709e4061c1530a849c07b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 6 Feb 2026 17:40:13 +0700
Subject: set folder property for flash tool targets update build.yml only
 build with pr and push-to-master

---
 .github/pull_request_template.md |   5 --
 .github/workflows/build.yml      | 102 +++++++++++++--------------------------
 hw/bsp/family_support.cmake      |  26 ++++++++++
 3 files changed, 60 insertions(+), 73 deletions(-)
 delete mode 100644 .github/pull_request_template.md

(limited to 'hw')

diff --git a/.github/pull_request_template.md b/.github/pull_request_template.md
deleted file mode 100644
index aa148eb79..000000000
--- a/.github/pull_request_template.md
+++ /dev/null
@@ -1,5 +0,0 @@
-**Describe the PR**
-A clear and concise description of what this PR solve.
-
-**Additional context**
-If applicable, add any other context about the PR and/or screenshots here.
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index c8dca0a63..ded4e816c 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -4,9 +4,33 @@ on:
   workflow_dispatch:
   push:
     branches: [master]
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - 'tools/build.py'
+      - 'tools/get_deps.py'
+      - '.github/actions/**'
+      - '.github/workflows/build.yml'
+      - '.github/workflows/build_util.yml'
+      - '.github/workflows/ci_set_matrix.py'
   pull_request:
+    paths:
+      - 'src/**'
+      - 'examples/**'
+      - 'lib/**'
+      - 'hw/**'
+      - 'test/hil/**'
+      - 'tools/build.py'
+      - 'tools/get_deps.py'
+      - '.github/actions/**'
+      - '.github/workflows/build.yml'
+      - '.github/workflows/build_util.yml'
+      - '.github/workflows/ci_set_matrix.py'
   release:
     types: [ published ]
+
 concurrency:
   group: ${{ github.workflow }}-${{ github.ref }}
   cancel-in-progress: true
@@ -15,44 +39,7 @@ env:
   HIL_JSON: test/hil/tinyusb.json
 
 jobs:
-  # Check if code paths changed (skip builds if doc-only)
-  check-paths:
-    if: github.event_name == 'pull_request' || github.event_name == 'push'
-    runs-on: ubuntu-latest
-    permissions:
-      contents: read
-      pull-requests: read
-    outputs:
-      code_changed: ${{ steps.filter.outputs.code }}
-    steps:
-      - uses: actions/checkout@v6
-        with:
-          fetch-depth: 2  # Needed for push commit comparison
-      - uses: dorny/paths-filter@v3
-        id: filter
-        with:
-          filters: |
-            code:
-              - 'src/**'
-              - 'examples/**'
-              - 'lib/**'
-              - 'hw/**'
-              - 'test/hil/**'
-              - 'tools/build.py'
-              - 'tools/get_deps.py'
-              - '.github/actions/**'
-              - '.github/workflows/build.yml'
-              - '.github/workflows/build_util.yml'
-              - '.github/workflows/ci_set_matrix.py'
-
   set-matrix:
-    needs: [check-paths]
-    if: |
-      always() && (
-        github.event_name == 'release' ||
-        github.event_name == 'workflow_dispatch' ||
-        needs.check-paths.outputs.code_changed == 'true'
-      )
     runs-on: ubuntu-latest
     outputs:
       json: ${{ steps.set-matrix-json.outputs.matrix }}
@@ -197,8 +184,6 @@ jobs:
   # Build Make/CMake on Windows/MacOS
   # ---------------------------------------
   build-os:
-    needs: [check-paths]
-    if: needs.check-paths.outputs.code_changed == 'true'
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
@@ -215,9 +200,8 @@ jobs:
   # Zephyr
   # ---------------------------------------
   zephyr:
-    needs: [check-paths]
     # skip zephyr build due to failed build, fix later
-    if: false && needs.check-paths.outputs.code_changed == 'true'
+    if: false
     runs-on: ubuntu-latest
     steps:
       - name: Checkout TinyUSB
@@ -239,10 +223,8 @@ jobs:
   # Run on PR only (hil-tinyusb), hil-hfp only run on non-forked PR
   # ---------------------------------------
   hil-build:
-    needs: [check-paths, set-matrix]
-    if: |
-      github.repository_owner == 'hathach' &&
-      (github.event_name == 'workflow_dispatch' || needs.check-paths.outputs.code_changed == 'true')
+    needs: set-matrix
+    if: github.repository_owner == 'hathach'
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
@@ -261,10 +243,7 @@ jobs:
   # self-hosted on local VM, for attached hardware checkout HIL_JSON
   # ---------------------------------------
   hil-tinyusb:
-    needs: [check-paths, hil-build]
-    if: |
-      github.repository_owner == 'hathach' &&
-      (github.event_name == 'release' || github.event_name == 'workflow_dispatch' || needs.check-paths.outputs.code_changed == 'true')
+    needs: hil-build
     runs-on: [ self-hosted, X64, hathach, hardware-in-the-loop ]
     steps:
       - name: Get Skip Boards from previous run
@@ -304,11 +283,9 @@ jobs:
   # Since IAR Token secret is not passed to forked PR, only build non-forked PR
   # ---------------------------------------
   hil-hfp:
-    needs: [check-paths]
     if: |
       github.repository_owner == 'hathach' &&
-      github.event.pull_request.head.repo.fork == false &&
-      (github.event_name == 'release' || github.event_name == 'workflow_dispatch' || needs.check-paths.outputs.code_changed == 'true')
+      !(github.event_name == 'pull_request' && github.event.pull_request.head.repo.fork == true)
     runs-on: [ self-hosted, Linux, X64, hifiphile ]
     env:
       IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
@@ -348,30 +325,19 @@ jobs:
   # PR: only runs if code changed (doc-only PRs skip entirely)
   # ---------------------------------------
   membrowse:
-    needs: [check-paths, cmake]
-    if: |
-      always() && !cancelled() && (
-        github.event_name == 'push' ||
-        github.event_name == 'release' ||
-        github.event_name == 'workflow_dispatch' ||
-        (github.event_name == 'pull_request' && needs.check-paths.outputs.code_changed == 'true')
-      )
+    needs: cmake
     permissions:
       contents: read
       actions: read
     uses: ./.github/workflows/membrowse-report.yml
     with:
-      code_changed: ${{ needs.check-paths.outputs.code_changed == 'true' || github.event_name == 'release' || github.event_name == 'workflow_dispatch' }}
+      code_changed: true
     secrets: inherit
 
   membrowse-comment:
-    needs: [check-paths, membrowse]
-    # skip membrowse comment since it is kind of distracting
-    if: >
-      false &&
-      always() &&
-      github.event_name == 'pull_request' &&
-      needs.check-paths.outputs.code_changed == 'true'
+    needs: membrowse
+    # skip membrowse comment since it is too verbal
+    if: false && github.event_name == 'pull_request'
     runs-on: ubuntu-latest
     permissions:
       contents: read
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index baa8422fe..ad9a4f94d 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -238,6 +238,7 @@ function(family_add_bloaty TARGET)
     COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>
     VERBATIM)
 
+  set_property(TARGET ${TARGET}-bloaty PROPERTY FOLDER ${TARGET})
   # post build
   #  add_custom_command(TARGET ${TARGET} POST_BUILD
   #    COMMAND ${BLOATY_EXE} --csv ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_bloaty.csv
@@ -258,6 +259,8 @@ function(family_add_linkermap TARGET)
     VERBATIM
     )
 
+  set_property(TARGET ${TARGET}-linkermap PROPERTY FOLDER ${TARGET})
+
   # post build
   add_custom_command(TARGET ${TARGET} POST_BUILD
     COMMAND python ${LINKERMAP_PY} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>.map
@@ -508,6 +511,8 @@ exit"
     COMMAND ${JLINKEXE} -device ${JLINK_DEVICE} ${OPTION_LIST} -if ${JLINK_IF} -JTAGConf -1,-1 -speed auto -CommandFile $<TARGET_FILE_DIR:${BINARY_TARGET}>/${BINARY_TARGET}.jlink
     VERBATIM
     )
+
+  set_property(TARGET ${NAME_TARGET}-jlink PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -521,6 +526,8 @@ function(family_flash_stlink TARGET)
     DEPENDS ${TARGET}
     COMMAND ${STM32_PROGRAMMER_CLI} --connect port=swd --write $<TARGET_FILE:${TARGET}> --go
     )
+
+  set_property(TARGET ${TARGET}-stlink PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -534,6 +541,8 @@ function(family_flash_stflash TARGET)
     DEPENDS ${TARGET}
     COMMAND ${ST_FLASH} write $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin 0x8000000
     )
+
+  set_property(TARGET ${TARGET}-stflash PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -560,6 +569,8 @@ function(family_flash_openocd TARGET)
     COMMAND ${OPENOCD} -c "tcl_port disabled; gdb_port disabled" ${OPTION_LIST} -c "init; halt; program $<TARGET_FILE:${TARGET}>" -c reset ${OPTION_LIST2} -c exit
     VERBATIM
     )
+
+  set_property(TARGET ${TARGET}-openocd PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -621,6 +632,8 @@ function(family_flash_wlink_rs TARGET)
     DEPENDS ${TARGET}
     COMMAND ${WLINK_RS} flash $<TARGET_FILE:${TARGET}>
     )
+
+  set_property(TARGET ${TARGET}-wlink-rs PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -634,6 +647,8 @@ function(family_flash_pyocd TARGET)
     DEPENDS ${TARGET}
     COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
+
+  set_property(TARGET ${TARGET}-pyocd PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -643,6 +658,7 @@ function(family_flash_uf2 TARGET FAMILY_ID)
     DEPENDS ${TARGET}
     COMMAND python ${UF2CONV_PY} -f ${FAMILY_ID} --deploy $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.uf2
     )
+  set_property(TARGET ${TARGET}-uf2 PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -657,6 +673,8 @@ function(family_flash_teensy TARGET)
     COMMAND ${CMAKE_OBJCOPY} -Oihex $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
     COMMAND ${TEENSY_CLI} --mcu=${TEENSY_MCU} -w -s $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
     )
+
+  set_property(TARGET ${TARGET}-teensy PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -675,6 +693,8 @@ function(family_flash_nxplink TARGET)
     DEPENDS ${TARGET}
     COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
+
+  set_property(TARGET ${TARGET}-nxplink PROPERTY FOLDER ${TARGET})
 endfunction()
 
 
@@ -688,6 +708,8 @@ function(family_flash_dfu_util TARGET OPTION)
     COMMAND ${DFU_UTIL} -R -d ${DFU_UTIL_VID_PID} -a 0 -D $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
     VERBATIM
     )
+
+  set_property(TARGET ${TARGET}-dfu-util PROPERTY FOLDER ${TARGET})
 endfunction()
 
 function(family_flash_msp430flasher TARGET)
@@ -703,6 +725,8 @@ function(family_flash_msp430flasher TARGET)
     COMMAND ${CMAKE_COMMAND} -E env LD_LIBRARY_PATH=${MSP430FLASHER_PARENT_DIR}
             ${MSP430FLASHER} -w $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex -z [VCC]
     )
+
+  set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET})
 endfunction()
 
 function(family_flash_uniflash TARGET)
@@ -717,6 +741,8 @@ function(family_flash_uniflash TARGET)
     COMMAND ${DSLITE} ${UNIFLASH_OPTION} -f $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
     VERBATIM
     )
+
+  set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET})
 endfunction()
 
 #----------------------------------
-- 
cgit v1.3.1


From 4b8f476d52ab0bb518b851ba22323658fb978768 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 10 Feb 2026 19:06:31 +0700
Subject: add membrowse target to family support for enhanced memory analysis

---
 hw/bsp/family_support.cmake | 38 ++++++++++++++++++++++++++++++++++++++
 hw/bsp/rp2040/family.cmake  |  3 ++-
 2 files changed, 40 insertions(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index ad9a4f94d..335b56c72 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -267,6 +267,43 @@ function(family_add_linkermap TARGET)
     VERBATIM)
 endfunction()
 
+# Add membrowse target (installed with pip install membrowse)
+function(family_add_membrowse TARGET)
+  find_program(MEMBROWSE_EXE membrowse)
+  if (MEMBROWSE_EXE STREQUAL MEMBROWSE_EXE-NOTFOUND)
+    # force anyway, bash login shell will find it from pip install path
+    set(MEMBROWSE_EXE membrowse)
+  endif ()
+
+  set(OPTION "")
+  if (DEFINED MEMBROWSE_OPTION)
+    string(APPEND OPTION " ${MEMBROWSE_OPTION}")
+  endif ()
+
+  # For Ninja generator, extract all linker scripts from Ninja commands and pass them to membrowse.
+  if (CMAKE_GENERATOR MATCHES "Ninja")
+    set(MEMBROWSE_CMD
+      "ld_scripts=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=-Wl,--script=)[A-Za-z0-9_./-]+\\.ld' | xargs)\"; \
+${MEMBROWSE_EXE} report ${OPTION} $<TARGET_FILE:${TARGET}> \"$ld_scripts\"")
+
+    add_custom_target(${TARGET}-membrowse
+      DEPENDS ${TARGET}
+      COMMAND bash -lc "${MEMBROWSE_CMD}"
+      VERBATIM
+      )
+
+    add_custom_target(${TARGET}-membrowse-upload
+      DEPENDS ${TARGET}
+      COMMAND bash -lc "${MEMBROWSE_CMD} --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}"
+      VERBATIM
+      )
+
+    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
+    set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET})
+  endif ()
+endfunction()
+
+
 #-------------------------------------------------------------
 # Common Target Configure
 # Most families use these settings except rp2040 and espressif
@@ -380,6 +417,7 @@ function(family_configure_common TARGET RTOS)
     # Analyze size with bloaty and linkermap
     family_add_bloaty(${TARGET})
     family_add_linkermap(${TARGET})
+    family_add_membrowse(${TARGET})
   endif ()
 
   # run size after build
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index e617ab3ca..82d0034a1 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -250,9 +250,10 @@ function(family_configure_target TARGET RTOS)
   family_flash_openocd(${TARGET})
 	family_flash_jlink(${TARGET})
 
-  # Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
+	# Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
 	family_add_bloaty(${TARGET})
   family_add_linkermap(${TARGET})
+  family_add_membrowse(${TARGET})
 endfunction()
 
 
-- 
cgit v1.3.1


From 39b157d22f8a82264f07cdd31396c15b7a9c9e6d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 10 Feb 2026 23:45:24 +0700
Subject: add membrowse-upload target and use it in ci after build

---
 .github/actions/get_deps/action.yml    |  2 +
 .github/workflows/build.yml            | 92 +++++++++++++++++-----------------
 .github/workflows/build_util.yml       | 14 ++++--
 .github/workflows/membrowse-report.yml |  1 -
 hw/bsp/family_support.cmake            |  5 ++
 tools/build.py                         | 13 +++--
 6 files changed, 73 insertions(+), 54 deletions(-)

(limited to 'hw')

diff --git a/.github/actions/get_deps/action.yml b/.github/actions/get_deps/action.yml
index a84db893b..8ea36ce78 100644
--- a/.github/actions/get_deps/action.yml
+++ b/.github/actions/get_deps/action.yml
@@ -22,6 +22,8 @@ runs:
         NINJA_URL=https://github.com/ninja-build/ninja/releases/download/v1.13.1/ninja-linux.zip
         wget $NINJA_URL -O ninja-linux.zip
         unzip ninja-linux.zip -d ninja-bin
+        pip install membrowse
+        #echo >> $GITHUB_PATH "$HOME/.local/bin"
         echo >> $GITHUB_PATH "${{ github.workspace }}/ninja-bin"
       shell: bash
 
diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 352875a9d..2b0c38c4f 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -93,7 +93,9 @@ jobs:
       build-args: ${{ toJSON(fromJSON(needs.set-matrix.outputs.json)[matrix.toolchain]) }}
       build-options: '--one-first'
       upload-metrics: true
-      upload-artifacts: true
+      upload-artifacts: false
+      upload-membrowse: true
+    secrets: inherit
 
   code-metrics:
     needs: cmake
@@ -337,47 +339,47 @@ jobs:
   # Push: always runs (uses identical for doc-only to maintain commit chain)
   # PR: only runs if code changed (doc-only PRs skip entirely)
   # ---------------------------------------
-  membrowse:
-    needs: [check-paths, cmake]
-    if: |
-      always() && !cancelled() && (
-        github.event_name == 'push' ||
-        github.event_name == 'release' ||
-        github.event_name == 'workflow_dispatch' ||
-        (github.event_name == 'pull_request' && needs.check-paths.outputs.code_changed == 'true')
-      )
-    permissions:
-      contents: read
-      actions: read
-    uses: ./.github/workflows/membrowse-report.yml
-    with:
-      code_changed: ${{ needs.check-paths.outputs.code_changed == 'true' || github.event_name == 'release' || github.event_name == 'workflow_dispatch' }}
-    secrets: inherit
-
-  membrowse-comment:
-    needs: membrowse
-    # skip membrowse comment since it is too verbal
-    if: false && github.event_name == 'pull_request'
-    runs-on: ubuntu-latest
-    permissions:
-      contents: read
-      actions: read
-    steps:
-      - name: Checkout repository
-        uses: actions/checkout@v6
-
-      - name: Download report artifacts
-        id: download
-        uses: actions/download-artifact@v5
-        with:
-          pattern: membrowse-report-*
-          path: reports
-          merge-multiple: true
-        continue-on-error: true
-
-      - name: Upload Membrowse Comment Artifact
-        if: steps.download.outcome == 'success'
-        uses: actions/upload-artifact@v5
-        with:
-          name: membrowse-comment
-          path: reports/
+#  membrowse:
+#    needs: [check-paths, cmake]
+#    if: |
+#      always() && !cancelled() && (
+#        github.event_name == 'push' ||
+#        github.event_name == 'release' ||
+#        github.event_name == 'workflow_dispatch' ||
+#        (github.event_name == 'pull_request' && needs.check-paths.outputs.code_changed == 'true')
+#      )
+#    permissions:
+#      contents: read
+#      actions: read
+#    uses: ./.github/workflows/membrowse-report.yml
+#    with:
+#      code_changed: ${{ needs.check-paths.outputs.code_changed == 'true' || github.event_name == 'release' || github.event_name == 'workflow_dispatch' }}
+#    secrets: inherit
+#
+#  membrowse-comment:
+#    needs: membrowse
+#    # skip membrowse comment since it is too verbal
+#    if: false && github.event_name == 'pull_request'
+#    runs-on: ubuntu-latest
+#    permissions:
+#      contents: read
+#      actions: read
+#    steps:
+#      - name: Checkout repository
+#        uses: actions/checkout@v6
+#
+#      - name: Download report artifacts
+#        id: download
+#        uses: actions/download-artifact@v5
+#        with:
+#          pattern: membrowse-report-*
+#          path: reports
+#          merge-multiple: true
+#        continue-on-error: true
+#
+#      - name: Upload Membrowse Comment Artifact
+#        if: steps.download.outcome == 'success'
+#        uses: actions/upload-artifact@v5
+#        with:
+#          name: membrowse-comment
+#          path: reports/
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index e62c10ca1..8a3dd8f91 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -24,6 +24,10 @@ on:
         required: false
         default: false
         type: boolean
+      upload-membrowse:
+        required: false
+        default: false
+        type: boolean
       os:
         required: false
         type: string
@@ -54,15 +58,17 @@ jobs:
       - name: Build
         env:
           IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
+          MEMBROWSE_API_KEY: ${{ secrets.MEMBROWSE_API_KEY }}
+          MEMBROWSE_UPLOAD_OPTION: ${{ inputs.upload-membrowse && '--membrowse-upload' || '' }}
           TOOLCHAIN: ${{ inputs.toolchain }}
         run: |
           if [ "$TOOLCHAIN" == "esp-idf" ]; then
-            docker run --rm -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py ${{ matrix.arg }}
+            docker run --rm -e MEMBROWSE_API_KEY="$MEMBROWSE_API_KEY" -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py $MEMBROWSE_UPLOAD_OPTION ${{ matrix.arg }}
           elif [ "${{ inputs.build-system }}" == "cmake-make" ] || [ "${{ inputs.build-system }}" == "make-cmake" ]; then
-            python tools/build.py -s make ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
-            python tools/build.py -s cmake ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+            python tools/build.py -s make $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+            python tools/build.py -s cmake $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
           else
-            python tools/build.py -s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+            python tools/build.py -s ${{ inputs.build-system }} $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
           fi
         shell: bash
 
diff --git a/.github/workflows/membrowse-report.yml b/.github/workflows/membrowse-report.yml
index 0667418e6..f86b047df 100644
--- a/.github/workflows/membrowse-report.yml
+++ b/.github/workflows/membrowse-report.yml
@@ -38,7 +38,6 @@ jobs:
         uses: actions/checkout@v6
         with:
           fetch-depth: 0
-          submodules: recursive
 
       # Download artifacts when code changed (build artifacts available)
       - name: Download build artifacts
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 335b56c72..57a323c4a 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -298,6 +298,11 @@ ${MEMBROWSE_EXE} report ${OPTION} $<TARGET_FILE:${TARGET}> \"$ld_scripts\"")
       VERBATIM
       )
 
+    if (NOT TARGET examples-membrowse-upload)
+      add_custom_target(examples-membrowse-upload)
+    endif ()
+    add_dependencies(examples-membrowse-upload ${TARGET}-membrowse-upload)
+
     set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
     set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET})
   endif ()
diff --git a/tools/build.py b/tools/build.py
index d22d06a0b..bc032fb91 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -106,7 +106,7 @@ def print_build_result(board, example, status, duration):
 # -----------------------------
 # CMake
 # -----------------------------
-def cmake_board(board, build_args, build_flags_on):
+def cmake_board(board, build_args, build_flags_on, membrowse_upload):
     ret = [0, 0, 0]
     start_time = time.monotonic()
 
@@ -142,6 +142,8 @@ def cmake_board(board, build_args, build_flags_on):
         if rcmd.returncode == 0:
             ret[0] += 1
             run_cmd(["cmake", "--build", build_dir, '--target', 'tinyusb_metrics'])
+            if membrowse_upload:
+                run_cmd(["cmake", "--build", build_dir, '--target', 'examples-membrowse-upload'])
             # print(rcmd.stdout.decode("utf-8"))
         else:
             ret[1] += 1
@@ -198,13 +200,13 @@ def make_board(board, build_args):
 # -----------------------------
 # Build Family
 # -----------------------------
-def build_boards_list(boards, build_defines, build_system, build_flags_on):
+def build_boards_list(boards, build_defines, build_system, build_flags_on, membrowse_upload):
     ret = [0, 0, 0]
     for b in boards:
         r = [0, 0, 0]
         if build_system == 'cmake':
             build_args = [f'-D{d}' for d in build_defines]
-            r = cmake_board(b, build_args, build_flags_on)
+            r = cmake_board(b, build_args, build_flags_on, membrowse_upload)
         elif build_system == 'make':
             build_args = ' '.join(f'{d}' for d in build_defines)
             r = make_board(b, build_args)
@@ -273,6 +275,8 @@ def main():
     parser.add_argument('--one-first', action='store_true', default=False,
                         help='Build only the first board (alphabetical) of each specified family')
     parser.add_argument('-j', '--jobs', type=int, default=os.cpu_count(), help='Number of jobs to run in parallel')
+    parser.add_argument('--membrowse-upload', action='store_true', default=False,
+                        help='Run examples-membrowse-upload target after successful CMake build')
     parser.add_argument('-v', '--verbose', action='store_true', help='Verbose output')
     args = parser.parse_args()
 
@@ -284,6 +288,7 @@ def main():
     build_flags_on = args.build_flags_on
     one_random = args.one_random
     one_first = args.one_first
+    membrowse_upload = args.membrowse_upload
     verbose = args.verbose
     clean_build = args.clean
     parallel_jobs = args.jobs
@@ -314,7 +319,7 @@ def main():
         all_boards.extend(get_family_boards(f, one_random, one_first))
 
     # build all boards
-    result = build_boards_list(all_boards, build_defines, build_system, build_flags_on)
+    result = build_boards_list(all_boards, build_defines, build_system, build_flags_on, membrowse_upload)
 
     total_time = time.monotonic() - total_time
     print(build_separator)
-- 
cgit v1.3.1


From 2e8e33f28494307276d7a5417569461fe6584b80 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 11 Feb 2026 16:34:28 +0700
Subject: add build target argument to improve flexibility of build scripts and
 workflows membrowse-upload upload with --identical if elf file does not exist

---
 .github/workflows/build.yml      | 23 +++++++++--------
 .github/workflows/build_util.yml | 38 +++++++++++++++++++---------
 hw/bsp/family_support.cmake      | 54 ++++++++++++++++++++++++++++++++++------
 tools/build.py                   | 43 +++++++++++++-------------------
 4 files changed, 103 insertions(+), 55 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index 2b0c38c4f..412d52bb8 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -47,8 +47,6 @@ jobs:
               - '.github/workflows/ci_set_matrix.py'
 
   set-matrix:
-    needs: [ check-paths ]
-    if: needs.check-paths.outputs.code_changed == 'true'
     runs-on: ubuntu-latest
     outputs:
       json: ${{ steps.set-matrix-json.outputs.matrix }}
@@ -75,7 +73,7 @@ jobs:
   # For Make and IAR build: will be done on CircleCI only (one random per family as well)
   # ------------------------------------------------------------------------------
   cmake:
-    needs: set-matrix
+    needs: [ check-paths, set-matrix ]
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
@@ -95,10 +93,12 @@ jobs:
       upload-metrics: true
       upload-artifacts: false
       upload-membrowse: true
+      code-changed: ${{ needs.check-paths.outputs.code_changed == 'true' }}
     secrets: inherit
 
   code-metrics:
-    needs: cmake
+    needs: [ check-paths, cmake ]
+    if: needs.check-paths.outputs.code_changed == true
     runs-on: ubuntu-latest
     permissions:
       pull-requests: write
@@ -196,17 +196,18 @@ jobs:
   # ---------------------------------------
   build-os:
     needs: [ check-paths ]
-    if: needs.check-paths.outputs.code_changed == 'true'
+    if: needs.check-paths.outputs.code_changed == true
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
       matrix:
         os: [ windows-latest, macos-latest ]
+        build-system: [ 'make', 'cmake' ]
     with:
       os: ${{ matrix.os }}
-      build-system: 'cmake-make'
+      build-system: ${{ matrix.build-system }}
       toolchain: 'arm-gcc-${{ matrix.os }}'
-      build-args: '["stm32h7"]'
+      build-args: '["stm32h7rs"]'
       build-options: '--one-random'
 
   # ---------------------------------------
@@ -215,7 +216,8 @@ jobs:
   zephyr:
     needs: [ check-paths ]
     # skip zephyr build due to failed build, fix later
-    if: false && needs.check-paths.outputs.code_changed == 'true'
+    if: false
+    #if: needs.check-paths.outputs.code_changed == 'true'
     runs-on: ubuntu-latest
     steps:
       - name: Checkout TinyUSB
@@ -237,8 +239,8 @@ jobs:
   # Run on PR only (hil-tinyusb), hil-hfp only run on non-forked PR
   # ---------------------------------------
   hil-build:
-    needs: set-matrix
-    if: github.repository_owner == 'hathach'
+    needs: [ check-paths, set-matrix ]
+    if: needs.check-paths.outputs.code_changed == true && github.repository_owner == 'hathach'
     uses: ./.github/workflows/build_util.yml
     strategy:
       fail-fast: false
@@ -299,6 +301,7 @@ jobs:
   hil-hfp:
     needs: [ check-paths ]
     if: |
+      needs.check-paths.outputs.code_changed == true &&
       github.repository_owner == 'hathach' &&
       !(github.event_name == 'pull_request' && github.event.pull_request.head.repo.fork == true)
     runs-on: [ self-hosted, Linux, X64, hifiphile ]
diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index eb3c4df89..4200c11bd 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -3,6 +3,10 @@ name: Reusable build util
 on:
   workflow_call:
     inputs:
+      os:
+        required: false
+        type: string
+        default: 'ubuntu-latest'
       build-system:
         required: true
         type: string
@@ -28,10 +32,10 @@ on:
         required: false
         default: false
         type: boolean
-      os:
+      code-changed:
         required: false
-        type: string
-        default: 'ubuntu-latest'
+        default: false
+        type: boolean
 
 jobs:
   family:
@@ -58,19 +62,29 @@ jobs:
           arg: ${{ matrix.arg }}
 
       - name: Build
+        if: ${{ inputs.code-changed }}
         env:
           IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
-          MEMBROWSE_API_KEY: ${{ secrets.MEMBROWSE_API_KEY }}
-          MEMBROWSE_UPLOAD_OPTION: ${{ inputs.upload-membrowse && '--membrowse-upload' || '' }}
-          TOOLCHAIN: ${{ inputs.toolchain }}
         run: |
-          if [ "$TOOLCHAIN" == "esp-idf" ]; then
-            docker run --rm -e MEMBROWSE_API_KEY="$MEMBROWSE_API_KEY" -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py $MEMBROWSE_UPLOAD_OPTION ${{ matrix.arg }}
-          elif [ "${{ inputs.build-system }}" == "cmake-make" ] || [ "${{ inputs.build-system }}" == "make-cmake" ]; then
-            python tools/build.py -s make $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
-            python tools/build.py -s cmake $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+          if [ "${{ inputs.toolchain }}" == "esp-idf" ]; then
+            docker run --rm -e MEMBROWSE_API_KEY="$MEMBROWSE_API_KEY" -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py -T all ${{ matrix.arg }}
           else
-            python tools/build.py -s ${{ inputs.build-system }} $MEMBROWSE_UPLOAD_OPTION ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} ${{ matrix.arg }}
+            BUILD_PY_ARGS="-s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }}"
+            python tools/build.py $BUILD_PY_ARGS --target all ${{ matrix.arg }}
+
+            if [ "${{ inputs.upload-metrics }}" = "true" ]; then
+              python tools/build.py $BUILD_PY_ARGS --target tinyusb_metrics ${{ matrix.arg }}
+            fi
+          fi
+        shell: bash
+
+      - name: Membrowse Upload
+        if: inputs.toolchain != 'esp-idf'
+        env:
+          MEMBROWSE_API_KEY: ${{ secrets.MEMBROWSE_API_KEY }}
+        run: |
+          if  [ "${{ inputs.upload-membrowse }}" = "true" ]; then
+            python tools/build.py $BUILD_PY_ARGS --target examples-membrowse-upload ${{ matrix.arg }}
           fi
         shell: bash
 
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 57a323c4a..fdf7b78ed 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -280,21 +280,62 @@ function(family_add_membrowse TARGET)
     string(APPEND OPTION " ${MEMBROWSE_OPTION}")
   endif ()
 
-  # For Ninja generator, extract all linker scripts from Ninja commands and pass them to membrowse.
+  # For Ninja generator, extract all linker scripts from Ninja commands (with INCLUDE) and pass them to membrowse.
   if (CMAKE_GENERATOR MATCHES "Ninja")
+    set(TARGET_ELF_PATH "$<TARGET_FILE_DIR:${TARGET}>/$<TARGET_FILE_NAME:${TARGET}>")
+    set(MEMBROWSE_LD_SCRIPTS_CMD
+      "ld_scripts=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?:-Wl,--script=|-T\\s*)\\K[A-Za-z0-9_./-]+\\.ld' | xargs)\"; \
+all_ld_scripts=\"\"; \
+pending_ld_scripts=\"$ld_scripts\"; \
+while [ -n \"$pending_ld_scripts\" ]; do \
+  next_pending=\"\"; \
+  for script in $pending_ld_scripts; do \
+    case \" $all_ld_scripts \" in *\" $script \"*) continue ;; esac; \
+    all_ld_scripts=\"$all_ld_scripts $script\"; \
+    script_dir=$(dirname \"$script\"); \
+    include_scripts=$(grep -hoP '^\\s*INCLUDE\\s+[<\"]?\\K[^\">[:space:]]+\\.ld' \"$script\" 2>/dev/null | xargs); \
+    for include_script in $include_scripts; do \
+      resolved_script=\"\"; \
+      if [ -f \"$include_script\" ]; then \
+        resolved_script=\"$include_script\"; \
+      elif [ -f \"$script_dir/$include_script\" ]; then \
+        resolved_script=\"$script_dir/$include_script\"; \
+      fi; \
+      if [ -n \"$resolved_script\" ]; then \
+        case \" $all_ld_scripts $next_pending \" in *\" $resolved_script \"*) ;; *) next_pending=\"$next_pending $resolved_script\" ;; esac; \
+      fi; \
+    done; \
+  done; \
+  pending_ld_scripts=\"$(echo \"$next_pending\" | xargs)\"; \
+done; \
+ld_scripts=\"$(echo \"$all_ld_scripts\" | xargs)\"")
+
     set(MEMBROWSE_CMD
-      "ld_scripts=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=-Wl,--script=)[A-Za-z0-9_./-]+\\.ld' | xargs)\"; \
-${MEMBROWSE_EXE} report ${OPTION} $<TARGET_FILE:${TARGET}> \"$ld_scripts\"")
+      "if [ -f \"${TARGET_ELF_PATH}\" ]; then \
+  ${MEMBROWSE_LD_SCRIPTS_CMD}; \
+  echo ld_scripts=\"$ld_scripts\"; \
+  if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
+    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+  else \
+    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\"; \
+  fi; \
+else \
+  if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
+    ${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+  else \
+    ${MEMBROWSE_EXE} report ${OPTION} --identical; \
+  fi; \
+fi")
 
     add_custom_target(${TARGET}-membrowse
       DEPENDS ${TARGET}
-      COMMAND bash -lc "${MEMBROWSE_CMD}"
+      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=0 bash -lc "${MEMBROWSE_CMD}"
       VERBATIM
       )
+    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
 
     add_custom_target(${TARGET}-membrowse-upload
-      DEPENDS ${TARGET}
-      COMMAND bash -lc "${MEMBROWSE_CMD} --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}"
+      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=1 bash -lc "${MEMBROWSE_CMD}"
       VERBATIM
       )
 
@@ -303,7 +344,6 @@ ${MEMBROWSE_EXE} report ${OPTION} $<TARGET_FILE:${TARGET}> \"$ld_scripts\"")
     endif ()
     add_dependencies(examples-membrowse-upload ${TARGET}-membrowse-upload)
 
-    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
     set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET})
   endif ()
 endfunction()
diff --git a/tools/build.py b/tools/build.py
index bc032fb91..d26028c51 100755
--- a/tools/build.py
+++ b/tools/build.py
@@ -98,15 +98,15 @@ def get_examples(family):
     return all_examples
 
 
-def print_build_result(board, example, status, duration):
+def print_build_result(board, build_target, status, duration):
     if isinstance(duration, (int, float)):
         duration = "{:.2f}s".format(duration)
-    print(build_format.format(board, example, build_status[status], duration))
+    print(build_format.format(board, build_target, build_status[status], duration))
 
 # -----------------------------
 # CMake
 # -----------------------------
-def cmake_board(board, build_args, build_flags_on, membrowse_upload):
+def cmake_board(board, build_args, build_flags_on, build_target):
     ret = [0, 0, 0]
     start_time = time.monotonic()
 
@@ -137,26 +137,18 @@ def cmake_board(board, build_args, build_flags_on, membrowse_upload):
         if rcmd.returncode == 0:
             if clean_build:
                 run_cmd(["cmake", "--build", build_dir, '--target', 'clean'])
-            cmd = ["cmake", "--build", build_dir, '--parallel', str(parallel_jobs)]
+            cmd = ["cmake", "--build", build_dir, '--target', build_target, '--parallel', str(parallel_jobs)]
             rcmd = run_cmd(cmd)
-        if rcmd.returncode == 0:
-            ret[0] += 1
-            run_cmd(["cmake", "--build", build_dir, '--target', 'tinyusb_metrics'])
-            if membrowse_upload:
-                run_cmd(["cmake", "--build", build_dir, '--target', 'examples-membrowse-upload'])
-            # print(rcmd.stdout.decode("utf-8"))
-        else:
-            ret[1] += 1
+        ret[0 if rcmd.returncode == 0 else 1] += 1
 
-    example = 'all'
-    print_build_result(board, example, 0 if ret[1] == 0 else 1, time.monotonic() - start_time)
+    print_build_result(board, build_target, 0 if ret[1] == 0 else 1, time.monotonic() - start_time)
     return ret
 
 
 # -----------------------------
 # Make
 # -----------------------------
-def make_one_example(example, board, make_option):
+def make_one_example(example, board, make_option, build_target):
     # Check if board is skipped
     if build_utils.skip_example(example, board):
         print_build_result(board, example, 2, '-')
@@ -168,7 +160,7 @@ def make_one_example(example, board, make_option):
             make_args += shlex.split(make_option)
         if clean_build:
             run_cmd(make_args + ["clean"])
-        build_result = run_cmd(make_args + ['all'])
+        build_result = run_cmd(make_args + [build_target])
         r = 0 if build_result.returncode == 0 else 1
         print_build_result(board, example, r, time.monotonic() - start_time)
 
@@ -177,7 +169,7 @@ def make_one_example(example, board, make_option):
     return ret
 
 
-def make_board(board, build_args):
+def make_board(board, build_args, build_target):
     print(build_separator)
     family = find_family(board);
     all_examples = get_examples(family)
@@ -188,7 +180,7 @@ def make_board(board, build_args):
         final_status = 2
     else:
         with Pool(processes=os.cpu_count()) as pool:
-            pool_args = list((map(lambda e, b=board, o=f"{build_args}": [e, b, o], all_examples)))
+            pool_args = list((map(lambda e, b=board, o=f"{build_args}", t=build_target: [e, b, o, t], all_examples)))
             r = pool.starmap(make_one_example, pool_args)
             # sum all element of same index (column sum)
             ret = list(map(sum, list(zip(*r))))
@@ -200,16 +192,16 @@ def make_board(board, build_args):
 # -----------------------------
 # Build Family
 # -----------------------------
-def build_boards_list(boards, build_defines, build_system, build_flags_on, membrowse_upload):
+def build_boards_list(boards, build_defines, build_system, build_flags_on, build_target):
     ret = [0, 0, 0]
     for b in boards:
         r = [0, 0, 0]
         if build_system == 'cmake':
             build_args = [f'-D{d}' for d in build_defines]
-            r = cmake_board(b, build_args, build_flags_on, membrowse_upload)
+            r = cmake_board(b, build_args, build_flags_on, build_target)
         elif build_system == 'make':
             build_args = ' '.join(f'{d}' for d in build_defines)
-            r = make_board(b, build_args)
+            r = make_board(b, build_args, build_target)
         ret[0] += r[0]
         ret[1] += r[1]
         ret[2] += r[2]
@@ -275,8 +267,7 @@ def main():
     parser.add_argument('--one-first', action='store_true', default=False,
                         help='Build only the first board (alphabetical) of each specified family')
     parser.add_argument('-j', '--jobs', type=int, default=os.cpu_count(), help='Number of jobs to run in parallel')
-    parser.add_argument('--membrowse-upload', action='store_true', default=False,
-                        help='Run examples-membrowse-upload target after successful CMake build')
+    parser.add_argument('-T', '--target', default='all', help='Build target to use, default is all')
     parser.add_argument('-v', '--verbose', action='store_true', help='Verbose output')
     args = parser.parse_args()
 
@@ -288,7 +279,7 @@ def main():
     build_flags_on = args.build_flags_on
     one_random = args.one_random
     one_first = args.one_first
-    membrowse_upload = args.membrowse_upload
+    build_target = args.target
     verbose = args.verbose
     clean_build = args.clean
     parallel_jobs = args.jobs
@@ -300,7 +291,7 @@ def main():
         return 1
 
     print(build_separator)
-    print(build_format.format('Board', 'Example', '\033[39mResult\033[0m', 'Time'))
+    print(build_format.format('Board', 'Target', '\033[39mResult\033[0m', 'Time'))
     total_time = time.monotonic()
 
     # get all families
@@ -319,7 +310,7 @@ def main():
         all_boards.extend(get_family_boards(f, one_random, one_first))
 
     # build all boards
-    result = build_boards_list(all_boards, build_defines, build_system, build_flags_on, membrowse_upload)
+    result = build_boards_list(all_boards, build_defines, build_system, build_flags_on, build_target)
 
     total_time = time.monotonic() - total_time
     print(build_separator)
-- 
cgit v1.3.1


From c69e2e0a2a6a0786e70c417e2e61c834a524aabb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 11 Feb 2026 16:51:48 +0700
Subject: update membrowse target to family/board/target

---
 hw/bsp/family_support.cmake | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index fdf7b78ed..9c3db4002 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -315,13 +315,13 @@ ld_scripts=\"$(echo \"$all_ld_scripts\" | xargs)\"")
   ${MEMBROWSE_LD_SCRIPTS_CMD}; \
   echo ld_scripts=\"$ld_scripts\"; \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
   else \
     ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\"; \
   fi; \
 else \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    ${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${BOARD}-${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+    ${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
   else \
     ${MEMBROWSE_EXE} report ${OPTION} --identical; \
   fi; \
-- 
cgit v1.3.1


From 9bba4373bf74181f75a8fdf93c8574ca3d4b4f43 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 11 Feb 2026 17:18:26 +0700
Subject: parse and pass linker symbol to membrowse report

---
 hw/bsp/family_support.cmake | 13 +++++++++++--
 1 file changed, 11 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 9c3db4002..80ebb7bef 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -309,15 +309,24 @@ while [ -n \"$pending_ld_scripts\" ]; do \
   pending_ld_scripts=\"$(echo \"$next_pending\" | xargs)\"; \
 done; \
 ld_scripts=\"$(echo \"$all_ld_scripts\" | xargs)\"")
+    set(MEMBROWSE_LD_DEFS_CMD
+      "ld_symbols=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=-Wl,--defsym=)[^[:space:]]+' | xargs)\"; \
+ld_defs=\"\"; \
+for symbol in $ld_symbols; do \
+  ld_defs=\"$ld_defs --def $symbol\"; \
+done; \
+ld_defs=\"$(echo \"$ld_defs\" | xargs)\"")
 
     set(MEMBROWSE_CMD
       "if [ -f \"${TARGET_ELF_PATH}\" ]; then \
   ${MEMBROWSE_LD_SCRIPTS_CMD}; \
+  ${MEMBROWSE_LD_DEFS_CMD}; \
   echo ld_scripts=\"$ld_scripts\"; \
+  echo ld_defs=\"$ld_defs\"; \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" $ld_defs --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
   else \
-    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\"; \
+    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" $ld_defs; \
   fi; \
 else \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-- 
cgit v1.3.1


From cec0ee53f60ed28d7c324f40cbebd0b677d94eb1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 11 Feb 2026 23:06:38 +0700
Subject: make membrowse command more visible

---
 .github/workflows/build_util.yml |  1 +
 hw/bsp/family_support.cmake      | 20 +++++++++-----------
 2 files changed, 10 insertions(+), 11 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 1a119b132..595129443 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -83,6 +83,7 @@ jobs:
         env:
           MEMBROWSE_API_KEY: ${{ secrets.MEMBROWSE_API_KEY }}
         run: |
+          # if code-changed is false --> there is no elf -> membrowse target upload with --indetical flag
           BUILD_PY_ARGS="-s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }}"
           python tools/build.py $BUILD_PY_ARGS --target examples-membrowse-upload -j 1 ${{ matrix.arg }}
         shell: bash
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 80ebb7bef..0130fb656 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -316,35 +316,33 @@ for symbol in $ld_symbols; do \
   ld_defs=\"$ld_defs --def $symbol\"; \
 done; \
 ld_defs=\"$(echo \"$ld_defs\" | xargs)\"")
-
-    set(MEMBROWSE_CMD
+    set(MEMBROWSE_PREPARE_CMD
       "if [ -f \"${TARGET_ELF_PATH}\" ]; then \
   ${MEMBROWSE_LD_SCRIPTS_CMD}; \
   ${MEMBROWSE_LD_DEFS_CMD}; \
-  echo ld_scripts=\"$ld_scripts\"; \
-  echo ld_defs=\"$ld_defs\"; \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" $ld_defs --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
   else \
-    ${MEMBROWSE_EXE} report ${OPTION} \"${TARGET_ELF_PATH}\" \"$ld_scripts\" $ld_defs; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs\"; \
   fi; \
 else \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    ${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
   else \
-    ${MEMBROWSE_EXE} report ${OPTION} --identical; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} --identical\"; \
   fi; \
-fi")
+fi; \
+echo \"$MEMBROWSE_CMD\"")
 
     add_custom_target(${TARGET}-membrowse
       DEPENDS ${TARGET}
-      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=0 bash -lc "${MEMBROWSE_CMD}"
+      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=0 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
       VERBATIM
       )
     set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
 
     add_custom_target(${TARGET}-membrowse-upload
-      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=1 bash -lc "${MEMBROWSE_CMD}"
+      COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=1 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
       VERBATIM
       )
 
-- 
cgit v1.3.1


From 05cdaf0ad09cc6ed2ecc54767f9873eef3bfcdfd Mon Sep 17 00:00:00 2001
From: Michael Rogov Papernov <michael@membrowse.com>
Date: Thu, 12 Feb 2026 14:54:45 +0000
Subject: fix ld symbols extraction

---
 hw/bsp/family_support.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 0130fb656..f97518faf 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -310,7 +310,7 @@ while [ -n \"$pending_ld_scripts\" ]; do \
 done; \
 ld_scripts=\"$(echo \"$all_ld_scripts\" | xargs)\"")
     set(MEMBROWSE_LD_DEFS_CMD
-      "ld_symbols=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=-Wl,--defsym=)[^[:space:]]+' | xargs)\"; \
+      "ld_symbols=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=--defsym=)[^[:space:]]+' | xargs)\"; \
 ld_defs=\"\"; \
 for symbol in $ld_symbols; do \
   ld_defs=\"$ld_defs --def $symbol\"; \
-- 
cgit v1.3.1


From a6d4c6d022a3dc597c24f2e312993046345683ad Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 12 Feb 2026 23:42:34 +0700
Subject: change membrowse target to board/target and remove redundant
 continue-on-error directive fix defsym can be followed by = or ,

---
 .github/workflows/build_util.yml | 1 -
 hw/bsp/family_support.cmake      | 6 +++---
 2 files changed, 3 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 6863ebdf2..d03c9af81 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -79,7 +79,6 @@ jobs:
 
       - name: Membrowse Upload
         if: inputs.toolchain != 'esp-idf' && inputs.upload-membrowse == true
-        continue-on-error: true # have server busy issue with membrowse
         env:
           MEMBROWSE_API_KEY: ${{ secrets.MEMBROWSE_API_KEY }}
         run: |
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index f97518faf..699afda92 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -310,7 +310,7 @@ while [ -n \"$pending_ld_scripts\" ]; do \
 done; \
 ld_scripts=\"$(echo \"$all_ld_scripts\" | xargs)\"")
     set(MEMBROWSE_LD_DEFS_CMD
-      "ld_symbols=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=--defsym=)[^[:space:]]+' | xargs)\"; \
+      "ld_symbols=\"$(${CMAKE_MAKE_PROGRAM} -C ${CMAKE_BINARY_DIR} -t commands ${TARGET} | grep -oP '(?<=--defsym[=,])[^[:space:]]+' | xargs)\"; \
 ld_defs=\"\"; \
 for symbol in $ld_symbols; do \
   ld_defs=\"$ld_defs --def $symbol\"; \
@@ -321,13 +321,13 @@ ld_defs=\"$(echo \"$ld_defs\" | xargs)\"")
   ${MEMBROWSE_LD_SCRIPTS_CMD}; \
   ${MEMBROWSE_LD_DEFS_CMD}; \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs --upload --github --target-name ${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
   else \
     MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs\"; \
   fi; \
 else \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${FAMILY}/${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} --identical --upload --github --target-name ${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
   else \
     MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} --identical\"; \
   fi; \
-- 
cgit v1.3.1


From ace6d295a9f672dcf21cac75ca92c7cc1f182151 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Feb 2026 00:27:05 +0700
Subject: fix stm32u545 makefile missing hcd

---
 hw/bsp/stm32u5/family.mk | 1 +
 1 file changed, 1 insertion(+)

(limited to 'hw')

diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 47aed10a9..0acffa67b 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -40,6 +40,7 @@ SRC_C += \
 ifneq ($(filter stm32u545xx stm32u535xx,$(MCU_VARIANT)),)
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
 	src/portable/st/stm32_fsdev/fsdev_common.c
 else
 SRC_C += \
-- 
cgit v1.3.1


From 8f14cf4bfa061690084c7c32b3f8b70301f5e0ff Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Feb 2026 19:45:09 +0700
Subject: add CFG_TUD_VBUS_SENSE, that could allow to skip tud_configure() for
 fixed vbus sensing simplify dwc2_stm32_gccfg_cfg() using guid value

---
 .../stm32h7rs/boards/stm32h7s3nucleo/board.cmake   |   2 +
 hw/bsp/stm32h7rs/family.cmake                      |   2 +-
 src/device/usbd.h                                  |   2 +
 src/portable/synopsys/dwc2/dcd_dwc2.c              |  15 ++-
 src/portable/synopsys/dwc2/dwc2_info.md            | 116 ++++++++--------
 src/portable/synopsys/dwc2/dwc2_info.py            |  10 +-
 src/portable/synopsys/dwc2/dwc2_stm32.h            | 146 ++++++---------------
 src/portable/synopsys/dwc2/dwc2_type.h             |   9 +-
 src/tusb_option.h                                  |  11 +-
 9 files changed, 131 insertions(+), 182 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
index 7b3456585..189c175dd 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.cmake
@@ -2,6 +2,8 @@ set(MCU_VARIANT stm32h7s3xx)
 set(JLINK_DEVICE stm32h7s3l8)
 
 set(LD_FILE_Clang ${LD_FILE_GNU})
+set(RHPORT_DEVICE 1)
+set(RHPORT_HOST 1)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32h7rs/family.cmake b/hw/bsp/stm32h7rs/family.cmake
index 1fd1cb057..3b9dbf5cf 100644
--- a/hw/bsp/stm32h7rs/family.cmake
+++ b/hw/bsp/stm32h7rs/family.cmake
@@ -24,7 +24,7 @@ if (NOT DEFINED RHPORT_DEVICE)
   set(RHPORT_DEVICE 1)
 endif ()
 if (NOT DEFINED RHPORT_HOST)
-  set(RHPORT_HOST 1)
+  set(RHPORT_HOST 0)
 endif ()
 
 if (NOT DEFINED RHPORT_SPEED)
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 7d7604c81..eaf07b81e 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -44,6 +44,8 @@ typedef struct {
   bool vbus_sensing; // Vbus pin is used for device connection detection, mandatory for tud_umount_cb()
 } tud_configure_dwc2_t;
 
+#define TUD_CONFIGURE_DWC2_DEFAULT { .bm_double_buffered = 0, .vbus_sensing = CFG_TUD_VBUS_SENSE }
+
 typedef union {
   tud_configure_dwc2_t dwc2;
 } tud_configure_param_t;
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 36cb763aa..a6a598dbf 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -77,10 +77,7 @@ CFG_TUD_MEM_SECTION static struct {
   TUD_EPBUF_DEF(setup_packet, 8);
 } _dcd_usbbuf;
 
-static tud_configure_dwc2_t _tud_cfg = {
-  .bm_double_buffered = 0,
-  .vbus_sensing = false
-};
+static tud_configure_dwc2_t _tud_cfg = TUD_CONFIGURE_DWC2_DEFAULT;
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) {
   #if TU_CHECK_MCU(OPT_MCU_GD32VF103)
@@ -473,10 +470,14 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   // Force device mode
   dwc2->gusbcfg = (dwc2->gusbcfg & ~GUSBCFG_FHMOD) | GUSBCFG_FDMOD;
 
-  // Clear A override, force B Valid if Vbus sensing is not used
-  dwc2->gotgctl = (dwc2->gotgctl & ~GOTGCTL_AVALOEN) | (_tud_cfg.vbus_sensing ? 0 : GOTGCTL_BVALOEN | GOTGCTL_BVALOVAL);
+  // OTG Ctrl
+  uint32_t gotgctl = dwc2->gotgctl & ~GOTGCTL_AVALOEN; // Clear A-override
+  if (!_tud_cfg.vbus_sensing) {
+    gotgctl |= GOTGCTL_BVALOEN | GOTGCTL_BVALOVAL;     // force B Valid if not sensing VBus
+  }
+  dwc2->gotgctl = gotgctl;
 
-#ifdef TUP_USBIP_DWC2_STM32
+  #ifdef TUP_USBIP_DWC2_STM32
   dwc2_stm32_gccfg_cfg(dwc2, _tud_cfg.vbus_sensing, false);
 #endif
 
diff --git a/src/portable/synopsys/dwc2/dwc2_info.md b/src/portable/synopsys/dwc2/dwc2_info.md
index f655e4dba..f83007b8c 100644
--- a/src/portable/synopsys/dwc2/dwc2_info.md
+++ b/src/portable/synopsys/dwc2/dwc2_info.md
@@ -1,58 +1,58 @@
-|                            | AT32 F405 FS   | AT32 F405 HS   | AT32 F415   | BCM2711 (Pi4)   | EFM32GG      | ESP32-S2/S3   | ESP32-P4     | nRF54        | ST F207/F407/411/429 FS   | ST F407/429 HS   | ST F412/76x FS   | ST F723/L4P5 FS   | ST F723 HS   | ST F76x HS   | ST H743/H750   | ST L476 FS   | ST U5A5/H7RS/N6 HS   | XMC4500      | GD32VF103   |
-|:---------------------------|:---------------|:---------------|:------------|:----------------|:-------------|:--------------|:-------------|:-------------|:--------------------------|:-----------------|:-----------------|:------------------|:-------------|:-------------|:---------------|:-------------|:---------------------|:-------------|:------------|
-| GUID                       | 0x00002000     | 0x00000000     | 0x00001000  | 0x2708A000      | 0x00000000   | 0x00000000    | 0x00000000   | 0x00000000   | 0x00001200                | 0x00001100       | 0x00002000       | 0x00003000        | 0x00003100   | 0x00002100   | 0x00002300     | 0x00002000   | 0x00005000           | 0x00AEC000   | 0x00001000  |
-| GSNPSID                    | 0x4F54400A     | 0x4F54400A     | 0x4F54400A  | 0x4F54280A      | 0x4F54330A   | 0x4F54400A    | 0x4F54400A   | 0x4F54430A   | 0x4F54281A                | 0x4F54281A       | 0x4F54320A       | 0x4F54330A        | 0x4F54330A   | 0x4F54320A   | 0x4F54330A     | 0x4F54310A   | 0x4F54411A           | 0x4F54292A   | 0x00000000  |
-| - specs version            | 4.00a          | 4.00a          | 4.00a       | 2.80a           | 3.30a        | 4.00a         | 4.00a        | 4.30a        | 2.81a                     | 2.81a            | 3.20a            | 3.30a             | 3.30a        | 3.20a        | 3.30a          | 3.10a        | 4.11a                | 2.92a        | 0.00W       |
-| GHWCFG1                    | 0x00000000     | 0x00000000     | 0x00000000  | 0x00000000      | 0x00000000   | 0x00000000    | 0x00000000   | 0xAA555000   | 0x00000000                | 0x00000000       | 0x00000000       | 0x00000000        | 0x00000000   | 0x00000000   | 0x00000000     | 0x00000000   | 0x00000000           | 0x00000000   | 0x00000000  |
-| GHWCFG2                    | 0x228FDD00     | 0x229FDDD0     | 0x228DCD00  | 0x228DDD50      | 0x228F5910   | 0x224DD930    | 0x215FFFD0   | 0x228BFC72   | 0x229DCD20                | 0x229ED590       | 0x229ED520       | 0x229ED520        | 0x229FE1D0   | 0x229FE190   | 0x229FE190     | 0x229ED520   | 0x228FE052           | 0x228F5930   | 0x00000000  |
-| - op_mode                  | HNP SRP        | HNP SRP        | HNP SRP     | HNP SRP         | HNP SRP      | HNP SRP       | HNP SRP      | noHNP noSRP  | HNP SRP                   | HNP SRP          | HNP SRP          | HNP SRP           | HNP SRP      | HNP SRP      | HNP SRP        | HNP SRP      | noHNP noSRP          | HNP SRP      | HNP SRP     |
-| - arch                     | Slave only     | DMA internal   | Slave only  | DMA internal    | DMA internal | DMA internal  | DMA internal | DMA internal | Slave only                | DMA internal     | Slave only       | Slave only        | DMA internal | DMA internal | DMA internal   | Slave only   | DMA internal         | DMA internal | Slave only  |
-| - single_point             | hub            | hub            | hub         | hub             | hub          | n/a           | hub          | n/a          | n/a                       | hub              | n/a              | n/a               | hub          | hub          | hub            | n/a          | hub                  | n/a          | hub         |
-| - hs_phy_type              | n/a            | UTMI+/ULPI     | n/a         | UTMI+           | n/a          | n/a           | UTMI+/ULPI   | UTMI+        | n/a                       | ULPI             | n/a              | n/a               | UTMI+/ULPI   | ULPI         | ULPI           | n/a          | UTMI+                | n/a          | n/a         |
-| - fs_phy_type              | Dedicated      | Dedicated      | Dedicated   | Dedicated       | Dedicated    | Dedicated     | Shared ULPI  | n/a          | Dedicated                 | Dedicated        | Dedicated        | Dedicated         | Dedicated    | Dedicated    | Dedicated      | Dedicated    | n/a                  | Dedicated    | n/a         |
-| - num_dev_ep               | 7              | 7              | 3           | 7               | 6            | 6             | 15           | 15           | 3                         | 5                | 5                | 5                 | 8            | 8            | 8              | 5            | 8                    | 6            | 0           |
-| - num_host_ch              | 15             | 15             | 7           | 7               | 13           | 7             | 15           | 15           | 7                         | 11               | 11               | 11                | 15           | 15           | 15             | 11           | 15                   | 13           | 0           |
-| - period_channel_support   | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - enable_dynamic_fifo      | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 1            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - mul_proc_intrpt          | 0              | 1              | 0           | 0               | 0            | 0             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 0            | 0           |
-| - reserved21               | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - nptx_q_depth             | 8              | 8              | 8           | 8               | 8            | 4             | 4            | 8            | 8                         | 8                | 8                | 8                 | 8            | 8            | 8              | 8            | 8                    | 8            | 2           |
-| - ptx_q_depth              | 8              | 8              | 8           | 8               | 8            | 8             | 4            | 8            | 8                         | 8                | 8                | 8                 | 8            | 8            | 8              | 8            | 8                    | 8            | 2           |
-| - token_q_depth            | 8              | 8              | 8           | 8               | 8            | 8             | 8            | 8            | 8                         | 8                | 8                | 8                 | 8            | 8            | 8              | 8            | 8                    | 8            | 0           |
-| - otg_enable_ic_usb        | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| GHWCFG3                    | 0x020004E8     | 0x03F006E8     | 0x020004E8  | 0x0FF000E8      | 0x01F204E8   | 0x00C804B5    | 0x03805EB5   | 0x0BEAC0E8   | 0x020001E8                | 0x03F403E8       | 0x0200D1E8       | 0x0200D1E8        | 0x03EED2E8   | 0x03EED2E8   | 0x03B8D2E8     | 0x0200D1E8   | 0x03B882E8           | 0x027A01E5   | 0x00000000  |
-| - xfer_size_width          | 8              | 8              | 8           | 8               | 8            | 5             | 5            | 8            | 8                         | 8                | 8                | 8                 | 8            | 8            | 8              | 8            | 8                    | 5            | 0           |
-| - packet_size_width        | 6              | 6              | 6           | 6               | 6            | 3             | 3            | 6            | 6                         | 6                | 6                | 6                 | 6            | 6            | 6              | 6            | 6                    | 6            | 0           |
-| - otg_enable               | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 1            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - i2c_enable               | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 1                         | 1                | 1                | 1                 | 0            | 0            | 0              | 1            | 0                    | 1            | 0           |
-| - vendor_ctrl_itf          | 0              | 1              | 0           | 0               | 0            | 0             | 1            | 0            | 0                         | 1                | 0                | 0                 | 1            | 1            | 1              | 0            | 1                    | 0            | 0           |
-| - optional_feature_removed | 1              | 1              | 1           | 0               | 1            | 1             | 1            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - synch_reset              | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - otg_adp_support          | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                         | 0                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 0            | 0           |
-| - otg_enable_hsic          | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - battery_charger_support  | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 1            | 0                         | 0                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 0            | 0           |
-| - lpm_mode                 | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                         | 0                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 0            | 0           |
-| - dfifo_depth              | 512            | 1008           | 512         | 4080            | 498          | 200           | 896          | 3050         | 512                       | 1012             | 512              | 512               | 1006         | 1006         | 952            | 512          | 952                  | 634          | 0           |
-| GHWCFG4                    | 0x1FF0A020     | 0x1FF0A020     | 0x0000000F  | 0x1FF00020      | 0x1BF08030   | 0xD3F0A030    | 0xDFF1A030   | 0x1E10AA60   | 0x0FF08030                | 0x17F00030       | 0x17F08030       | 0x17F08030        | 0x23F00030   | 0x23F00030   | 0xE3F00030     | 0x17F08030   | 0xE2103E30           | 0xDBF08030   | 0x00000000  |
-| - num_dev_period_in_ep     | 0              | 0              | 15          | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - partial_powerdown        | 0              | 0              | 0           | 0               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - ahb_freq_min             | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - hibernation              | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - extended_hibernation     | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - reserved8                | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - enhanced_lpm_support1    | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 1                    | 0            | 0           |
-| - service_interval_flow    | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 1                    | 0            | 0           |
-| - ipg_isoc_support         | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 1                    | 0            | 0           |
-| - acg_support              | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 1                    | 0            | 0           |
-| - enhanced_lpm_support     | 1              | 1              | 0           | 0               | 0            | 1             | 1            | 1            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 1                    | 0            | 0           |
-| - phy_data_width           | 8/16 bit       | 8/16 bit       | 8 bit       | 8 bit           | 8/16 bit     | 8/16 bit      | 8/16 bit     | 8/16 bit     | 8/16 bit                  | 8 bit            | 8/16 bit         | 8/16 bit          | 8 bit        | 8 bit        | 8 bit          | 8/16 bit     | 8 bit                | 8/16 bit     | 8 bit       |
-| - ctrl_ep_num              | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 0              | 0            | 0                    | 0            | 0           |
-| - iddg_filter              | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - vbus_valid_filter        | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 1            | 0           |
-| - a_valid_filter           | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 1            | 0           |
-| - b_valid_filter           | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 1            | 0           |
-| - session_end_filter       | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 0                    | 1            | 0           |
-| - dedicated_fifos          | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                         | 1                | 1                | 1                 | 1            | 1            | 1              | 1            | 1                    | 1            | 0           |
-| - num_dev_in_eps           | 7              | 7              | 0           | 7               | 6            | 4             | 7            | 7            | 3                         | 5                | 5                | 5                 | 8            | 8            | 8              | 5            | 8                    | 6            | 0           |
-| - dma_desc_enable          | 0              | 0              | 0           | 0               | 0            | 1             | 1            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 1              | 0            | 1                    | 1            | 0           |
-| - dma_desc_dynamic         | 0              | 0              | 0           | 0               | 0            | 1             | 1            | 0            | 0                         | 0                | 0                | 0                 | 0            | 0            | 1              | 0            | 1                    | 1            | 0           |
+|                            | AT32 F405 FS   | AT32 F405 HS   | AT32 F415   | BCM2711 (Pi4)   | EFM32GG      | ESP32-S2/S3   | ESP32-P4     | nRF54        | ST F407/429 HS   | ST F207/F407/411/429 FS   | ST L476 FS   | ST F412/76x FS   | ST F76x HS   | ST H743/H750   | ST F723/L4P5 FS   | ST F723 HS   | ST H7RS FS   | ST U5A5/H7RS/N6 HS   | XMC4500      | GD32VF103   |
+|:---------------------------|:---------------|:---------------|:------------|:----------------|:-------------|:--------------|:-------------|:-------------|:-----------------|:--------------------------|:-------------|:-----------------|:-------------|:---------------|:------------------|:-------------|:-------------|:---------------------|:-------------|:------------|
+| GUID                       | 0x00002000     | 0x00000000     | 0x00001000  | 0x2708A000      | 0x00000000   | 0x00000000    | 0x00000000   | 0x00000000   | 0x00001100       | 0x00001200                | 0x00002000   | 0x00002000       | 0x00002100   | 0x00002300     | 0x00003000        | 0x00003100   | 0x00004000   | 0x00005000           | 0x00AEC000   | 0x00001000  |
+| GSNPSID                    | 0x4F54400A     | 0x4F54400A     | 0x4F54400A  | 0x4F54280A      | 0x4F54330A   | 0x4F54400A    | 0x4F54400A   | 0x4F54430A   | 0x4F54281A       | 0x4F54281A                | 0x4F54310A   | 0x4F54320A       | 0x4F54320A   | 0x4F54330A     | 0x4F54330A        | 0x4F54330A   | 0x4F54411A   | 0x4F54411A           | 0x4F54292A   | 0x00000000  |
+| - specs version            | 4.00a          | 4.00a          | 4.00a       | 2.80a           | 3.30a        | 4.00a         | 4.00a        | 4.30a        | 2.81a            | 2.81a                     | 3.10a        | 3.20a            | 3.20a        | 3.30a          | 3.30a             | 3.30a        | 4.11a        | 4.11a                | 2.92a        | 0.00W       |
+| GHWCFG1                    | 0x00000000     | 0x00000000     | 0x00000000  | 0x00000000      | 0x00000000   | 0x00000000    | 0x00000000   | 0xAA555000   | 0x00000000       | 0x00000000                | 0x00000000   | 0x00000000       | 0x00000000   | 0x00000000     | 0x00000000        | 0x00000000   | 0x00000000   | 0x00000000           | 0x00000000   | 0x00000000  |
+| GHWCFG2                    | 0x228FDD00     | 0x229FDDD0     | 0x228DCD00  | 0x228DDD50      | 0x228F5910   | 0x224DD930    | 0x215FFFD0   | 0x228BFC72   | 0x229ED590       | 0x229DCD20                | 0x229ED520   | 0x229ED520       | 0x229FE190   | 0x229FE190     | 0x229ED520        | 0x229FE1D0   | 0x229ED522   | 0x228FE052           | 0x228F5930   | 0x00000000  |
+| - op_mode                  | HNP SRP        | HNP SRP        | HNP SRP     | HNP SRP         | HNP SRP      | HNP SRP       | HNP SRP      | noHNP noSRP  | HNP SRP          | HNP SRP                   | HNP SRP      | HNP SRP          | HNP SRP      | HNP SRP        | HNP SRP           | HNP SRP      | noHNP noSRP  | noHNP noSRP          | HNP SRP      | HNP SRP     |
+| - arch                     | Slave only     | DMA internal   | Slave only  | DMA internal    | DMA internal | DMA internal  | DMA internal | DMA internal | DMA internal     | Slave only                | Slave only   | Slave only       | DMA internal | DMA internal   | Slave only        | DMA internal | Slave only   | DMA internal         | DMA internal | Slave only  |
+| - single_point             | hub            | hub            | hub         | hub             | hub          | n/a           | hub          | n/a          | hub              | n/a                       | n/a          | n/a              | hub          | hub            | n/a               | hub          | n/a          | hub                  | n/a          | hub         |
+| - hs_phy_type              | n/a            | UTMI+/ULPI     | n/a         | UTMI+           | n/a          | n/a           | UTMI+/ULPI   | UTMI+        | ULPI             | n/a                       | n/a          | n/a              | ULPI         | ULPI           | n/a               | UTMI+/ULPI   | n/a          | UTMI+                | n/a          | n/a         |
+| - fs_phy_type              | Dedicated      | Dedicated      | Dedicated   | Dedicated       | Dedicated    | Dedicated     | Shared ULPI  | n/a          | Dedicated        | Dedicated                 | Dedicated    | Dedicated        | Dedicated    | Dedicated      | Dedicated         | Dedicated    | Dedicated    | n/a                  | Dedicated    | n/a         |
+| - num_dev_ep               | 7              | 7              | 3           | 7               | 6            | 6             | 15           | 15           | 5                | 3                         | 5            | 5                | 8            | 8              | 5                 | 8            | 5            | 8                    | 6            | 0           |
+| - num_host_ch              | 15             | 15             | 7           | 7               | 13           | 7             | 15           | 15           | 11               | 7                         | 11           | 11               | 15           | 15             | 11                | 15           | 11           | 15                   | 13           | 0           |
+| - period_channel_support   | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - enable_dynamic_fifo      | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 1            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - mul_proc_intrpt          | 0              | 1              | 0           | 0               | 0            | 0             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 0                    | 0            | 0           |
+| - reserved21               | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - nptx_q_depth             | 8              | 8              | 8           | 8               | 8            | 4             | 4            | 8            | 8                | 8                         | 8            | 8                | 8            | 8              | 8                 | 8            | 8            | 8                    | 8            | 2           |
+| - ptx_q_depth              | 8              | 8              | 8           | 8               | 8            | 8             | 4            | 8            | 8                | 8                         | 8            | 8                | 8            | 8              | 8                 | 8            | 8            | 8                    | 8            | 2           |
+| - token_q_depth            | 8              | 8              | 8           | 8               | 8            | 8             | 8            | 8            | 8                | 8                         | 8            | 8                | 8            | 8              | 8                 | 8            | 8            | 8                    | 8            | 0           |
+| - otg_enable_ic_usb        | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| GHWCFG3                    | 0x020004E8     | 0x03F006E8     | 0x020004E8  | 0x0FF000E8      | 0x01F204E8   | 0x00C804B5    | 0x03805EB5   | 0x0BEAC0E8   | 0x03F403E8       | 0x020001E8                | 0x0200D1E8   | 0x0200D1E8       | 0x03EED2E8   | 0x03B8D2E8     | 0x0200D1E8        | 0x03EED2E8   | 0x020081E8   | 0x03B882E8           | 0x027A01E5   | 0x00000000  |
+| - xfer_size_width          | 8              | 8              | 8           | 8               | 8            | 5             | 5            | 8            | 8                | 8                         | 8            | 8                | 8            | 8              | 8                 | 8            | 8            | 8                    | 5            | 0           |
+| - packet_size_width        | 6              | 6              | 6           | 6               | 6            | 3             | 3            | 6            | 6                | 6                         | 6            | 6                | 6            | 6              | 6                 | 6            | 6            | 6                    | 6            | 0           |
+| - otg_enable               | 1              | 1              | 1           | 1               | 1            | 1             | 1            | 1            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - i2c_enable               | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 1                | 1                         | 1            | 1                | 0            | 0              | 1                 | 0            | 1            | 0                    | 1            | 0           |
+| - vendor_ctrl_itf          | 0              | 1              | 0           | 0               | 0            | 0             | 1            | 0            | 1                | 0                         | 0            | 0                | 1            | 1              | 0                 | 1            | 0            | 1                    | 0            | 0           |
+| - optional_feature_removed | 1              | 1              | 1           | 0               | 1            | 1             | 1            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - synch_reset              | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - otg_adp_support          | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                | 0                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 0            | 0           |
+| - otg_enable_hsic          | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - battery_charger_support  | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 1            | 0                | 0                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 0            | 0           |
+| - lpm_mode                 | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                | 0                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 0            | 0           |
+| - dfifo_depth              | 512            | 1008           | 512         | 4080            | 498          | 200           | 896          | 3050         | 1012             | 512                       | 512          | 512              | 1006         | 952            | 512               | 1006         | 512          | 952                  | 634          | 0           |
+| GHWCFG4                    | 0x1FF0A020     | 0x1FF0A020     | 0x0000000F  | 0x1FF00020      | 0x1BF08030   | 0xD3F0A030    | 0xDFF1A030   | 0x1E10AA60   | 0x17F00030       | 0x0FF08030                | 0x17F08030   | 0x17F08030       | 0x23F00030   | 0xE3F00030     | 0x17F08030        | 0x23F00030   | 0x1610B230   | 0xE2103E30           | 0xDBF08030   | 0x00000000  |
+| - num_dev_period_in_ep     | 0              | 0              | 15          | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - partial_powerdown        | 0              | 0              | 0           | 0               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - ahb_freq_min             | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - hibernation              | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - extended_hibernation     | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - reserved8                | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - enhanced_lpm_support1    | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 1            | 1                    | 0            | 0           |
+| - service_interval_flow    | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 1                    | 0            | 0           |
+| - ipg_isoc_support         | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 1            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 1                    | 0            | 0           |
+| - acg_support              | 0              | 0              | 0           | 0               | 0            | 0             | 0            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 1            | 1                    | 0            | 0           |
+| - enhanced_lpm_support     | 1              | 1              | 0           | 0               | 0            | 1             | 1            | 1            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 1            | 1                    | 0            | 0           |
+| - phy_data_width           | 8/16 bit       | 8/16 bit       | 8 bit       | 8 bit           | 8/16 bit     | 8/16 bit      | 8/16 bit     | 8/16 bit     | 8 bit            | 8/16 bit                  | 8/16 bit     | 8/16 bit         | 8 bit        | 8 bit          | 8/16 bit          | 8 bit        | 8/16 bit     | 8 bit                | 8/16 bit     | 8 bit       |
+| - ctrl_ep_num              | 0              | 0              | 0           | 0               | 0            | 0             | 1            | 0            | 0                | 0                         | 0            | 0                | 0            | 0              | 0                 | 0            | 0            | 0                    | 0            | 0           |
+| - iddg_filter              | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - vbus_valid_filter        | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 1            | 0           |
+| - a_valid_filter           | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 1            | 0           |
+| - b_valid_filter           | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 1            | 0           |
+| - session_end_filter       | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 0            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 0            | 0                    | 1            | 0           |
+| - dedicated_fifos          | 1              | 1              | 0           | 1               | 1            | 1             | 1            | 1            | 1                | 1                         | 1            | 1                | 1            | 1              | 1                 | 1            | 1            | 1                    | 1            | 0           |
+| - num_dev_in_eps           | 7              | 7              | 0           | 7               | 6            | 4             | 7            | 7            | 5                | 3                         | 5            | 5                | 8            | 8              | 5                 | 8            | 5            | 8                    | 6            | 0           |
+| - dma_desc_enable          | 0              | 0              | 0           | 0               | 0            | 1             | 1            | 0            | 0                | 0                         | 0            | 0                | 0            | 1              | 0                 | 0            | 0            | 1                    | 1            | 0           |
+| - dma_desc_dynamic         | 0              | 0              | 0           | 0               | 0            | 1             | 1            | 0            | 0                | 0                         | 0            | 0                | 0            | 1              | 0                 | 0            | 0            | 1                    | 1            | 0           |
diff --git a/src/portable/synopsys/dwc2/dwc2_info.py b/src/portable/synopsys/dwc2/dwc2_info.py
index 8fbbc00a0..e6601f482 100755
--- a/src/portable/synopsys/dwc2/dwc2_info.py
+++ b/src/portable/synopsys/dwc2/dwc2_info.py
@@ -16,14 +16,16 @@ dwc2_reg_value = {
     'ESP32-S2/S3': [0, 0x4F54400A, 0, 0x224DD930, 0x0C804B5, 0xD3F0A030],
     'ESP32-P4': [0, 0x4F54400A, 0, 0x215FFFD0, 0x03805EB5, 0xDFF1A030],
     'nRF54': [0, 0x4F54430A, 0xAA555000, 0x228BFC72, 0x0BEAC0E8, 0x1E10AA60],
-    'ST F207/F407/411/429 FS': [0x1200, 0x4F54281A, 0, 0x229DCD20, 0x020001E8, 0x0FF08030],
+    # ST sort by GUID
     'ST F407/429 HS': [0x1100, 0x4F54281A, 0, 0x229ED590, 0x03F403E8, 0x17F00030],
+    'ST F207/F407/411/429 FS': [0x1200, 0x4F54281A, 0, 0x229DCD20, 0x020001E8, 0x0FF08030],
+    'ST L476 FS': [0x2000, 0x4F54310A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
     'ST F412/76x FS': [0x2000, 0x4F54320A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
-    'ST F723/L4P5 FS': [0x3000, 0x4F54330A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
-    'ST F723 HS': [0x3100, 0x4F54330A, 0, 0x229FE1D0, 0x03EED2E8, 0x23F00030],
     'ST F76x HS': [0x2100, 0x4F54320A, 0, 0x229FE190, 0x03EED2E8, 0x23F00030],
     'ST H743/H750': [0x2300, 0x4F54330A, 0, 0x229FE190, 0x03B8D2E8, 0xE3F00030],
-    'ST L476 FS': [0x2000, 0x4F54310A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
+    'ST F723/L4P5 FS': [0x3000, 0x4F54330A, 0, 0x229ED520, 0x0200D1E8, 0x17F08030],
+    'ST F723 HS': [0x3100, 0x4F54330A, 0, 0x229FE1D0, 0x03EED2E8, 0x23F00030],
+    'ST H7RS FS': [0x4000, 0x4F54411A, 0, 0x229ED522, 0x20081E8, 0x1610B230],
     'ST U5A5/H7RS/N6 HS': [0x5000, 0x4F54411A, 0, 0x228FE052, 0x03B882E8, 0xE2103E30],
     'XMC4500': [0xAEC000, 0x4F54292A, 0, 0x228F5930, 0x027A01E5, 0xDBF08030],
     'GD32VF103': [0x1000, 0, 0, 0, 0, 0],
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 3da78b893..753917a20 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -308,129 +308,59 @@ static inline void dwc2_stm32_gccfg_cfg(dwc2_regs_t* dwc2, bool vbus_sensing, bo
   if (is_host) {
     vbus_sensing = false;
   }
-#if CFG_TUSB_MCU == OPT_MCU_STM32F1
-  // F1: Basic FS-only core, no VBUS sensing support
-  // Only PWRDWN bit is used (set in dwc2_phy_init)
-  (void) vbus_sensing;
-
-#elif CFG_TUSB_MCU == OPT_MCU_STM32F2 || CFG_TUSB_MCU == OPT_MCU_STM32F4
-  // F2/F4: Dual FS/HS with VBUSBSEN/VBUSASEN/NOVBUSSENS bits
-  if (is_host) {
-    dwc2->stm32_gccfg &= ~(STM32_GCCFG_NOVBUSSENS | STM32_GCCFG_VBUSBSEN | STM32_GCCFG_VBUSASEN);
-  } else {
-    if (vbus_sensing) {
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_NOVBUSSENS;
-      dwc2->stm32_gccfg |= STM32_GCCFG_VBUSBSEN;
-    } else {
-      dwc2->stm32_gccfg |= STM32_GCCFG_NOVBUSSENS;
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_VBUSBSEN;
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_VBUSASEN;
-    }
-  }
-#elif CFG_TUSB_MCU == OPT_MCU_STM32F7
-  // F7: Enhanced FS/HS with battery charging detection
-  if (vbus_sensing) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-  }
 
-#elif CFG_TUSB_MCU == OPT_MCU_STM32H7
-  if (vbus_sensing) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-  }
-
-#elif CFG_TUSB_MCU == OPT_MCU_STM32H7RS
-  // H7FS: Port0: Basic FS-only core; Port1: femtoPHY
-  if ((uintptr_t)dwc2 == _dwc2_controller[0].reg_base) {
-    if (vbus_sensing) {
-      dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-    } else {
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-    }
-    return;
-  } else {
-    // Uses VBVALEXTOEN and VBVALOVAL for external VBUS sensing override
+  uint32_t gccfg = dwc2->stm32_gccfg;
+  if (dwc2->guid < 0x2000) {
+    // use VBUSASEN/VBUSBSEN/NOVBUSSENS bits
     if (is_host) {
-      dwc2->stm32_gccfg |= STM32_GCCFG_PULLDOWNEN;
-      dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBDEN | STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
+      gccfg &= ~(STM32_GCCFG_NOVBUSSENS | STM32_GCCFG_VBUSBSEN | STM32_GCCFG_VBUSASEN);
     } else {
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_PULLDOWNEN;
       if (vbus_sensing) {
-        dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-        dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
+        gccfg &= ~STM32_GCCFG_NOVBUSSENS;
+        gccfg |= STM32_GCCFG_VBUSBSEN;
       } else {
-        dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-        dwc2->stm32_gccfg |= STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL;
+        gccfg |= STM32_GCCFG_NOVBUSSENS;
+        gccfg &= ~(STM32_GCCFG_VBUSBSEN | STM32_GCCFG_VBUSASEN);
       }
     }
-  }
-
-#elif CFG_TUSB_MCU == OPT_MCU_STM32N6
-  // N6: femtoPHY
-  // In this device, the software override is always active
-  (void) vbus_sensing;
-  if (is_host) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_PULLDOWNEN;
-    dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBVALOVAL);
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_PULLDOWNEN;
-    dwc2->stm32_gccfg |= STM32_GCCFG_VBVALOVAL;
-  }
-
-#elif CFG_TUSB_MCU == OPT_MCU_STM32L4
-  // L4: Low-power FS-only with VBUS detection
-  if (vbus_sensing) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-  }
-
-#elif CFG_TUSB_MCU == OPT_MCU_STM32U5
-  #ifdef USB_OTG_FS
-  // U5: FS PHY (U575/585 have FS only)
-  if (vbus_sensing) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-  }
-  #else
-  // U5: femtoPHY (U59x/5Ax/5Fx/5Gx have HS)
-  // Uses VBVALEXTOEN and VBVALOVAL for external VBUS sensing override
-  if (is_host) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_PULLDOWNEN;
-    dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBDEN | STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
-  } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_PULLDOWNEN;
+  } else if (dwc2->guid < 0x5000) {
+    // the later version uses VBDEN with battery charging detection
     if (vbus_sensing) {
-      dwc2->stm32_gccfg |= STM32_GCCFG_VBDEN;
-      dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
+      gccfg |= STM32_GCCFG_VBDEN;
     } else {
-      dwc2->stm32_gccfg &= ~STM32_GCCFG_VBDEN;
-      dwc2->stm32_gccfg |= STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL;
+      gccfg &= ~STM32_GCCFG_VBDEN;
     }
-  }
-  #endif
-#elif CFG_TUSB_MCU == OPT_MCU_STM32WBA
-  // WBA: femtoPHY
-  // In this device, the software override is always active
-  if (is_host) {
-    dwc2->stm32_gccfg |= STM32_GCCFG_PULLDOWNEN;
-    dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBVALOVAL);
   } else {
-    dwc2->stm32_gccfg &= ~STM32_GCCFG_PULLDOWNEN;
-    if (vbus_sensing) {
-      dwc2->stm32_gccfg &= ~(STM32_GCCFG_VBVALOVAL);
+    // from 0x5000 ST seems to use femtoPHY for UTMI+ HS PHY. Which use VBVALEXTOEN and VBVALOVAL for software override
+    // external VBUS sensing
+    // Note: N6 does not support hardware VBUS sensing, so the software override is always active. Therefore, VBDEN and
+    //       VBVALEXTOEN are not available
+#if CFG_TUSB_MCU == OPT_MCU_STM32N6
+    if (is_host) {
+      gccfg |= STM32_GCCFG_PULLDOWNEN;
+      gccfg &= ~(STM32_GCCFG_VBVALOVAL);
     } else {
-      dwc2->stm32_gccfg |= STM32_GCCFG_VBVALOVAL;
+      gccfg &= ~STM32_GCCFG_PULLDOWNEN;
+      gccfg |= STM32_GCCFG_VBVALOVAL;
     }
-  }
-
 #else
-  #error "Unsupported MCU family"
+    if (is_host) {
+      gccfg |= STM32_GCCFG_PULLDOWNEN;
+      gccfg &= ~(STM32_GCCFG_VBDEN | STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
+    } else {
+      gccfg &= ~STM32_GCCFG_PULLDOWNEN;
+      if (vbus_sensing) {
+        gccfg |= STM32_GCCFG_VBDEN;
+        gccfg &= ~(STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL);
+      } else {
+        gccfg &= ~STM32_GCCFG_VBDEN;
+        gccfg |= STM32_GCCFG_VBVALEXTOEN | STM32_GCCFG_VBVALOVAL;
+      }
+    }
 #endif
+  }
+
+  dwc2->stm32_gccfg = gccfg;
 }
 
 //------------- DCache -------------//
diff --git a/src/portable/synopsys/dwc2/dwc2_type.h b/src/portable/synopsys/dwc2/dwc2_type.h
index 2dd73c184..596bd0b34 100644
--- a/src/portable/synopsys/dwc2/dwc2_type.h
+++ b/src/portable/synopsys/dwc2/dwc2_type.h
@@ -1650,23 +1650,26 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define STM32_GCCFG_PHYHSEN_Msk          (0x1UL << STM32_GCCFG_PHYHSEN_Pos)       // 0x00800000
 #define STM32_GCCFG_PHYHSEN              STM32_GCCFG_PHYHSEN_Msk                  // HS PHY enable
 
-// stm32f2/stm32f4
+// GUID < 0x2000: VBUSASEN, VBUSBSEN, NOVBUSSENS bits
 #define STM32_GCCFG_VBUSASEN_Pos         (18U)
 #define STM32_GCCFG_VBUSASEN_Msk         (0x1UL << STM32_GCCFG_VBUSASEN_Pos)      // 0x00040000
 #define STM32_GCCFG_VBUSASEN             STM32_GCCFG_VBUSASEN_Msk                 // Enable A-device (host) VBUS sensing
+
 #define STM32_GCCFG_VBUSBSEN_Pos         (19U)
 #define STM32_GCCFG_VBUSBSEN_Msk         (0x1UL << STM32_GCCFG_VBUSBSEN_Pos)      // 0x00080000
 #define STM32_GCCFG_VBUSBSEN             STM32_GCCFG_VBUSBSEN_Msk                 // Enable B-device (peripheral) VBUS sensing
+
 #define STM32_GCCFG_NOVBUSSENS_Pos       (21U)
 #define STM32_GCCFG_NOVBUSSENS_Msk       (0x1UL << STM32_GCCFG_NOVBUSSENS_Pos)     // 0x00200000
 #define STM32_GCCFG_NOVBUSSENS           STM32_GCCFG_NOVBUSSENS_Msk                // VBUS sensing disable option
+// GUID < 0x2000: end
 
 // TODO: stm32u5a5 SDEN is 22nd bit, conflict with 20th bit above
 // #define STM32_GCCFG_SDEN_Pos             (22U)
 // #define STM32_GCCFG_SDEN_Msk             (0x1U << STM32_GCCFG_SDEN_Pos)             // 0x00400000
 // #define STM32_GCCFG_SDEN                 STM32_GCCFG_SDEN_Msk                       // Secondary detection (PD) mode enable
 
-// stm32u5a5 VBVALOVA is 23rd bit, conflict with PHYHSEN bit above
+// GUID >= 0x5000 use femtoPHY: VBVALOVA, VBVALEXTOEN, PULLDOWNEN
 #define STM32_GCCFG_VBVALOVAL_Pos        (23U)
 #define STM32_GCCFG_VBVALOVAL_Msk        (0x1U << STM32_GCCFG_VBVALOVAL_Pos)        // 0x00800000
 #define STM32_GCCFG_VBVALOVAL            STM32_GCCFG_VBVALOVAL_Msk                  // Value of VBUSVLDEXT0 femtoPHY input
@@ -1678,7 +1681,7 @@ TU_VERIFY_STATIC(offsetof(dwc2_regs_t, fifo   ) == 0x1000, "incorrect size");
 #define STM32_GCCFG_PULLDOWNEN_Pos       (25U)
 #define STM32_GCCFG_PULLDOWNEN_Msk       (0x1U << STM32_GCCFG_PULLDOWNEN_Pos)       // 0x02000000
 #define STM32_GCCFG_PULLDOWNEN           STM32_GCCFG_PULLDOWNEN_Msk                 // Enables of femtoPHY pulldown resistors, used when ID PAD is disabled
-
+// GUID >= 0x5000: end
 
 /********************  Bit definition for DEACHINTMSK register  ********************/
 #define DEACHINTMSK_IEP1INTM_Pos         (1U)
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 8e270e5f2..ebf366e17 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -579,9 +579,18 @@
   #define CFG_TUD_TEST_MODE       0
 #endif
 
+#ifndef CFG_TUD_VBUS_SENSE_DEFAULT
+  #define CFG_TUD_VBUS_SENSE_DEFAULT 0
+#endif
+
+// Enable VBUS Sensing
+#ifndef CFG_TUD_VBUS_SENSE
+  #define CFG_TUD_VBUS_SENSE CFG_TUD_VBUS_SENSE_DEFAULT
+#endif
+
 //------------- Device Class Driver -------------//
 #ifndef CFG_TUD_BTH
-  #define CFG_TUD_BTH             0
+  #define CFG_TUD_BTH 0
 #endif
 
 #if CFG_TUD_BTH && !defined(CFG_TUD_BTH_ISO_ALT_COUNT)
-- 
cgit v1.3.1


From f0b44ec6154237a4bd65a5a9d8f8bf944669af64 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Feb 2026 22:29:14 +0700
Subject: use CFG_TUD_CONFIGURE_DWC2_DEFAULT to make it easier to add more
 value

---
 hw/bsp/stm32f2/family.c               |  6 ++----
 hw/bsp/stm32f4/family.c               |  6 ++----
 hw/bsp/stm32f7/family.c               | 12 ++++--------
 hw/bsp/stm32h7/family.c               | 12 ++++--------
 hw/bsp/stm32h7rs/family.c             | 12 ++++--------
 hw/bsp/stm32l4/family.c               |  6 ++----
 hw/bsp/stm32u5/family.c               | 12 ++++--------
 src/device/usbd.h                     |  4 +++-
 src/portable/synopsys/dwc2/dcd_dwc2.c |  2 +-
 src/tusb_option.h                     | 10 +++++-----
 10 files changed, 31 insertions(+), 51 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index f863a59f0..f95128040 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -106,10 +106,8 @@ void board_init(void) {
 
 #if CFG_TUD_ENABLED
   // Enable VBUS sense (B device) via pin PA9
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = true
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = true;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 }
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 2170faca7..f0e9620f2 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -180,10 +180,8 @@ void board_init(void) {
 #endif
 
 #if CFG_TUD_ENABLED
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = VBUS_SENSE_EN
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = VBUS_SENSE_EN;
   tud_configure(BOARD_TUD_RHPORT, TUD_CFGID_DWC2, &cfg);
   board_vbus_set(BOARD_TUD_RHPORT, false);
 #endif
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index fc1c0bd13..d8f0da201 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -157,10 +157,8 @@ void board_init(void) {
 #endif // vbus sense
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_FS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_FS_VBUS_SENSE;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -239,10 +237,8 @@ void board_init(void) {
   __HAL_RCC_USB_OTG_HS_CLK_ENABLE();
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_HS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_HS_VBUS_SENSE;
   tud_configure(1, TUD_CFGID_DWC2, &cfg);
 #endif
 
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 920f222d7..a320a7e72 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -183,10 +183,8 @@ void board_init(void) {
 #endif // vbus sense
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_FS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_FS_VBUS_SENSE;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -215,10 +213,8 @@ void board_init(void) {
   __HAL_RCC_USB1_OTG_HS_CLK_ENABLE();
 
   #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_HS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_HS_VBUS_SENSE;
   tud_configure(1, TUD_CFGID_DWC2, &cfg);
   #endif
 #endif
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index b1980f2ed..2cc39b7ac 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -359,10 +359,8 @@ void board_init(void) {
 #endif // vbus sense
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_FS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_FS_VBUS_SENSE;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -390,10 +388,8 @@ void board_init(void) {
 #endif
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = OTG_HS_VBUS_SENSE
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = OTG_HS_VBUS_SENSE;
   tud_configure(1, TUD_CFGID_DWC2, &cfg);
 #endif
 
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index b51a9fc8f..65f6b9ab3 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -176,10 +176,8 @@ void board_init(void) {
 
   #if CFG_TUD_ENABLED
   /* Set Vbus sense */
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = VBUS_SENSE_EN
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = VBUS_SENSE_EN;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
   #endif
 #else
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index c2ea270df..dfcf5c537 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -182,10 +182,8 @@ void board_init(void) {
   #endif // vbus sense
 
 #if CFG_TUD_ENABLED
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = VBUS_SENSE_EN
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = VBUS_SENSE_EN;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -217,10 +215,8 @@ void board_init(void) {
   HAL_SYSCFG_EnableOTGPHY(SYSCFG_OTG_HS_PHY_ENABLE);
 
 #if CFG_TUD_ENABLED
-  tud_configure_dwc2_t cfg = {
-    .bm_double_buffered = 0,
-    .vbus_sensing = VBUS_SENSE_EN
-  };
+  tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
+  cfg.vbus_sensing = VBUS_SENSE_EN;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 #endif // USB_OTG_FS
diff --git a/src/device/usbd.h b/src/device/usbd.h
index eaf07b81e..825fdba90 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -44,7 +44,9 @@ typedef struct {
   bool vbus_sensing; // Vbus pin is used for device connection detection, mandatory for tud_umount_cb()
 } tud_configure_dwc2_t;
 
-#define TUD_CONFIGURE_DWC2_DEFAULT { .bm_double_buffered = 0, .vbus_sensing = CFG_TUD_VBUS_SENSE }
+  #ifndef CFG_TUD_CONFIGURE_DWC2_DEFAULT
+    #define CFG_TUD_CONFIGURE_DWC2_DEFAULT {.bm_double_buffered = 0, .vbus_sensing = CFG_TUD_VBUS_DETECT_HW}
+  #endif
 
 typedef union {
   tud_configure_dwc2_t dwc2;
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index a6a598dbf..97e83f4e1 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -77,7 +77,7 @@ CFG_TUD_MEM_SECTION static struct {
   TUD_EPBUF_DEF(setup_packet, 8);
 } _dcd_usbbuf;
 
-static tud_configure_dwc2_t _tud_cfg = TUD_CONFIGURE_DWC2_DEFAULT;
+static tud_configure_dwc2_t _tud_cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t dwc2_ep_count(const dwc2_regs_t* dwc2) {
   #if TU_CHECK_MCU(OPT_MCU_GD32VF103)
diff --git a/src/tusb_option.h b/src/tusb_option.h
index ebf366e17..d87c2dc8b 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -579,13 +579,13 @@
   #define CFG_TUD_TEST_MODE       0
 #endif
 
-#ifndef CFG_TUD_VBUS_SENSE_DEFAULT
-  #define CFG_TUD_VBUS_SENSE_DEFAULT 0
+#ifndef CFG_TUD_VBUS_DETECT_HW_DEFAULT
+  #define CFG_TUD_VBUS_DETECT_HW_DEFAULT 0
 #endif
 
-// Enable VBUS Sensing
-#ifndef CFG_TUD_VBUS_SENSE
-  #define CFG_TUD_VBUS_SENSE CFG_TUD_VBUS_SENSE_DEFAULT
+// Enable VBUS Detect hardware, usually via functional GPIO
+#ifndef CFG_TUD_VBUS_DETECT_HW
+  #define CFG_TUD_VBUS_DETECT_HW CFG_TUD_VBUS_DETECT_HW_DEFAULT
 #endif
 
 //------------- Device Class Driver -------------//
-- 
cgit v1.3.1


From fc9f63e62d0806b233602cc1bb45b370d350a717 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 27 Feb 2026 10:43:22 +0100
Subject: bsp/samx7x: fix build

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/same7x/boards/same70_qmtech/board.cmake   |  6 +++++-
 hw/bsp/same7x/boards/same70_xplained/board.cmake |  4 ++++
 hw/bsp/same7x/family.cmake                       | 20 ++++++++++----------
 3 files changed, 19 insertions(+), 11 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.cmake b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
index cde4c3da6..3597c280f 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.cmake
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
@@ -1,5 +1,9 @@
 set(JLINK_DEVICE SAME70N19B)
-set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
+set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70n19b_flash.ld)
+set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70n19b/flash.icf)
+
+set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70n19b.c)
+set(STARTUP_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/iar/startup_same70n19b.c)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.cmake b/hw/bsp/same7x/boards/same70_xplained/board.cmake
index b226b6c4f..4ac661daa 100644
--- a/hw/bsp/same7x/boards/same70_xplained/board.cmake
+++ b/hw/bsp/same7x/boards/same70_xplained/board.cmake
@@ -1,5 +1,9 @@
 set(JLINK_DEVICE SAME70Q21B)
 set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
+set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70q21b/flash.icf)
+
+set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70q21b.c)
+set(STARTUP_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/iar/startup_same70q21b.c)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/same7x/family.cmake b/hw/bsp/same7x/family.cmake
index a9c9de413..63726a8e5 100644
--- a/hw/bsp/same7x/family.cmake
+++ b/hw/bsp/same7x/family.cmake
@@ -13,7 +13,6 @@ set(FAMILY_MCUS SAMX7X CACHE INTERNAL "")
 #------------------------------------
 # Startup & Linker script
 #------------------------------------
-set(STARTUP_FILE_GNU ${SDK_DIR}/same70b/gcc/gcc/startup_same70q21b.c)
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 set(LD_FILE_Clang ${LD_FILE_GNU})
 
@@ -47,12 +46,9 @@ function(family_add_board BOARD_TARGET)
 
   update_board(${BOARD_TARGET})
 
-  target_compile_options(${BOARD_TARGET} PUBLIC
-    -Wno-error=unused-parameter
-    -Wno-error=cast-align
-    -Wno-error=redundant-decls
-    -Wno-error=cast-qual
-    )
+  if (TOOLCHAIN STREQUAL "gcc" OR TOOLCHAIN STREQUAL "clang")
+    set_target_properties(${BOARD_TARGET} PROPERTIES COMPILE_FLAGS -Wno-error=cast-qual)
+  endif ()
 endfunction()
 
 #------------------------------------
@@ -89,9 +85,13 @@ function(family_configure_example TARGET RTOS)
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
-    SKIP_LINTING ON
-    COMPILE_OPTIONS -w)
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    # ignore hal error
+    set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+      PROPERTIES
+      SKIP_LINTING ON
+      COMPILE_OPTIONS -w)
+  endif()
 
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-- 
cgit v1.3.1


From 5095ec97d872d51bd338e49987d8e336b9939628 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 28 Nov 2025 19:46:11 +0100
Subject: Add a dynamic switch example

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/dual/CMakeLists.txt                       |   1 +
 examples/dual/dynamic_switch/CMakeLists.txt        |  30 ++
 examples/dual/dynamic_switch/CMakePresets.json     |   6 +
 examples/dual/dynamic_switch/Makefile              |  16 +
 examples/dual/dynamic_switch/README.md             |  60 +++
 examples/dual/dynamic_switch/only.txt              |  10 +
 examples/dual/dynamic_switch/src/CMakeLists.txt    |   4 +
 examples/dual/dynamic_switch/src/main.c            | 494 +++++++++++++++++++++
 examples/dual/dynamic_switch/src/tusb_config.h     | 158 +++++++
 examples/dual/dynamic_switch/src/usb_descriptors.c | 199 +++++++++
 hw/bsp/stm32f2/family.c                            |   2 +-
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h    |   2 +-
 12 files changed, 980 insertions(+), 2 deletions(-)
 create mode 100644 examples/dual/dynamic_switch/CMakeLists.txt
 create mode 100644 examples/dual/dynamic_switch/CMakePresets.json
 create mode 100644 examples/dual/dynamic_switch/Makefile
 create mode 100644 examples/dual/dynamic_switch/README.md
 create mode 100644 examples/dual/dynamic_switch/only.txt
 create mode 100644 examples/dual/dynamic_switch/src/CMakeLists.txt
 create mode 100644 examples/dual/dynamic_switch/src/main.c
 create mode 100644 examples/dual/dynamic_switch/src/tusb_config.h
 create mode 100644 examples/dual/dynamic_switch/src/usb_descriptors.c

(limited to 'hw')

diff --git a/examples/dual/CMakeLists.txt b/examples/dual/CMakeLists.txt
index 4978f1fab..8727ea938 100644
--- a/examples/dual/CMakeLists.txt
+++ b/examples/dual/CMakeLists.txt
@@ -12,6 +12,7 @@ else ()
   set(EXAMPLE_LIST
     host_hid_to_device_cdc
     host_info_to_device_cdc
+    dynamic_switch
     )
 
   foreach (example ${EXAMPLE_LIST})
diff --git a/examples/dual/dynamic_switch/CMakeLists.txt b/examples/dual/dynamic_switch/CMakeLists.txt
new file mode 100644
index 000000000..7cad30727
--- /dev/null
+++ b/examples/dual/dynamic_switch/CMakeLists.txt
@@ -0,0 +1,30 @@
+cmake_minimum_required(VERSION 3.20)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+project(dynamic_switch C CXX ASM)
+
+# Checks this example is valid for the family and initializes the project
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
+
+# Espressif has its own cmake build system
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT_NAME})
+
+# Example source
+target_sources(${PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/usb_descriptors.c
+  )
+
+# Example include
+target_include_directories(${PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+  )
+
+# Configure compilation flags and libraries for the example without RTOS.
+# See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
+family_configure_dual_usb_example(${PROJECT_NAME} noos)
diff --git a/examples/dual/dynamic_switch/CMakePresets.json b/examples/dual/dynamic_switch/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/dual/dynamic_switch/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/dual/dynamic_switch/Makefile b/examples/dual/dynamic_switch/Makefile
new file mode 100644
index 000000000..44ab54ad7
--- /dev/null
+++ b/examples/dual/dynamic_switch/Makefile
@@ -0,0 +1,16 @@
+include ../../../hw/bsp/family_support.mk
+
+INC += \
+	src \
+
+# Example source
+EXAMPLE_SOURCE += $(wildcard src/*.c)
+SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
+
+# Include device and host stack
+SRC_C += \
+	src/class/cdc/cdc_device.c \
+	src/host/hub.c \
+	src/host/usbh.c
+
+include ../../../hw/bsp/family_rules.mk
diff --git a/examples/dual/dynamic_switch/README.md b/examples/dual/dynamic_switch/README.md
new file mode 100644
index 000000000..034787f18
--- /dev/null
+++ b/examples/dual/dynamic_switch/README.md
@@ -0,0 +1,60 @@
+# Dynamic Switch Example
+
+This example demonstrates TinyUSB's dual-role capability by allowing runtime switching between USB device and host modes.
+
+## Features
+
+- **Button-triggered mode switching**: Press the board button to switch between device and host modes
+- **Device Mode**: Acts as a USB CDC (Virtual Serial Port) that echoes all received data
+- **Host Mode**: Enumerates connected USB devices and prints device information
+- **Dynamic switching**: Deinitializes the current stack and reinitializes in the new mode
+
+## Usage
+
+1. **Build and flash** the example to your board
+2. **Default behavior**: The board starts in **Device mode**
+3. **Device mode**:
+   - Connect the board to a PC
+   - Open a serial terminal (e.g., `screen /dev/ttyACM0` or PuTTY)
+   - Type characters - they will be echoed back to you
+4. **Switch to Host mode**:
+   - Press the board button
+   - Connect a USB device to the board
+   - The board will enumerate the device and print its descriptors to the debug console
+5. **Switch back to Device mode**: Press the button again
+
+## LED Patterns
+
+The onboard LED indicates the USB connection status:
+
+- **Fast blink (250ms)**: Not mounted/connected
+- **Slow blink (1000ms)**: Successfully mounted/connected
+- **Very slow blink (2500ms)**: Suspended (device mode only)
+
+## Serial Output
+
+The example prints status messages to the debug UART:
+
+```
+======================================
+TinyUSB Dynamic Switch Example
+Press button to switch between device and host modes
+Starting in DEVICE mode...
+======================================
+
+[DEVICE] Mounted
+
+--- Switching USB mode ---
+Stopping DEVICE mode...
+Starting HOST mode...
+Mode switch complete!
+
+[HOST] Device attached, address = 1
+Device 1: ID 1234:5678 SN ABC123
+Device Descriptor:
+  bLength             18
+  bDescriptorType     1
+  bcdUSB              0200
+  bDeviceClass        239
+  ...
+```
diff --git a/examples/dual/dynamic_switch/only.txt b/examples/dual/dynamic_switch/only.txt
new file mode 100644
index 000000000..8508780e6
--- /dev/null
+++ b/examples/dual/dynamic_switch/only.txt
@@ -0,0 +1,10 @@
+family:espressif
+mcu:STM32C0
+mcu:STM32G0
+mcu:STM32H5
+mcu:STM32F2
+mcu:STM32F4
+mcu:STM32U5
+mcu:STM32F7
+mcu:STM32H7
+mcu:STM32H7RS
diff --git a/examples/dual/dynamic_switch/src/CMakeLists.txt b/examples/dual/dynamic_switch/src/CMakeLists.txt
new file mode 100644
index 000000000..cef2b46ee
--- /dev/null
+++ b/examples/dual/dynamic_switch/src/CMakeLists.txt
@@ -0,0 +1,4 @@
+# This file is for ESP-IDF only
+idf_component_register(SRCS "main.c" "usb_descriptors.c"
+                    INCLUDE_DIRS "."
+                    REQUIRES boards tinyusb_src)
diff --git a/examples/dual/dynamic_switch/src/main.c b/examples/dual/dynamic_switch/src/main.c
new file mode 100644
index 000000000..bc9dabc66
--- /dev/null
+++ b/examples/dual/dynamic_switch/src/main.c
@@ -0,0 +1,494 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+/* This example demonstrates dynamic switching between device and host modes:
+ * - Press button to switch between device and host modes
+ * - Device mode: CDC echo (echoes input back to output)
+ * - Host mode: Prints connected device information
+ */
+
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  #ifdef ESP_PLATFORM
+    #define USBD_STACK_SIZE     4096
+    #define USBH_STACK_SIZE     4096
+  #else
+    // Increase stack size when debug log is enabled
+    #define USBD_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
+    #define USBH_STACK_SIZE    (3*configMINIMAL_STACK_SIZE/2) * (CFG_TUSB_DEBUG ? 2 : 1)
+  #endif
+
+  #define CDC_STACK_SIZE      (configMINIMAL_STACK_SIZE * (CFG_TUSB_DEBUG ? 2 : 1))
+  #define BLINKY_STACK_SIZE   configMINIMAL_STACK_SIZE
+#endif
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF PROTOTYPES
+//--------------------------------------------------------------------+
+
+// English
+#define LANGUAGE_ID 0x0409
+
+/* Blink pattern
+ * - 250 ms  : not mounted
+ * - 1000 ms : mounted
+ * - 2500 ms : suspended
+ */
+enum {
+  BLINK_NOT_MOUNTED = 250,
+  BLINK_MOUNTED = 1000,
+  BLINK_SUSPENDED = 2500,
+};
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+// static task for FreeRTOS
+#if configSUPPORT_STATIC_ALLOCATION
+StackType_t blinky_stack[BLINKY_STACK_SIZE];
+StaticTask_t blinky_taskdef;
+
+StackType_t usb_stack[USBD_STACK_SIZE > USBH_STACK_SIZE ? USBD_STACK_SIZE : USBH_STACK_SIZE];
+StaticTask_t usb_taskdef;
+
+StackType_t cdc_stack[CDC_STACK_SIZE];
+StaticTask_t cdc_taskdef;
+#endif
+#endif
+
+static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
+static tusb_role_t current_role = TUSB_ROLE_DEVICE;
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+static void usb_task(void *param);
+void led_blinking_task(void *param);
+void cdc_task(void *params);
+#else
+void led_blinking_task(void);
+void cdc_task(void);
+#endif
+void usb_mode_switch(void);
+static void print_device_info(uint8_t daddr);
+static void print_utf16(uint16_t* temp_buf, size_t buf_len);
+
+// Declare buffer for USB transfer
+CFG_TUH_MEM_SECTION struct {
+  TUH_EPBUF_TYPE_DEF(tusb_desc_device_t, device);
+  TUH_EPBUF_DEF(serial, 64*sizeof(uint16_t));
+  TUH_EPBUF_DEF(buf, 128*sizeof(uint16_t));
+} desc;
+
+//--------------------------------------------------------------------+
+// Main
+//--------------------------------------------------------------------+
+
+int main(void) {
+  board_init();
+
+  printf("\r\n======================================\r\n");
+  printf("TinyUSB Dynamic Switch Example\r\n");
+  printf("Press button to switch between device and host modes\r\n");
+  printf("Starting in DEVICE mode...\r\n");
+  printf("======================================\r\n\r\n");
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Create FreeRTOS tasks
+#if configSUPPORT_STATIC_ALLOCATION
+  xTaskCreateStatic(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, blinky_stack, &blinky_taskdef);
+  xTaskCreateStatic(usb_task, "usb", USBD_STACK_SIZE > USBH_STACK_SIZE ? USBD_STACK_SIZE : USBH_STACK_SIZE,
+                    NULL, configMAX_PRIORITIES-1, usb_stack, &usb_taskdef);
+  xTaskCreateStatic(cdc_task, "cdc", CDC_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, cdc_stack, &cdc_taskdef);
+#else
+  xTaskCreate(led_blinking_task, "blinky", BLINKY_STACK_SIZE, NULL, 1, NULL);
+  xTaskCreate(usb_task, "usb", USBD_STACK_SIZE > USBH_STACK_SIZE ? USBD_STACK_SIZE : USBH_STACK_SIZE,
+              NULL, configMAX_PRIORITIES - 1, NULL);
+  xTaskCreate(cdc_task, "cdc", CDC_STACK_SIZE, NULL, configMAX_PRIORITIES - 2, NULL);
+#endif
+
+#ifndef ESP_PLATFORM
+  // only start scheduler for non-espressif mcu
+  vTaskStartScheduler();
+#endif
+
+#else
+  // Initialize in device mode by default
+  tusb_rhport_init_t dev_init = {
+    .role = TUSB_ROLE_DEVICE,
+    .speed = TUSB_SPEED_AUTO
+  };
+  tusb_init(BOARD_RHPORT, &dev_init);
+  current_role = TUSB_ROLE_DEVICE;
+
+  board_init_after_tusb();
+
+  while (1) {
+    // Check for button press to switch modes
+    static bool pending_switch = false;
+    if (board_button_read()) {
+      if (!pending_switch) {
+        pending_switch = true;
+        usb_mode_switch();
+      }
+    } else {
+      pending_switch = false;
+    }
+
+    // Process USB tasks based on current mode
+    if (current_role == TUSB_ROLE_DEVICE) {
+      tud_task();
+      cdc_task();
+    } else {
+      tuh_task();
+    }
+
+    led_blinking_task();
+  }
+#endif
+}
+
+#ifdef ESP_PLATFORM
+void app_main(void) {
+  main();
+}
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+// USB Task for FreeRTOS
+// This top level thread processes all usb events and mode switching
+static void usb_task(void *param) {
+  (void) param;
+
+  // init device stack on configured roothub port
+  // This should be called after scheduler/kernel is started.
+  // Otherwise it could cause kernel issue since USB IRQ handler does use RTOS queue API.
+  tusb_rhport_init_t dev_init = {
+    .role = TUSB_ROLE_DEVICE,
+    .speed = TUSB_SPEED_AUTO
+  };
+  tusb_init(BOARD_RHPORT, &dev_init);
+  current_role = TUSB_ROLE_DEVICE;
+
+  board_init_after_tusb();
+
+  // RTOS forever loop
+  while (1) {
+    // Check for button press to switch modes
+    static bool pending_switch = false;
+    if (board_button_read()) {
+      if (!pending_switch) {
+        pending_switch = true;
+        usb_mode_switch();
+      }
+    } else {
+      pending_switch = false;
+    }
+
+    // Process USB tasks based on current mode
+    // Use _ext version to allow return and read button state
+    if (current_role == TUSB_ROLE_DEVICE) {
+      tud_task_ext(10, false);
+    } else {
+      tuh_task_ext(10, false);
+    }
+  }
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Mode Switching
+//--------------------------------------------------------------------+
+
+void usb_mode_switch(void) {
+  printf("\r\n--- Switching USB mode ---\r\n");
+
+  // Deinitialize current mode
+  if (current_role == TUSB_ROLE_DEVICE) {
+    printf("Stopping DEVICE mode...\r\n");
+    tusb_deinit(BOARD_RHPORT);
+  } else {
+    printf("Stopping HOST mode...\r\n");
+    tusb_deinit(BOARD_RHPORT);
+  }
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  vTaskDelay(pdMS_TO_TICKS(100)); // Small delay for clean transition
+#else
+  tusb_time_delay_ms_api(100); // Small delay for clean transition
+#endif  // Switch to the other mode
+  if (current_role == TUSB_ROLE_DEVICE) {
+    printf("Starting HOST mode...\r\n");
+    tusb_rhport_init_t host_init = {
+      .role = TUSB_ROLE_HOST,
+      .speed = TUSB_SPEED_AUTO
+    };
+    tusb_init(BOARD_RHPORT, &host_init);
+    current_role = TUSB_ROLE_HOST;
+  } else {
+    printf("Starting DEVICE mode...\r\n");
+    tusb_rhport_init_t dev_init = {
+      .role = TUSB_ROLE_DEVICE,
+      .speed = TUSB_SPEED_AUTO
+    };
+    tusb_init(BOARD_RHPORT, &dev_init);
+    current_role = TUSB_ROLE_DEVICE;
+  }
+
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+  printf("Mode switch complete!\r\n\r\n");
+}
+
+//--------------------------------------------------------------------+
+// Device Mode: CDC Task
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+void cdc_task(void *params) {
+  (void) params;
+
+  // RTOS forever loop
+  while (1) {
+    // Only process CDC when in device mode
+    if (current_role == TUSB_ROLE_DEVICE) {
+      // Connected and there are data available
+      while (tud_cdc_available()) {
+        uint8_t buf[64];
+
+        // Read data
+        uint32_t count = tud_cdc_read(buf, sizeof(buf));
+
+        // Echo back
+        tud_cdc_write(buf, count);
+
+        // Add newline for carriage return
+        for (uint32_t i = 0; i < count; i++) {
+          if (buf[i] == '\r') {
+            tud_cdc_write_char('\n');
+            break;
+          }
+        }
+      }
+
+      tud_cdc_write_flush();
+    }
+
+    vTaskDelay(pdMS_TO_TICKS(10));
+  }
+}
+#else
+void cdc_task(void) {
+  // Connected and there are data available
+  if (tud_cdc_available()) {
+    uint8_t buf[64];
+
+    // Read data
+    uint32_t count = tud_cdc_read(buf, sizeof(buf));
+
+    // Echo back
+    for (uint32_t i = 0; i < count; i++) {
+      tud_cdc_write_char(buf[i]);
+
+      if (buf[i] == '\r') {
+        tud_cdc_write_char('\n');
+      }
+    }
+
+    tud_cdc_write_flush();
+  }
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Device Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device is mounted
+void tud_mount_cb(void) {
+  printf("[DEVICE] Mounted\r\n");
+  blink_interval_ms = BLINK_MOUNTED;
+}
+
+// Invoked when device is unmounted
+void tud_umount_cb(void) {
+  printf("[DEVICE] Unmounted\r\n");
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+}
+
+// Invoked when usb bus is suspended
+void tud_suspend_cb(bool remote_wakeup_en) {
+  (void) remote_wakeup_en;
+  printf("[DEVICE] Suspended\r\n");
+  blink_interval_ms = BLINK_SUSPENDED;
+}
+
+// Invoked when usb bus is resumed
+void tud_resume_cb(void) {
+  printf("[DEVICE] Resumed\r\n");
+  blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
+}
+
+//--------------------------------------------------------------------+
+// Host Callbacks
+//--------------------------------------------------------------------+
+
+// Invoked when device is mounted (configured)
+void tuh_mount_cb(uint8_t daddr) {
+  printf("[HOST] Device attached, address = %d\r\n", daddr);
+  blink_interval_ms = BLINK_MOUNTED;
+  print_device_info(daddr);
+}
+
+// Invoked when device is unmounted (unplugged)
+void tuh_umount_cb(uint8_t daddr) {
+  printf("[HOST] Device removed, address = %d\r\n", daddr);
+  blink_interval_ms = BLINK_NOT_MOUNTED;
+}
+
+//--------------------------------------------------------------------+
+// Host Device Info
+//--------------------------------------------------------------------+
+
+static void print_device_info(uint8_t daddr) {
+  // Get Device Descriptor
+  uint8_t xfer_result = tuh_descriptor_get_device_sync(daddr, &desc.device, 18);
+  if (XFER_RESULT_SUCCESS != xfer_result) {
+    printf("Failed to get device descriptor\r\n");
+    return;
+  }
+
+  printf("Device %u: ID %04x:%04x SN ", daddr, desc.device.idVendor, desc.device.idProduct);
+
+  xfer_result = XFER_RESULT_FAILED;
+  if (desc.device.iSerialNumber != 0) {
+    xfer_result = tuh_descriptor_get_serial_string_sync(daddr, LANGUAGE_ID, desc.serial, sizeof(desc.serial));
+  }
+  if (XFER_RESULT_SUCCESS != xfer_result) {
+    uint16_t* serial = (uint16_t*)(uintptr_t) desc.serial;
+    serial[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * 3 + 2));
+    serial[1] = 'n';
+    serial[2] = '/';
+    serial[3] = 'a';
+    serial[4] = 0;
+  }
+  print_utf16((uint16_t*)(uintptr_t) desc.serial, sizeof(desc.serial)/2);
+  printf("\r\n");
+
+  printf("Device Descriptor:\r\n");
+  printf("  bLength             %u\r\n", desc.device.bLength);
+  printf("  bDescriptorType     %u\r\n", desc.device.bDescriptorType);
+  printf("  bcdUSB              %04x\r\n", desc.device.bcdUSB);
+  printf("  bDeviceClass        %u\r\n", desc.device.bDeviceClass);
+  printf("  bDeviceSubClass     %u\r\n", desc.device.bDeviceSubClass);
+  printf("  bDeviceProtocol     %u\r\n", desc.device.bDeviceProtocol);
+  printf("  bMaxPacketSize0     %u\r\n", desc.device.bMaxPacketSize0);
+  printf("  idVendor            0x%04x\r\n", desc.device.idVendor);
+  printf("  idProduct           0x%04x\r\n", desc.device.idProduct);
+  printf("  bcdDevice           %04x\r\n", desc.device.bcdDevice);
+
+  // Get Manufacturer string
+  if (desc.device.iManufacturer) {
+    if (XFER_RESULT_SUCCESS == tuh_descriptor_get_manufacturer_string_sync(daddr, LANGUAGE_ID, desc.buf, sizeof(desc.buf))) {
+      printf("  iManufacturer       %u     ", desc.device.iManufacturer);
+      print_utf16((uint16_t*)(uintptr_t) desc.buf, sizeof(desc.buf)/2);
+      printf("\r\n");
+    }
+  }
+
+  // Get Product string
+  if (desc.device.iProduct) {
+    if (XFER_RESULT_SUCCESS == tuh_descriptor_get_product_string_sync(daddr, LANGUAGE_ID, desc.buf, sizeof(desc.buf))) {
+      printf("  iProduct            %u     ", desc.device.iProduct);
+      print_utf16((uint16_t*)(uintptr_t) desc.buf, sizeof(desc.buf)/2);
+      printf("\r\n");
+    }
+  }
+
+  // Get Serial string
+  if (desc.device.iSerialNumber) {
+    printf("  iSerialNumber       %u     ", desc.device.iSerialNumber);
+    print_utf16((uint16_t*)(uintptr_t) desc.serial, sizeof(desc.serial)/2);
+    printf("\r\n");
+  } else {
+    printf("  iSerialNumber       0\r\n");
+  }
+
+  printf("  bNumConfigurations  %u\r\n", desc.device.bNumConfigurations);
+  printf("\r\n");
+}
+
+static void print_utf16(uint16_t* temp_buf, size_t buf_len) {
+  if (temp_buf[0] == 0 || (temp_buf[0] >> 8) != TUSB_DESC_STRING) {
+    printf("(invalid)");
+    return;
+  }
+
+  size_t chr_count = (temp_buf[0] & 0xff) / 2 - 1;
+  if (chr_count > buf_len - 1) {
+    chr_count = buf_len - 1;
+  }
+
+  for (size_t i = 0; i < chr_count; i++) {
+    uint16_t ch = temp_buf[1 + i];
+    if (ch <= 0x7F) {
+      putchar((char) ch);
+    } else {
+      // TODO support UTF16 to UTF8 conversion
+      putchar('?');
+    }
+  }
+}
+
+//--------------------------------------------------------------------+
+// Blinking Task
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+void led_blinking_task(void *param) {
+  (void) param;
+  static bool led_state = false;
+
+  // RTOS forever loop
+  while (1) {
+    board_led_write(led_state);
+    led_state = 1 - led_state; // toggle
+    vTaskDelay(pdMS_TO_TICKS(blink_interval_ms));
+  }
+}
+#else
+void led_blinking_task(void) {
+  static uint32_t start_ms = 0;
+  static bool led_state = false;
+
+  // Blink every interval ms
+  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  start_ms += blink_interval_ms;
+
+  board_led_write(led_state);
+  led_state = 1 - led_state; // toggle
+}
+#endif
diff --git a/examples/dual/dynamic_switch/src/tusb_config.h b/examples/dual/dynamic_switch/src/tusb_config.h
new file mode 100644
index 000000000..af0d55f14
--- /dev/null
+++ b/examples/dual/dynamic_switch/src/tusb_config.h
@@ -0,0 +1,158 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#ifndef _TUSB_CONFIG_H_
+#define _TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Board Specific Configuration
+//--------------------------------------------------------------------+
+
+// RHPort number used can be defined by board.mk, default to port 0
+#ifndef BOARD_RHPORT
+  #if defined(BOARD_TUD_RHPORT)
+    #define BOARD_RHPORT BOARD_TUD_RHPORT
+  #else
+    #define BOARD_RHPORT 0
+    #define BOARD_TUD_RHPORT 0
+  #endif
+#endif
+
+#if defined(BOARD_TUH_RHPORT)
+  #if BOARD_TUH_RHPORT != BOARD_RHPORT
+    #undef BOARD_TUH_RHPORT
+    #define BOARD_TUH_RHPORT BOARD_RHPORT
+  #endif
+#else
+  #define BOARD_TUH_RHPORT BOARD_RHPORT
+#endif
+
+// RHPort max operational speed can defined by board.mk
+#ifndef BOARD_MAX_SPEED
+  #if defined(BOARD_TUD_MAX_SPEED)
+    #define BOARD_MAX_SPEED BOARD_TUD_MAX_SPEED
+  #else
+    #define BOARD_MAX_SPEED OPT_MODE_DEFAULT_SPEED
+  #endif
+#endif
+
+//--------------------------------------------------------------------
+// COMMON CONFIGURATION
+//--------------------------------------------------------------------
+
+// defined by compiler flags for flexibility
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS OPT_OS_NONE
+#endif
+
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG 0
+#endif
+
+// Enable Device and Host stacks (dual role)
+#define CFG_TUD_ENABLED 1
+#define CFG_TUH_ENABLED 1
+
+// Default is max speed that hardware controller could support with on-chip PHY
+#define CFG_TUD_MAX_SPEED BOARD_MAX_SPEED
+#define CFG_TUH_MAX_SPEED BOARD_MAX_SPEED
+
+/* USB DMA on some MCUs can only access a specific SRAM region with restriction on alignment.
+ * Tinyusb use follows macros to declare transferring memory so that they can be put
+ * into those specific section.
+ * e.g
+ * - CFG_TUSB_MEM SECTION : __attribute__ (( section(".usb_ram") ))
+ * - CFG_TUSB_MEM_ALIGN   : __attribute__ ((aligned(4)))
+ */
+#ifndef CFG_TUD_MEM_SECTION
+#define CFG_TUD_MEM_SECTION
+#endif
+
+#ifndef CFG_TUD_MEM_ALIGN
+#define CFG_TUD_MEM_ALIGN __attribute__((aligned(4)))
+#endif
+
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION CFG_TUD_MEM_SECTION
+#endif
+
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN CFG_TUD_MEM_ALIGN
+#endif
+
+//--------------------------------------------------------------------
+// DEVICE CONFIGURATION
+//--------------------------------------------------------------------
+
+#ifndef CFG_TUD_ENDPOINT0_SIZE
+#define CFG_TUD_ENDPOINT0_SIZE 64
+#endif
+
+//------------- CLASS -------------//
+#define CFG_TUD_CDC 1
+#define CFG_TUD_MSC 0
+#define CFG_TUD_HID 0
+#define CFG_TUD_MIDI 0
+#define CFG_TUD_VENDOR 0
+
+// CDC FIFO size of TX and RX
+#define CFG_TUD_CDC_RX_BUFSIZE   (TUD_OPT_HIGH_SPEED ? 512 : 64)
+#define CFG_TUD_CDC_TX_BUFSIZE   (TUD_OPT_HIGH_SPEED ? 512 : 64)
+
+// CDC Endpoint transfer buffer size, more is faster
+#define CFG_TUD_CDC_EP_BUFSIZE   (TUD_OPT_HIGH_SPEED ? 512 : 64)
+
+//--------------------------------------------------------------------
+// HOST CONFIGURATION
+//--------------------------------------------------------------------
+
+// Size of buffer to hold descriptors and other data used for enumeration
+#define CFG_TUH_ENUMERATION_BUFSIZE 256
+
+#define CFG_TUH_HUB 1
+// max device support (excluding hub device)
+#define CFG_TUH_DEVICE_MAX (CFG_TUH_HUB ? 4 : 1) // hub typically has 4 ports
+
+#define CFG_TUH_CDC 0
+#define CFG_TUH_HID 0
+#define CFG_TUH_MSC 0
+#define CFG_TUH_VENDOR 0
+
+// max endpoint pair supported by each device
+#define CFG_TUH_ENDPOINT_MAX 16
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TUSB_CONFIG_H_ */
diff --git a/examples/dual/dynamic_switch/src/usb_descriptors.c b/examples/dual/dynamic_switch/src/usb_descriptors.c
new file mode 100644
index 000000000..54ffc2c18
--- /dev/null
+++ b/examples/dual/dynamic_switch/src/usb_descriptors.c
@@ -0,0 +1,199 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ */
+
+#include "bsp/board_api.h"
+#include "tusb.h"
+
+/* A combination of interfaces must have a unique product id, since PC will save device driver after the first plug.
+ * Same VID/PID with different interface e.g MSC (first), then CDC (later) will possibly cause system error on PC.
+ *
+ * Auto ProductID layout's Bitmap:
+ *   [MSB]     AUDIO | MIDI | HID | MSC | CDC          [LSB]
+ */
+#define PID_MAP(itf, n) ((CFG_TUD_##itf) ? (1 << (n)) : 0)
+#define USB_PID (0x4000 | PID_MAP(CDC, 0) | PID_MAP(MSC, 1) | PID_MAP(HID, 2) | \
+                 PID_MAP(MIDI, 3) | PID_MAP(VENDOR, 4))
+
+#define USB_VID   0xCafe
+#define USB_BCD   0x0200
+
+//--------------------------------------------------------------------+
+// Device Descriptors
+//--------------------------------------------------------------------+
+static tusb_desc_device_t const desc_device = {
+  .bLength            = sizeof(tusb_desc_device_t),
+  .bDescriptorType    = TUSB_DESC_DEVICE,
+  .bcdUSB             = USB_BCD,
+  .bDeviceClass       = TUSB_CLASS_MISC,
+  .bDeviceSubClass    = MISC_SUBCLASS_COMMON,
+  .bDeviceProtocol    = MISC_PROTOCOL_IAD,
+
+  .bMaxPacketSize0    = CFG_TUD_ENDPOINT0_SIZE,
+
+  .idVendor           = USB_VID,
+  .idProduct          = USB_PID,
+  .bcdDevice          = 0x0100,
+
+  .iManufacturer      = 0x01,
+  .iProduct           = 0x02,
+  .iSerialNumber      = 0x03,
+
+  .bNumConfigurations = 0x01
+};
+
+// Invoked when received GET DEVICE DESCRIPTOR
+// Application return pointer to descriptor
+uint8_t const *tud_descriptor_device_cb(void) {
+  return (uint8_t const *) &desc_device;
+}
+
+//--------------------------------------------------------------------+
+// Configuration Descriptor
+//--------------------------------------------------------------------+
+
+enum {
+  ITF_NUM_CDC = 0,
+  ITF_NUM_CDC_DATA,
+  ITF_NUM_TOTAL
+};
+
+#if CFG_TUSB_MCU == OPT_MCU_LPC175X_6X || CFG_TUSB_MCU == OPT_MCU_LPC177X_8X || CFG_TUSB_MCU == OPT_MCU_LPC40XX
+  // LPC 17xx and 40xx endpoint type (bulk/interrupt/iso) are fixed by its number
+  // 0 control, 1 In, 2 Bulk, 3 Iso, 4 In, 5 Bulk etc ...
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x82
+
+#elif defined(TUD_ENDPOINT_ONE_DIRECTION_ONLY)
+  // MCUs that don't support a same endpoint number with different direction IN and OUT defined in tusb_mcu.h
+  //    e.g EP1 OUT & EP1 IN cannot exist together
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x83
+
+#else
+  #define EPNUM_CDC_NOTIF   0x81
+  #define EPNUM_CDC_OUT     0x02
+  #define EPNUM_CDC_IN      0x82
+
+#endif
+
+#define CONFIG_TOTAL_LEN (TUD_CONFIG_DESC_LEN + TUD_CDC_DESC_LEN)
+
+static uint8_t const desc_fs_configuration[] = {
+  // Config number, interface count, string index, total length, attribute, power in mA
+  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
+
+  // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 64),
+};
+
+#if TUD_OPT_HIGH_SPEED
+static uint8_t const desc_hs_configuration[] = {
+  // Config number, interface count, string index, total length, attribute, power in mA
+  TUD_CONFIG_DESCRIPTOR(1, ITF_NUM_TOTAL, 0, CONFIG_TOTAL_LEN, TUSB_DESC_CONFIG_ATT_REMOTE_WAKEUP, 100),
+
+  // Interface number, string index, EP notification address and size, EP data address (out, in) and size.
+  TUD_CDC_DESCRIPTOR(ITF_NUM_CDC, 4, EPNUM_CDC_NOTIF, 8, EPNUM_CDC_OUT, EPNUM_CDC_IN, 512),
+};
+#endif
+
+// Invoked when received GET CONFIGURATION DESCRIPTOR
+// Application return pointer to descriptor
+// Descriptor contents must exist long enough for transfer to complete
+uint8_t const *tud_descriptor_configuration_cb(uint8_t index) {
+  (void) index; // for multiple configurations
+
+#if TUD_OPT_HIGH_SPEED
+  // Although we are highspeed, host may be fullspeed.
+  return (tud_speed_get() == TUSB_SPEED_HIGH) ? desc_hs_configuration : desc_fs_configuration;
+#else
+  return desc_fs_configuration;
+#endif
+}
+
+//--------------------------------------------------------------------+
+// String Descriptors
+//--------------------------------------------------------------------+
+
+// String Descriptor Index
+enum {
+  STRID_LANGID = 0,
+  STRID_MANUFACTURER,
+  STRID_PRODUCT,
+  STRID_SERIAL,
+};
+
+// array of pointer to string descriptors
+static char const *string_desc_arr[] = {
+  (const char[]) { 0x09, 0x04 }, // 0: is supported language is English (0x0409)
+  "TinyUSB",                     // 1: Manufacturer
+  "TinyUSB Device",              // 2: Product
+  NULL,                          // 3: Serials, will use unique ID if possible
+  "TinyUSB CDC",                 // 4: CDC Interface
+};
+
+static uint16_t _desc_str[32 + 1];
+
+// Invoked when received GET STRING DESCRIPTOR request
+// Application return pointer to descriptor, whose contents must exist long enough for transfer to complete
+uint16_t const *tud_descriptor_string_cb(uint8_t index, uint16_t langid) {
+  (void) langid;
+  size_t chr_count;
+
+  switch (index) {
+    case STRID_LANGID:
+      memcpy(&_desc_str[1], string_desc_arr[0], 2);
+      chr_count = 1;
+      break;
+
+    case STRID_SERIAL:
+      chr_count = board_usb_get_serial(_desc_str + 1, 32);
+      break;
+
+    default:
+      // Note: the 0xEE index string is a Microsoft OS 1.0 Descriptors.
+      // https://docs.microsoft.com/en-us/windows-hardware/drivers/usbcon/microsoft-defined-usb-descriptors
+
+      if (!(index < sizeof(string_desc_arr) / sizeof(string_desc_arr[0]))) { return NULL; }
+
+      const char *str = string_desc_arr[index];
+
+      // Cap at max char
+      chr_count = strlen(str);
+      size_t const max_count = sizeof(_desc_str) / sizeof(_desc_str[0]) - 1; // -1 for string type
+      if (chr_count > max_count) { chr_count = max_count; }
+
+      // Convert ASCII string into UTF-16
+      for (size_t i = 0; i < chr_count; i++) {
+        _desc_str[1 + i] = str[i];
+      }
+      break;
+  }
+
+  // first byte is length (including header), second byte is string type
+  _desc_str[0] = (uint16_t) ((TUSB_DESC_STRING << 8) | (2 * chr_count + 2));
+  return _desc_str;
+}
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index 8ea8ec5a5..9c78cf7dd 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -36,7 +36,7 @@
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
 void OTG_FS_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
index 4fb72cce8..58adf2664 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
@@ -62,7 +62,7 @@ static board_pindef_t board_pindef[] = {
   { // Button
     .port = GPIOC,
     .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_FREQ_HIGH, .Alternate = 0 },
-    .active_state = 1
+    .active_state = 0
   },
   { // UART TX
     .port = GPIOD,
-- 
cgit v1.3.1


From 8302adfab8727896c4a10935a15c32fbdcba3b8e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 27 Feb 2026 22:40:16 +0700
Subject: update h743eval board settings for tracing

---
 hw/bsp/stm32h7/boards/stm32h743eval/board.h                | 10 +++++-----
 .../stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc  | 14 +++++++-------
 hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug | 10 +++++-----
 3 files changed, 17 insertions(+), 17 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 44ca58dc5..0f0eb4ed3 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -120,13 +120,13 @@ static inline void SystemClock_Config(void) {
   // From H743 eval manual ETM can only work at 50 MHz clock by default because ETM signals
   // are shared with other peripherals. Trace CLK = PLL1R.
   RCC_OscInitStruct.PLL.PLLM = 5;
-  RCC_OscInitStruct.PLL.PLLN = 160;
-  RCC_OscInitStruct.PLL.PLLP = 2;
-  RCC_OscInitStruct.PLL.PLLQ = 4;
-  RCC_OscInitStruct.PLL.PLLR = 6; // Trace clock is 400/6 = 66.67 MHz (larger than 50 MHz but work well)
+  RCC_OscInitStruct.PLL.PLLN      = 160; // May reduce to 200 Mhz when tracing to avoid overflowing trace buffer
+  RCC_OscInitStruct.PLL.PLLP      = 2;
+  RCC_OscInitStruct.PLL.PLLQ      = 4;
+  RCC_OscInitStruct.PLL.PLLR      = 16;  // Trace clock is limit to 50 Mhz to meet board requirement
+  RCC_OscInitStruct.PLL.PLLRGE    = RCC_PLL1VCIRANGE_2;
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
   RCC_OscInitStruct.PLL.PLLFRACN = 0;
-  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
 
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
index 0e5a4cc00..a2e11012f 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/cubemx/stm32h743eval.ioc
@@ -193,8 +193,8 @@ Mcu.PinsNb=169
 Mcu.ThirdPartyNb=0
 Mcu.UserConstants=
 Mcu.UserName=STM32H743XIHx
-MxCube.Version=6.10.0
-MxDb.Version=DB.6.0.100
+MxCube.Version=6.12.1
+MxDb.Version=DB.6.0.121
 NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:true\:false\:false
 NVIC.ForceEnableDMAVector=true
@@ -880,12 +880,12 @@ ProjectManager.CustomerFirmwarePackage=
 ProjectManager.DefaultFWLocation=true
 ProjectManager.DeletePrevious=true
 ProjectManager.DeviceId=STM32H743XIHx
-ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.0
+ProjectManager.FirmwarePackage=STM32Cube FW_H7 V1.11.2
 ProjectManager.FreePins=false
 ProjectManager.HalAssertFull=false
 ProjectManager.HeapSize=0x200
 ProjectManager.KeepUserCode=true
-ProjectManager.LastFirmware=false
+ProjectManager.LastFirmware=true
 ProjectManager.LibraryCopy=2
 ProjectManager.MainLocation=Src
 ProjectManager.NoMain=false
@@ -933,8 +933,8 @@ RCC.DIVQ1Freq_Value=200000000
 RCC.DIVQ2Freq_Value=50390625
 RCC.DIVQ3=7
 RCC.DIVQ3Freq_Value=48000000
-RCC.DIVR1=6
-RCC.DIVR1Freq_Value=133333333.33333333
+RCC.DIVR1=8
+RCC.DIVR1Freq_Value=100000000
 RCC.DIVR2Freq_Value=50390625
 RCC.DIVR3Freq_Value=168000000
 RCC.EnbaleCSS=true
@@ -979,7 +979,7 @@ RCC.SYSCLKFreq_VALUE=400000000
 RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
 RCC.Tim1OutputFreq_Value=200000000
 RCC.Tim2OutputFreq_Value=200000000
-RCC.TraceFreq_Value=133333333.33333333
+RCC.TraceFreq_Value=100000000
 RCC.USART16Freq_Value=100000000
 RCC.USART234578Freq_Value=100000000
 RCC.USBCLockSelection=RCC_USBCLKSOURCE_PLL3
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
index 0ab078319..32a8155c1 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/ozone/stm32h743.jdebug
@@ -9,6 +9,10 @@
 **********************************************************************
 */
 void OnProjectLoad (void) {
+   Project.SetTraceSource ("Trace Pins");
+  Project.SetTraceTiming (100, 100, 100, 100);
+  Project.SetSWO (0);
+  Edit.SysVar (VAR_TRACE_CORE_CLOCK, 200000000);
   Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
   Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
   Project.AddSvdFile ("./STM32H743.svd");
@@ -18,12 +22,8 @@ void OnProjectLoad (void) {
   Project.SetTargetIF ("SWD");
   Project.SetTIFSpeed ("50 MHz");
 
-  Project.SetTraceSource ("Trace Pins");
-  Project.SetTracePortWidth (4);
-  // timing delay for trace pins in pico seconds, default is 2 nano seconds
-  Project.SetTraceTiming (100, 100, 100, 100);
-
   File.Open ("../../../../../../examples/device/cdc_msc/cmake-build-stm32h743eval/cdc_msc.elf");
+  // File.Open ("../../../../../../examples/cmake-build-stm32h743eval_host1/host/cdc_msc_hid/cdc_msc_hid.elf");
 }
 
 /*********************************************************************
-- 
cgit v1.3.1


From 8444c25ab6bc841bad81fd04afc1e66a9d57a115 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 27 Feb 2026 23:51:36 +0700
Subject: replace board_millis() with tusb_time_millis_api()

---
 examples/device/audio_4_channel_mic/src/main.c    |  4 +--
 examples/device/audio_test/src/main.c             |  4 +--
 examples/device/audio_test_multi_rate/src/main.c  |  4 +--
 examples/device/board_test/src/main.c             |  4 +--
 examples/device/cdc_dual_ports/src/main.c         |  2 +-
 examples/device/cdc_msc/src/main.c                |  2 +-
 examples/device/cdc_uac2/src/uac2_app.c           |  4 +--
 examples/device/dfu/src/main.c                    |  2 +-
 examples/device/dfu_runtime/src/main.c            |  2 +-
 examples/device/dynamic_configuration/src/main.c  |  4 +--
 examples/device/hid_boot_interface/src/main.c     |  4 +--
 examples/device/hid_composite/src/main.c          |  4 +--
 examples/device/hid_generic_inout/src/main.c      |  2 +-
 examples/device/hid_multiple_interface/src/main.c |  4 +--
 examples/device/midi_test/src/main.c              |  4 +--
 examples/device/msc_dual_lun/src/main.c           |  2 +-
 examples/device/mtp/src/main.c                    |  2 +-
 examples/device/net_lwip_webserver/src/main.c     |  2 +-
 examples/device/uac2_headset/src/main.c           |  6 ++--
 examples/device/uac2_speaker_fb/src/main.c        |  6 ++--
 examples/device/usbtmc/src/main.c                 |  6 ++--
 examples/device/usbtmc/src/usbtmc_app.c           |  8 ++---
 examples/device/video_capture/src/main.c          |  6 ++--
 examples/device/video_capture_2ch/src/main.c      |  6 ++--
 examples/device/webusb_serial/src/main.c          |  2 +-
 examples/dual/host_hid_to_device_cdc/src/main.c   |  2 +-
 examples/dual/host_info_to_device_cdc/src/main.c  |  6 ++--
 examples/host/bare_api/src/main.c                 |  2 +-
 examples/host/cdc_msc_hid/src/main.c              |  2 +-
 examples/host/device_info/src/main.c              |  2 +-
 examples/host/hid_controller/src/hid_app.c        |  2 +-
 examples/host/hid_controller/src/main.c           |  2 +-
 examples/host/midi_rx/src/main.c                  |  2 +-
 examples/host/msc_file_explorer/src/main.c        |  2 +-
 examples/typec/power_delivery/src/main.c          |  2 +-
 hw/bsp/at32f402_405/family.c                      |  2 +-
 hw/bsp/at32f403a_407/family.c                     |  2 +-
 hw/bsp/at32f413/family.c                          |  2 +-
 hw/bsp/at32f415/family.c                          |  2 +-
 hw/bsp/at32f423/family.c                          |  2 +-
 hw/bsp/at32f425/family.c                          |  2 +-
 hw/bsp/at32f435_437/family.c                      |  2 +-
 hw/bsp/at32f45x/family.c                          |  2 +-
 hw/bsp/board.c                                    |  4 ---
 hw/bsp/board_api.h                                | 41 ++---------------------
 hw/bsp/broadcom_32bit/family.c                    |  2 +-
 hw/bsp/broadcom_64bit/family.c                    |  2 +-
 hw/bsp/brtmm90x/family.c                          |  2 +-
 hw/bsp/ch32f20x/family.c                          |  2 +-
 hw/bsp/ch32v10x/family.c                          |  2 +-
 hw/bsp/ch32v20x/family.c                          |  2 +-
 hw/bsp/ch32v30x/family.c                          |  2 +-
 hw/bsp/cxd56/family.c                             |  2 +-
 hw/bsp/da1469x/family.c                           |  2 +-
 hw/bsp/efm32/family.c                             |  2 +-
 hw/bsp/f1c100s/family.c                           |  2 +-
 hw/bsp/fomu/family.c                              |  2 +-
 hw/bsp/gd32vf103/family.c                         |  2 +-
 hw/bsp/hpmicro/family.c                           |  2 +-
 hw/bsp/imxrt/family.c                             |  2 +-
 hw/bsp/kinetis_k/family.c                         |  2 +-
 hw/bsp/kinetis_k32l2/family.c                     |  2 +-
 hw/bsp/kinetis_kl/family.c                        |  2 +-
 hw/bsp/lpc11/family.c                             |  2 +-
 hw/bsp/lpc13/family.c                             |  2 +-
 hw/bsp/lpc15/family.c                             |  2 +-
 hw/bsp/lpc17/family.c                             |  2 +-
 hw/bsp/lpc18/family.c                             |  2 +-
 hw/bsp/lpc40/family.c                             |  2 +-
 hw/bsp/lpc43/family.c                             |  2 +-
 hw/bsp/lpc51/family.c                             |  2 +-
 hw/bsp/lpc54/family.c                             |  2 +-
 hw/bsp/lpc55/family.c                             |  2 +-
 hw/bsp/maxim/family.c                             |  2 +-
 hw/bsp/mcx/family.c                               |  2 +-
 hw/bsp/mm32/family.c                              |  2 +-
 hw/bsp/msp430/family.c                            | 10 +++---
 hw/bsp/msp432e4/family.c                          |  2 +-
 hw/bsp/nrf/family.c                               |  2 +-
 hw/bsp/nuc100_120/family.c                        |  2 +-
 hw/bsp/nuc121_125/family.c                        |  2 +-
 hw/bsp/nuc126/family.c                            |  2 +-
 hw/bsp/nuc505/family.c                            |  2 +-
 hw/bsp/pic32mz/family.c                           |  2 +-
 hw/bsp/ra/family.c                                |  2 +-
 hw/bsp/rw61x/family.c                             |  2 +-
 hw/bsp/rx/boards/gr_citrus/gr_citrus.c            |  2 +-
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c      |  2 +-
 hw/bsp/samd11/family.c                            |  2 +-
 hw/bsp/samd2x_l2x/family.c                        |  2 +-
 hw/bsp/samd5x_e5x/family.c                        |  2 +-
 hw/bsp/same7x/family.c                            |  2 +-
 hw/bsp/samg/family.c                              |  2 +-
 hw/bsp/stm32c0/family.c                           |  2 +-
 hw/bsp/stm32f0/family.c                           |  2 +-
 hw/bsp/stm32f1/family.c                           |  2 +-
 hw/bsp/stm32f2/family.c                           |  2 +-
 hw/bsp/stm32f3/family.c                           |  2 +-
 hw/bsp/stm32f4/family.c                           |  2 +-
 hw/bsp/stm32f7/family.c                           |  2 +-
 hw/bsp/stm32g0/family.c                           |  2 +-
 hw/bsp/stm32g4/family.c                           |  2 +-
 hw/bsp/stm32h5/family.c                           |  2 +-
 hw/bsp/stm32h7/family.c                           |  2 +-
 hw/bsp/stm32h7rs/family.c                         |  2 +-
 hw/bsp/stm32l0/family.c                           |  2 +-
 hw/bsp/stm32l4/family.c                           |  2 +-
 hw/bsp/stm32n6/family.c                           |  2 +-
 hw/bsp/stm32u0/family.c                           |  2 +-
 hw/bsp/stm32u5/family.c                           |  2 +-
 hw/bsp/stm32wb/family.c                           |  2 +-
 hw/bsp/stm32wba/family.c                          |  2 +-
 hw/bsp/tm4c/family.c                              |  2 +-
 hw/bsp/xmc4000/family.c                           |  2 +-
 src/common/tusb_common.h                          |  6 ++++
 src/host/usbh.c                                   |  2 +-
 src/portable/sunxi/dcd_sunxi_musb.c               |  3 --
 src/tusb.c                                        | 13 ++++---
 src/tusb.h                                        | 10 ------
 119 files changed, 158 insertions(+), 203 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic/src/main.c b/examples/device/audio_4_channel_mic/src/main.c
index 5767c7453..c9c6dd46c 100644
--- a/examples/device/audio_4_channel_mic/src/main.c
+++ b/examples/device/audio_4_channel_mic/src/main.c
@@ -155,7 +155,7 @@ void tud_resume_cb(void) {
 // In a real application, this would be replaced with actual I2S receive callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) {
     return; // not enough time
   }
@@ -408,7 +408,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/audio_test/src/main.c b/examples/device/audio_test/src/main.c
index 2441eefbc..876a41d06 100644
--- a/examples/device/audio_test/src/main.c
+++ b/examples/device/audio_test/src/main.c
@@ -138,7 +138,7 @@ void tud_resume_cb(void) {
 // In a real application, this would be replaced with actual I2S receive callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) {
     return; // not enough time
   }
@@ -402,7 +402,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/audio_test_multi_rate/src/main.c b/examples/device/audio_test_multi_rate/src/main.c
index baeec870f..952176997 100644
--- a/examples/device/audio_test_multi_rate/src/main.c
+++ b/examples/device/audio_test_multi_rate/src/main.c
@@ -146,7 +146,7 @@ void tud_resume_cb(void) {
 // In a real application, this would be replaced with actual I2S receive callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) {
     return; // not enough time
   }
@@ -614,7 +614,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index ee0829e5b..757876ac8 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -58,8 +58,8 @@ int main(void) {
     }
 
     // Blink and print every interval ms
-    if (!(board_millis() - start_ms < interval_ms)) {
-      start_ms = board_millis();
+    if (!(tusb_time_millis_api() - start_ms < interval_ms)) {
+      start_ms = tusb_time_millis_api();
 
       if (ch < 0) {
         // skip if echoing
diff --git a/examples/device/cdc_dual_ports/src/main.c b/examples/device/cdc_dual_ports/src/main.c
index 5ccb06a8a..6f918218d 100644
--- a/examples/device/cdc_dual_ports/src/main.c
+++ b/examples/device/cdc_dual_ports/src/main.c
@@ -157,7 +157,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/cdc_msc/src/main.c b/examples/device/cdc_msc/src/main.c
index 06a4f732f..b00a0e3a9 100644
--- a/examples/device/cdc_msc/src/main.c
+++ b/examples/device/cdc_msc/src/main.c
@@ -160,7 +160,7 @@ void led_blinking_task(void) {
 
   if (blink_enable) {
     // Blink every interval ms
-    if (board_millis() - start_ms < blink_interval_ms) {
+    if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
       return; // not enough time
     }
     start_ms += blink_interval_ms;
diff --git a/examples/device/cdc_uac2/src/uac2_app.c b/examples/device/cdc_uac2/src/uac2_app.c
index 73a262d0c..7760c402b 100644
--- a/examples/device/cdc_uac2/src/uac2_app.c
+++ b/examples/device/cdc_uac2/src/uac2_app.c
@@ -66,7 +66,7 @@ uint8_t current_resolution;
 // In a real application, this would be replaced with actual I2S send/receive callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) {
     return; // not enough time
   }
@@ -303,7 +303,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return;
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/dfu/src/main.c b/examples/device/dfu/src/main.c
index 77632bf1a..fb3c22630 100644
--- a/examples/device/dfu/src/main.c
+++ b/examples/device/dfu/src/main.c
@@ -199,7 +199,7 @@ void led_blinking_task(void) {
   static bool     led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/dfu_runtime/src/main.c b/examples/device/dfu_runtime/src/main.c
index 5de651bcd..6f412e8de 100644
--- a/examples/device/dfu_runtime/src/main.c
+++ b/examples/device/dfu_runtime/src/main.c
@@ -132,7 +132,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/dynamic_configuration/src/main.c b/examples/device/dynamic_configuration/src/main.c
index dac74bb7a..8ebb42f9a 100644
--- a/examples/device/dynamic_configuration/src/main.c
+++ b/examples/device/dynamic_configuration/src/main.c
@@ -170,7 +170,7 @@ void midi_task(void) {
   while( tud_midi_available() ) tud_midi_packet_read(packet);
 
   // send note every 1000 ms
-  if (board_millis() - start_ms < 286) {
+  if (tusb_time_millis_api() - start_ms < 286) {
     return; // not enough time
   }
   start_ms += 286;
@@ -209,7 +209,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return;// not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 44a91db67..4de319f52 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -109,7 +109,7 @@ void hid_task(void) {
   const uint32_t  interval_ms = 10;
   static uint32_t start_ms    = 0;
 
-  if (board_millis() - start_ms < interval_ms) {
+  if (tusb_time_millis_api() - start_ms < interval_ms) {
     return; // not enough time
   }
   start_ms += interval_ms;
@@ -238,7 +238,7 @@ void led_blinking_task(void) {
   }
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/hid_composite/src/main.c b/examples/device/hid_composite/src/main.c
index 9693d564d..7c9d5af8d 100644
--- a/examples/device/hid_composite/src/main.c
+++ b/examples/device/hid_composite/src/main.c
@@ -209,7 +209,7 @@ void hid_task(void) {
   const uint32_t  interval_ms = 10;
   static uint32_t start_ms    = 0;
 
-  if (board_millis() - start_ms < interval_ms) {
+  if (tusb_time_millis_api() - start_ms < interval_ms) {
     return; // not enough time
   }
   start_ms += interval_ms;
@@ -298,7 +298,7 @@ void led_blinking_task(void) {
   }
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/device/hid_generic_inout/src/main.c b/examples/device/hid_generic_inout/src/main.c
index 9837a47d9..2a6b91a8a 100644
--- a/examples/device/hid_generic_inout/src/main.c
+++ b/examples/device/hid_generic_inout/src/main.c
@@ -168,7 +168,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/hid_multiple_interface/src/main.c b/examples/device/hid_multiple_interface/src/main.c
index 0bccd13c1..c71a9cbad 100644
--- a/examples/device/hid_multiple_interface/src/main.c
+++ b/examples/device/hid_multiple_interface/src/main.c
@@ -120,7 +120,7 @@ void hid_task(void)
   const uint32_t interval_ms = 10;
   static uint32_t start_ms = 0;
 
-  if ( board_millis() - start_ms < interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < interval_ms) return; // not enough time
   start_ms += interval_ms;
 
   uint32_t const btn = board_button_read();
@@ -205,7 +205,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/midi_test/src/main.c b/examples/device/midi_test/src/main.c
index fd58e3021..1154c1d60 100644
--- a/examples/device/midi_test/src/main.c
+++ b/examples/device/midi_test/src/main.c
@@ -134,7 +134,7 @@ void midi_task(void)
   }
 
   // send note periodically
-  if (board_millis() - start_ms < 286) {
+  if (tusb_time_millis_api() - start_ms < 286) {
     return; // not enough time
   }
   start_ms += 286;
@@ -174,7 +174,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index 62b1c872a..b459871f7 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -103,7 +103,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/mtp/src/main.c b/examples/device/mtp/src/main.c
index 57d1535b2..6ffa435d1 100644
--- a/examples/device/mtp/src/main.c
+++ b/examples/device/mtp/src/main.c
@@ -102,7 +102,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 867cf2812..9f26da2ba 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -291,5 +291,5 @@ void sys_arch_unprotect(sys_prot_t pval) {
 
 /* lwip needs a millisecond time source, and the TinyUSB board support code has one available */
 uint32_t sys_now(void) {
-  return board_millis();
+  return tusb_time_millis_api();
 }
diff --git a/examples/device/uac2_headset/src/main.c b/examples/device/uac2_headset/src/main.c
index 96fa66f1e..0ea63d8f7 100644
--- a/examples/device/uac2_headset/src/main.c
+++ b/examples/device/uac2_headset/src/main.c
@@ -559,7 +559,7 @@ bool tud_audio_set_itf_cb(uint8_t rhport, tusb_control_request_t const *p_reques
 // In a real application, this would be replaced with actual I2S send/receive callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) return;// not enough time
   start_ms = curr_ms;
   // When new data arrived, copy data from speaker buffer, to microphone buffer
@@ -605,7 +605,7 @@ void audio_control_task(void) {
   static uint32_t start_ms = 0;
   static uint32_t btn_prev = 0;
 
-  if (board_millis() - start_ms < interval_ms) return;// not enough time
+  if (tusb_time_millis_api() - start_ms < interval_ms) return;// not enough time
   start_ms += interval_ms;
 
   uint32_t btn = board_button_read();
@@ -644,7 +644,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return;
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 7b4e2d64c..8323d82e8 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -583,7 +583,7 @@ bool tud_audio_rx_done_isr(uint8_t rhport, uint16_t n_bytes_received, uint8_t fu
 // In a real application, this would be replaced with actual I2S transmit callback.
 void audio_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) return;// not enough time
   start_ms = curr_ms;
 
@@ -610,7 +610,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return;
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return;
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
@@ -624,7 +624,7 @@ void led_blinking_task(void) {
 // Every 1ms, we will sent 1 debug information report
 void audio_debug_task(void) {
   static uint32_t start_ms = 0;
-  uint32_t curr_ms = board_millis();
+  uint32_t curr_ms = tusb_time_millis_api();
   if (start_ms == curr_ms) return;// not enough time
   start_ms = curr_ms;
 
diff --git a/examples/device/usbtmc/src/main.c b/examples/device/usbtmc/src/main.c
index 5cbbb85ef..b1269b117 100644
--- a/examples/device/usbtmc/src/main.c
+++ b/examples/device/usbtmc/src/main.c
@@ -124,12 +124,12 @@ void led_blinking_task(void)
     {
       led_state = true;
       board_led_write(true);
-      start_ms = board_millis();
+      start_ms = tusb_time_millis_api();
       doPulse = false;
     }
     else if (led_state == true)
     {
-      if ( board_millis() - start_ms < 750) //Spec says blink must be between 500 and 1000 ms.
+      if ( tusb_time_millis_api() - start_ms < 750) //Spec says blink must be between 500 and 1000 ms.
       {
         return; // not enough time
       }
@@ -140,7 +140,7 @@ void led_blinking_task(void)
   else
   {
     // Blink every interval ms
-    if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+    if ( tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
     start_ms += blink_interval_ms;
 
     board_led_write(led_state);
diff --git a/examples/device/usbtmc/src/usbtmc_app.c b/examples/device/usbtmc/src/usbtmc_app.c
index 4c3724ac4..35e8618f5 100644
--- a/examples/device/usbtmc/src/usbtmc_app.c
+++ b/examples/device/usbtmc/src/usbtmc_app.c
@@ -209,19 +209,19 @@ void usbtmc_app_task_iter(void) {
   case 0:
     break;
   case 1:
-    queryDelayStart = board_millis();
+    queryDelayStart = tusb_time_millis_api();
     queryState = 2;
     break;
   case 2:
-    if( (board_millis() - queryDelayStart) > resp_delay) {
-      queryDelayStart = board_millis();
+    if( (tusb_time_millis_api() - queryDelayStart) > resp_delay) {
+      queryDelayStart = tusb_time_millis_api();
       queryState=3;
       status |= 0x10u; // MAV
       status |= 0x40u; // SRQ
     }
     break;
   case 3:
-    if( (board_millis() - queryDelayStart) > resp_delay) {
+    if( (tusb_time_millis_api() - queryDelayStart) > resp_delay) {
       queryState = 4;
     }
     break;
diff --git a/examples/device/video_capture/src/main.c b/examples/device/video_capture/src/main.c
index ffa2a7afa..df9f77a1c 100644
--- a/examples/device/video_capture/src/main.c
+++ b/examples/device/video_capture/src/main.c
@@ -231,7 +231,7 @@ static void video_send_frame(void) {
   if (!already_sent) {
     already_sent = 1;
     tx_busy = 1;
-    start_ms = board_millis();
+    start_ms = tusb_time_millis_api();
 #if defined(CFG_EXAMPLE_VIDEO_BUFFERLESS)
     tud_video_n_frame_xfer(0, 0, NULL, FRAME_WIDTH * FRAME_HEIGHT * 16 / 8);
 #elif defined (CFG_EXAMPLE_VIDEO_READONLY)
@@ -247,7 +247,7 @@ static void video_send_frame(void) {
 #endif
   }
 
-  unsigned cur = board_millis();
+  unsigned cur = tusb_time_millis_api();
   if (cur - start_ms < interval_ms) {
     return; // not enough time
   }
@@ -316,7 +316,7 @@ void led_blinking_task(void* param) {
     #if CFG_TUSB_OS == OPT_OS_FREERTOS
     vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS);
     #else
-    if (board_millis() - start_ms < blink_interval_ms) {
+    if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
       return; // not enough time
     }
     #endif
diff --git a/examples/device/video_capture_2ch/src/main.c b/examples/device/video_capture_2ch/src/main.c
index 79b149f2b..debd336fd 100644
--- a/examples/device/video_capture_2ch/src/main.c
+++ b/examples/device/video_capture_2ch/src/main.c
@@ -221,13 +221,13 @@ static void video_send_frame(uint_fast8_t ctl_idx, uint_fast8_t stm_idx) {
   if (!(already_sent & (1u << idx))) {
     already_sent |= 1u << idx;
     tx_busy |= 1u << idx;
-    start_ms[idx] = board_millis();
+    start_ms[idx] = tusb_time_millis_api();
 
     fb_size = get_framebuf(ctl_idx, stm_idx, frame_num[idx], &fp);
     tud_video_n_frame_xfer(ctl_idx, stm_idx, fp, fb_size);
   }
 
-  unsigned cur = board_millis();
+  unsigned cur = tusb_time_millis_api();
   if (cur - start_ms[idx] < interval_ms[idx]) return; // not enough time
   if (tx_busy & (1u << idx)) return;
   start_ms[idx] += interval_ms[idx];
@@ -280,7 +280,7 @@ void led_blinking_task(void* param) {
     #if CFG_TUSB_OS == OPT_OS_FREERTOS
     vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS);
     #else
-    if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+    if (tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
     #endif
 
     start_ms += blink_interval_ms;
diff --git a/examples/device/webusb_serial/src/main.c b/examples/device/webusb_serial/src/main.c
index 155768b76..4be5e4db4 100644
--- a/examples/device/webusb_serial/src/main.c
+++ b/examples/device/webusb_serial/src/main.c
@@ -257,7 +257,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return; // not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index 8c53588c3..ba8ba019a 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -284,7 +284,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/dual/host_info_to_device_cdc/src/main.c b/examples/dual/host_info_to_device_cdc/src/main.c
index fffb54d58..7cf43aef3 100644
--- a/examples/dual/host_info_to_device_cdc/src/main.c
+++ b/examples/dual/host_info_to_device_cdc/src/main.c
@@ -213,13 +213,13 @@ void cdc_task(void) {
   static uint32_t connected_ms = 0;
 
   if (!tud_cdc_connected()) {
-    connected_ms = board_millis();
+    connected_ms = tusb_time_millis_api();
     return;
   }
 
   // delay a bit otherwise we can outpace host's terminal. Linux will set LineState (DTR) then Line Coding.
   // If we send data before Linux's terminal set Line Coding, it can be ignored --> missing data with hardware test loop
-  if (board_millis() - connected_ms < 100) {
+  if (tusb_time_millis_api() - connected_ms < 100) {
     return; // wait for stable connection
   }
 
@@ -309,7 +309,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < blink_interval_ms) {
+  if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
     return;// not enough time
   }
   start_ms += blink_interval_ms;
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index c693d6b00..ced2eaa32 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -335,7 +335,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < interval_ms) {
+  if (tusb_time_millis_api() - start_ms < interval_ms) {
     return; // not enough time
   }
   start_ms += interval_ms;
diff --git a/examples/host/cdc_msc_hid/src/main.c b/examples/host/cdc_msc_hid/src/main.c
index c309a7cae..c27ad93fe 100644
--- a/examples/host/cdc_msc_hid/src/main.c
+++ b/examples/host/cdc_msc_hid/src/main.c
@@ -92,7 +92,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < interval_ms) {
+  if (tusb_time_millis_api() - start_ms < interval_ms) {
     return;// not enough time
   }
   start_ms += interval_ms;
diff --git a/examples/host/device_info/src/main.c b/examples/host/device_info/src/main.c
index ab617e989..fd4e9c3ed 100644
--- a/examples/host/device_info/src/main.c
+++ b/examples/host/device_info/src/main.c
@@ -246,7 +246,7 @@ void led_blinking_task(void* param) {
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
     vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS);
 #else
-    if (board_millis() - start_ms < blink_interval_ms) {
+    if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
       return; // not enough time
     }
 #endif
diff --git a/examples/host/hid_controller/src/hid_app.c b/examples/host/hid_controller/src/hid_app.c
index f8c3d029b..5417811f0 100644
--- a/examples/host/hid_controller/src/hid_app.c
+++ b/examples/host/hid_controller/src/hid_app.c
@@ -168,7 +168,7 @@ void hid_app_task(void)
     const uint32_t interval_ms = 200;
     static uint32_t start_ms = 0;
 
-    uint32_t current_time_ms = board_millis();
+    uint32_t current_time_ms = tusb_time_millis_api();
     if ( current_time_ms - start_ms >= interval_ms)
     {
       start_ms = current_time_ms;
diff --git a/examples/host/hid_controller/src/main.c b/examples/host/hid_controller/src/main.c
index fa70d7d1a..a9eebc90b 100644
--- a/examples/host/hid_controller/src/main.c
+++ b/examples/host/hid_controller/src/main.c
@@ -79,7 +79,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < interval_ms) return; // not enough time
   start_ms += interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/host/midi_rx/src/main.c b/examples/host/midi_rx/src/main.c
index 78b1a11b9..f189e0864 100644
--- a/examples/host/midi_rx/src/main.c
+++ b/examples/host/midi_rx/src/main.c
@@ -72,7 +72,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < interval_ms) return;// not enough time
+  if (tusb_time_millis_api() - start_ms < interval_ms) return;// not enough time
   start_ms += interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index f9ec0ff5f..0a8967380 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -118,7 +118,7 @@ void led_blinking_task(void) {
   static bool led_state = false;
 
   // Blink every interval ms
-  if (board_millis() - start_ms < interval_ms) return; // not enough time
+  if (tusb_time_millis_api() - start_ms < interval_ms) return; // not enough time
   start_ms += interval_ms;
 
   board_led_write(led_state);
diff --git a/examples/typec/power_delivery/src/main.c b/examples/typec/power_delivery/src/main.c
index de0db4721..f6191bfe8 100644
--- a/examples/typec/power_delivery/src/main.c
+++ b/examples/typec/power_delivery/src/main.c
@@ -184,7 +184,7 @@ void led_blinking_task(void)
   static bool led_state = false;
 
   // Blink every interval ms
-  if ( board_millis() - start_ms < blink_interval_ms) return; // not enough time
+  if ( tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
   start_ms += blink_interval_ms;
 
   board_led_write(led_state);
diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index a6c2217fe..b7dbcbd98 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -258,7 +258,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len)
   {
     system_ticks++;
   }
-  uint32_t board_millis(void)
+  uint32_t tusb_time_millis_api(void)
   {
     return system_ticks;
   }
diff --git a/hw/bsp/at32f403a_407/family.c b/hw/bsp/at32f403a_407/family.c
index dd9b85dc5..d4a7e446d 100644
--- a/hw/bsp/at32f403a_407/family.c
+++ b/hw/bsp/at32f403a_407/family.c
@@ -250,7 +250,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/at32f413/family.c b/hw/bsp/at32f413/family.c
index bdaed523c..adf29e097 100644
--- a/hw/bsp/at32f413/family.c
+++ b/hw/bsp/at32f413/family.c
@@ -250,7 +250,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/at32f415/family.c b/hw/bsp/at32f415/family.c
index 2fbd4c821..b592bf6c5 100644
--- a/hw/bsp/at32f415/family.c
+++ b/hw/bsp/at32f415/family.c
@@ -246,7 +246,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/at32f423/family.c b/hw/bsp/at32f423/family.c
index f30c6a83f..71cb559dc 100644
--- a/hw/bsp/at32f423/family.c
+++ b/hw/bsp/at32f423/family.c
@@ -250,7 +250,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/at32f425/family.c b/hw/bsp/at32f425/family.c
index 4ff4c8d6a..7f443509e 100644
--- a/hw/bsp/at32f425/family.c
+++ b/hw/bsp/at32f425/family.c
@@ -254,7 +254,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c
index 01dd429f8..6c6bc4d72 100644
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -320,7 +320,7 @@ volatile uint32_t system_ticks = 0;
 void SysTick_Handler(void) {
   system_ticks++;
 }
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 void SVC_Handler(void) {
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
index 0593e5115..fa0c1139f 100644
--- a/hw/bsp/at32f45x/family.c
+++ b/hw/bsp/at32f45x/family.c
@@ -227,7 +227,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 483d9dc28..91e7de9fe 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -161,10 +161,6 @@ void board_putchar(int c) {
   (void) sys_write(0, (const char*)&c, 1);
 }
 
-uint32_t tusb_time_millis_api(void) {
-  return board_millis();
-}
-
 //--------------------------------------------------------------------
 // FreeRTOS hooks
 //--------------------------------------------------------------------
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 606ac484f..4487871eb 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -98,43 +98,6 @@ int board_uart_read(uint8_t *buf, int len);
 // Send characters to UART. Return number of sent bytes
 int board_uart_write(void const *buf, int len);
 
-#if CFG_TUSB_OS == OPT_OS_NONE
-// Get current milliseconds, must be implemented when no RTOS is used
-uint32_t board_millis(void);
-
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
-static inline uint32_t board_millis(void) {
-  return ( ( ((uint64_t) xTaskGetTickCount()) * 1000) / configTICK_RATE_HZ );
-}
-
-#elif CFG_TUSB_OS == OPT_OS_MYNEWT
-static inline uint32_t board_millis(void) {
-  return os_time_ticks_to_ms32( os_time_get() );
-}
-
-#elif CFG_TUSB_OS == OPT_OS_PICO
-#include "pico/time.h"
-static inline uint32_t board_millis(void) {
-  return to_ms_since_boot(get_absolute_time());
-}
-
-#elif CFG_TUSB_OS == OPT_OS_RTTHREAD
-static inline uint32_t board_millis(void) {
-  return (((uint64_t)rt_tick_get()) * 1000 / RT_TICK_PER_SECOND);
-}
-
-#elif CFG_TUSB_OS == OPT_OS_CUSTOM
-// Implement your own board_millis() in any of .c file
-uint32_t board_millis(void);
-
-#elif CFG_TUSB_OS == OPT_OS_ZEPHYR
-static inline uint32_t board_millis(void) {
-  return k_uptime_get_32();
-}
-#else
-  #error "board_millis() is not implemented for this OS"
-#endif
-
 //--------------------------------------------------------------------+
 // Helper functions
 //--------------------------------------------------------------------+
@@ -175,8 +138,8 @@ static inline size_t board_usb_get_serial(uint16_t desc_str1[], size_t max_chars
 
 // TODO remove
 static inline void board_delay(uint32_t ms) {
-  uint32_t start_ms = board_millis();
-  while ( board_millis() - start_ms < ms ) {
+  uint32_t start_ms = tusb_time_millis_api();
+  while ( tusb_time_millis_api() - start_ms < ms ) {
     // take chance to run usb background
     #if CFG_TUD_ENABLED
     tud_task();
diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c
index f8f3b0b70..399397bb4 100644
--- a/hw/bsp/broadcom_32bit/family.c
+++ b/hw/bsp/broadcom_32bit/family.c
@@ -146,7 +146,7 @@ void TIMER_1_IRQHandler(void) {
   SYSTMR->CS_b.M1 = 1;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c
index f8f3b0b70..399397bb4 100644
--- a/hw/bsp/broadcom_64bit/family.c
+++ b/hw/bsp/broadcom_64bit/family.c
@@ -146,7 +146,7 @@ void TIMER_1_IRQHandler(void) {
   SYSTMR->CS_b.M1 = 1;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c
index 15ff4b8ee..ff24cfe89 100644
--- a/hw/bsp/brtmm90x/family.c
+++ b/hw/bsp/brtmm90x/family.c
@@ -234,7 +234,7 @@ int board_uart_write(void const *buf, int len)
 }
 
 // Get current milliseconds
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
     uint32_t safe_ms;
 
diff --git a/hw/bsp/ch32f20x/family.c b/hw/bsp/ch32f20x/family.c
index 7eae62fa4..dd84b7c77 100644
--- a/hw/bsp/ch32f20x/family.c
+++ b/hw/bsp/ch32f20x/family.c
@@ -101,7 +101,7 @@ void SysTick_Handler(void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index dfc041462..344dcaf0b 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -61,7 +61,7 @@ static uint32_t SysTick_Config(uint32_t ticks) {
   return 0;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index 690acee1e..4c22450f9 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -85,7 +85,7 @@ static uint32_t SysTick_Config(uint32_t ticks) {
   return 0;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/ch32v30x/family.c b/hw/bsp/ch32v30x/family.c
index c694f1a08..6295f7723 100644
--- a/hw/bsp/ch32v30x/family.c
+++ b/hw/bsp/ch32v30x/family.c
@@ -144,7 +144,7 @@ __attribute__((interrupt)) void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/cxd56/family.c b/hw/bsp/cxd56/family.c
index a8e2fd52b..fd92bb9d9 100644
--- a/hw/bsp/cxd56/family.c
+++ b/hw/bsp/cxd56/family.c
@@ -96,7 +96,7 @@ int board_uart_write(void const *buf, int len)
 }
 
 // Get current milliseconds
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   struct timespec tp;
 
diff --git a/hw/bsp/da1469x/family.c b/hw/bsp/da1469x/family.c
index a64ffce67..a4f7f2e8d 100644
--- a/hw/bsp/da1469x/family.c
+++ b/hw/bsp/da1469x/family.c
@@ -140,7 +140,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/efm32/family.c b/hw/bsp/efm32/family.c
index 39166bc4d..d318e20d6 100644
--- a/hw/bsp/efm32/family.c
+++ b/hw/bsp/efm32/family.c
@@ -689,7 +689,7 @@ void SysTick_Handler(void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/f1c100s/family.c b/hw/bsp/f1c100s/family.c
index 9e864363f..1e71333d4 100644
--- a/hw/bsp/f1c100s/family.c
+++ b/hw/bsp/f1c100s/family.c
@@ -79,7 +79,7 @@ int board_uart_write(void const* buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/fomu/family.c b/hw/bsp/fomu/family.c
index 9d7977bea..cf04a1f6f 100644
--- a/hw/bsp/fomu/family.c
+++ b/hw/bsp/fomu/family.c
@@ -117,7 +117,7 @@ int board_uart_write(void const * buf, int len)
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c
index 9d15755fc..4c1099317 100644
--- a/hw/bsp/gd32vf103/family.c
+++ b/hw/bsp/gd32vf103/family.c
@@ -179,7 +179,7 @@ void eclic_mtip_handler(void) {
   system_ticks++;
   SysTick_Reload(TIMER_TICKS);
 }
-uint32_t board_millis(void) { return system_ticks; }
+uint32_t tusb_time_millis_api(void) { return system_ticks; }
 #endif
 
 #ifdef USE_FULL_ASSERT
diff --git a/hw/bsp/hpmicro/family.c b/hw/bsp/hpmicro/family.c
index ffec2523a..a80a8d913 100644
--- a/hw/bsp/hpmicro/family.c
+++ b/hw/bsp/hpmicro/family.c
@@ -108,7 +108,7 @@ int board_uart_write(void const *buf, int len) {
 
 #if CFG_TUSB_OS == OPT_OS_NONE
 // Get current milliseconds, must be implemented when no RTOS is used
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return (hpm_csr_get_core_cycle() / clock_get_core_clock_ticks_per_ms());
 }
 
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index d54b41bdb..c1ee34b1a 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -239,7 +239,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c
index 98ef52739..1505defe0 100644
--- a/hw/bsp/kinetis_k/family.c
+++ b/hw/bsp/kinetis_k/family.c
@@ -143,7 +143,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/kinetis_k32l2/family.c b/hw/bsp/kinetis_k32l2/family.c
index 2062b8b18..ec8dc6ecf 100644
--- a/hw/bsp/kinetis_k32l2/family.c
+++ b/hw/bsp/kinetis_k32l2/family.c
@@ -148,7 +148,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index c257f4b2b..f89434d06 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -142,7 +142,7 @@ void SysTick_Handler(void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/lpc11/family.c b/hw/bsp/lpc11/family.c
index c9f18bd2f..76c2bd17c 100644
--- a/hw/bsp/lpc11/family.c
+++ b/hw/bsp/lpc11/family.c
@@ -130,7 +130,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc13/family.c b/hw/bsp/lpc13/family.c
index e212c6a63..8513f4df4 100644
--- a/hw/bsp/lpc13/family.c
+++ b/hw/bsp/lpc13/family.c
@@ -83,7 +83,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c
index 5f22df175..0d092d3a9 100644
--- a/hw/bsp/lpc15/family.c
+++ b/hw/bsp/lpc15/family.c
@@ -140,7 +140,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/lpc17/family.c b/hw/bsp/lpc17/family.c
index ba59fccca..f398f7e3c 100644
--- a/hw/bsp/lpc17/family.c
+++ b/hw/bsp/lpc17/family.c
@@ -145,7 +145,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 6c02c711f..2043cef99 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -143,7 +143,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index 5ea95e9b8..237cd996b 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -156,7 +156,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index f440fb119..bade53b07 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -257,7 +257,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/lpc51/family.c b/hw/bsp/lpc51/family.c
index bec86f87f..847972350 100644
--- a/hw/bsp/lpc51/family.c
+++ b/hw/bsp/lpc51/family.c
@@ -122,7 +122,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 7bb73afbc..945e27154 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -217,7 +217,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index ad0e502b5..7485ed4d5 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -350,7 +350,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/maxim/family.c b/hw/bsp/maxim/family.c
index 7ad7d6ff9..6ef4c12c1 100644
--- a/hw/bsp/maxim/family.c
+++ b/hw/bsp/maxim/family.c
@@ -202,7 +202,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index 3b91678b1..a3969c217 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -219,7 +219,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c
index 663c30818..330b01f6d 100644
--- a/hw/bsp/mm32/family.c
+++ b/hw/bsp/mm32/family.c
@@ -175,7 +175,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/msp430/family.c b/hw/bsp/msp430/family.c
index 390a9915e..413ad7db6 100644
--- a/hw/bsp/msp430/family.c
+++ b/hw/bsp/msp430/family.c
@@ -102,10 +102,10 @@ static void SystemClock_Config(void)
 
   // VUSB enabled automatically.
   // Wait two milliseconds to stabilize, per manual recommendation.
-  uint32_t ms_elapsed = board_millis();
+  uint32_t ms_elapsed = tusb_time_millis_api();
   do
   {
-    while((board_millis() - ms_elapsed) < 2);
+    while((tusb_time_millis_api() - ms_elapsed) < 2);
   }while(!(USBPWRCTL & USBBGVBV));
 
   // USB uses XT2 (4 MHz) directly. Enable the PLL.
@@ -113,11 +113,11 @@ static void SystemClock_Config(void)
   USBPLLCTL |= (UPFDEN | UPLLEN);
 
   // Wait until PLL locks. Check every 2ms, per manual.
-  ms_elapsed = board_millis();
+  ms_elapsed = tusb_time_millis_api();
   do
   {
     USBPLLIR &= ~USBOOLIFG;
-    while((board_millis() - ms_elapsed) < 2);
+    while((tusb_time_millis_api() - ms_elapsed) < 2);
   }while(USBPLLIR & USBOOLIFG);
 
   USBKEYPID = 0;
@@ -207,7 +207,7 @@ void TIMER0_A0_ISR (void) {
   // TAxCCR0 CCIFG resets itself as soon as interrupt is invoked.
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   uint32_t systick_mirror;
 
diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c
index 0e1b0528a..90eb945f4 100644
--- a/hw/bsp/msp432e4/family.c
+++ b/hw/bsp/msp432e4/family.c
@@ -202,7 +202,7 @@ void SysTick_Handler(void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index ee3ac61e2..04bfbf320 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -296,7 +296,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/nuc100_120/family.c b/hw/bsp/nuc100_120/family.c
index 752af2a56..cfe60121c 100644
--- a/hw/bsp/nuc100_120/family.c
+++ b/hw/bsp/nuc100_120/family.c
@@ -87,7 +87,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/nuc121_125/family.c b/hw/bsp/nuc121_125/family.c
index 089855207..dce5b4d62 100644
--- a/hw/bsp/nuc121_125/family.c
+++ b/hw/bsp/nuc121_125/family.c
@@ -86,7 +86,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/nuc126/family.c b/hw/bsp/nuc126/family.c
index f992fcab4..3343064e5 100644
--- a/hw/bsp/nuc126/family.c
+++ b/hw/bsp/nuc126/family.c
@@ -111,7 +111,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/nuc505/family.c b/hw/bsp/nuc505/family.c
index 00ed92310..f1a77e4a5 100644
--- a/hw/bsp/nuc505/family.c
+++ b/hw/bsp/nuc505/family.c
@@ -88,7 +88,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c
index da97f67a9..2bfc876e1 100644
--- a/hw/bsp/pic32mz/family.c
+++ b/hw/bsp/pic32mz/family.c
@@ -106,7 +106,7 @@ TU_ATTR_WEAK int board_uart_write(void const * buf, int len)
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   // COUNTER is system clock (200MHz / 2 = 100MHz) convert to ms)
   return _CP0_GET_COUNT() / (100000000 / 1000);
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index 1f75b47c1..f371e694b 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -169,7 +169,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/rw61x/family.c b/hw/bsp/rw61x/family.c
index 265d5fcc0..fcc7fb262 100644
--- a/hw/bsp/rw61x/family.c
+++ b/hw/bsp/rw61x/family.c
@@ -128,7 +128,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
index 26ad4a6aa..e5b24bf69 100644
--- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
+++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
@@ -248,7 +248,7 @@ void INT_Excep_CMT0_CMI0(void)
   ++system_ticks;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index 66a319541..d5c2de05a 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -299,7 +299,7 @@ void INT_Excep_CMT0_CMI0(void)
   ++system_ticks;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 6cbf02412..bccbac8ea 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -155,7 +155,7 @@ void SysTick_Handler (void)
   system_ticks++;
 }
 
-uint32_t board_millis(void)
+uint32_t tusb_time_millis_api(void)
 {
   return system_ticks;
 }
diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c
index a2dc8a8d4..737219b6c 100644
--- a/hw/bsp/samd2x_l2x/family.c
+++ b/hw/bsp/samd2x_l2x/family.c
@@ -361,7 +361,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c
index 5a7105894..c008b9719 100644
--- a/hw/bsp/samd5x_e5x/family.c
+++ b/hw/bsp/samd5x_e5x/family.c
@@ -210,7 +210,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c
index 6feefa3b5..ff6ecf277 100644
--- a/hw/bsp/same7x/family.c
+++ b/hw/bsp/same7x/family.c
@@ -192,7 +192,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c
index 5c5fc3c14..b27134305 100644
--- a/hw/bsp/samg/family.c
+++ b/hw/bsp/samg/family.c
@@ -148,7 +148,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index e2ba47f45..e20c0ee15 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -173,7 +173,7 @@ void SysTick_Handler(void) {
   HAL_IncTick();
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index b99b0a8cc..5a35a3e50 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -160,7 +160,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 3147061cf..fae61ca9e 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -202,7 +202,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index f95128040..b901bf4cc 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -145,7 +145,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index 95bcc7882..fde1e9f6d 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -156,7 +156,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index f0e9620f2..665ea114a 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -251,7 +251,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index d8f0da201..ce9049abe 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -312,7 +312,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 4b175b0ec..b25897264 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -181,7 +181,7 @@ void SysTick_Handler(void) {
   HAL_IncTick();
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index d8afa0f95..2e13a1d4b 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -211,7 +211,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index fdb12e44f..1e8acd502 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -207,7 +207,7 @@ void SysTick_Handler(void) {
   HAL_IncTick();
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index a320a7e72..2759dac63 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -295,7 +295,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 2cc39b7ac..3bf75ba97 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -468,7 +468,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 6aeab1259..192f014f4 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -168,7 +168,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 65f6b9ab3..c87b643b8 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -231,7 +231,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index c839e6b3e..4354616c3 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -366,7 +366,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index 50b513d8f..0f91d1f30 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -174,7 +174,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index dfcf5c537..55ca25d58 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -270,7 +270,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index 153d10a09..de503c072 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -174,7 +174,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c
index d05415755..e058a80a1 100644
--- a/hw/bsp/stm32wba/family.c
+++ b/hw/bsp/stm32wba/family.c
@@ -198,7 +198,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) { return system_ticks; }
+uint32_t tusb_time_millis_api(void) { return system_ticks; }
 #endif
 
 void HardFault_Handler(void) { asm( "bkpt 1" ); }
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index ae7f22f00..503d0a8c9 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -211,7 +211,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 6fef53025..d0acd04cb 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -147,7 +147,7 @@ void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
diff --git a/src/common/tusb_common.h b/src/common/tusb_common.h
index 9eb0a9337..6ac1405f3 100644
--- a/src/common/tusb_common.h
+++ b/src/common/tusb_common.h
@@ -90,6 +90,12 @@
 // TODO move to a more obvious place/file
 //--------------------------------------------------------------------+
 
+// Get current milliseconds, required by some port/configuration without RTOS
+extern uint32_t tusb_time_millis_api(void);
+
+// Delay in milliseconds, use tusb_time_millis_api() by default. required by some port/configuration with no RTOS
+extern void tusb_time_delay_ms_api(uint32_t ms);
+
 // flush data cache
 extern void tusb_app_dcache_flush(uintptr_t addr, uint32_t data_size);
 
diff --git a/src/host/usbh.c b/src/host/usbh.c
index 60d78605f..0da5166c2 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -685,7 +685,7 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
       has_deferred_attach = osal_queue_receive(_usbh_daq, &event, 0);
     }
 
-    if (!has_deferred_attach) // skip event queue to process deferred at
+    if (!has_deferred_attach) // skip event queue to process deferred attach
   #endif
     {
       if (!osal_queue_receive(_usbh_q, &event, timeout_ms)) {
diff --git a/src/portable/sunxi/dcd_sunxi_musb.c b/src/portable/sunxi/dcd_sunxi_musb.c
index b413121a5..9fac0bc1c 100644
--- a/src/portable/sunxi/dcd_sunxi_musb.c
+++ b/src/portable/sunxi/dcd_sunxi_musb.c
@@ -36,9 +36,6 @@
 #include <device/dcd.h>
 #include "musb_def.h"
 
-//#include "bsp/board_api.h"
-extern uint32_t board_millis(void); // TODO remove
-
 typedef uint32_t u32;
 typedef uint16_t u16;
 typedef uint8_t u8;
diff --git a/src/tusb.c b/src/tusb.c
index 40d0e8adf..37aecf693 100644
--- a/src/tusb.c
+++ b/src/tusb.c
@@ -45,21 +45,24 @@ tusb_role_t _tusb_rhport_role[TUP_USBIP_CONTROLLER_NUM] = { TUSB_ROLE_INVALID };
 // Weak/Default API, can be overwritten by Application
 //--------------------------------------------------------------------
 
-  #if CFG_TUSB_OS != OPT_OS_NONE
-uint32_t tusb_time_millis_api(void) {
+#if CFG_TUSB_OS != OPT_OS_NONE
+TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
   return osal_time_millis();
 }
-  #endif
 
 TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
-#if CFG_TUSB_OS != OPT_OS_NONE
   osal_task_delay(ms);
+}
+
 #else
+// tusb_time_millis_api() must be implemented by user application.
+
+TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
   // delay using millis()
   const uint32_t time_ms = tusb_time_millis_api();
   while ((tusb_time_millis_api() - time_ms) < ms) {}
-#endif
 }
+#endif
 
 TU_ATTR_WEAK void *tusb_app_virt_to_phys(void *virt_addr) {
   return virt_addr;
diff --git a/src/tusb.h b/src/tusb.h
index 742009a2e..3876bf863 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -174,16 +174,6 @@ bool tusb_deinit(uint8_t rhport);
 
 #endif
 
-//--------------------------------------------------------------------+
-//
-//--------------------------------------------------------------------+
-
-// Get current milliseconds, required by some port/configuration without RTOS
-extern uint32_t tusb_time_millis_api(void);
-
-// Delay in milliseconds, use tusb_time_millis_api() by default. required by some port/configuration with no RTOS
-extern void tusb_time_delay_ms_api(uint32_t ms);
-
 #ifdef __cplusplus
  }
 #endif
-- 
cgit v1.3.1


From 320b92b106713d07731196fc06a5cc2fe6745def Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 1 Mar 2026 16:02:46 +0100
Subject: bsp/stm32h7: fix h747-disco button

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32h7/boards/stm32h747disco/board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.h b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
index 458aa48b6..0a25c89dc 100644
--- a/hw/bsp/stm32h7/boards/stm32h747disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
@@ -63,7 +63,7 @@ static board_pindef_t board_pindef[] = {
   },
   { // Button
     .port = GPIOC,
-    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLUP, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
+    .pin_init = { .Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0 },
     .active_state = 1
   },
   { // UART TX
-- 
cgit v1.3.1


From ac172f7799852bb0fc67246ca26d50e6cc379bd8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 2 Mar 2026 11:36:47 +0700
Subject: fix board test without tusb_time_millis_api()

---
 hw/bsp/espressif/boards/family.c | 10 ++++++++++
 hw/bsp/rp2040/family.c           | 12 ++++++++++++
 2 files changed, 22 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index a837417f4..623cdb8b9 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -351,5 +351,15 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
   ESP_ERROR_CHECK(spi_device_transmit(max3421_spi, &xact));
   return true;
 }
+#endif
+
+// board test example does not use both device and host stack
+#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
+TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
+  return osal_time_millis();
+}
 
+TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
+  osal_task_delay(ms);
+}
 #endif
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index a51b3f758..d68b13dd1 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -377,3 +377,15 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
 }
 
 #endif
+
+
+// board test example does not use both device and host stack
+#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
+TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
+  return osal_time_millis();
+}
+
+TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
+  osal_task_delay(ms);
+}
+#endif
-- 
cgit v1.3.1


From 4df7ef54396e1695aa9504aef9dfe4263569c3f6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 2 Mar 2026 17:51:48 +0700
Subject: fix call_after timeout adjustment with rtos

---
 hw/bsp/stm32h7/boards/stm32h743eval/board.h |  4 ++--
 src/host/usbh.c                             | 10 +++++++---
 src/host/usbh_pvt.h                         |  2 +-
 3 files changed, 10 insertions(+), 6 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 0f0eb4ed3..d2f61a5ce 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -120,10 +120,10 @@ static inline void SystemClock_Config(void) {
   // From H743 eval manual ETM can only work at 50 MHz clock by default because ETM signals
   // are shared with other peripherals. Trace CLK = PLL1R.
   RCC_OscInitStruct.PLL.PLLM = 5;
-  RCC_OscInitStruct.PLL.PLLN      = 160; // May reduce to 200 Mhz when tracing to avoid overflowing trace buffer
+  RCC_OscInitStruct.PLL.PLLN      = 160; // May reduce to 100/200 Mhz when tracing to avoid overflowing trace buffer
   RCC_OscInitStruct.PLL.PLLP      = 2;
   RCC_OscInitStruct.PLL.PLLQ      = 4;
-  RCC_OscInitStruct.PLL.PLLR      = 16;  // Trace clock is limit to 50 Mhz to meet board requirement
+  RCC_OscInitStruct.PLL.PLLR      = RCC_OscInitStruct.PLL.PLLN/10;  // Trace clock is limit to 50 Mhz to meet board requirement
   RCC_OscInitStruct.PLL.PLLRGE    = RCC_PLL1VCIRANGE_2;
   RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOMEDIUM;
   RCC_OscInitStruct.PLL.PLLFRACN = 0;
diff --git a/src/host/usbh.c b/src/host/usbh.c
index a674b040e..5cf0096f2 100644
--- a/src/host/usbh.c
+++ b/src/host/usbh.c
@@ -363,7 +363,6 @@ TU_ATTR_ALWAYS_INLINE static inline bool usbh_setup_send(uint8_t daddr, const ui
   return ret;
 }
 
-// For non-scheduler deferred callback. For scheduler OS: blocking delay then callback
 bool usbh_defer_func_ms_async(uint32_t ms, tusb_defer_func_t func, uintptr_t param) {
   TU_ASSERT(_usbh_data.call_after.func == NULL);
   TU_LOG_USBH("USBH schedule function after %u ms\r\n", (unsigned int)ms);
@@ -666,8 +665,12 @@ void tuh_task_ext(uint32_t timeout_ms, bool in_isr) {
         TU_LOG_USBH("USBH invoke scheduled function\r\n");
         _usbh_data.call_after.func = NULL;
         after_cb(_usbh_data.call_after.arg);
-      } else if (timeout_ms > (uint32_t)ms) {
-        // reduce main event timeout to make sure we don't blocking more than call_after timeout
+      }
+
+      // above after_cb() can re-schedule another function, we need to re-check and reduce timeout of
+      // the main event timeout to make sure we aren't blocking more than call_after timeout.
+      if (_usbh_data.call_after.func != NULL &&
+        timeout_ms > (uint32_t)(_usbh_data.call_after.at_ms - tusb_time_millis_api())) {
         timeout_ms = (uint32_t)ms;
       }
     }
@@ -2033,6 +2036,7 @@ void usbh_driver_set_config_complete(uint8_t dev_addr, uint8_t itf_num) {
 
 static void enum_full_complete(bool success) {
   (void)success;
+  TU_LOG_USBH("Enumeration complete: success = %u\r\n", success);
 
   _usbh_data.enumerating_daddr = TUSB_INDEX_INVALID_8; // mark enumeration as complete
   _usbh_data.call_after.func = NULL;
diff --git a/src/host/usbh_pvt.h b/src/host/usbh_pvt.h
index bc8658b9a..adb6a8c44 100644
--- a/src/host/usbh_pvt.h
+++ b/src/host/usbh_pvt.h
@@ -71,7 +71,7 @@ void usbh_int_set(bool enabled);
 // Invoke this function later in tuh_task() by putting it into task queue
 void usbh_defer_func(osal_task_func_t func, void *param, bool in_isr);
 
-// Schedules a function to be called after certain time in async manner
+// Schedules a function to be called after certain time asynchronously
 bool usbh_defer_func_ms_async(uint32_t ms, tusb_defer_func_t func, uintptr_t param);
 
 void usbh_spin_lock(bool in_isr);
-- 
cgit v1.3.1


From c0adaca3a5cecb07da686d0c5f0ad9802295c58b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 2 Mar 2026 20:13:52 +0700
Subject: fix esp32p4 utmi phy init in the new esp-idf, also update esp-idf to
 v5.5.3

---
 .circleci/config2.yml                              |  2 +-
 .../actions/setup_toolchain/espressif/action.yml   |  2 +-
 AGENTS.md                                          | 23 ++++++++++++++++
 hw/bsp/espressif/boards/family.c                   | 32 +++++++++++++++-------
 4 files changed, 47 insertions(+), 12 deletions(-)

(limited to 'hw')

diff --git a/.circleci/config2.yml b/.circleci/config2.yml
index a31b0a818..bb0ac350f 100644
--- a/.circleci/config2.yml
+++ b/.circleci/config2.yml
@@ -110,7 +110,7 @@ commands:
           no_output_timeout: 20m
           command: |
             if [ << parameters.toolchain >> == esp-idf ]; then
-              docker run --rm -v $PWD:/project -w /project espressif/idf:v5.3.2 python tools/build.py << parameters.build-args >> --target all << parameters.family >>
+              docker run --rm -v $PWD:/project -w /project espressif/idf:v5.5.3 python tools/build.py << parameters.build-args >> --target all << parameters.family >>
             else
               # Toolchain option default is gcc
               if [ << parameters.toolchain >> == arm-clang ]; then
diff --git a/.github/actions/setup_toolchain/espressif/action.yml b/.github/actions/setup_toolchain/espressif/action.yml
index e9d645ac8..90ef753c4 100644
--- a/.github/actions/setup_toolchain/espressif/action.yml
+++ b/.github/actions/setup_toolchain/espressif/action.yml
@@ -7,7 +7,7 @@ inputs:
   toolchain_version:
     description: 'Toolchain version'
     required: false
-    default: 'v5.3.2'
+    default: 'v5.5.3'
 
 runs:
   using: "composite"
diff --git a/AGENTS.md b/AGENTS.md
index 73bf1f599..53af39545 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -21,6 +21,8 @@ information that does not match the info here.
 - For specific board families: `python3 tools/get_deps.py FAMILY_NAME` (e.g., rp2040, stm32f4), or
   `python3 tools/get_deps.py -b BOARD_NAME`
 - Dependencies are cached in `lib/` and `hw/mcu/` directories
+- For **Espressif** boards, initialize the ESP-IDF environment before any build/flash/monitor command:
+  `. $HOME/code/esp-idf/export.sh`
 
 ## Build Examples
 
@@ -59,6 +61,19 @@ make BOARD=raspberry_pi_pico all
 
 -- takes 2-3 seconds. NEVER CANCEL. Set timeout to 5+ minutes.
 
+**Option 4: Espressif Example with ESP-IDF**
+
+Only ESP-IDF-enabled examples are supported for Espressif boards. Use FreeRTOS examples such as `examples/device/cdc_msc_freertos`
+that contain `idf_component_register()` support.
+
+```bash
+. $HOME/code/esp-idf/export.sh
+cd examples/device/cdc_msc_freertos
+idf.py -DBOARD=espressif_s3_devkitc build
+```
+
+Use `-DBOARD=...` with any supported board under `hw/bsp/espressif/boards/`. NEVER CANCEL. Set timeout to 10+ minutes.
+
 
 ## Build Options
 
@@ -90,6 +105,14 @@ make BOARD=raspberry_pi_pico all
     - CMake: `ninja cdc_msc-uf2`
     - Make: `make BOARD=raspberry_pi_pico all uf2`
 - **List all targets** (CMake/Ninja): `ninja -t targets`
+- **Espressif flash**:
+    - Run `. $HOME/code/esp-idf/export.sh`
+    - `cd examples/device/cdc_msc_freertos`
+    - `idf.py -DBOARD=espressif_s3_devkitc flash`
+- **Espressif serial monitor / chip log output**:
+    - Run `. $HOME/code/esp-idf/export.sh`
+    - `cd examples/device/cdc_msc_freertos`
+    - `idf.py -DBOARD=espressif_s3_devkitc monitor`
 
 ## Unit Testing
 
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 623cdb8b9..2fad7feec 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -50,7 +50,7 @@ static void max3421_init(void);
 #endif
 
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4, OPT_MCU_ESP32P4)
-static bool usb_init(void);
+static bool usb_init(uint8_t rhport, bool is_host);
 #endif
 
 //--------------------------------------------------------------------+
@@ -90,8 +90,14 @@ void board_init(void) {
   gpio_set_direction(BUTTON_PIN, GPIO_MODE_INPUT);
   gpio_set_pull_mode(BUTTON_PIN, BUTTON_STATE_ACTIVE ? GPIO_PULLDOWN_ONLY : GPIO_PULLUP_ONLY);
 
-#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32P4)
-  usb_init();
+#if CONFIG_USB_OTG_SUPPORTED
+  #if CFG_TUD_ENABLED
+  usb_init(BOARD_TUD_RHPORT, false);
+  #endif
+
+  #if CFG_TUH_ENABLED
+  usb_init(BOARD_TUH_RHPORT, true);
+  #endif
 #endif
 
 #ifdef HIL_TS3USB30_MODE_PIN
@@ -179,24 +185,30 @@ void board_reset_to_bootloader(void) {
 
 static usb_phy_handle_t phy_hdl;
 
-bool usb_init(void) {
+bool usb_init(uint8_t rhport, bool is_host) {
+  (void) rhport;
   // Configure USB PHY
   usb_phy_config_t phy_conf = {
     .controller = USB_PHY_CTRL_OTG,
+#if defined(CONFIG_SOC_USB_UTMI_PHY_NUM) && CONFIG_SOC_USB_UTMI_PHY_NUM > 0
+    .target = USB_PHY_TARGET_UTMI,
+#else
     .target = USB_PHY_TARGET_INT,
+#endif
 
     // maybe we can use USB_OTG_MODE_DEFAULT and switch using dwc2 driver
-#if CFG_TUD_ENABLED
-    .otg_mode = USB_OTG_MODE_DEVICE,
-#elif CFG_TUH_ENABLED
-    .otg_mode = USB_OTG_MODE_HOST,
-#endif
+    .otg_mode = is_host ? USB_OTG_MODE_HOST : USB_OTG_MODE_DEVICE,
     // https://github.com/hathach/tinyusb/issues/2943#issuecomment-2601888322
     // Set speed to undefined (auto-detect) to avoid timinng/racing issue with S3 with host such as macOS
     .otg_speed = USB_PHY_SPEED_UNDEFINED,
   };
 
-  usb_new_phy(&phy_conf, &phy_hdl);
+  esp_err_t const err = usb_new_phy(&phy_conf, &phy_hdl);
+  if (err != ESP_OK) {
+    printf("usb_new_phy failed: %s\r\n", esp_err_to_name(err));
+    phy_hdl = NULL;
+    return false;
+  }
 
   return true;
 }
-- 
cgit v1.3.1


From 70eb68982309df4bd769958d8bad6a3ed9a526d9 Mon Sep 17 00:00:00 2001
From: Robert Dale Smith <robert@robertdalesmith.com>
Date: Tue, 3 Mar 2026 23:01:14 -0600
Subject: fix(bsp/rp2040): use MAX3421_SPI in spi_write_read_blocking

The write+read path in tuh_max3421_spi_xfer_api() hardcodes spi0
instead of using the MAX3421_SPI define. This causes a hang on
boards wired to spi1 (e.g. Feather RP2040 USB Host + MAX3421E
FeatherWing) since spi_write_read_blocking() blocks forever on an
uninitialized SPI peripheral.

The read-only and write-only paths already use MAX3421_SPI correctly.
---
 hw/bsp/rp2040/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index 989140e02..59e07e7f2 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -368,7 +368,7 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
   }else if (rx_buf == NULL) {
     ret = spi_write_blocking(MAX3421_SPI, tx_buf, xfer_bytes);
   }else {
-    ret = spi_write_read_blocking(spi0, tx_buf, rx_buf, xfer_bytes);
+    ret = spi_write_read_blocking(MAX3421_SPI, tx_buf, rx_buf, xfer_bytes);
   }
 
   return ret == (int) xfer_bytes;
-- 
cgit v1.3.1


From 07620c125ba2090b7f1983ba39a9655cde194c6d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 4 Mar 2026 17:59:19 +0700
Subject: esp32p4 min rev 0.1

---
 hw/bsp/espressif/boards/espressif_p4_function_ev/board.cmake        | 1 +
 hw/bsp/espressif/boards/espressif_p4_function_ev/sdkconfig.defaults | 2 ++
 test/hil/tinyusb.json                                               | 2 +-
 3 files changed, 4 insertions(+), 1 deletion(-)
 create mode 100644 hw/bsp/espressif/boards/espressif_p4_function_ev/sdkconfig.defaults

(limited to 'hw')

diff --git a/hw/bsp/espressif/boards/espressif_p4_function_ev/board.cmake b/hw/bsp/espressif/boards/espressif_p4_function_ev/board.cmake
index fe4db4fc1..455ca90a1 100644
--- a/hw/bsp/espressif/boards/espressif_p4_function_ev/board.cmake
+++ b/hw/bsp/espressif/boards/espressif_p4_function_ev/board.cmake
@@ -1,2 +1,3 @@
 # Apply board specific content here
 set(IDF_TARGET "esp32p4")
+list(APPEND SDKCONFIG_DEFAULTS "${CMAKE_CURRENT_LIST_DIR}/sdkconfig.defaults")
diff --git a/hw/bsp/espressif/boards/espressif_p4_function_ev/sdkconfig.defaults b/hw/bsp/espressif/boards/espressif_p4_function_ev/sdkconfig.defaults
new file mode 100644
index 000000000..6b0a548f6
--- /dev/null
+++ b/hw/bsp/espressif/boards/espressif_p4_function_ev/sdkconfig.defaults
@@ -0,0 +1,2 @@
+CONFIG_ESP32P4_SELECTS_REV_LESS_V3=y
+CONFIG_ESP32P4_REV_MIN_1=y
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index 4d7276c8f..029e5ffcd 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -13,7 +13,7 @@
             "flasher": {
                 "name": "esptool",
                 "uid": "4ea4f48f6bc3ee11bbb9d00f9e1b1c54",
-                "args": "-b 1500000 --force",
+                "args": "-b 1500000",
                 "comment": "use --force for ESP32-P4 v0.1"
             },
             "comment": "Use TS3USB30 mux to test both device and host"
-- 
cgit v1.3.1


From faa89ef3b648a4d71ff92371ca506ff1254bebd6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 5 Mar 2026 12:13:01 +0700
Subject: fix hse value for stm32f411blackpill

---
 .../boards/feather_stm32f405/stm32f4xx_hal_conf.h  | 491 --------------------
 .../stm32f4/boards/pyboardv11/stm32f4xx_hal_conf.h | 491 --------------------
 .../boards/stm32f401blackpill/stm32f4xx_hal_conf.h | 493 ---------------------
 .../boards/stm32f407blackvet/stm32f4xx_hal_conf.h  | 493 ---------------------
 .../boards/stm32f407disco/stm32f4xx_hal_conf.h     | 493 ---------------------
 .../stm32f4/boards/stm32f411blackpill/board.cmake  |   1 +
 hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk  |   2 +-
 .../boards/stm32f411blackpill/stm32f4xx_hal_conf.h | 493 ---------------------
 .../boards/stm32f411disco/stm32f4xx_hal_conf.h     | 493 ---------------------
 .../boards/stm32f412disco/stm32f4xx_hal_conf.h     | 493 ---------------------
 .../boards/stm32f412nucleo/stm32f4xx_hal_conf.h    | 493 ---------------------
 .../boards/stm32f439nucleo/stm32f4xx_hal_conf.h    | 486 --------------------
 hw/bsp/stm32f4/family.mk                           |   1 +
 13 files changed, 3 insertions(+), 4920 deletions(-)
 delete mode 100644 hw/bsp/stm32f4/boards/feather_stm32f405/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/pyboardv11/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
 delete mode 100644 hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h

(limited to 'hw')

diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/feather_stm32f405/stm32f4xx_hal_conf.h
deleted file mode 100644
index b892df3b6..000000000
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,491 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf.h
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED   */
-/* #define HAL_DMA2D_MODULE_ENABLED   */
-/* #define HAL_ETH_MODULE_ENABLED   */
-/* #define HAL_NAND_MODULE_ENABLED   */
-/* #define HAL_NOR_MODULE_ENABLED   */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED   */
-/* #define HAL_SDRAM_MODULE_ENABLED   */
-/* #define HAL_HASH_MODULE_ENABLED   */
-/* #define HAL_I2C_MODULE_ENABLED   */
-/* #define HAL_I2S_MODULE_ENABLED   */
-/* #define HAL_IWDG_MODULE_ENABLED   */
-/* #define HAL_LTDC_MODULE_ENABLED   */
-/* #define HAL_RNG_MODULE_ENABLED   */
-/* #define HAL_RTC_MODULE_ENABLED   */
-/* #define HAL_SAI_MODULE_ENABLED   */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_MMC_MODULE_ENABLED   */
-/* #define HAL_SPI_MODULE_ENABLED   */
-/* #define HAL_TIM_MODULE_ENABLED   */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED   */
-/* #define HAL_IRDA_MODULE_ENABLED   */
-/* #define HAL_SMARTCARD_MODULE_ENABLED   */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_PCD_MODULE_ENABLED
-/* #define HAL_HCD_MODULE_ENABLED   */
-/* #define HAL_DSI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED   */
-/* #define HAL_DFSDM_MODULE_ENABLED   */
-/* #define HAL_LPTIM_MODULE_ENABLED   */
-/* #define HAL_EXTI_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)12000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-/* Copied over manually- STM32Cube didn't generate these for some reason. */
-#define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
-#define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
-#define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
-#define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
-#define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
-#define  USE_HAL_SWPMI_REGISTER_CALLBACKS   0U /* SWPMI register callback disabled   */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS     0U /* TIM register callback disabled     */
-#define  USE_HAL_UART_REGISTER_CALLBACKS    0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS   0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848_PHY_ADDRESS Address*/
-#define DP83848_PHY_ADDRESS           0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/pyboardv11/stm32f4xx_hal_conf.h
deleted file mode 100644
index b892df3b6..000000000
--- a/hw/bsp/stm32f4/boards/pyboardv11/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,491 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf.h
-  * @brief   HAL configuration file.
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; COPYRIGHT(c) 2019 STMicroelectronics</center></h2>
-  *
-  * Redistribution and use in source and binary forms, with or without modification,
-  * are permitted provided that the following conditions are met:
-  *   1. Redistributions of source code must retain the above copyright notice,
-  *      this list of conditions and the following disclaimer.
-  *   2. Redistributions in binary form must reproduce the above copyright notice,
-  *      this list of conditions and the following disclaimer in the documentation
-  *      and/or other materials provided with the distribution.
-  *   3. Neither the name of STMicroelectronics nor the names of its contributors
-  *      may be used to endorse or promote products derived from this software
-  *      without specific prior written permission.
-  *
-  * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
-  * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
-  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
-  * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
-  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
-  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
-  * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
-  * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
-  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
-  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-
-/* #define HAL_ADC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_CAN_MODULE_ENABLED   */
-/* #define HAL_CRC_MODULE_ENABLED   */
-/* #define HAL_CRYP_MODULE_ENABLED   */
-/* #define HAL_DAC_MODULE_ENABLED   */
-/* #define HAL_DCMI_MODULE_ENABLED   */
-/* #define HAL_DMA2D_MODULE_ENABLED   */
-/* #define HAL_ETH_MODULE_ENABLED   */
-/* #define HAL_NAND_MODULE_ENABLED   */
-/* #define HAL_NOR_MODULE_ENABLED   */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED   */
-/* #define HAL_SDRAM_MODULE_ENABLED   */
-/* #define HAL_HASH_MODULE_ENABLED   */
-/* #define HAL_I2C_MODULE_ENABLED   */
-/* #define HAL_I2S_MODULE_ENABLED   */
-/* #define HAL_IWDG_MODULE_ENABLED   */
-/* #define HAL_LTDC_MODULE_ENABLED   */
-/* #define HAL_RNG_MODULE_ENABLED   */
-/* #define HAL_RTC_MODULE_ENABLED   */
-/* #define HAL_SAI_MODULE_ENABLED   */
-/* #define HAL_SD_MODULE_ENABLED   */
-/* #define HAL_MMC_MODULE_ENABLED   */
-/* #define HAL_SPI_MODULE_ENABLED   */
-/* #define HAL_TIM_MODULE_ENABLED   */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED   */
-/* #define HAL_IRDA_MODULE_ENABLED   */
-/* #define HAL_SMARTCARD_MODULE_ENABLED   */
-/* #define HAL_WWDG_MODULE_ENABLED   */
-#define HAL_PCD_MODULE_ENABLED
-/* #define HAL_HCD_MODULE_ENABLED   */
-/* #define HAL_DSI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_QSPI_MODULE_ENABLED   */
-/* #define HAL_CEC_MODULE_ENABLED   */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED   */
-/* #define HAL_DFSDM_MODULE_ENABLED   */
-/* #define HAL_LPTIM_MODULE_ENABLED   */
-/* #define HAL_EXTI_MODULE_ENABLED   */
-#define HAL_GPIO_MODULE_ENABLED
-#define HAL_DMA_MODULE_ENABLED
-#define HAL_RCC_MODULE_ENABLED
-#define HAL_FLASH_MODULE_ENABLED
-#define HAL_PWR_MODULE_ENABLED
-#define HAL_CORTEX_MODULE_ENABLED
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    ((uint32_t)12000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    ((uint32_t)100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    ((uint32_t)16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  ((uint32_t)32000U)       /*!< LSI Typical Value in Hz*/
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.*/
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  ((uint32_t)32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    ((uint32_t)5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    ((uint32_t)12288000U) /*!< Value of the External audio frequency in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE		      ((uint32_t)3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            ((uint32_t)0U)   /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-/* Copied over manually- STM32Cube didn't generate these for some reason. */
-#define  USE_HAL_ADC_REGISTER_CALLBACKS     0U /* ADC register callback disabled     */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS     0U /* CEC register callback disabled     */
-#define  USE_HAL_COMP_REGISTER_CALLBACKS    0U /* COMP register callback disabled    */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS    0U /* CRYP register callback disabled    */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS     0U /* DAC register callback disabled     */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS    0U /* DCMI register callback disabled    */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS   0U /* DFSDM register callback disabled   */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS   0U /* DMA2D register callback disabled   */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS     0U /* DSI register callback disabled     */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS     0U /* ETH register callback disabled     */
-#define  USE_HAL_FDCAN_REGISTER_CALLBACKS   0U /* FDCAN register callback disabled   */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS    0U /* NAND register callback disabled    */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS     0U /* NOR register callback disabled     */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS   0U /* SDRAM register callback disabled   */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS    0U /* SRAM register callback disabled    */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS    0U /* HASH register callback disabled    */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS     0U /* HCD register callback disabled     */
-#define  USE_HAL_HRTIM_REGISTER_CALLBACKS   0U /* HRTIM register callback disabled   */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS     0U /* I2C register callback disabled     */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS     0U /* I2S register callback disabled     */
-#define  USE_HAL_JPEG_REGISTER_CALLBACKS    0U /* JPEG register callback disabled    */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS   0U /* LPTIM register callback disabled   */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS    0U /* LTDC register callback disabled    */
-#define  USE_HAL_MDIOS_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
-#define  USE_HAL_OPAMP_REGISTER_CALLBACKS   0U /* MDIO register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS     0U /* PCD register callback disabled     */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS    0U /* QSPI register callback disabled    */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS     0U /* RNG register callback disabled     */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS     0U /* RTC register callback disabled     */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS     0U /* SAI register callback disabled     */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS 0U /* SPDIFRX register callback disabled */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS   0U /* SMBUS register callback disabled   */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS     0U /* SPI register callback disabled     */
-#define  USE_HAL_SWPMI_REGISTER_CALLBACKS   0U /* SWPMI register callback disabled   */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS     0U /* TIM register callback disabled     */
-#define  USE_HAL_UART_REGISTER_CALLBACKS    0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS   0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS    0U /* WWDG register callback disabled    */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    ((uint32_t)4U)       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    ((uint32_t)4U)       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848_PHY_ADDRESS Address*/
-#define DP83848_PHY_ADDRESS           0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 ((uint32_t)0x000000FFU)
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                ((uint32_t)0x00000FFFU)
-
-#define PHY_READ_TO                     ((uint32_t)0x0000FFFFU)
-#define PHY_WRITE_TO                    ((uint32_t)0x0000FFFFU)
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000U)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001U)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr: If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
deleted file mode 100644
index 16f081cfb..000000000
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (25000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
deleted file mode 100644
index e24e782ea..000000000
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
deleted file mode 100644
index e24e782ea..000000000
--- a/hw/bsp/stm32f4/boards/stm32f407disco/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
index d16db508f..f54807c2a 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.cmake
@@ -6,5 +6,6 @@ set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F411CEUx_FLASH.ld)
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32F411xE
+    HSE_VALUE=25000000
     )
 endfunction()
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
index 7af7ca47c..c45aba79b 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
@@ -1,4 +1,4 @@
-CFLAGS += -DSTM32F411xE
+CFLAGS += -DSTM32F411xE -DHSE_VALUE=25000000
 
 # GCC
 SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
deleted file mode 100644
index 16f081cfb..000000000
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (25000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
deleted file mode 100644
index e24e782ea..000000000
--- a/hw/bsp/stm32f4/boards/stm32f411disco/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
deleted file mode 100644
index e24e782ea..000000000
--- a/hw/bsp/stm32f4/boards/stm32f412disco/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
deleted file mode 100644
index e24e782ea..000000000
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,493 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U                  /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U                  /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* DP83848 PHY Address*/
-#define DP83848_PHY_ADDRESS             0x01U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x0000)  /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x0001)  /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-
-#define PHY_SR                          ((uint16_t)0x0010)  /*!< PHY status register Offset                      */
-#define PHY_MICR                        ((uint16_t)0x0011)  /*!< MII Interrupt Control Register                  */
-#define PHY_MISR                        ((uint16_t)0x0012)  /*!< MII Interrupt Status and Misc. Control Register */
-
-#define PHY_LINK_STATUS                 ((uint16_t)0x0001)  /*!< PHY Link mask                                   */
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004)  /*!< PHY Duplex mask                                 */
-
-#define PHY_MICR_INT_EN                 ((uint16_t)0x0002)  /*!< PHY Enable interrupts                           */
-#define PHY_MICR_INT_OE                 ((uint16_t)0x0001)  /*!< PHY Enable output interrupt events              */
-
-#define PHY_MISR_LINK_INT_EN            ((uint16_t)0x0020)  /*!< Enable Interrupt on change of link status       */
-#define PHY_LINK_INTERRUPT              ((uint16_t)0x2000)  /*!< PHY link status interrupt mask                  */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     1U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h
deleted file mode 100644
index 7bbd6b54f..000000000
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/stm32f4xx_hal_conf.h
+++ /dev/null
@@ -1,486 +0,0 @@
-/**
-  ******************************************************************************
-  * @file    stm32f4xx_hal_conf_template.h
-  * @author  MCD Application Team
-  * @brief   HAL configuration file
-  ******************************************************************************
-  * @attention
-  *
-  * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
-  * All rights reserved.</center></h2>
-  *
-  * This software component is licensed by ST under BSD 3-Clause license,
-  * the "License"; You may not use this file except in compliance with the
-  * License. You may obtain a copy of the License at:
-  *                        opensource.org/licenses/BSD-3-Clause
-  *
-  ******************************************************************************
-  */
-
-/* Define to prevent recursive inclusion -------------------------------------*/
-#ifndef __STM32F4xx_HAL_CONF_H
-#define __STM32F4xx_HAL_CONF_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-/* Exported types ------------------------------------------------------------*/
-/* Exported constants --------------------------------------------------------*/
-
-/* ########################## Module Selection ############################## */
-/**
-  * @brief This is the list of modules to be used in the HAL driver
-  */
-#define HAL_MODULE_ENABLED
-/* #define HAL_ADC_MODULE_ENABLED      */
-/* #define HAL_CAN_MODULE_ENABLED      */
-/* #define HAL_CAN_LEGACY_MODULE_ENABLED      */
-/* #define HAL_CRC_MODULE_ENABLED      */
-/* #define HAL_CEC_MODULE_ENABLED      */
-/* #define HAL_CRYP_MODULE_ENABLED     */
-/* #define HAL_DAC_MODULE_ENABLED      */
-/* #define HAL_DCMI_MODULE_ENABLED     */
-#define HAL_DMA_MODULE_ENABLED
-/* #define HAL_DMA2D_MODULE_ENABLED    */
-/* #define HAL_ETH_MODULE_ENABLED      */
-#define HAL_FLASH_MODULE_ENABLED
-/* #define HAL_NAND_MODULE_ENABLED     */
-/* #define HAL_NOR_MODULE_ENABLED      */
-/* #define HAL_PCCARD_MODULE_ENABLED   */
-/* #define HAL_SRAM_MODULE_ENABLED     */
-/* #define HAL_SDRAM_MODULE_ENABLED    */
-/* #define HAL_HASH_MODULE_ENABLED     */
-#define HAL_GPIO_MODULE_ENABLED
-/* #define HAL_EXTI_MODULE_ENABLED     */
-/* #define HAL_I2C_MODULE_ENABLED      */
-/* #define HAL_SMBUS_MODULE_ENABLED    */
-/* #define HAL_I2S_MODULE_ENABLED      */
-/* #define HAL_IWDG_MODULE_ENABLED     */
-/* #define HAL_LTDC_MODULE_ENABLED     */
-/* #define HAL_DSI_MODULE_ENABLED      */
-#define HAL_PWR_MODULE_ENABLED
-/* #define HAL_QSPI_MODULE_ENABLED     */
-#define HAL_RCC_MODULE_ENABLED
-/* #define HAL_RNG_MODULE_ENABLED      */
-/* #define HAL_RTC_MODULE_ENABLED      */
-/* #define HAL_SAI_MODULE_ENABLED      */
-/* #define HAL_SD_MODULE_ENABLED       */
-// #define HAL_SPI_MODULE_ENABLED
-/* #define HAL_TIM_MODULE_ENABLED      */
-#define HAL_UART_MODULE_ENABLED
-/* #define HAL_USART_MODULE_ENABLED    */
-/* #define HAL_IRDA_MODULE_ENABLED     */
-/* #define HAL_SMARTCARD_MODULE_ENABLED */
-/* #define HAL_WWDG_MODULE_ENABLED     */
-#define HAL_CORTEX_MODULE_ENABLED
-/* #define HAL_PCD_MODULE_ENABLED      */
-/* #define HAL_HCD_MODULE_ENABLED      */
-/* #define HAL_FMPI2C_MODULE_ENABLED   */
-/* #define HAL_SPDIFRX_MODULE_ENABLED  */
-/* #define HAL_DFSDM_MODULE_ENABLED    */
-/* #define HAL_LPTIM_MODULE_ENABLED    */
-/* #define HAL_MMC_MODULE_ENABLED      */
-
-/* ########################## HSE/HSI Values adaptation ##################### */
-/**
-  * @brief Adjust the value of External High Speed oscillator (HSE) used in your application.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSE is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSE_VALUE)
-  #define HSE_VALUE    (8000000U) /*!< Value of the External oscillator in Hz */
-#endif /* HSE_VALUE */
-
-#if !defined  (HSE_STARTUP_TIMEOUT)
-  #define HSE_STARTUP_TIMEOUT    (100U)   /*!< Time out for HSE start up, in ms */
-#endif /* HSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief Internal High Speed oscillator (HSI) value.
-  *        This value is used by the RCC HAL module to compute the system frequency
-  *        (when HSI is used as system clock source, directly or through the PLL).
-  */
-#if !defined  (HSI_VALUE)
-  #define HSI_VALUE    (16000000U) /*!< Value of the Internal oscillator in Hz*/
-#endif /* HSI_VALUE */
-
-/**
-  * @brief Internal Low Speed oscillator (LSI) value.
-  */
-#if !defined  (LSI_VALUE)
- #define LSI_VALUE  (32000U)
-#endif /* LSI_VALUE */                      /*!< Value of the Internal Low Speed oscillator in Hz
-                                             The real value may vary depending on the variations
-                                             in voltage and temperature.  */
-/**
-  * @brief External Low Speed oscillator (LSE) value.
-  */
-#if !defined  (LSE_VALUE)
- #define LSE_VALUE  (32768U)    /*!< Value of the External Low Speed oscillator in Hz */
-#endif /* LSE_VALUE */
-
-#if !defined  (LSE_STARTUP_TIMEOUT)
-  #define LSE_STARTUP_TIMEOUT    (5000U)   /*!< Time out for LSE start up, in ms */
-#endif /* LSE_STARTUP_TIMEOUT */
-
-/**
-  * @brief External clock source for I2S peripheral
-  *        This value is used by the I2S HAL module to compute the I2S clock source
-  *        frequency, this source is inserted directly through I2S_CKIN pad.
-  */
-#if !defined  (EXTERNAL_CLOCK_VALUE)
-  #define EXTERNAL_CLOCK_VALUE    (12288000U) /*!< Value of the External oscillator in Hz*/
-#endif /* EXTERNAL_CLOCK_VALUE */
-
-/* Tip: To avoid modifying this file each time you need to use different HSE,
-   ===  you can define the HSE value in your toolchain compiler preprocessor. */
-
-/* ########################### System Configuration ######################### */
-/**
-  * @brief This is the HAL system configuration section
-  */
-#define  VDD_VALUE                    (3300U) /*!< Value of VDD in mv */
-#define  TICK_INT_PRIORITY            (0x0FU) /*!< tick interrupt priority */
-#define  USE_RTOS                     0U
-#define  PREFETCH_ENABLE              1U
-#define  INSTRUCTION_CACHE_ENABLE     1U
-#define  DATA_CACHE_ENABLE            1U
-
-#define  USE_HAL_ADC_REGISTER_CALLBACKS         0U /* ADC register callback disabled       */
-#define  USE_HAL_CAN_REGISTER_CALLBACKS         0U /* CAN register callback disabled       */
-#define  USE_HAL_CEC_REGISTER_CALLBACKS         0U /* CEC register callback disabled       */
-#define  USE_HAL_CRYP_REGISTER_CALLBACKS        0U /* CRYP register callback disabled      */
-#define  USE_HAL_DAC_REGISTER_CALLBACKS         0U /* DAC register callback disabled       */
-#define  USE_HAL_DCMI_REGISTER_CALLBACKS        0U /* DCMI register callback disabled      */
-#define  USE_HAL_DFSDM_REGISTER_CALLBACKS       0U /* DFSDM register callback disabled     */
-#define  USE_HAL_DMA2D_REGISTER_CALLBACKS       0U /* DMA2D register callback disabled     */
-#define  USE_HAL_DSI_REGISTER_CALLBACKS         0U /* DSI register callback disabled       */
-#define  USE_HAL_ETH_REGISTER_CALLBACKS         0U /* ETH register callback disabled       */
-#define  USE_HAL_HASH_REGISTER_CALLBACKS        0U /* HASH register callback disabled      */
-#define  USE_HAL_HCD_REGISTER_CALLBACKS         0U /* HCD register callback disabled       */
-#define  USE_HAL_I2C_REGISTER_CALLBACKS         0U /* I2C register callback disabled       */
-#define  USE_HAL_FMPI2C_REGISTER_CALLBACKS      0U /* FMPI2C register callback disabled    */
-#define  USE_HAL_I2S_REGISTER_CALLBACKS         0U /* I2S register callback disabled       */
-#define  USE_HAL_IRDA_REGISTER_CALLBACKS        0U /* IRDA register callback disabled      */
-#define  USE_HAL_LPTIM_REGISTER_CALLBACKS       0U /* LPTIM register callback disabled     */
-#define  USE_HAL_LTDC_REGISTER_CALLBACKS        0U /* LTDC register callback disabled      */
-#define  USE_HAL_MMC_REGISTER_CALLBACKS         0U /* MMC register callback disabled       */
-#define  USE_HAL_NAND_REGISTER_CALLBACKS        0U /* NAND register callback disabled      */
-#define  USE_HAL_NOR_REGISTER_CALLBACKS         0U /* NOR register callback disabled       */
-#define  USE_HAL_PCCARD_REGISTER_CALLBACKS      0U /* PCCARD register callback disabled    */
-#define  USE_HAL_PCD_REGISTER_CALLBACKS         0U /* PCD register callback disabled       */
-#define  USE_HAL_QSPI_REGISTER_CALLBACKS        0U /* QSPI register callback disabled      */
-#define  USE_HAL_RNG_REGISTER_CALLBACKS         0U /* RNG register callback disabled       */
-#define  USE_HAL_RTC_REGISTER_CALLBACKS         0U /* RTC register callback disabled       */
-#define  USE_HAL_SAI_REGISTER_CALLBACKS         0U /* SAI register callback disabled       */
-#define  USE_HAL_SD_REGISTER_CALLBACKS          0U /* SD register callback disabled        */
-#define  USE_HAL_SMARTCARD_REGISTER_CALLBACKS   0U /* SMARTCARD register callback disabled */
-#define  USE_HAL_SDRAM_REGISTER_CALLBACKS       0U /* SDRAM register callback disabled     */
-#define  USE_HAL_SRAM_REGISTER_CALLBACKS        0U /* SRAM register callback disabled      */
-#define  USE_HAL_SPDIFRX_REGISTER_CALLBACKS     0U /* SPDIFRX register callback disabled   */
-#define  USE_HAL_SMBUS_REGISTER_CALLBACKS       0U /* SMBUS register callback disabled     */
-#define  USE_HAL_SPI_REGISTER_CALLBACKS         0U /* SPI register callback disabled       */
-#define  USE_HAL_TIM_REGISTER_CALLBACKS         0U /* TIM register callback disabled       */
-#define  USE_HAL_UART_REGISTER_CALLBACKS        0U /* UART register callback disabled      */
-#define  USE_HAL_USART_REGISTER_CALLBACKS       0U /* USART register callback disabled     */
-#define  USE_HAL_WWDG_REGISTER_CALLBACKS        0U /* WWDG register callback disabled      */
-
-/* ########################## Assert Selection ############################## */
-/**
-  * @brief Uncomment the line below to expanse the "assert_param" macro in the
-  *        HAL drivers code
-  */
-/* #define USE_FULL_ASSERT    1U */
-
-/* ################## Ethernet peripheral configuration ##################### */
-
-/* Section 1 : Ethernet peripheral configuration */
-
-/* MAC ADDRESS: MAC_ADDR0:MAC_ADDR1:MAC_ADDR2:MAC_ADDR3:MAC_ADDR4:MAC_ADDR5 */
-#define MAC_ADDR0   2U
-#define MAC_ADDR1   0U
-#define MAC_ADDR2   0U
-#define MAC_ADDR3   0U
-#define MAC_ADDR4   0U
-#define MAC_ADDR5   0U
-
-/* Definition of the Ethernet driver buffers size and count */
-#define ETH_RX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for receive               */
-#define ETH_TX_BUF_SIZE                ETH_MAX_PACKET_SIZE /* buffer size for transmit              */
-#define ETH_RXBUFNB                    4U       /* 4 Rx buffers of size ETH_RX_BUF_SIZE  */
-#define ETH_TXBUFNB                    4U       /* 4 Tx buffers of size ETH_TX_BUF_SIZE  */
-
-/* Section 2: PHY configuration section */
-
-/* LAN8742A_PHY_ADDRESS Address*/
-#define LAN8742A_PHY_ADDRESS           0U
-/* PHY Reset delay these values are based on a 1 ms Systick interrupt*/
-#define PHY_RESET_DELAY                 0x000000FFU
-/* PHY Configuration delay */
-#define PHY_CONFIG_DELAY                0x00000FFFU
-
-#define PHY_READ_TO                     0x0000FFFFU
-#define PHY_WRITE_TO                    0x0000FFFFU
-
-/* Section 3: Common PHY Registers */
-
-#define PHY_BCR                         ((uint16_t)0x00U)    /*!< Transceiver Basic Control Register   */
-#define PHY_BSR                         ((uint16_t)0x01U)    /*!< Transceiver Basic Status Register    */
-
-#define PHY_RESET                       ((uint16_t)0x8000U)  /*!< PHY Reset */
-#define PHY_LOOPBACK                    ((uint16_t)0x4000U)  /*!< Select loop-back mode */
-#define PHY_FULLDUPLEX_100M             ((uint16_t)0x2100U)  /*!< Set the full-duplex mode at 100 Mb/s */
-#define PHY_HALFDUPLEX_100M             ((uint16_t)0x2000U)  /*!< Set the half-duplex mode at 100 Mb/s */
-#define PHY_FULLDUPLEX_10M              ((uint16_t)0x0100U)  /*!< Set the full-duplex mode at 10 Mb/s  */
-#define PHY_HALFDUPLEX_10M              ((uint16_t)0x0000U)  /*!< Set the half-duplex mode at 10 Mb/s  */
-#define PHY_AUTONEGOTIATION             ((uint16_t)0x1000U)  /*!< Enable auto-negotiation function     */
-#define PHY_RESTART_AUTONEGOTIATION     ((uint16_t)0x0200U)  /*!< Restart auto-negotiation function    */
-#define PHY_POWERDOWN                   ((uint16_t)0x0800U)  /*!< Select the power down mode           */
-#define PHY_ISOLATE                     ((uint16_t)0x0400U)  /*!< Isolate PHY from MII                 */
-
-#define PHY_AUTONEGO_COMPLETE           ((uint16_t)0x0020U)  /*!< Auto-Negotiation process completed   */
-#define PHY_LINKED_STATUS               ((uint16_t)0x0004U)  /*!< Valid link established               */
-#define PHY_JABBER_DETECTION            ((uint16_t)0x0002U)  /*!< Jabber condition detected            */
-
-/* Section 4: Extended PHY Registers */
-#define PHY_SR                          ((uint16_t)0x10U)    /*!< PHY status register Offset                      */
-
-#define PHY_SPEED_STATUS                ((uint16_t)0x0002U)  /*!< PHY Speed mask                                  */
-#define PHY_DUPLEX_STATUS               ((uint16_t)0x0004U)  /*!< PHY Duplex mask                                 */
-
-#define PHY_ISFR                        ((uint16_t)0x001DU)    /*!< PHY Interrupt Source Flag register Offset   */
-#define PHY_ISFR_INT4                   ((uint16_t)0x000BU)  /*!< PHY Link down inturrupt       */
-
-/* ################## SPI peripheral configuration ########################## */
-
-/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
-* Activated: CRC code is present inside driver
-* Deactivated: CRC code cleaned from driver
-*/
-
-#define USE_SPI_CRC                     0U
-
-/* Includes ------------------------------------------------------------------*/
-/**
-  * @brief Include module's header file
-  */
-
-#ifdef HAL_RCC_MODULE_ENABLED
-  #include "stm32f4xx_hal_rcc.h"
-#endif /* HAL_RCC_MODULE_ENABLED */
-
-#ifdef HAL_GPIO_MODULE_ENABLED
-  #include "stm32f4xx_hal_gpio.h"
-#endif /* HAL_GPIO_MODULE_ENABLED */
-
-#ifdef HAL_EXTI_MODULE_ENABLED
-  #include "stm32f4xx_hal_exti.h"
-#endif /* HAL_EXTI_MODULE_ENABLED */
-
-#ifdef HAL_DMA_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma.h"
-#endif /* HAL_DMA_MODULE_ENABLED */
-
-#ifdef HAL_CORTEX_MODULE_ENABLED
-  #include "stm32f4xx_hal_cortex.h"
-#endif /* HAL_CORTEX_MODULE_ENABLED */
-
-#ifdef HAL_ADC_MODULE_ENABLED
-  #include "stm32f4xx_hal_adc.h"
-#endif /* HAL_ADC_MODULE_ENABLED */
-
-#ifdef HAL_CAN_MODULE_ENABLED
-  #include "stm32f4xx_hal_can.h"
-#endif /* HAL_CAN_MODULE_ENABLED */
-
-#ifdef HAL_CAN_LEGACY_MODULE_ENABLED
-  #include "stm32f4xx_hal_can_legacy.h"
-#endif /* HAL_CAN_LEGACY_MODULE_ENABLED */
-
-#ifdef HAL_CRC_MODULE_ENABLED
-  #include "stm32f4xx_hal_crc.h"
-#endif /* HAL_CRC_MODULE_ENABLED */
-
-#ifdef HAL_CRYP_MODULE_ENABLED
-  #include "stm32f4xx_hal_cryp.h"
-#endif /* HAL_CRYP_MODULE_ENABLED */
-
-#ifdef HAL_DMA2D_MODULE_ENABLED
-  #include "stm32f4xx_hal_dma2d.h"
-#endif /* HAL_DMA2D_MODULE_ENABLED */
-
-#ifdef HAL_DAC_MODULE_ENABLED
-  #include "stm32f4xx_hal_dac.h"
-#endif /* HAL_DAC_MODULE_ENABLED */
-
-#ifdef HAL_DCMI_MODULE_ENABLED
-  #include "stm32f4xx_hal_dcmi.h"
-#endif /* HAL_DCMI_MODULE_ENABLED */
-
-#ifdef HAL_ETH_MODULE_ENABLED
-  #include "stm32f4xx_hal_eth.h"
-#endif /* HAL_ETH_MODULE_ENABLED */
-
-#ifdef HAL_FLASH_MODULE_ENABLED
-  #include "stm32f4xx_hal_flash.h"
-#endif /* HAL_FLASH_MODULE_ENABLED */
-
-#ifdef HAL_SRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sram.h"
-#endif /* HAL_SRAM_MODULE_ENABLED */
-
-#ifdef HAL_NOR_MODULE_ENABLED
-  #include "stm32f4xx_hal_nor.h"
-#endif /* HAL_NOR_MODULE_ENABLED */
-
-#ifdef HAL_NAND_MODULE_ENABLED
-  #include "stm32f4xx_hal_nand.h"
-#endif /* HAL_NAND_MODULE_ENABLED */
-
-#ifdef HAL_PCCARD_MODULE_ENABLED
-  #include "stm32f4xx_hal_pccard.h"
-#endif /* HAL_PCCARD_MODULE_ENABLED */
-
-#ifdef HAL_SDRAM_MODULE_ENABLED
-  #include "stm32f4xx_hal_sdram.h"
-#endif /* HAL_SDRAM_MODULE_ENABLED */
-
-#ifdef HAL_HASH_MODULE_ENABLED
- #include "stm32f4xx_hal_hash.h"
-#endif /* HAL_HASH_MODULE_ENABLED */
-
-#ifdef HAL_I2C_MODULE_ENABLED
- #include "stm32f4xx_hal_i2c.h"
-#endif /* HAL_I2C_MODULE_ENABLED */
-
-#ifdef HAL_SMBUS_MODULE_ENABLED
- #include "stm32f4xx_hal_smbus.h"
-#endif /* HAL_SMBUS_MODULE_ENABLED */
-
-#ifdef HAL_I2S_MODULE_ENABLED
- #include "stm32f4xx_hal_i2s.h"
-#endif /* HAL_I2S_MODULE_ENABLED */
-
-#ifdef HAL_IWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_iwdg.h"
-#endif /* HAL_IWDG_MODULE_ENABLED */
-
-#ifdef HAL_LTDC_MODULE_ENABLED
- #include "stm32f4xx_hal_ltdc.h"
-#endif /* HAL_LTDC_MODULE_ENABLED */
-
-#ifdef HAL_PWR_MODULE_ENABLED
- #include "stm32f4xx_hal_pwr.h"
-#endif /* HAL_PWR_MODULE_ENABLED */
-
-#ifdef HAL_RNG_MODULE_ENABLED
- #include "stm32f4xx_hal_rng.h"
-#endif /* HAL_RNG_MODULE_ENABLED */
-
-#ifdef HAL_RTC_MODULE_ENABLED
- #include "stm32f4xx_hal_rtc.h"
-#endif /* HAL_RTC_MODULE_ENABLED */
-
-#ifdef HAL_SAI_MODULE_ENABLED
- #include "stm32f4xx_hal_sai.h"
-#endif /* HAL_SAI_MODULE_ENABLED */
-
-#ifdef HAL_SD_MODULE_ENABLED
- #include "stm32f4xx_hal_sd.h"
-#endif /* HAL_SD_MODULE_ENABLED */
-
-#ifdef HAL_SPI_MODULE_ENABLED
- #include "stm32f4xx_hal_spi.h"
-#endif /* HAL_SPI_MODULE_ENABLED */
-
-#ifdef HAL_TIM_MODULE_ENABLED
- #include "stm32f4xx_hal_tim.h"
-#endif /* HAL_TIM_MODULE_ENABLED */
-
-#ifdef HAL_UART_MODULE_ENABLED
- #include "stm32f4xx_hal_uart.h"
-#endif /* HAL_UART_MODULE_ENABLED */
-
-#ifdef HAL_USART_MODULE_ENABLED
- #include "stm32f4xx_hal_usart.h"
-#endif /* HAL_USART_MODULE_ENABLED */
-
-#ifdef HAL_IRDA_MODULE_ENABLED
- #include "stm32f4xx_hal_irda.h"
-#endif /* HAL_IRDA_MODULE_ENABLED */
-
-#ifdef HAL_SMARTCARD_MODULE_ENABLED
- #include "stm32f4xx_hal_smartcard.h"
-#endif /* HAL_SMARTCARD_MODULE_ENABLED */
-
-#ifdef HAL_WWDG_MODULE_ENABLED
- #include "stm32f4xx_hal_wwdg.h"
-#endif /* HAL_WWDG_MODULE_ENABLED */
-
-#ifdef HAL_PCD_MODULE_ENABLED
- #include "stm32f4xx_hal_pcd.h"
-#endif /* HAL_PCD_MODULE_ENABLED */
-
-#ifdef HAL_HCD_MODULE_ENABLED
- #include "stm32f4xx_hal_hcd.h"
-#endif /* HAL_HCD_MODULE_ENABLED */
-
-#ifdef HAL_DSI_MODULE_ENABLED
- #include "stm32f4xx_hal_dsi.h"
-#endif /* HAL_DSI_MODULE_ENABLED */
-
-#ifdef HAL_QSPI_MODULE_ENABLED
- #include "stm32f4xx_hal_qspi.h"
-#endif /* HAL_QSPI_MODULE_ENABLED */
-
-#ifdef HAL_CEC_MODULE_ENABLED
- #include "stm32f4xx_hal_cec.h"
-#endif /* HAL_CEC_MODULE_ENABLED */
-
-#ifdef HAL_FMPI2C_MODULE_ENABLED
- #include "stm32f4xx_hal_fmpi2c.h"
-#endif /* HAL_FMPI2C_MODULE_ENABLED */
-
-#ifdef HAL_SPDIFRX_MODULE_ENABLED
- #include "stm32f4xx_hal_spdifrx.h"
-#endif /* HAL_SPDIFRX_MODULE_ENABLED */
-
-#ifdef HAL_DFSDM_MODULE_ENABLED
- #include "stm32f4xx_hal_dfsdm.h"
-#endif /* HAL_DFSDM_MODULE_ENABLED */
-
-#ifdef HAL_LPTIM_MODULE_ENABLED
- #include "stm32f4xx_hal_lptim.h"
-#endif /* HAL_LPTIM_MODULE_ENABLED */
-
-#ifdef HAL_MMC_MODULE_ENABLED
- #include "stm32f4xx_hal_mmc.h"
-#endif /* HAL_MMC_MODULE_ENABLED */
-
-/* Exported macro ------------------------------------------------------------*/
-#ifdef  USE_FULL_ASSERT
-/**
-  * @brief  The assert_param macro is used for function's parameters check.
-  * @param  expr If expr is false, it calls assert_failed function
-  *         which reports the name of the source file and the source
-  *         line number of the call that failed.
-  *         If expr is true, it returns no value.
-  * @retval None
-  */
-  #define assert_param(expr) ((expr) ? (void)0U : assert_failed((uint8_t *)__FILE__, __LINE__))
-/* Exported functions ------------------------------------------------------- */
-  void assert_failed(uint8_t* file, uint32_t line);
-#else
-  #define assert_param(expr) ((void)0U)
-#endif /* USE_FULL_ASSERT */
-
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __STM32F4xx_HAL_CONF_H */
-
-
-/************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index c3c41dc3f..f3e74ecea 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -71,6 +71,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c
 
 INC += \
+	$(TOP)/hw/bsp/stm32$(ST_FAMILY) \
 	$(TOP)/$(BOARD_PATH) \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
 	$(TOP)/$(ST_CMSIS)/Include \
-- 
cgit v1.3.1


From 70c93adc2f6264015cae597a9abe58ad2e1aaee6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 5 Mar 2026 17:51:57 +0700
Subject: improve threadx support, add multi ROTS support for board_test and
 msc_dual_lun

---
 AGENTS.md                               |  57 +++++++++++-
 examples/device/board_test/src/main.c   |  80 +++++++++++++++-
 examples/device/msc_dual_lun/src/main.c | 160 ++++++++++++++++++++++++++------
 hw/bsp/board.c                          |  55 +++++++++++
 hw/bsp/family_support.cmake             |  20 ++++
 hw/bsp/stm32h7/family.c                 |   9 ++
 src/osal/osal_threadx.h                 |  27 ++++--
 tools/get_deps.py                       |   3 +
 8 files changed, 370 insertions(+), 41 deletions(-)

(limited to 'hw')

diff --git a/AGENTS.md b/AGENTS.md
index b4f87e98c..34fc57cb8 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -114,13 +114,65 @@ Use `-DBOARD=...` with any supported board under `hw/bsp/espressif/boards/`. NEV
     - `cd examples/device/cdc_msc_freertos`
     - `idf.py -DBOARD=espressif_s3_devkitc monitor`
 
-## J-Link GDB Server + RTT Logging
+## GDB Debugging
+
+Look up the board's `JLINK_DEVICE` and `OPENOCD_OPTION` from `hw/bsp/*/boards/*/board.cmake` (or `board.mk`).
+
+### JLinkGDBServer
+
+**Terminal 1 – start the GDB server:**
+```bash
+JLinkGDBServer -device stm32h743xi -if SWD -speed 4000 \
+  -port 2331 -swoport 2332 -telnetport 2333 -nogui
+```
+
+**Terminal 2 – connect GDB:**
+```bash
+arm-none-eabi-gdb /tmp/build/firmware.elf
+(gdb) target remote :2331
+(gdb) monitor reset halt
+(gdb) load
+(gdb) continue
+```
+
+To break on entry instead of running immediately:
+```bash
+(gdb) monitor reset halt
+(gdb) load
+(gdb) break main
+(gdb) continue
+```
+
+### OpenOCD
+
+**Terminal 1 – start the GDB server:**
+```bash
+openocd -f interface/stlink.cfg -f target/stm32h7x.cfg
+# or with J-Link probe:
+openocd -f interface/jlink.cfg -f target/stm32h7x.cfg
+```
+
+For boards that define `OPENOCD_OPTION` in `board.cmake`, use those options directly:
+```bash
+openocd $(cat hw/bsp/FAMILY/boards/BOARD/board.cmake | grep OPENOCD_OPTION | ...)
+```
+
+**Terminal 2 – connect GDB (OpenOCD default port is 3333):**
+```bash
+arm-none-eabi-gdb /tmp/build/firmware.elf
+(gdb) target remote :3333
+(gdb) monitor reset halt
+(gdb) load
+(gdb) continue
+```
+
+### RTT Logging with JLinkGDBServer
 
 - Build with RTT logging enabled (example):
   `cd examples/device/cdc_msc && make BOARD=stm32h743eval LOG=2 LOGGER=rtt all`
 - Flash with J-Link:
   `cd examples/device/cdc_msc && make BOARD=stm32h743eval LOG=2 LOGGER=rtt flash-jlink`
-- Launch GDB server (keep this running in terminal 1):
+- Launch GDB server with RTT port (keep this running in terminal 1):
   `JLinkGDBServer -device stm32h743xi -if SWD -speed 4000 -port 2331 -swoport 2332 -telnetport 2333 -RTTTelnetPort 19021 -nogui`
 - Read RTT output (terminal 2):
   `JLinkRTTClient`
@@ -128,7 +180,6 @@ Use `-DBOARD=...` with any supported board under `hw/bsp/espressif/boards/`. NEV
   `JLinkRTTClient | tee rtt.log`
 - For non-interactive capture:
   `timeout 20s JLinkRTTClient > rtt.log`
-- Use the board-specific `JLINK_DEVICE` from `hw/bsp/*/boards/*/board.mk` if you are not using `stm32h743eval`.
 
 ## Unit Testing
 
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 757876ac8..ddc9bba6b 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -39,10 +39,7 @@ enum {
 
 #define HELLO_STR   "Hello from TinyUSB\r\n"
 
-int main(void) {
-  board_init();
-  board_led_write(true);
-
+static void board_test_loop(void) {
   uint32_t start_ms = 0;
   bool led_state = false;
 
@@ -76,8 +73,83 @@ int main(void) {
   }
 }
 
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+static void freertos_init(void);
+#endif
+
+int main(void) {
+  board_init();
+  board_led_write(true);
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  freertos_init();
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+  tx_kernel_enter();
+#else
+  board_test_loop();
+#endif
+
+  return 0;
+}
+
 #ifdef ESP_PLATFORM
 void app_main(void) {
   main();
 }
 #endif
+
+//--------------------------------------------------------------------+
+// FreeRTOS
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+
+#ifdef ESP_PLATFORM
+#define MAIN_STACK_SIZE   4096
+#else
+#define MAIN_STACK_SIZE   configMINIMAL_STACK_SIZE
+#endif
+
+#if configSUPPORT_STATIC_ALLOCATION
+static StackType_t  _main_stack[MAIN_STACK_SIZE];
+static StaticTask_t _main_taskdef;
+#endif
+
+static void board_test_task(void* param) {
+  (void) param;
+  board_test_loop();
+}
+
+static void freertos_init(void) {
+  #if configSUPPORT_STATIC_ALLOCATION
+  xTaskCreateStatic(board_test_task, "main", MAIN_STACK_SIZE, NULL, 1, _main_stack, &_main_taskdef);
+  #else
+  xTaskCreate(board_test_task, "main", MAIN_STACK_SIZE, NULL, 1, NULL);
+  #endif
+  #ifndef ESP_PLATFORM
+  vTaskStartScheduler();
+  #endif
+}
+
+//--------------------------------------------------------------------+
+// ThreadX
+//--------------------------------------------------------------------+
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+
+#define MAIN_TASK_STACK_SIZE  1024
+static TX_THREAD _main_thread;
+static ULONG _main_thread_stack[MAIN_TASK_STACK_SIZE / sizeof(ULONG)];
+static void main_thread_entry(ULONG arg);
+
+static void main_thread_entry(ULONG arg) {
+  (void) arg;
+  board_test_loop();
+}
+
+void tx_application_define(void *first_unused_memory) {
+  (void) first_unused_memory;
+  static CHAR main_thread_name[] = "main";
+  tx_thread_create(&_main_thread, main_thread_name, main_thread_entry, 0,
+                   _main_thread_stack, MAIN_TASK_STACK_SIZE,
+                   1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
+}
+#endif
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index b459871f7..9ca3a1f34 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -31,7 +31,7 @@
 #include "tusb.h"
 
 //--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF PROTYPES
+// MACRO CONSTANT TYPEDEF PROTOTYPES
 //--------------------------------------------------------------------+
 
 /* Blink pattern
@@ -41,71 +41,179 @@
  */
 enum {
   BLINK_NOT_MOUNTED = 250,
-  BLINK_MOUNTED = 1000,
-  BLINK_SUSPENDED = 2500,
+  BLINK_MOUNTED     = 1000,
+  BLINK_SUSPENDED   = 2500,
 };
 
 static uint32_t blink_interval_ms = BLINK_NOT_MOUNTED;
 
-void led_blinking_task(void);
+// Task parameter type: ULONG for ThreadX, void* for FreeRTOS and noos
+#if CFG_TUSB_OS == OPT_OS_THREADX
+  #define RTOS_PARAM ULONG
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  #define RTOS_PARAM void*
+  static void freertos_init(void);
+#else
+  #define RTOS_PARAM void*
+#endif
 
-/*------------- MAIN -------------*/
-int main(void) {
-  board_init();
+void led_blinking_task(RTOS_PARAM param);
 
-  // init device stack on configured roothub port
+//--------------------------------------------------------------------+
+// USB Device Task
+//--------------------------------------------------------------------+
+static void usb_device_init(void) {
   tusb_rhport_init_t dev_init = {
-    .role = TUSB_ROLE_DEVICE,
+    .role  = TUSB_ROLE_DEVICE,
     .speed = TUSB_SPEED_AUTO
   };
   tusb_init(BOARD_TUD_RHPORT, &dev_init);
-
   board_init_after_tusb();
+}
+
+#if CFG_TUSB_OS != OPT_OS_NONE && CFG_TUSB_OS != OPT_OS_PICO
+static void usb_device_task(RTOS_PARAM param) {
+  (void) param;
+  usb_device_init();
 
   while (1) {
-    tud_task(); // tinyusb device task
-    led_blinking_task();
+    tud_task();
   }
 }
+#endif
 
 //--------------------------------------------------------------------+
-// Device callbacks
+// Main
 //--------------------------------------------------------------------+
+int main(void) {
+  board_init();
+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  freertos_init();
+
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+  tx_kernel_enter();
+
+#else
+  // noos + pico-sdk: init USB then run polling loop
+  usb_device_init();
 
-// Invoked when device is mounted
+  while (1) {
+    tud_task();
+    led_blinking_task(NULL);
+  }
+#endif
+
+  return 0;
+}
+
+#ifdef ESP_PLATFORM
+void app_main(void) {
+  main();
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Device callbacks
+//--------------------------------------------------------------------+
 void tud_mount_cb(void) {
   blink_interval_ms = BLINK_MOUNTED;
 }
 
-// Invoked when device is unmounted
 void tud_umount_cb(void) {
   blink_interval_ms = BLINK_NOT_MOUNTED;
 }
 
-// Invoked when usb bus is suspended
-// remote_wakeup_en : if host allow us  to perform remote wakeup
-// Within 7ms, device must draw an average of current less than 2.5 mA from bus
 void tud_suspend_cb(bool remote_wakeup_en) {
   (void) remote_wakeup_en;
   blink_interval_ms = BLINK_SUSPENDED;
 }
 
-// Invoked when usb bus is resumed
 void tud_resume_cb(void) {
   blink_interval_ms = tud_mounted() ? BLINK_MOUNTED : BLINK_NOT_MOUNTED;
 }
 
 //--------------------------------------------------------------------+
-// BLINKING TASK
+// Blinking Task
 //--------------------------------------------------------------------+
-void led_blinking_task(void) {
+void led_blinking_task(RTOS_PARAM param) {
+  (void) param;
   static uint32_t start_ms = 0;
   static bool led_state = false;
 
-  // Blink every interval ms
-  if (tusb_time_millis_api() - start_ms < blink_interval_ms) return; // not enough time
-  start_ms += blink_interval_ms;
+  while (1) {
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+    vTaskDelay(blink_interval_ms / portTICK_PERIOD_MS);
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+    tx_thread_sleep(_osal_ms2tick(blink_interval_ms));
+#else
+    if (tusb_time_millis_api() - start_ms < blink_interval_ms) {
+      return; // not enough time
+    }
+#endif
+
+    start_ms += blink_interval_ms;
+    board_led_write(led_state);
+    led_state = 1 - led_state; // toggle
+  }
+}
+
+//--------------------------------------------------------------------+
+// FreeRTOS
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+
+#ifdef ESP_PLATFORM
+#define USBD_STACK_SIZE   4096
+#else
+#define USBD_STACK_SIZE   (3*configMINIMAL_STACK_SIZE/2 * (CFG_TUSB_DEBUG ? 2 : 1))
+#endif
+#define BLINKY_STACK_SIZE   configMINIMAL_STACK_SIZE
+
+#if configSUPPORT_STATIC_ALLOCATION
+static StackType_t  _usb_device_stack[USBD_STACK_SIZE];
+static StaticTask_t _usb_device_taskdef;
+static StackType_t  _blinky_stack[BLINKY_STACK_SIZE];
+static StaticTask_t _blinky_taskdef;
+#endif
+
+
+static void freertos_init(void) {
+  #if configSUPPORT_STATIC_ALLOCATION
+  xTaskCreateStatic(usb_device_task,     "usbd",   USBD_STACK_SIZE,   NULL, configMAX_PRIORITIES - 1, _usb_device_stack, &_usb_device_taskdef);
+  xTaskCreateStatic(led_blinking_task,   "blinky", BLINKY_STACK_SIZE, NULL, 1,                        _blinky_stack,     &_blinky_taskdef);
+  #else
+  xTaskCreate(usb_device_task,           "usbd",   USBD_STACK_SIZE,   NULL, configMAX_PRIORITIES - 1, NULL);
+  xTaskCreate(led_blinking_task,         "blinky", BLINKY_STACK_SIZE, NULL, 1,                        NULL);
+  #endif
+  #ifndef ESP_PLATFORM
+  vTaskStartScheduler();
+  #endif
+}
 
-  board_led_write(led_state);
-  led_state = 1 - led_state; // toggle
+//--------------------------------------------------------------------+
+// ThreadX
+//--------------------------------------------------------------------+
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+
+#define USBD_STACK_SIZE   4096
+#define BLINKY_STACK_SIZE 1024
+
+static TX_THREAD _usb_device_thread;
+static ULONG     _usb_device_stack[USBD_STACK_SIZE / sizeof(ULONG)];
+static TX_THREAD _blinky_thread;
+static ULONG     _blinky_stack[BLINKY_STACK_SIZE / sizeof(ULONG)];
+
+void tx_application_define(void *first_unused_memory) {
+  (void) first_unused_memory;
+  static CHAR usbd_name[]   = "usbd";
+  static CHAR blinky_name[] = "blinky";
+  tx_thread_create(&_usb_device_thread, usbd_name, usb_device_task, 0,
+                   _usb_device_stack, USBD_STACK_SIZE,
+                   0, 0, TX_NO_TIME_SLICE, TX_AUTO_START);
+  tx_thread_create(&_blinky_thread, blinky_name, led_blinking_task, 0,
+                   _blinky_stack, BLINKY_STACK_SIZE,
+                   1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
 }
+
+#endif
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 91e7de9fe..0553a7eb7 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -251,3 +251,58 @@ void vApplicationSetupTimerInterrupt(void) {
 #endif
 
 #endif
+
+//--------------------------------------------------------------------
+// ThreadX hooks for ARM Cortex-M
+//--------------------------------------------------------------------
+#if CFG_TUSB_OS == OPT_OS_THREADX && defined(__ARM_ARCH)
+
+#include "tx_api.h"
+#include "tx_initialize.h"
+
+// Newlib linker symbol: end of statically allocated RAM (start of heap)
+extern ULONG _end;
+
+// CMSIS standard variable for system clock frequency
+extern uint32_t SystemCoreClock;
+
+// Cortex-M SysTick registers (fixed addresses on all Cortex-M)
+#define _TX_SYST_CSR    (*((volatile uint32_t *)0xE000E010U))
+#define _TX_SYST_RVR    (*((volatile uint32_t *)0xE000E014U))
+#define _TX_SYST_CVR    (*((volatile uint32_t *)0xE000E018U))
+// SCB->SHP[10] = PendSV priority, [11] = SysTick priority (byte access at SCB base + 0xD22)
+#define _TX_SCB_SHPR3   (*((volatile uint32_t *)0xE000ED20U))
+
+VOID _tx_initialize_low_level(VOID) {
+  // Set the first available memory address for tx_application_define
+  _tx_initialize_unused_memory = (VOID *)(&_end);
+
+  // Configure SysTick for ThreadX tick rate: enable with processor clock + interrupt
+  _TX_SYST_RVR = (SystemCoreClock / TX_TIMER_TICKS_PER_SECOND) - 1u;
+  _TX_SYST_CVR = 0u;
+  _TX_SYST_CSR = 0x07u; // CLKSOURCE=1, TICKINT=1, ENABLE=1
+
+  // SHPR3 bits[31:24] = SysTick priority, bits[23:16] = PendSV priority
+  // PendSV must be lowest priority (0xFF). SysTick must be higher than PendSV (0x40)
+  // so SysTick can preempt the PendSV scheduler idle loop (__tx_ts_wait) to tick the timer.
+  _TX_SCB_SHPR3 = (_TX_SCB_SHPR3 & 0x0000FFFFU) | 0x40FF0000U;
+}
+
+// Weak callback for board-specific SysTick work (e.g. HAL_IncTick on STM32)
+void osal_threadx_tick_cb(void);
+TU_ATTR_WEAK void osal_threadx_tick_cb(void) { }
+
+// SysTick drives the ThreadX timer tick
+extern void _tx_timer_interrupt(void);
+void SysTick_Handler(void);
+void SysTick_Handler(void) {
+  osal_threadx_tick_cb();
+  _tx_timer_interrupt();
+}
+
+// tusb_time_millis_api() based on ThreadX tick counter
+uint32_t tusb_time_millis_api(void) {
+  return (uint32_t)((uint64_t) tx_time_get() * 1000u / TX_TIMER_TICKS_PER_SECOND);
+}
+
+#endif
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 699afda92..4299ad44e 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -380,6 +380,26 @@ function(family_add_rtos TARGET RTOS)
 
     target_link_libraries(${TARGET} PUBLIC freertos_kernel)
     target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_FREERTOS)
+  elseif (RTOS STREQUAL "threadx")
+    if (NOT TARGET threadx)
+      # Derive THREADX_ARCH from CMAKE_SYSTEM_CPU if not explicitly set
+      if (NOT DEFINED THREADX_ARCH)
+        string(REPLACE "-" "_" THREADX_ARCH ${CMAKE_SYSTEM_CPU})
+      endif ()
+      # Derive THREADX_TOOLCHAIN from TOOLCHAIN if not explicitly set
+      if (NOT DEFINED THREADX_TOOLCHAIN)
+        if (TOOLCHAIN STREQUAL "iar")
+          set(THREADX_TOOLCHAIN "iar")
+        elseif (TOOLCHAIN STREQUAL "clang")
+          set(THREADX_TOOLCHAIN "ac6")
+        else ()
+          set(THREADX_TOOLCHAIN "gnu")
+        endif ()
+      endif ()
+      add_subdirectory(${TOP}/lib/threadx ${CMAKE_BINARY_DIR}/lib/threadx)
+    endif ()
+    target_link_libraries(${TARGET} PUBLIC threadx)
+    target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_THREADX)
   elseif (RTOS STREQUAL "zephyr")
     target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_ZEPHYR)
     target_include_directories(${TARGET} PUBLIC ${ZEPHYR_BASE}/include)
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index 2759dac63..c94c2e755 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -139,6 +139,10 @@ void board_init(void) {
   #endif
 
   NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+  // Disable SysTick before kernel entry; _tx_initialize_low_level() will re-configure it
+  SysTick->CTRL &= ~1UL;
 #endif
 
   GPIO_InitTypeDef GPIO_InitStruct;
@@ -299,6 +303,11 @@ uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+// Keep HAL_GetTick() working for HAL functions called from board_init()
+void osal_threadx_tick_cb(void) {
+  HAL_IncTick();
+}
 #endif
 
 void HardFault_Handler(void) {
diff --git a/src/osal/osal_threadx.h b/src/osal/osal_threadx.h
index 4f05ef535..6bcf9c5ab 100644
--- a/src/osal/osal_threadx.h
+++ b/src/osal/osal_threadx.h
@@ -39,18 +39,28 @@ extern "C" {
 //--------------------------------------------------------------------+
 
 TU_ATTR_ALWAYS_INLINE static inline uint32_t _osal_ms2tick(uint32_t msec) {
-  if ( msec == TX_WAIT_FOREVER ) return TX_WAIT_FOREVER;
-  if ( msec == 0 ) return 0;
+  if ( msec == TX_WAIT_FOREVER ) {
+    return TX_WAIT_FOREVER;
+  }
+  if ( msec == 0 ) {
+    return 0;
+  }
 
   uint32_t ticks = msec * TX_TIMER_TICKS_PER_SECOND  / 1000;
 
   // TX_TIMER_TICKS_PER_SECOND is less than 1000 and 1 tick > 1 ms
   // we still need to delay at least 1 tick
-  if ( ticks == 0 ) ticks = 1;
+  if ( ticks == 0 ) {
+    ticks = 1;
+  }
 
   return ticks;
 }
 
+TU_ATTR_ALWAYS_INLINE static inline uint32_t osal_time_millis(void) {
+  return (uint32_t)((uint64_t) tx_time_get() * 1000u / TX_TIMER_TICKS_PER_SECOND);
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void osal_task_delay(uint32_t msec) {
   tx_thread_sleep(_osal_ms2tick(msec));
 }
@@ -94,7 +104,7 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx,
 typedef TX_SEMAPHORE osal_semaphore_def_t, * osal_semaphore_t;
 
 TU_ATTR_ALWAYS_INLINE static inline osal_semaphore_t osal_semaphore_create(osal_semaphore_def_t *semdef) {
-  tx_semaphore_create(semdef->semaphore, semdef->name, 0);
+  tx_semaphore_create(semdef, TX_NULL, 0);
   return semdef;
 }
 
@@ -113,6 +123,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_semaphore_wait(osal_semaphore_t se
 }
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_semaphore_reset(osal_semaphore_t sem_hdl) {
+  (void) sem_hdl;
 }
 
 //--------------------------------------------------------------------+
@@ -152,10 +163,10 @@ typedef TX_QUEUE osal_queue_def_t, * osal_queue_t;
 #define OSAL_QUEUE_DEF(_int_set, _name, _depth, _type)    \
 static _type _name##_buf[_depth];                         \
 osal_queue_def_t _name = {                                \
-		.tx_queue_name         = #_name,                  \
+		.tx_queue_name         = (CHAR*)(uintptr_t)#_name,                  \
 		.tx_queue_message_size = (sizeof(_type) + 3) / 4, \
 		.tx_queue_capacity     = _depth,                  \
-		.tx_queue_start        =  _name##_buf }
+		.tx_queue_start        = (ULONG *) _name##_buf }
 
 
 TU_ATTR_ALWAYS_INLINE static inline osal_queue_t osal_queue_create(osal_queue_def_t* qdef) {
@@ -173,8 +184,8 @@ TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_receive(osal_queue_t qhdl, v
   return 0 == tx_queue_receive(qhdl, data, _osal_ms2tick(msec));
 }
 
-TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void *data, bool in_isr) {
-  return 0 == tx_queue_send(qhdl, data, in_isr ? TX_NO_WAIT : TX_WAIT_FOREVER);
+TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_send(osal_queue_t qhdl, void const *data, bool in_isr) {
+  return 0 == tx_queue_send(qhdl, (VOID *)(uintptr_t) data, in_isr ? TX_NO_WAIT : TX_WAIT_FOREVER);
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool osal_queue_empty(osal_queue_t qhdl) {
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 1d596469b..696914251 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -14,6 +14,9 @@ deps_mandatory = {
     'lib/lwip': ['https://github.com/lwip-tcpip/lwip.git',
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
                  'all'],
+    'lib/threadx': ['https://github.com/eclipse-threadx/threadx.git',
+                    '4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae',
+                    'all'],
     'tools/linkermap': ['https://github.com/hathach/linkermap.git',
                         '8e1f440fa15c567aceb5aa0d14f6d18c329cc67f',
                         'all'],
-- 
cgit v1.3.1


From 0c7a385cf873b9cbf93344187c033c176c37f7e2 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 5 Mar 2026 19:07:00 +0700
Subject: improve threadx support, add multi ROTS support for board_test and
 msc_dual_lun

---
 examples/device/board_test/src/main.c   | 86 ++++++++++++++++++++-------------
 examples/device/msc_dual_lun/src/main.c |  2 +-
 hw/bsp/board.c                          |  5 --
 hw/bsp/espressif/boards/family.c        | 11 -----
 hw/bsp/rp2040/family.c                  | 12 -----
 5 files changed, 54 insertions(+), 62 deletions(-)

(limited to 'hw')

diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index ddc9bba6b..71e7e1da7 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -39,8 +39,35 @@ enum {
 
 #define HELLO_STR   "Hello from TinyUSB\r\n"
 
-static void board_test_loop(void) {
+// board test example does not use both device and host stack
+#if CFG_TUSB_OS != OPT_OS_NONE
+uint32_t tusb_time_millis_api(void) {
+  return osal_time_millis();
+}
+
+void tusb_time_delay_ms_api(uint32_t ms) {
+  osal_task_delay(ms);
+}
+#endif
+
+//--------------------------------------------------------------------+
+//
+//--------------------------------------------------------------------+
+
+// Task parameter type: ULONG for ThreadX, void* for FreeRTOS and noos
+#if CFG_TUSB_OS == OPT_OS_THREADX
+  #define RTOS_PARAM ULONG
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  #define RTOS_PARAM void*
+  static void freertos_init(void);
+#else
+  #define RTOS_PARAM void*
+#endif
+
+static void board_test_loop(RTOS_PARAM param) {
+  (void) param;
   uint32_t start_ms = 0;
+  (void) start_ms;
   bool led_state = false;
 
   while (1) {
@@ -55,28 +82,31 @@ static void board_test_loop(void) {
     }
 
     // Blink and print every interval ms
-    if (!(tusb_time_millis_api() - start_ms < interval_ms)) {
-      start_ms = tusb_time_millis_api();
-
-      if (ch < 0) {
-        // skip if echoing
-        printf(HELLO_STR);
+    #if CFG_TUSB_OS == OPT_OS_FREERTOS
+    vTaskDelay(interval_ms / portTICK_PERIOD_MS);
+    #elif CFG_TUSB_OS == OPT_OS_THREADX
+    tx_thread_sleep(_osal_ms2tick(interval_ms));
+    #else
+    if (tusb_time_millis_api() - start_ms < interval_ms) {
+      continue; // not enough time
+    }
+    #endif
+    start_ms = tusb_time_millis_api();
 
-        #ifndef LOGGER_UART
-        board_uart_write(HELLO_STR, sizeof(HELLO_STR)-1);
-        #endif
-      }
+    if (ch < 0) {
+      // skip if echoing
+      printf(HELLO_STR);
 
-      board_led_write(led_state);
-      led_state = !led_state; // toggle
+      #ifndef LOGGER_UART
+      board_uart_write(HELLO_STR, sizeof(HELLO_STR)-1);
+      #endif
     }
+
+    board_led_write(led_state);
+    led_state = !led_state; // toggle
   }
 }
 
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
-static void freertos_init(void);
-#endif
-
 int main(void) {
   board_init();
   board_led_write(true);
@@ -86,7 +116,7 @@ int main(void) {
 #elif CFG_TUSB_OS == OPT_OS_THREADX
   tx_kernel_enter();
 #else
-  board_test_loop();
+  board_test_loop(NULL);
 #endif
 
   return 0;
@@ -106,7 +136,7 @@ void app_main(void) {
 #ifdef ESP_PLATFORM
 #define MAIN_STACK_SIZE   4096
 #else
-#define MAIN_STACK_SIZE   configMINIMAL_STACK_SIZE
+#define MAIN_STACK_SIZE   512
 #endif
 
 #if configSUPPORT_STATIC_ALLOCATION
@@ -114,17 +144,13 @@ static StackType_t  _main_stack[MAIN_STACK_SIZE];
 static StaticTask_t _main_taskdef;
 #endif
 
-static void board_test_task(void* param) {
-  (void) param;
-  board_test_loop();
-}
-
 static void freertos_init(void) {
   #if configSUPPORT_STATIC_ALLOCATION
-  xTaskCreateStatic(board_test_task, "main", MAIN_STACK_SIZE, NULL, 1, _main_stack, &_main_taskdef);
+  xTaskCreateStatic(board_test_loop, "main", MAIN_STACK_SIZE, NULL, 1, _main_stack, &_main_taskdef);
   #else
-  xTaskCreate(board_test_task, "main", MAIN_STACK_SIZE, NULL, 1, NULL);
+  xTaskCreate(board_test_loop, "main", MAIN_STACK_SIZE, NULL, 1, NULL);
   #endif
+
   #ifndef ESP_PLATFORM
   vTaskStartScheduler();
   #endif
@@ -138,17 +164,11 @@ static void freertos_init(void) {
 #define MAIN_TASK_STACK_SIZE  1024
 static TX_THREAD _main_thread;
 static ULONG _main_thread_stack[MAIN_TASK_STACK_SIZE / sizeof(ULONG)];
-static void main_thread_entry(ULONG arg);
-
-static void main_thread_entry(ULONG arg) {
-  (void) arg;
-  board_test_loop();
-}
 
 void tx_application_define(void *first_unused_memory) {
   (void) first_unused_memory;
   static CHAR main_thread_name[] = "main";
-  tx_thread_create(&_main_thread, main_thread_name, main_thread_entry, 0,
+  tx_thread_create(&_main_thread, main_thread_name, board_test_loop, 0,
                    _main_thread_stack, MAIN_TASK_STACK_SIZE,
                    1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
 }
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index 9ca3a1f34..74a60aa6b 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -197,7 +197,7 @@ static void freertos_init(void) {
 #elif CFG_TUSB_OS == OPT_OS_THREADX
 
 #define USBD_STACK_SIZE   4096
-#define BLINKY_STACK_SIZE 1024
+#define BLINKY_STACK_SIZE 512
 
 static TX_THREAD _usb_device_thread;
 static ULONG     _usb_device_stack[USBD_STACK_SIZE / sizeof(ULONG)];
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 0553a7eb7..71c209950 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -300,9 +300,4 @@ void SysTick_Handler(void) {
   _tx_timer_interrupt();
 }
 
-// tusb_time_millis_api() based on ThreadX tick counter
-uint32_t tusb_time_millis_api(void) {
-  return (uint32_t)((uint64_t) tx_time_get() * 1000u / TX_TIMER_TICKS_PER_SECOND);
-}
-
 #endif
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 2fad7feec..04d8a4001 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -364,14 +364,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
   return true;
 }
 #endif
-
-// board test example does not use both device and host stack
-#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
-TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
-  return osal_time_millis();
-}
-
-TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
-  osal_task_delay(ms);
-}
-#endif
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index d68b13dd1..a51b3f758 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -377,15 +377,3 @@ bool tuh_max3421_spi_xfer_api(uint8_t rhport, uint8_t const* tx_buf, uint8_t* rx
 }
 
 #endif
-
-
-// board test example does not use both device and host stack
-#if !CFG_TUD_ENABLED && !CFG_TUH_ENABLED
-TU_ATTR_WEAK uint32_t tusb_time_millis_api(void) {
-  return osal_time_millis();
-}
-
-TU_ATTR_WEAK void tusb_time_delay_ms_api(uint32_t ms) {
-  osal_task_delay(ms);
-}
-#endif
-- 
cgit v1.3.1


From 7088dc528bd5a89a77e06798d8b5384962748828 Mon Sep 17 00:00:00 2001
From: Zixun LI <admin@hifiphile.com>
Date: Wed, 3 Dec 2025 16:26:56 +0100
Subject: ci_hs: add deinit support

Signed-off-by: Zixun LI <admin@hifiphile.com>
---
 examples/dual/dynamic_switch/only.txt   |  2 ++
 hw/bsp/lpc43/family.c                   |  2 ++
 src/portable/chipidea/ci_hs/dcd_ci_hs.c | 17 +++++++++++++++++
 src/portable/chipidea/ci_hs/hcd_ci_hs.c | 12 ++++++++----
 src/portable/ehci/ehci.c                | 11 ++++++++---
 src/portable/ehci/ehci_api.h            |  3 +++
 6 files changed, 40 insertions(+), 7 deletions(-)

(limited to 'hw')

diff --git a/examples/dual/dynamic_switch/only.txt b/examples/dual/dynamic_switch/only.txt
index 8508780e6..70be49b28 100644
--- a/examples/dual/dynamic_switch/only.txt
+++ b/examples/dual/dynamic_switch/only.txt
@@ -1,4 +1,6 @@
 family:espressif
+mcu:LPC43XX
+mcu:MIMXRT1XXX
 mcu:STM32C0
 mcu:STM32G0
 mcu:STM32H5
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index bade53b07..56834a1b0 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -185,8 +185,10 @@ void board_init(void)
    */
   Chip_USB1_Init();
 
+#ifdef _BOARD_EA4357_H
   // USB0 Vbus Power: P2_3 on EA4357 channel B U20 GPIO26 active low (base board)
   Chip_SCU_PinMuxSet(2, 3, SCU_MODE_PULLUP | SCU_MODE_INBUFF_EN | SCU_MODE_FUNC7);
+#endif
 
   #if defined(BOARD_TUD_RHPORT) &&  BOARD_TUD_RHPORT == 0
     // P9_5 (GPIO5[18]) (GPIO28 on oem base) as USB connect, active low.
diff --git a/src/portable/chipidea/ci_hs/dcd_ci_hs.c b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
index 2bba32ada..b9f6a8a7b 100644
--- a/src/portable/chipidea/ci_hs/dcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/dcd_ci_hs.c
@@ -285,6 +285,23 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   return true;
 }
 
+bool dcd_deinit(uint8_t rhport) {
+  ci_hs_regs_t* dcd_reg = CI_HS_REG(rhport);
+
+  // disable all interrupt
+  dcd_reg->USBINTR = 0;
+
+  // unattach from bus
+  dcd_reg->USBCMD &= ~USBCMD_RUN_STOP;
+
+  // flush all endpoints
+  while (dcd_reg->ENDPTPRIME) {}
+  dcd_reg->ENDPTFLUSH = 0xFFFFFFFF;
+  while (dcd_reg->ENDPTFLUSH) {}
+
+  return true;
+}
+
 void dcd_int_enable(uint8_t rhport) {
   CI_DCD_INT_ENABLE(rhport);
 }
diff --git a/src/portable/chipidea/ci_hs/hcd_ci_hs.c b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
index 29ce0cd7f..91adc06b1 100644
--- a/src/portable/chipidea/ci_hs/hcd_ci_hs.c
+++ b/src/portable/chipidea/ci_hs/hcd_ci_hs.c
@@ -93,14 +93,14 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   hcd_reg->USBCMD |= USBCMD_RESET;
   while (hcd_reg->USBCMD & USBCMD_RESET) {}
 
-  // Set mode to device, must be set immediately after reset
+  // Set mode to host, must be set immediately after reset
   #if CFG_TUSB_MCU == OPT_MCU_LPC18XX || CFG_TUSB_MCU == OPT_MCU_LPC43XX
   // LPC18XX/43XX need to set VBUS Power Select to HIGH
   // RHPORT1 is fullspeed only (need external PHY for Highspeed)
   hcd_reg->USBMODE = USBMODE_CM_HOST | USBMODE_VBUS_POWER_SELECT;
-  if (rhport == 1) {
-    hcd_reg->PORTSC1 |= PORTSC1_FORCE_FULL_SPEED;
-  }
+    #if !TUH_OPT_HIGH_SPEED
+  hcd_reg->PORTSC1 = PORTSC1_FORCE_FULL_SPEED;
+    #endif
   #else
   hcd_reg->USBMODE = USBMODE_CM_HOST;
   #endif
@@ -108,6 +108,10 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   return ehci_init(rhport, (uint32_t)&hcd_reg->CAPLENGTH, (uint32_t)&hcd_reg->USBCMD);
 }
 
+bool hcd_deinit(uint8_t rhport) {
+  return ehci_deinit(rhport);
+}
+
 void hcd_int_enable(uint8_t rhport) {
   CI_HCD_INT_ENABLE(rhport);
 }
diff --git a/src/portable/ehci/ehci.c b/src/portable/ehci/ehci.c
index 9b2cf98be..03c3b91fd 100644
--- a/src/portable/ehci/ehci.c
+++ b/src/portable/ehci/ehci.c
@@ -411,17 +411,22 @@ bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg)
   return true;
 }
 
-#if 0
-static void ehci_stop(uint8_t rhport) {
+bool ehci_deinit(uint8_t rhport) {
   (void) rhport;
 
   ehci_registers_t* regs = ehci_data.regs;
+
+  // Disable all the interrupt
+  regs->inten  = 0;
+
+  // Disable schedules
   regs->command_bm.run_stop = 0;
 
   // USB Spec: controller has to stop within 16 uframe = 2 frames
   while( regs->status_bm.hc_halted == 0 ) {}
+
+  return true;
 }
-#endif
 
 //--------------------------------------------------------------------+
 // Endpoint API
diff --git a/src/portable/ehci/ehci_api.h b/src/portable/ehci/ehci_api.h
index 79fbe702a..e9018639f 100644
--- a/src/portable/ehci/ehci_api.h
+++ b/src/portable/ehci/ehci_api.h
@@ -38,6 +38,9 @@
 // Initialize EHCI driver
 bool ehci_init(uint8_t rhport, uint32_t capability_reg, uint32_t operatial_reg);
 
+// De-initialize EHCI driver
+bool ehci_deinit(uint8_t rhport);
+
 #ifdef __cplusplus
  }
 #endif
-- 
cgit v1.3.1


From 61e4b9ce3fba2fea731396c56eee1c7b5a2f5338 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 5 Mar 2026 23:24:14 +0700
Subject: add IAR warning flags to cmake build and fix them

---
 examples/device/cdc_msc/src/msc_disk.c             |  2 +-
 examples/device/cdc_msc_freertos/src/msc_disk.c    | 15 +++++--------
 examples/device/cdc_uac2/src/main.c                |  2 --
 .../device/dynamic_configuration/src/msc_disk.c    | 15 +++++--------
 examples/device/hid_boot_interface/src/main.c      |  2 --
 examples/device/msc_dual_lun/src/main.c            |  2 --
 examples/device/net_lwip_webserver/src/main.c      |  2 --
 examples/device/uac2_speaker_fb/src/main.c         |  6 +++--
 examples/dual/host_hid_to_device_cdc/src/main.c    |  2 --
 examples/host/bare_api/src/main.c                  |  2 --
 examples/host/device_info/src/main.c               |  1 -
 examples/host/midi_rx/src/main.c                   |  2 --
 examples/host/msc_file_explorer/src/main.c         |  2 --
 examples/host/msc_file_explorer/src/msc_app.c      |  2 --
 hw/bsp/family_support.cmake                        |  7 ++++++
 src/class/dfu/dfu_device.c                         |  6 ++---
 src/common/tusb_fifo.c                             | 19 ++++++++--------
 src/common/tusb_fifo.h                             | 26 +++++++++-------------
 src/osal/osal_freertos.h                           | 18 ++++++++-------
 19 files changed, 58 insertions(+), 75 deletions(-)

(limited to 'hw')

diff --git a/examples/device/cdc_msc/src/msc_disk.c b/examples/device/cdc_msc/src/msc_disk.c
index e091c2985..017acd039 100644
--- a/examples/device/cdc_msc/src/msc_disk.c
+++ b/examples/device/cdc_msc/src/msc_disk.c
@@ -238,7 +238,7 @@ int32_t tud_msc_scsi_cb(uint8_t lun, uint8_t const scsi_cmd[16], void *buffer, u
   (void) buffer;
   (void) bufsize;
 
-  // currently no other commands is supported
+  // currently no other commands are supported
 
   // Set Sense = Invalid Command Operation
   (void) tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index 29ff86281..ff918205e 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -324,20 +324,17 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
 // - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, MODE_SENSE6, REQUEST_SENSE
 // - READ10 and WRITE10 has their own callbacks
 int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize) {
-  // read10 & write10 has their own callback and MUST not be handled here
+  (void) lun;
+  (void) scsi_cmd;
   (void) buffer;
   (void) bufsize;
 
-  switch (scsi_cmd[0]) {
-    default:
-      // Set Sense = Invalid Command Operation
-      tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+  // currently no other commands are supported
 
-      // negative means error -> tinyusb could stall and/or response with failed status
-      return -1;
-  }
+  // Set Sense = Invalid Command Operation
+  (void) tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
 
-  return -1;
+  return -1; // stall/failed command request;
 }
 
 #endif
diff --git a/examples/device/cdc_uac2/src/main.c b/examples/device/cdc_uac2/src/main.c
index 22c462be7..cb7b3a142 100644
--- a/examples/device/cdc_uac2/src/main.c
+++ b/examples/device/cdc_uac2/src/main.c
@@ -65,8 +65,6 @@ int main(void)
     // printf("Hello, world!\r\n");
 #endif
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/dynamic_configuration/src/msc_disk.c b/examples/device/dynamic_configuration/src/msc_disk.c
index e95b2e197..b545e4652 100644
--- a/examples/device/dynamic_configuration/src/msc_disk.c
+++ b/examples/device/dynamic_configuration/src/msc_disk.c
@@ -215,20 +215,17 @@ int32_t tud_msc_write10_cb(uint8_t lun, uint32_t lba, uint32_t offset, uint8_t*
 // - READ_CAPACITY10, READ_FORMAT_CAPACITY, INQUIRY, MODE_SENSE6, REQUEST_SENSE
 // - READ10 and WRITE10 has their own callbacks
 int32_t tud_msc_scsi_cb (uint8_t lun, uint8_t const scsi_cmd[16], void* buffer, uint16_t bufsize) {
-  // read10 & write10 has their own callback and MUST not be handled here
+  (void) lun;
+  (void) scsi_cmd;
   (void) buffer;
   (void) bufsize;
 
-  switch (scsi_cmd[0]) {
-    default:
-      // Set Sense = Invalid Command Operation
-      tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
+  // currently no other commands are supported
 
-      // negative means error -> tinyusb could stall and/or response with failed status
-      return -1;
-  }
+  // Set Sense = Invalid Command Operation
+  (void) tud_msc_set_sense(lun, SCSI_SENSE_ILLEGAL_REQUEST, 0x20, 0x00);
 
-  return -1;
+  return -1; // stall/failed command request;
 }
 
 #endif
diff --git a/examples/device/hid_boot_interface/src/main.c b/examples/device/hid_boot_interface/src/main.c
index 4de319f52..7f2153ae9 100644
--- a/examples/device/hid_boot_interface/src/main.c
+++ b/examples/device/hid_boot_interface/src/main.c
@@ -67,8 +67,6 @@ int main(void) {
 
     hid_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/device/msc_dual_lun/src/main.c b/examples/device/msc_dual_lun/src/main.c
index 74a60aa6b..a4ade6f9b 100644
--- a/examples/device/msc_dual_lun/src/main.c
+++ b/examples/device/msc_dual_lun/src/main.c
@@ -103,8 +103,6 @@ int main(void) {
     led_blinking_task(NULL);
   }
 #endif
-
-  return 0;
 }
 
 #ifdef ESP_PLATFORM
diff --git a/examples/device/net_lwip_webserver/src/main.c b/examples/device/net_lwip_webserver/src/main.c
index 9f26da2ba..8bd8a8c21 100644
--- a/examples/device/net_lwip_webserver/src/main.c
+++ b/examples/device/net_lwip_webserver/src/main.c
@@ -276,8 +276,6 @@ int main(void) {
     sys_check_timeouts(); // service lwip
     handle_link_state_switch();
   }
-
-  return 0;
 }
 
 /* lwip has provision for using a mutex, when applicable */
diff --git a/examples/device/uac2_speaker_fb/src/main.c b/examples/device/uac2_speaker_fb/src/main.c
index 8323d82e8..c3e97bb28 100644
--- a/examples/device/uac2_speaker_fb/src/main.c
+++ b/examples/device/uac2_speaker_fb/src/main.c
@@ -534,8 +534,9 @@ bool tud_audio_set_itf_close_ep_cb(uint8_t rhport, tusb_control_request_t const
   uint8_t const itf = tu_u16_low(tu_le16toh(p_request->wIndex));
   uint8_t const alt = tu_u16_low(tu_le16toh(p_request->wValue));
 
-  if (ITF_NUM_AUDIO_STREAMING == itf && alt == 0)
+  if (ITF_NUM_AUDIO_STREAMING == itf && alt == 0) {
     blink_interval_ms = BLINK_MOUNTED;
+  }
 
   return true;
 }
@@ -569,7 +570,8 @@ bool tud_audio_rx_done_isr(uint8_t rhport, uint16_t n_bytes_received, uint8_t fu
 
   fifo_count = tud_audio_available();
   // Same averaging method used in UAC2 class
-  fifo_count_avg = (uint32_t) (((uint64_t) fifo_count_avg * 63 + ((uint32_t) fifo_count << 16)) >> 6);
+  const uint32_t ff_count32 = (uint32_t) fifo_count << 16;
+  fifo_count_avg = (uint32_t) (((uint64_t) fifo_count_avg * 63 + ff_count32) >> 6);
 
   return true;
 }
diff --git a/examples/dual/host_hid_to_device_cdc/src/main.c b/examples/dual/host_hid_to_device_cdc/src/main.c
index ba8ba019a..c8fca48f8 100644
--- a/examples/dual/host_hid_to_device_cdc/src/main.c
+++ b/examples/dual/host_hid_to_device_cdc/src/main.c
@@ -98,8 +98,6 @@ int main(void) {
     tuh_task(); // tinyusb host task
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index ced2eaa32..81d4d8731 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -74,8 +74,6 @@ int main(void) {
     tuh_task();
     led_blinking_task();
   }
-
-  return 0;
 }
 
 /*------------- TinyUSB Callbacks -------------*/
diff --git a/examples/host/device_info/src/main.c b/examples/host/device_info/src/main.c
index fd4e9c3ed..b0e38dd6b 100644
--- a/examples/host/device_info/src/main.c
+++ b/examples/host/device_info/src/main.c
@@ -105,7 +105,6 @@ int main(void) {
     tuh_task();     // tinyusb host task
     led_blinking_task(NULL);
   }
-  return 0;
 #endif
 }
 
diff --git a/examples/host/midi_rx/src/main.c b/examples/host/midi_rx/src/main.c
index f189e0864..fb36906c6 100644
--- a/examples/host/midi_rx/src/main.c
+++ b/examples/host/midi_rx/src/main.c
@@ -58,8 +58,6 @@ int main(void) {
     led_blinking_task();
     midi_host_rx_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index 0a8967380..f6bf9a60a 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -92,8 +92,6 @@ int main(void) {
     msc_app_task();
     led_blinking_task();
   }
-
-  return 0;
 }
 
 //--------------------------------------------------------------------+
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 40a9ef57e..7e019818a 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -282,8 +282,6 @@ DRESULT disk_ioctl (
     default:
       return RES_PARERR;
   }
-
-	return RES_OK;
 }
 
 //--------------------------------------------------------------------+
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 4299ad44e..c166a0618 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -105,6 +105,12 @@ set(WARN_FLAGS_GNU
   )
 set(WARN_FLAGS_Clang ${WARN_FLAGS_GNU})
 
+set(WARN_FLAGS_IAR
+  --warnings_are_errors
+  --diag_suppress=Pa089
+  --diag_suppress=Pe236
+  )
+
 # Optimization
 if (NOT DEFINED CMAKE_BUILD_TYPE OR CMAKE_BUILD_TYPE STREQUAL "")
   set(CMAKE_BUILD_TYPE MinSizeRel CACHE STRING "Build type" FORCE)
@@ -467,6 +473,7 @@ function(family_configure_common TARGET RTOS)
       target_link_options(${TARGET} PUBLIC "LINKER:--no-warn-rwx-segments")
     endif ()
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_compile_options(${TARGET} PRIVATE $<$<OR:$<COMPILE_LANGUAGE:C>,$<COMPILE_LANGUAGE:CXX>>:${WARN_FLAGS_IAR}>)
     target_link_options(${TARGET} PUBLIC "LINKER:--map=$<TARGET_FILE:${TARGET}>.map")
 
     if (IAR_CSTAT)
diff --git a/src/class/dfu/dfu_device.c b/src/class/dfu/dfu_device.c
index d3cc53918..a09c53b7e 100644
--- a/src/class/dfu/dfu_device.c
+++ b/src/class/dfu/dfu_device.c
@@ -327,7 +327,7 @@ bool dfu_moded_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control
 
           default:
             if (stage == CONTROL_STAGE_SETUP) {
-              return reply_getstatus(rhport, request, _dfu_ctx.state, _dfu_ctx.status, 0);
+              return reply_getstatus(rhport, request, (dfu_state_t) _dfu_ctx.state, (dfu_status_t) _dfu_ctx.status, 0);
             }
             break;
         }
@@ -376,7 +376,7 @@ static bool process_download_get_status(uint8_t rhport, uint8_t stage, const tus
       timeout = 0;
     }
 
-    return reply_getstatus(rhport, request, next_state, _dfu_ctx.status, timeout);
+    return reply_getstatus(rhport, request, next_state, (dfu_status_t) _dfu_ctx.status, timeout);
   } else if (stage == CONTROL_STAGE_ACK) {
     if (_dfu_ctx.flashing_in_progress) {
       _dfu_ctx.state = DFU_DNBUSY;
@@ -405,7 +405,7 @@ static bool process_manifest_get_status(uint8_t rhport, uint8_t stage, const tus
       timeout = 0;
     }
 
-    return reply_getstatus(rhport, request, next_state, _dfu_ctx.status, timeout);
+    return reply_getstatus(rhport, request, next_state, (dfu_status_t) _dfu_ctx.status, timeout);
   } else if (stage == CONTROL_STAGE_ACK) {
     if (_dfu_ctx.flashing_in_progress) {
       _dfu_ctx.state = DFU_MANIFEST;
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 9f188f296..8bd79e56d 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -30,11 +30,6 @@
 
 #define TU_FIFO_DBG 0
 
-// Suppress IAR warning
-// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
-#if defined(__ICCARM__)
-  #pragma diag_suppress = Pa082
-#endif
 
 #if OSAL_MUTEX_REQUIRED
 
@@ -496,7 +491,9 @@ uint16_t tu_fifo_peek_n_access_mode(tu_fifo_t *f, void *p_buffer, uint16_t n, ui
 // Read n items without removing it from the FIFO, correct read pointer if overflowed
 uint16_t tu_fifo_peek_n(tu_fifo_t *f, void *p_buffer, uint16_t n) {
   ff_lock(f->mutex_rd);
-  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, f->wr_idx, f->rd_idx, NULL);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  const uint16_t ret = tu_fifo_peek_n_access_mode(f, p_buffer, n, wr_idx, rd_idx, NULL);
   ff_unlock(f->mutex_rd);
   return ret;
 }
@@ -506,7 +503,8 @@ uint16_t tu_fifo_read_n_access_mode(tu_fifo_t *f, void *buffer, uint16_t n, cons
   ff_lock(f->mutex_rd);
 
   // Peek the data: f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  n         = tu_fifo_peek_n_access_mode(f, buffer, n, f->wr_idx, f->rd_idx, access_mode);
+  const uint16_t wr_idx = f->wr_idx;
+  n         = tu_fifo_peek_n_access_mode(f, buffer, n, wr_idx, f->rd_idx, access_mode);
   f->rd_idx = advance_index(f->depth, f->rd_idx, n);
 
   ff_unlock(f->mutex_rd);
@@ -633,7 +631,8 @@ static bool ff_peek_local(tu_fifo_t *f, void *buf, uint16_t wr_idx, uint16_t rd_
 bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
   // Peek the data
   // f->rd_idx might get modified in case of an overflow so we can not use a local variable
-  const bool ret = ff_peek_local(f, buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const bool ret = ff_peek_local(f, buffer, wr_idx, f->rd_idx);
   if (ret) {
     ff_lock(f->mutex_rd);
     f->rd_idx = advance_index(f->depth, f->rd_idx, 1);
@@ -645,7 +644,9 @@ bool tu_fifo_read(tu_fifo_t *f, void *buffer) {
 
 // Read one item without removing it from the FIFO, correct read index if overflowed
 bool tu_fifo_peek(tu_fifo_t *f, void *p_buffer) {
-  return ff_peek_local(f, p_buffer, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return ff_peek_local(f, p_buffer, wr_idx, rd_idx);
 }
 
 // Write one element into the buffer
diff --git a/src/common/tusb_fifo.h b/src/common/tusb_fifo.h
index a3829e38e..b31a0802e 100644
--- a/src/common/tusb_fifo.h
+++ b/src/common/tusb_fifo.h
@@ -120,9 +120,9 @@ typedef struct {
   uint8_t *buffer;              // buffer pointer
   uint16_t depth;               // max items
   bool     overwritable;        // overwritable when full
-  // 1 byte padding  here
+  // 1 byte padding here
 
-  volatile uint16_t wr_idx;     // write index TODO maybe can drop volatile
+  volatile uint16_t wr_idx;     // write index
   volatile uint16_t rd_idx;     // read index
 
 #if OSAL_MUTEX_REQUIRED
@@ -289,30 +289,26 @@ TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_empty(const tu_fifo_t *f) {
   return wr_idx == rd_idx;
 }
 
-// Suppress IAR warning
-// Warning[Pa082]: undefined behavior: the order of volatile accesses is undefined in this statement
-#if defined(__ICCARM__)
-#pragma diag_suppress = Pa082
-#endif
-
 // return number of items in fifo, capped to fifo's depth
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_count(const tu_fifo_t *f) {
-  return tu_min16(tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx), f->depth);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_min16(tu_ff_overflow_count(f->depth, wr_idx, rd_idx), f->depth);
 }
 
 // check if fifo is full
 TU_ATTR_ALWAYS_INLINE static inline bool tu_fifo_full(const tu_fifo_t *f) {
-  return tu_ff_overflow_count(f->depth, f->wr_idx, f->rd_idx) >= f->depth;
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_overflow_count(f->depth, wr_idx, rd_idx) >= f->depth;
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t tu_fifo_remaining(const tu_fifo_t *f) {
-  return tu_ff_remaining_local(f->depth, f->wr_idx, f->rd_idx);
+  const uint16_t wr_idx = f->wr_idx;
+  const uint16_t rd_idx = f->rd_idx;
+  return tu_ff_remaining_local(f->depth, wr_idx, rd_idx);
 }
 
-#if defined(__ICCARM__)
- #pragma diag_default=Pa082
-#endif
-
 #ifdef __cplusplus
 }
 #endif
diff --git a/src/osal/osal_freertos.h b/src/osal/osal_freertos.h
index 32ee2d55c..db724179d 100644
--- a/src/osal/osal_freertos.h
+++ b/src/osal/osal_freertos.h
@@ -141,11 +141,12 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_init(osal_spinlock_t *ctx) {
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bool in_isr) {
   if (in_isr) {
-    if (TUP_MCU_MULTIPLE_CORE == 0) {
-      (void) ctx;
-      return; // single core MCU does not need to lock in ISR
-    }
+  #if TUP_MCU_MULTIPLE_CORE
     *ctx = taskENTER_CRITICAL_FROM_ISR();
+  #else
+    (void) ctx;
+    return; // single core MCU does not need to lock in ISR
+  #endif
   } else {
     taskENTER_CRITICAL();
   }
@@ -153,11 +154,12 @@ TU_ATTR_ALWAYS_INLINE static inline void osal_spin_lock(osal_spinlock_t *ctx, bo
 
 TU_ATTR_ALWAYS_INLINE static inline void osal_spin_unlock(osal_spinlock_t *ctx, bool in_isr) {
   if (in_isr) {
-    if (TUP_MCU_MULTIPLE_CORE == 0) {
-      (void) ctx;
-      return; // single core MCU does not need to lock in ISR
-    }
+  #if TUP_MCU_MULTIPLE_CORE
     taskEXIT_CRITICAL_FROM_ISR(*ctx);
+  #else
+    (void) ctx;
+    return; // single core MCU does not need to lock in ISR
+  #endif
   } else {
     taskEXIT_CRITICAL();
   }
-- 
cgit v1.3.1


From 94baf394686f92d9edaf109dcae30fa7b531fefc Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 6 Mar 2026 10:59:32 +0700
Subject: fix warnings

---
 hw/bsp/stm32f1/family.c                      | 4 ++--
 hw/bsp/stm32l0/family.c                      | 3 ++-
 hw/bsp/stm32wba/family.c                     | 5 ++++-
 lib/networking/rndis_reports.c               | 2 +-
 src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h | 8 ++++----
 5 files changed, 13 insertions(+), 9 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index fae61ca9e..78a425453 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -148,12 +148,12 @@ void board_init(void) {
 #ifdef USB_CONNECT_PIN
 void dcd_disconnect(uint8_t rhport) {
   (void)rhport;
-  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, 1-USB_CONNECT_STATE);
+  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, (GPIO_PinState)(1 - USB_CONNECT_STATE));
 }
 
 void dcd_connect(uint8_t rhport) {
   (void)rhport;
-  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, USB_CONNECT_STATE);
+  HAL_GPIO_WritePin(USB_CONNECT_PORT, USB_CONNECT_PIN, (GPIO_PinState)USB_CONNECT_STATE);
 }
 #endif
 
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 192f014f4..7fd076dbd 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -123,7 +123,8 @@ void board_init(void) {
 //--------------------------------------------------------------------+
 
 void board_led_write(bool state) {
-  HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
 }
 
 uint32_t board_button_read(void) {
diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c
index e058a80a1..878355b48 100644
--- a/hw/bsp/stm32wba/family.c
+++ b/hw/bsp/stm32wba/family.c
@@ -175,7 +175,10 @@ void board_init(void) {
   #endif // USB_OTG_HS
 }
 
-void board_led_write(bool state) { HAL_GPIO_WritePin(LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON)); }
+void board_led_write(bool state) {
+  GPIO_PinState pin_state = (GPIO_PinState)(state ? LED_STATE_ON : (1 - LED_STATE_ON));
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
+}
 
 uint32_t board_button_read(void) { return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN) == BUTTON_STATE_ACTIVE; }
 
diff --git a/lib/networking/rndis_reports.c b/lib/networking/rndis_reports.c
index e2849fb10..5e824d5a5 100644
--- a/lib/networking/rndis_reports.c
+++ b/lib/networking/rndis_reports.c
@@ -44,7 +44,7 @@ static const uint8_t *const permanent_hwaddr = tud_network_mac_address;
 
 static usb_eth_stat_t usb_eth_stat = { 0, 0, 0, 0 };
 static uint32_t oid_packet_filter = 0x0000000;
-static rndis_state_t rndis_state;
+TU_ATTR_UNUSED static rndis_state_t rndis_state;
 
 static const uint32_t OIDSupportedList[] =
 {
diff --git a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
index 178eec419..c22aea887 100644
--- a/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
+++ b/src/portable/chipidea/ci_hs/ci_hs_lpc18_43.h
@@ -47,10 +47,10 @@ static const ci_hs_controller_t _ci_controller[] =
 
 #define CI_HS_REG(_port)        ((ci_hs_regs_t*) _ci_controller[_port].reg_base)
 
-#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
-#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+#define CI_DCD_INT_ENABLE(_p)   NVIC_EnableIRQ ((IRQn_Type)_ci_controller[_p].irqnum)
+#define CI_DCD_INT_DISABLE(_p)  NVIC_DisableIRQ((IRQn_Type)_ci_controller[_p].irqnum)
 
-#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ (_ci_controller[_p].irqnum)
-#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ(_ci_controller[_p].irqnum)
+#define CI_HCD_INT_ENABLE(_p)   NVIC_EnableIRQ ((IRQn_Type)_ci_controller[_p].irqnum)
+#define CI_HCD_INT_DISABLE(_p)  NVIC_DisableIRQ((IRQn_Type)_ci_controller[_p].irqnum)
 
 #endif
-- 
cgit v1.3.1


From 3a0227b7718529cf0397d66d2a7a5567e18498c3 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 6 Mar 2026 12:52:13 +0100
Subject: fix Jlink device name

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/same7x/boards/same70_qmtech/board.cmake   | 2 +-
 hw/bsp/same7x/boards/same70_qmtech/board.mk      | 2 +-
 hw/bsp/same7x/boards/same70_xplained/board.cmake | 2 +-
 hw/bsp/same7x/boards/same70_xplained/board.mk    | 2 +-
 4 files changed, 4 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.cmake b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
index 3597c280f..971a27e29 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.cmake
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
@@ -1,4 +1,4 @@
-set(JLINK_DEVICE SAME70N19B)
+set(JLINK_DEVICE ATSAME70N19B)
 set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70n19b_flash.ld)
 set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70n19b/flash.icf)
 
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.mk b/hw/bsp/same7x/boards/same70_qmtech/board.mk
index 09ae98860..461bef8a2 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.mk
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.mk
@@ -1,3 +1,3 @@
 CFLAGS += -D__SAME70N19B__
 
-JLINK_DEVICE = SAME70N19B
+JLINK_DEVICE = ATSAME70N19B
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.cmake b/hw/bsp/same7x/boards/same70_xplained/board.cmake
index 4ac661daa..f762464a6 100644
--- a/hw/bsp/same7x/boards/same70_xplained/board.cmake
+++ b/hw/bsp/same7x/boards/same70_xplained/board.cmake
@@ -1,4 +1,4 @@
-set(JLINK_DEVICE SAME70Q21B)
+set(JLINK_DEVICE ATSAME70Q21B)
 set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70q21b_flash.ld)
 set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70q21b/flash.icf)
 
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.mk b/hw/bsp/same7x/boards/same70_xplained/board.mk
index ca23a9be5..d3e7cfc29 100644
--- a/hw/bsp/same7x/boards/same70_xplained/board.mk
+++ b/hw/bsp/same7x/boards/same70_xplained/board.mk
@@ -1,3 +1,3 @@
 CFLAGS += -D__SAME70Q21B__
 
-JLINK_DEVICE = SAME70Q21B
+JLINK_DEVICE = ATSAME70Q21B
-- 
cgit v1.3.1


From e658e2343589d2f37afbf62c0a6766038739b84d Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 6 Mar 2026 15:47:19 +0100
Subject: fix CI

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/host/bare_api/skip.txt                 |  1 +
 examples/host/bare_api/src/main.c               | 16 ++++++++--------
 examples/host/cdc_msc_hid/skip.txt              |  1 +
 examples/host/cdc_msc_hid_freertos/skip.txt     |  1 +
 examples/host/device_info/skip.txt              |  1 +
 examples/host/hid_controller/skip.txt           |  1 +
 examples/host/midi_rx/skip.txt                  |  1 +
 examples/host/msc_file_explorer/skip.txt        |  1 +
 hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake |  6 ++----
 hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake |  7 +++++--
 hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake |  7 +++++--
 hw/bsp/lpc54/iar/LPC54608_flash.icf             |  1 -
 hw/bsp/lpc54/iar/LPC54628_flash.icf             |  1 -
 hw/bsp/lpc55/family.mk                          |  4 ++--
 src/common/tusb_mcu.h                           | 13 +++++++++----
 tools/codespell/ignore-words.txt                |  1 +
 tools/get_deps.py                               |  2 +-
 17 files changed, 40 insertions(+), 25 deletions(-)
 create mode 100644 examples/host/bare_api/skip.txt
 create mode 100644 examples/host/cdc_msc_hid/skip.txt
 create mode 100644 examples/host/device_info/skip.txt
 create mode 100644 examples/host/hid_controller/skip.txt
 create mode 100644 examples/host/midi_rx/skip.txt
 create mode 100644 examples/host/msc_file_explorer/skip.txt

(limited to 'hw')

diff --git a/examples/host/bare_api/skip.txt b/examples/host/bare_api/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/bare_api/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/examples/host/bare_api/src/main.c b/examples/host/bare_api/src/main.c
index 87f612588..544f38102 100644
--- a/examples/host/bare_api/src/main.c
+++ b/examples/host/bare_api/src/main.c
@@ -384,12 +384,12 @@ static int _count_utf8_bytes(const uint16_t *buf, size_t len) {
   return (int) total_bytes;
 }
 
-static void print_utf16(uint16_t *temp_buf, size_t buf_len) {
-  if ((temp_buf[0] & 0xff) == 0) return;// empty
-  size_t utf16_len = ((temp_buf[0] & 0xff) - 2) / sizeof(uint16_t);
-  size_t utf8_len = (size_t) _count_utf8_bytes(temp_buf + 1, utf16_len);
-  _convert_utf16le_to_utf8(temp_buf + 1, utf16_len, (uint8_t *) temp_buf, sizeof(uint16_t) * buf_len);
-  ((uint8_t *) temp_buf)[utf8_len] = '\0';
-
-  printf("%s", (char *) temp_buf);
+static void print_utf16(uint16_t *buf, size_t buf_len) {
+  if ((buf[0] & 0xff) == 0) return;// empty
+  size_t utf16_len = ((buf[0] & 0xff) - 2) / sizeof(uint16_t);
+  size_t utf8_len = (size_t) _count_utf8_bytes(buf + 1, utf16_len);
+  _convert_utf16le_to_utf8(buf + 1, utf16_len, (uint8_t *) buf, sizeof(uint16_t) * buf_len);
+  ((uint8_t *) buf)[utf8_len] = '\0';
+
+  printf("%s", (char *) buf);
 }
diff --git a/examples/host/cdc_msc_hid/skip.txt b/examples/host/cdc_msc_hid/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/cdc_msc_hid/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/examples/host/cdc_msc_hid_freertos/skip.txt b/examples/host/cdc_msc_hid_freertos/skip.txt
index 2ba4438fd..54e7be1ba 100644
--- a/examples/host/cdc_msc_hid_freertos/skip.txt
+++ b/examples/host/cdc_msc_hid_freertos/skip.txt
@@ -1 +1,2 @@
 mcu:RP2040
+board:lpcxpresso54114
diff --git a/examples/host/device_info/skip.txt b/examples/host/device_info/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/device_info/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/examples/host/hid_controller/skip.txt b/examples/host/hid_controller/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/hid_controller/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/examples/host/midi_rx/skip.txt b/examples/host/midi_rx/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/midi_rx/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/examples/host/msc_file_explorer/skip.txt b/examples/host/msc_file_explorer/skip.txt
new file mode 100644
index 000000000..308796869
--- /dev/null
+++ b/examples/host/msc_file_explorer/skip.txt
@@ -0,0 +1 @@
+board:lpcxpresso54114
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
index c0bbeecd5..b306f885a 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
+++ b/hw/bsp/lpc54/boards/lpcxpresso54114/board.cmake
@@ -6,10 +6,8 @@ set(PYOCD_TARGET LPC54114)
 
 set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54114J256_cm4_flash.ld)
 
-# Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
-endif()
+# Only Port 0 Full-Speed
+set(RHPORT_DEVICE 0)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
index f0715fa12..aea608e60 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
+++ b/hw/bsp/lpc54/boards/lpcxpresso54608/board.cmake
@@ -8,8 +8,11 @@ set(NXPLINK_DEVICE LPC54608:LPCXpresso54608)
 set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54608J512_flash.ld)
 
 # Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
 endif()
 
 function(update_board TARGET)
diff --git a/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake b/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
index 1dea6f353..b0d0d404f 100644
--- a/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
+++ b/hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake
@@ -8,8 +8,11 @@ set(NXPLINK_DEVICE LPC54628:LPCXpresso54628)
 set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54628J512_flash.ld)
 
 # Device port default to PORT1 Highspeed
-if (NOT DEFINED PORT)
-  set(PORT 1)
+if (NOT DEFINED RHPORT_DEVICE)
+  set(RHPORT_DEVICE 1)
+endif()
+if (NOT DEFINED RHPORT_HOST)
+  set(RHPORT_HOST 0)
 endif()
 
 function(update_board TARGET)
diff --git a/hw/bsp/lpc54/iar/LPC54608_flash.icf b/hw/bsp/lpc54/iar/LPC54608_flash.icf
index 2a7885541..408ab90ed 100644
--- a/hw/bsp/lpc54/iar/LPC54608_flash.icf
+++ b/hw/bsp/lpc54/iar/LPC54608_flash.icf
@@ -82,4 +82,3 @@ place in DATA_region                        { block RW };
 place in DATA_region                        { block ZI };
 place in DATA_region                        { last block HEAP };
 place in CSTACK_region                      { block CSTACK };
-
diff --git a/hw/bsp/lpc54/iar/LPC54628_flash.icf b/hw/bsp/lpc54/iar/LPC54628_flash.icf
index 7cca18159..cc6615bd6 100644
--- a/hw/bsp/lpc54/iar/LPC54628_flash.icf
+++ b/hw/bsp/lpc54/iar/LPC54628_flash.icf
@@ -80,4 +80,3 @@ place in DATA_region                        { block RW };
 place in DATA_region                        { block ZI };
 place in DATA_region                        { last block HEAP };
 place in CSTACK_region                      { block CSTACK };
-
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index 7b1ab6b09..a7d06d70a 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -2,8 +2,8 @@ UF2_FAMILY_ID = 0x2abc77ec
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m33
-MCUX_DIR = /hw/mcu/nxp/mcuxsdk-core
-SDK_DIR = /hw/mcu/nxp/mcux-devices-lpc
+MCUX_DIR = hw/mcu/nxp/mcuxsdk-core
+SDK_DIR = hw/mcu/nxp/mcux-devices-lpc
 
 # Default to Highspeed PORT1
 PORT ?= 1
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 0e5233bbe..c4615a87b 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -71,12 +71,17 @@
   #define TUP_DCD_ENDPOINT_MAX 5
 
 #elif TU_CHECK_MCU(OPT_MCU_LPC54)
+  #include "fsl_device_registers.h"
+
   // TODO USB0 has 5, USB1 has 6
   #define TUP_USBIP_IP3511
-  #define TUP_USBIP_IP3516
-  #define TUP_USBIP_OHCI
-  #define TUP_USBIP_OHCI_NXP
-  #define TUP_OHCI_RHPORTS     1 // 1 downstream port
+
+  #if !defined(LPC54114_cm4_SERIES) && !defined(LPC54114_cm0plus_SERIES)
+    #define TUP_USBIP_IP3516
+    #define TUP_USBIP_OHCI
+    #define TUP_USBIP_OHCI_NXP
+    #define TUP_OHCI_RHPORTS     1 // 1 downstream port
+  #endif
 
   #define TUP_DCD_ENDPOINT_MAX 6
 
diff --git a/tools/codespell/ignore-words.txt b/tools/codespell/ignore-words.txt
index 5b6e2e98b..7ce778fab 100644
--- a/tools/codespell/ignore-words.txt
+++ b/tools/codespell/ignore-words.txt
@@ -7,6 +7,7 @@ hsi
 inout
 mot
 pris
+ptd
 ser
 sie
 synopsys
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 2f37901c8..bf91428f4 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -66,7 +66,7 @@ deps_optional = {
                             'lpc51 lpc55 mcx'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl rw61x imxrt'],
+                            'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x imxrt'],
     'hw/mcu/nxp/mcux-devices-lpc': ['https://github.com/nxp-mcuxpresso/mcux-devices-lpc',
                             '8096b783ec09d0d1c8629025a5f9d8e7df26e520',
                             'lpc51 lpc55'],
-- 
cgit v1.3.1


From 6c4f119dddebc9af407f43f40fc1a7776efc7ed1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 7 Mar 2026 13:01:32 +0700
Subject: - update SAME70 BSP: remove unused definitions, consolidate startup
 files - and add unique ID - add freertos

---
 .../device/audio_4_channel_mic_freertos/skip.txt   |  1 -
 examples/device/audio_test_freertos/skip.txt       |  1 -
 examples/device/cdc_msc_freertos/skip.txt          |  1 -
 examples/device/hid_composite_freertos/skip.txt    |  1 -
 examples/device/midi_test_freertos/skip.txt        |  1 -
 hw/bsp/same7x/boards/same70_qmtech/board.cmake     |  7 +-
 hw/bsp/same7x/boards/same70_qmtech/board.mk        |  3 +
 hw/bsp/same7x/boards/same70_xplained/board.mk      |  3 +
 hw/bsp/same7x/family.c                             | 85 ++++++++++------------
 hw/bsp/same7x/family.mk                            |  7 +-
 10 files changed, 47 insertions(+), 63 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index 4c2780096..db01347ed 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:RP2040
 mcu:SAMD11
-mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
 mcu:STM32L0
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 2da7808e7..7463aa86a 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:RP2040
 mcu:SAMD11
-mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
 family:broadcom_32bit
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index d90741df7..d3a096eb0 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:RP2040
 mcu:SAMD11
-mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
 mcu:STM32L0
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 01990a5b4..06920db67 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:RP2040
 mcu:SAMD11
-mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
 family:broadcom_32bit
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index 01990a5b4..06920db67 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:RP2040
 mcu:SAMD11
-mcu:SAMX7X
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
 family:broadcom_32bit
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.cmake b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
index 971a27e29..fc2071b3a 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.cmake
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.cmake
@@ -1,9 +1,8 @@
 set(JLINK_DEVICE ATSAME70N19B)
-set(LD_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/same70n19b_flash.ld)
-set(LD_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/config/linker/Microchip/atsame70n19b/flash.icf)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/same70n19b_flash.ld)
 
-set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70n19b.c)
-set(STARTUP_FILE_IAR ${TOP}/hw/mcu/microchip/same70/same70b/iar/iar/startup_same70n19b.c)
+# N19B and Q21B share the same vector table / startup code
+set(STARTUP_FILE_GNU ${TOP}/hw/mcu/microchip/same70/same70b/gcc/gcc/startup_same70q21b.c)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/same7x/boards/same70_qmtech/board.mk b/hw/bsp/same7x/boards/same70_qmtech/board.mk
index 461bef8a2..4ad8212a8 100644
--- a/hw/bsp/same7x/boards/same70_qmtech/board.mk
+++ b/hw/bsp/same7x/boards/same70_qmtech/board.mk
@@ -1,3 +1,6 @@
 CFLAGS += -D__SAME70N19B__
 
+LD_FILE = $(BOARD_PATH)/same70n19b_flash.ld
+STARTUP_FILE = $(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c
+
 JLINK_DEVICE = ATSAME70N19B
diff --git a/hw/bsp/same7x/boards/same70_xplained/board.mk b/hw/bsp/same7x/boards/same70_xplained/board.mk
index d3e7cfc29..231d5d770 100644
--- a/hw/bsp/same7x/boards/same70_xplained/board.mk
+++ b/hw/bsp/same7x/boards/same70_xplained/board.mk
@@ -1,3 +1,6 @@
 CFLAGS += -D__SAME70Q21B__
 
+LD_FILE = $(SDK_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
+STARTUP_FILE = $(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c
+
 JLINK_DEVICE = ATSAME70Q21B
diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c
index ff6ecf277..61c1792d1 100644
--- a/hw/bsp/same7x/family.c
+++ b/hw/bsp/same7x/family.c
@@ -42,56 +42,15 @@ static inline void board_vbus_set(uint8_t rhport, bool state);
 void _init(void);
 #include "board.h"
 
-#ifndef LED_STATE_ON
-  #define LED_STATE_ON 1
-#endif
-
-#ifndef LED_PORT_CLOCK
-  #define LED_PORT_CLOCK ID_PIOA
-#endif
-
-#ifndef BUTTON_PORT_CLOCK
-  #define BUTTON_PORT_CLOCK ID_PIOA
-#endif
-
-#ifndef UART_PORT_CLOCK
-  #define UART_PORT_CLOCK ID_USART1
-#endif
-
-#ifndef BOARD_USART
-  #define BOARD_USART USART1
-#endif
-
-#ifndef BOARD_UART_DESCRIPTOR
-  #define BOARD_UART_DESCRIPTOR edbg_com
-#endif
-
-#ifndef BOARD_UART_BUFFER
-  #define BOARD_UART_BUFFER edbg_com_buffer
-#endif
-
-#ifndef BUTTON_STATE_ACTIVE
-  #define BUTTON_STATE_ACTIVE 0
-#endif
-
-#ifndef UART_TX_FUNCTION
-  #define UART_TX_FUNCTION MUX_PB4D_USART1_TXD1
-#endif
-
-#ifndef UART_RX_FUNCTION
-  #define UART_RX_FUNCTION MUX_PA21A_USART1_RXD1
-#endif
-
 #ifndef UART_BUFFER_SIZE
   #define UART_BUFFER_SIZE 64
 #endif
 
 #define LED_STATE_OFF (1 - LED_STATE_ON)
 
-static struct usart_async_descriptor BOARD_UART_DESCRIPTOR;
-static uint8_t BOARD_UART_BUFFER[UART_BUFFER_SIZE];
+static struct usart_async_descriptor edbg_com;
+static uint8_t edbg_com_buffer[UART_BUFFER_SIZE];
 static volatile bool uart_busy = false;
-
 static void tx_complete_cb(const struct usart_async_descriptor *const io_descr) {
   (void) io_descr;
   uart_busy = false;
@@ -121,10 +80,10 @@ void board_init(void) {
   gpio_set_pin_function(UART_RX_PIN, UART_RX_FUNCTION);
   gpio_set_pin_function(UART_TX_PIN, UART_TX_FUNCTION);
 
-  usart_async_init(&BOARD_UART_DESCRIPTOR, BOARD_USART, BOARD_UART_BUFFER, sizeof(BOARD_UART_BUFFER), _usart_get_usart_async());
-  usart_async_set_baud_rate(&BOARD_UART_DESCRIPTOR, CFG_BOARD_UART_BAUDRATE);
-  usart_async_register_callback(&BOARD_UART_DESCRIPTOR, USART_ASYNC_TXC_CB, tx_complete_cb);
-  usart_async_enable(&BOARD_UART_DESCRIPTOR);
+  usart_async_init(&edbg_com, BOARD_USART, edbg_com_buffer, sizeof(edbg_com_buffer), _usart_get_usart_async());
+  usart_async_set_baud_rate(&edbg_com, CFG_BOARD_UART_BAUDRATE);
+  usart_async_register_callback(&edbg_com, USART_ASYNC_TXC_CB, tx_complete_cb);
+  usart_async_enable(&edbg_com);
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer (SystemCoreClock may not be correct after init)
@@ -181,10 +140,40 @@ int board_uart_write(void const *buf, int len) {
   while (uart_busy) {}
   uart_busy = true;
 
-  io_write(&BOARD_UART_DESCRIPTOR.io, buf, len);
+  io_write(&edbg_com.io, buf, len);
   return len;
 }
 
+// Read 128-bit unique ID via EFC STUI/SPUI commands
+// Must run from RAM since STUI remaps flash to the unique ID
+__attribute__((noinline)) TU_ATTR_SECTION(.ramfunc) static void read_unique_id(uint32_t uid[4]) {
+  // Wait for flash to be ready
+  while (!(EFC->EEFC_FSR & EEFC_FSR_FRDY)) {}
+
+  // Issue Start Read Unique Identifier command
+  EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FCMD_STUI;
+  while (EFC->EEFC_FSR & EEFC_FSR_FRDY) {}
+
+  // Read 128-bit unique ID from flash base address
+  const volatile uint32_t *flash = (const volatile uint32_t *) IFLASH_ADDR;
+  for (int i = 0; i < 4; i++) {
+    uid[i] = flash[i];
+  }
+
+  // Issue Stop Read Unique Identifier command
+  EFC->EEFC_FCR = EEFC_FCR_FKEY_PASSWD | EEFC_FCR_FCMD_SPUI;
+  while (!(EFC->EEFC_FSR & EEFC_FSR_FRDY)) {}
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  const size_t uid_len = 16;
+  if (max_len < uid_len) {
+    return 0;
+  }
+  read_unique_id((uint32_t *)(uintptr_t) id);
+  return uid_len;
+}
+
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
 
diff --git a/hw/bsp/same7x/family.mk b/hw/bsp/same7x/family.mk
index c8fa74d71..19e119625 100644
--- a/hw/bsp/same7x/family.mk
+++ b/hw/bsp/same7x/family.mk
@@ -21,11 +21,9 @@ CFLAGS_SKIP += -Wcast-qual
 LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
 
 # All source paths should be relative to the top level.
-LD_FILE = $(SDK_DIR)/same70b/gcc/gcc/same70q21b_flash.ld
-
 SRC_C += \
 	src/portable/microchip/samx7x/dcd_samx7x.c \
-	$(SDK_DIR)/same70b/gcc/gcc/startup_same70q21b.c \
+	$(STARTUP_FILE) \
 	$(SDK_DIR)/same70b/gcc/system_same70q21b.c \
 	$(SDK_DIR)/hpl/core/hpl_init.c \
 	$(SDK_DIR)/hpl/usart/hpl_usart.c \
@@ -48,9 +46,6 @@ INC += \
 	$(TOP)/$(SDK_DIR)/hri \
 	$(TOP)/$(SDK_DIR)/CMSIS/Core/Include
 
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM7
-
 # For flash-jlink target
 flash: $(BUILD)/$(PROJECT).bin
 	edbg --verbose -t same70 -pv -f $<
-- 
cgit v1.3.1


From 131a078821db3f4cd0e2dbab09bbb4633046228d Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 10 Mar 2026 17:16:47 +0700
Subject: update lpc55 bsp to use mcx config tool, move led/button/uart and usb
 port power to generated pinmux

---
 hw/bsp/lpc55/boards/double_m33_express/board.h     |   17 +-
 hw/bsp/lpc55/boards/double_m33_express/board.mk    |    9 +-
 .../boards/double_m33_express/board/clock_config.c |  328 +++++
 .../boards/double_m33_express/board/clock_config.h |  290 +++++
 .../boards/double_m33_express/board/peripherals.c  |  160 +++
 .../boards/double_m33_express/board/peripherals.h  |   57 +
 .../boards/double_m33_express/board/pin_mux.c      |  736 +++++++++++
 .../boards/double_m33_express/board/pin_mux.h      |  383 ++++++
 .../double_m33_express/double_m33_express.mex      | 1283 +++++++++++++++++++
 .../boards/lpcxpresso55s28/LPCXpresso55S28.mex     |  856 +++++++++++++
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake    |    7 +
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.h        |   23 +-
 hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk       |   13 +-
 .../boards/lpcxpresso55s28/board/clock_config.c    |  335 +++++
 .../boards/lpcxpresso55s28/board/clock_config.h    |  286 +++++
 .../boards/lpcxpresso55s28/board/peripherals.c     |  157 +++
 .../boards/lpcxpresso55s28/board/peripherals.h     |   57 +
 .../lpc55/boards/lpcxpresso55s28/board/pin_mux.c   |  795 ++++++++++++
 .../lpc55/boards/lpcxpresso55s28/board/pin_mux.h   |  433 +++++++
 .../boards/lpcxpresso55s69/LPCXpresso55S69.mex     | 1329 +++++++++++++++++++
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake    |    6 +
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.h        |   24 +-
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk       |   12 +-
 .../boards/lpcxpresso55s69/board/clock_config.c    |  328 +++++
 .../boards/lpcxpresso55s69/board/clock_config.h    |  290 +++++
 .../boards/lpcxpresso55s69/board/peripherals.c     |  160 +++
 .../boards/lpcxpresso55s69/board/peripherals.h     |   57 +
 .../lpc55/boards/lpcxpresso55s69/board/pin_mux.c   |  860 +++++++++++++
 .../lpc55/boards/lpcxpresso55s69/board/pin_mux.h   |  435 +++++++
 hw/bsp/lpc55/boards/mcu_link/board.cmake           |    4 +-
 hw/bsp/lpc55/boards/mcu_link/board.h               |   10 +-
 hw/bsp/lpc55/boards/mcu_link/board.mk              |    9 +-
 hw/bsp/lpc55/boards/mcu_link/board/clock_config.c  |  328 +++++
 hw/bsp/lpc55/boards/mcu_link/board/clock_config.h  |  290 +++++
 hw/bsp/lpc55/boards/mcu_link/board/peripherals.c   |  160 +++
 hw/bsp/lpc55/boards/mcu_link/board/peripherals.h   |   57 +
 hw/bsp/lpc55/boards/mcu_link/board/pin_mux.c       |  839 ++++++++++++
 hw/bsp/lpc55/boards/mcu_link/board/pin_mux.h       |  393 ++++++
 hw/bsp/lpc55/boards/mcu_link/mcu_link.mex          | 1354 ++++++++++++++++++++
 hw/bsp/lpc55/family.c                              |  165 +--
 hw/bsp/lpc55/family.cmake                          |   34 +-
 hw/bsp/lpc55/family.mk                             |   36 +-
 42 files changed, 13163 insertions(+), 242 deletions(-)
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/clock_config.c
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/clock_config.h
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/peripherals.c
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/peripherals.h
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.c
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.h
 create mode 100644 hw/bsp/lpc55/boards/double_m33_express/double_m33_express.mex
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/LPCXpresso55S28.mex
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.h
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.h
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.h
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/LPCXpresso55S69.mex
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.h
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.h
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.c
 create mode 100644 hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.h
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/clock_config.c
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/clock_config.h
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/peripherals.c
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/peripherals.h
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/pin_mux.c
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/board/pin_mux.h
 create mode 100644 hw/bsp/lpc55/boards/mcu_link/mcu_link.mex

(limited to 'hw')

diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.h b/hw/bsp/lpc55/boards/double_m33_express/board.h
index dc11e47fc..fec7e9067 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.h
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.h
@@ -37,26 +37,17 @@
 #endif
 
 // LED
-#define LED_PORT              0
-#define LED_PIN               1
+#define LED_PORT              BOARD_INITLEDSPINS_LED_PORT
+#define LED_PIN               BOARD_INITLEDSPINS_LED_PIN
 #define LED_STATE_ON          1
 
 // WAKE button
-#define BUTTON_PORT           0
-#define BUTTON_PIN            5
+#define BUTTON_PORT           BOARD_INITBUTTONSPINS_S1_PORT
+#define BUTTON_PIN            BOARD_INITBUTTONSPINS_S1_PIN
 #define BUTTON_STATE_ACTIVE   0
 
-// Number of neopixels
-#define NEOPIXEL_NUMBER       2
-#define NEOPIXEL_PORT         0
-#define NEOPIXEL_PIN          27
-#define NEOPIXEL_CH           6
-#define NEOPIXEL_TYPE         0
-
 // UART
 #define UART_DEV              USART0
-#define UART_RX_PINMUX        0U, 29U, IOCON_PIO_DIG_FUNC1_EN
-#define UART_TX_PINMUX        0U, 30U, IOCON_PIO_DIG_FUNC1_EN
 
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board.mk b/hw/bsp/lpc55/boards/double_m33_express/board.mk
index d28700ca7..c0282686f 100644
--- a/hw/bsp/lpc55/boards/double_m33_express/board.mk
+++ b/hw/bsp/lpc55/boards/double_m33_express/board.mk
@@ -1,10 +1,17 @@
 MCU_VARIANT = LPC55S69
 MCU_CORE = LPC55S69_cm33_core0
-PORT ?= 1
+RHPORT_DEVICE ?= 1
 
 CFLAGS += -DCPU_LPC55S69JBD100_cm33_core0
 LD_FILE = $(BOARD_PATH)/LPC55S69_cm33_core0_uf2.ld
 
+SRC_C += \
+	$(TOP)/$(BOARD_PATH)/board/clock_config.c \
+	$(TOP)/$(BOARD_PATH)/board/pin_mux.c \
+	$(TOP)/$(BOARD_PATH)/board/peripherals.c
+
+INC += $(TOP)/$(BOARD_PATH)/board
+
 JLINK_DEVICE = LPC55S69
 PYOCD_TARGET = LPC55S69
 
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.c b/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.c
new file mode 100644
index 000000000..99a738f18
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to set up clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_power.h"
+#include "fsl_clock.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockPLL150M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: System_clock.outFreq, value: 12 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF96M
+outputs:
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
+- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
+sources:
+- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF96M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
+
+    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL100M
+outputs:
+- {id: System_clock.outFreq, value: 100 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL100M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+
+    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 100000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL150M
+called_from_default_init: true
+outputs:
+- {id: FXCOM0_clock.outFreq, value: 48 MHz}
+- {id: System_clock.outFreq, value: 144 MHz}
+- {id: USB0_clock.outFreq, value: 48 MHz}
+- {id: USB1_PHY_clock.outFreq, value: 16 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: PLL1_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_PLL_USB_OUT, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.FCCLKSEL0.sel, value: SYSCON.PLL0DIV}
+- {id: SYSCON.FRGCTRL0_DIV.scale, value: '400'}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0DIV.scale, value: '2'}
+- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
+- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL1M_MULT.scale, value: '18'}
+- {id: SYSCON.PLL1_PDEC.scale, value: '2'}
+- {id: SYSCON.USB0CLKDIV.scale, value: '3'}
+- {id: SYSCON.USB0CLKSEL.sel, value: SYSCON.MAINCLKSELB}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL150M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_PLL_USB_OUT_MASK;       /* Enable clk_in to HS USB  */
+
+    POWER_SetVoltageForFreq(144000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(144000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 150000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up PLL1 */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
+    const pll_setup_t pll1Setup = {
+        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(11U) | SYSCON_PLL1CTRL_SELP(5U),
+        .pllndec = SYSCON_PLL1NDEC_NDIV(1U),
+        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
+        .pllmdec = SYSCON_PLL1MDEC_MDIV(18U),
+        .pllRate = 144000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
+
+    /*!< Set up dividers */
+    #if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 144U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #else
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 37120U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #endif
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 0U, true);               /*!< Reset USB0CLKDIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 3U, false);         /*!< Set USB0CLKDIV divider to value 3 */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);               /*!< Reset PLL0DIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 2U, false);         /*!< Set PLL0DIV divider to value 2 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
+    CLOCK_AttachClk(kMAIN_CLK_to_USB0_CLK);                 /*!< Switch USB0_CLK to MAIN_CLK */
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM0);                 /*!< Switch FLEXCOMM0 to PLL0_DIV */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
+#endif
+}
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.h b/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.h
new file mode 100644
index 000000000..9112ede78
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/clock_config.h
@@ -0,0 +1,290 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK      0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK              0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK          0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK          0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK        0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK          0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK         0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK         0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK         0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK         0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK         0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK          0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK          0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK          0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK          0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK          0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK          0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK          0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK          0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK          0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK            0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK        0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK    0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK        0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK 0UL           /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK          0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK         0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK             0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK            0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK        0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK        0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK          96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK           0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK            0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK        0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK           0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK             0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK           0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK           100000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK             0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK         0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL100M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         144000000U  /*!< Core clock frequency: 144000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK           48000000UL     /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK           144000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK             48000000UL     /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK         16000000UL     /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL150M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.c b/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.c
new file mode 100644
index 000000000..890a20fc6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v15.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+functionalGroups:
+- name: BOARD_InitPeripherals_cm33_core0
+  UUID: 61d0725d-b300-49cb-9c66-b5edfbf8ffc1
+  called_from_default_init: true
+  selectedCore: cm33_core0
+- name: BOARD_InitPeripherals_cm33_core1
+  UUID: e2041cd4-ebb6-45a5-807f-e0c2dc047d48
+  selectedCore: cm33_core1
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+  - global_init: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'uart_cmsis_common'
+- type_id: 'uart_cmsis_common'
+- global_USART_CMSIS_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'gpio_adapter_common'
+- type_id: 'gpio_adapter_common'
+- global_gpio_adapter_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * BOARD_InitPeripherals_cm33_core0 functional group
+ **********************************************************************************************************************/
+/***********************************************************************************************************************
+ * DEBUG_UART initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'DEBUG_UART'
+- type: 'flexcomm_usart'
+- mode: 'polling'
+- custom_name_enabled: 'true'
+- type_id: 'flexcomm_usart_2.2.0'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'FLEXCOMM0'
+- config_sets:
+  - usartConfig_t:
+    - usartConfig:
+      - clockSource: 'FXCOMFunctionClock'
+      - clockSourceFreq: 'ClocksTool_DefaultInit'
+      - baudRate_Bps: '115200'
+      - syncMode: 'kUSART_SyncModeDisabled'
+      - parityMode: 'kUSART_ParityDisabled'
+      - stopBitCount: 'kUSART_OneStopBit'
+      - bitCountPerChar: 'kUSART_8BitsPerChar'
+      - loopback: 'false'
+      - txWatermark: 'kUSART_TxFifo0'
+      - rxWatermark: 'kUSART_RxFifo1'
+      - enableRx: 'true'
+      - enableTx: 'true'
+      - clockPolarity: 'kUSART_RxSampleOnFallingEdge'
+      - enableContinuousSCLK: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const usart_config_t DEBUG_UART_config = {
+  .baudRate_Bps = 115200UL,
+  .syncMode = kUSART_SyncModeDisabled,
+  .parityMode = kUSART_ParityDisabled,
+  .stopBitCount = kUSART_OneStopBit,
+  .bitCountPerChar = kUSART_8BitsPerChar,
+  .loopback = false,
+  .txWatermark = kUSART_TxFifo0,
+  .rxWatermark = kUSART_RxFifo1,
+  .enableRx = true,
+  .enableTx = true,
+  .enableMode32k = false,
+  .clockPolarity = kUSART_RxSampleOnFallingEdge,
+  .enableContinuousSCLK = false
+};
+
+static void DEBUG_UART_init(void) {
+  /* Reset FLEXCOMM device */
+  RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
+  USART_Init(DEBUG_UART_PERIPHERAL, &DEBUG_UART_config, DEBUG_UART_CLOCK_SOURCE);
+}
+
+/***********************************************************************************************************************
+ * NVIC initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'NVIC'
+- type: 'nvic'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'nvic'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'NVIC'
+- config_sets:
+  - nvic:
+    - interrupt_table: []
+    - interrupts: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void NVIC_init(void) {
+} */
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals_cm33_core0(void)
+{
+  /* Initialize components */
+  DEBUG_UART_init();
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+  BOARD_InitPeripherals_cm33_core0();
+}
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.h b/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.h
new file mode 100644
index 000000000..fc4d72c33
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/peripherals.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "fsl_common.h"
+#include "fsl_reset.h"
+#include "fsl_usart.h"
+#include "fsl_clock.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+/* Definitions for BOARD_InitPeripherals_cm33_core0 functional group */
+/* Definition of peripheral ID */
+#define DEBUG_UART_PERIPHERAL ((USART_Type *)FLEXCOMM0)
+/* Definition of the clock source frequency */
+#define DEBUG_UART_CLOCK_SOURCE 48000000UL
+
+/***********************************************************************************************************************
+ * Global variables
+ **********************************************************************************************************************/
+extern const usart_config_t DEBUG_UART_config;
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+
+void BOARD_InitPeripherals_cm33_core0(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _PERIPHERALS_H_ */
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.c b/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.c
new file mode 100644
index 000000000..16e112dfc
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.c
@@ -0,0 +1,736 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+pin_labels:
+- {pin_num: '7', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1, label: 'P18[2]/SD1_CLK', identifier: LED}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_iocon.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitUSBPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+    BOARD_InitPins_Core0();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
+
+    const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
+                                    IOCON_PIO_FUNC6 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI |
+                                    /* Analog switch is open (disabled) */
+                                    IOCON_PIO_ASW_DI);
+    /* PORT0 PIN10 (coords: 21) is configured as SWO */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled) */
+                                           IOCON_PIO_ASW_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled), only for A0 version */
+                                           IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled) */
+                                          IOCON_PIO_ASW_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled), only for A0 version */
+                                          IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitUSBPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
+  - {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
+  - {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
+  - {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
+  - {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
+  - {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp}
+  - {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
+    mode: pullUp}
+  - {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp}
+  - {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitUSBPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitUSBPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
+                                IOCON_PIO_FUNC7 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
+
+    IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT028 (pin 66) is configured as USB0_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO0_28_FUNC_ALT7)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO0_28_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT112 (pin 67) is configured as USB0_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_12_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_12_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_12_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][29] = ((IOCON->PIO[1][29] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT129 (pin 80) is configured as USB1_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_29_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_29_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_29_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][30] = ((IOCON->PIO[1][30] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT130 (pin 65) is configured as USB1_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO1_30_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_30_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_30_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '7', peripheral: GPIO, signal: 'PIO0, 1', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1, direction: OUTPUT}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitLEDsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    gpio_pin_config_t LED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO0_1 (pin 7)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GPIO, BOARD_INITLEDSPINS_LED_PORT, BOARD_INITLEDSPINS_LED_PIN, &LED_config);
+
+    IOCON->PIO[0][1] = ((IOCON->PIO[0][1] &
+                         /* Mask bits to zero which are setting */
+                         (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                        /* Selects pin function.
+                         * : PORT01 (pin 7) is configured as PIO0_1. */
+                        | IOCON_PIO_FUNC(PIO0_1_FUNC_ALT0)
+
+                        /* Select Digital mode.
+                         * : Enable Digital mode.
+                         * Digital input is enabled. */
+                        | IOCON_PIO_DIGIMODE(PIO0_1_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: INPUT,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    gpio_pin_config_t S1_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO0_5 (pin 88)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
+
+    const uint32_t S1 = (/* Pin is configured as PIO0_5 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN5 (coords: 88) is configured as PIO0_5 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, S1);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins_Core0:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins_Core0
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitPins_Core0(void)
+{
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitI2SPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
+    identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitI2SPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitI2SPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
+                                  IOCON_PIO_FUNC1 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI |
+                                  /* Analog switch is closed (enabled) */
+                                  IOCON_PIO_ASW_EN);
+    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
+
+    const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
+
+    const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
+
+    const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
+                                  IOCON_PIO_FUNC7 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
+
+    const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
+
+    const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+
+    const uint32_t MCLK = (/* Pin is configured as MCLK */
+                           IOCON_PIO_FUNC1 |
+                           /* No addition pin function */
+                           IOCON_PIO_MODE_INACT |
+                           /* Standard mode, output slew rate control is enabled */
+                           IOCON_PIO_SLEW_STANDARD |
+                           /* Input function is not inverted */
+                           IOCON_PIO_INV_DI |
+                           /* Enables digital function */
+                           IOCON_PIO_DIGITAL_EN |
+                           /* Open drain is disabled */
+                           IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitACCELPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitACCELPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitACCELPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t ACCL_INTR_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_19 (pin 58)  */
+    GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
+
+    const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
+                                IOCON_PIO_FUNC0 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI |
+                                /* Analog switch is open (disabled) */
+                                IOCON_PIO_ASW_DI);
+    /* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.h b/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.h
new file mode 100644
index 000000000..33f000d0a
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/board/pin_mux.h
@@ -0,0 +1,383 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
+/* @} */
+
+/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC6 0x06u         /*!<@brief Selects pin function 6 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
+/* @} */
+
+/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
+/* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Enables digital function */
+#define IOCON_PIO_DIGITAL_EN 0x0100u
+/*!
+ * @brief Selects pin function 7 */
+#define IOCON_PIO_FUNC7 0x07u
+/*!
+ * @brief Input function is not inverted */
+#define IOCON_PIO_INV_DI 0x00u
+/*!
+ * @brief No addition pin function */
+#define IOCON_PIO_MODE_INACT 0x00u
+/*!
+ * @brief Open drain is disabled */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u
+/*!
+ * @brief Standard mode, output slew rate control is enabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_28_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 7. */
+#define PIO0_28_FUNC_ALT7 0x07u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO0_28_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_12_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_12_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_12_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_29_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_29_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_29_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_30_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_30_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_30_MODE_PULL_UP 0x02u
+
+/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
+  @{ */
+#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U                   /*!<@brief PORT pin number */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define PIO0_1_DIGIMODE_DIGITAL 0x01u /*!<@brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_1_FUNC_ALT0 0x00u        /*!<@brief Selects pin function.: Alternative connection 0. */
+
+/*! @name PIO0_1 (number 7), P18[2]/SD1_CLK
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_INIT_GPIO_VALUE 0U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GPIO_PIN_MASK (1U << 1U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_PORT 0U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_PIN 1U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_PIN_MASK (1U << 1U)      /*!<@brief PORT pin mask */
+                                                        /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S1_PORT 0U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_PIN 5U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 5U)      /*!<@brief PORT pin mask */
+                                                          /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins_Core0(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
+  @{ */
+#define BOARD_INITI2SPINS_MCLK_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_MCLK_PIN 31U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U)      /*!<@brief PORT pin mask */
+                                                         /* @} */
+
+/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
+#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/double_m33_express/double_m33_express.mex b/hw/bsp/lpc55/boards/double_m33_express/double_m33_express.mex
new file mode 100644
index 000000000..47d0909d6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/double_m33_express/double_m33_express.mex
@@ -0,0 +1,1283 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="LPCXpresso55S69" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="acf73d26-2bf9-4855-b3be-26068672d98a" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>LPC55S69</processor>
+      <package>LPC55S69JBD100</package>
+      <board>LPCXpresso55S69</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="cm33_core0">
+         <core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
+         <core name="Cortex-M33 (Core #1)" id="cm33_core1" description=""/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <custom_copyright>
+         <text>/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+</text>
+         <enabled>true</enabled>
+      </custom_copyright>
+      <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>25.09.10</processor_version>
+            <pin_labels>
+               <pin_label pin_num="7" pin_signal="PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1" label="P18[2]/SD1_CLK" identifier="LED"/>
+            </pin_labels>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI_DATA" pin_num="92" pin_signal="PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO_WS" pin_num="94" pin_signal="PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSWD_DEBUGPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SWD" signal="SWCLK" pin_num="13" pin_signal="PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullDown"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWDIO" pin_num="12" pin_signal="PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWO" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="DEBUG_SWD_SWO"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSBPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USBFSH" description="Peripheral USBFSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="USBHSH" description="Peripheral USBHSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USBFSH" signal="USB_DP" pin_num="97" pin_signal="USB0_DP"/>
+                  <pin peripheral="USBFSH" signal="USB_DM" pin_num="98" pin_signal="USB0_DM"/>
+                  <pin peripheral="USBFSH" signal="USB_VBUS" pin_num="78" pin_signal="PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_DM" pin_num="35" pin_signal="USB1_DM"/>
+                  <pin peripheral="USBHSH" signal="USB_DP" pin_num="34" pin_signal="USB1_DP"/>
+                  <pin peripheral="USBHSH" signal="USB_VBUS" pin_num="36" pin_signal="USB1_VBUS"/>
+                  <pin peripheral="USBHSH" signal="USB_OVERCURRENTN" pin_num="65" pin_signal="PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_OVERCURRENTN" pin_num="66" pin_signal="PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_PORTPWRN" pin_num="67" pin_signal="PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_PORTPWRN" pin_num="80" pin_signal="PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 1" pin_num="7" pin_signal="PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 5" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="RESET" pin_num="32" pin_signal="RESETN"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitPins_Core0">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core0">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitPins_Core1">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core1</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core1">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitI2SPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM7" description="Peripheral FLEXCOMM7 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="MCLK" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="SCK" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="RXD_SDA_MOSI_DATA" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="TXD_SCL_MISO_WS" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="SCK" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="FC6_I2S_CLK"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitACCELPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitACCELPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 19" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="18.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>25.09.10</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFROHF96M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="ANACTRL.fro_hf.outFreq" value="96 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG" value="Enable" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELA.sel" value="ANACTRL.fro_hf_clk" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL100M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="100 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL0_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="100" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="4" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="4" locked="true"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FXCOM0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB1_PHY_clock.outFreq" value="16 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="PLL1_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_PLL_USB_OUT" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.FCCLKSEL0.sel" value="SYSCON.PLL0DIV" locked="false"/>
+                  <setting id="SYSCON.FRGCTRL0_DIV.scale" value="400" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL1_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0DIV.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="150" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="8" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="2" locked="true"/>
+                  <setting id="SYSCON.PLL1CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL1M_MULT.scale" value="18" locked="false"/>
+                  <setting id="SYSCON.PLL1_PDEC.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.USB0CLKDIV.scale" value="3" locked="false"/>
+                  <setting id="SYSCON.USB0CLKSEL.sel" value="SYSCON.MAINCLKSELB" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="FLEXCOMM USART Driver is not found in the toolchain/IDE project. The project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="An unsupported version of the FLEXCOMM USART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. The project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.2.0</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="Tool" resourceId="Clocks" description="The Clocks tool is required by the Peripherals tool, but it is disabled." problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data>true</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>25.09.10</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals_cm33_core0" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="FXCOM0_clock" description="FXCOM0 clock is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_rxd" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_txd" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="ACCEL" uuid="b999c56a-0d01-4089-9311-9224db5272f4" type="flexcomm_i2c" type_id="flexcomm_i2c_2.3.0" mode="I2C_Polling" peripheral="FLEXCOMM4" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
+                        <setting name="i2c_mode" value="kI2C_Master"/>
+                        <setting name="clockSource" value="FXCOMFunctionClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="i2c_master_config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="baudRate_Bps" value="100000"/>
+                           <setting name="enableTimeout" value="false"/>
+                           <setting name="timeout_Ms" value="35"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="9fb0504c-6159-43e2-98bb-51d75f06133a" type="flexcomm_usart" type_id="flexcomm_usart_2.2.0" mode="polling" peripheral="FLEXCOMM0" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="usartConfig_t">
+                        <struct name="usartConfig">
+                           <setting name="clockSource" value="FXCOMFunctionClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="syncMode" value="kUSART_SyncModeDisabled"/>
+                           <setting name="parityMode" value="kUSART_ParityDisabled"/>
+                           <setting name="stopBitCount" value="kUSART_OneStopBit"/>
+                           <setting name="bitCountPerChar" value="kUSART_8BitsPerChar"/>
+                           <setting name="loopback" value="false"/>
+                           <setting name="txWatermark" value="kUSART_TxFifo0"/>
+                           <setting name="rxWatermark" value="kUSART_RxFifo1"/>
+                           <setting name="enableRx" value="true"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="clockPolarity" value="kUSART_RxSampleOnFallingEdge"/>
+                           <setting name="enableContinuousSCLK" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LEDS" uuid="f5ad3a56-404b-44cb-8abc-7b25b5551d33" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="SW" uuid="d57ddfca-dc72-486c-a145-c7a2ab1e1a66" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="NVIC" uuid="56761ad9-9b77-4074-917d-de0fde10cd48" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+            <functional_group name="BOARD_InitPeripherals_cm33_core1" uuid="e2041cd4-ebb6-45a5-807f-e0c2dc047d48" called_from_default_init="false" id_prefix="" core="cm33_core1">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="NVIC_2" uuid="db546092-4c45-40af-938a-8cc58edd1c4f" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="905d2747-654a-47d9-91f9-81a5c6f9c407" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+                  <setting name="global_init" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="64cbcd7c-424d-4baf-9681-a60878969fb6" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_can" uuid="b9b018dd-ef4e-41f6-b456-f91b855cb391" type_id="generic_can">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="bafa6375-9184-4272-8102-06ea086041d7" type_id="uart_cmsis_common">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="1710dc7f-381f-4b37-8f78-0fd2f923b3ac" type_id="generic_uart">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_enet" uuid="c7fc4395-b141-4b13-a326-4145e765b2b7" type_id="generic_enet">
+               <config_set_global name="global_enet"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="b6ee89c2-4c58-4181-94dc-af13d8ae8ea5" type_id="gpio_adapter_common">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="10.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+            <tool_options>
+               <option id="_output_type_" value="c_code"/>
+               <option id="_legacy_source_names_" value="yes"/>
+            </tool_options>
+         </tee_profile>
+         <functional_group name="BOARD_InitTrustZone" called_from_default_init="true" id_prefix="" prefix_user_defined="true">
+            <description></description>
+            <options/>
+            <ahb>
+               <relative_region start="0" size="655360" security="s_priv" memory="PROGRAM_FLASH"/>
+               <relative_region start="0" size="131072" security="s_priv" memory="BootROM"/>
+               <relative_region start="0" size="32768" security="s_priv" memory="SRAMX"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM0"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM1"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM2"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM3"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="SRAM4"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="AHBperipherals_port10_ahb_secure_ctrl_area"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="USB_RAM"/>
+               <masters>
+                  <master id="HASH" security="ns_user"/>
+                  <master id="MCM33C" security="ns_user"/>
+                  <master id="MCM33S" security="ns_user"/>
+                  <master id="PQ" security="ns_user"/>
+                  <master id="SDIO" security="ns_user"/>
+                  <master id="SDMA0" security="ns_user"/>
+                  <master id="SDMA1" security="ns_user"/>
+                  <master id="USBFSD" security="ns_user"/>
+                  <master id="USBFSH" security="ns_user"/>
+               </masters>
+               <peripherals>
+                  <peripheral id="ADC0" security="s_priv"/>
+                  <peripheral id="AHB_SECURE_CTRL" security="s_priv"/>
+                  <peripheral id="ANACTRL" security="s_priv"/>
+                  <peripheral id="CASPER" security="s_priv"/>
+                  <peripheral id="CRC_ENGINE" security="s_priv"/>
+                  <peripheral id="CTIMER0" security="s_priv"/>
+                  <peripheral id="CTIMER1" security="s_priv"/>
+                  <peripheral id="CTIMER2" security="s_priv"/>
+                  <peripheral id="CTIMER3" security="s_priv"/>
+                  <peripheral id="CTIMER4" security="s_priv"/>
+                  <peripheral id="DBGMAILBOX" security="s_priv"/>
+                  <peripheral id="DMA0" security="s_priv"/>
+                  <peripheral id="DMA1" security="s_priv"/>
+                  <peripheral id="FLASH" security="s_priv"/>
+                  <peripheral id="FLEXCOMM0" security="s_priv"/>
+                  <peripheral id="FLEXCOMM1" security="s_priv"/>
+                  <peripheral id="FLEXCOMM2" security="s_priv"/>
+                  <peripheral id="FLEXCOMM3" security="s_priv"/>
+                  <peripheral id="FLEXCOMM4" security="s_priv"/>
+                  <peripheral id="FLEXCOMM5" security="s_priv"/>
+                  <peripheral id="FLEXCOMM6" security="s_priv"/>
+                  <peripheral id="FLEXCOMM7" security="s_priv"/>
+                  <peripheral id="GINT0" security="s_priv"/>
+                  <peripheral id="GINT1" security="s_priv"/>
+                  <peripheral id="GPIO" security="s_priv"/>
+                  <peripheral id="HASHCRYPT" security="s_priv"/>
+                  <peripheral id="INPUTMUX" security="s_priv"/>
+                  <peripheral id="IOCON" security="s_priv"/>
+                  <peripheral id="MAILBOX" security="s_priv"/>
+                  <peripheral id="MRT0" security="s_priv"/>
+                  <peripheral id="OSTIMER" security="s_priv"/>
+                  <peripheral id="PINT" security="s_priv"/>
+                  <peripheral id="PLU" security="s_priv"/>
+                  <peripheral id="PMC" security="s_priv"/>
+                  <peripheral id="POWERQUAD" security="s_priv"/>
+                  <peripheral id="PRINCE" security="s_priv"/>
+                  <peripheral id="PUF" security="s_priv"/>
+                  <peripheral id="RNG" security="s_priv"/>
+                  <peripheral id="RTC" security="s_priv"/>
+                  <peripheral id="SCT0" security="s_priv"/>
+                  <peripheral id="SDIF" security="s_priv"/>
+                  <peripheral id="SECGPIO" security="s_priv"/>
+                  <peripheral id="SECPINT" security="s_priv"/>
+                  <peripheral id="SPI8" security="s_priv"/>
+                  <peripheral id="SYSCON" security="s_priv"/>
+                  <peripheral id="SYSCTL" security="s_priv"/>
+                  <peripheral id="USB0" security="s_priv"/>
+                  <peripheral id="USBFSH" security="s_priv"/>
+                  <peripheral id="USBHSD" security="s_priv"/>
+                  <peripheral id="USBHSH" security="s_priv"/>
+                  <peripheral id="USBPHY" security="s_priv"/>
+                  <peripheral id="UTICK0" security="s_priv"/>
+                  <peripheral id="WWDT" security="s_priv"/>
+               </peripherals>
+               <interrupts>
+                  <masking>
+                     <interrupt id="acmp_capt_irq" masked="Masked"/>
+                     <interrupt id="adc_irq" masked="Masked"/>
+                     <interrupt id="casper_irq" masked="Masked"/>
+                     <interrupt id="ctimer0_irq" masked="Masked"/>
+                     <interrupt id="ctimer1_irq" masked="Masked"/>
+                     <interrupt id="ctimer2_irq" masked="Masked"/>
+                     <interrupt id="ctimer3_irq" masked="Masked"/>
+                     <interrupt id="ctimer4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm0_irq" masked="Masked"/>
+                     <interrupt id="flexcomm1_irq" masked="Masked"/>
+                     <interrupt id="flexcomm2_irq" masked="Masked"/>
+                     <interrupt id="flexcomm3_irq" masked="Masked"/>
+                     <interrupt id="flexcomm4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm5_irq" masked="Masked"/>
+                     <interrupt id="flexcomm6_irq" masked="Masked"/>
+                     <interrupt id="flexcomm7_irq" masked="Masked"/>
+                     <interrupt id="global_irq0" masked="Masked"/>
+                     <interrupt id="global_irq1" masked="Masked"/>
+                     <interrupt id="lspi_hs_irq" masked="Masked"/>
+                     <interrupt id="mailbox_irq" masked="Masked"/>
+                     <interrupt id="mrt_irq" masked="Masked"/>
+                     <interrupt id="os_event_irq" masked="Masked"/>
+                     <interrupt id="pin_int4" masked="Masked"/>
+                     <interrupt id="pin_int5" masked="Masked"/>
+                     <interrupt id="pin_int6" masked="Masked"/>
+                     <interrupt id="pin_int7" masked="Masked"/>
+                     <interrupt id="pin_irq0" masked="Masked"/>
+                     <interrupt id="pin_irq1" masked="Masked"/>
+                     <interrupt id="pin_irq2" masked="Masked"/>
+                     <interrupt id="pin_irq3" masked="Masked"/>
+                     <interrupt id="plu_irq" masked="Masked"/>
+                     <interrupt id="pq_irq" masked="Masked"/>
+                     <interrupt id="qddkey_irq" masked="Masked"/>
+                     <interrupt id="rtc_irq" masked="Masked"/>
+                     <interrupt id="sct_irq" masked="Masked"/>
+                     <interrupt id="sdio_irq" masked="Masked"/>
+                     <interrupt id="sdma0_irq" masked="Masked"/>
+                     <interrupt id="sdma1_irq" masked="Masked"/>
+                     <interrupt id="sec_hypervisor_call_irq" masked="Masked"/>
+                     <interrupt id="sec_int0" masked="Masked"/>
+                     <interrupt id="sec_int1" masked="Masked"/>
+                     <interrupt id="sec_vio_irq" masked="Masked"/>
+                     <interrupt id="sha_irq" masked="Masked"/>
+                     <interrupt id="sys_irq" masked="Masked"/>
+                     <interrupt id="usb0_irq" masked="Masked"/>
+                     <interrupt id="usb0_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_irq" masked="Masked"/>
+                     <interrupt id="usb1_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_utmi_irq" masked="Masked"/>
+                     <interrupt id="utick_irq" masked="Masked"/>
+                  </masking>
+                  <security>
+                     <interrupt id="acmp_capt_irq" secure="Secure"/>
+                     <interrupt id="adc_irq" secure="Secure"/>
+                     <interrupt id="casper_irq" secure="Secure"/>
+                     <interrupt id="ctimer0_irq" secure="Secure"/>
+                     <interrupt id="ctimer1_irq" secure="Secure"/>
+                     <interrupt id="ctimer2_irq" secure="Secure"/>
+                     <interrupt id="ctimer3_irq" secure="Secure"/>
+                     <interrupt id="ctimer4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm0_irq" secure="Secure"/>
+                     <interrupt id="flexcomm1_irq" secure="Secure"/>
+                     <interrupt id="flexcomm2_irq" secure="Secure"/>
+                     <interrupt id="flexcomm3_irq" secure="Secure"/>
+                     <interrupt id="flexcomm4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm5_irq" secure="Secure"/>
+                     <interrupt id="flexcomm6_irq" secure="Secure"/>
+                     <interrupt id="flexcomm7_irq" secure="Secure"/>
+                     <interrupt id="global_irq0" secure="Secure"/>
+                     <interrupt id="global_irq1" secure="Secure"/>
+                     <interrupt id="lspi_hs_irq" secure="Secure"/>
+                     <interrupt id="mailbox_irq" secure="Secure"/>
+                     <interrupt id="mrt_irq" secure="Secure"/>
+                     <interrupt id="os_event_irq" secure="Secure"/>
+                     <interrupt id="pin_int4" secure="Secure"/>
+                     <interrupt id="pin_int5" secure="Secure"/>
+                     <interrupt id="pin_int6" secure="Secure"/>
+                     <interrupt id="pin_int7" secure="Secure"/>
+                     <interrupt id="pin_irq0" secure="Secure"/>
+                     <interrupt id="pin_irq1" secure="Secure"/>
+                     <interrupt id="pin_irq2" secure="Secure"/>
+                     <interrupt id="pin_irq3" secure="Secure"/>
+                     <interrupt id="plu_irq" secure="Secure"/>
+                     <interrupt id="pq_irq" secure="Secure"/>
+                     <interrupt id="qddkey_irq" secure="Secure"/>
+                     <interrupt id="rtc_irq" secure="Secure"/>
+                     <interrupt id="sct_irq" secure="Secure"/>
+                     <interrupt id="sdio_irq" secure="Secure"/>
+                     <interrupt id="sdma0_irq" secure="Secure"/>
+                     <interrupt id="sdma1_irq" secure="Secure"/>
+                     <interrupt id="sec_hypervisor_call_irq" secure="Secure"/>
+                     <interrupt id="sec_int0" secure="Secure"/>
+                     <interrupt id="sec_int1" secure="Secure"/>
+                     <interrupt id="sec_vio_irq" secure="Secure"/>
+                     <interrupt id="sha_irq" secure="Secure"/>
+                     <interrupt id="sys_irq" secure="Secure"/>
+                     <interrupt id="usb0_irq" secure="Secure"/>
+                     <interrupt id="usb0_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_irq" secure="Secure"/>
+                     <interrupt id="usb1_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_utmi_irq" secure="Secure"/>
+                     <interrupt id="utick_irq" secure="Secure"/>
+                  </security>
+               </interrupts>
+               <ports>
+                  <port id="pio0">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+                  <port id="pio1">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+               </ports>
+            </ahb>
+            <saus>
+               <sau enabled="true" all_non_secure="false" generate_code_for_disabled_regions="false">
+                  <region start="0" size="268435456" security="ns" enabled="true" index="0"/>
+                  <region start="536870912" size="3221225472" security="ns" enabled="true" index="1"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="2"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="3"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="4"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="5"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="6"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="7"/>
+               </sau>
+            </saus>
+            <global_options>
+               <option id="AIRCR_PRIS" value="no"/>
+               <option id="AIRCR_BFHFNMINS" value="no"/>
+               <option id="AIRCR_SYSRESETREQS" value="no"/>
+               <option id="SCR_SLEEPDEEPS" value="no"/>
+               <option id="SHCSR_SECUREFAULTENA" value="no"/>
+               <option id="CPACR_CP0" value="3"/>
+               <option id="CPACR_CP1" value="3"/>
+               <option id="CPACR_CP2" value="0"/>
+               <option id="CPACR_CP3" value="0"/>
+               <option id="CPACR_CP4" value="0"/>
+               <option id="CPACR_CP5" value="0"/>
+               <option id="CPACR_CP6" value="0"/>
+               <option id="CPACR_CP7" value="0"/>
+               <option id="CPACR_CP10" value="3"/>
+               <option id="CPACR_CP11" value="3"/>
+               <option id="NSACR_CP0" value="yes"/>
+               <option id="NSACR_CP1" value="yes"/>
+               <option id="NSACR_CP2" value="no"/>
+               <option id="NSACR_CP3" value="no"/>
+               <option id="NSACR_CP4" value="no"/>
+               <option id="NSACR_CP5" value="no"/>
+               <option id="NSACR_CP6" value="no"/>
+               <option id="NSACR_CP7" value="no"/>
+               <option id="NSACR_CP10" value="yes"/>
+               <option id="NSACR_CP11" value="yes"/>
+               <option id="CPPWR_SU0" value="no"/>
+               <option id="CPPWR_SUS0" value="no"/>
+               <option id="CPPWR_SU1" value="no"/>
+               <option id="CPPWR_SUS1" value="no"/>
+               <option id="CPPWR_SU2" value="no"/>
+               <option id="CPPWR_SUS2" value="no"/>
+               <option id="CPPWR_SU3" value="no"/>
+               <option id="CPPWR_SUS3" value="no"/>
+               <option id="CPPWR_SU4" value="no"/>
+               <option id="CPPWR_SUS4" value="no"/>
+               <option id="CPPWR_SU5" value="no"/>
+               <option id="CPPWR_SUS5" value="no"/>
+               <option id="CPPWR_SU6" value="no"/>
+               <option id="CPPWR_SUS6" value="no"/>
+               <option id="CPPWR_SU7" value="no"/>
+               <option id="CPPWR_SUS7" value="no"/>
+               <option id="CPPWR_SU10" value="no"/>
+               <option id="CPPWR_SUS10" value="no"/>
+               <option id="CPPWR_SU11" value="no"/>
+               <option id="CPPWR_SUS11" value="no"/>
+               <option id="SEC_GPIO_MASK0_LOCK" value="no"/>
+               <option id="SEC_GPIO_MASK1_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK0_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK1_LOCK" value="no"/>
+               <option id="MASTER_SEC_LEVEL_LOCK" value="no"/>
+               <option id="CPU0_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU0_LOCK_NS_MPU" value="no"/>
+               <option id="CPU0_LOCK_S_VTAIRCR" value="no"/>
+               <option id="CPU0_LOCK_S_MPU" value="no"/>
+               <option id="CPU0_LOCK_SAU" value="no"/>
+               <option id="CPU0_LOCK_REG_LOCK" value="no"/>
+               <option id="CPU1_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU1_LOCK_NS_MPU" value="no"/>
+               <option id="CPU1_LOCK_REG_LOCK" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_SECURE_CHECKING" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_S_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_NS_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_VIOLATION_ABORT" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SIMPLE_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SMART_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_IDAU_ALL_NS" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_WRITE_LOCK" value="yes"/>
+            </global_options>
+            <mpus>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="s" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="ns" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+            </mpus>
+         </functional_group>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/LPCXpresso55S28.mex b/hw/bsp/lpc55/boards/lpcxpresso55s28/LPCXpresso55S28.mex
new file mode 100644
index 000000000..cc59745f9
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/LPCXpresso55S28.mex
@@ -0,0 +1,856 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="LPCXpresso55S28" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="485a5299-e2fe-41ab-bc43-80d8d2a4ae02" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>LPC55S28</processor>
+      <package>LPC55S28JBD100</package>
+      <board>LPCXpresso55S28</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="cm33_core0">
+         <core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <custom_copyright>
+         <text>/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+</text>
+         <enabled>true</enabled>
+      </custom_copyright>
+      <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>25.09.10</processor_version>
+            <external_user_signals>
+               <properties/>
+            </external_user_signals>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI_DATA" pin_num="92" pin_signal="PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO_WS" pin_num="94" pin_signal="PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSWD_DEBUGPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SWD" signal="SWCLK" pin_num="13" pin_signal="PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullDown"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWDIO" pin_num="12" pin_signal="PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWO" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="DEBUG_SWD_SWO"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSBPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USBFSH" description="Peripheral USBFSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="USBHSH" description="Peripheral USBHSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USBFSH" signal="USB_DP" pin_num="97" pin_signal="USB0_DP"/>
+                  <pin peripheral="USBFSH" signal="USB_DM" pin_num="98" pin_signal="USB0_DM"/>
+                  <pin peripheral="USBFSH" signal="USB_VBUS" pin_num="78" pin_signal="PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_DM" pin_num="35" pin_signal="USB1_DM"/>
+                  <pin peripheral="USBHSH" signal="USB_DP" pin_num="34" pin_signal="USB1_DP"/>
+                  <pin peripheral="USBHSH" signal="USB_VBUS" pin_num="36" pin_signal="USB1_VBUS"/>
+                  <pin peripheral="USBHSH" signal="USB_PORTPWRN" pin_num="80" pin_signal="PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_PORTPWRN" pin_num="67" pin_signal="PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_OVERCURRENTN" pin_num="66" pin_signal="PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_OVERCURRENTN" pin_num="65" pin_signal="PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO1, 4" pin_num="1" pin_signal="PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 6" pin_num="5" pin_signal="PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 7" pin_num="9" pin_signal="PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 5" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 18" pin_num="64" pin_signal="PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 9" pin_num="10" pin_signal="PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="RESET" pin_num="32" pin_signal="RESETN"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitPins_Core0">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core0">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitI2SPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM7" description="Peripheral FLEXCOMM7 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="MCLK" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="SCK" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="RXD_SDA_MOSI_DATA" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="TXD_SCL_MISO_WS" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="SCK" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="FC6_I2S_CLK"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitACCELPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitACCELPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 19" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="18.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>25.09.10</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL1_Mode" value="Normal" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFROHF96M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="ANACTRL.fro_hf.outFreq" value="96 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG" value="Enable" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELA.sel" value="ANACTRL.fro_hf_clk" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL100M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="100 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL0_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="100" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="4" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="4" locked="true"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FXCOM0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="SYSTICK0_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB1_PHY_clock.outFreq" value="16 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="PLL1_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_PLL_USB_OUT" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.FCCLKSEL0.sel" value="SYSCON.PLL0DIV" locked="false"/>
+                  <setting id="SYSCON.FRGCTRL0_DIV.scale" value="400" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL1_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0DIV.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="150" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="8" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="2" locked="true"/>
+                  <setting id="SYSCON.PLL1CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL1M_MULT.scale" value="18" locked="false"/>
+                  <setting id="SYSCON.PLL1_PDEC.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.SYSTICKCLKSEL0.sel" value="SYSCON.SYSTICKCLKDIV0" locked="false"/>
+                  <setting id="SYSCON.USB0CLKDIV.scale" value="3" locked="false"/>
+                  <setting id="SYSCON.USB0CLKSEL.sel" value="SYSCON.MAINCLKSELB" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>N/A</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="FLEXCOMM USART Driver is not found in the toolchain/IDE project. The project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="An unsupported version of the FLEXCOMM USART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. The project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.2.0</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="Tool" resourceId="Clocks" description="The Clocks tool is required by the Peripherals tool, but it is disabled." problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data>true</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>25.09.10</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="FXCOM0_clock" description="FXCOM0 clock is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_rxd" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_txd" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="DEBUG_UART" uuid="30367b6e-4b43-4345-bc10-e4052723fa66" type="flexcomm_usart" type_id="flexcomm_usart_2.2.0" mode="polling" peripheral="FLEXCOMM0" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="usartConfig_t">
+                        <struct name="usartConfig">
+                           <setting name="clockSource" value="FXCOMFunctionClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="syncMode" value="kUSART_SyncModeDisabled"/>
+                           <setting name="parityMode" value="kUSART_ParityDisabled"/>
+                           <setting name="stopBitCount" value="kUSART_OneStopBit"/>
+                           <setting name="bitCountPerChar" value="kUSART_8BitsPerChar"/>
+                           <setting name="loopback" value="false"/>
+                           <setting name="txWatermark" value="kUSART_TxFifo0"/>
+                           <setting name="rxWatermark" value="kUSART_RxFifo1"/>
+                           <setting name="enableRx" value="true"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="clockPolarity" value="kUSART_RxSampleOnFallingEdge"/>
+                           <setting name="enableContinuousSCLK" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="ACCEL" uuid="796441cb-6cbf-48af-8003-54caaeb9a132" type="flexcomm_i2c" type_id="flexcomm_i2c_2.0.1" mode="I2C_Polling" peripheral="FLEXCOMM4" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
+                        <setting name="i2c_mode" value="kI2C_Master"/>
+                        <setting name="clockSource" value="FXCOMFunctionClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="i2c_master_config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="baudRate_Bps" value="100000"/>
+                           <setting name="enableTimeout" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="SW" uuid="723cdb07-2d95-4daf-94b4-1dfaf0ce6c04" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="LEDS" uuid="7ec70f15-5deb-44fa-b8cf-2d12230a37ac" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="NVIC" uuid="d00e8bd3-19f3-445c-9444-103d6461e0d1" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="4e239a4c-f368-4554-b66e-d1af6e8b1f5d" type_id="system_54b53072540eeeb8f8e9343e71f28176">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+                  <setting name="global_init" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="7bbbd3b5-f7c2-4cb2-8b95-c037fdaf8e02" type_id="msg_6e2baaf3b97dbeef01c0043275f9a0e7">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_can" uuid="1560ea56-1bfb-4123-a192-daeeed8f2a1d" type_id="generic_can">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="4305ffdd-d7f2-418a-b81b-8a042e7e4c75" type_id="uart_cmsis_common">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="fe22d2c9-7984-4e79-a7b1-8d26fad750be" type_id="generic_uart">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_enet" uuid="f5a27f2d-a41b-4143-ad53-b9ee09903619" type_id="generic_enet">
+               <config_set_global name="global_enet"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="03fd1bc8-0fd6-4b47-a53c-1c40e2aa781e" type_id="gpio_adapter_common">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="10.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>N/A</processor_version>
+         </tee_profile>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
index d935b70e6..b3d6ec722 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake
@@ -1,10 +1,17 @@
 set(MCU_VARIANT LPC55S28)
 set(MCU_CORE LPC55S28)
+set(MCU_DRIVER_VARIANT LPC55S69)
 
 set(JLINK_DEVICE LPC55S28)
+set(JLINK_OPTION "-USB 000727031389")
+
 set(PYOCD_TARGET LPC55S28)
 set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
 
+# device fullspeed, host highspeed
+set(RHPORT_DEVICE 0)
+set(RHPORT_HOST 1)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S28JBD100
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
index 025172d0f..c8d3a2b8f 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.h
@@ -36,33 +36,22 @@
  extern "C" {
 #endif
 
-// LED
-#define LED_PORT              1
-#define LED_PIN               6
+// LED: use red LED from generated pin_mux
+#define LED_PORT              BOARD_INITLEDSPINS_LED_RED_PORT
+#define LED_PIN               BOARD_INITLEDSPINS_LED_RED_PIN
 #define LED_STATE_ON          0
 
-// WAKE button
-#define BUTTON_PORT           1
-#define BUTTON_PIN            18
+// WAKE button: use S2 from generated pin_mux
+#define BUTTON_PORT           BOARD_INITBUTTONSPINS_S2_PORT
+#define BUTTON_PIN            BOARD_INITBUTTONSPINS_S2_PIN
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
 #define UART_DEV              USART0
-#define UART_RX_PINMUX        0, 29, IOCON_PIO_DIG_FUNC1_EN
-#define UART_TX_PINMUX        0, 30, IOCON_PIO_DIG_FUNC1_EN
 
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
 
-// Power switch
-#define USBFS_POWER_PORT      1
-#define USBFS_POWER_PIN       12
-#define USBFS_POWER_STATE_ON  0
-
-#define USBHS_POWER_PORT      1
-#define USBHS_POWER_PIN       29
-#define USBHS_POWER_STATE_ON  0
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
index ec0828e41..db2e11fd7 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board.mk
@@ -1,9 +1,20 @@
 MCU_VARIANT = LPC55S28
 MCU_CORE = LPC55S28
-PORT ?= 1
+MCU_DRIVER_VARIANT = LPC55S69
+
+# device fullspeed, host highspeed
+RHPORT_DEVICE ?= 0
+RHPORT_HOST ?= 1
 
 CFLAGS += -DCPU_LPC55S28JBD100
 
+SRC_C += \
+	$(TOP)/$(BOARD_PATH)/board/clock_config.c \
+	$(TOP)/$(BOARD_PATH)/board/pin_mux.c \
+	$(TOP)/$(BOARD_PATH)/board/peripherals.c
+
+INC += $(TOP)/$(BOARD_PATH)/board
+
 JLINK_DEVICE = LPC55S28
 PYOCD_TARGET = LPC55S28
 
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.c b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.c
new file mode 100644
index 000000000..c1e8e0575
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.c
@@ -0,0 +1,335 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to set up clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: LPC55S28
+package_id: LPC55S28JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S28
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_power.h"
+#include "fsl_clock.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockPLL150M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: System_clock.outFreq, value: 12 MHz}
+settings:
+- {id: PLL1_Mode, value: Normal}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF96M
+outputs:
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
+- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
+sources:
+- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF96M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
+
+    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL100M
+outputs:
+- {id: System_clock.outFreq, value: 100 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL100M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+
+    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 100000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL150M
+called_from_default_init: true
+outputs:
+- {id: FXCOM0_clock.outFreq, value: 48 MHz}
+- {id: SYSTICK0_clock.outFreq, value: 144 MHz}
+- {id: System_clock.outFreq, value: 144 MHz}
+- {id: USB0_clock.outFreq, value: 48 MHz}
+- {id: USB1_PHY_clock.outFreq, value: 16 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: PLL1_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_PLL_USB_OUT, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.FCCLKSEL0.sel, value: SYSCON.PLL0DIV}
+- {id: SYSCON.FRGCTRL0_DIV.scale, value: '400'}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0DIV.scale, value: '2'}
+- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
+- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL1M_MULT.scale, value: '18'}
+- {id: SYSCON.PLL1_PDEC.scale, value: '2'}
+- {id: SYSCON.SYSTICKCLKSEL0.sel, value: SYSCON.SYSTICKCLKDIV0}
+- {id: SYSCON.USB0CLKDIV.scale, value: '3'}
+- {id: SYSCON.USB0CLKSEL.sel, value: SYSCON.MAINCLKSELB}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL150M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_PLL_USB_OUT_MASK;       /* Enable clk_in to HS USB  */
+
+    POWER_SetVoltageForFreq(144000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(144000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 150000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up PLL1 */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
+    const pll_setup_t pll1Setup = {
+        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(11U) | SYSCON_PLL1CTRL_SELP(5U),
+        .pllndec = SYSCON_PLL1NDEC_NDIV(1U),
+        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
+        .pllmdec = SYSCON_PLL1MDEC_MDIV(18U),
+        .pllRate = 144000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivSystickClk0, 0U, true);               /*!< Reset SYSTICKCLKDIV0 divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivSystickClk0, 1U, false);              /*!< Set SYSTICKCLKDIV0 divider to value 1 */
+    #if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 144U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #else
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 37120U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #endif
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 0U, true);               /*!< Reset USB0CLKDIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 3U, false);         /*!< Set USB0CLKDIV divider to value 3 */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);               /*!< Reset PLL0DIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 2U, false);         /*!< Set PLL0DIV divider to value 2 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
+    CLOCK_AttachClk(kMAIN_CLK_to_USB0_CLK);                 /*!< Switch USB0_CLK to MAIN_CLK */
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM0);                 /*!< Switch FLEXCOMM0 to PLL0_DIV */
+    CLOCK_AttachClk(kSYSTICK_DIV0_to_SYSTICK0);                 /*!< Switch SYSTICK0 to SYSTICK_DIV0 */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
+#endif
+}
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.h
new file mode 100644
index 000000000..fdd472793
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/clock_config.h
@@ -0,0 +1,286 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK      0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK              0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK          0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK        0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK          0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK         0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK         0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK         0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK         0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK         0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK          0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK          0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK          0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK          0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK          0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK          0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK          0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK          0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK          0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK            0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK        0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK    0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK        0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK 0UL           /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK          0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK         0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK             0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK            0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK        0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK          96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK           0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK            0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK        0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK           0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK             0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK           0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK           100000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK             0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK         0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL100M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         144000000U  /*!< Core clock frequency: 144000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK           48000000UL     /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK         144000000UL    /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK           144000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK             48000000UL     /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK         16000000UL     /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL150M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.c b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.c
new file mode 100644
index 000000000..f3b986b6c
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.c
@@ -0,0 +1,157 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v15.0
+processor: LPC55S28
+package_id: LPC55S28JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S28
+functionalGroups:
+- name: BOARD_InitPeripherals
+  UUID: 61d0725d-b300-49cb-9c66-b5edfbf8ffc1
+  called_from_default_init: true
+  selectedCore: cm33_core0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system_54b53072540eeeb8f8e9343e71f28176'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+  - global_init: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'uart_cmsis_common'
+- type_id: 'uart_cmsis_common'
+- global_USART_CMSIS_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'gpio_adapter_common'
+- type_id: 'gpio_adapter_common'
+- global_gpio_adapter_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * BOARD_InitPeripherals functional group
+ **********************************************************************************************************************/
+/***********************************************************************************************************************
+ * DEBUG_UART initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'DEBUG_UART'
+- type: 'flexcomm_usart'
+- mode: 'polling'
+- custom_name_enabled: 'true'
+- type_id: 'flexcomm_usart_2.2.0'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'FLEXCOMM0'
+- config_sets:
+  - usartConfig_t:
+    - usartConfig:
+      - clockSource: 'FXCOMFunctionClock'
+      - clockSourceFreq: 'ClocksTool_DefaultInit'
+      - baudRate_Bps: '115200'
+      - syncMode: 'kUSART_SyncModeDisabled'
+      - parityMode: 'kUSART_ParityDisabled'
+      - stopBitCount: 'kUSART_OneStopBit'
+      - bitCountPerChar: 'kUSART_8BitsPerChar'
+      - loopback: 'false'
+      - txWatermark: 'kUSART_TxFifo0'
+      - rxWatermark: 'kUSART_RxFifo1'
+      - enableRx: 'true'
+      - enableTx: 'true'
+      - clockPolarity: 'kUSART_RxSampleOnFallingEdge'
+      - enableContinuousSCLK: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const usart_config_t DEBUG_UART_config = {
+  .baudRate_Bps = 115200UL,
+  .syncMode = kUSART_SyncModeDisabled,
+  .parityMode = kUSART_ParityDisabled,
+  .stopBitCount = kUSART_OneStopBit,
+  .bitCountPerChar = kUSART_8BitsPerChar,
+  .loopback = false,
+  .txWatermark = kUSART_TxFifo0,
+  .rxWatermark = kUSART_RxFifo1,
+  .enableRx = true,
+  .enableTx = true,
+  .enableMode32k = false,
+  .clockPolarity = kUSART_RxSampleOnFallingEdge,
+  .enableContinuousSCLK = false
+};
+
+static void DEBUG_UART_init(void) {
+  /* Reset FLEXCOMM device */
+  RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
+  USART_Init(DEBUG_UART_PERIPHERAL, &DEBUG_UART_config, DEBUG_UART_CLOCK_SOURCE);
+}
+
+/***********************************************************************************************************************
+ * NVIC initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'NVIC'
+- type: 'nvic'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'nvic'
+- functional_group: 'BOARD_InitPeripherals'
+- peripheral: 'NVIC'
+- config_sets:
+  - nvic:
+    - interrupt_table: []
+    - interrupts: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void NVIC_init(void) {
+} */
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals(void)
+{
+  /* Initialize components */
+  DEBUG_UART_init();
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+  BOARD_InitPeripherals();
+}
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.h
new file mode 100644
index 000000000..3f498f4af
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/peripherals.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "fsl_common.h"
+#include "fsl_reset.h"
+#include "fsl_usart.h"
+#include "fsl_clock.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+/* Definitions for BOARD_InitPeripherals functional group */
+/* Definition of peripheral ID */
+#define DEBUG_UART_PERIPHERAL ((USART_Type *)FLEXCOMM0)
+/* Definition of the clock source frequency */
+#define DEBUG_UART_CLOCK_SOURCE 48000000UL
+
+/***********************************************************************************************************************
+ * Global variables
+ **********************************************************************************************************************/
+extern const usart_config_t DEBUG_UART_config;
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+
+void BOARD_InitPeripherals(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _PERIPHERALS_H_ */
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.c b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.c
new file mode 100644
index 000000000..924961d42
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.c
@@ -0,0 +1,795 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: LPC55S28
+package_id: LPC55S28JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S28
+external_user_signals: {}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_iocon.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitUSBPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+    BOARD_InitPins_Core0();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
+
+    const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
+                                    IOCON_PIO_FUNC6 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI |
+                                    /* Analog switch is open (disabled) */
+                                    IOCON_PIO_ASW_DI);
+    /* PORT0 PIN10 (coords: 21) is configured as SWO */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
+
+    const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                       IOCON_PIO_FUNC6 |
+                                       /* Selects pull-down function */
+                                       IOCON_PIO_MODE_PULLDOWN |
+                                       /* Standard mode, output slew rate control is enabled */
+                                       IOCON_PIO_SLEW_STANDARD |
+                                       /* Input function is not inverted */
+                                       IOCON_PIO_INV_DI |
+                                       /* Enables digital function */
+                                       IOCON_PIO_DIGITAL_EN |
+                                       /* Open drain is disabled */
+                                       IOCON_PIO_OPENDRAIN_DI |
+                                       /* Analog switch is closed (enabled) */
+                                       IOCON_PIO_ASW_EN);
+    /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+
+    const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                      IOCON_PIO_FUNC6 |
+                                      /* Selects pull-up function */
+                                      IOCON_PIO_MODE_PULLUP |
+                                      /* Standard mode, output slew rate control is enabled */
+                                      IOCON_PIO_SLEW_STANDARD |
+                                      /* Input function is not inverted */
+                                      IOCON_PIO_INV_DI |
+                                      /* Enables digital function */
+                                      IOCON_PIO_DIGITAL_EN |
+                                      /* Open drain is disabled */
+                                      IOCON_PIO_OPENDRAIN_DI |
+                                      /* Analog switch is closed (enabled) */
+                                      IOCON_PIO_ASW_EN);
+    /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitUSBPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
+  - {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
+  - {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
+  - {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
+  - {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
+  - {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp}
+  - {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp}
+  - {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
+    mode: pullUp}
+  - {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitUSBPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitUSBPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
+                                IOCON_PIO_FUNC7 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
+
+    IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT028 (pin 66) is configured as USB0_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO0_28_FUNC_ALT7)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO0_28_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT112 (pin 67) is configured as USB0_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_12_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_12_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_12_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][29] = ((IOCON->PIO[1][29] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT129 (pin 80) is configured as USB1_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_29_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_29_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_29_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][30] = ((IOCON->PIO[1][30] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT130 (pin 65) is configured as USB1_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO1_30_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_30_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_30_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '1', peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '5', peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '9', peripheral: GPIO, signal: 'PIO1, 7', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitLEDsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_4 (pin 1)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_6 (pin 5)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_7 (pin 9)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
+
+    const uint32_t LED_BLUE = (/* Pin is configured as PIO1_4 */
+                               IOCON_PIO_FUNC0 |
+                               /* Selects pull-up function */
+                               IOCON_PIO_MODE_PULLUP |
+                               /* Standard mode, output slew rate control is enabled */
+                               IOCON_PIO_SLEW_STANDARD |
+                               /* Input function is not inverted */
+                               IOCON_PIO_INV_DI |
+                               /* Enables digital function */
+                               IOCON_PIO_DIGITAL_EN |
+                               /* Open drain is disabled */
+                               IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN4 (coords: 1) is configured as PIO1_4 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, LED_BLUE);
+
+    const uint32_t LED_RED = (/* Pin is configured as PIO1_6 */
+                              IOCON_PIO_FUNC0 |
+                              /* Selects pull-up function */
+                              IOCON_PIO_MODE_PULLUP |
+                              /* Standard mode, output slew rate control is enabled */
+                              IOCON_PIO_SLEW_STANDARD |
+                              /* Input function is not inverted */
+                              IOCON_PIO_INV_DI |
+                              /* Enables digital function */
+                              IOCON_PIO_DIGITAL_EN |
+                              /* Open drain is disabled */
+                              IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN6 (coords: 5) is configured as PIO1_6 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, LED_RED);
+
+    const uint32_t LED_GREEN = (/* Pin is configured as PIO1_7 */
+                                IOCON_PIO_FUNC0 |
+                                /* Selects pull-up function */
+                                IOCON_PIO_MODE_PULLUP |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN7 (coords: 9) is configured as PIO1_7 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, LED_GREEN);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: INPUT,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '64', peripheral: GPIO, signal: 'PIO1, 18', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, direction: INPUT, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, direction: INPUT, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t S1_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO0_5 (pin 88)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
+
+    gpio_pin_config_t S3_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_9 (pin 10)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S3_GPIO, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, &S3_config);
+
+    gpio_pin_config_t S2_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_18 (pin 64)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
+
+    const uint32_t S1 = (/* Pin is configured as PIO0_5 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN5 (coords: 88) is configured as PIO0_5 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, S1);
+
+    const uint32_t S2 = (/* Pin is configured as PIO1_18 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN18 (coords: 64) is configured as PIO1_18 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, S2);
+
+    const uint32_t S3 = (/* Pin is configured as PIO1_9 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI |
+                         /* Analog switch is closed (enabled) */
+                         IOCON_PIO_ASW_EN);
+    /* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins_Core0:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins_Core0
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitPins_Core0(void)
+{
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitI2SPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
+    identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitI2SPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitI2SPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
+                                  IOCON_PIO_FUNC1 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI |
+                                  /* Analog switch is closed (enabled) */
+                                  IOCON_PIO_ASW_EN);
+    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
+
+    const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
+
+    const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
+
+    const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
+                                  IOCON_PIO_FUNC7 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
+
+    const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
+
+    const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+
+    const uint32_t MCLK = (/* Pin is configured as MCLK */
+                           IOCON_PIO_FUNC1 |
+                           /* No addition pin function */
+                           IOCON_PIO_MODE_INACT |
+                           /* Standard mode, output slew rate control is enabled */
+                           IOCON_PIO_SLEW_STANDARD |
+                           /* Input function is not inverted */
+                           IOCON_PIO_INV_DI |
+                           /* Enables digital function */
+                           IOCON_PIO_DIGITAL_EN |
+                           /* Open drain is disabled */
+                           IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitACCELPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitACCELPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitACCELPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t ACCL_INTR_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_19 (pin 58)  */
+    GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
+
+    const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
+                                IOCON_PIO_FUNC0 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI |
+                                /* Analog switch is open (disabled) */
+                                IOCON_PIO_ASW_DI);
+    /* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.h b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.h
new file mode 100644
index 000000000..2a99795ef
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s28/board/pin_mux.h
@@ -0,0 +1,433 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
+/* @} */
+
+/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC6 0x06u         /*!<@brief Selects pin function 6 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
+/* @} */
+
+/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
+/* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Enables digital function */
+#define IOCON_PIO_DIGITAL_EN 0x0100u
+/*!
+ * @brief Selects pin function 7 */
+#define IOCON_PIO_FUNC7 0x07u
+/*!
+ * @brief Input function is not inverted */
+#define IOCON_PIO_INV_DI 0x00u
+/*!
+ * @brief No addition pin function */
+#define IOCON_PIO_MODE_INACT 0x00u
+/*!
+ * @brief Open drain is disabled */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u
+/*!
+ * @brief Standard mode, output slew rate control is enabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_28_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 7. */
+#define PIO0_28_FUNC_ALT7 0x07u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO0_28_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_12_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_12_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_12_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_29_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_29_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_29_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_30_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_30_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_30_MODE_PULL_UP 0x02u
+
+/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
+  @{ */
+#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U                   /*!<@brief PORT pin number */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_4 (number 1), R78/P18[5]/LEDR/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 4U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 4U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*! @name PIO1_6 (number 5), R80/P18[9]/LEDB/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_RED_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 6U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 6U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*! @name PIO1_7 (number 9), R79/P18[7]/LEDG/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 7U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 7U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S1_PORT 0U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_PIN 5U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 5U)      /*!<@brief PORT pin mask */
+                                                          /* @} */
+
+/*! @name PIO1_18 (number 64), S2/P18[16]/P24[2]/WAKE/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S2_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S2_PIN 18U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 18U)      /*!<@brief PORT pin mask */
+                                                           /* @} */
+
+/*! @name PIO1_9 (number 10), S3/P18[1]/PIO1_9_GPIO_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S3_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S3_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S3_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S3_PIN 9U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S3_PIN_MASK (1U << 9U)      /*!<@brief PORT pin mask */
+                                                          /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins_Core0(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
+  @{ */
+#define BOARD_INITI2SPINS_MCLK_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_MCLK_PIN 31U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U)      /*!<@brief PORT pin mask */
+                                                         /* @} */
+
+/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
+#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/LPCXpresso55S69.mex b/hw/bsp/lpc55/boards/lpcxpresso55s69/LPCXpresso55S69.mex
new file mode 100644
index 000000000..9e31688b7
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/LPCXpresso55S69.mex
@@ -0,0 +1,1329 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="LPCXpresso55S69" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="acf73d26-2bf9-4855-b3be-26068672d98a" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>LPC55S69</processor>
+      <package>LPC55S69JBD100</package>
+      <board>LPCXpresso55S69</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="cm33_core0">
+         <core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
+         <core name="Cortex-M33 (Core #1)" id="cm33_core1" description=""/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <custom_copyright>
+         <text>/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+</text>
+         <enabled>true</enabled>
+      </custom_copyright>
+      <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>25.09.10</processor_version>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI_DATA" pin_num="92" pin_signal="PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO_WS" pin_num="94" pin_signal="PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSWD_DEBUGPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SWD" signal="SWCLK" pin_num="13" pin_signal="PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullDown"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWDIO" pin_num="12" pin_signal="PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWO" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="DEBUG_SWD_SWO"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSBPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USBFSH" description="Peripheral USBFSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="USBHSH" description="Peripheral USBHSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USBFSH" signal="USB_DP" pin_num="97" pin_signal="USB0_DP"/>
+                  <pin peripheral="USBFSH" signal="USB_DM" pin_num="98" pin_signal="USB0_DM"/>
+                  <pin peripheral="USBFSH" signal="USB_VBUS" pin_num="78" pin_signal="PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_DM" pin_num="35" pin_signal="USB1_DM"/>
+                  <pin peripheral="USBHSH" signal="USB_DP" pin_num="34" pin_signal="USB1_DP"/>
+                  <pin peripheral="USBHSH" signal="USB_VBUS" pin_num="36" pin_signal="USB1_VBUS"/>
+                  <pin peripheral="USBHSH" signal="USB_OVERCURRENTN" pin_num="65" pin_signal="PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_OVERCURRENTN" pin_num="66" pin_signal="PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_PORTPWRN" pin_num="67" pin_signal="PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_PORTPWRN" pin_num="80" pin_signal="PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO1, 4" pin_num="1" pin_signal="PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 6" pin_num="5" pin_signal="PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 7" pin_num="9" pin_signal="PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 5" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 18" pin_num="64" pin_signal="PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 9" pin_num="10" pin_signal="PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="RESET" pin_num="32" pin_signal="RESETN"/>
+               </pins>
+            </function>
+            <function name="BOARD_InitPins_Core0">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core0">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitPins_Core1">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core1</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core1">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitI2SPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM7" description="Peripheral FLEXCOMM7 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="MCLK" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="SCK" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="RXD_SDA_MOSI_DATA" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="TXD_SCL_MISO_WS" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="SCK" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="FC6_I2S_CLK"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitACCELPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitACCELPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 19" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="18.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>25.09.10</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFROHF96M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="ANACTRL.fro_hf.outFreq" value="96 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG" value="Enable" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELA.sel" value="ANACTRL.fro_hf_clk" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL100M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="100 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL0_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="100" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="4" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="4" locked="true"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FXCOM0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB1_PHY_clock.outFreq" value="16 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="PLL1_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_PLL_USB_OUT" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.FCCLKSEL0.sel" value="SYSCON.PLL0DIV" locked="false"/>
+                  <setting id="SYSCON.FRGCTRL0_DIV.scale" value="400" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL1_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0DIV.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="150" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="8" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="2" locked="true"/>
+                  <setting id="SYSCON.PLL1CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL1M_MULT.scale" value="18" locked="false"/>
+                  <setting id="SYSCON.PLL1_PDEC.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.USB0CLKDIV.scale" value="3" locked="false"/>
+                  <setting id="SYSCON.USB0CLKSEL.sel" value="SYSCON.MAINCLKSELB" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="FLEXCOMM USART Driver is not found in the toolchain/IDE project. The project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="An unsupported version of the FLEXCOMM USART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. The project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.2.0</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="Tool" resourceId="Clocks" description="The Clocks tool is required by the Peripherals tool, but it is disabled." problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data>true</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>25.09.10</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals_cm33_core0" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="FXCOM0_clock" description="FXCOM0 clock is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_rxd" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_txd" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="ACCEL" uuid="b999c56a-0d01-4089-9311-9224db5272f4" type="flexcomm_i2c" type_id="flexcomm_i2c_2.3.0" mode="I2C_Polling" peripheral="FLEXCOMM4" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
+                        <setting name="i2c_mode" value="kI2C_Master"/>
+                        <setting name="clockSource" value="FXCOMFunctionClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="i2c_master_config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="baudRate_Bps" value="100000"/>
+                           <setting name="enableTimeout" value="false"/>
+                           <setting name="timeout_Ms" value="35"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="9fb0504c-6159-43e2-98bb-51d75f06133a" type="flexcomm_usart" type_id="flexcomm_usart_2.2.0" mode="polling" peripheral="FLEXCOMM0" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="usartConfig_t">
+                        <struct name="usartConfig">
+                           <setting name="clockSource" value="FXCOMFunctionClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="syncMode" value="kUSART_SyncModeDisabled"/>
+                           <setting name="parityMode" value="kUSART_ParityDisabled"/>
+                           <setting name="stopBitCount" value="kUSART_OneStopBit"/>
+                           <setting name="bitCountPerChar" value="kUSART_8BitsPerChar"/>
+                           <setting name="loopback" value="false"/>
+                           <setting name="txWatermark" value="kUSART_TxFifo0"/>
+                           <setting name="rxWatermark" value="kUSART_RxFifo1"/>
+                           <setting name="enableRx" value="true"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="clockPolarity" value="kUSART_RxSampleOnFallingEdge"/>
+                           <setting name="enableContinuousSCLK" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LEDS" uuid="f5ad3a56-404b-44cb-8abc-7b25b5551d33" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="SW" uuid="d57ddfca-dc72-486c-a145-c7a2ab1e1a66" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="NVIC" uuid="56761ad9-9b77-4074-917d-de0fde10cd48" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+            <functional_group name="BOARD_InitPeripherals_cm33_core1" uuid="e2041cd4-ebb6-45a5-807f-e0c2dc047d48" called_from_default_init="false" id_prefix="" core="cm33_core1">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="NVIC_2" uuid="db546092-4c45-40af-938a-8cc58edd1c4f" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="905d2747-654a-47d9-91f9-81a5c6f9c407" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+                  <setting name="global_init" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="64cbcd7c-424d-4baf-9681-a60878969fb6" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_can" uuid="b9b018dd-ef4e-41f6-b456-f91b855cb391" type_id="generic_can">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="bafa6375-9184-4272-8102-06ea086041d7" type_id="uart_cmsis_common">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="1710dc7f-381f-4b37-8f78-0fd2f923b3ac" type_id="generic_uart">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_enet" uuid="c7fc4395-b141-4b13-a326-4145e765b2b7" type_id="generic_enet">
+               <config_set_global name="global_enet"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="b6ee89c2-4c58-4181-94dc-af13d8ae8ea5" type_id="gpio_adapter_common">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="10.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+            <tool_options>
+               <option id="_output_type_" value="c_code"/>
+               <option id="_legacy_source_names_" value="yes"/>
+            </tool_options>
+         </tee_profile>
+         <functional_group name="BOARD_InitTrustZone" called_from_default_init="true" id_prefix="" prefix_user_defined="true">
+            <description></description>
+            <options/>
+            <ahb>
+               <relative_region start="0" size="655360" security="s_priv" memory="PROGRAM_FLASH"/>
+               <relative_region start="0" size="131072" security="s_priv" memory="BootROM"/>
+               <relative_region start="0" size="32768" security="s_priv" memory="SRAMX"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM0"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM1"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM2"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM3"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="SRAM4"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="AHBperipherals_port10_ahb_secure_ctrl_area"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="USB_RAM"/>
+               <masters>
+                  <master id="HASH" security="ns_user"/>
+                  <master id="MCM33C" security="ns_user"/>
+                  <master id="MCM33S" security="ns_user"/>
+                  <master id="PQ" security="ns_user"/>
+                  <master id="SDIO" security="ns_user"/>
+                  <master id="SDMA0" security="ns_user"/>
+                  <master id="SDMA1" security="ns_user"/>
+                  <master id="USBFSD" security="ns_user"/>
+                  <master id="USBFSH" security="ns_user"/>
+               </masters>
+               <peripherals>
+                  <peripheral id="ADC0" security="s_priv"/>
+                  <peripheral id="AHB_SECURE_CTRL" security="s_priv"/>
+                  <peripheral id="ANACTRL" security="s_priv"/>
+                  <peripheral id="CASPER" security="s_priv"/>
+                  <peripheral id="CRC_ENGINE" security="s_priv"/>
+                  <peripheral id="CTIMER0" security="s_priv"/>
+                  <peripheral id="CTIMER1" security="s_priv"/>
+                  <peripheral id="CTIMER2" security="s_priv"/>
+                  <peripheral id="CTIMER3" security="s_priv"/>
+                  <peripheral id="CTIMER4" security="s_priv"/>
+                  <peripheral id="DBGMAILBOX" security="s_priv"/>
+                  <peripheral id="DMA0" security="s_priv"/>
+                  <peripheral id="DMA1" security="s_priv"/>
+                  <peripheral id="FLASH" security="s_priv"/>
+                  <peripheral id="FLEXCOMM0" security="s_priv"/>
+                  <peripheral id="FLEXCOMM1" security="s_priv"/>
+                  <peripheral id="FLEXCOMM2" security="s_priv"/>
+                  <peripheral id="FLEXCOMM3" security="s_priv"/>
+                  <peripheral id="FLEXCOMM4" security="s_priv"/>
+                  <peripheral id="FLEXCOMM5" security="s_priv"/>
+                  <peripheral id="FLEXCOMM6" security="s_priv"/>
+                  <peripheral id="FLEXCOMM7" security="s_priv"/>
+                  <peripheral id="GINT0" security="s_priv"/>
+                  <peripheral id="GINT1" security="s_priv"/>
+                  <peripheral id="GPIO" security="s_priv"/>
+                  <peripheral id="HASHCRYPT" security="s_priv"/>
+                  <peripheral id="INPUTMUX" security="s_priv"/>
+                  <peripheral id="IOCON" security="s_priv"/>
+                  <peripheral id="MAILBOX" security="s_priv"/>
+                  <peripheral id="MRT0" security="s_priv"/>
+                  <peripheral id="OSTIMER" security="s_priv"/>
+                  <peripheral id="PINT" security="s_priv"/>
+                  <peripheral id="PLU" security="s_priv"/>
+                  <peripheral id="PMC" security="s_priv"/>
+                  <peripheral id="POWERQUAD" security="s_priv"/>
+                  <peripheral id="PRINCE" security="s_priv"/>
+                  <peripheral id="PUF" security="s_priv"/>
+                  <peripheral id="RNG" security="s_priv"/>
+                  <peripheral id="RTC" security="s_priv"/>
+                  <peripheral id="SCT0" security="s_priv"/>
+                  <peripheral id="SDIF" security="s_priv"/>
+                  <peripheral id="SECGPIO" security="s_priv"/>
+                  <peripheral id="SECPINT" security="s_priv"/>
+                  <peripheral id="SPI8" security="s_priv"/>
+                  <peripheral id="SYSCON" security="s_priv"/>
+                  <peripheral id="SYSCTL" security="s_priv"/>
+                  <peripheral id="USB0" security="s_priv"/>
+                  <peripheral id="USBFSH" security="s_priv"/>
+                  <peripheral id="USBHSD" security="s_priv"/>
+                  <peripheral id="USBHSH" security="s_priv"/>
+                  <peripheral id="USBPHY" security="s_priv"/>
+                  <peripheral id="UTICK0" security="s_priv"/>
+                  <peripheral id="WWDT" security="s_priv"/>
+               </peripherals>
+               <interrupts>
+                  <masking>
+                     <interrupt id="acmp_capt_irq" masked="Masked"/>
+                     <interrupt id="adc_irq" masked="Masked"/>
+                     <interrupt id="casper_irq" masked="Masked"/>
+                     <interrupt id="ctimer0_irq" masked="Masked"/>
+                     <interrupt id="ctimer1_irq" masked="Masked"/>
+                     <interrupt id="ctimer2_irq" masked="Masked"/>
+                     <interrupt id="ctimer3_irq" masked="Masked"/>
+                     <interrupt id="ctimer4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm0_irq" masked="Masked"/>
+                     <interrupt id="flexcomm1_irq" masked="Masked"/>
+                     <interrupt id="flexcomm2_irq" masked="Masked"/>
+                     <interrupt id="flexcomm3_irq" masked="Masked"/>
+                     <interrupt id="flexcomm4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm5_irq" masked="Masked"/>
+                     <interrupt id="flexcomm6_irq" masked="Masked"/>
+                     <interrupt id="flexcomm7_irq" masked="Masked"/>
+                     <interrupt id="global_irq0" masked="Masked"/>
+                     <interrupt id="global_irq1" masked="Masked"/>
+                     <interrupt id="lspi_hs_irq" masked="Masked"/>
+                     <interrupt id="mailbox_irq" masked="Masked"/>
+                     <interrupt id="mrt_irq" masked="Masked"/>
+                     <interrupt id="os_event_irq" masked="Masked"/>
+                     <interrupt id="pin_int4" masked="Masked"/>
+                     <interrupt id="pin_int5" masked="Masked"/>
+                     <interrupt id="pin_int6" masked="Masked"/>
+                     <interrupt id="pin_int7" masked="Masked"/>
+                     <interrupt id="pin_irq0" masked="Masked"/>
+                     <interrupt id="pin_irq1" masked="Masked"/>
+                     <interrupt id="pin_irq2" masked="Masked"/>
+                     <interrupt id="pin_irq3" masked="Masked"/>
+                     <interrupt id="plu_irq" masked="Masked"/>
+                     <interrupt id="pq_irq" masked="Masked"/>
+                     <interrupt id="qddkey_irq" masked="Masked"/>
+                     <interrupt id="rtc_irq" masked="Masked"/>
+                     <interrupt id="sct_irq" masked="Masked"/>
+                     <interrupt id="sdio_irq" masked="Masked"/>
+                     <interrupt id="sdma0_irq" masked="Masked"/>
+                     <interrupt id="sdma1_irq" masked="Masked"/>
+                     <interrupt id="sec_hypervisor_call_irq" masked="Masked"/>
+                     <interrupt id="sec_int0" masked="Masked"/>
+                     <interrupt id="sec_int1" masked="Masked"/>
+                     <interrupt id="sec_vio_irq" masked="Masked"/>
+                     <interrupt id="sha_irq" masked="Masked"/>
+                     <interrupt id="sys_irq" masked="Masked"/>
+                     <interrupt id="usb0_irq" masked="Masked"/>
+                     <interrupt id="usb0_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_irq" masked="Masked"/>
+                     <interrupt id="usb1_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_utmi_irq" masked="Masked"/>
+                     <interrupt id="utick_irq" masked="Masked"/>
+                  </masking>
+                  <security>
+                     <interrupt id="acmp_capt_irq" secure="Secure"/>
+                     <interrupt id="adc_irq" secure="Secure"/>
+                     <interrupt id="casper_irq" secure="Secure"/>
+                     <interrupt id="ctimer0_irq" secure="Secure"/>
+                     <interrupt id="ctimer1_irq" secure="Secure"/>
+                     <interrupt id="ctimer2_irq" secure="Secure"/>
+                     <interrupt id="ctimer3_irq" secure="Secure"/>
+                     <interrupt id="ctimer4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm0_irq" secure="Secure"/>
+                     <interrupt id="flexcomm1_irq" secure="Secure"/>
+                     <interrupt id="flexcomm2_irq" secure="Secure"/>
+                     <interrupt id="flexcomm3_irq" secure="Secure"/>
+                     <interrupt id="flexcomm4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm5_irq" secure="Secure"/>
+                     <interrupt id="flexcomm6_irq" secure="Secure"/>
+                     <interrupt id="flexcomm7_irq" secure="Secure"/>
+                     <interrupt id="global_irq0" secure="Secure"/>
+                     <interrupt id="global_irq1" secure="Secure"/>
+                     <interrupt id="lspi_hs_irq" secure="Secure"/>
+                     <interrupt id="mailbox_irq" secure="Secure"/>
+                     <interrupt id="mrt_irq" secure="Secure"/>
+                     <interrupt id="os_event_irq" secure="Secure"/>
+                     <interrupt id="pin_int4" secure="Secure"/>
+                     <interrupt id="pin_int5" secure="Secure"/>
+                     <interrupt id="pin_int6" secure="Secure"/>
+                     <interrupt id="pin_int7" secure="Secure"/>
+                     <interrupt id="pin_irq0" secure="Secure"/>
+                     <interrupt id="pin_irq1" secure="Secure"/>
+                     <interrupt id="pin_irq2" secure="Secure"/>
+                     <interrupt id="pin_irq3" secure="Secure"/>
+                     <interrupt id="plu_irq" secure="Secure"/>
+                     <interrupt id="pq_irq" secure="Secure"/>
+                     <interrupt id="qddkey_irq" secure="Secure"/>
+                     <interrupt id="rtc_irq" secure="Secure"/>
+                     <interrupt id="sct_irq" secure="Secure"/>
+                     <interrupt id="sdio_irq" secure="Secure"/>
+                     <interrupt id="sdma0_irq" secure="Secure"/>
+                     <interrupt id="sdma1_irq" secure="Secure"/>
+                     <interrupt id="sec_hypervisor_call_irq" secure="Secure"/>
+                     <interrupt id="sec_int0" secure="Secure"/>
+                     <interrupt id="sec_int1" secure="Secure"/>
+                     <interrupt id="sec_vio_irq" secure="Secure"/>
+                     <interrupt id="sha_irq" secure="Secure"/>
+                     <interrupt id="sys_irq" secure="Secure"/>
+                     <interrupt id="usb0_irq" secure="Secure"/>
+                     <interrupt id="usb0_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_irq" secure="Secure"/>
+                     <interrupt id="usb1_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_utmi_irq" secure="Secure"/>
+                     <interrupt id="utick_irq" secure="Secure"/>
+                  </security>
+               </interrupts>
+               <ports>
+                  <port id="pio0">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+                  <port id="pio1">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+               </ports>
+            </ahb>
+            <saus>
+               <sau enabled="true" all_non_secure="false" generate_code_for_disabled_regions="false">
+                  <region start="0" size="268435456" security="ns" enabled="true" index="0"/>
+                  <region start="536870912" size="3221225472" security="ns" enabled="true" index="1"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="2"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="3"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="4"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="5"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="6"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="7"/>
+               </sau>
+            </saus>
+            <global_options>
+               <option id="AIRCR_PRIS" value="no"/>
+               <option id="AIRCR_BFHFNMINS" value="no"/>
+               <option id="AIRCR_SYSRESETREQS" value="no"/>
+               <option id="SCR_SLEEPDEEPS" value="no"/>
+               <option id="SHCSR_SECUREFAULTENA" value="no"/>
+               <option id="CPACR_CP0" value="3"/>
+               <option id="CPACR_CP1" value="3"/>
+               <option id="CPACR_CP2" value="0"/>
+               <option id="CPACR_CP3" value="0"/>
+               <option id="CPACR_CP4" value="0"/>
+               <option id="CPACR_CP5" value="0"/>
+               <option id="CPACR_CP6" value="0"/>
+               <option id="CPACR_CP7" value="0"/>
+               <option id="CPACR_CP10" value="3"/>
+               <option id="CPACR_CP11" value="3"/>
+               <option id="NSACR_CP0" value="yes"/>
+               <option id="NSACR_CP1" value="yes"/>
+               <option id="NSACR_CP2" value="no"/>
+               <option id="NSACR_CP3" value="no"/>
+               <option id="NSACR_CP4" value="no"/>
+               <option id="NSACR_CP5" value="no"/>
+               <option id="NSACR_CP6" value="no"/>
+               <option id="NSACR_CP7" value="no"/>
+               <option id="NSACR_CP10" value="yes"/>
+               <option id="NSACR_CP11" value="yes"/>
+               <option id="CPPWR_SU0" value="no"/>
+               <option id="CPPWR_SUS0" value="no"/>
+               <option id="CPPWR_SU1" value="no"/>
+               <option id="CPPWR_SUS1" value="no"/>
+               <option id="CPPWR_SU2" value="no"/>
+               <option id="CPPWR_SUS2" value="no"/>
+               <option id="CPPWR_SU3" value="no"/>
+               <option id="CPPWR_SUS3" value="no"/>
+               <option id="CPPWR_SU4" value="no"/>
+               <option id="CPPWR_SUS4" value="no"/>
+               <option id="CPPWR_SU5" value="no"/>
+               <option id="CPPWR_SUS5" value="no"/>
+               <option id="CPPWR_SU6" value="no"/>
+               <option id="CPPWR_SUS6" value="no"/>
+               <option id="CPPWR_SU7" value="no"/>
+               <option id="CPPWR_SUS7" value="no"/>
+               <option id="CPPWR_SU10" value="no"/>
+               <option id="CPPWR_SUS10" value="no"/>
+               <option id="CPPWR_SU11" value="no"/>
+               <option id="CPPWR_SUS11" value="no"/>
+               <option id="SEC_GPIO_MASK0_LOCK" value="no"/>
+               <option id="SEC_GPIO_MASK1_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK0_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK1_LOCK" value="no"/>
+               <option id="MASTER_SEC_LEVEL_LOCK" value="no"/>
+               <option id="CPU0_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU0_LOCK_NS_MPU" value="no"/>
+               <option id="CPU0_LOCK_S_VTAIRCR" value="no"/>
+               <option id="CPU0_LOCK_S_MPU" value="no"/>
+               <option id="CPU0_LOCK_SAU" value="no"/>
+               <option id="CPU0_LOCK_REG_LOCK" value="no"/>
+               <option id="CPU1_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU1_LOCK_NS_MPU" value="no"/>
+               <option id="CPU1_LOCK_REG_LOCK" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_SECURE_CHECKING" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_S_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_NS_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_VIOLATION_ABORT" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SIMPLE_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SMART_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_IDAU_ALL_NS" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_WRITE_LOCK" value="yes"/>
+            </global_options>
+            <mpus>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="s" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="ns" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+            </mpus>
+         </functional_group>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index f46775b27..59f7d6329 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -2,9 +2,15 @@ set(MCU_VARIANT LPC55S69)
 set(MCU_CORE LPC55S69_cm33_core0)
 
 set(JLINK_DEVICE LPC55S69_M33_0)
+set(JLINK_OPTION "-USB 000727648789")
+
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
+# device highspeed, host fullspeed
+set(RHPORT_DEVICE 1)
+set(RHPORT_HOST 0)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_LPC55S69JBD100_cm33_core0
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
index 61b47646f..3b81411a1 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.h
@@ -36,34 +36,22 @@
  extern "C" {
 #endif
 
-// LED
-#define LED_PORT              1
-#define LED_PIN               6
+// LED: use red LED from generated pin_mux
+#define LED_PORT              BOARD_INITLEDSPINS_LED_RED_PORT
+#define LED_PIN               BOARD_INITLEDSPINS_LED_RED_PIN
 #define LED_STATE_ON          0
 
-// WAKE button
-#define BUTTON_PORT           1
-#define BUTTON_PIN            18
+// WAKE button: use S2 from generated pin_mux
+#define BUTTON_PORT           BOARD_INITBUTTONSPINS_S2_PORT
+#define BUTTON_PIN            BOARD_INITBUTTONSPINS_S2_PIN
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
 #define UART_DEV              USART0
-#define UART_RX_PINMUX        0, 29, IOCON_PIO_DIG_FUNC1_EN
-#define UART_TX_PINMUX        0, 30, IOCON_PIO_DIG_FUNC1_EN
 
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
 
-// Power switch
-#define USBFS_POWER_PORT      1
-#define USBFS_POWER_PIN       12
-#define USBFS_POWER_STATE_ON  0
-
-#define USBHS_POWER_PORT      1
-#define USBHS_POWER_PIN       29
-#define USBHS_POWER_STATE_ON  0
-
-
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
index 73edc88a9..e92c46f05 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.mk
@@ -1,9 +1,19 @@
 MCU_VARIANT = LPC55S69
 MCU_CORE = LPC55S69_cm33_core0
-PORT ?= 1
+
+# device highspeed, host fullspeed
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 0
 
 CFLAGS += -DCPU_LPC55S69JBD100_cm33_core0
 
+SRC_C += \
+	$(TOP)/$(BOARD_PATH)/board/clock_config.c \
+	$(TOP)/$(BOARD_PATH)/board/pin_mux.c \
+	$(TOP)/$(BOARD_PATH)/board/peripherals.c
+
+INC += $(TOP)/$(BOARD_PATH)/board
+
 JLINK_DEVICE = LPC55S69
 PYOCD_TARGET = LPC55S69
 
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.c b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.c
new file mode 100644
index 000000000..99a738f18
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to set up clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_power.h"
+#include "fsl_clock.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockPLL150M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: System_clock.outFreq, value: 12 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF96M
+outputs:
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
+- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
+sources:
+- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF96M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
+
+    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL100M
+outputs:
+- {id: System_clock.outFreq, value: 100 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL100M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+
+    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 100000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL150M
+called_from_default_init: true
+outputs:
+- {id: FXCOM0_clock.outFreq, value: 48 MHz}
+- {id: System_clock.outFreq, value: 144 MHz}
+- {id: USB0_clock.outFreq, value: 48 MHz}
+- {id: USB1_PHY_clock.outFreq, value: 16 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: PLL1_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_PLL_USB_OUT, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.FCCLKSEL0.sel, value: SYSCON.PLL0DIV}
+- {id: SYSCON.FRGCTRL0_DIV.scale, value: '400'}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0DIV.scale, value: '2'}
+- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
+- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL1M_MULT.scale, value: '18'}
+- {id: SYSCON.PLL1_PDEC.scale, value: '2'}
+- {id: SYSCON.USB0CLKDIV.scale, value: '3'}
+- {id: SYSCON.USB0CLKSEL.sel, value: SYSCON.MAINCLKSELB}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL150M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_PLL_USB_OUT_MASK;       /* Enable clk_in to HS USB  */
+
+    POWER_SetVoltageForFreq(144000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(144000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 150000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up PLL1 */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
+    const pll_setup_t pll1Setup = {
+        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(11U) | SYSCON_PLL1CTRL_SELP(5U),
+        .pllndec = SYSCON_PLL1NDEC_NDIV(1U),
+        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
+        .pllmdec = SYSCON_PLL1MDEC_MDIV(18U),
+        .pllRate = 144000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
+
+    /*!< Set up dividers */
+    #if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 144U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #else
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 37120U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #endif
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 0U, true);               /*!< Reset USB0CLKDIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 3U, false);         /*!< Set USB0CLKDIV divider to value 3 */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);               /*!< Reset PLL0DIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 2U, false);         /*!< Set PLL0DIV divider to value 2 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
+    CLOCK_AttachClk(kMAIN_CLK_to_USB0_CLK);                 /*!< Switch USB0_CLK to MAIN_CLK */
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM0);                 /*!< Switch FLEXCOMM0 to PLL0_DIV */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
+#endif
+}
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.h
new file mode 100644
index 000000000..9112ede78
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/clock_config.h
@@ -0,0 +1,290 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK      0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK              0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK          0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK          0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK        0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK          0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK         0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK         0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK         0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK         0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK         0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK          0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK          0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK          0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK          0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK          0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK          0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK          0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK          0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK          0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK            0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK        0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK    0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK        0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK 0UL           /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK          0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK         0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK             0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK            0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK        0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK        0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK          96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK           0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK            0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK        0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK           0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK             0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK           0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK           100000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK             0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK         0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL100M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         144000000U  /*!< Core clock frequency: 144000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK           48000000UL     /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK           144000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK             48000000UL     /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK         16000000UL     /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL150M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.c b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.c
new file mode 100644
index 000000000..890a20fc6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v15.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+functionalGroups:
+- name: BOARD_InitPeripherals_cm33_core0
+  UUID: 61d0725d-b300-49cb-9c66-b5edfbf8ffc1
+  called_from_default_init: true
+  selectedCore: cm33_core0
+- name: BOARD_InitPeripherals_cm33_core1
+  UUID: e2041cd4-ebb6-45a5-807f-e0c2dc047d48
+  selectedCore: cm33_core1
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+  - global_init: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'uart_cmsis_common'
+- type_id: 'uart_cmsis_common'
+- global_USART_CMSIS_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'gpio_adapter_common'
+- type_id: 'gpio_adapter_common'
+- global_gpio_adapter_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * BOARD_InitPeripherals_cm33_core0 functional group
+ **********************************************************************************************************************/
+/***********************************************************************************************************************
+ * DEBUG_UART initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'DEBUG_UART'
+- type: 'flexcomm_usart'
+- mode: 'polling'
+- custom_name_enabled: 'true'
+- type_id: 'flexcomm_usart_2.2.0'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'FLEXCOMM0'
+- config_sets:
+  - usartConfig_t:
+    - usartConfig:
+      - clockSource: 'FXCOMFunctionClock'
+      - clockSourceFreq: 'ClocksTool_DefaultInit'
+      - baudRate_Bps: '115200'
+      - syncMode: 'kUSART_SyncModeDisabled'
+      - parityMode: 'kUSART_ParityDisabled'
+      - stopBitCount: 'kUSART_OneStopBit'
+      - bitCountPerChar: 'kUSART_8BitsPerChar'
+      - loopback: 'false'
+      - txWatermark: 'kUSART_TxFifo0'
+      - rxWatermark: 'kUSART_RxFifo1'
+      - enableRx: 'true'
+      - enableTx: 'true'
+      - clockPolarity: 'kUSART_RxSampleOnFallingEdge'
+      - enableContinuousSCLK: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const usart_config_t DEBUG_UART_config = {
+  .baudRate_Bps = 115200UL,
+  .syncMode = kUSART_SyncModeDisabled,
+  .parityMode = kUSART_ParityDisabled,
+  .stopBitCount = kUSART_OneStopBit,
+  .bitCountPerChar = kUSART_8BitsPerChar,
+  .loopback = false,
+  .txWatermark = kUSART_TxFifo0,
+  .rxWatermark = kUSART_RxFifo1,
+  .enableRx = true,
+  .enableTx = true,
+  .enableMode32k = false,
+  .clockPolarity = kUSART_RxSampleOnFallingEdge,
+  .enableContinuousSCLK = false
+};
+
+static void DEBUG_UART_init(void) {
+  /* Reset FLEXCOMM device */
+  RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
+  USART_Init(DEBUG_UART_PERIPHERAL, &DEBUG_UART_config, DEBUG_UART_CLOCK_SOURCE);
+}
+
+/***********************************************************************************************************************
+ * NVIC initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'NVIC'
+- type: 'nvic'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'nvic'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'NVIC'
+- config_sets:
+  - nvic:
+    - interrupt_table: []
+    - interrupts: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void NVIC_init(void) {
+} */
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals_cm33_core0(void)
+{
+  /* Initialize components */
+  DEBUG_UART_init();
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+  BOARD_InitPeripherals_cm33_core0();
+}
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.h
new file mode 100644
index 000000000..fc4d72c33
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/peripherals.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "fsl_common.h"
+#include "fsl_reset.h"
+#include "fsl_usart.h"
+#include "fsl_clock.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+/* Definitions for BOARD_InitPeripherals_cm33_core0 functional group */
+/* Definition of peripheral ID */
+#define DEBUG_UART_PERIPHERAL ((USART_Type *)FLEXCOMM0)
+/* Definition of the clock source frequency */
+#define DEBUG_UART_CLOCK_SOURCE 48000000UL
+
+/***********************************************************************************************************************
+ * Global variables
+ **********************************************************************************************************************/
+extern const usart_config_t DEBUG_UART_config;
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+
+void BOARD_InitPeripherals_cm33_core0(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _PERIPHERALS_H_ */
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.c b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.c
new file mode 100644
index 000000000..979e7d065
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.c
@@ -0,0 +1,860 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_iocon.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitUSBPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+    BOARD_InitPins_Core0();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
+
+    const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
+                                    IOCON_PIO_FUNC6 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI |
+                                    /* Analog switch is open (disabled) */
+                                    IOCON_PIO_ASW_DI);
+    /* PORT0 PIN10 (coords: 21) is configured as SWO */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled) */
+                                           IOCON_PIO_ASW_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled), only for A0 version */
+                                           IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled) */
+                                          IOCON_PIO_ASW_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled), only for A0 version */
+                                          IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitUSBPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
+  - {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
+  - {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
+  - {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
+  - {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
+  - {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp}
+  - {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
+    mode: pullUp}
+  - {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp}
+  - {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitUSBPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitUSBPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
+                                IOCON_PIO_FUNC7 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
+
+    IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT028 (pin 66) is configured as USB0_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO0_28_FUNC_ALT7)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO0_28_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT112 (pin 67) is configured as USB0_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_12_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_12_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_12_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][29] = ((IOCON->PIO[1][29] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT129 (pin 80) is configured as USB1_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_29_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_29_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_29_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][30] = ((IOCON->PIO[1][30] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT130 (pin 65) is configured as USB1_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO1_30_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_30_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_30_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '1', peripheral: GPIO, signal: 'PIO1, 4', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '5', peripheral: GPIO, signal: 'PIO1, 6', pin_signal: PIO1_6/FC0_TXD_SCL_MISO_WS/SD0_D3/CTIMER2_MAT1/SCT_GPI3, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '9', peripheral: GPIO, signal: 'PIO1, 7', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4, direction: OUTPUT, gpio_init_state: 'true',
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitLEDsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t LED_BLUE_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_4 (pin 1)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_BLUE_GPIO, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, &LED_BLUE_config);
+
+    gpio_pin_config_t LED_RED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_6 (pin 5)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_RED_GPIO, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, &LED_RED_config);
+
+    gpio_pin_config_t LED_GREEN_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO1_7 (pin 9)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GREEN_GPIO, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, &LED_GREEN_config);
+
+    const uint32_t LED_BLUE = (/* Pin is configured as PIO1_4 */
+                               IOCON_PIO_FUNC0 |
+                               /* Selects pull-up function */
+                               IOCON_PIO_MODE_PULLUP |
+                               /* Standard mode, output slew rate control is enabled */
+                               IOCON_PIO_SLEW_STANDARD |
+                               /* Input function is not inverted */
+                               IOCON_PIO_INV_DI |
+                               /* Enables digital function */
+                               IOCON_PIO_DIGITAL_EN |
+                               /* Open drain is disabled */
+                               IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN4 (coords: 1) is configured as PIO1_4 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_BLUE_PORT, BOARD_INITLEDSPINS_LED_BLUE_PIN, LED_BLUE);
+
+    const uint32_t LED_RED = (/* Pin is configured as PIO1_6 */
+                              IOCON_PIO_FUNC0 |
+                              /* Selects pull-up function */
+                              IOCON_PIO_MODE_PULLUP |
+                              /* Standard mode, output slew rate control is enabled */
+                              IOCON_PIO_SLEW_STANDARD |
+                              /* Input function is not inverted */
+                              IOCON_PIO_INV_DI |
+                              /* Enables digital function */
+                              IOCON_PIO_DIGITAL_EN |
+                              /* Open drain is disabled */
+                              IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN6 (coords: 5) is configured as PIO1_6 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_RED_PORT, BOARD_INITLEDSPINS_LED_RED_PIN, LED_RED);
+
+    const uint32_t LED_GREEN = (/* Pin is configured as PIO1_7 */
+                                IOCON_PIO_FUNC0 |
+                                /* Selects pull-up function */
+                                IOCON_PIO_MODE_PULLUP |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN7 (coords: 9) is configured as PIO1_7 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITLEDSPINS_LED_GREEN_PORT, BOARD_INITLEDSPINS_LED_GREEN_PIN, LED_GREEN);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: INPUT,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '64', peripheral: GPIO, signal: 'PIO1, 18', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0, direction: INPUT, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '10', peripheral: GPIO, signal: 'PIO1, 9', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12, direction: INPUT, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t S1_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO0_5 (pin 88)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S1_GPIO, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, &S1_config);
+
+    gpio_pin_config_t S3_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_9 (pin 10)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S3_GPIO, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, &S3_config);
+
+    gpio_pin_config_t S2_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_18 (pin 64)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_S2_GPIO, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, &S2_config);
+
+    const uint32_t S1 = (/* Pin is configured as PIO0_5 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN5 (coords: 88) is configured as PIO0_5 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S1_PORT, BOARD_INITBUTTONSPINS_S1_PIN, S1);
+
+    const uint32_t S2 = (/* Pin is configured as PIO1_18 */
+                         IOCON_PIO_FUNC0 |
+                         /* Selects pull-up function */
+                         IOCON_PIO_MODE_PULLUP |
+                         /* Standard mode, output slew rate control is enabled */
+                         IOCON_PIO_SLEW_STANDARD |
+                         /* Input function is not inverted */
+                         IOCON_PIO_INV_DI |
+                         /* Enables digital function */
+                         IOCON_PIO_DIGITAL_EN |
+                         /* Open drain is disabled */
+                         IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN18 (coords: 64) is configured as PIO1_18 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S2_PORT, BOARD_INITBUTTONSPINS_S2_PIN, S2);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t S3 = (/* Pin is configured as PIO1_9 */
+                             IOCON_PIO_FUNC0 |
+                             /* Selects pull-up function */
+                             IOCON_PIO_MODE_PULLUP |
+                             /* Standard mode, output slew rate control is enabled */
+                             IOCON_PIO_SLEW_STANDARD |
+                             /* Input function is not inverted */
+                             IOCON_PIO_INV_DI |
+                             /* Enables digital function */
+                             IOCON_PIO_DIGITAL_EN |
+                             /* Open drain is disabled */
+                             IOCON_PIO_OPENDRAIN_DI |
+                             /* Analog switch is closed (enabled) */
+                             IOCON_PIO_ASW_EN);
+        /* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
+        IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
+    }
+    else
+    {
+        const uint32_t S3 = (/* Pin is configured as PIO1_9 */
+                             IOCON_PIO_FUNC0 |
+                             /* Selects pull-up function */
+                             IOCON_PIO_MODE_PULLUP |
+                             /* Standard mode, output slew rate control is enabled */
+                             IOCON_PIO_SLEW_STANDARD |
+                             /* Input function is not inverted */
+                             IOCON_PIO_INV_DI |
+                             /* Enables digital function */
+                             IOCON_PIO_DIGITAL_EN |
+                             /* Open drain is disabled */
+                             IOCON_PIO_OPENDRAIN_DI |
+                             /* Analog switch is closed (enabled), only for A0 version */
+                             IOCON_PIO_ASW_DIS_EN);
+        /* PORT1 PIN9 (coords: 10) is configured as PIO1_9 */
+        IOCON_PinMuxSet(IOCON, BOARD_INITBUTTONSPINS_S3_PORT, BOARD_INITBUTTONSPINS_S3_PIN, S3);
+    }
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins_Core0:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins_Core0
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitPins_Core0(void)
+{
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitI2SPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
+    identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitI2SPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitI2SPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
+                                  IOCON_PIO_FUNC1 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI |
+                                  /* Analog switch is closed (enabled) */
+                                  IOCON_PIO_ASW_EN);
+    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
+
+    const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
+
+    const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
+
+    const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
+                                  IOCON_PIO_FUNC7 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
+
+    const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
+
+    const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+
+    const uint32_t MCLK = (/* Pin is configured as MCLK */
+                           IOCON_PIO_FUNC1 |
+                           /* No addition pin function */
+                           IOCON_PIO_MODE_INACT |
+                           /* Standard mode, output slew rate control is enabled */
+                           IOCON_PIO_SLEW_STANDARD |
+                           /* Input function is not inverted */
+                           IOCON_PIO_INV_DI |
+                           /* Enables digital function */
+                           IOCON_PIO_DIGITAL_EN |
+                           /* Open drain is disabled */
+                           IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitACCELPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitACCELPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitACCELPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t ACCL_INTR_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_19 (pin 58)  */
+    GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
+
+    const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
+                                IOCON_PIO_FUNC0 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI |
+                                /* Analog switch is open (disabled) */
+                                IOCON_PIO_ASW_DI);
+    /* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.h b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.h
new file mode 100644
index 000000000..3925c937a
--- /dev/null
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board/pin_mux.h
@@ -0,0 +1,435 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
+/* @} */
+
+/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC6 0x06u         /*!<@brief Selects pin function 6 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
+/* @} */
+
+/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
+/* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Enables digital function */
+#define IOCON_PIO_DIGITAL_EN 0x0100u
+/*!
+ * @brief Selects pin function 7 */
+#define IOCON_PIO_FUNC7 0x07u
+/*!
+ * @brief Input function is not inverted */
+#define IOCON_PIO_INV_DI 0x00u
+/*!
+ * @brief No addition pin function */
+#define IOCON_PIO_MODE_INACT 0x00u
+/*!
+ * @brief Open drain is disabled */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u
+/*!
+ * @brief Standard mode, output slew rate control is enabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_28_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 7. */
+#define PIO0_28_FUNC_ALT7 0x07u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO0_28_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_12_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_12_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_12_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_29_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_29_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_29_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_30_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_30_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_30_MODE_PULL_UP 0x02u
+
+/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
+  @{ */
+#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U                   /*!<@brief PORT pin number */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_4 (number 1), R78/P18[5]/LEDR/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_BLUE_GPIO_PIN_MASK (1U << 4U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_BLUE_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN 4U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_BLUE_PIN_MASK (1U << 4U)      /*!<@brief PORT pin mask */
+                                                             /* @} */
+
+/*! @name PIO1_6 (number 5), R80/P18[9]/LEDB/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_RED_GPIO_PIN_MASK (1U << 6U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_RED_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_RED_PIN 6U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_RED_PIN_MASK (1U << 6U)      /*!<@brief PORT pin mask */
+                                                            /* @} */
+
+/*! @name PIO1_7 (number 9), R79/P18[7]/LEDG/PWM_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GREEN_GPIO_PIN_MASK (1U << 7U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_GREEN_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN 7U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_GREEN_PIN_MASK (1U << 7U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S1_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S1_PORT 0U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S1_PIN 5U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S1_PIN_MASK (1U << 5U)      /*!<@brief PORT pin mask */
+                                                          /* @} */
+
+/*! @name PIO1_18 (number 64), S2/P18[16]/P24[2]/WAKE/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S2_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S2_GPIO_PIN_MASK (1U << 18U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S2_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S2_PIN 18U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S2_PIN_MASK (1U << 18U)      /*!<@brief PORT pin mask */
+                                                           /* @} */
+
+/*! @name PIO1_9 (number 10), S3/P18[1]/PIO1_9_GPIO_ARD
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_S3_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S3_GPIO_PIN_MASK (1U << 9U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_S3_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_S3_PIN 9U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_S3_PIN_MASK (1U << 9U)      /*!<@brief PORT pin mask */
+                                                          /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins_Core0(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
+  @{ */
+#define BOARD_INITI2SPINS_MCLK_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_MCLK_PIN 31U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U)      /*!<@brief PORT pin mask */
+                                                         /* @} */
+
+/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
+#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.cmake b/hw/bsp/lpc55/boards/mcu_link/board.cmake
index fd7cb6de6..bbaaf6648 100644
--- a/hw/bsp/lpc55/boards/mcu_link/board.cmake
+++ b/hw/bsp/lpc55/boards/mcu_link/board.cmake
@@ -7,8 +7,6 @@ set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
-    CPU_LPC55S69JBD100_cm33_core0
-    # port 1 is highspeed
-    # BOARD_TUD_RHPORT=1
+    CPU_LPC55S69JBD64_cm33_core0
     )
 endfunction()
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.h b/hw/bsp/lpc55/boards/mcu_link/board.h
index 1d71b3e79..d3c133f40 100644
--- a/hw/bsp/lpc55/boards/mcu_link/board.h
+++ b/hw/bsp/lpc55/boards/mcu_link/board.h
@@ -37,19 +37,17 @@
 #endif
 
 // LED
-#define LED_PORT              0
-#define LED_PIN               5
+#define LED_PORT              BOARD_INITLEDSPINS_LED_PORT
+#define LED_PIN               BOARD_INITLEDSPINS_LED_PIN
 #define LED_STATE_ON          0
 
 // WAKE button (Dummy, use unused pin
-#define BUTTON_PORT           0
-#define BUTTON_PIN            30
+#define BUTTON_PORT           BOARD_INITBUTTONSPINS_BUTTON_PORT
+#define BUTTON_PIN            BOARD_INITBUTTONSPINS_BUTTON_PIN
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
 #define UART_DEV              USART0
-#define UART_RX_PINMUX        0, 24, IOCON_PIO_DIG_FUNC1_EN
-#define UART_TX_PINMUX        0, 25, IOCON_PIO_DIG_FUNC1_EN
 
 // XTAL
 #define XTAL0_CLK_HZ          (16 * 1000 * 1000U)
diff --git a/hw/bsp/lpc55/boards/mcu_link/board.mk b/hw/bsp/lpc55/boards/mcu_link/board.mk
index ceb1d0ebc..4f686a88f 100644
--- a/hw/bsp/lpc55/boards/mcu_link/board.mk
+++ b/hw/bsp/lpc55/boards/mcu_link/board.mk
@@ -1,9 +1,16 @@
 MCU_VARIANT = LPC55S69
 MCU_CORE = LPC55S69_cm33_core0
-PORT ?= 1
+RHPORT_DEVICE ?= 1
 
 CFLAGS += -DCPU_LPC55S69JBD64_cm33_core0
 
+SRC_C += \
+	$(TOP)/$(BOARD_PATH)/board/clock_config.c \
+	$(TOP)/$(BOARD_PATH)/board/pin_mux.c \
+	$(TOP)/$(BOARD_PATH)/board/peripherals.c
+
+INC += $(TOP)/$(BOARD_PATH)/board
+
 JLINK_DEVICE = LPC55S69
 PYOCD_TARGET = LPC55S69
 
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/clock_config.c b/hw/bsp/lpc55/boards/mcu_link/board/clock_config.c
new file mode 100644
index 000000000..99a738f18
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/clock_config.c
@@ -0,0 +1,328 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to set up clock using clock driver functions:
+ *
+ * 1. Setup clock sources.
+ *
+ * 2. Set up wait states of the flash.
+ *
+ * 3. Set up all dividers.
+ *
+ * 4. Set up all selectors to provide selected clocks.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v18.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_power.h"
+#include "fsl_clock.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockPLL150M();
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFRO12M
+outputs:
+- {id: System_clock.outFreq, value: 12 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+void BOARD_BootClockFRO12M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    POWER_SetVoltageForFreq(12000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(12000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO12M */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFRO12M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockFROHF96M
+outputs:
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
+- {id: SYSCON.MAINCLKSELA.sel, value: ANACTRL.fro_hf_clk}
+sources:
+- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+void BOARD_BootClockFROHF96M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
+
+    POWER_SetVoltageForFreq(96000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(96000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kFRO_HF_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to FRO_HF */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL100M
+outputs:
+- {id: System_clock.outFreq, value: 100 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL100M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+
+    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 100000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up dividers */
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL100M_CORE_CLOCK;
+#endif
+}
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockPLL150M
+called_from_default_init: true
+outputs:
+- {id: FXCOM0_clock.outFreq, value: 48 MHz}
+- {id: System_clock.outFreq, value: 144 MHz}
+- {id: USB0_clock.outFreq, value: 48 MHz}
+- {id: USB1_PHY_clock.outFreq, value: 16 MHz}
+settings:
+- {id: PLL0_Mode, value: Normal}
+- {id: PLL1_Mode, value: Normal}
+- {id: ENABLE_CLKIN_ENA, value: Enabled}
+- {id: ENABLE_PLL_USB_OUT, value: Enabled}
+- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
+- {id: SYSCON.FCCLKSEL0.sel, value: SYSCON.PLL0DIV}
+- {id: SYSCON.FRGCTRL0_DIV.scale, value: '400'}
+- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL1_BYPASS}
+- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL0DIV.scale, value: '2'}
+- {id: SYSCON.PLL0M_MULT.scale, value: '150', locked: true}
+- {id: SYSCON.PLL0N_DIV.scale, value: '8', locked: true}
+- {id: SYSCON.PLL0_PDEC.scale, value: '2', locked: true}
+- {id: SYSCON.PLL1CLKSEL.sel, value: SYSCON.CLK_IN_EN}
+- {id: SYSCON.PLL1M_MULT.scale, value: '18'}
+- {id: SYSCON.PLL1_PDEC.scale, value: '2'}
+- {id: SYSCON.USB0CLKDIV.scale, value: '3'}
+- {id: SYSCON.USB0CLKSEL.sel, value: SYSCON.MAINCLKSELB}
+sources:
+- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+/*******************************************************************************
+ * Code for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+void BOARD_BootClockPLL150M(void)
+{
+#ifndef SDK_SECONDARY_CORE
+    /*!< Set up the clock sources */
+    /*!< Configure FRO192M */
+    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
+    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
+    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
+
+    /*!< Configure XTAL32M */
+    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
+    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
+    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
+    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
+    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_PLL_USB_OUT_MASK;       /* Enable clk_in to HS USB  */
+
+    POWER_SetVoltageForFreq(144000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
+    CLOCK_SetFLASHAccessCyclesForFreq(144000000U);          /*!< Set FLASH wait states for core */
+
+    /*!< Set up PLL */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
+    const pll_setup_t pll0Setup = {
+        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(31U),
+        .pllndec = SYSCON_PLL0NDEC_NDIV(8U),
+        .pllpdec = SYSCON_PLL0PDEC_PDIV(1U),
+        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(150U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
+        .pllRate = 150000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
+
+    /*!< Set up PLL1 */
+    CLOCK_AttachClk(kEXT_CLK_to_PLL1);                    /*!< Switch PLL1CLKSEL to EXT_CLK */
+    POWER_DisablePD(kPDRUNCFG_PD_PLL1);                  /* Ensure PLL is on  */
+    const pll_setup_t pll1Setup = {
+        .pllctrl = SYSCON_PLL1CTRL_CLKEN_MASK | SYSCON_PLL1CTRL_SELI(11U) | SYSCON_PLL1CTRL_SELP(5U),
+        .pllndec = SYSCON_PLL1NDEC_NDIV(1U),
+        .pllpdec = SYSCON_PLL1PDEC_PDIV(1U),
+        .pllmdec = SYSCON_PLL1MDEC_MDIV(18U),
+        .pllRate = 144000000U,
+        .flags =  PLL_SETUPFLAG_WAITLOCK
+    };
+    CLOCK_SetPLL1Freq(&pll1Setup);                        /*!< Configure PLL1 to the desired values */
+
+    /*!< Set up dividers */
+    #if FSL_CLOCK_DRIVER_VERSION >= MAKE_VERSION(2, 3, 4)
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 144U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #else
+      CLOCK_SetClkDiv(kCLOCK_DivFlexFrg0, 37120U, false);         /*!< Set DIV to value 0xFF and MULT to value 144U in related FLEXFRGCTRL register */
+    #endif
+    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 0U, true);               /*!< Reset USB0CLKDIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivUsb0Clk, 3U, false);         /*!< Set USB0CLKDIV divider to value 3 */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 0U, true);               /*!< Reset PLL0DIV divider counter and halt it */
+    CLOCK_SetClkDiv(kCLOCK_DivPll0Clk, 2U, false);         /*!< Set PLL0DIV divider to value 2 */
+
+    /*!< Set up clock selectors - Attach clocks to the peripheries */
+    CLOCK_AttachClk(kPLL1_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL1 */
+    CLOCK_AttachClk(kMAIN_CLK_to_USB0_CLK);                 /*!< Switch USB0_CLK to MAIN_CLK */
+    CLOCK_AttachClk(kPLL0_DIV_to_FLEXCOMM0);                 /*!< Switch FLEXCOMM0 to PLL0_DIV */
+
+    /*!< Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKPLL150M_CORE_CLOCK;
+#endif
+}
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/clock_config.h b/hw/bsp/lpc55/boards/mcu_link/board/clock_config.h
new file mode 100644
index 000000000..9112ede78
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/clock_config.h
@@ -0,0 +1,290 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                         16000000U  /*!< Board xtal frequency in Hz */
+#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32K frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockFRO12M **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFRO12M_CORE_CLOCK           12000000U  /*!< Core clock frequency: 12000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFRO12M_ASYNCADC_CLOCK          0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFRO12M_CLKOUT_CLOCK            0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER0_CLOCK           0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER1_CLOCK           0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER2_CLOCK           0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER3_CLOCK           0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFRO12M_CTIMER4_CLOCK           0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM0_CLOCK            0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM1_CLOCK            0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM2_CLOCK            0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM3_CLOCK            0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM4_CLOCK            0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM5_CLOCK            0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM6_CLOCK            0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFRO12M_FXCOM7_CLOCK            0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFRO12M_HSLSPI_CLOCK            0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFRO12M_MCLK_CLOCK              0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_OSC32KHZ_CLOCK          0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_OSTIMER32KHZ_CLOCK      0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFRO12M_PLUCLKIN_CLOCK          0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_12MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_PLU_GLITCH_1MHZ_CLOCK   0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFRO12M_RTC1HZ_CLOCK            0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_RTC1KHZ_CLOCK           0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SCT_CLOCK               0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFRO12M_SDIO_CLOCK              0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK0_CLOCK          0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTICK1_CLOCK          0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFRO12M_SYSTEM_CLOCK            12000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFRO12M_TRACE_CLOCK             0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFRO12M_USB0_CLOCK              0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFRO12M_USB1_PHY_CLOCK          0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFRO12M_UTICK_CLOCK             0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFRO12M_WDT_CLOCK               0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFRO12M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFRO12M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************* Configuration BOARD_BootClockFROHF96M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKFROHF96M_CORE_CLOCK         96000000U  /*!< Core clock frequency: 96000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKFROHF96M_ASYNCADC_CLOCK        0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKFROHF96M_CLKOUT_CLOCK          0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER0_CLOCK         0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER1_CLOCK         0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER2_CLOCK         0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER3_CLOCK         0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKFROHF96M_CTIMER4_CLOCK         0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM0_CLOCK          0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM1_CLOCK          0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM2_CLOCK          0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM3_CLOCK          0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM4_CLOCK          0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM5_CLOCK          0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM6_CLOCK          0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKFROHF96M_FXCOM7_CLOCK          0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKFROHF96M_HSLSPI_CLOCK          0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKFROHF96M_MCLK_CLOCK            0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_OSC32KHZ_CLOCK        0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_OSTIMER32KHZ_CLOCK    0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKFROHF96M_PLUCLKIN_CLOCK        0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_12MHZ_CLOCK 0UL           /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_PLU_GLITCH_1MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1HZ_CLOCK          0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_RTC1KHZ_CLOCK         0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SCT_CLOCK             0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKFROHF96M_SDIO_CLOCK            0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK0_CLOCK        0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTICK1_CLOCK        0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKFROHF96M_SYSTEM_CLOCK          96000000UL     /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKFROHF96M_TRACE_CLOCK           0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKFROHF96M_USB0_CLOCK            0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKFROHF96M_USB1_PHY_CLOCK        0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKFROHF96M_UTICK_CLOCK           0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKFROHF96M_WDT_CLOCK             0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockFROHF96M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockFROHF96M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL100M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL100M_CORE_CLOCK         100000000U  /*!< Core clock frequency: 100000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL100M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL100M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL100M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM0_CLOCK           0UL            /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL100M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL100M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL100M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL100M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL100M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL100M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL100M_SYSTEM_CLOCK           100000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL100M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL100M_USB0_CLOCK             0UL            /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL100M_USB1_PHY_CLOCK         0UL            /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL100M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL100M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL100M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL100M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ******************** Configuration BOARD_BootClockPLL150M *********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKPLL150M_CORE_CLOCK         144000000U  /*!< Core clock frequency: 144000000Hz */
+
+
+/* Clock outputs (values are in Hz): */
+#define BOARD_BOOTCLOCKPLL150M_ASYNCADC_CLOCK         0UL            /* Clock consumers of ASYNCADC_clock output : ADC0 */
+#define BOARD_BOOTCLOCKPLL150M_CLKOUT_CLOCK           0UL            /* Clock consumers of CLKOUT_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER0_CLOCK          0UL            /* Clock consumers of CTIMER0_clock output : CTIMER0 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER1_CLOCK          0UL            /* Clock consumers of CTIMER1_clock output : CTIMER1 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER2_CLOCK          0UL            /* Clock consumers of CTIMER2_clock output : CTIMER2 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER3_CLOCK          0UL            /* Clock consumers of CTIMER3_clock output : CTIMER3 */
+#define BOARD_BOOTCLOCKPLL150M_CTIMER4_CLOCK          0UL            /* Clock consumers of CTIMER4_clock output : CTIMER4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM0_CLOCK           48000000UL     /* Clock consumers of FXCOM0_clock output : FLEXCOMM0 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM1_CLOCK           0UL            /* Clock consumers of FXCOM1_clock output : FLEXCOMM1 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM2_CLOCK           0UL            /* Clock consumers of FXCOM2_clock output : FLEXCOMM2 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM3_CLOCK           0UL            /* Clock consumers of FXCOM3_clock output : FLEXCOMM3 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM4_CLOCK           0UL            /* Clock consumers of FXCOM4_clock output : FLEXCOMM4 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM5_CLOCK           0UL            /* Clock consumers of FXCOM5_clock output : FLEXCOMM5 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM6_CLOCK           0UL            /* Clock consumers of FXCOM6_clock output : FLEXCOMM6 */
+#define BOARD_BOOTCLOCKPLL150M_FXCOM7_CLOCK           0UL            /* Clock consumers of FXCOM7_clock output : FLEXCOMM7 */
+#define BOARD_BOOTCLOCKPLL150M_HSLSPI_CLOCK           0UL            /* Clock consumers of HSLSPI_clock output : FLEXCOMM8 */
+#define BOARD_BOOTCLOCKPLL150M_MCLK_CLOCK             0UL            /* Clock consumers of MCLK_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_OSC32KHZ_CLOCK         0UL            /* Clock consumers of OSC32KHZ_clock output : FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_OSTIMER32KHZ_CLOCK     0UL            /* Clock consumers of OSTIMER32KHZ_clock output : OSTIMER */
+#define BOARD_BOOTCLOCKPLL150M_PLUCLKIN_CLOCK         0UL            /* Clock consumers of PLUCLKIN_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_12MHZ_CLOCK 0UL            /* Clock consumers of PLU_GLITCH_12MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_PLU_GLITCH_1MHZ_CLOCK  0UL            /* Clock consumers of PLU_GLITCH_1MHz_clock output : PLU */
+#define BOARD_BOOTCLOCKPLL150M_RTC1HZ_CLOCK           0UL            /* Clock consumers of RTC1HZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_RTC1KHZ_CLOCK          0UL            /* Clock consumers of RTC1KHZ_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SCT_CLOCK              0UL            /* Clock consumers of SCT_clock output : SCT0 */
+#define BOARD_BOOTCLOCKPLL150M_SDIO_CLOCK             0UL            /* Clock consumers of SDIO_clock output : SDIF */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK0_CLOCK         0UL            /* Clock consumers of SYSTICK0_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTICK1_CLOCK         0UL            /* Clock consumers of SYSTICK1_clock output : N/A */
+#define BOARD_BOOTCLOCKPLL150M_SYSTEM_CLOCK           144000000UL    /* Clock consumers of System_clock output : ADC0, ANACTRL, CASPER, CRC_ENGINE, CTIMER0, CTIMER1, CTIMER2, CTIMER3, CTIMER4, DMA0, DMA1, FLEXCOMM0, FLEXCOMM1, FLEXCOMM2, FLEXCOMM3, FLEXCOMM4, FLEXCOMM5, FLEXCOMM6, FLEXCOMM7, FLEXCOMM8, GINT0, GINT1, GPIO, INPUTMUX, IOCON, MAILBOX, MRT0, OSTIMER, PINT, PLU, PUF, SCT0, SDIF, SECGPIO, SECPINT, SWD, SYSCTL, USB0, USBFSH, USBHSD, USBHSH, USBPHY, UTICK0, WWDT */
+#define BOARD_BOOTCLOCKPLL150M_TRACE_CLOCK            0UL            /* Clock consumers of TRACE_clock output : SWD */
+#define BOARD_BOOTCLOCKPLL150M_USB0_CLOCK             48000000UL     /* Clock consumers of USB0_clock output : USB0, USBFSH */
+#define BOARD_BOOTCLOCKPLL150M_USB1_PHY_CLOCK         16000000UL     /* Clock consumers of USB1_PHY_clock output : USBHSD, USBHSH, USBPHY */
+#define BOARD_BOOTCLOCKPLL150M_UTICK_CLOCK            0UL            /* Clock consumers of UTICK_clock output : UTICK0 */
+#define BOARD_BOOTCLOCKPLL150M_WDT_CLOCK              0UL            /* Clock consumers of WDT_clock output : WWDT */
+
+/*******************************************************************************
+ * API for BOARD_BootClockPLL150M configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockPLL150M(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/peripherals.c b/hw/bsp/lpc55/boards/mcu_link/board/peripherals.c
new file mode 100644
index 000000000..890a20fc6
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/peripherals.c
@@ -0,0 +1,160 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Peripherals v15.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+functionalGroups:
+- name: BOARD_InitPeripherals_cm33_core0
+  UUID: 61d0725d-b300-49cb-9c66-b5edfbf8ffc1
+  called_from_default_init: true
+  selectedCore: cm33_core0
+- name: BOARD_InitPeripherals_cm33_core1
+  UUID: e2041cd4-ebb6-45a5-807f-e0c2dc047d48
+  selectedCore: cm33_core1
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'system'
+- type_id: 'system'
+- global_system_definitions:
+  - user_definitions: ''
+  - user_includes: ''
+  - global_init: ''
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'uart_cmsis_common'
+- type_id: 'uart_cmsis_common'
+- global_USART_CMSIS_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+component:
+- type: 'gpio_adapter_common'
+- type_id: 'gpio_adapter_common'
+- global_gpio_adapter_common:
+  - quick_selection: 'default'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "peripherals.h"
+
+/***********************************************************************************************************************
+ * BOARD_InitPeripherals_cm33_core0 functional group
+ **********************************************************************************************************************/
+/***********************************************************************************************************************
+ * DEBUG_UART initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'DEBUG_UART'
+- type: 'flexcomm_usart'
+- mode: 'polling'
+- custom_name_enabled: 'true'
+- type_id: 'flexcomm_usart_2.2.0'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'FLEXCOMM0'
+- config_sets:
+  - usartConfig_t:
+    - usartConfig:
+      - clockSource: 'FXCOMFunctionClock'
+      - clockSourceFreq: 'ClocksTool_DefaultInit'
+      - baudRate_Bps: '115200'
+      - syncMode: 'kUSART_SyncModeDisabled'
+      - parityMode: 'kUSART_ParityDisabled'
+      - stopBitCount: 'kUSART_OneStopBit'
+      - bitCountPerChar: 'kUSART_8BitsPerChar'
+      - loopback: 'false'
+      - txWatermark: 'kUSART_TxFifo0'
+      - rxWatermark: 'kUSART_RxFifo1'
+      - enableRx: 'true'
+      - enableTx: 'true'
+      - clockPolarity: 'kUSART_RxSampleOnFallingEdge'
+      - enableContinuousSCLK: 'false'
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+const usart_config_t DEBUG_UART_config = {
+  .baudRate_Bps = 115200UL,
+  .syncMode = kUSART_SyncModeDisabled,
+  .parityMode = kUSART_ParityDisabled,
+  .stopBitCount = kUSART_OneStopBit,
+  .bitCountPerChar = kUSART_8BitsPerChar,
+  .loopback = false,
+  .txWatermark = kUSART_TxFifo0,
+  .rxWatermark = kUSART_RxFifo1,
+  .enableRx = true,
+  .enableTx = true,
+  .enableMode32k = false,
+  .clockPolarity = kUSART_RxSampleOnFallingEdge,
+  .enableContinuousSCLK = false
+};
+
+static void DEBUG_UART_init(void) {
+  /* Reset FLEXCOMM device */
+  RESET_PeripheralReset(kFC0_RST_SHIFT_RSTn);
+  USART_Init(DEBUG_UART_PERIPHERAL, &DEBUG_UART_config, DEBUG_UART_CLOCK_SOURCE);
+}
+
+/***********************************************************************************************************************
+ * NVIC initialization code
+ **********************************************************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+instance:
+- name: 'NVIC'
+- type: 'nvic'
+- mode: 'general'
+- custom_name_enabled: 'false'
+- type_id: 'nvic'
+- functional_group: 'BOARD_InitPeripherals_cm33_core0'
+- peripheral: 'NVIC'
+- config_sets:
+  - nvic:
+    - interrupt_table: []
+    - interrupts: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/* Empty initialization function (commented out)
+static void NVIC_init(void) {
+} */
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+void BOARD_InitPeripherals_cm33_core0(void)
+{
+  /* Initialize components */
+  DEBUG_UART_init();
+}
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void)
+{
+  BOARD_InitPeripherals_cm33_core0();
+}
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/peripherals.h b/hw/bsp/lpc55/boards/mcu_link/board/peripherals.h
new file mode 100644
index 000000000..fc4d72c33
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/peripherals.h
@@ -0,0 +1,57 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PERIPHERALS_H_
+#define _PERIPHERALS_H_
+
+/***********************************************************************************************************************
+ * Included files
+ **********************************************************************************************************************/
+#include "fsl_common.h"
+#include "fsl_reset.h"
+#include "fsl_usart.h"
+#include "fsl_clock.h"
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus */
+
+/***********************************************************************************************************************
+ * Definitions
+ **********************************************************************************************************************/
+/* Definitions for BOARD_InitPeripherals_cm33_core0 functional group */
+/* Definition of peripheral ID */
+#define DEBUG_UART_PERIPHERAL ((USART_Type *)FLEXCOMM0)
+/* Definition of the clock source frequency */
+#define DEBUG_UART_CLOCK_SOURCE 48000000UL
+
+/***********************************************************************************************************************
+ * Global variables
+ **********************************************************************************************************************/
+extern const usart_config_t DEBUG_UART_config;
+
+/***********************************************************************************************************************
+ * Initialization functions
+ **********************************************************************************************************************/
+
+void BOARD_InitPeripherals_cm33_core0(void);
+
+/***********************************************************************************************************************
+ * BOARD_InitBootPeripherals function
+ **********************************************************************************************************************/
+void BOARD_InitBootPeripherals(void);
+
+#if defined(__cplusplus)
+}
+#endif
+
+#endif /* _PERIPHERALS_H_ */
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.c b/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.c
new file mode 100644
index 000000000..a673302e5
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.c
@@ -0,0 +1,839 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Pins v17.0
+processor: LPC55S69
+package_id: LPC55S69JBD100
+mcu_data: ksdk2_0
+processor_version: 25.09.10
+board: LPCXpresso55S69
+expansion_headers:
+- id: lpc_style_arduino
+  name: LPCXpresso V3 (Arduino compatible)
+  connectors:
+  - id: C1
+    name: P16
+    pins:
+    - {id: 8, name: 3.3V, external_signal_types: power_supply_3.3V}
+    - {id: 10, name: RESET, pin_num: '32', pin_signal: RESETN}
+    - {id: 12, name: 3.3V, external_signal_types: power_supply_3.3V}
+    - {id: 14, name: 5V, external_signal_types: power_supply_5V}
+    - {id: 16, name: GND, external_signal_types: ground}
+    - {id: 18, name: GND, external_signal_types: ground}
+    - {id: 20, name: 5V, external_signal_types: power_supply_5V}
+  - id: C2
+    name: P17
+    pins:
+    - {id: 1, name: D15, pin_num: '4', pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2}
+    - {id: 3, name: D14, pin_num: '30', pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3}
+    - {id: 5, name: 3.3V, external_signal_types: power_supply_3.3V}
+    - {id: 6, pin_num: '93', pin_signal: PIO1_11/FC1_TXD_SCL_MISO_WS/CT_INP5/USB0_VBUS}
+    - {id: 7, name: GND, external_signal_types: ground}
+    - {id: 8, pin_num: '88', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5}
+    - {id: 9, name: D13, pin_num: '61', pin_signal: PIO1_2/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5}
+    - {id: 10, pin_num: '74', pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS}
+    - {id: 11, name: D12, pin_num: '62', pin_signal: PIO1_3/SCT0_OUT4/HS_SPI_MISO/USB0_PORTPWRN/PLU_OUT6}
+    - {id: 12, pin_num: '90', pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19}
+    - {id: 13, name: D11, pin_num: '60', pin_signal: PIO0_26/FC2_RXD_SDA_MOSI_DATA/CLKOUT/CT_INP14/SCT0_OUT5/USB0_IDVALUE/FC0_SCK/HS_SPI_MOSI/SECURE_GPIO0_26}
+    - {id: 14, pin_num: '76', pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21}
+    - {id: 15, name: D10, pin_num: '59', pin_signal: PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4}
+    - {id: 16, pin_num: '85', pin_signal: PIO1_27/FC2_RTS_SCL_SSEL1/SD0_D4/CTIMER0_MAT3/CLKOUT/PLU_IN4}
+    - {id: 17, name: D9, pin_num: '31', pin_signal: PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0}
+    - {id: 18, pin_num: '73', pin_signal: PIO1_28/FC7_SCK/SD0_D5/CT_INP2/PLU_IN3}
+    - {id: 19, name: D8, pin_num: '24', pin_signal: PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4}
+    - {id: 20, pin_num: '2', pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N}
+  - id: C3
+    name: P18
+    pins:
+    - {id: 1, name: D7, pin_num: '10', pin_signal: PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12}
+    - {id: 2, pin_num: '7', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1}
+    - {id: 3, name: D6, pin_num: '40', pin_signal: PIO1_10/FC1_RXD_SDA_MOSI_DATA/CTIMER1_MAT0/SCT0_OUT3}
+    - {id: 4, pin_num: '57', pin_signal: PIO1_14/UTICK_CAP2/CTIMER1_MAT2/FC5_CTS_SDA_SSEL0/USB0_LEDN/SD1_CMD/ACMP0_D}
+    - {id: 5, name: D5, pin_num: '1', pin_signal: PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A}
+    - {id: 6, pin_num: '77', pin_signal: PIO1_25/FC2_TXD_SCL_MISO_WS/SCT0_OUT2/SD1_D0/UTICK_CAP0/PLU_CLKIN}
+    - {id: 7, name: D4-LED_GREEN, pin_num: '9', pin_signal: PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4}
+    - {id: 8, pin_num: '42', pin_signal: PIO1_23/FC2_SCK/SCT0_OUT0/SD1_D3/FC3_SSEL2/PLU_OUT5}
+    - {id: 10, pin_num: '3', pin_signal: PIO1_24/FC2_RXD_SDA_MOSI_DATA/SCT0_OUT1/SD1_D1/FC3_SSEL3/PLU_OUT6}
+    - {id: 11, name: D2, pin_num: '22', pin_signal: PIO0_15/FC6_CTS_SDA_SSEL0/UTICK_CAP2/CT_INP16/SCT0_OUT2/SD0_WR_PRT/SECURE_GPIO0_15/ADC0_2}
+    - {id: 12, pin_num: '82', pin_signal: PIO1_15/UTICK_CAP3/CT_INP7/FC5_RTS_SCL_SSEL1/FC4_RTS_SCL_SSEL1/SD1_D2}
+    - {id: 13, name: D1, pin_num: '27', pin_signal: PIO0_27/FC2_TXD_SCL_MISO_WS/CTIMER3_MAT2/SCT0_OUT6/FC7_RXD_SDA_MOSI_DATA/PLU_OUT0/SECURE_GPIO0_27}
+    - {id: 14, pin_num: '58', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF}
+    - {id: 15, name: D0, pin_num: '3', pin_signal: PIO1_24/FC2_RXD_SDA_MOSI_DATA/SCT0_OUT1/SD1_D1/FC3_SSEL3/PLU_OUT6}
+    - {id: 16, pin_num: '64', pin_signal: PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0}
+    - {id: 17, pin_num: '87', pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD}
+    - {id: 18, pin_num: '68', pin_signal: PIO1_26/FC2_CTS_SDA_SSEL0/SCT0_OUT3/CT_INP3/UTICK_CAP1/HS_SPI_SSEL3/PLU_IN5}
+    - {id: 19, pin_num: '43', pin_signal: PIO1_17/FC6_RTS_SCL_SSEL1/SCT0_OUT4/SD1_CARD_INT_N/SD1_CARD_DET_N}
+    - {id: 20, pin_num: '56', pin_signal: PIO0_18/FC4_CTS_SDA_SSEL0/SD0_WR_PRT/CTIMER1_MAT0/SCT0_OUT1/PLU_IN3/SECURE_GPIO0_18/ACMP0_C}
+  - id: C4
+    name: P19
+    pins:
+    - {id: 2, name: A0, pin_num: '14', pin_signal: PIO0_16/FC4_TXD_SCL_MISO_WS/CLKOUT/CT_INP4/SECURE_GPIO0_16/ADC0_8}
+    - {id: 4, name: A1, pin_num: '20', pin_signal: PIO0_23/MCLK/CTIMER1_MAT2/CTIMER3_MAT3/SCT0_OUT4/FC0_CTS_SDA_SSEL0/SD1_D1/SECURE_GPIO0_23/ADC0_0}
+    - {id: 6, name: A2, pin_num: '54', pin_signal: PIO0_0/FC3_SCK/CTIMER0_MAT0/SCT_GPI0/SD1_CARD_INT_N/SECURE_GPIO0_0/ACMP0_A}
+    - {id: 7, pin_num: '91', pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0}
+    - {id: 8, name: A3, pin_num: '91', pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0}
+    - {id: 9, pin_num: '71', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13}
+    - {id: 10, name: A4, pin_num: '71', pin_signal: PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13}
+    - {id: 11, pin_num: '72', pin_signal: PIO0_14/FC1_RTS_SCL_SSEL1/UTICK_CAP1/CT_INP1/SCT_GPI1/FC1_TXD_SCL_MISO_WS/PLU_IN1/SECURE_GPIO0_14}
+    - {id: 12, name: A5, pin_num: '72', pin_signal: PIO0_14/FC1_RTS_SCL_SSEL1/UTICK_CAP1/CT_INP1/SCT_GPI1/FC1_TXD_SCL_MISO_WS/PLU_IN1/SECURE_GPIO0_14}
+pin_labels:
+- {pin_num: '7', pin_signal: PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1, label: 'P18[2]/SD1_CLK', identifier: LED_RED}
+- {pin_num: '88', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, label: 'S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1',
+  identifier: LED}
+- {pin_num: '11', pin_signal: PIO1_0/FC0_RTS_SCL_SSEL1/SD0_D3/CT_INP2/SCT_GPI4/PLU_OUT3/ADC0_11, label: 'U20[2]/SD0_D3', identifier: BUTTON}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+#include "fsl_common.h"
+#include "fsl_gpio.h"
+#include "fsl_iocon.h"
+#include "pin_mux.h"
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBootPins
+ * Description   : Calls initialization functions.
+ *
+ * END ****************************************************************************************************************/
+void BOARD_InitBootPins(void)
+{
+    BOARD_InitDEBUG_UARTPins();
+    BOARD_InitUSBPins();
+    BOARD_InitLEDsPins();
+    BOARD_InitBUTTONsPins();
+    BOARD_InitPins_Core0();
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitDEBUG_UARTPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '92', peripheral: FLEXCOMM0, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '94', peripheral: FLEXCOMM0, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitDEBUG_UARTPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitDEBUG_UARTPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_UART_RX = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN, DEBUG_UART_RX);
+
+    const uint32_t DEBUG_UART_TX = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */
+                                    IOCON_PIO_FUNC1 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT, BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN, DEBUG_UART_TX);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitSWD_DEBUGPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '13', peripheral: SWD, signal: SWCLK, pin_signal: PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9, mode: pullDown,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '12', peripheral: SWD, signal: SWDIO, pin_signal: PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '21', peripheral: SWD, signal: SWO, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1, identifier: DEBUG_SWD_SWO,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitSWD_DEBUGPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitSWD_DEBUGPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t DEBUG_SWD_SWO = (/* Pin is configured as SWO */
+                                    IOCON_PIO_FUNC6 |
+                                    /* No addition pin function */
+                                    IOCON_PIO_MODE_INACT |
+                                    /* Standard mode, output slew rate control is enabled */
+                                    IOCON_PIO_SLEW_STANDARD |
+                                    /* Input function is not inverted */
+                                    IOCON_PIO_INV_DI |
+                                    /* Enables digital function */
+                                    IOCON_PIO_DIGITAL_EN |
+                                    /* Open drain is disabled */
+                                    IOCON_PIO_OPENDRAIN_DI |
+                                    /* Analog switch is open (disabled) */
+                                    IOCON_PIO_ASW_DI);
+    /* PORT0 PIN10 (coords: 21) is configured as SWO */
+    IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN, DEBUG_SWD_SWO);
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled) */
+                                           IOCON_PIO_ASW_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDCLK = (/* Pin is configured as SWCLK */
+                                           IOCON_PIO_FUNC6 |
+                                           /* Selects pull-down function */
+                                           IOCON_PIO_MODE_PULLDOWN |
+                                           /* Standard mode, output slew rate control is enabled */
+                                           IOCON_PIO_SLEW_STANDARD |
+                                           /* Input function is not inverted */
+                                           IOCON_PIO_INV_DI |
+                                           /* Enables digital function */
+                                           IOCON_PIO_DIGITAL_EN |
+                                           /* Open drain is disabled */
+                                           IOCON_PIO_OPENDRAIN_DI |
+                                           /* Analog switch is closed (enabled), only for A0 version */
+                                           IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN11 (coords: 13) is configured as SWCLK */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN, DEBUG_SWD_SWDCLK);
+    }
+
+    if (Chip_GetVersion()==1)
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled) */
+                                          IOCON_PIO_ASW_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+    else
+    {
+        const uint32_t DEBUG_SWD_SWDIO = (/* Pin is configured as SWDIO */
+                                          IOCON_PIO_FUNC6 |
+                                          /* Selects pull-up function */
+                                          IOCON_PIO_MODE_PULLUP |
+                                          /* Standard mode, output slew rate control is enabled */
+                                          IOCON_PIO_SLEW_STANDARD |
+                                          /* Input function is not inverted */
+                                          IOCON_PIO_INV_DI |
+                                          /* Enables digital function */
+                                          IOCON_PIO_DIGITAL_EN |
+                                          /* Open drain is disabled */
+                                          IOCON_PIO_OPENDRAIN_DI |
+                                          /* Analog switch is closed (enabled), only for A0 version */
+                                          IOCON_PIO_ASW_DIS_EN);
+        /* PORT0 PIN12 (coords: 12) is configured as SWDIO */
+        IOCON_PinMuxSet(IOCON, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT, BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN, DEBUG_SWD_SWDIO);
+    }
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitUSBPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '97', peripheral: USBFSH, signal: USB_DP, pin_signal: USB0_DP}
+  - {pin_num: '98', peripheral: USBFSH, signal: USB_DM, pin_signal: USB0_DM}
+  - {pin_num: '78', peripheral: USBFSH, signal: USB_VBUS, pin_signal: PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22,
+    mode: inactive, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '35', peripheral: USBHSH, signal: USB_DM, pin_signal: USB1_DM}
+  - {pin_num: '34', peripheral: USBHSH, signal: USB_DP, pin_signal: USB1_DP}
+  - {pin_num: '36', peripheral: USBHSH, signal: USB_VBUS, pin_signal: USB1_VBUS}
+  - {pin_num: '65', peripheral: USBHSH, signal: USB_OVERCURRENTN, pin_signal: PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1, mode: pullUp}
+  - {pin_num: '66', peripheral: USBFSH, signal: USB_OVERCURRENTN, pin_signal: PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28,
+    mode: pullUp}
+  - {pin_num: '67', peripheral: USBFSH, signal: USB_PORTPWRN, pin_signal: PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2, mode: pullUp}
+  - {pin_num: '80', peripheral: USBHSH, signal: USB_PORTPWRN, pin_signal: PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2, mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitUSBPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitUSBPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t USB0_VBUS = (/* Pin is configured as USB0_VBUS */
+                                IOCON_PIO_FUNC7 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN22 (coords: 78) is configured as USB0_VBUS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITUSBPINS_USB0_VBUS_PORT, BOARD_INITUSBPINS_USB0_VBUS_PIN, USB0_VBUS);
+
+    IOCON->PIO[0][28] = ((IOCON->PIO[0][28] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT028 (pin 66) is configured as USB0_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO0_28_FUNC_ALT7)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO0_28_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO0_28_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][12] = ((IOCON->PIO[1][12] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT112 (pin 67) is configured as USB0_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_12_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_12_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_12_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][29] = ((IOCON->PIO[1][29] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT129 (pin 80) is configured as USB1_PORTPWRN. */
+                         | IOCON_PIO_FUNC(PIO1_29_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_29_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_29_DIGIMODE_DIGITAL));
+
+    IOCON->PIO[1][30] = ((IOCON->PIO[1][30] &
+                          /* Mask bits to zero which are setting */
+                          (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                         /* Selects pin function.
+                          * : PORT130 (pin 65) is configured as USB1_OVERCURRENTN. */
+                         | IOCON_PIO_FUNC(PIO1_30_FUNC_ALT4)
+
+                         /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                          * : Pull-up.
+                          * Pull-up resistor enabled. */
+                         | IOCON_PIO_MODE(PIO1_30_MODE_PULL_UP)
+
+                         /* Select Digital mode.
+                          * : Enable Digital mode.
+                          * Digital input is enabled. */
+                         | IOCON_PIO_DIGIMODE(PIO1_30_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitLEDsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '88', peripheral: GPIO, signal: 'PIO0, 5', pin_signal: PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5, direction: OUTPUT,
+    gpio_init_state: 'true', mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitLEDsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitLEDsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO0 module */
+    CLOCK_EnableClock(kCLOCK_Gpio0);
+
+    gpio_pin_config_t LED_config = {
+        .pinDirection = kGPIO_DigitalOutput,
+        .outputLogic = 1U
+    };
+    /* Initialize GPIO functionality on pin PIO0_5 (pin 88)  */
+    GPIO_PinInit(BOARD_INITLEDSPINS_LED_GPIO, BOARD_INITLEDSPINS_LED_PORT, BOARD_INITLEDSPINS_LED_PIN, &LED_config);
+
+    IOCON->PIO[0][5] = ((IOCON->PIO[0][5] &
+                         /* Mask bits to zero which are setting */
+                         (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                        /* Selects pin function.
+                         * : PORT05 (pin 88) is configured as PIO0_5. */
+                        | IOCON_PIO_FUNC(PIO0_5_FUNC_ALT0)
+
+                        /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                         * : Pull-up.
+                         * Pull-up resistor enabled. */
+                        | IOCON_PIO_MODE(PIO0_5_MODE_PULL_UP)
+
+                        /* Select Digital mode.
+                         * : Enable Digital mode.
+                         * Digital input is enabled. */
+                        | IOCON_PIO_DIGIMODE(PIO0_5_DIGIMODE_DIGITAL));
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitBUTTONsPins:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '32', peripheral: SYSCON, signal: RESET, pin_signal: RESETN}
+  - {pin_num: '11', peripheral: GPIO, signal: 'PIO1, 0', pin_signal: PIO1_0/FC0_RTS_SCL_SSEL1/SD0_D3/CT_INP2/SCT_GPI4/PLU_OUT3/ADC0_11, direction: INPUT, mode: pullUp}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitBUTTONsPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitBUTTONsPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t BUTTON_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_0 (pin 11)  */
+    GPIO_PinInit(BOARD_INITBUTTONSPINS_BUTTON_GPIO, BOARD_INITBUTTONSPINS_BUTTON_PORT, BOARD_INITBUTTONSPINS_BUTTON_PIN, &BUTTON_config);
+
+    if (Chip_GetVersion()==1)
+    {
+        IOCON->PIO[1][0] = ((IOCON->PIO[1][0] &
+                         /* Mask bits to zero which are setting */
+                         (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                        /* Selects pin function.
+                         * : PORT10 (pin 11) is configured as PIO1_0. */
+                        | IOCON_PIO_FUNC(PIO1_0_FUNC_ALT0)
+
+                        /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                         * : Pull-up.
+                         * Pull-up resistor enabled. */
+                        | IOCON_PIO_MODE(PIO1_0_MODE_PULL_UP)
+
+                        /* Select Digital mode.
+                         * : Enable Digital mode.
+                         * Digital input is enabled. */
+                        | IOCON_PIO_DIGIMODE(PIO1_0_DIGIMODE_DIGITAL));
+    }
+    else
+    {
+        IOCON->PIO[1][0] = ((IOCON->PIO[1][0] &
+                         /* Mask bits to zero which are setting */
+                         (~(IOCON_PIO_FUNC_MASK | IOCON_PIO_MODE_MASK | IOCON_PIO_DIGIMODE_MASK)))
+
+                        /* Selects pin function.
+                         * : PORT10 (pin 11) is configured as PIO1_0. */
+                        | IOCON_PIO_FUNC(PIO1_0_FUNC_ALT0)
+
+                        /* Selects function mode (on-chip pull-up/pull-down resistor control).
+                         * : Pull-up.
+                         * Pull-up resistor enabled. */
+                        | IOCON_PIO_MODE(PIO1_0_MODE_PULL_UP)
+
+                        /* Select Digital mode.
+                         * : Enable Digital mode.
+                         * Digital input is enabled. */
+                        | IOCON_PIO_DIGIMODE(PIO1_0_DIGIMODE_DIGITAL));
+    }
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitPins_Core0:
+- options: {callFromInitBoot: 'true', coreID: cm33_core0, enableClock: 'true'}
+- pin_list: []
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitPins_Core0
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitPins_Core0(void)
+{
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitI2SPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '91', peripheral: SYSCON, signal: MCLK, pin_signal: PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0, mode: inactive, slew_rate: standard, invert: disabled,
+    open_drain: disabled}
+  - {pin_num: '76', peripheral: FLEXCOMM7, signal: SCK, pin_signal: PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '74', peripheral: FLEXCOMM7, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '90', peripheral: FLEXCOMM7, signal: TXD_SCL_MISO_WS, pin_signal: PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '21', peripheral: FLEXCOMM6, signal: SCK, pin_signal: PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1,
+    identifier: FC6_I2S_CLK, mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled, asw: enabled}
+  - {pin_num: '2', peripheral: FLEXCOMM6, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N,
+    mode: pullUp, slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '87', peripheral: FLEXCOMM6, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitI2SPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitI2SPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    const uint32_t FC6_I2S_CLK = (/* Pin is configured as FC6_SCK */
+                                  IOCON_PIO_FUNC1 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI |
+                                  /* Analog switch is closed (enabled) */
+                                  IOCON_PIO_ASW_EN);
+    /* PORT0 PIN10 (coords: 21) is configured as FC6_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_CLK_PORT, BOARD_INITI2SPINS_FC6_I2S_CLK_PIN, FC6_I2S_CLK);
+
+    const uint32_t FC7_I2S_WS = (/* Pin is configured as FC7_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN19 (coords: 90) is configured as FC7_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_WS_PORT, BOARD_INITI2SPINS_FC7_I2S_WS_PIN, FC7_I2S_WS);
+
+    const uint32_t FC7_I2S_TX = (/* Pin is configured as FC7_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC7 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN20 (coords: 74) is configured as FC7_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_TX_PORT, BOARD_INITI2SPINS_FC7_I2S_TX_PIN, FC7_I2S_TX);
+
+    const uint32_t FC7_I2S_SCK = (/* Pin is configured as FC7_SCK */
+                                  IOCON_PIO_FUNC7 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT0 PIN21 (coords: 76) is configured as FC7_SCK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC7_I2S_SCK_PORT, BOARD_INITI2SPINS_FC7_I2S_SCK_PIN, FC7_I2S_SCK);
+
+    const uint32_t FC6_I2S_RX = (/* Pin is configured as FC6_RXD_SDA_MOSI_DATA */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN13 (coords: 2) is configured as FC6_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_RX_PORT, BOARD_INITI2SPINS_FC6_I2S_RX_PIN, FC6_I2S_RX);
+
+    const uint32_t FC6_I2S_WS = (/* Pin is configured as FC6_TXD_SCL_MISO_WS */
+                                 IOCON_PIO_FUNC2 |
+                                 /* Selects pull-up function */
+                                 IOCON_PIO_MODE_PULLUP |
+                                 /* Standard mode, output slew rate control is enabled */
+                                 IOCON_PIO_SLEW_STANDARD |
+                                 /* Input function is not inverted */
+                                 IOCON_PIO_INV_DI |
+                                 /* Enables digital function */
+                                 IOCON_PIO_DIGITAL_EN |
+                                 /* Open drain is disabled */
+                                 IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN16 (coords: 87) is configured as FC6_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC6_I2S_WS_PORT, BOARD_INITI2SPINS_FC6_I2S_WS_PIN, FC6_I2S_WS);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SCL_PORT, BOARD_INITI2SPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_FC4_I2C_SDA_PORT, BOARD_INITI2SPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+
+    const uint32_t MCLK = (/* Pin is configured as MCLK */
+                           IOCON_PIO_FUNC1 |
+                           /* No addition pin function */
+                           IOCON_PIO_MODE_INACT |
+                           /* Standard mode, output slew rate control is enabled */
+                           IOCON_PIO_SLEW_STANDARD |
+                           /* Input function is not inverted */
+                           IOCON_PIO_INV_DI |
+                           /* Enables digital function */
+                           IOCON_PIO_DIGITAL_EN |
+                           /* Open drain is disabled */
+                           IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN31 (coords: 91) is configured as MCLK */
+    IOCON_PinMuxSet(IOCON, BOARD_INITI2SPINS_MCLK_PORT, BOARD_INITI2SPINS_MCLK_PIN, MCLK);
+}
+
+/* clang-format off */
+/*
+ * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+BOARD_InitACCELPins:
+- options: {callFromInitBoot: 'false', coreID: cm33_core0, enableClock: 'true'}
+- pin_list:
+  - {pin_num: '30', peripheral: FLEXCOMM4, signal: RXD_SDA_MOSI_DATA, pin_signal: PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3, mode: pullUp,
+    slew_rate: standard, invert: disabled, open_drain: disabled}
+  - {pin_num: '4', peripheral: FLEXCOMM4, signal: TXD_SCL_MISO_WS, pin_signal: PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2, mode: pullUp, slew_rate: standard,
+    invert: disabled, open_drain: disabled}
+  - {pin_num: '58', peripheral: GPIO, signal: 'PIO1, 19', pin_signal: PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF, direction: INPUT, mode: inactive,
+    slew_rate: standard, invert: disabled, open_drain: disabled, asw: disabled}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
+ */
+/* clang-format on */
+
+/* FUNCTION ************************************************************************************************************
+ *
+ * Function Name : BOARD_InitACCELPins
+ * Description   : Configures pin routing and optionally pin electrical features.
+ *
+ * END ****************************************************************************************************************/
+/* Function assigned for the Cortex-M33 (Core #0) */
+void BOARD_InitACCELPins(void)
+{
+    /* Enables the clock for the I/O controller.: Enable Clock. */
+    CLOCK_EnableClock(kCLOCK_Iocon);
+
+    /* Enables the clock for the GPIO1 module */
+    CLOCK_EnableClock(kCLOCK_Gpio1);
+
+    gpio_pin_config_t ACCL_INTR_config = {
+        .pinDirection = kGPIO_DigitalInput,
+        .outputLogic = 0U
+    };
+    /* Initialize GPIO functionality on pin PIO1_19 (pin 58)  */
+    GPIO_PinInit(BOARD_INITACCELPINS_ACCL_INTR_GPIO, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, &ACCL_INTR_config);
+
+    const uint32_t ACCL_INTR = (/* Pin is configured as PIO1_19 */
+                                IOCON_PIO_FUNC0 |
+                                /* No addition pin function */
+                                IOCON_PIO_MODE_INACT |
+                                /* Standard mode, output slew rate control is enabled */
+                                IOCON_PIO_SLEW_STANDARD |
+                                /* Input function is not inverted */
+                                IOCON_PIO_INV_DI |
+                                /* Enables digital function */
+                                IOCON_PIO_DIGITAL_EN |
+                                /* Open drain is disabled */
+                                IOCON_PIO_OPENDRAIN_DI |
+                                /* Analog switch is open (disabled) */
+                                IOCON_PIO_ASW_DI);
+    /* PORT1 PIN19 (coords: 58) is configured as PIO1_19 */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_ACCL_INTR_PORT, BOARD_INITACCELPINS_ACCL_INTR_PIN, ACCL_INTR);
+
+    const uint32_t FC4_I2C_SCL = (/* Pin is configured as FC4_TXD_SCL_MISO_WS */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN20 (coords: 4) is configured as FC4_TXD_SCL_MISO_WS */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SCL_PORT, BOARD_INITACCELPINS_FC4_I2C_SCL_PIN, FC4_I2C_SCL);
+
+    const uint32_t FC4_I2C_SDA = (/* Pin is configured as FC4_RXD_SDA_MOSI_DATA */
+                                  IOCON_PIO_FUNC5 |
+                                  /* Selects pull-up function */
+                                  IOCON_PIO_MODE_PULLUP |
+                                  /* Standard mode, output slew rate control is enabled */
+                                  IOCON_PIO_SLEW_STANDARD |
+                                  /* Input function is not inverted */
+                                  IOCON_PIO_INV_DI |
+                                  /* Enables digital function */
+                                  IOCON_PIO_DIGITAL_EN |
+                                  /* Open drain is disabled */
+                                  IOCON_PIO_OPENDRAIN_DI);
+    /* PORT1 PIN21 (coords: 30) is configured as FC4_RXD_SDA_MOSI_DATA */
+    IOCON_PinMuxSet(IOCON, BOARD_INITACCELPINS_FC4_I2C_SDA_PORT, BOARD_INITACCELPINS_FC4_I2C_SDA_PIN, FC4_I2C_SDA);
+}
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.h b/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.h
new file mode 100644
index 000000000..3e14d6baf
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/board/pin_mux.h
@@ -0,0 +1,393 @@
+/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _PIN_MUX_H_
+#define _PIN_MUX_H_
+
+/*!
+ * @addtogroup pin_mux
+ * @{
+ */
+
+/***********************************************************************************************************************
+ * API
+ **********************************************************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/*!
+ * @brief Calls initialization functions.
+ *
+ */
+void BOARD_InitBootPins(void);
+
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_29 (number 92), P8[2]/U6[13]/FC0_USART_RXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN 29U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_RX_PIN_MASK (1U << 29U)
+/* @} */
+
+/*! @name PIO0_30 (number 94), P8[3]/U6[12]/FC0_USART_TXD
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN 30U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITDEBUG_UARTPINS_DEBUG_UART_TX_PIN_MASK (1U << 30U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitDEBUG_UARTPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_ASW_DIS_EN 0x00u    /*!<@brief Analog switch is closed (enabled), only for A0 version */
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC6 0x06u         /*!<@brief Selects pin function 6 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLDOWN 0x10u /*!<@brief Selects pull-down function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO0_11 (number 13), U14[4]/SWDCLK_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN 11U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDCLK_PIN_MASK (1U << 11U)
+/* @} */
+
+/*! @name PIO0_12 (number 12), U15[4]/D7/P7[2]/IF_SWDIO
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN 12U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWDIO_PIN_MASK (1U << 12U)
+/* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+/*!
+ * @brief PORT peripheral base pointer */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PORT 0U
+/*!
+ * @brief PORT pin number */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN 10U
+/*!
+ * @brief PORT pin mask */
+#define BOARD_INITSWD_DEBUGPINS_DEBUG_SWD_SWO_PIN_MASK (1U << 10U)
+/* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitSWD_DEBUGPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Enables digital function */
+#define IOCON_PIO_DIGITAL_EN 0x0100u
+/*!
+ * @brief Selects pin function 7 */
+#define IOCON_PIO_FUNC7 0x07u
+/*!
+ * @brief Input function is not inverted */
+#define IOCON_PIO_INV_DI 0x00u
+/*!
+ * @brief No addition pin function */
+#define IOCON_PIO_MODE_INACT 0x00u
+/*!
+ * @brief Open drain is disabled */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u
+/*!
+ * @brief Standard mode, output slew rate control is enabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_28_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 7. */
+#define PIO0_28_FUNC_ALT7 0x07u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO0_28_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_12_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_12_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_12_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_29_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_29_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_29_MODE_PULL_UP 0x02u
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_30_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 4. */
+#define PIO1_30_FUNC_ALT4 0x04u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_30_MODE_PULL_UP 0x02u
+
+/*! @name PIO0_22 (number 78), P10[1]/USB0_VBUS
+  @{ */
+#define BOARD_INITUSBPINS_USB0_VBUS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN 22U                   /*!<@brief PORT pin number */
+#define BOARD_INITUSBPINS_USB0_VBUS_PIN_MASK (1U << 22U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitUSBPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO0_5_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 0. */
+#define PIO0_5_FUNC_ALT0 0x00u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO0_5_MODE_PULL_UP 0x02u
+
+/*! @name PIO0_5 (number 88), S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITLEDSPINS_LED_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_INIT_GPIO_VALUE 1U       /*!<@brief GPIO output initial state */
+#define BOARD_INITLEDSPINS_LED_GPIO_PIN_MASK (1U << 5U) /*!<@brief GPIO pin mask */
+#define BOARD_INITLEDSPINS_LED_PORT 0U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITLEDSPINS_LED_PIN 5U                   /*!<@brief PORT pin number */
+#define BOARD_INITLEDSPINS_LED_PIN_MASK (1U << 5U)      /*!<@brief PORT pin mask */
+                                                        /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitLEDsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Select Digital mode.: Enable Digital mode. Digital input is enabled. */
+#define PIO1_0_DIGIMODE_DIGITAL 0x01u
+/*!
+ * @brief Selects pin function.: Alternative connection 0. */
+#define PIO1_0_FUNC_ALT0 0x00u
+/*!
+ * @brief Selects function mode (on-chip pull-up/pull-down resistor control).: Pull-up. Pull-up resistor enabled. */
+#define PIO1_0_MODE_PULL_UP 0x02u
+
+/*! @name PIO1_0 (number 11), U20[2]/SD0_D3
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITBUTTONSPINS_BUTTON_GPIO GPIO                /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_BUTTON_GPIO_PIN_MASK (1U << 0U) /*!<@brief GPIO pin mask */
+#define BOARD_INITBUTTONSPINS_BUTTON_PORT 1U                  /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITBUTTONSPINS_BUTTON_PIN 0U                   /*!<@brief PORT pin number */
+#define BOARD_INITBUTTONSPINS_BUTTON_PIN_MASK (1U << 0U)      /*!<@brief PORT pin mask */
+                                                              /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitBUTTONsPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitPins_Core0(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_EN 0x0400u      /*!<@brief Analog switch is closed (enabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC1 0x01u         /*!<@brief Selects pin function 1 */
+#define IOCON_PIO_FUNC2 0x02u         /*!<@brief Selects pin function 2 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_FUNC7 0x07u         /*!<@brief Selects pin function 7 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_31 (number 91), P19[7]/P19[8]/PLU_IN0/GPIO
+  @{ */
+#define BOARD_INITI2SPINS_MCLK_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_MCLK_PIN 31U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_MCLK_PIN_MASK (1U << 31U)      /*!<@brief PORT pin mask */
+                                                         /* @} */
+
+/*! @name PIO0_21 (number 76), P17[14]/FC7_I2S_SCK
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_SCK_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO0_20 (number 74), P17[10]/FC7_I2S_TX
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_TX_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_19 (number 90), P17[12]/FC7_I2S_WS
+  @{ */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC7_I2S_WS_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO0_10 (number 21), U14[12]/SWO_TRGT
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PORT 0U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN 10U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_CLK_PIN_MASK (1U << 10U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*! @name PIO1_13 (number 2), P17[20]/FC6_I2S_RX
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN 13U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_RX_PIN_MASK (1U << 13U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*! @name PIO1_16 (number 87), P18[17]/SD1_PWR_EN
+  @{ */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN 16U                   /*!<@brief PORT pin number */
+#define BOARD_INITI2SPINS_FC6_I2S_WS_PIN_MASK (1U << 16U)      /*!<@brief PORT pin mask */
+                                                               /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitI2SPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#define IOCON_PIO_ASW_DI 0x00u        /*!<@brief Analog switch is open (disabled) */
+#define IOCON_PIO_DIGITAL_EN 0x0100u  /*!<@brief Enables digital function */
+#define IOCON_PIO_FUNC0 0x00u         /*!<@brief Selects pin function 0 */
+#define IOCON_PIO_FUNC5 0x05u         /*!<@brief Selects pin function 5 */
+#define IOCON_PIO_INV_DI 0x00u        /*!<@brief Input function is not inverted */
+#define IOCON_PIO_MODE_INACT 0x00u    /*!<@brief No addition pin function */
+#define IOCON_PIO_MODE_PULLUP 0x20u   /*!<@brief Selects pull-up function */
+#define IOCON_PIO_OPENDRAIN_DI 0x00u  /*!<@brief Open drain is disabled */
+#define IOCON_PIO_SLEW_STANDARD 0x00u /*!<@brief Standard mode, output slew rate control is enabled */
+
+/*! @name PIO1_21 (number 30), P17[3]/P24[6]/FC4_I2C_SDA_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN 21U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SDA_PIN_MASK (1U << 21U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_20 (number 4), P17[1]/P24[5]/FC4_I2C_SCL_ARD
+  @{ */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN 20U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_FC4_I2C_SCL_PIN_MASK (1U << 20U)      /*!<@brief PORT pin mask */
+                                                                  /* @} */
+
+/*! @name PIO1_19 (number 58), U7[3]/P18[14]/PLU_OUT1/GPIO
+  @{ */
+
+/* Symbols to be used with GPIO driver */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO GPIO                 /*!<@brief GPIO peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_GPIO_PIN_MASK (1U << 19U) /*!<@brief GPIO pin mask */
+#define BOARD_INITACCELPINS_ACCL_INTR_PORT 1U                   /*!<@brief PORT peripheral base pointer */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN 19U                   /*!<@brief PORT pin number */
+#define BOARD_INITACCELPINS_ACCL_INTR_PIN_MASK (1U << 19U)      /*!<@brief PORT pin mask */
+                                                                /* @} */
+
+/*!
+ * @brief Configures pin routing and optionally pin electrical features.
+ *
+ */
+void BOARD_InitACCELPins(void); /* Function assigned for the Cortex-M33 (Core #0) */
+
+#if defined(__cplusplus)
+}
+#endif
+
+/*!
+ * @}
+ */
+#endif /* _PIN_MUX_H_ */
+
+/***********************************************************************************************************************
+ * EOF
+ **********************************************************************************************************************/
diff --git a/hw/bsp/lpc55/boards/mcu_link/mcu_link.mex b/hw/bsp/lpc55/boards/mcu_link/mcu_link.mex
new file mode 100644
index 000000000..c78dba808
--- /dev/null
+++ b/hw/bsp/lpc55/boards/mcu_link/mcu_link.mex
@@ -0,0 +1,1354 @@
+<?xml version="1.0" encoding= "UTF-8" ?>
+<configuration name="LPCXpresso55S69" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="acf73d26-2bf9-4855-b3be-26068672d98a" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+   <common>
+      <processor>LPC55S69</processor>
+      <package>LPC55S69JBD100</package>
+      <board>LPCXpresso55S69</board>
+      <board_revision>A2</board_revision>
+      <mcu_data>ksdk2_0</mcu_data>
+      <cores selected="cm33_core0">
+         <core name="Cortex-M33 (Core #0)" id="cm33_core0" description=""/>
+         <core name="Cortex-M33 (Core #1)" id="cm33_core1" description=""/>
+      </cores>
+      <description></description>
+   </common>
+   <preferences>
+      <validate_boot_init_only>true</validate_boot_init_only>
+      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
+      <custom_copyright>
+         <text>/*
+ * Copyright 2026 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+</text>
+         <enabled>true</enabled>
+      </custom_copyright>
+      <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
+      <generate_registers_defines>false</generate_registers_defines>
+   </preferences>
+   <tools>
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/pin_mux.c" update_enabled="true"/>
+            <file path="board/pin_mux.h" update_enabled="true"/>
+         </generated_project_files>
+         <pins_profile>
+            <processor_version>25.09.10</processor_version>
+            <pin_labels>
+               <pin_label pin_num="7" pin_signal="PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1" label="P18[2]/SD1_CLK" identifier="LED_RED"/>
+               <pin_label pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5" label="S1/J10[1]/U3[12]/P17[8]/P7[7]/U11[4]/P0_5-ISP1" identifier="LED"/>
+               <pin_label pin_num="11" pin_signal="PIO1_0/FC0_RTS_SCL_SSEL1/SD0_D3/CT_INP2/SCT_GPI4/PLU_OUT3/ADC0_11" label="U20[2]/SD0_D3" identifier="BUTTON"/>
+            </pin_labels>
+            <expansion_headers>
+               <expansion_header id="lpc_style_arduino" name="LPCXpresso V3 (Arduino compatible)">
+                  <connectors>
+                     <connector id="C1" name="P16">
+                        <pins>
+                           <pin id="8" external_signal_types="power_supply_3.3V" name="3.3V"/>
+                           <pin id="10" pin_num="32" pin_signal="RESETN" name="RESET"/>
+                           <pin id="12" external_signal_types="power_supply_3.3V" name="3.3V"/>
+                           <pin id="14" external_signal_types="power_supply_5V" name="5V"/>
+                           <pin id="16" external_signal_types="ground" name="GND"/>
+                           <pin id="18" external_signal_types="ground" name="GND"/>
+                           <pin id="20" external_signal_types="power_supply_5V" name="5V"/>
+                        </pins>
+                     </connector>
+                     <connector id="C2" name="P17">
+                        <pins>
+                           <pin id="1" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2" name="D15"/>
+                           <pin id="3" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3" name="D14"/>
+                           <pin id="5" external_signal_types="power_supply_3.3V" name="3.3V"/>
+                           <pin id="6" pin_num="93" pin_signal="PIO1_11/FC1_TXD_SCL_MISO_WS/CT_INP5/USB0_VBUS"/>
+                           <pin id="7" external_signal_types="ground" name="GND"/>
+                           <pin id="8" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5"/>
+                           <pin id="9" pin_num="61" pin_signal="PIO1_2/CTIMER0_MAT3/SCT_GPI6/HS_SPI_SCK/USB1_PORTPWRN/PLU_OUT5" name="D13"/>
+                           <pin id="10" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS"/>
+                           <pin id="11" pin_num="62" pin_signal="PIO1_3/SCT0_OUT4/HS_SPI_MISO/USB0_PORTPWRN/PLU_OUT6" name="D12"/>
+                           <pin id="12" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19"/>
+                           <pin id="13" pin_num="60" pin_signal="PIO0_26/FC2_RXD_SDA_MOSI_DATA/CLKOUT/CT_INP14/SCT0_OUT5/USB0_IDVALUE/FC0_SCK/HS_SPI_MOSI/SECURE_GPIO0_26" name="D11"/>
+                           <pin id="14" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21"/>
+                           <pin id="15" pin_num="59" pin_signal="PIO1_1/FC3_RXD_SDA_MOSI_DATA/CT_INP3/SCT_GPI5/HS_SPI_SSEL1/USB1_OVERCURRENTN/PLU_OUT4" name="D10"/>
+                           <pin id="16" pin_num="85" pin_signal="PIO1_27/FC2_RTS_SCL_SSEL1/SD0_D4/CTIMER0_MAT3/CLKOUT/PLU_IN4"/>
+                           <pin id="17" pin_num="31" pin_signal="PIO1_5/FC0_RXD_SDA_MOSI_DATA/SD0_D2/CTIMER2_MAT0/SCT_GPI0" name="D9"/>
+                           <pin id="18" pin_num="73" pin_signal="PIO1_28/FC7_SCK/SD0_D5/CT_INP2/PLU_IN3"/>
+                           <pin id="19" pin_num="24" pin_signal="PIO1_8/FC0_CTS_SDA_SSEL0/SD0_CLK/SCT0_OUT1/FC4_SSEL2/ADC0_4" name="D8"/>
+                           <pin id="20" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N"/>
+                        </pins>
+                     </connector>
+                     <connector id="C3" name="P18">
+                        <pins>
+                           <pin id="1" pin_num="10" pin_signal="PIO1_9/FC1_SCK/CT_INP4/SCT0_OUT2/FC4_CTS_SDA_SSEL0/ADC0_12" name="D7"/>
+                           <pin id="2" pin_num="7" pin_signal="PIO0_1/FC3_CTS_SDA_SSEL0/CT_INP0/SCT_GPI1/SD1_CLK/CMP0_OUT/SECURE_GPIO0_1"/>
+                           <pin id="3" pin_num="40" pin_signal="PIO1_10/FC1_RXD_SDA_MOSI_DATA/CTIMER1_MAT0/SCT0_OUT3" name="D6"/>
+                           <pin id="4" pin_num="57" pin_signal="PIO1_14/UTICK_CAP2/CTIMER1_MAT2/FC5_CTS_SDA_SSEL0/USB0_LEDN/SD1_CMD/ACMP0_D"/>
+                           <pin id="5" pin_num="1" pin_signal="PIO1_4/FC0_SCK/SD0_D0/CTIMER2_MAT1/SCT0_OUT0/FREQME_GPIO_CLK_A" name="D5"/>
+                           <pin id="6" pin_num="77" pin_signal="PIO1_25/FC2_TXD_SCL_MISO_WS/SCT0_OUT2/SD1_D0/UTICK_CAP0/PLU_CLKIN"/>
+                           <pin id="7" pin_num="9" pin_signal="PIO1_7/FC0_RTS_SCL_SSEL1/SD0_D1/CTIMER2_MAT2/SCT_GPI4" name="D4-LED_GREEN"/>
+                           <pin id="8" pin_num="42" pin_signal="PIO1_23/FC2_SCK/SCT0_OUT0/SD1_D3/FC3_SSEL2/PLU_OUT5"/>
+                           <pin id="10" pin_num="3" pin_signal="PIO1_24/FC2_RXD_SDA_MOSI_DATA/SCT0_OUT1/SD1_D1/FC3_SSEL3/PLU_OUT6"/>
+                           <pin id="11" pin_num="22" pin_signal="PIO0_15/FC6_CTS_SDA_SSEL0/UTICK_CAP2/CT_INP16/SCT0_OUT2/SD0_WR_PRT/SECURE_GPIO0_15/ADC0_2" name="D2"/>
+                           <pin id="12" pin_num="82" pin_signal="PIO1_15/UTICK_CAP3/CT_INP7/FC5_RTS_SCL_SSEL1/FC4_RTS_SCL_SSEL1/SD1_D2"/>
+                           <pin id="13" pin_num="27" pin_signal="PIO0_27/FC2_TXD_SCL_MISO_WS/CTIMER3_MAT2/SCT0_OUT6/FC7_RXD_SDA_MOSI_DATA/PLU_OUT0/SECURE_GPIO0_27" name="D1"/>
+                           <pin id="14" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF"/>
+                           <pin id="15" pin_num="3" pin_signal="PIO1_24/FC2_RXD_SDA_MOSI_DATA/SCT0_OUT1/SD1_D1/FC3_SSEL3/PLU_OUT6" name="D0"/>
+                           <pin id="16" pin_num="64" pin_signal="PIO1_18/SD1_POW_EN/SCT0_OUT5/PLU_OUT0"/>
+                           <pin id="17" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD"/>
+                           <pin id="18" pin_num="68" pin_signal="PIO1_26/FC2_CTS_SDA_SSEL0/SCT0_OUT3/CT_INP3/UTICK_CAP1/HS_SPI_SSEL3/PLU_IN5"/>
+                           <pin id="19" pin_num="43" pin_signal="PIO1_17/FC6_RTS_SCL_SSEL1/SCT0_OUT4/SD1_CARD_INT_N/SD1_CARD_DET_N"/>
+                           <pin id="20" pin_num="56" pin_signal="PIO0_18/FC4_CTS_SDA_SSEL0/SD0_WR_PRT/CTIMER1_MAT0/SCT0_OUT1/PLU_IN3/SECURE_GPIO0_18/ACMP0_C"/>
+                        </pins>
+                     </connector>
+                     <connector id="C4" name="P19">
+                        <pins>
+                           <pin id="2" pin_num="14" pin_signal="PIO0_16/FC4_TXD_SCL_MISO_WS/CLKOUT/CT_INP4/SECURE_GPIO0_16/ADC0_8" name="A0"/>
+                           <pin id="4" pin_num="20" pin_signal="PIO0_23/MCLK/CTIMER1_MAT2/CTIMER3_MAT3/SCT0_OUT4/FC0_CTS_SDA_SSEL0/SD1_D1/SECURE_GPIO0_23/ADC0_0" name="A1"/>
+                           <pin id="6" pin_num="54" pin_signal="PIO0_0/FC3_SCK/CTIMER0_MAT0/SCT_GPI0/SD1_CARD_INT_N/SECURE_GPIO0_0/ACMP0_A" name="A2"/>
+                           <pin id="7" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0"/>
+                           <pin id="8" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0" name="A3"/>
+                           <pin id="9" pin_num="71" pin_signal="PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13"/>
+                           <pin id="10" pin_num="71" pin_signal="PIO0_13/FC1_CTS_SDA_SSEL0/UTICK_CAP0/CT_INP0/SCT_GPI0/FC1_RXD_SDA_MOSI_DATA/PLU_IN0/SECURE_GPIO0_13" name="A4"/>
+                           <pin id="11" pin_num="72" pin_signal="PIO0_14/FC1_RTS_SCL_SSEL1/UTICK_CAP1/CT_INP1/SCT_GPI1/FC1_TXD_SCL_MISO_WS/PLU_IN1/SECURE_GPIO0_14"/>
+                           <pin id="12" pin_num="72" pin_signal="PIO0_14/FC1_RTS_SCL_SSEL1/UTICK_CAP1/CT_INP1/SCT_GPI1/FC1_TXD_SCL_MISO_WS/PLU_IN1/SECURE_GPIO0_14" name="A5"/>
+                        </pins>
+                     </connector>
+                  </connectors>
+               </expansion_header>
+            </expansion_headers>
+         </pins_profile>
+         <functions_list>
+            <function name="BOARD_InitDEBUG_UARTPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM0" description="Peripheral FLEXCOMM0 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitDEBUG_UARTPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM0" signal="RXD_SDA_MOSI_DATA" pin_num="92" pin_signal="PIO0_29/FC0_RXD_SDA_MOSI_DATA/SD1_D2/CTIMER2_MAT3/SCT0_OUT8/CMP0_OUT/PLU_OUT2/SECURE_GPIO0_29">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM0" signal="TXD_SCL_MISO_WS" pin_num="94" pin_signal="PIO0_30/FC0_TXD_SCL_MISO_WS/SD1_D3/CTIMER0_MAT0/SCT0_OUT9/SECURE_GPIO0_30">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitSWD_DEBUGPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SWD" description="Peripheral SWD signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitSWD_DEBUGPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SWD" signal="SWCLK" pin_num="13" pin_signal="PIO0_11/FC6_RXD_SDA_MOSI_DATA/CTIMER2_MAT2/FREQME_GPIO_CLK_A/SWCLK/SECURE_GPIO0_11/ADC0_9">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullDown"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWDIO" pin_num="12" pin_signal="PIO0_12/FC3_TXD_SCL_MISO_WS/SD1_BACKEND_PWR/FREQME_GPIO_CLK_B/SCT_GPI7/SD0_POW_EN/SWDIO/FC6_TXD_SCL_MISO_WS/SECURE_GPIO0_12/ADC0_10">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SWD" signal="SWO" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="DEBUG_SWD_SWO"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitUSBPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="USBFSH" description="Peripheral USBFSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="USBHSH" description="Peripheral USBHSH signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSBPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitUSBPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="USBFSH" signal="USB_DP" pin_num="97" pin_signal="USB0_DP"/>
+                  <pin peripheral="USBFSH" signal="USB_DM" pin_num="98" pin_signal="USB0_DM"/>
+                  <pin peripheral="USBFSH" signal="USB_VBUS" pin_num="78" pin_signal="PIO0_22/FC6_TXD_SCL_MISO_WS/UTICK_CAP1/CT_INP15/SCT0_OUT3/USB0_VBUS/SD1_D0/PLU_OUT7/SECURE_GPIO0_22">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_DM" pin_num="35" pin_signal="USB1_DM"/>
+                  <pin peripheral="USBHSH" signal="USB_DP" pin_num="34" pin_signal="USB1_DP"/>
+                  <pin peripheral="USBHSH" signal="USB_VBUS" pin_num="36" pin_signal="USB1_VBUS"/>
+                  <pin peripheral="USBHSH" signal="USB_OVERCURRENTN" pin_num="65" pin_signal="PIO1_30/FC7_TXD_SCL_MISO_WS/SD0_D7/SCT_GPI7/USB1_OVERCURRENTN/USB1_LEDN/PLU_IN1">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_OVERCURRENTN" pin_num="66" pin_signal="PIO0_28/FC0_SCK/SD1_CMD/CT_INP11/SCT0_OUT7/USB0_OVERCURRENTN/PLU_OUT1/SECURE_GPIO0_28">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBFSH" signal="USB_PORTPWRN" pin_num="67" pin_signal="PIO1_12/FC6_SCK/CTIMER1_MAT1/USB0_PORTPWRN/HS_SPI_SSEL2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="USBHSH" signal="USB_PORTPWRN" pin_num="80" pin_signal="PIO1_29/FC7_RXD_SDA_MOSI_DATA/SD0_D6/SCT_GPI6/USB1_PORTPWRN/USB1_FRAME/PLU_IN2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitLEDsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitLEDsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="GPIO" signal="PIO0, 5" pin_num="88" pin_signal="PIO0_5/FC4_RXD_SDA_MOSI_DATA/CTIMER3_MAT0/SCT_GPI5/FC3_RTS_SCL_SSEL1/MCLK/SECURE_GPIO0_5">
+                     <pin_features>
+                        <pin_feature name="direction" value="OUTPUT"/>
+                        <pin_feature name="gpio_init_state" value="true"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitBUTTONsPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitBUTTONsPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="SYSCON" signal="RESET" pin_num="32" pin_signal="RESETN"/>
+                  <pin peripheral="GPIO" signal="PIO1, 0" pin_num="11" pin_signal="PIO1_0/FC0_RTS_SCL_SSEL1/SD0_D3/CT_INP2/SCT_GPI4/PLU_OUT3/ADC0_11">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitPins_Core0">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core0">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitPins_Core1">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>true</callFromInitBoot>
+                  <coreID>cm33_core1</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins_Core1">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins/>
+            </function>
+            <function name="BOARD_InitI2SPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="SYSCON" description="Peripheral SYSCON signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM7" description="Peripheral FLEXCOMM7 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM6" description="Peripheral FLEXCOMM6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitI2SPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitI2SPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="SYSCON" signal="MCLK" pin_num="91" pin_signal="PIO1_31/MCLK/SD1_CLK/CTIMER0_MAT2/SCT0_OUT6/PLU_IN0">
+                     <pin_features>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="SCK" pin_num="76" pin_signal="PIO0_21/FC3_RTS_SCL_SSEL1/UTICK_CAP3/CTIMER3_MAT3/SCT_GPI3/FC7_SCK/PLU_CLKIN/SECURE_GPIO0_21">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="RXD_SDA_MOSI_DATA" pin_num="74" pin_signal="PIO0_20/FC3_CTS_SDA_SSEL0/CTIMER1_MAT1/CT_INP15/SCT_GPI2/FC7_RXD_SDA_MOSI_DATA/HS_SPI_SSEL0/PLU_IN5/SECURE_GPIO0_20/FC4_TXD_SCL_MISO_WS">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM7" signal="TXD_SCL_MISO_WS" pin_num="90" pin_signal="PIO0_19/FC4_RTS_SCL_SSEL1/UTICK_CAP0/CTIMER0_MAT2/SCT0_OUT2/FC7_TXD_SCL_MISO_WS/PLU_IN4/SECURE_GPIO0_19">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="SCK" pin_num="21" pin_signal="PIO0_10/FC6_SCK/CT_INP10/CTIMER2_MAT0/FC1_TXD_SCL_MISO_WS/SCT0_OUT2/SWO/SECURE_GPIO0_10/ADC0_1">
+                     <pin_features>
+                        <pin_feature name="identifier" value="FC6_I2S_CLK"/>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="enabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="RXD_SDA_MOSI_DATA" pin_num="2" pin_signal="PIO1_13/FC6_RXD_SDA_MOSI_DATA/CT_INP6/USB0_OVERCURRENTN/USB0_FRAME/SD0_CARD_DET_N">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM6" signal="TXD_SCL_MISO_WS" pin_num="87" pin_signal="PIO1_16/FC6_TXD_SCL_MISO_WS/CTIMER1_MAT3/SD0_CMD">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+            <function name="BOARD_InitACCELPins">
+               <description>Configures pin routing and optionally pin electrical features.</description>
+               <options>
+                  <callFromInitBoot>false</callFromInitBoot>
+                  <coreID>cm33_core0</coreID>
+                  <enableClock>true</enableClock>
+               </options>
+               <dependencies>
+                  <dependency resourceType="Peripheral" resourceId="FLEXCOMM4" description="Peripheral FLEXCOMM4 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitACCELPins">
+                     <feature name="initialized" evaluation="equal">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_gpio" description="Pins initialization requires the LPC_GPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.lpc_iocon" description="Pins initialization requires the LPC_IOCON Driver in the project." problem_level="2" source="Pins:BOARD_InitACCELPins">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <pins>
+                  <pin peripheral="FLEXCOMM4" signal="RXD_SDA_MOSI_DATA" pin_num="30" pin_signal="PIO1_21/FC7_CTS_SDA_SSEL0/CTIMER3_MAT2/FC4_RXD_SDA_MOSI_DATA/PLU_OUT3">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="FLEXCOMM4" signal="TXD_SCL_MISO_WS" pin_num="4" pin_signal="PIO1_20/FC7_RTS_SCL_SSEL1/CT_INP14/FC4_TXD_SCL_MISO_WS/PLU_OUT2">
+                     <pin_features>
+                        <pin_feature name="mode" value="pullUp"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                     </pin_features>
+                  </pin>
+                  <pin peripheral="GPIO" signal="PIO1, 19" pin_num="58" pin_signal="PIO1_19/SCT0_OUT7/CTIMER3_MAT1/SCT_GPI7/FC4_SCK/PLU_OUT1/ACMPVREF">
+                     <pin_features>
+                        <pin_feature name="direction" value="INPUT"/>
+                        <pin_feature name="mode" value="inactive"/>
+                        <pin_feature name="slew_rate" value="standard"/>
+                        <pin_feature name="invert" value="disabled"/>
+                        <pin_feature name="open_drain" value="disabled"/>
+                        <pin_feature name="asw" value="disabled"/>
+                     </pin_features>
+                  </pin>
+               </pins>
+            </function>
+         </functions_list>
+      </pins>
+      <clocks name="Clocks" version="18.0" enabled="true" update_project_code="true">
+         <generated_project_files>
+            <file path="board/clock_config.c" update_enabled="true"/>
+            <file path="board/clock_config.h" update_enabled="true"/>
+         </generated_project_files>
+         <clocks_profile>
+            <processor_version>25.09.10</processor_version>
+         </clocks_profile>
+         <clock_configurations>
+            <clock_configuration name="BOARD_BootClockFRO12M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFRO12M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources/>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="12 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings/>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockFROHF96M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockFROHF96M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="ANACTRL.fro_hf.outFreq" value="96 MHz" locked="false" enabled="false"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="96 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG" value="Enable" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELA.sel" value="ANACTRL.fro_hf_clk" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL100M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL100M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="System_clock.outFreq" value="100 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL0_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="100" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="4" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="4" locked="true"/>
+               </clock_settings>
+               <called_from_default_init>false</called_from_default_init>
+            </clock_configuration>
+            <clock_configuration name="BOARD_BootClockPLL150M" id_prefix="" prefix_user_defined="false">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALIN" description="&apos;XTALIN&apos; (Pins tool id: SYSCON.XTALIN, Clocks tool id: SYSCON.XTALIN) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>INPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="routed" evaluation="">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PinSignal" resourceId="SYSCON.XTALOUT" description="&apos;XTALOUT&apos; (Pins tool id: SYSCON.XTALOUT, Clocks tool id: SYSCON.XTALOUT) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="direction" evaluation="">
+                        <data>OUTPUT</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.power" description="Clocks initialization requires the POWER Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core1">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="SWComponent" resourceId="platform.drivers.clock" description="Clocks initialization requires the CLOCK Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockPLL150M">
+                     <feature name="enabled" evaluation="equal" configuration="cm33_core0">
+                        <data>true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <clock_sources>
+                  <clock_source id="SYSCON.XTAL32M.outFreq" value="16 MHz" locked="false" enabled="true"/>
+               </clock_sources>
+               <clock_outputs>
+                  <clock_output id="FXCOM0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="System_clock.outFreq" value="144 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB0_clock.outFreq" value="48 MHz" locked="false" accuracy=""/>
+                  <clock_output id="USB1_PHY_clock.outFreq" value="16 MHz" locked="false" accuracy=""/>
+               </clock_outputs>
+               <clock_settings>
+                  <setting id="PLL0_Mode" value="Normal" locked="false"/>
+                  <setting id="PLL1_Mode" value="Normal" locked="false"/>
+                  <setting id="ENABLE_CLKIN_ENA" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_PLL_USB_OUT" value="Enabled" locked="false"/>
+                  <setting id="ENABLE_SYSTEM_CLK_OUT" value="Enabled" locked="false"/>
+                  <setting id="SYSCON.FCCLKSEL0.sel" value="SYSCON.PLL0DIV" locked="false"/>
+                  <setting id="SYSCON.FRGCTRL0_DIV.scale" value="400" locked="false"/>
+                  <setting id="SYSCON.MAINCLKSELB.sel" value="SYSCON.PLL1_BYPASS" locked="false"/>
+                  <setting id="SYSCON.PLL0CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL0DIV.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.PLL0M_MULT.scale" value="150" locked="true"/>
+                  <setting id="SYSCON.PLL0N_DIV.scale" value="8" locked="true"/>
+                  <setting id="SYSCON.PLL0_PDEC.scale" value="2" locked="true"/>
+                  <setting id="SYSCON.PLL1CLKSEL.sel" value="SYSCON.CLK_IN_EN" locked="false"/>
+                  <setting id="SYSCON.PLL1M_MULT.scale" value="18" locked="false"/>
+                  <setting id="SYSCON.PLL1_PDEC.scale" value="2" locked="false"/>
+                  <setting id="SYSCON.USB0CLKDIV.scale" value="3" locked="false"/>
+                  <setting id="SYSCON.USB0CLKSEL.sel" value="SYSCON.MAINCLKSELB" locked="false"/>
+               </clock_settings>
+               <called_from_default_init>true</called_from_default_init>
+            </clock_configuration>
+         </clock_configurations>
+      </clocks>
+      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <dcdx_profile>
+            <processor_version>0.0.0</processor_version>
+         </dcdx_profile>
+         <dcdx_configurations/>
+      </dcdx>
+      <periphs name="Peripherals" version="15.0" enabled="true" update_project_code="true">
+         <dependencies>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="FLEXCOMM USART Driver is not found in the toolchain/IDE project. The project will not compile!" problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data type="Boolean">true</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="SWComponent" resourceId="platform.drivers.flexcomm_usart" description="An unsupported version of the FLEXCOMM USART Driver in the toolchain/IDE project. Required: ${required_value}, actual: ${actual_value}. The project might not compile correctly." problem_level="1" source="Peripherals">
+               <feature name="version" evaluation="equivalent">
+                  <data type="Version">2.2.0</data>
+               </feature>
+            </dependency>
+            <dependency resourceType="Tool" resourceId="Clocks" description="The Clocks tool is required by the Peripherals tool, but it is disabled." problem_level="2" source="Peripherals">
+               <feature name="enabled" evaluation="equal">
+                  <data>true</data>
+               </feature>
+            </dependency>
+         </dependencies>
+         <generated_project_files>
+            <file path="board/peripherals.c" update_enabled="true"/>
+            <file path="board/peripherals.h" update_enabled="true"/>
+         </generated_project_files>
+         <peripherals_profile>
+            <processor_version>25.09.10</processor_version>
+         </peripherals_profile>
+         <functional_groups>
+            <functional_group name="BOARD_InitPeripherals_cm33_core0" uuid="61d0725d-b300-49cb-9c66-b5edfbf8ffc1" called_from_default_init="true" id_prefix="" core="cm33_core0">
+               <description></description>
+               <options/>
+               <dependencies>
+                  <dependency resourceType="ClockOutput" resourceId="FXCOM0_clock" description="FXCOM0 clock is inactive." problem_level="2" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="frequency" evaluation="greaterThan">
+                        <data type="Frequency" unit="Hz">0</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_rxd" description="Signal RX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+                  <dependency resourceType="PeripheralUnifiedSignal" resourceId="FLEXCOMM0.usart_txd" description="Signal TX is not routed." problem_level="1" source="Peripherals:BOARD_InitPeripherals_cm33_core0">
+                     <feature name="routed" evaluation="equal">
+                        <data type="Boolean">true</data>
+                     </feature>
+                  </dependency>
+               </dependencies>
+               <instances>
+                  <instance name="ACCEL" uuid="b999c56a-0d01-4089-9311-9224db5272f4" type="flexcomm_i2c" type_id="flexcomm_i2c_2.3.0" mode="I2C_Polling" peripheral="FLEXCOMM4" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="fsl_i2c" quick_selection="QS_I2C_Master">
+                        <setting name="i2c_mode" value="kI2C_Master"/>
+                        <setting name="clockSource" value="FXCOMFunctionClock"/>
+                        <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                        <struct name="i2c_master_config">
+                           <setting name="enableMaster" value="true"/>
+                           <setting name="baudRate_Bps" value="100000"/>
+                           <setting name="enableTimeout" value="false"/>
+                           <setting name="timeout_Ms" value="35"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="DEBUG_UART" uuid="9fb0504c-6159-43e2-98bb-51d75f06133a" type="flexcomm_usart" type_id="flexcomm_usart_2.2.0" mode="polling" peripheral="FLEXCOMM0" enabled="true" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="usartConfig_t">
+                        <struct name="usartConfig">
+                           <setting name="clockSource" value="FXCOMFunctionClock"/>
+                           <setting name="clockSourceFreq" value="ClocksTool_DefaultInit"/>
+                           <setting name="baudRate_Bps" value="115200"/>
+                           <setting name="syncMode" value="kUSART_SyncModeDisabled"/>
+                           <setting name="parityMode" value="kUSART_ParityDisabled"/>
+                           <setting name="stopBitCount" value="kUSART_OneStopBit"/>
+                           <setting name="bitCountPerChar" value="kUSART_8BitsPerChar"/>
+                           <setting name="loopback" value="false"/>
+                           <setting name="txWatermark" value="kUSART_TxFifo0"/>
+                           <setting name="rxWatermark" value="kUSART_RxFifo1"/>
+                           <setting name="enableRx" value="true"/>
+                           <setting name="enableTx" value="true"/>
+                           <setting name="clockPolarity" value="kUSART_RxSampleOnFallingEdge"/>
+                           <setting name="enableContinuousSCLK" value="false"/>
+                        </struct>
+                     </config_set>
+                  </instance>
+                  <instance name="LEDS" uuid="f5ad3a56-404b-44cb-8abc-7b25b5551d33" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="SW" uuid="d57ddfca-dc72-486c-a145-c7a2ab1e1a66" type="lpc_gpio" type_id="lpc_gpio_2.1.1" mode="GPIO" peripheral="GPIO" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
+                     <config_set name="lpc_gpio"/>
+                  </instance>
+                  <instance name="NVIC" uuid="56761ad9-9b77-4074-917d-de0fde10cd48" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+            <functional_group name="BOARD_InitPeripherals_cm33_core1" uuid="e2041cd4-ebb6-45a5-807f-e0c2dc047d48" called_from_default_init="false" id_prefix="" core="cm33_core1">
+               <description></description>
+               <options/>
+               <dependencies/>
+               <instances>
+                  <instance name="NVIC_2" uuid="db546092-4c45-40af-938a-8cc58edd1c4f" type="nvic" type_id="nvic" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
+                     <config_set name="nvic">
+                        <array name="interrupt_table"/>
+                        <array name="interrupts"/>
+                     </config_set>
+                  </instance>
+               </instances>
+            </functional_group>
+         </functional_groups>
+         <components>
+            <component name="system" uuid="905d2747-654a-47d9-91f9-81a5c6f9c407" type_id="system">
+               <config_set_global name="global_system_definitions">
+                  <setting name="user_definitions" value=""/>
+                  <setting name="user_includes" value=""/>
+                  <setting name="global_init" value=""/>
+               </config_set_global>
+            </component>
+            <component name="msg" uuid="64cbcd7c-424d-4baf-9681-a60878969fb6" type_id="msg">
+               <config_set_global name="global_messages"/>
+            </component>
+            <component name="generic_can" uuid="b9b018dd-ef4e-41f6-b456-f91b855cb391" type_id="generic_can">
+               <config_set_global name="global_can"/>
+            </component>
+            <component name="uart_cmsis_common" uuid="bafa6375-9184-4272-8102-06ea086041d7" type_id="uart_cmsis_common">
+               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
+            </component>
+            <component name="generic_uart" uuid="1710dc7f-381f-4b37-8f78-0fd2f923b3ac" type_id="generic_uart">
+               <config_set_global name="global_uart"/>
+            </component>
+            <component name="generic_enet" uuid="c7fc4395-b141-4b13-a326-4145e765b2b7" type_id="generic_enet">
+               <config_set_global name="global_enet"/>
+            </component>
+            <component name="gpio_adapter_common" uuid="b6ee89c2-4c58-4181-94dc-af13d8ae8ea5" type_id="gpio_adapter_common">
+               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
+            </component>
+         </components>
+      </periphs>
+      <tee name="TEE" version="10.0" enabled="false" update_project_code="true">
+         <generated_project_files/>
+         <tee_profile>
+            <processor_version>0.0.0</processor_version>
+            <tool_options>
+               <option id="_output_type_" value="c_code"/>
+               <option id="_legacy_source_names_" value="yes"/>
+            </tool_options>
+         </tee_profile>
+         <functional_group name="BOARD_InitTrustZone" called_from_default_init="true" id_prefix="" prefix_user_defined="true">
+            <description></description>
+            <options/>
+            <ahb>
+               <relative_region start="0" size="655360" security="s_priv" memory="PROGRAM_FLASH"/>
+               <relative_region start="0" size="131072" security="s_priv" memory="BootROM"/>
+               <relative_region start="0" size="32768" security="s_priv" memory="SRAMX"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM0"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM1"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM2"/>
+               <relative_region start="0" size="65536" security="s_priv" memory="SRAM3"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="SRAM4"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="AHBperipherals_port10_ahb_secure_ctrl_area"/>
+               <relative_region start="0" size="16384" security="s_priv" memory="USB_RAM"/>
+               <masters>
+                  <master id="HASH" security="ns_user"/>
+                  <master id="MCM33C" security="ns_user"/>
+                  <master id="MCM33S" security="ns_user"/>
+                  <master id="PQ" security="ns_user"/>
+                  <master id="SDIO" security="ns_user"/>
+                  <master id="SDMA0" security="ns_user"/>
+                  <master id="SDMA1" security="ns_user"/>
+                  <master id="USBFSD" security="ns_user"/>
+                  <master id="USBFSH" security="ns_user"/>
+               </masters>
+               <peripherals>
+                  <peripheral id="ADC0" security="s_priv"/>
+                  <peripheral id="AHB_SECURE_CTRL" security="s_priv"/>
+                  <peripheral id="ANACTRL" security="s_priv"/>
+                  <peripheral id="CASPER" security="s_priv"/>
+                  <peripheral id="CRC_ENGINE" security="s_priv"/>
+                  <peripheral id="CTIMER0" security="s_priv"/>
+                  <peripheral id="CTIMER1" security="s_priv"/>
+                  <peripheral id="CTIMER2" security="s_priv"/>
+                  <peripheral id="CTIMER3" security="s_priv"/>
+                  <peripheral id="CTIMER4" security="s_priv"/>
+                  <peripheral id="DBGMAILBOX" security="s_priv"/>
+                  <peripheral id="DMA0" security="s_priv"/>
+                  <peripheral id="DMA1" security="s_priv"/>
+                  <peripheral id="FLASH" security="s_priv"/>
+                  <peripheral id="FLEXCOMM0" security="s_priv"/>
+                  <peripheral id="FLEXCOMM1" security="s_priv"/>
+                  <peripheral id="FLEXCOMM2" security="s_priv"/>
+                  <peripheral id="FLEXCOMM3" security="s_priv"/>
+                  <peripheral id="FLEXCOMM4" security="s_priv"/>
+                  <peripheral id="FLEXCOMM5" security="s_priv"/>
+                  <peripheral id="FLEXCOMM6" security="s_priv"/>
+                  <peripheral id="FLEXCOMM7" security="s_priv"/>
+                  <peripheral id="GINT0" security="s_priv"/>
+                  <peripheral id="GINT1" security="s_priv"/>
+                  <peripheral id="GPIO" security="s_priv"/>
+                  <peripheral id="HASHCRYPT" security="s_priv"/>
+                  <peripheral id="INPUTMUX" security="s_priv"/>
+                  <peripheral id="IOCON" security="s_priv"/>
+                  <peripheral id="MAILBOX" security="s_priv"/>
+                  <peripheral id="MRT0" security="s_priv"/>
+                  <peripheral id="OSTIMER" security="s_priv"/>
+                  <peripheral id="PINT" security="s_priv"/>
+                  <peripheral id="PLU" security="s_priv"/>
+                  <peripheral id="PMC" security="s_priv"/>
+                  <peripheral id="POWERQUAD" security="s_priv"/>
+                  <peripheral id="PRINCE" security="s_priv"/>
+                  <peripheral id="PUF" security="s_priv"/>
+                  <peripheral id="RNG" security="s_priv"/>
+                  <peripheral id="RTC" security="s_priv"/>
+                  <peripheral id="SCT0" security="s_priv"/>
+                  <peripheral id="SDIF" security="s_priv"/>
+                  <peripheral id="SECGPIO" security="s_priv"/>
+                  <peripheral id="SECPINT" security="s_priv"/>
+                  <peripheral id="SPI8" security="s_priv"/>
+                  <peripheral id="SYSCON" security="s_priv"/>
+                  <peripheral id="SYSCTL" security="s_priv"/>
+                  <peripheral id="USB0" security="s_priv"/>
+                  <peripheral id="USBFSH" security="s_priv"/>
+                  <peripheral id="USBHSD" security="s_priv"/>
+                  <peripheral id="USBHSH" security="s_priv"/>
+                  <peripheral id="USBPHY" security="s_priv"/>
+                  <peripheral id="UTICK0" security="s_priv"/>
+                  <peripheral id="WWDT" security="s_priv"/>
+               </peripherals>
+               <interrupts>
+                  <masking>
+                     <interrupt id="acmp_capt_irq" masked="Masked"/>
+                     <interrupt id="adc_irq" masked="Masked"/>
+                     <interrupt id="casper_irq" masked="Masked"/>
+                     <interrupt id="ctimer0_irq" masked="Masked"/>
+                     <interrupt id="ctimer1_irq" masked="Masked"/>
+                     <interrupt id="ctimer2_irq" masked="Masked"/>
+                     <interrupt id="ctimer3_irq" masked="Masked"/>
+                     <interrupt id="ctimer4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm0_irq" masked="Masked"/>
+                     <interrupt id="flexcomm1_irq" masked="Masked"/>
+                     <interrupt id="flexcomm2_irq" masked="Masked"/>
+                     <interrupt id="flexcomm3_irq" masked="Masked"/>
+                     <interrupt id="flexcomm4_irq" masked="Masked"/>
+                     <interrupt id="flexcomm5_irq" masked="Masked"/>
+                     <interrupt id="flexcomm6_irq" masked="Masked"/>
+                     <interrupt id="flexcomm7_irq" masked="Masked"/>
+                     <interrupt id="global_irq0" masked="Masked"/>
+                     <interrupt id="global_irq1" masked="Masked"/>
+                     <interrupt id="lspi_hs_irq" masked="Masked"/>
+                     <interrupt id="mailbox_irq" masked="Masked"/>
+                     <interrupt id="mrt_irq" masked="Masked"/>
+                     <interrupt id="os_event_irq" masked="Masked"/>
+                     <interrupt id="pin_int4" masked="Masked"/>
+                     <interrupt id="pin_int5" masked="Masked"/>
+                     <interrupt id="pin_int6" masked="Masked"/>
+                     <interrupt id="pin_int7" masked="Masked"/>
+                     <interrupt id="pin_irq0" masked="Masked"/>
+                     <interrupt id="pin_irq1" masked="Masked"/>
+                     <interrupt id="pin_irq2" masked="Masked"/>
+                     <interrupt id="pin_irq3" masked="Masked"/>
+                     <interrupt id="plu_irq" masked="Masked"/>
+                     <interrupt id="pq_irq" masked="Masked"/>
+                     <interrupt id="qddkey_irq" masked="Masked"/>
+                     <interrupt id="rtc_irq" masked="Masked"/>
+                     <interrupt id="sct_irq" masked="Masked"/>
+                     <interrupt id="sdio_irq" masked="Masked"/>
+                     <interrupt id="sdma0_irq" masked="Masked"/>
+                     <interrupt id="sdma1_irq" masked="Masked"/>
+                     <interrupt id="sec_hypervisor_call_irq" masked="Masked"/>
+                     <interrupt id="sec_int0" masked="Masked"/>
+                     <interrupt id="sec_int1" masked="Masked"/>
+                     <interrupt id="sec_vio_irq" masked="Masked"/>
+                     <interrupt id="sha_irq" masked="Masked"/>
+                     <interrupt id="sys_irq" masked="Masked"/>
+                     <interrupt id="usb0_irq" masked="Masked"/>
+                     <interrupt id="usb0_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_irq" masked="Masked"/>
+                     <interrupt id="usb1_needclk_irq" masked="Masked"/>
+                     <interrupt id="usb1_utmi_irq" masked="Masked"/>
+                     <interrupt id="utick_irq" masked="Masked"/>
+                  </masking>
+                  <security>
+                     <interrupt id="acmp_capt_irq" secure="Secure"/>
+                     <interrupt id="adc_irq" secure="Secure"/>
+                     <interrupt id="casper_irq" secure="Secure"/>
+                     <interrupt id="ctimer0_irq" secure="Secure"/>
+                     <interrupt id="ctimer1_irq" secure="Secure"/>
+                     <interrupt id="ctimer2_irq" secure="Secure"/>
+                     <interrupt id="ctimer3_irq" secure="Secure"/>
+                     <interrupt id="ctimer4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm0_irq" secure="Secure"/>
+                     <interrupt id="flexcomm1_irq" secure="Secure"/>
+                     <interrupt id="flexcomm2_irq" secure="Secure"/>
+                     <interrupt id="flexcomm3_irq" secure="Secure"/>
+                     <interrupt id="flexcomm4_irq" secure="Secure"/>
+                     <interrupt id="flexcomm5_irq" secure="Secure"/>
+                     <interrupt id="flexcomm6_irq" secure="Secure"/>
+                     <interrupt id="flexcomm7_irq" secure="Secure"/>
+                     <interrupt id="global_irq0" secure="Secure"/>
+                     <interrupt id="global_irq1" secure="Secure"/>
+                     <interrupt id="lspi_hs_irq" secure="Secure"/>
+                     <interrupt id="mailbox_irq" secure="Secure"/>
+                     <interrupt id="mrt_irq" secure="Secure"/>
+                     <interrupt id="os_event_irq" secure="Secure"/>
+                     <interrupt id="pin_int4" secure="Secure"/>
+                     <interrupt id="pin_int5" secure="Secure"/>
+                     <interrupt id="pin_int6" secure="Secure"/>
+                     <interrupt id="pin_int7" secure="Secure"/>
+                     <interrupt id="pin_irq0" secure="Secure"/>
+                     <interrupt id="pin_irq1" secure="Secure"/>
+                     <interrupt id="pin_irq2" secure="Secure"/>
+                     <interrupt id="pin_irq3" secure="Secure"/>
+                     <interrupt id="plu_irq" secure="Secure"/>
+                     <interrupt id="pq_irq" secure="Secure"/>
+                     <interrupt id="qddkey_irq" secure="Secure"/>
+                     <interrupt id="rtc_irq" secure="Secure"/>
+                     <interrupt id="sct_irq" secure="Secure"/>
+                     <interrupt id="sdio_irq" secure="Secure"/>
+                     <interrupt id="sdma0_irq" secure="Secure"/>
+                     <interrupt id="sdma1_irq" secure="Secure"/>
+                     <interrupt id="sec_hypervisor_call_irq" secure="Secure"/>
+                     <interrupt id="sec_int0" secure="Secure"/>
+                     <interrupt id="sec_int1" secure="Secure"/>
+                     <interrupt id="sec_vio_irq" secure="Secure"/>
+                     <interrupt id="sha_irq" secure="Secure"/>
+                     <interrupt id="sys_irq" secure="Secure"/>
+                     <interrupt id="usb0_irq" secure="Secure"/>
+                     <interrupt id="usb0_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_irq" secure="Secure"/>
+                     <interrupt id="usb1_needclk_irq" secure="Secure"/>
+                     <interrupt id="usb1_utmi_irq" secure="Secure"/>
+                     <interrupt id="utick_irq" secure="Secure"/>
+                  </security>
+               </interrupts>
+               <ports>
+                  <port id="pio0">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+                  <port id="pio1">
+                     <pin_mask id="0" masked="Masked"/>
+                     <pin_mask id="1" masked="Masked"/>
+                     <pin_mask id="10" masked="Masked"/>
+                     <pin_mask id="11" masked="Masked"/>
+                     <pin_mask id="12" masked="Masked"/>
+                     <pin_mask id="13" masked="Masked"/>
+                     <pin_mask id="14" masked="Masked"/>
+                     <pin_mask id="15" masked="Masked"/>
+                     <pin_mask id="16" masked="Masked"/>
+                     <pin_mask id="17" masked="Masked"/>
+                     <pin_mask id="18" masked="Masked"/>
+                     <pin_mask id="19" masked="Masked"/>
+                     <pin_mask id="2" masked="Masked"/>
+                     <pin_mask id="20" masked="Masked"/>
+                     <pin_mask id="21" masked="Masked"/>
+                     <pin_mask id="22" masked="Masked"/>
+                     <pin_mask id="23" masked="Masked"/>
+                     <pin_mask id="24" masked="Masked"/>
+                     <pin_mask id="25" masked="Masked"/>
+                     <pin_mask id="26" masked="Masked"/>
+                     <pin_mask id="27" masked="Masked"/>
+                     <pin_mask id="28" masked="Masked"/>
+                     <pin_mask id="29" masked="Masked"/>
+                     <pin_mask id="3" masked="Masked"/>
+                     <pin_mask id="30" masked="Masked"/>
+                     <pin_mask id="31" masked="Masked"/>
+                     <pin_mask id="4" masked="Masked"/>
+                     <pin_mask id="5" masked="Masked"/>
+                     <pin_mask id="6" masked="Masked"/>
+                     <pin_mask id="7" masked="Masked"/>
+                     <pin_mask id="8" masked="Masked"/>
+                     <pin_mask id="9" masked="Masked"/>
+                  </port>
+               </ports>
+            </ahb>
+            <saus>
+               <sau enabled="true" all_non_secure="false" generate_code_for_disabled_regions="false">
+                  <region start="0" size="268435456" security="ns" enabled="true" index="0"/>
+                  <region start="536870912" size="3221225472" security="ns" enabled="true" index="1"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="2"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="3"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="4"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="5"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="6"/>
+                  <region start="0" size="32" security="ns" enabled="false" index="7"/>
+               </sau>
+            </saus>
+            <global_options>
+               <option id="AIRCR_PRIS" value="no"/>
+               <option id="AIRCR_BFHFNMINS" value="no"/>
+               <option id="AIRCR_SYSRESETREQS" value="no"/>
+               <option id="SCR_SLEEPDEEPS" value="no"/>
+               <option id="SHCSR_SECUREFAULTENA" value="no"/>
+               <option id="CPACR_CP0" value="3"/>
+               <option id="CPACR_CP1" value="3"/>
+               <option id="CPACR_CP2" value="0"/>
+               <option id="CPACR_CP3" value="0"/>
+               <option id="CPACR_CP4" value="0"/>
+               <option id="CPACR_CP5" value="0"/>
+               <option id="CPACR_CP6" value="0"/>
+               <option id="CPACR_CP7" value="0"/>
+               <option id="CPACR_CP10" value="3"/>
+               <option id="CPACR_CP11" value="3"/>
+               <option id="NSACR_CP0" value="yes"/>
+               <option id="NSACR_CP1" value="yes"/>
+               <option id="NSACR_CP2" value="no"/>
+               <option id="NSACR_CP3" value="no"/>
+               <option id="NSACR_CP4" value="no"/>
+               <option id="NSACR_CP5" value="no"/>
+               <option id="NSACR_CP6" value="no"/>
+               <option id="NSACR_CP7" value="no"/>
+               <option id="NSACR_CP10" value="yes"/>
+               <option id="NSACR_CP11" value="yes"/>
+               <option id="CPPWR_SU0" value="no"/>
+               <option id="CPPWR_SUS0" value="no"/>
+               <option id="CPPWR_SU1" value="no"/>
+               <option id="CPPWR_SUS1" value="no"/>
+               <option id="CPPWR_SU2" value="no"/>
+               <option id="CPPWR_SUS2" value="no"/>
+               <option id="CPPWR_SU3" value="no"/>
+               <option id="CPPWR_SUS3" value="no"/>
+               <option id="CPPWR_SU4" value="no"/>
+               <option id="CPPWR_SUS4" value="no"/>
+               <option id="CPPWR_SU5" value="no"/>
+               <option id="CPPWR_SUS5" value="no"/>
+               <option id="CPPWR_SU6" value="no"/>
+               <option id="CPPWR_SUS6" value="no"/>
+               <option id="CPPWR_SU7" value="no"/>
+               <option id="CPPWR_SUS7" value="no"/>
+               <option id="CPPWR_SU10" value="no"/>
+               <option id="CPPWR_SUS10" value="no"/>
+               <option id="CPPWR_SU11" value="no"/>
+               <option id="CPPWR_SUS11" value="no"/>
+               <option id="SEC_GPIO_MASK0_LOCK" value="no"/>
+               <option id="SEC_GPIO_MASK1_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK0_LOCK" value="no"/>
+               <option id="SEC_CPU1_INT_MASK1_LOCK" value="no"/>
+               <option id="MASTER_SEC_LEVEL_LOCK" value="no"/>
+               <option id="CPU0_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU0_LOCK_NS_MPU" value="no"/>
+               <option id="CPU0_LOCK_S_VTAIRCR" value="no"/>
+               <option id="CPU0_LOCK_S_MPU" value="no"/>
+               <option id="CPU0_LOCK_SAU" value="no"/>
+               <option id="CPU0_LOCK_REG_LOCK" value="no"/>
+               <option id="CPU1_LOCK_NS_VTOR" value="no"/>
+               <option id="CPU1_LOCK_NS_MPU" value="no"/>
+               <option id="CPU1_LOCK_REG_LOCK" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_SECURE_CHECKING" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_S_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_ENABLE_NS_PRIV_CHECK" value="yes"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_VIOLATION_ABORT" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SIMPLE_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_DISABLE_SMART_MASTER_STRICT_MODE" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_IDAU_ALL_NS" value="no"/>
+               <option id="AHB_MISC_CTRL_REG_WRITE_LOCK" value="yes"/>
+            </global_options>
+            <mpus>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="s" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+               <mpu enabled="false" priv_default_map="false" handler_enabled="false" id="ns" generate_code_for_disabled_regions="false">
+                  <attributes>
+                     <group index="0" id="Code" memory_type="normal" device="nGnRE"/>
+                     <group index="1" id="RAM" memory_type="normal" device="nGnRE"/>
+                     <group index="2" id="Peripheral" memory_type="device" device="nGnRE"/>
+                     <group index="3" id="3" memory_type="device" device="nGnRE"/>
+                     <group index="4" id="4" memory_type="device" device="nGnRE"/>
+                     <group index="5" id="5" memory_type="device" device="nGnRE"/>
+                     <group index="6" id="6" memory_type="device" device="nGnRE"/>
+                     <group index="7" id="7" memory_type="device" device="nGnRE"/>
+                  </attributes>
+                  <regions>
+                     <region start="0" size="32" security="priv" enabled="false" index="0" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="1" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="2" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="3" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="4" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="5" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="6" executable="false" read_only="false" attributes_index="0"/>
+                     <region start="0" size="32" security="priv" enabled="false" index="7" executable="false" read_only="false" attributes_index="0"/>
+                  </regions>
+               </mpu>
+            </mpus>
+         </functional_group>
+      </tee>
+   </tools>
+</configuration>
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index 115c41bfb..b5d097234 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -33,9 +33,12 @@
 #include "fsl_device_registers.h"
 #include "fsl_gpio.h"
 #include "fsl_power.h"
-#include "fsl_iocon.h"
 #include "fsl_usart.h"
 
+#include "board/pin_mux.h"
+#include "board/clock_config.h"
+#include "board/peripherals.h"
+
 #ifdef NEOPIXEL_PIN
 #include "fsl_sctimer.h"
 #include "sct_neopixel.h"
@@ -45,23 +48,6 @@
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-// IOCON pin mux
-#define IOCON_PIO_DIGITAL_EN     0x0100u // Enables digital function
-#define IOCON_PIO_FUNC0          0x00u   // Selects pin function 0
-#define IOCON_PIO_FUNC1          0x01u   // Selects pin function 1
-#define IOCON_PIO_FUNC4          0x04u   // Selects pin function 4
-#define IOCON_PIO_FUNC7          0x07u   // Selects pin function 7
-#define IOCON_PIO_INV_DI         0x00u   // Input function is not inverted
-#define IOCON_PIO_MODE_INACT     0x00u   // No addition pin function
-#define IOCON_PIO_OPENDRAIN_DI   0x00u   // Open drain is disabled
-#define IOCON_PIO_SLEW_STANDARD  0x00u   // Standard mode, output slew rate control is enabled
-#define IOCON_PIO_MODE_PULLUP    0x20u   /*!<@brief Selects pull-up function */
-
-#define IOCON_PIO_DIG_FUNC0_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC0) // Digital pin function 0 enabled
-#define IOCON_PIO_DIG_FUNC1_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC1) // Digital pin function 1 enabled
-#define IOCON_PIO_DIG_FUNC4_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC4) // Digital pin function 2 enabled
-#define IOCON_PIO_DIG_FUNC7_EN   (IOCON_PIO_DIGITAL_EN | IOCON_PIO_FUNC7) // Digital pin function 2 enabled
-
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -73,74 +59,12 @@ void USB1_IRQHandler(void) {
   tusb_int_handler(1, true);
 }
 
-/****************************************************************
-name: BOARD_BootClockPLL100M
-outputs:
-- {id: System_clock.outFreq, value: 100 MHz}
-settings:
-- {id: PLL0_Mode, value: Normal}
-- {id: ANALOG_CONTROL_FRO192M_CTRL_ENDI_FRO_96M_CFG, value: Enable}
-- {id: ENABLE_CLKIN_ENA, value: Enabled}
-- {id: ENABLE_SYSTEM_CLK_OUT, value: Enabled}
-- {id: SYSCON.MAINCLKSELB.sel, value: SYSCON.PLL0_BYPASS}
-- {id: SYSCON.PLL0CLKSEL.sel, value: SYSCON.CLK_IN_EN}
-- {id: SYSCON.PLL0M_MULT.scale, value: '100', locked: true}
-- {id: SYSCON.PLL0N_DIV.scale, value: '4', locked: true}
-- {id: SYSCON.PLL0_PDEC.scale, value: '4', locked: true}
-sources:
-- {id: ANACTRL.fro_hf.outFreq, value: 96 MHz}
-- {id: SYSCON.XTAL32M.outFreq, value: 16 MHz, enabled: true}
-******************************************************************/
-void BOARD_BootClockPLL100M(void)
-{
-    /*!< Set up the clock sources */
-    /*!< Configure FRO192M */
-    POWER_DisablePD(kPDRUNCFG_PD_FRO192M);               /*!< Ensure FRO is on  */
-    CLOCK_SetupFROClocking(12000000U);                   /*!< Set up FRO to the 12 MHz, just for sure */
-    CLOCK_AttachClk(kFRO12M_to_MAIN_CLK);                /*!< Switch to FRO 12MHz first to ensure we can change the clock setting */
-
-    CLOCK_SetupFROClocking(96000000U);                   /* Enable FRO HF(96MHz) output */
-
-    /*!< Configure XTAL32M */
-    POWER_DisablePD(kPDRUNCFG_PD_XTAL32M);                        /* Ensure XTAL32M is powered */
-    POWER_DisablePD(kPDRUNCFG_PD_LDOXO32M);                       /* Ensure XTAL32M is powered */
-    CLOCK_SetupExtClocking(16000000U);                            /* Enable clk_in clock */
-    SYSCON->CLOCK_CTRL |= SYSCON_CLOCK_CTRL_CLKIN_ENA_MASK;       /* Enable clk_in from XTAL32M clock  */
-    ANACTRL->XO32M_CTRL |= ANACTRL_XO32M_CTRL_ENABLE_SYSTEM_CLK_OUT_MASK;    /* Enable clk_in to system  */
-
-    POWER_SetVoltageForFreq(100000000U);                  /*!< Set voltage for the one of the fastest clock outputs: System clock output */
-    CLOCK_SetFLASHAccessCyclesForFreq(100000000U);          /*!< Set FLASH wait states for core */
-
-    /*!< Set up PLL */
-    CLOCK_AttachClk(kEXT_CLK_to_PLL0);                    /*!< Switch PLL0CLKSEL to EXT_CLK */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0);                  /* Ensure PLL is on  */
-    POWER_DisablePD(kPDRUNCFG_PD_PLL0_SSCG);
-    const pll_setup_t pll0Setup = {
-        .pllctrl = SYSCON_PLL0CTRL_CLKEN_MASK | SYSCON_PLL0CTRL_SELI(53U) | SYSCON_PLL0CTRL_SELP(26U),
-        .pllndec = SYSCON_PLL0NDEC_NDIV(4U),
-        .pllpdec = SYSCON_PLL0PDEC_PDIV(2U),
-        .pllsscg = {0x0U,(SYSCON_PLL0SSCG1_MDIV_EXT(100U) | SYSCON_PLL0SSCG1_SEL_EXT_MASK)},
-        .pllRate = 100000000U,
-        .flags =  PLL_SETUPFLAG_WAITLOCK
-    };
-    CLOCK_SetPLL0Freq(&pll0Setup);                       /*!< Configure PLL0 to the desired values */
-
-    /*!< Set up dividers */
-    CLOCK_SetClkDiv(kCLOCK_DivAhbClk, 1U, false);         /*!< Set AHBCLKDIV divider to value 1 */
-
-    /*!< Set up clock selectors - Attach clocks to the peripheries */
-    CLOCK_AttachClk(kPLL0_to_MAIN_CLK);                 /*!< Switch MAIN_CLK to PLL0 */
-
-    /*< Set SystemCoreClock variable. */
-    SystemCoreClock = 100000000U;
-}
-
 void board_init(void) {
-  // Enable IOCON clock
-  CLOCK_EnableClock(kCLOCK_Iocon);
+  BOARD_InitBootPins();
+  BOARD_InitBootClocks();
+  BOARD_InitBootPeripherals();
 
-  // Init 100 MHz clock
-  BOARD_BootClockPLL100M();
+  board_led_write(0);
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
@@ -155,54 +79,8 @@ void board_init(void) {
   NVIC_SetPriority(USB1_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
 #endif
 
-  // Init all GPIO ports
-  GPIO_PortInit(GPIO, 0);
-  GPIO_PortInit(GPIO, 1);
-
-  // LED
-  IOCON_PinMuxSet(IOCON, LED_PORT, LED_PIN, IOCON_PIO_DIG_FUNC0_EN);
-  gpio_pin_config_t const led_config = {kGPIO_DigitalOutput, 1};
-  GPIO_PinInit(GPIO, LED_PORT, LED_PIN, &led_config);
-
-  board_led_write(0);
-
-#ifdef NEOPIXEL_PIN
-  // Neopixel
-  static uint32_t pixelData[NEOPIXEL_NUMBER];
-  IOCON_PinMuxSet(IOCON, NEOPIXEL_PORT, NEOPIXEL_PIN, IOCON_PIO_DIG_FUNC4_EN);
-
-  sctpix_init(NEOPIXEL_TYPE);
-  sctpix_addCh(NEOPIXEL_CH, pixelData, NEOPIXEL_NUMBER);
-  sctpix_setPixel(NEOPIXEL_CH, 0, 0x100010);
-  sctpix_setPixel(NEOPIXEL_CH, 1, 0x100010);
-  sctpix_show();
-#endif
-
-  // Button
-  IOCON_PinMuxSet(IOCON, BUTTON_PORT, BUTTON_PIN, IOCON_PIO_DIG_FUNC0_EN);
-  gpio_pin_config_t const button_config = {kGPIO_DigitalInput, 0};
-  GPIO_PinInit(GPIO, BUTTON_PORT, BUTTON_PIN, &button_config);
-
-#ifdef UART_DEV
-  // UART
-  IOCON_PinMuxSet(IOCON, UART_RX_PINMUX);
-  IOCON_PinMuxSet(IOCON, UART_TX_PINMUX);
-
-  // Enable UART when debug log is on
-  CLOCK_AttachClk(kFRO12M_to_FLEXCOMM0);
-  usart_config_t uart_config;
-  USART_GetDefaultConfig(&uart_config);
-  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
-  uart_config.enableTx = true;
-  uart_config.enableRx = true;
-  USART_Init(UART_DEV, &uart_config, 12000000);
-#endif
-
 #if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0)
-  /* PORT0 PIN22 configured as USB0_VBUS */
-  IOCON_PinMuxSet(IOCON, 0U, 22U, IOCON_PIO_DIG_FUNC7_EN);
   // Port0 is Full Speed
-
   NVIC_ClearPendingIRQ(USB0_IRQn);
   NVIC_ClearPendingIRQ(USB0_NEEDCLK_IRQn);
 
@@ -227,13 +105,6 @@ void board_init(void) {
     /* enable USB Device clock */
     CLOCK_EnableUsbfs0DeviceClock(kCLOCK_UsbfsSrcFro, CLOCK_GetFreq(kCLOCK_FroHf));
   } else {
-  #ifdef USBFS_POWER_PORT
-    /* Configure USB0 Power Switch Pin */
-    IOCON_PinMuxSet(IOCON, USBFS_POWER_PORT, USBFS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
-
-    gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBFS_POWER_STATE_ON};
-    GPIO_PinInit(GPIO, USBFS_POWER_PORT, USBFS_POWER_PIN, &power_pin_config);
-  #endif
     CLOCK_EnableUsbfs0HostClock(kCLOCK_UsbfsSrcPll1, 48000000U);
     USBFSH->PORTMODE &= ~USBFSH_PORTMODE_DEV_ENABLE_MASK;
   }
@@ -262,13 +133,6 @@ void board_init(void) {
     /* enable USB Device clock */
     CLOCK_EnableUsbhs0DeviceClock(kCLOCK_UsbSrcUnused, 0U);
   } else {
-  #ifdef USBHS_POWER_PORT
-    /* Configure USB1 Power Switch Pin */
-    IOCON_PinMuxSet(IOCON, USBHS_POWER_PORT, USBHS_POWER_PIN, IOCON_PIO_DIG_FUNC0_EN);
-
-    gpio_pin_config_t const power_pin_config = {kGPIO_DigitalOutput, USBHS_POWER_STATE_ON};
-    GPIO_PinInit(GPIO, USBHS_POWER_PORT, USBHS_POWER_PIN, &power_pin_config);
-  #endif
     CLOCK_EnableUsbhs0HostClock(kCLOCK_UsbSrcUnused, 0U);
   }
 
@@ -283,7 +147,7 @@ void board_init(void) {
   USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_CLKGATE_MASK;
   USBPHY->CTRL_SET = USBPHY_CTRL_SET_ENAUTOCLR_PHY_PWD_MASK;
 
-  // PHY calibration values for LPCXPRESSO55S69 from mcux-sdk
+  // PHY Tx calibration
   USBPHY->TX = ((USBPHY->TX & (~(USBPHY_TX_D_CAL_MASK | USBPHY_TX_TXCAL45DM_MASK | USBPHY_TX_TXCAL45DP_MASK))) |
                (USBPHY_TX_D_CAL(0x05U) | USBPHY_TX_TXCAL45DP(0x0AU) | USBPHY_TX_TXCAL45DM(0x0AU)));
 
@@ -299,17 +163,6 @@ void board_init(void) {
 
 void board_led_write(bool state) {
   GPIO_PinWrite(GPIO, LED_PORT, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
-
-#ifdef NEOPIXEL_PIN
-  if (state) {
-    sctpix_setPixel(NEOPIXEL_CH, 0, 0x100000);
-    sctpix_setPixel(NEOPIXEL_CH, 1, 0x101010);
-  } else {
-    sctpix_setPixel(NEOPIXEL_CH, 0, 0x001000);
-    sctpix_setPixel(NEOPIXEL_CH, 1, 0x000010);
-  }
-  sctpix_show();
-#endif
 }
 
 uint32_t board_button_read(void) {
diff --git a/hw/bsp/lpc55/family.cmake b/hw/bsp/lpc55/family.cmake
index a6f3bc167..2dc1c33f3 100644
--- a/hw/bsp/lpc55/family.cmake
+++ b/hw/bsp/lpc55/family.cmake
@@ -1,7 +1,7 @@
 include_guard()
 
 set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-lpc)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-lpc/LPC5500)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
@@ -22,7 +22,7 @@ if (NOT DEFINED RHPORT_DEVICE)
   set(RHPORT_DEVICE 1)
 endif ()
 if (NOT DEFINED RHPORT_HOST)
-  set(RHPORT_HOST 1)
+  set(RHPORT_HOST 0)
 endif ()
 
 # port 0 is fullspeed, port 1 is highspeed
@@ -41,38 +41,46 @@ cmake_print_variables(RHPORT_DEVICE RHPORT_DEVICE_SPEED RHPORT_HOST RHPORT_HOST_
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-  set(LD_FILE_GNU ${SDK_DIR}/LPC5500/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  set(LD_FILE_GNU ${SDK_DIR}/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
 
 if (NOT DEFINED STARTUP_FILE_GNU)
-  set(STARTUP_FILE_GNU ${SDK_DIR}/LPC5500/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
+  set(STARTUP_FILE_GNU ${SDK_DIR}/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
 endif ()
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
 if (NOT DEFINED LD_FILE_IAR)
-  set(LD_FILE_IAR ${SDK_DIR}/LPC5500/${MCU_VARIANT}/iar/${MCU_CORE}_flash.icf)
+  set(LD_FILE_IAR ${SDK_DIR}/${MCU_VARIANT}/iar/${MCU_CORE}_flash.icf)
 endif ()
 
 if (NOT DEFINED STARTUP_FILE_IAR)
-  set(STARTUP_FILE_IAR ${SDK_DIR}/LPC5500/${MCU_VARIANT}/iar/startup_${MCU_CORE}.s)
+  set(STARTUP_FILE_IAR ${SDK_DIR}/${MCU_VARIANT}/iar/startup_${MCU_CORE}.s)
 endif ()
 
 #------------------------------------
 # Board Target
 #------------------------------------
 function(family_add_board BOARD_TARGET)
+  # Some variants (e.g. LPC55S28) share drivers with another variant (e.g. LPC55S69)
+  if (NOT DEFINED MCU_DRIVER_VARIANT)
+    set(MCU_DRIVER_VARIANT ${MCU_VARIANT})
+  endif ()
+
   add_library(${BOARD_TARGET} STATIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/pin_mux.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/peripherals.c
     # driver
     ${MCUX_DIR}/drivers/lpc_gpio/fsl_gpio.c
     ${MCUX_DIR}/drivers/common/fsl_common_arm.c
     ${MCUX_DIR}/drivers/flexcomm/fsl_flexcomm.c
     ${MCUX_DIR}/drivers/flexcomm/usart/fsl_usart.c
     # mcu
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/system_${MCU_CORE}.c
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_power.c
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers/fsl_reset.c
+    ${SDK_DIR}/${MCU_VARIANT}/system_${MCU_CORE}.c
+    ${SDK_DIR}/${MCU_DRIVER_VARIANT}/drivers/fsl_clock.c
+    ${SDK_DIR}/${MCU_DRIVER_VARIANT}/drivers/fsl_power.c
+    ${SDK_DIR}/${MCU_DRIVER_VARIANT}/drivers/fsl_reset.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${TOP}/lib/sct_neopixel
@@ -84,9 +92,9 @@ function(family_add_board BOARD_TARGET)
     ${MCUX_DIR}/drivers/lpc_gpio
     ${MCUX_DIR}/drivers/sctimer
     # mcu
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}
-    ${SDK_DIR}/LPC5500/${MCU_VARIANT}/drivers
-    ${SDK_DIR}/LPC5500/periph
+    ${SDK_DIR}/${MCU_VARIANT}
+    ${SDK_DIR}/${MCU_DRIVER_VARIANT}/drivers
+    ${SDK_DIR}/periph
     ${CMSIS_DIR}/CMSIS/Core/Include
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index a7d06d70a..d33259bbf 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -5,24 +5,36 @@ CPU_CORE ?= cortex-m33
 MCUX_DIR = hw/mcu/nxp/mcuxsdk-core
 SDK_DIR = hw/mcu/nxp/mcux-devices-lpc
 
-# Default to Highspeed PORT1
-PORT ?= 1
+# Some variants (e.g. LPC55S28) share drivers with another variant (e.g. LPC55S69)
+MCU_DRIVER_VARIANT ?= $(MCU_VARIANT)
+
+# Default device port to USB1 highspeed, host to USB0 fullspeed
+RHPORT_DEVICE ?= 1
+RHPORT_HOST ?= 0
 
 CFLAGS += \
   -flto \
   -D__STARTUP_CLEAR_BSS \
   -DCFG_TUSB_MCU=OPT_MCU_LPC55XX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))' \
-  -DBOARD_TUD_RHPORT=$(PORT) \
+  -DBOARD_TUD_RHPORT=$(RHPORT_DEVICE) \
+  -DBOARD_TUH_RHPORT=$(RHPORT_HOST) \
 
-ifeq ($(PORT), 1)
-  $(info "PORT1 High Speed")
+# port 0 is fullspeed, port 1 is highspeed
+ifeq ($(RHPORT_DEVICE), 1)
   CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+  # Port1 controller can only access USB_SRAM
+  CFLAGS += -DCFG_TUD_MEM_SECTION='__attribute__((section("m_usb_global")))'
+else
+  CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
+endif
 
-  # LPC55 Highspeed Port1 can only write to USB_SRAM region
-  CFLAGS += -DCFG_TUSB_MEM_SECTION='__attribute__((section("m_usb_global")))'
+ifeq ($(RHPORT_HOST), 1)
+  CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
+  CFLAGS += -DCFG_TUH_MEM_SECTION='__attribute__((section("m_usb_global")))'
+  CFLAGS += -DCFG_TUH_USBIP_IP3516=1
 else
-  $(info "PORT0 Full Speed")
+  CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
 endif
 
 # mcu driver cause following warnings
@@ -40,9 +52,9 @@ LD_FILE ?= $(SDK_DIR)/LPC5500/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
 SRC_C += \
 	$(TOP)/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
 	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/system_$(MCU_CORE).c \
-	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_clock.c \
-	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_power.c \
-	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers/fsl_reset.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_DRIVER_VARIANT)/drivers/fsl_clock.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_DRIVER_VARIANT)/drivers/fsl_power.c \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_DRIVER_VARIANT)/drivers/fsl_reset.c \
 	$(TOP)/$(MCUX_DIR)/drivers/lpc_gpio/fsl_gpio.c \
 	$(TOP)/$(MCUX_DIR)/drivers/common/fsl_common_arm.c \
 	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/fsl_flexcomm.c \
@@ -54,7 +66,7 @@ INC += \
 	$(TOP)/lib/sct_neopixel \
 	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
 	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT) \
-	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(SDK_DIR)/LPC5500/$(MCU_DRIVER_VARIANT)/drivers \
 	$(TOP)/$(SDK_DIR)/LPC5500/periph \
 	$(TOP)/$(MCUX_DIR)/drivers/common \
 	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart \
-- 
cgit v1.3.1


From a82ba9b884ae880a472314f04d1a2a3a7e6469f7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 10 Mar 2026 18:04:20 +0700
Subject: fix make lpc51 build

---
 hw/bsp/lpc51/family.mk | 4 ++--
 hw/bsp/lpc55/family.mk | 1 +
 2 files changed, 3 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk
index baca11c05..34987d183 100644
--- a/hw/bsp/lpc51/family.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -30,8 +30,8 @@ SRC_C += \
 	$(TOP)/$(MCUX_DIR)/drivers/flexcomm/usart/fsl_usart.c \
 
 INC += \
-    $(TOP)/$(BOARD_PATH) \
-    $(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
 	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT) \
 	$(TOP)/$(SDK_DIR)/LPC51U68/$(MCU_VARIANT)/drivers \
 	$(TOP)/$(SDK_DIR)/LPC51U68/periph \
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index d33259bbf..2fc76ed50 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -33,6 +33,7 @@ ifeq ($(RHPORT_HOST), 1)
   CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
   CFLAGS += -DCFG_TUH_MEM_SECTION='__attribute__((section("m_usb_global")))'
   CFLAGS += -DCFG_TUH_USBIP_IP3516=1
+	SRC_C += $(TOP)/src/portable/nxp/lpc_ip3516/hcd_lpc_ip3516.c
 else
   CFLAGS += -DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
 endif
-- 
cgit v1.3.1


From e2d8d799404d08a85a19a91e01264b7a931c3b66 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 11 Mar 2026 12:49:48 +0700
Subject: migrate imxrt to use new mcux-devices-rt

---
 hw/bsp/BoardPresets.json                           |  88 +++--
 hw/bsp/family_support.cmake                        |  32 +-
 hw/bsp/imxrt/boards/metro_m7_1011/board.cmake      |   1 +
 hw/bsp/imxrt/boards/metro_m7_1011/board.mk         |   1 +
 .../metro_m7_1011/ozone/metro_m7_1011.jdebug       | 215 ++++++++++
 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.cmake   |  15 -
 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.h       |  55 ---
 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.mk      |  17 -
 .../boards/metro_m7_1011_sd/board/clock_config.c   | 340 ----------------
 .../boards/metro_m7_1011_sd/board/clock_config.h   |  97 -----
 .../imxrt/boards/metro_m7_1011_sd/board/pin_mux.c  | 108 ------
 .../imxrt/boards/metro_m7_1011_sd/board/pin_mux.h  | 110 ------
 .../evkmimxrt1010_flexspi_nor_config.c             |  48 ---
 .../evkmimxrt1010_flexspi_nor_config.h             | 267 -------------
 .../boards/metro_m7_1011_sd/metro_m7_1011_sd.ld    | 270 -------------
 .../boards/metro_m7_1011_sd/metro_m7_1011_sd.mex   | 431 ---------------------
 .../metro_m7_1011_sd/ozone/metro_m7_1011_sd.jdebug | 215 ----------
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake    |   1 +
 hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk       |   1 +
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake     |   1 +
 hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk        |   1 +
 hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake    |   3 +-
 hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk       |   1 +
 hw/bsp/imxrt/boards/teensy_40/board.cmake          |   1 +
 hw/bsp/imxrt/boards/teensy_40/board.mk             |   1 +
 hw/bsp/imxrt/boards/teensy_41/board.cmake          |   1 +
 hw/bsp/imxrt/boards/teensy_41/board.mk             |   1 +
 hw/bsp/imxrt/family.cmake                          |  85 ++--
 hw/bsp/imxrt/family.mk                             |  55 ++-
 tools/get_deps.py                                  |  11 +-
 40 files changed, 418 insertions(+), 2065 deletions(-)
 create mode 100644 hw/bsp/imxrt/boards/metro_m7_1011/ozone/metro_m7_1011.jdebug
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.cmake
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.h
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board.mk
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.c
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.h
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.c
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.h
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.c
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.h
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.ld
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.mex
 delete mode 100644 hw/bsp/imxrt/boards/metro_m7_1011_sd/ozone/metro_m7_1011_sd.jdebug

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index fabbeed93..ea6317771 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -90,6 +90,18 @@
       "name": "at_start_f437",
       "inherits": "default"
     },
+    {
+      "name": "at_start_f455",
+      "inherits": "default"
+    },
+    {
+      "name": "at_start_f456",
+      "inherits": "default"
+    },
+    {
+      "name": "at_start_f457",
+      "inherits": "default"
+    },
     {
       "name": "atsamd21_xpro",
       "inherits": "default"
@@ -370,10 +382,6 @@
       "name": "metro_m7_1011",
       "inherits": "default"
     },
-    {
-      "name": "metro_m7_1011_sd",
-      "inherits": "default"
-    },
     {
       "name": "mimxrt1010_evk",
       "inherits": "default"
@@ -1011,6 +1019,21 @@
       "description": "Build preset for the at_start_f437 board",
       "configurePreset": "at_start_f437"
     },
+    {
+      "name": "at_start_f455",
+      "description": "Build preset for the at_start_f455 board",
+      "configurePreset": "at_start_f455"
+    },
+    {
+      "name": "at_start_f456",
+      "description": "Build preset for the at_start_f456 board",
+      "configurePreset": "at_start_f456"
+    },
+    {
+      "name": "at_start_f457",
+      "description": "Build preset for the at_start_f457 board",
+      "configurePreset": "at_start_f457"
+    },
     {
       "name": "atsamd21_xpro",
       "description": "Build preset for the atsamd21_xpro board",
@@ -1406,11 +1429,6 @@
       "description": "Build preset for the metro_m7_1011 board",
       "configurePreset": "metro_m7_1011"
     },
-    {
-      "name": "metro_m7_1011_sd",
-      "description": "Build preset for the metro_m7_1011_sd board",
-      "configurePreset": "metro_m7_1011_sd"
-    },
     {
       "name": "mimxrt1010_evk",
       "description": "Build preset for the mimxrt1010_evk board",
@@ -2287,6 +2305,45 @@
         }
       ]
     },
+    {
+      "name": "at_start_f455",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "at_start_f455"
+        },
+        {
+          "type": "build",
+          "name": "at_start_f455"
+        }
+      ]
+    },
+    {
+      "name": "at_start_f456",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "at_start_f456"
+        },
+        {
+          "type": "build",
+          "name": "at_start_f456"
+        }
+      ]
+    },
+    {
+      "name": "at_start_f457",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "at_start_f457"
+        },
+        {
+          "type": "build",
+          "name": "at_start_f457"
+        }
+      ]
+    },
     {
       "name": "atsamd21_xpro",
       "steps": [
@@ -3314,19 +3371,6 @@
         }
       ]
     },
-    {
-      "name": "metro_m7_1011_sd",
-      "steps": [
-        {
-          "type": "configure",
-          "name": "metro_m7_1011_sd"
-        },
-        {
-          "type": "build",
-          "name": "metro_m7_1011_sd"
-        }
-      ]
-    },
     {
       "name": "mimxrt1010_evk",
       "steps": [
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index c166a0618..5d21b4f79 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -244,7 +244,7 @@ function(family_add_bloaty TARGET)
     COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>
     VERBATIM)
 
-  set_property(TARGET ${TARGET}-bloaty PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-bloaty PROPERTY FOLDER ${TARGET}-group)
   # post build
   #  add_custom_command(TARGET ${TARGET} POST_BUILD
   #    COMMAND ${BLOATY_EXE} --csv ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_bloaty.csv
@@ -265,7 +265,7 @@ function(family_add_linkermap TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-linkermap PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-linkermap PROPERTY FOLDER ${TARGET}-group)
 
   # post build
   add_custom_command(TARGET ${TARGET} POST_BUILD
@@ -345,7 +345,7 @@ echo \"$MEMBROWSE_CMD\"")
       COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=0 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
       VERBATIM
       )
-    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET})
+    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET}-group)
 
     add_custom_target(${TARGET}-membrowse-upload
       COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=1 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
@@ -357,7 +357,7 @@ echo \"$MEMBROWSE_CMD\"")
     endif ()
     add_dependencies(examples-membrowse-upload ${TARGET}-membrowse-upload)
 
-    set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET})
+    set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET}-group)
   endif ()
 endfunction()
 
@@ -629,7 +629,7 @@ exit"
     VERBATIM
     )
 
-  set_property(TARGET ${NAME_TARGET}-jlink PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${NAME_TARGET}-jlink PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -644,7 +644,7 @@ function(family_flash_stlink TARGET)
     COMMAND ${STM32_PROGRAMMER_CLI} --connect port=swd --write $<TARGET_FILE:${TARGET}> --go
     )
 
-  set_property(TARGET ${TARGET}-stlink PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-stlink PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -659,7 +659,7 @@ function(family_flash_stflash TARGET)
     COMMAND ${ST_FLASH} write $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin 0x8000000
     )
 
-  set_property(TARGET ${TARGET}-stflash PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-stflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -687,7 +687,7 @@ function(family_flash_openocd TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-openocd PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-openocd PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -750,7 +750,7 @@ function(family_flash_wlink_rs TARGET)
     COMMAND ${WLINK_RS} flash $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-wlink-rs PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-wlink-rs PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -765,7 +765,7 @@ function(family_flash_pyocd TARGET)
     COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-pyocd PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-pyocd PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -775,7 +775,7 @@ function(family_flash_uf2 TARGET FAMILY_ID)
     DEPENDS ${TARGET}
     COMMAND python ${UF2CONV_PY} -f ${FAMILY_ID} --deploy $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.uf2
     )
-  set_property(TARGET ${TARGET}-uf2 PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-uf2 PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -791,7 +791,7 @@ function(family_flash_teensy TARGET)
     COMMAND ${TEENSY_CLI} --mcu=${TEENSY_MCU} -w -s $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
     )
 
-  set_property(TARGET ${TARGET}-teensy PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-teensy PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -811,7 +811,7 @@ function(family_flash_nxplink TARGET)
     COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-nxplink PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-nxplink PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -826,7 +826,7 @@ function(family_flash_dfu_util TARGET OPTION)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-dfu-util PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-dfu-util PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 function(family_flash_msp430flasher TARGET)
@@ -843,7 +843,7 @@ function(family_flash_msp430flasher TARGET)
             ${MSP430FLASHER} -w $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex -z [VCC]
     )
 
-  set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 function(family_flash_uniflash TARGET)
@@ -859,7 +859,7 @@ function(family_flash_uniflash TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET})
+  set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 #----------------------------------
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
index 99681ab12..63b2a120a 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1010)
 set(MCU_VARIANT MIMXRT1011)
 
 set(JLINK_DEVICE MIMXRT1011xxx5A)
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
index b845194c2..229b5c18c 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
+MCU_FAMILY = RT1010
 MCU_VARIANT = MIMXRT1011
 
 # LD file with uf2
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/ozone/metro_m7_1011.jdebug b/hw/bsp/imxrt/boards/metro_m7_1011/ozone/metro_m7_1011.jdebug
new file mode 100644
index 000000000..90f9b77e5
--- /dev/null
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/ozone/metro_m7_1011.jdebug
@@ -0,0 +1,215 @@
+
+/*********************************************************************
+*
+*       OnProjectLoad
+*
+* Function description
+*   Project load routine. Required.
+*
+**********************************************************************
+*/
+void OnProjectLoad (void) {
+  Project.SetTraceSource ("Trace Pins");
+  Project.SetTraceTiming (50, 50, 50, 50);
+  Project.SetDevice ("MIMXRT1011xxx4A");
+  Project.SetHostIF ("USB", "");
+  Project.SetTargetIF ("SWD");
+  Project.SetTIFSpeed ("20 MHz");
+  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
+  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
+  Project.AddSvdFile ("./MIMXRT1011.svd");
+
+
+  // timing delay for trace pins in pico seconds, default is 2 nano seconds
+
+	File.Open ("../../../../../../examples/cmake-build-metro-m7-1011-sd/device/cdc_msc/cdc_msc.elf");
+}
+
+/*********************************************************************
+*
+*      TargetReset
+*
+* Function description
+*   Replaces the default target device reset routine. Optional.
+*
+* Notes
+*   This example demonstrates the usage when
+*   debugging a RAM program on a Cortex-M target device
+*
+**********************************************************************
+*/
+//void TargetReset (void) {
+//
+//  unsigned int SP;
+//  unsigned int PC;
+//  unsigned int VectorTableAddr;
+//
+//  Exec.Reset();
+//
+//  VectorTableAddr = Elf.GetBaseAddr();
+//
+//  if (VectorTableAddr != 0xFFFFFFFF) {
+//
+//    Util.Log("Resetting Program.");
+//
+//    SP = Target.ReadU32(VectorTableAddr);
+//    Target.SetReg("SP", SP);
+//
+//    PC = Target.ReadU32(VectorTableAddr + 4);
+//    Target.SetReg("PC", PC);
+//  }
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetReset
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetReset (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetReset
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetReset (void) {
+}
+
+/*********************************************************************
+*
+*       DebugStart
+*
+* Function description
+*   Replaces the default debug session startup routine. Optional.
+*
+**********************************************************************
+*/
+//void DebugStart (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetConnect
+*
+* Function description
+*   Replaces the default target IF connection routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+
+void BeforeTargetConnect (void) {
+  //
+  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
+  //
+  //Project.SetJLinkScript("./ST_STM32H743_Traceconfig.pex");
+}
+
+/*********************************************************************
+*
+*       AfterTargetConnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetConnect (void) {
+//}
+
+/*********************************************************************
+*
+*       TargetDownload
+*
+* Function description
+*   Replaces the default program download routine. Optional.
+*
+**********************************************************************
+*/
+//void TargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*       BeforeTargetDownload
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDownload (void) {
+//}
+
+/*********************************************************************
+*
+*      AfterTargetDownload
+*
+* Function description
+*   Event handler routine.
+*    - Sets the PC register to program reset value.
+*    - Sets the SP register to program reset value on Cortex-M.
+*
+**********************************************************************
+*/
+void AfterTargetDownload (void) {
+
+}
+
+/*********************************************************************
+*
+*       BeforeTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void BeforeTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetDisconnect
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetDisconnect (void) {
+//}
+
+/*********************************************************************
+*
+*       AfterTargetHalt
+*
+* Function description
+*   Event handler routine. Optional.
+*
+**********************************************************************
+*/
+//void AfterTargetHalt (void) {
+//}
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.cmake b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.cmake
deleted file mode 100644
index 99681ab12..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-set(MCU_VARIANT MIMXRT1011)
-
-set(JLINK_DEVICE MIMXRT1011xxx5A)
-set(PYOCD_TARGET mimxrt1010)
-set(NXPLINK_DEVICE MIMXRT1011xxxxx:EVK-MIMXRT1010)
-
-function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/evkmimxrt1010_flexspi_nor_config.c
-    )
-  target_compile_definitions(${TARGET} PUBLIC
-    CPU_MIMXRT1011DAE5A
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
-endfunction()
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.h b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.h
deleted file mode 100644
index 8f100284a..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Adafruit Metro M7 1011 SD
-   url: https://www.adafruit.com/product/5600
-*/
-
-#ifndef BOARD_METRO_M7_1011_SD_H_
-#define BOARD_METRO_M7_1011_SD_H_
-
-// required since iMXRT MCUX-SDK include this file for board size
-#define BOARD_FLASH_SIZE     (8*1024*1024)
-
-// LED: IOMUXC_GPIO_03_GPIOMUX_IO03
-#define LED_PORT            BOARD_INITPINS_USER_LED_PERIPHERAL
-#define LED_PIN             BOARD_INITPINS_USER_LED_CHANNEL
-#define LED_STATE_ON        1
-
-// D8 as button: GPIO8
-#define BUTTON_PORT           BOARD_INITPINS_USER_BUTTON_PERIPHERAL
-#define BUTTON_PIN            BOARD_INITPINS_USER_BUTTON_CHANNEL
-#define BUTTON_STATE_ACTIVE   0
-
-// UART: IOMUXC_GPIO_09_LPUART1_RXD, IOMUXC_GPIO_10_LPUART1_TXD
-#define UART_PORT             LPUART1
-#define UART_CLK_ROOT         BOARD_BOOTCLOCKRUN_UART_CLK_ROOT
-
-static inline void BOARD_ConfigMPU(void) {
-}
-
-#endif
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.mk
deleted file mode 100644
index b845194c2..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board.mk
+++ /dev/null
@@ -1,17 +0,0 @@
-CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
-MCU_VARIANT = MIMXRT1011
-
-# LD file with uf2
-LD_FILE = $(BOARD_PATH)/$(BOARD).ld
-
-# For flash-jlink target
-JLINK_DEVICE = MIMXRT1011xxx5A
-
-# For flash-pyocd target
-PYOCD_TARGET = mimxrt1010
-
-# flash using pyocd
-flash: flash-uf2
-flash-uf2: $(BUILD)/$(PROJECT).uf2
-	@echo copying $<
-	@$(CP) $< /media/$(USER)/METROM7BOOT
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.c b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.c
deleted file mode 100644
index 1b28b668a..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.c
+++ /dev/null
@@ -1,340 +0,0 @@
-/*
- * How to setup clock using clock driver functions:
- *
- * 1. Call CLOCK_InitXXXPLL() to configure corresponding PLL clock.
- *
- * 2. Call CLOCK_InitXXXpfd() to configure corresponding PLL pfd clock.
- *
- * 3. Call CLOCK_SetMux() to configure corresponding clock source for target clock out.
- *
- * 4. Call CLOCK_SetDiv() to configure corresponding clock divider for target clock out.
- *
- * 5. Call CLOCK_SetXtalFreq() to set XTAL frequency based on board settings.
- *
- */
-
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v11.0
-processor: MIMXRT1011xxxxx
-package_id: MIMXRT1011DAE5A
-mcu_data: ksdk2_0
-processor_version: 13.0.2
-board: MIMXRT1010-EVK
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-
-#include "clock_config.h"
-#include "fsl_iomuxc.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockRUN();
-}
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockRUN
-called_from_default_init: true
-outputs:
-- {id: ADC_ALT_CLK.outFreq, value: 40 MHz}
-- {id: CKIL_SYNC_CLK_ROOT.outFreq, value: 32.768 kHz}
-- {id: CLK_1M.outFreq, value: 1 MHz}
-- {id: CLK_24M.outFreq, value: 24 MHz}
-- {id: CORE_CLK_ROOT.outFreq, value: 500 MHz}
-- {id: ENET_500M_REF_CLK.outFreq, value: 500 MHz}
-- {id: FLEXIO1_CLK_ROOT.outFreq, value: 30 MHz}
-- {id: FLEXSPI_CLK_ROOT.outFreq, value: 132 MHz}
-- {id: GPT1_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
-- {id: GPT2_ipg_clk_highfreq.outFreq, value: 62.5 MHz}
-- {id: IPG_CLK_ROOT.outFreq, value: 125 MHz}
-- {id: LPI2C_CLK_ROOT.outFreq, value: 60 MHz}
-- {id: LPSPI_CLK_ROOT.outFreq, value: 105.6 MHz}
-- {id: MQS_MCLK.outFreq, value: 1080/17 MHz}
-- {id: PERCLK_CLK_ROOT.outFreq, value: 62.5 MHz}
-- {id: SAI1_CLK_ROOT.outFreq, value: 1080/17 MHz}
-- {id: SAI1_MCLK1.outFreq, value: 1080/17 MHz}
-- {id: SAI1_MCLK2.outFreq, value: 1080/17 MHz}
-- {id: SAI1_MCLK3.outFreq, value: 30 MHz}
-- {id: SAI3_CLK_ROOT.outFreq, value: 1080/17 MHz}
-- {id: SAI3_MCLK1.outFreq, value: 1080/17 MHz}
-- {id: SAI3_MCLK3.outFreq, value: 30 MHz}
-- {id: SPDIF0_CLK_ROOT.outFreq, value: 30 MHz}
-- {id: TRACE_CLK_ROOT.outFreq, value: 132 MHz}
-- {id: UART_CLK_ROOT.outFreq, value: 80 MHz}
-- {id: USBPHY_CLK.outFreq, value: 480 MHz}
-settings:
-- {id: CCM.ADC_ACLK_PODF.scale, value: '12', locked: true}
-- {id: CCM.AHB_PODF.scale, value: '1', locked: true}
-- {id: CCM.FLEXSPI_PODF.scale, value: '4', locked: true}
-- {id: CCM.IPG_PODF.scale, value: '4'}
-- {id: CCM.LPSPI_PODF.scale, value: '5'}
-- {id: CCM.PERCLK_PODF.scale, value: '2', locked: true}
-- {id: CCM.PRE_PERIPH_CLK_SEL.sel, value: CCM_ANALOG.ENET_500M_REF_CLK}
-- {id: CCM.SAI1_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
-- {id: CCM.SAI3_CLK_SEL.sel, value: CCM_ANALOG.PLL3_PFD2_CLK}
-- {id: CCM.TRACE_CLK_SEL.sel, value: CCM_ANALOG.PLL2_MAIN_CLK}
-- {id: CCM_ANALOG.PLL2.denom, value: '1'}
-- {id: CCM_ANALOG.PLL2.num, value: '0'}
-- {id: CCM_ANALOG.PLL2_BYPASS.sel, value: CCM_ANALOG.PLL2_OUT_CLK}
-- {id: CCM_ANALOG.PLL2_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD0}
-- {id: CCM_ANALOG.PLL2_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD1}
-- {id: CCM_ANALOG.PLL2_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD2}
-- {id: CCM_ANALOG.PLL2_PFD2_DIV.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL2_PFD2_MUL.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL2_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL2_PFD3}
-- {id: CCM_ANALOG.PLL2_PFD3_DIV.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL2_PFD3_MUL.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL3_BYPASS.sel, value: CCM_ANALOG.PLL3}
-- {id: CCM_ANALOG.PLL3_PFD0_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD0}
-- {id: CCM_ANALOG.PLL3_PFD0_DIV.scale, value: '22', locked: true}
-- {id: CCM_ANALOG.PLL3_PFD0_MUL.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL3_PFD1_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD1}
-- {id: CCM_ANALOG.PLL3_PFD2_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD2}
-- {id: CCM_ANALOG.PLL3_PFD3_BYPASS.sel, value: CCM_ANALOG.PLL3_PFD3}
-- {id: CCM_ANALOG.PLL3_PFD3_DIV.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL3_PFD3_MUL.scale, value: '18', locked: true}
-- {id: CCM_ANALOG.PLL6_BYPASS.sel, value: CCM_ANALOG.PLL6}
-- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG, value: Enabled}
-- {id: CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG, value: Enabled}
-- {id: CCM_ANALOG_PLL_USB1_POWER_CFG, value: 'Yes'}
-sources:
-- {id: XTALOSC24M.RTC_OSC.outFreq, value: 32.768 kHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-
-/*******************************************************************************
- * Variables for BOARD_BootClockRUN configuration
- ******************************************************************************/
-const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN =
-    {
-        .loopDivider = 1,                         /* PLL loop divider, Fout = Fin * ( 20 + loopDivider*2 + numerator / denominator ) */
-        .numerator = 0,                           /* 30 bit numerator of fractional loop divider */
-        .denominator = 1,                         /* 30 bit denominator of fractional loop divider */
-        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-    };
-const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN =
-    {
-        .loopDivider = 0,                         /* PLL loop divider, Fout = Fin * 20 */
-        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-    };
-const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN =
-    {
-        .enableClkOutput500M = true,              /* Enable the PLL providing the ENET 500MHz reference clock */
-        .src = 0,                                 /* Bypass clock source, 0 - OSC 24M, 1 - CLK1_P and CLK1_N */
-    };
-/*******************************************************************************
- * Code for BOARD_BootClockRUN configuration
- ******************************************************************************/
-void BOARD_BootClockRUN(void)
-{
-    /* Init RTC OSC clock frequency. */
-    CLOCK_SetRtcXtalFreq(32768U);
-    /* Enable 1MHz clock output. */
-    XTALOSC24M->OSC_CONFIG2 |= XTALOSC24M_OSC_CONFIG2_ENABLE_1M_MASK;
-    /* Use free 1MHz clock output. */
-    XTALOSC24M->OSC_CONFIG2 &= ~XTALOSC24M_OSC_CONFIG2_MUX_1M_MASK;
-    /* Set XTAL 24MHz clock frequency. */
-    CLOCK_SetXtalFreq(24000000U);
-    /* Enable XTAL 24MHz clock source. */
-    CLOCK_InitExternalClk(0);
-    /* Enable internal RC. */
-    CLOCK_InitRcOsc24M();
-    /* Switch clock source to external OSC. */
-    CLOCK_SwitchOsc(kCLOCK_XtalOsc);
-    /* Set Oscillator ready counter value. */
-    CCM->CCR = (CCM->CCR & (~CCM_CCR_OSCNT_MASK)) | CCM_CCR_OSCNT(127);
-    /* Setting the VDD_SOC to 1.25V. It is necessary to config CORE to 500Mhz. */
-    DCDC->REG3 = (DCDC->REG3 & (~DCDC_REG3_TRG_MASK)) | DCDC_REG3_TRG(0x12);
-    /* Waiting for DCDC_STS_DC_OK bit is asserted */
-    while (DCDC_REG0_STS_DC_OK_MASK != (DCDC_REG0_STS_DC_OK_MASK & DCDC->REG0))
-    {
-    }
-    /* Disable IPG clock gate. */
-    CLOCK_DisableClock(kCLOCK_Adc1);
-    CLOCK_DisableClock(kCLOCK_Xbar1);
-    /* Set IPG_PODF. */
-    CLOCK_SetDiv(kCLOCK_IpgDiv, 3);
-    /* Init Enet PLL. */
-    CLOCK_InitEnetPll(&enetPllConfig_BOARD_BootClockRUN);
-    /* Disable PERCLK clock gate. */
-    CLOCK_DisableClock(kCLOCK_Gpt1);
-    CLOCK_DisableClock(kCLOCK_Gpt1S);
-    CLOCK_DisableClock(kCLOCK_Gpt2);
-    CLOCK_DisableClock(kCLOCK_Gpt2S);
-    CLOCK_DisableClock(kCLOCK_Pit);
-    /* Set PERCLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_PerclkDiv, 1);
-    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
-     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
-     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
-#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
-    /* Disable Flexspi clock gate. */
-    CLOCK_DisableClock(kCLOCK_FlexSpi);
-    /* Set FLEXSPI_PODF. */
-    CLOCK_SetDiv(kCLOCK_FlexspiDiv, 3);
-    /* Set Flexspi clock source. */
-    CLOCK_SetMux(kCLOCK_FlexspiMux, 0);
-    CLOCK_SetMux(kCLOCK_FlexspiSrcMux, 0);
-#endif
-    /* Disable ADC_ACLK_EN clock gate. */
-    CCM->CSCMR2 &= ~CCM_CSCMR2_ADC_ACLK_EN_MASK;
-    /* Set ADC_ACLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_AdcDiv, 11);
-    /* Disable LPSPI clock gate. */
-    CLOCK_DisableClock(kCLOCK_Lpspi1);
-    CLOCK_DisableClock(kCLOCK_Lpspi2);
-    /* Set LPSPI_PODF. */
-    CLOCK_SetDiv(kCLOCK_LpspiDiv, 4);
-    /* Set Lpspi clock source. */
-    CLOCK_SetMux(kCLOCK_LpspiMux, 2);
-    /* Disable TRACE clock gate. */
-    CLOCK_DisableClock(kCLOCK_Trace);
-    /* Set TRACE_PODF. */
-    CLOCK_SetDiv(kCLOCK_TraceDiv, 3);
-    /* Set Trace clock source. */
-    CLOCK_SetMux(kCLOCK_TraceMux, 0);
-    /* Disable SAI1 clock gate. */
-    CLOCK_DisableClock(kCLOCK_Sai1);
-    /* Set SAI1_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Sai1PreDiv, 3);
-    /* Set SAI1_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Sai1Div, 1);
-    /* Set Sai1 clock source. */
-    CLOCK_SetMux(kCLOCK_Sai1Mux, 0);
-    /* Disable SAI3 clock gate. */
-    CLOCK_DisableClock(kCLOCK_Sai3);
-    /* Set SAI3_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Sai3PreDiv, 3);
-    /* Set SAI3_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Sai3Div, 1);
-    /* Set Sai3 clock source. */
-    CLOCK_SetMux(kCLOCK_Sai3Mux, 0);
-    /* Disable Lpi2c clock gate. */
-    CLOCK_DisableClock(kCLOCK_Lpi2c1);
-    CLOCK_DisableClock(kCLOCK_Lpi2c2);
-    /* Set LPI2C_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Lpi2cDiv, 0);
-    /* Set Lpi2c clock source. */
-    CLOCK_SetMux(kCLOCK_Lpi2cMux, 0);
-    /* Disable UART clock gate. */
-    CLOCK_DisableClock(kCLOCK_Lpuart1);
-    CLOCK_DisableClock(kCLOCK_Lpuart2);
-    CLOCK_DisableClock(kCLOCK_Lpuart3);
-    CLOCK_DisableClock(kCLOCK_Lpuart4);
-    /* Set UART_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_UartDiv, 0);
-    /* Set Uart clock source. */
-    CLOCK_SetMux(kCLOCK_UartMux, 0);
-    /* Disable SPDIF clock gate. */
-    CLOCK_DisableClock(kCLOCK_Spdif);
-    /* Set SPDIF0_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Spdif0PreDiv, 1);
-    /* Set SPDIF0_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Spdif0Div, 7);
-    /* Set Spdif clock source. */
-    CLOCK_SetMux(kCLOCK_SpdifMux, 3);
-    /* Disable Flexio1 clock gate. */
-    CLOCK_DisableClock(kCLOCK_Flexio1);
-    /* Set FLEXIO1_CLK_PRED. */
-    CLOCK_SetDiv(kCLOCK_Flexio1PreDiv, 1);
-    /* Set FLEXIO1_CLK_PODF. */
-    CLOCK_SetDiv(kCLOCK_Flexio1Div, 7);
-    /* Set Flexio1 clock source. */
-    CLOCK_SetMux(kCLOCK_Flexio1Mux, 3);
-    /* In SDK projects, external flash (configured by FLEXSPI) will be initialized by dcd.
-     * With this macro XIP_EXTERNAL_FLASH, usb1 pll (selected to be FLEXSPI clock source in SDK projects) will be left unchanged.
-     * Note: If another clock source is selected for FLEXSPI, user may want to avoid changing that clock as well.*/
-#if !(defined(XIP_EXTERNAL_FLASH) && (XIP_EXTERNAL_FLASH == 1))
-    /* Init Usb1 PLL. */
-    CLOCK_InitUsb1Pll(&usb1PllConfig_BOARD_BootClockRUN);
-    /* Init Usb1 pfd0. */
-    CLOCK_InitUsb1Pfd(kCLOCK_Pfd0, 22);
-    /* Init Usb1 pfd1. */
-    CLOCK_InitUsb1Pfd(kCLOCK_Pfd1, 16);
-    /* Init Usb1 pfd2. */
-    CLOCK_InitUsb1Pfd(kCLOCK_Pfd2, 17);
-    /* Init Usb1 pfd3. */
-    CLOCK_InitUsb1Pfd(kCLOCK_Pfd3, 18);
-#endif
-    /* Set periph clock source to use the USB1 PLL output (PLL3_SW_CLK) temporarily. */
-    /* Set Pll3 SW clock source to use the USB1 PLL output. */
-    CLOCK_SetMux(kCLOCK_Pll3SwMux, 0);
-    /* Set safe value of the AHB_PODF. */
-    CLOCK_SetDiv(kCLOCK_AhbDiv, 1);
-    /* Set periph clock2 clock source to use the PLL3_SW_CLK. */
-    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
-    /* Set peripheral clock source (glitchless mux) to select the temporary core clock. */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 1);
-    /* Set per clock source. */
-    CLOCK_SetMux(kCLOCK_PerclkMux, 0);
-    /* Init System PLL. */
-    CLOCK_InitSysPll(&sysPllConfig_BOARD_BootClockRUN);
-    /* Init System pfd0. */
-    CLOCK_InitSysPfd(kCLOCK_Pfd0, 27);
-    /* Init System pfd1. */
-    CLOCK_InitSysPfd(kCLOCK_Pfd1, 16);
-    /* Init System pfd2. */
-    CLOCK_InitSysPfd(kCLOCK_Pfd2, 18);
-    /* Init System pfd3. */
-    CLOCK_InitSysPfd(kCLOCK_Pfd3, 18);
-    /* DeInit Audio PLL. */
-    CLOCK_DeinitAudioPll();
-    /* Bypass Audio PLL. */
-    CLOCK_SetPllBypass(CCM_ANALOG, kCLOCK_PllAudio, 1);
-    /* Set divider for Audio PLL. */
-    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_LSB_MASK;
-    CCM_ANALOG->MISC2 &= ~CCM_ANALOG_MISC2_AUDIO_DIV_MSB_MASK;
-    /* Enable Audio PLL output. */
-    CCM_ANALOG->PLL_AUDIO |= CCM_ANALOG_PLL_AUDIO_ENABLE_MASK;
-    /* Set preperiph clock source. */
-    CLOCK_SetMux(kCLOCK_PrePeriphMux, 3);
-    /* Set periph clock source. */
-    CLOCK_SetMux(kCLOCK_PeriphMux, 0);
-    /* Set periph clock2 clock source. */
-    CLOCK_SetMux(kCLOCK_PeriphClk2Mux, 0);
-    /* Set AHB_PODF. */
-    CLOCK_SetDiv(kCLOCK_AhbDiv, 0);
-    /* Set clock out1 divider. */
-    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_DIV_MASK)) | CCM_CCOSR_CLKO1_DIV(0);
-    /* Set clock out1 source. */
-    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO1_SEL_MASK)) | CCM_CCOSR_CLKO1_SEL(1);
-    /* Set clock out2 divider. */
-    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_DIV_MASK)) | CCM_CCOSR_CLKO2_DIV(0);
-    /* Set clock out2 source. */
-    CCM->CCOSR = (CCM->CCOSR & (~CCM_CCOSR_CLKO2_SEL_MASK)) | CCM_CCOSR_CLKO2_SEL(18);
-    /* Set clock out1 drives clock out1. */
-    CCM->CCOSR &= ~CCM_CCOSR_CLK_OUT_SEL_MASK;
-    /* Disable clock out1. */
-    CCM->CCOSR &= ~CCM_CCOSR_CLKO1_EN_MASK;
-    /* Disable clock out2. */
-    CCM->CCOSR &= ~CCM_CCOSR_CLKO2_EN_MASK;
-    /* Set SAI1 MCLK1 clock source. */
-    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk1Sel, 0);
-    /* Set SAI1 MCLK2 clock source. */
-    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk2Sel, 0);
-    /* Set SAI1 MCLK3 clock source. */
-    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI1MClk3Sel, 0);
-    /* Set SAI3 MCLK3 clock source. */
-    IOMUXC_SetSaiMClkClockSource(IOMUXC_GPR, kIOMUXC_GPR_SAI3MClk3Sel, 0);
-    /* Set MQS configuration. */
-    IOMUXC_MQSConfig(IOMUXC_GPR,kIOMUXC_MqsPwmOverSampleRate32, 0);
-    /* Set GPT1 High frequency reference clock source. */
-    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT1_MASK;
-    /* Set GPT2 High frequency reference clock source. */
-    IOMUXC_GPR->GPR5 &= ~IOMUXC_GPR_GPR5_VREF_1M_CLK_GPT2_MASK;
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
-}
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.h b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.h
deleted file mode 100644
index 119fd94bd..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/clock_config.h
+++ /dev/null
@@ -1,97 +0,0 @@
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                         24000000U  /*!< Board xtal0 frequency in Hz */
-
-#define BOARD_XTAL32K_CLK_HZ                          32768U  /*!< Board xtal32k frequency in Hz */
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK             500000000U  /*!< Core clock frequency: 500000000Hz */
-
-/* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKRUN_ADC_ALT_CLK                40000000UL
-#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
-#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
-#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
-#define BOARD_BOOTCLOCKRUN_CORE_CLK_ROOT              500000000UL
-#define BOARD_BOOTCLOCKRUN_ENET_500M_REF_CLK          500000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           132000000UL
-#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      62500000UL
-#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      62500000UL
-#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               125000000UL
-#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
-#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
-#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
-#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            62500000UL
-#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
-#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY_CLK                 480000000UL
-
-/*! @brief Usb1 PLL set for BOARD_BootClockRUN configuration.
- */
-extern const clock_usb_pll_config_t usb1PllConfig_BOARD_BootClockRUN;
-/*! @brief Sys PLL for BOARD_BootClockRUN configuration.
- */
-extern const clock_sys_pll_config_t sysPllConfig_BOARD_BootClockRUN;
-/*! @brief Enet PLL set for BOARD_BootClockRUN configuration.
- */
-extern const clock_enet_pll_config_t enetPllConfig_BOARD_BootClockRUN;
-
-/*******************************************************************************
- * API for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockRUN(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.c b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.c
deleted file mode 100644
index aa38e02dc..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.c
+++ /dev/null
@@ -1,108 +0,0 @@
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Pins v13.1
-processor: MIMXRT1011xxxxx
-package_id: MIMXRT1011DAE5A
-mcu_data: ksdk2_0
-processor_version: 13.0.2
-board: MIMXRT1010-EVK
-external_user_signals: {}
-pin_labels:
-- {pin_num: '1', pin_signal: GPIO_11, label: GPIO_11, identifier: GPIO_11}
-- {pin_num: '70', pin_signal: GPIO_SD_05}
-- {pin_num: '10', pin_signal: GPIO_03, label: 'SAI1_RXD0/U10[16]', identifier: LED;USER_LED}
-- {pin_num: '4', pin_signal: GPIO_08, label: 'SAI1_MCLK/U10[11]', identifier: USER_BUTTON}
-- {pin_num: '79', pin_signal: GPIO_13, label: 'USB_OTG1_ID/J9[4]/Q9[2]', identifier: TRACE1}
-power_domains: {NVCC_GPIO: '3.3'}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-
-#include "fsl_common.h"
-#include "fsl_iomuxc.h"
-#include "fsl_gpio.h"
-#include "pin_mux.h"
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitBootPins
- * Description   : Calls initialization functions.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitBootPins(void) {
-    BOARD_InitPins();
-}
-
-/*
- * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-BOARD_InitPins:
-- options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
-- pin_list:
-  - {pin_num: '3', peripheral: LPUART1, signal: RXD, pin_signal: GPIO_09}
-  - {pin_num: '2', peripheral: LPUART1, signal: TXD, pin_signal: GPIO_10}
-  - {pin_num: '10', peripheral: GPIO1, signal: 'gpiomux_io, 03', pin_signal: GPIO_03, identifier: USER_LED, direction: OUTPUT}
-  - {pin_num: '79', peripheral: ARM, signal: 'TRACE, 1', pin_signal: GPIO_13, speed: MHZ_200}
-  - {pin_num: '80', peripheral: ARM, signal: 'TRACE, 2', pin_signal: GPIO_12, speed: MHZ_200}
-  - {pin_num: '58', peripheral: ARM, signal: arm_trace_clk, pin_signal: GPIO_AD_02, speed: MHZ_200}
-  - {pin_num: '1', peripheral: ARM, signal: 'TRACE, 3', pin_signal: GPIO_11, speed: MHZ_200}
-  - {pin_num: '60', peripheral: ARM, signal: 'TRACE, 0', pin_signal: GPIO_AD_00, speed: MHZ_200}
-  - {pin_num: '4', peripheral: GPIO1, signal: 'gpiomux_io, 08', pin_signal: GPIO_08, direction: INPUT, pull_keeper_select: Pull, pull_up_down_config: Pull_Up_100K_Ohm}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
- */
-
-/* FUNCTION ************************************************************************************************************
- *
- * Function Name : BOARD_InitPins
- * Description   : Configures pin routing and optionally pin electrical features.
- *
- * END ****************************************************************************************************************/
-void BOARD_InitPins(void) {
-  CLOCK_EnableClock(kCLOCK_Iomuxc);
-
-  /* GPIO configuration of USER_LED on GPIO_03 (pin 10) */
-  gpio_pin_config_t USER_LED_config = {
-      .direction = kGPIO_DigitalOutput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_03 (pin 10) */
-  GPIO_PinInit(GPIO1, 3U, &USER_LED_config);
-
-  /* GPIO configuration of USER_BUTTON on GPIO_08 (pin 4) */
-  gpio_pin_config_t USER_BUTTON_config = {
-      .direction = kGPIO_DigitalInput,
-      .outputLogic = 0U,
-      .interruptMode = kGPIO_NoIntmode
-  };
-  /* Initialize GPIO functionality on GPIO_08 (pin 4) */
-  GPIO_PinInit(GPIO1, 8U, &USER_BUTTON_config);
-
-  IOMUXC_SetPinMux(IOMUXC_GPIO_03_GPIOMUX_IO03, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_08_GPIOMUX_IO08, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_09_LPUART1_RXD, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_10_LPUART1_TXD, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_11_ARM_TRACE3, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_12_ARM_TRACE2, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_13_ARM_TRACE1, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_00_ARM_TRACE0, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_02_ARM_TRACE_CLK, 0U);
-  IOMUXC_GPR->GPR26 = ((IOMUXC_GPR->GPR26 &
-    (~(BOARD_INITPINS_IOMUXC_GPR_GPR26_GPIO_SEL_MASK)))
-      | IOMUXC_GPR_GPR26_GPIO_SEL(0x00U)
-    );
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_08_GPIOMUX_IO08, 0xB0A0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_11_ARM_TRACE3, 0x10E0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_12_ARM_TRACE2, 0x10E0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_13_ARM_TRACE1, 0x10E0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_00_ARM_TRACE0, 0x10E0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_02_ARM_TRACE_CLK, 0x10E0U);
-}
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.h b/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.h
deleted file mode 100644
index 42c256745..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/board/pin_mux.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _PIN_MUX_H_
-#define _PIN_MUX_H_
-
-/***********************************************************************************************************************
- * Definitions
- **********************************************************************************************************************/
-
-/*! @brief Direction type  */
-typedef enum _pin_mux_direction
-{
-  kPIN_MUX_DirectionInput = 0U,         /* Input direction */
-  kPIN_MUX_DirectionOutput = 1U,        /* Output direction */
-  kPIN_MUX_DirectionInputOrOutput = 2U  /* Input or output direction */
-} pin_mux_direction_t;
-
-/*!
- * @addtogroup pin_mux
- * @{
- */
-
-/***********************************************************************************************************************
- * API
- **********************************************************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif
-
-/*!
- * @brief Calls initialization functions.
- *
- */
-void BOARD_InitBootPins(void);
-
-#define BOARD_INITPINS_IOMUXC_GPR_GPR26_GPIO_SEL_MASK 0x08U /*!< Select GPIO1 or GPIO2: affected bits mask */
-
-/* GPIO_09 (number 3), LPUART1_RXD/J56[2] */
-/* Routed pin properties */
-#define BOARD_INITPINS_UART1_RXD_PERIPHERAL                              LPUART1   /*!< Peripheral name */
-#define BOARD_INITPINS_UART1_RXD_SIGNAL                                      RXD   /*!< Signal name */
-
-/* GPIO_10 (number 2), LPUART1_TXD/J56[4] */
-/* Routed pin properties */
-#define BOARD_INITPINS_UART1_TXD_PERIPHERAL                              LPUART1   /*!< Peripheral name */
-#define BOARD_INITPINS_UART1_TXD_SIGNAL                                      TXD   /*!< Signal name */
-
-/* GPIO_03 (number 10), SAI1_RXD0/U10[16] */
-/* Routed pin properties */
-#define BOARD_INITPINS_USER_LED_PERIPHERAL                                 GPIO1   /*!< Peripheral name */
-#define BOARD_INITPINS_USER_LED_SIGNAL                                gpiomux_io   /*!< Signal name */
-#define BOARD_INITPINS_USER_LED_CHANNEL                                       3U   /*!< Signal channel */
-
-/* GPIO_13 (number 79), USB_OTG1_ID/J9[4]/Q9[2] */
-/* Routed pin properties */
-#define BOARD_INITPINS_TRACE1_PERIPHERAL                                     ARM   /*!< Peripheral name */
-#define BOARD_INITPINS_TRACE1_SIGNAL                                       TRACE   /*!< Signal name */
-#define BOARD_INITPINS_TRACE1_CHANNEL                                         1U   /*!< Signal channel */
-
-/* GPIO_12 (number 80), USB_OTG1_OC/U7[A2] */
-/* Routed pin properties */
-#define BOARD_INITPINS_USB_OTG1_OC_PERIPHERAL                                ARM   /*!< Peripheral name */
-#define BOARD_INITPINS_USB_OTG1_OC_SIGNAL                                  TRACE   /*!< Signal name */
-#define BOARD_INITPINS_USB_OTG1_OC_CHANNEL                                    2U   /*!< Signal channel */
-
-/* GPIO_AD_02 (number 58), ADC12_2/J26[12]/J56[16] */
-/* Routed pin properties */
-#define BOARD_INITPINS_ADC12_2_PERIPHERAL                                    ARM   /*!< Peripheral name */
-#define BOARD_INITPINS_ADC12_2_SIGNAL                              arm_trace_clk   /*!< Signal name */
-
-/* GPIO_11 (number 1), GPIO_11 */
-/* Routed pin properties */
-#define BOARD_INITPINS_GPIO_11_PERIPHERAL                                    ARM   /*!< Peripheral name */
-#define BOARD_INITPINS_GPIO_11_SIGNAL                                      TRACE   /*!< Signal name */
-#define BOARD_INITPINS_GPIO_11_CHANNEL                                        3U   /*!< Signal channel */
-
-/* GPIO_AD_00 (number 60), USB_OTG1_PWR */
-/* Routed pin properties */
-#define BOARD_INITPINS_USB_OTG1_PWR_PERIPHERAL                               ARM   /*!< Peripheral name */
-#define BOARD_INITPINS_USB_OTG1_PWR_SIGNAL                                 TRACE   /*!< Signal name */
-#define BOARD_INITPINS_USB_OTG1_PWR_CHANNEL                                   0U   /*!< Signal channel */
-
-/* GPIO_08 (number 4), SAI1_MCLK/U10[11] */
-/* Routed pin properties */
-#define BOARD_INITPINS_USER_BUTTON_PERIPHERAL                              GPIO1   /*!< Peripheral name */
-#define BOARD_INITPINS_USER_BUTTON_SIGNAL                             gpiomux_io   /*!< Signal name */
-#define BOARD_INITPINS_USER_BUTTON_CHANNEL                                    8U   /*!< Signal channel */
-
-/*!
- * @brief Configures pin routing and optionally pin electrical features.
- *
- */
-void BOARD_InitPins(void);
-
-#if defined(__cplusplus)
-}
-#endif
-
-/*!
- * @}
- */
-#endif /* _PIN_MUX_H_ */
-
-/***********************************************************************************************************************
- * EOF
- **********************************************************************************************************************/
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.c b/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.c
deleted file mode 100644
index 752a65629..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.c
+++ /dev/null
@@ -1,48 +0,0 @@
-/*
- * Copyright 2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#include "evkmimxrt1010_flexspi_nor_config.h"
-
-/* Component ID definition, used by tools. */
-#ifndef FSL_COMPONENT_ID
-#define FSL_COMPONENT_ID "platform.drivers.xip_board"
-#endif
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-#if defined(XIP_BOOT_HEADER_ENABLE) && (XIP_BOOT_HEADER_ENABLE == 1)
-#if defined(__CC_ARM) || defined(__ARMCC_VERSION) || defined(__GNUC__)
-__attribute__((section(".boot_hdr.conf")))
-#elif defined(__ICCARM__)
-#pragma location = ".boot_hdr.conf"
-#endif
-
-const flexspi_nor_config_t qspiflash_config = {
-    .memConfig =
-        {
-            .tag              = FLEXSPI_CFG_BLK_TAG,
-            .version          = FLEXSPI_CFG_BLK_VERSION,
-            .readSampleClkSrc = kFlexSPIReadSampleClk_LoopbackFromDqsPad,
-            .csHoldTime       = 3u,
-            .csSetupTime      = 3u,
-            .sflashPadType    = kSerialFlash_4Pads,
-            .serialClkFreq    = kFlexSpiSerialClk_100MHz,
-            .sflashA1Size     = 16u * 1024u * 1024u,
-            .lookupTable =
-                {
-                    // Read LUTs
-                    FLEXSPI_LUT_SEQ(CMD_SDR, FLEXSPI_1PAD, 0xEB, RADDR_SDR, FLEXSPI_4PAD, 24),
-                    FLEXSPI_LUT_SEQ(DUMMY_SDR, FLEXSPI_4PAD, 0x06, READ_SDR, FLEXSPI_4PAD, 0x04),
-                },
-        },
-    .pageSize           = 256u,
-    .sectorSize         = 4u * 1024u,
-    .blockSize          = 64u * 1024u,
-    .isUniformBlockSize = false,
-};
-#endif /* XIP_BOOT_HEADER_ENABLE */
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.h b/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.h
deleted file mode 100644
index bb5a64448..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/evkmimxrt1010_flexspi_nor_config.h
+++ /dev/null
@@ -1,267 +0,0 @@
-/*
- * Copyright 2019 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-#ifndef __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
-#define __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__
-
-#include <stdint.h>
-#include <stdbool.h>
-#include "fsl_common.h"
-
-/*! @name Driver version */
-/*@{*/
-/*! @brief XIP_BOARD driver version 2.0.0. */
-#define FSL_XIP_BOARD_DRIVER_VERSION (MAKE_VERSION(2, 0, 0))
-/*@}*/
-
-/* FLEXSPI memory config block related definitions */
-#define FLEXSPI_CFG_BLK_TAG (0x42464346UL)     // ascii "FCFB" Big Endian
-#define FLEXSPI_CFG_BLK_VERSION (0x56010400UL) // V1.4.0
-#define FLEXSPI_CFG_BLK_SIZE (512)
-
-/* FLEXSPI Feature related definitions */
-#define FLEXSPI_FEATURE_HAS_PARALLEL_MODE 1
-
-/* Lookup table related definitions */
-#define CMD_INDEX_READ 0
-#define CMD_INDEX_READSTATUS 1
-#define CMD_INDEX_WRITEENABLE 2
-#define CMD_INDEX_WRITE 4
-
-#define CMD_LUT_SEQ_IDX_READ 0
-#define CMD_LUT_SEQ_IDX_READSTATUS 1
-#define CMD_LUT_SEQ_IDX_WRITEENABLE 3
-#define CMD_LUT_SEQ_IDX_WRITE 9
-
-#define CMD_SDR 0x01
-#define CMD_DDR 0x21
-#define RADDR_SDR 0x02
-#define RADDR_DDR 0x22
-#define CADDR_SDR 0x03
-#define CADDR_DDR 0x23
-#define MODE1_SDR 0x04
-#define MODE1_DDR 0x24
-#define MODE2_SDR 0x05
-#define MODE2_DDR 0x25
-#define MODE4_SDR 0x06
-#define MODE4_DDR 0x26
-#define MODE8_SDR 0x07
-#define MODE8_DDR 0x27
-#define WRITE_SDR 0x08
-#define WRITE_DDR 0x28
-#define READ_SDR 0x09
-#define READ_DDR 0x29
-#define LEARN_SDR 0x0A
-#define LEARN_DDR 0x2A
-#define DATSZ_SDR 0x0B
-#define DATSZ_DDR 0x2B
-#define DUMMY_SDR 0x0C
-#define DUMMY_DDR 0x2C
-#define DUMMY_RWDS_SDR 0x0D
-#define DUMMY_RWDS_DDR 0x2D
-#define JMP_ON_CS 0x1F
-#define STOP 0
-
-#define FLEXSPI_1PAD 0
-#define FLEXSPI_2PAD 1
-#define FLEXSPI_4PAD 2
-#define FLEXSPI_8PAD 3
-
-#define FLEXSPI_LUT_SEQ(cmd0, pad0, op0, cmd1, pad1, op1)                                                              \
-    (FLEXSPI_LUT_OPERAND0(op0) | FLEXSPI_LUT_NUM_PADS0(pad0) | FLEXSPI_LUT_OPCODE0(cmd0) | FLEXSPI_LUT_OPERAND1(op1) | \
-     FLEXSPI_LUT_NUM_PADS1(pad1) | FLEXSPI_LUT_OPCODE1(cmd1))
-
-//!@brief Definitions for FlexSPI Serial Clock Frequency
-typedef enum _FlexSpiSerialClockFreq
-{
-    kFlexSpiSerialClk_30MHz  = 1,
-    kFlexSpiSerialClk_50MHz  = 2,
-    kFlexSpiSerialClk_60MHz  = 3,
-    kFlexSpiSerialClk_75MHz  = 4,
-    kFlexSpiSerialClk_80MHz  = 5,
-    kFlexSpiSerialClk_100MHz = 6,
-    kFlexSpiSerialClk_120MHz = 7,
-    kFlexSpiSerialClk_133MHz = 8,
-} flexspi_serial_clk_freq_t;
-
-//!@brief FlexSPI clock configuration type
-enum
-{
-    kFlexSpiClk_SDR, //!< Clock configure for SDR mode
-    kFlexSpiClk_DDR, //!< Clock configurat for DDR mode
-};
-
-//!@brief FlexSPI Read Sample Clock Source definition
-typedef enum _FlashReadSampleClkSource
-{
-    kFlexSPIReadSampleClk_LoopbackInternally      = 0,
-    kFlexSPIReadSampleClk_LoopbackFromDqsPad      = 1,
-    kFlexSPIReadSampleClk_LoopbackFromSckPad      = 2,
-    kFlexSPIReadSampleClk_ExternalInputFromDqsPad = 3,
-} flexspi_read_sample_clk_t;
-
-//!@brief Misc feature bit definitions
-enum
-{
-    kFlexSpiMiscOffset_DiffClkEnable            = 0, //!< Bit for Differential clock enable
-    kFlexSpiMiscOffset_Ck2Enable                = 1, //!< Bit for CK2 enable
-    kFlexSpiMiscOffset_ParallelEnable           = 2, //!< Bit for Parallel mode enable
-    kFlexSpiMiscOffset_WordAddressableEnable    = 3, //!< Bit for Word Addressable enable
-    kFlexSpiMiscOffset_SafeConfigFreqEnable     = 4, //!< Bit for Safe Configuration Frequency enable
-    kFlexSpiMiscOffset_PadSettingOverrideEnable = 5, //!< Bit for Pad setting override enable
-    kFlexSpiMiscOffset_DdrModeEnable            = 6, //!< Bit for DDR clock confiuration indication.
-};
-
-//!@brief Flash Type Definition
-enum
-{
-    kFlexSpiDeviceType_SerialNOR    = 1,    //!< Flash devices are Serial NOR
-    kFlexSpiDeviceType_SerialNAND   = 2,    //!< Flash devices are Serial NAND
-    kFlexSpiDeviceType_SerialRAM    = 3,    //!< Flash devices are Serial RAM/HyperFLASH
-    kFlexSpiDeviceType_MCP_NOR_NAND = 0x12, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial NAND
-    kFlexSpiDeviceType_MCP_NOR_RAM  = 0x13, //!< Flash device is MCP device, A1 is Serial NOR, A2 is Serial RAMs
-};
-
-//!@brief Flash Pad Definitions
-enum
-{
-    kSerialFlash_1Pad  = 1,
-    kSerialFlash_2Pads = 2,
-    kSerialFlash_4Pads = 4,
-    kSerialFlash_8Pads = 8,
-};
-
-//!@brief FlexSPI LUT Sequence structure
-typedef struct _lut_sequence
-{
-    uint8_t seqNum; //!< Sequence Number, valid number: 1-16
-    uint8_t seqId;  //!< Sequence Index, valid number: 0-15
-    uint16_t reserved;
-} flexspi_lut_seq_t;
-
-//!@brief Flash Configuration Command Type
-enum
-{
-    kDeviceConfigCmdType_Generic,    //!< Generic command, for example: configure dummy cycles, drive strength, etc
-    kDeviceConfigCmdType_QuadEnable, //!< Quad Enable command
-    kDeviceConfigCmdType_Spi2Xpi,    //!< Switch from SPI to DPI/QPI/OPI mode
-    kDeviceConfigCmdType_Xpi2Spi,    //!< Switch from DPI/QPI/OPI to SPI mode
-    kDeviceConfigCmdType_Spi2NoCmd,  //!< Switch to 0-4-4/0-8-8 mode
-    kDeviceConfigCmdType_Reset,      //!< Reset device command
-};
-
-//!@brief FlexSPI Memory Configuration Block
-typedef struct _FlexSPIConfig
-{
-    uint32_t tag;               //!< [0x000-0x003] Tag, fixed value 0x42464346UL
-    uint32_t version;           //!< [0x004-0x007] Version,[31:24] -'V', [23:16] - Major, [15:8] - Minor, [7:0] - bugfix
-    uint32_t reserved0;         //!< [0x008-0x00b] Reserved for future use
-    uint8_t readSampleClkSrc;   //!< [0x00c-0x00c] Read Sample Clock Source, valid value: 0/1/3
-    uint8_t csHoldTime;         //!< [0x00d-0x00d] CS hold time, default value: 3
-    uint8_t csSetupTime;        //!< [0x00e-0x00e] CS setup time, default value: 3
-    uint8_t columnAddressWidth; //!< [0x00f-0x00f] Column Address with, for HyperBus protocol, it is fixed to 3, For
-    //! Serial NAND, need to refer to datasheet
-    uint8_t deviceModeCfgEnable; //!< [0x010-0x010] Device Mode Configure enable flag, 1 - Enable, 0 - Disable
-    uint8_t deviceModeType; //!< [0x011-0x011] Specify the configuration command type:Quad Enable, DPI/QPI/OPI switch,
-    //! Generic configuration, etc.
-    uint16_t waitTimeCfgCommands; //!< [0x012-0x013] Wait time for all configuration commands, unit: 100us, Used for
-    //! DPI/QPI/OPI switch or reset command
-    flexspi_lut_seq_t deviceModeSeq; //!< [0x014-0x017] Device mode sequence info, [7:0] - LUT sequence id, [15:8] - LUt
-    //! sequence number, [31:16] Reserved
-    uint32_t deviceModeArg;    //!< [0x018-0x01b] Argument/Parameter for device configuration
-    uint8_t configCmdEnable;   //!< [0x01c-0x01c] Configure command Enable Flag, 1 - Enable, 0 - Disable
-    uint8_t configModeType[3]; //!< [0x01d-0x01f] Configure Mode Type, similar as deviceModeTpe
-    flexspi_lut_seq_t
-        configCmdSeqs[3]; //!< [0x020-0x02b] Sequence info for Device Configuration command, similar as deviceModeSeq
-    uint32_t reserved1;   //!< [0x02c-0x02f] Reserved for future use
-    uint32_t configCmdArgs[3];     //!< [0x030-0x03b] Arguments/Parameters for device Configuration commands
-    uint32_t reserved2;            //!< [0x03c-0x03f] Reserved for future use
-    uint32_t controllerMiscOption; //!< [0x040-0x043] Controller Misc Options, see Misc feature bit definitions for more
-    //! details
-    uint8_t deviceType;    //!< [0x044-0x044] Device Type:  See Flash Type Definition for more details
-    uint8_t sflashPadType; //!< [0x045-0x045] Serial Flash Pad Type: 1 - Single, 2 - Dual, 4 - Quad, 8 - Octal
-    uint8_t serialClkFreq; //!< [0x046-0x046] Serial Flash Frequency, device specific definitions, See System Boot
-    //! Chapter for more details
-    uint8_t lutCustomSeqEnable; //!< [0x047-0x047] LUT customization Enable, it is required if the program/erase cannot
-    //! be done using 1 LUT sequence, currently, only applicable to HyperFLASH
-    uint32_t reserved3[2];           //!< [0x048-0x04f] Reserved for future use
-    uint32_t sflashA1Size;           //!< [0x050-0x053] Size of Flash connected to A1
-    uint32_t sflashA2Size;           //!< [0x054-0x057] Size of Flash connected to A2
-    uint32_t sflashB1Size;           //!< [0x058-0x05b] Size of Flash connected to B1
-    uint32_t sflashB2Size;           //!< [0x05c-0x05f] Size of Flash connected to B2
-    uint32_t csPadSettingOverride;   //!< [0x060-0x063] CS pad setting override value
-    uint32_t sclkPadSettingOverride; //!< [0x064-0x067] SCK pad setting override value
-    uint32_t dataPadSettingOverride; //!< [0x068-0x06b] data pad setting override value
-    uint32_t dqsPadSettingOverride;  //!< [0x06c-0x06f] DQS pad setting override value
-    uint32_t timeoutInMs;            //!< [0x070-0x073] Timeout threshold for read status command
-    uint32_t commandInterval;        //!< [0x074-0x077] CS deselect interval between two commands
-    uint16_t dataValidTime[2]; //!< [0x078-0x07b] CLK edge to data valid time for PORT A and PORT B, in terms of 0.1ns
-    uint16_t busyOffset;       //!< [0x07c-0x07d] Busy offset, valid value: 0-31
-    uint16_t busyBitPolarity;  //!< [0x07e-0x07f] Busy flag polarity, 0 - busy flag is 1 when flash device is busy, 1 -
-    //! busy flag is 0 when flash device is busy
-    uint32_t lookupTable[64];           //!< [0x080-0x17f] Lookup table holds Flash command sequences
-    flexspi_lut_seq_t lutCustomSeq[12]; //!< [0x180-0x1af] Customizable LUT Sequences
-    uint32_t reserved4[4];              //!< [0x1b0-0x1bf] Reserved for future use
-} flexspi_mem_config_t;
-
-/*  */
-#define NOR_CMD_INDEX_READ CMD_INDEX_READ               //!< 0
-#define NOR_CMD_INDEX_READSTATUS CMD_INDEX_READSTATUS   //!< 1
-#define NOR_CMD_INDEX_WRITEENABLE CMD_INDEX_WRITEENABLE //!< 2
-#define NOR_CMD_INDEX_ERASESECTOR 3                     //!< 3
-#define NOR_CMD_INDEX_PAGEPROGRAM CMD_INDEX_WRITE       //!< 4
-#define NOR_CMD_INDEX_CHIPERASE 5                       //!< 5
-#define NOR_CMD_INDEX_DUMMY 6                           //!< 6
-#define NOR_CMD_INDEX_ERASEBLOCK 7                      //!< 7
-
-#define NOR_CMD_LUT_SEQ_IDX_READ CMD_LUT_SEQ_IDX_READ //!< 0  READ LUT sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_READSTATUS \
-    CMD_LUT_SEQ_IDX_READSTATUS //!< 1  Read Status LUT sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_READSTATUS_XPI \
-    2 //!< 2  Read status DPI/QPI/OPI sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE \
-    CMD_LUT_SEQ_IDX_WRITEENABLE //!< 3  Write Enable sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_WRITEENABLE_XPI \
-    4 //!< 4  Write Enable DPI/QPI/OPI sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_ERASESECTOR 5 //!< 5  Erase Sector sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_ERASEBLOCK 8  //!< 8 Erase Block sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_PAGEPROGRAM \
-    CMD_LUT_SEQ_IDX_WRITE                //!< 9  Program sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_CHIPERASE 11 //!< 11 Chip Erase sequence in lookupTable id stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_READ_SFDP 13 //!< 13 Read SFDP sequence in lookupTable id stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_RESTORE_NOCMD \
-    14 //!< 14 Restore 0-4-4/0-8-8 mode sequence id in lookupTable stored in config block
-#define NOR_CMD_LUT_SEQ_IDX_EXIT_NOCMD \
-    15 //!< 15 Exit 0-4-4/0-8-8 mode sequence id in lookupTable stored in config blobk
-
-/*
- *  Serial NOR configuration block
- */
-typedef struct _flexspi_nor_config
-{
-    flexspi_mem_config_t memConfig; //!< Common memory configuration info via FlexSPI
-    uint32_t pageSize;              //!< Page size of Serial NOR
-    uint32_t sectorSize;            //!< Sector size of Serial NOR
-    uint8_t ipcmdSerialClkFreq;     //!< Clock frequency for IP command
-    uint8_t isUniformBlockSize;     //!< Sector/Block size is the same
-    uint8_t reserved0[2];           //!< Reserved for future use
-    uint8_t serialNorType;          //!< Serial NOR Flash type: 0/1/2/3
-    uint8_t needExitNoCmdMode;      //!< Need to exit NoCmd mode before other IP command
-    uint8_t halfClkForNonReadCmd;   //!< Half the Serial Clock for non-read command: true/false
-    uint8_t needRestoreNoCmdMode;   //!< Need to Restore NoCmd mode after IP command execution
-    uint32_t blockSize;             //!< Block size
-    uint32_t reserve2[11];          //!< Reserved for future use
-} flexspi_nor_config_t;
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#ifdef __cplusplus
-}
-#endif
-#endif /* __EVKMIMXRT1011_FLEXSPI_NOR_CONFIG__ */
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.ld b/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.ld
deleted file mode 100644
index 960fc6891..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.ld
+++ /dev/null
@@ -1,270 +0,0 @@
-/*
-** ###################################################################
-**     Processors:          MIMXRT1011CAE4A
-**                          MIMXRT1011DAE5A
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    IMXRT1010RM Rev.0, 09/2019
-**     Version:             rev. 1.0, 2019-08-01
-**     Build:               b210709
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2021 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
-VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x00000400 : 0;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_flash_config        (RX)  : ORIGIN = 0x60000400, LENGTH = 0x00000C00
-  m_ivt                 (RX)  : ORIGIN = 0x60001000, LENGTH = 0x00001000
-
-  m_interrupts          (RX)  : ORIGIN = 0x6000C000, LENGTH = 0x00000400
-  m_text                (RX)  : ORIGIN = 0x6000C400, LENGTH = (8*1024*1024 - 0xC400)
-  m_qacode              (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00008000
-  m_data                (RW)  : ORIGIN = 0x20000000, LENGTH = 0x00008000
-  m_data2               (RW)  : ORIGIN = 0x20200000, LENGTH = 0x00010000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  __NCACHE_REGION_START = ORIGIN(m_data2);
-  __NCACHE_REGION_SIZE  = 0;
-
-  .flash_config :
-  {
-    . = ALIGN(4);
-    __FLASH_BASE = .;
-    KEEP(* (.boot_hdr.conf))     /* flash config section */
-    . = ALIGN(4);
-  } > m_flash_config
-
-  ivt_begin = ORIGIN(m_flash_config) + LENGTH(m_flash_config);
-
-  .ivt : AT(ivt_begin)
-  {
-    . = ALIGN(4);
-    KEEP(* (.boot_hdr.ivt))           /* ivt section */
-    KEEP(* (.boot_hdr.boot_data))     /* boot section */
-    KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
-    . = ALIGN(4);
-  } > m_ivt
-
-  /* The startup code goes first into internal RAM */
-  .interrupts :
-  {
-    __VECTOR_TABLE = .;
-    __Vectors = .;
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  /* The program code and other data goes into internal RAM */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  .interrupts_ram :
-  {
-    . = ALIGN(4);
-    __VECTOR_RAM__ = .;
-    __interrupts_ram_start__ = .; /* Create a global symbol at data start */
-    *(.m_interrupts_ram)     /* This is a user defined section */
-    . += VECTOR_RAM_SIZE;
-    . = ALIGN(4);
-    __interrupts_ram_end__ = .; /* Define a global symbol at data end */
-  } > m_data
-
-  __VECTOR_RAM = DEFINED(__ram_vector_table__) ? __VECTOR_RAM__ : ORIGIN(m_interrupts);
-  __RAM_VECTOR_TABLE_SIZE_BYTES = DEFINED(__ram_vector_table__) ? (__interrupts_ram_end__ - __interrupts_ram_start__) : 0x0;
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(m_usb_dma_init_data)
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    *(DataQuickAccess)       /* quick access data section */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __ram_function_flash_start = __DATA_ROM + (__data_end__ - __data_start__); /* Symbol is used by startup for TCM data initialization */
-
-  .ram_function : AT(__ram_function_flash_start)
-  {
-    . = ALIGN(32);
-    __ram_function_start__ = .;
-    *(CodeQuickAccess)
-    . = ALIGN(128);
-    __ram_function_end__ = .;
-  } > m_qacode
-
-  __NDATA_ROM = __ram_function_flash_start + (__ram_function_end__ - __ram_function_start__);
-  .ncache.init : AT(__NDATA_ROM)
-  {
-    __noncachedata_start__ = .;   /* create a global symbol at ncache data start */
-    *(NonCacheable.init)
-    . = ALIGN(4);
-    __noncachedata_init_end__ = .;   /* create a global symbol at initialized ncache data end */
-  } > m_data
-  . = __noncachedata_init_end__;
-  .ncache :
-  {
-    *(NonCacheable)
-    . = ALIGN(4);
-    __noncachedata_end__ = .;     /* define a global symbol at ncache data end */
-  } > m_data
-
-  __DATA_END = __NDATA_ROM + (__noncachedata_init_end__ - __noncachedata_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(m_usb_dma_noninit_data)
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    . += STACK_SIZE;
-  } > m_data
-
-  /* Initializes stack on the end of block */
-  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.mex b/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.mex
deleted file mode 100644
index 7aab59a68..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/metro_m7_1011_sd.mex
+++ /dev/null
@@ -1,431 +0,0 @@
-<?xml version="1.0" encoding= "UTF-8" ?>
-<configuration name="MIMXRT1010-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="f341eb24-9521-4127-8932-81692aeb76df" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
-   <common>
-      <processor>MIMXRT1011xxxxx</processor>
-      <package>MIMXRT1011DAE5A</package>
-      <board>MIMXRT1010-EVK</board>
-      <board_revision>A</board_revision>
-      <mcu_data>ksdk2_0</mcu_data>
-      <cores selected="core0">
-         <core name="Cortex-M7F" id="core0" description="M7 core"/>
-      </cores>
-      <description></description>
-   </common>
-   <preferences>
-      <validate_boot_init_only>true</validate_boot_init_only>
-      <generate_extended_information>false</generate_extended_information>
-      <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
-      <update_include_paths>true</update_include_paths>
-      <generate_registers_defines>false</generate_registers_defines>
-   </preferences>
-   <tools>
-      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
-         <generated_project_files>
-            <file path="board/pin_mux.c" update_enabled="true"/>
-            <file path="board/pin_mux.h" update_enabled="true"/>
-         </generated_project_files>
-         <pins_profile>
-            <processor_version>13.0.2</processor_version>
-            <pin_labels>
-               <pin_label pin_num="1" pin_signal="GPIO_11" label="GPIO_11" identifier="GPIO_11"/>
-               <pin_label pin_num="70" pin_signal="GPIO_SD_05" label=""/>
-               <pin_label pin_num="10" pin_signal="GPIO_03" label="SAI1_RXD0/U10[16]" identifier="LED;USER_LED"/>
-               <pin_label pin_num="4" pin_signal="GPIO_08" label="SAI1_MCLK/U10[11]" identifier="USER_BUTTON"/>
-               <pin_label pin_num="79" pin_signal="GPIO_13" label="USB_OTG1_ID/J9[4]/Q9[2]" identifier="TRACE1"/>
-            </pin_labels>
-            <external_user_signals>
-               <properties/>
-            </external_user_signals>
-            <power_domains>
-               <power_domain name="NVCC_GPIO" value="3.3"/>
-            </power_domains>
-         </pins_profile>
-         <functions_list>
-            <function name="BOARD_InitPins">
-               <description>Configures pin routing and optionally pin electrical features.</description>
-               <options>
-                  <callFromInitBoot>true</callFromInitBoot>
-                  <coreID>core0</coreID>
-                  <enableClock>true</enableClock>
-               </options>
-               <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
-                     <feature name="initialized" evaluation="equal">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="Peripheral" resourceId="ARM" description="Peripheral ARM is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
-                     <feature name="initialized" evaluation="equal">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="Peripheral" resourceId="GPIO1" description="Peripheral GPIO1 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
-                     <feature name="initialized" evaluation="equal">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Pins initialization requires the COMMON Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
-                     <feature name="enabled" evaluation="equal" configuration="core0">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Pins initialization requires the IOMUXC Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
-                     <feature name="enabled" evaluation="equal" configuration="core0">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="SWComponent" resourceId="platform.drivers.igpio" description="Pins initialization requires the IGPIO Driver in the project." problem_level="2" source="Pins:BOARD_InitPins">
-                     <feature name="enabled" evaluation="equal" configuration="core0">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-               </dependencies>
-               <pins>
-                  <pin peripheral="LPUART1" signal="RXD" pin_num="3" pin_signal="GPIO_09"/>
-                  <pin peripheral="LPUART1" signal="TXD" pin_num="2" pin_signal="GPIO_10"/>
-                  <pin peripheral="GPIO1" signal="gpiomux_io, 03" pin_num="10" pin_signal="GPIO_03">
-                     <pin_features>
-                        <pin_feature name="identifier" value="USER_LED"/>
-                        <pin_feature name="direction" value="OUTPUT"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="ARM" signal="TRACE, 1" pin_num="79" pin_signal="GPIO_13">
-                     <pin_features>
-                        <pin_feature name="speed" value="MHZ_200"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="ARM" signal="TRACE, 2" pin_num="80" pin_signal="GPIO_12">
-                     <pin_features>
-                        <pin_feature name="speed" value="MHZ_200"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="ARM" signal="arm_trace_clk" pin_num="58" pin_signal="GPIO_AD_02">
-                     <pin_features>
-                        <pin_feature name="speed" value="MHZ_200"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="ARM" signal="TRACE, 3" pin_num="1" pin_signal="GPIO_11">
-                     <pin_features>
-                        <pin_feature name="speed" value="MHZ_200"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="ARM" signal="TRACE, 0" pin_num="60" pin_signal="GPIO_AD_00">
-                     <pin_features>
-                        <pin_feature name="speed" value="MHZ_200"/>
-                     </pin_features>
-                  </pin>
-                  <pin peripheral="GPIO1" signal="gpiomux_io, 08" pin_num="4" pin_signal="GPIO_08">
-                     <pin_features>
-                        <pin_feature name="direction" value="INPUT"/>
-                        <pin_feature name="pull_keeper_select" value="Pull"/>
-                        <pin_feature name="pull_up_down_config" value="Pull_Up_100K_Ohm"/>
-                     </pin_features>
-                  </pin>
-               </pins>
-            </function>
-         </functions_list>
-      </pins>
-      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
-         <generated_project_files>
-            <file path="board/clock_config.c" update_enabled="true"/>
-            <file path="board/clock_config.h" update_enabled="true"/>
-         </generated_project_files>
-         <clocks_profile>
-            <processor_version>13.0.2</processor_version>
-         </clocks_profile>
-         <clock_configurations>
-            <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
-               <description></description>
-               <options/>
-               <dependencies>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="routed" evaluation="">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtali" description="&apos;RTC_XTALI&apos; (Pins tool id: XTALOSC24M.rtc_xtali, Clocks tool id: XTALOSC24M.RTC_XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="direction" evaluation="">
-                        <data>INPUT</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="routed" evaluation="">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.rtc_xtalo" description="&apos;RTC_XTALO&apos; (Pins tool id: XTALOSC24M.rtc_xtalo, Clocks tool id: XTALOSC24M.RTC_XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="direction" evaluation="">
-                        <data>OUTPUT</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="routed" evaluation="">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtali" description="&apos;XTALI&apos; (Pins tool id: XTALOSC24M.xtali, Clocks tool id: XTALOSC24M.XTALI) needs to have &apos;INPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="direction" evaluation="">
-                        <data>INPUT</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to be routed" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="routed" evaluation="">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="PinSignal" resourceId="XTALOSC24M.xtalo" description="&apos;XTALO&apos; (Pins tool id: XTALOSC24M.xtalo, Clocks tool id: XTALOSC24M.XTALO) needs to have &apos;OUTPUT&apos; direction" problem_level="1" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="direction" evaluation="">
-                        <data>OUTPUT</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="SWComponent" resourceId="platform.drivers.common" description="Clocks initialization requires the COMMON Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="enabled" evaluation="equal" configuration="core0">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-                  <dependency resourceType="SWComponent" resourceId="platform.drivers.iomuxc" description="Clocks initialization requires the IOMUXC Driver in the project." problem_level="2" source="Clocks:BOARD_BootClockRUN">
-                     <feature name="enabled" evaluation="equal" configuration="core0">
-                        <data>true</data>
-                     </feature>
-                  </dependency>
-               </dependencies>
-               <clock_sources>
-                  <clock_source id="XTALOSC24M.RTC_OSC.outFreq" value="32.768 kHz" locked="false" enabled="true"/>
-               </clock_sources>
-               <clock_outputs>
-                  <clock_output id="ADC_ALT_CLK.outFreq" value="40 MHz" locked="false" accuracy=""/>
-                  <clock_output id="CKIL_SYNC_CLK_ROOT.outFreq" value="32.768 kHz" locked="false" accuracy=""/>
-                  <clock_output id="CLK_1M.outFreq" value="1 MHz" locked="false" accuracy=""/>
-                  <clock_output id="CLK_24M.outFreq" value="24 MHz" locked="false" accuracy=""/>
-                  <clock_output id="CORE_CLK_ROOT.outFreq" value="500 MHz" locked="false" accuracy=""/>
-                  <clock_output id="ENET_500M_REF_CLK.outFreq" value="500 MHz" locked="false" accuracy=""/>
-                  <clock_output id="FLEXIO1_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
-                  <clock_output id="FLEXSPI_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
-                  <clock_output id="GPT1_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
-                  <clock_output id="GPT2_ipg_clk_highfreq.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
-                  <clock_output id="IPG_CLK_ROOT.outFreq" value="125 MHz" locked="false" accuracy=""/>
-                  <clock_output id="LPI2C_CLK_ROOT.outFreq" value="60 MHz" locked="false" accuracy=""/>
-                  <clock_output id="LPSPI_CLK_ROOT.outFreq" value="105.6 MHz" locked="false" accuracy=""/>
-                  <clock_output id="MQS_MCLK.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="PERCLK_CLK_ROOT.outFreq" value="62.5 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI1_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI1_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI1_MCLK2.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI1_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI3_CLK_ROOT.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI3_MCLK1.outFreq" value="1080/17 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SAI3_MCLK3.outFreq" value="30 MHz" locked="false" accuracy=""/>
-                  <clock_output id="SPDIF0_CLK_ROOT.outFreq" value="30 MHz" locked="false" accuracy=""/>
-                  <clock_output id="TRACE_CLK_ROOT.outFreq" value="132 MHz" locked="false" accuracy=""/>
-                  <clock_output id="UART_CLK_ROOT.outFreq" value="80 MHz" locked="false" accuracy=""/>
-                  <clock_output id="USBPHY_CLK.outFreq" value="480 MHz" locked="false" accuracy=""/>
-               </clock_outputs>
-               <clock_settings>
-                  <setting id="CCM.ADC_ACLK_PODF.scale" value="12" locked="true"/>
-                  <setting id="CCM.AHB_PODF.scale" value="1" locked="true"/>
-                  <setting id="CCM.FLEXSPI_PODF.scale" value="4" locked="true"/>
-                  <setting id="CCM.IPG_PODF.scale" value="4" locked="false"/>
-                  <setting id="CCM.LPSPI_PODF.scale" value="5" locked="false"/>
-                  <setting id="CCM.PERCLK_PODF.scale" value="2" locked="true"/>
-                  <setting id="CCM.PRE_PERIPH_CLK_SEL.sel" value="CCM_ANALOG.ENET_500M_REF_CLK" locked="false"/>
-                  <setting id="CCM.SAI1_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
-                  <setting id="CCM.SAI3_CLK_SEL.sel" value="CCM_ANALOG.PLL3_PFD2_CLK" locked="false"/>
-                  <setting id="CCM.TRACE_CLK_SEL.sel" value="CCM_ANALOG.PLL2_MAIN_CLK" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2.denom" value="1" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2.num" value="0" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_BYPASS.sel" value="CCM_ANALOG.PLL2_OUT_CLK" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD0" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD1" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD2" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD2_DIV.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD2_MUL.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL2_PFD3" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD3_DIV.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL2_PFD3_MUL.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL3_BYPASS.sel" value="CCM_ANALOG.PLL3" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD0_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD0" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD0_DIV.scale" value="22" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD0_MUL.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD1_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD1" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD2_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD2" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD3_BYPASS.sel" value="CCM_ANALOG.PLL3_PFD3" locked="false"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD3_DIV.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL3_PFD3_MUL.scale" value="18" locked="true"/>
-                  <setting id="CCM_ANALOG.PLL6_BYPASS.sel" value="CCM_ANALOG.PLL6" locked="false"/>
-                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_CFG" value="Enabled" locked="false"/>
-                  <setting id="CCM_ANALOG_PLL_USB1_EN_USB_CLKS_OUT_CFG" value="Enabled" locked="false"/>
-                  <setting id="CCM_ANALOG_PLL_USB1_POWER_CFG" value="Yes" locked="false"/>
-               </clock_settings>
-               <called_from_default_init>true</called_from_default_init>
-            </clock_configuration>
-         </clock_configurations>
-      </clocks>
-      <dcdx name="DCDx" version="2.0" enabled="false" update_project_code="true">
-         <generated_project_files/>
-         <dcdx_profile>
-            <processor_version>0.0.0</processor_version>
-         </dcdx_profile>
-         <dcdx_configurations/>
-      </dcdx>
-      <periphs name="Peripherals" version="12.0" enabled="false" update_project_code="true">
-         <generated_project_files/>
-         <peripherals_profile>
-            <processor_version>13.0.2</processor_version>
-         </peripherals_profile>
-         <functional_groups>
-            <functional_group name="BOARD_InitPeripherals" uuid="5e519eed-bd94-4950-84de-0f29de85bcea" called_from_default_init="true" id_prefix="" core="core0">
-               <description></description>
-               <options/>
-               <dependencies/>
-               <instances>
-                  <instance name="COMBO_SENSOR" uuid="2342e373-ea2e-4bed-8aa4-bd33509155f6" type="lpi2c" type_id="lpi2c_6b71962515c3208facfccd030afebc98" mode="master" peripheral="LPI2C1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
-                     <config_set name="main" quick_selection="qs_interrupt">
-                        <setting name="clockSource" value="Lpi2cClock"/>
-                        <setting name="clockSourceFreq" value="BOARD_BootClockRUN"/>
-                     </config_set>
-                     <config_set name="interrupt_vector"/>
-                     <config_set name="master" quick_selection="qs_master_transfer">
-                        <setting name="mode" value="transfer"/>
-                        <struct name="config">
-                           <setting name="enableMaster" value="true"/>
-                           <setting name="enableDoze" value="true"/>
-                           <setting name="debugEnable" value="false"/>
-                           <setting name="ignoreAck" value="false"/>
-                           <setting name="pinConfig" value="kLPI2C_2PinOpenDrain"/>
-                           <setting name="baudRate_Hz" value="100000"/>
-                           <setting name="busIdleTimeout_ns" value="0"/>
-                           <setting name="pinLowTimeout_ns" value="0"/>
-                           <setting name="sdaGlitchFilterWidth_ns" value="0"/>
-                           <setting name="sclGlitchFilterWidth_ns" value="0"/>
-                           <struct name="hostRequest">
-                              <setting name="enable" value="false"/>
-                              <setting name="source" value="kLPI2C_HostRequestExternalPin"/>
-                              <setting name="polarity" value="kLPI2C_HostRequestPinActiveHigh"/>
-                           </struct>
-                           <set name="edmaRequestSources">
-                              <selected/>
-                           </set>
-                        </struct>
-                        <struct name="transfer">
-                           <setting name="blocking" value="false"/>
-                           <setting name="enable_custom_handle" value="false"/>
-                           <struct name="callback">
-                              <setting name="name" value=""/>
-                              <setting name="userData" value=""/>
-                           </struct>
-                           <set name="flags">
-                              <selected/>
-                           </set>
-                           <setting name="slaveAddress" value="0"/>
-                           <setting name="direction" value="kLPI2C_Write"/>
-                           <setting name="subaddress" value="0"/>
-                           <setting name="subaddressSize" value="1"/>
-                           <setting name="blocking_buffer" value="false"/>
-                           <setting name="enable_custom_buffer" value="false"/>
-                           <setting name="dataSize" value="1"/>
-                        </struct>
-                     </config_set>
-                  </instance>
-                  <instance name="DEBUG_UART" uuid="0d9274fe-8f49-48a8-8e6a-8c3ac009384d" type="lpuart" type_id="lpuart_bf01db7d964092f3cf860852cba17f7e" mode="polling" peripheral="LPUART1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
-                     <config_set name="lpuartConfig_t" quick_selection="QuickSelection1">
-                        <struct name="lpuartConfig">
-                           <setting name="clockSource" value="LpuartClock"/>
-                           <setting name="lpuartSrcClkFreq" value="ClocksTool_DefaultInit"/>
-                           <setting name="baudRate_Bps" value="115200"/>
-                           <setting name="parityMode" value="kLPUART_ParityDisabled"/>
-                           <setting name="dataBitsCount" value="kLPUART_EightDataBits"/>
-                           <setting name="isMsb" value="false"/>
-                           <setting name="stopBitCount" value="kLPUART_OneStopBit"/>
-                           <setting name="enableMatchAddress1" value="false"/>
-                           <setting name="matchAddress1" value="0"/>
-                           <setting name="enableMatchAddress2" value="false"/>
-                           <setting name="matchAddress2" value="0"/>
-                           <setting name="txFifoWatermark" value="0"/>
-                           <setting name="rxFifoWatermark" value="1"/>
-                           <setting name="enableRxRTS" value="false"/>
-                           <setting name="enableTxCTS" value="false"/>
-                           <setting name="txCtsSource" value="kLPUART_CtsSourcePin"/>
-                           <setting name="txCtsConfig" value="kLPUART_CtsSampleAtStart"/>
-                           <setting name="rxIdleType" value="kLPUART_IdleTypeStartBit"/>
-                           <setting name="rxIdleConfig" value="kLPUART_IdleCharacter1"/>
-                           <setting name="enableTx" value="true"/>
-                           <setting name="enableRx" value="true"/>
-                        </struct>
-                     </config_set>
-                  </instance>
-                  <instance name="USER_BUTTON" uuid="6c9e57cc-d98c-4f6d-bf94-3920a8fd474e" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO2" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
-                     <config_set name="fsl_gpio">
-                        <setting name="enable_irq_comb_0_15" value="false"/>
-                        <struct name="gpio_interrupt_comb_0_15">
-                           <setting name="IRQn" value="GPIO2_Combined_0_15_IRQn"/>
-                           <setting name="enable_interrrupt" value="enabled"/>
-                           <setting name="enable_priority" value="false"/>
-                           <setting name="priority" value="0"/>
-                           <setting name="enable_custom_name" value="false"/>
-                        </struct>
-                     </config_set>
-                  </instance>
-                  <instance name="USER_LED" uuid="0f7a142d-ad6c-4e47-a2a3-015e90afa37b" type="igpio" type_id="igpio_b1c1fa279aa7069dca167502b8589cb7" mode="GPIO" peripheral="GPIO1" enabled="false" comment="" custom_name_enabled="true" editing_lock="false">
-                     <config_set name="fsl_gpio">
-                        <setting name="enable_irq_comb_0_15" value="false"/>
-                        <struct name="gpio_interrupt_comb_0_15">
-                           <setting name="IRQn" value="GPIO1_Combined_0_15_IRQn"/>
-                           <setting name="enable_interrrupt" value="enabled"/>
-                           <setting name="enable_priority" value="false"/>
-                           <setting name="priority" value="0"/>
-                           <setting name="enable_custom_name" value="false"/>
-                        </struct>
-                        <setting name="enable_irq_comb_16_31" value="false"/>
-                        <struct name="gpio_interrupt_comb_16_31">
-                           <setting name="IRQn" value="GPIO1_Combined_16_31_IRQn"/>
-                           <setting name="enable_interrrupt" value="enabled"/>
-                           <setting name="enable_priority" value="false"/>
-                           <setting name="priority" value="0"/>
-                           <setting name="enable_custom_name" value="false"/>
-                        </struct>
-                     </config_set>
-                  </instance>
-                  <instance name="NVIC" uuid="2a54e709-5718-4b89-8b7b-71cefb418658" type="nvic" type_id="nvic_57b5eef3774cc60acaede6f5b8bddc67" mode="general" peripheral="NVIC" enabled="true" comment="" custom_name_enabled="false" editing_lock="false">
-                     <config_set name="nvic">
-                        <array name="interrupt_table"/>
-                        <array name="interrupts"/>
-                     </config_set>
-                  </instance>
-               </instances>
-            </functional_group>
-         </functional_groups>
-         <components>
-            <component name="system" uuid="991327ca-3ad0-49d1-aff3-37b7734338db" type_id="system">
-               <config_set_global name="global_system_definitions">
-                  <setting name="user_definitions" value=""/>
-                  <setting name="user_includes" value=""/>
-               </config_set_global>
-            </component>
-            <component name="msg" uuid="3e46e698-099c-4180-92f5-2af1abbb93a5" type_id="msg">
-               <config_set_global name="global_messages"/>
-            </component>
-            <component name="gpio_adapter_common" uuid="27e43a4b-bddb-4db2-8f6b-3f6a73008a27" type_id="gpio_adapter_common_57579b9ac814fe26bf95df0a384c36b6">
-               <config_set_global name="global_gpio_adapter_common" quick_selection="default"/>
-            </component>
-            <component name="generic_uart" uuid="c946fe99-5d76-4cca-8be0-dea3c7861b68" type_id="generic_uart_8cae00565451cf2346eb1b8c624e73a6">
-               <config_set_global name="global_uart"/>
-            </component>
-            <component name="generic_can" uuid="c18a4299-93be-44e8-b563-3985b3e264c5" type_id="generic_can_1bfdd78b1af214566c1f23cf6a582d80">
-               <config_set_global name="global_can"/>
-            </component>
-            <component name="uart_cmsis_common" uuid="6149366a-a07f-40a7-8909-00ba459085a7" type_id="uart_cmsis_common_9cb8e302497aa696fdbb5a4fd622c2a8">
-               <config_set_global name="global_USART_CMSIS_common" quick_selection="default"/>
-            </component>
-            <component name="generic_enet" uuid="15cc4d18-2002-44a4-b7e7-f681a046f26c" type_id="generic_enet_74db5c914f0ddbe47d86af40cb77a619">
-               <config_set_global name="global_enet"/>
-            </component>
-         </components>
-      </periphs>
-      <tee name="TEE" version="4.0" enabled="false" update_project_code="true">
-         <generated_project_files/>
-         <tee_profile>
-            <processor_version>0.0.0</processor_version>
-         </tee_profile>
-      </tee>
-   </tools>
-</configuration>
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011_sd/ozone/metro_m7_1011_sd.jdebug b/hw/bsp/imxrt/boards/metro_m7_1011_sd/ozone/metro_m7_1011_sd.jdebug
deleted file mode 100644
index 90f9b77e5..000000000
--- a/hw/bsp/imxrt/boards/metro_m7_1011_sd/ozone/metro_m7_1011_sd.jdebug
+++ /dev/null
@@ -1,215 +0,0 @@
-
-/*********************************************************************
-*
-*       OnProjectLoad
-*
-* Function description
-*   Project load routine. Required.
-*
-**********************************************************************
-*/
-void OnProjectLoad (void) {
-  Project.SetTraceSource ("Trace Pins");
-  Project.SetTraceTiming (50, 50, 50, 50);
-  Project.SetDevice ("MIMXRT1011xxx4A");
-  Project.SetHostIF ("USB", "");
-  Project.SetTargetIF ("SWD");
-  Project.SetTIFSpeed ("20 MHz");
-  Project.AddSvdFile ("$(InstallDir)/Config/CPU/Cortex-M7F.svd");
-  Project.AddSvdFile ("$(InstallDir)/Config/Peripherals/ARMv7M.svd");
-  Project.AddSvdFile ("./MIMXRT1011.svd");
-
-
-  // timing delay for trace pins in pico seconds, default is 2 nano seconds
-
-	File.Open ("../../../../../../examples/cmake-build-metro-m7-1011-sd/device/cdc_msc/cdc_msc.elf");
-}
-
-/*********************************************************************
-*
-*      TargetReset
-*
-* Function description
-*   Replaces the default target device reset routine. Optional.
-*
-* Notes
-*   This example demonstrates the usage when
-*   debugging a RAM program on a Cortex-M target device
-*
-**********************************************************************
-*/
-//void TargetReset (void) {
-//
-//  unsigned int SP;
-//  unsigned int PC;
-//  unsigned int VectorTableAddr;
-//
-//  Exec.Reset();
-//
-//  VectorTableAddr = Elf.GetBaseAddr();
-//
-//  if (VectorTableAddr != 0xFFFFFFFF) {
-//
-//    Util.Log("Resetting Program.");
-//
-//    SP = Target.ReadU32(VectorTableAddr);
-//    Target.SetReg("SP", SP);
-//
-//    PC = Target.ReadU32(VectorTableAddr + 4);
-//    Target.SetReg("PC", PC);
-//  }
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetReset
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetReset (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetReset
-*
-* Function description
-*   Event handler routine.
-*    - Sets the PC register to program reset value.
-*    - Sets the SP register to program reset value on Cortex-M.
-*
-**********************************************************************
-*/
-void AfterTargetReset (void) {
-}
-
-/*********************************************************************
-*
-*       DebugStart
-*
-* Function description
-*   Replaces the default debug session startup routine. Optional.
-*
-**********************************************************************
-*/
-//void DebugStart (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetConnect
-*
-* Function description
-*   Replaces the default target IF connection routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-
-void BeforeTargetConnect (void) {
-  //
-  // Trace pin init is done by J-Link script file as J-Link script files are IDE independent
-  //
-  //Project.SetJLinkScript("./ST_STM32H743_Traceconfig.pex");
-}
-
-/*********************************************************************
-*
-*       AfterTargetConnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetConnect (void) {
-//}
-
-/*********************************************************************
-*
-*       TargetDownload
-*
-* Function description
-*   Replaces the default program download routine. Optional.
-*
-**********************************************************************
-*/
-//void TargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*       BeforeTargetDownload
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDownload (void) {
-//}
-
-/*********************************************************************
-*
-*      AfterTargetDownload
-*
-* Function description
-*   Event handler routine.
-*    - Sets the PC register to program reset value.
-*    - Sets the SP register to program reset value on Cortex-M.
-*
-**********************************************************************
-*/
-void AfterTargetDownload (void) {
-
-}
-
-/*********************************************************************
-*
-*       BeforeTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void BeforeTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetDisconnect
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetDisconnect (void) {
-//}
-
-/*********************************************************************
-*
-*       AfterTargetHalt
-*
-* Function description
-*   Event handler routine. Optional.
-*
-**********************************************************************
-*/
-//void AfterTargetHalt (void) {
-//}
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index 99681ab12..63b2a120a 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1010)
 set(MCU_VARIANT MIMXRT1011)
 
 set(JLINK_DEVICE MIMXRT1011xxx5A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
index 488a56fdc..c5521faf5 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
+MCU_FAMILY = RT1010
 MCU_VARIANT = MIMXRT1011
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
index becad46d4..5661bb3e6 100644
--- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1015)
 set(MCU_VARIANT MIMXRT1015)
 
 set(JLINK_DEVICE MIMXRT1015DAF5A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
index 20c697ea1..062929902 100644
--- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1015DAF5A -DCFG_EXAMPLE_VIDEO_READONLY
+MCU_FAMILY = RT1015
 MCU_VARIANT = MIMXRT1015
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
index 39c94147c..6b95dfb65 100644
--- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1020)
 set(MCU_VARIANT MIMXRT1021)
 
 set(JLINK_DEVICE MIMXRT1021xxx5A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
index e269c8ac5..b3976b356 100644
--- a/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1020_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1021DAG5A
+MCU_FAMILY = RT1020
 MCU_VARIANT = MIMXRT1021
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
index 45487d148..10669b32d 100644
--- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1020)
 set(MCU_VARIANT MIMXRT1024)
 
 set(JLINK_DEVICE MIMXRT1024xxx5A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
index 3c325cc93..83448c399 100644
--- a/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1024_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1024DAG5A
+MCU_FAMILY = RT1020
 MCU_VARIANT = MIMXRT1024
 
 # warnings caused by mcu driver
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
index 1aee75b0d..70050dd16 100644
--- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1050)
 set(MCU_VARIANT MIMXRT1052)
 
 set(JLINK_DEVICE MIMXRT1052xxxxB)
diff --git a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
index 60aa1e28f..9331eba94 100644
--- a/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1050_evkb/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1052DVL6B
+MCU_FAMILY = RT1050
 MCU_VARIANT = MIMXRT1052
 
 JLINK_DEVICE = MIMXRT1052xxxxB
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
index f70a5f923..865695894 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1060)
 set(MCU_VARIANT MIMXRT1062)
 
 set(JLINK_DEVICE MIMXRT1062xxx6A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
index 0317ee452..79d15880b 100644
--- a/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1060_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1062DVL6A
+MCU_FAMILY = RT1060
 MCU_VARIANT = MIMXRT1062
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
index cd75c5227..b23fee3c4 100644
--- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1064)
 set(MCU_VARIANT MIMXRT1064)
 
 set(JLINK_DEVICE MIMXRT1064xxx6A)
diff --git a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
index ddde419ae..3a65a3d89 100644
--- a/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1064_evk/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1064DVL6A
+MCU_FAMILY = RT1064
 MCU_VARIANT = MIMXRT1064
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake b/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake
index d5629f8ba..dc3b8ed44 100644
--- a/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.cmake
@@ -1,9 +1,10 @@
+set(MCU_FAMILY RT1170)
 set(MCU_VARIANT MIMXRT1176)
 
 if (M4 STREQUAL "1")
   set(MCU_CORE _cm4)
   set(JLINK_CORE _M4)
-  set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
+  set(LD_FILE_GNU ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_ram.ld)
   set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
 else ()
   set(MCU_CORE _cm7)
diff --git a/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk b/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk
index 8270ae587..3f07e28fc 100644
--- a/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1170_evkb/board.mk
@@ -1,3 +1,4 @@
+MCU_FAMILY = RT1170
 MCU_VARIANT = MIMXRT1176
 
 ifeq ($(M4), 1)
diff --git a/hw/bsp/imxrt/boards/teensy_40/board.cmake b/hw/bsp/imxrt/boards/teensy_40/board.cmake
index 41fdc78f5..55dd29897 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board.cmake
+++ b/hw/bsp/imxrt/boards/teensy_40/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1060)
 set(MCU_VARIANT MIMXRT1062)
 
 set(JLINK_DEVICE MIMXRT1062xxx6A)
diff --git a/hw/bsp/imxrt/boards/teensy_40/board.mk b/hw/bsp/imxrt/boards/teensy_40/board.mk
index 45ca0fb6e..e7f75fcae 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board.mk
+++ b/hw/bsp/imxrt/boards/teensy_40/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1062DVL6A
+MCU_FAMILY = RT1060
 MCU_VARIANT = MIMXRT1062
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/boards/teensy_41/board.cmake b/hw/bsp/imxrt/boards/teensy_41/board.cmake
index 0fd8d528e..e8398fdbe 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board.cmake
+++ b/hw/bsp/imxrt/boards/teensy_41/board.cmake
@@ -1,3 +1,4 @@
+set(MCU_FAMILY RT1060)
 set(MCU_VARIANT MIMXRT1062)
 
 set(JLINK_DEVICE MIMXRT1062xxx6A)
diff --git a/hw/bsp/imxrt/boards/teensy_41/board.mk b/hw/bsp/imxrt/boards/teensy_41/board.mk
index 45ca0fb6e..e7f75fcae 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board.mk
+++ b/hw/bsp/imxrt/boards/teensy_41/board.mk
@@ -1,4 +1,5 @@
 CFLAGS += -DCPU_MIMXRT1062DVL6A
+MCU_FAMILY = RT1060
 MCU_VARIANT = MIMXRT1062
 
 # For flash-jlink target
diff --git a/hw/bsp/imxrt/family.cmake b/hw/bsp/imxrt/family.cmake
index d946b591d..009b15da3 100644
--- a/hw/bsp/imxrt/family.cmake
+++ b/hw/bsp/imxrt/family.cmake
@@ -1,7 +1,8 @@
 include_guard()
 
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
+set(MCUX_CORE ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(MCUX_DEVICES ${TOP}/hw/mcu/nxp/mcux-devices-rt)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
 include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
@@ -15,19 +16,29 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 
 set(FAMILY_MCUS MIMXRT1XXX CACHE INTERNAL "")
 
+# XIP boot files: some devices reference RT1052's xip (see each device's xip/CMakeLists.txt)
+if (MCU_FAMILY STREQUAL "RT1064")
+  set(XIP_DIR ${MCUX_DEVICES}/RT1064/MIMXRT1064/xip)
+elseif (MCU_FAMILY STREQUAL "RT1170")
+  set(XIP_DIR ${MCUX_DEVICES}/RT1170/MIMXRT1176/xip)
+else()
+  # RT1010, RT1015, RT1020, RT1050, RT1060 all use RT1052's xip
+  set(XIP_DIR ${MCUX_DEVICES}/RT1050/MIMXRT1052/xip)
+endif()
+
 #------------------------------------
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.ld)
+set(LD_FILE_GNU ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/gcc/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.ld)
 endif ()
 set(LD_FILE_Clang ${LD_FILE_GNU})
 if (NOT DEFINED LD_FILE_IAR)
-set(LD_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.icf)
+set(LD_FILE_IAR ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/iar/${MCU_VARIANT}xxxxx${MCU_CORE}_flexspi_nor.icf)
 endif ()
 
-set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT_WITH_CORE}.S)
-set(STARTUP_FILE_IAR ${SDK_DIR}/devices/${MCU_VARIANT}/iar/startup_${MCU_VARIANT_WITH_CORE}.s)
+set(STARTUP_FILE_GNU ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT_WITH_CORE}.S)
+set(STARTUP_FILE_IAR ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/iar/startup_${MCU_VARIANT_WITH_CORE}.s)
 set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
 #------------------------------------
@@ -37,23 +48,26 @@ function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/clock_config.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board/pin_mux.c
-    ${SDK_DIR}/drivers/common/fsl_common.c
-    ${SDK_DIR}/drivers/common/fsl_common_arm.c
-    ${SDK_DIR}/drivers/igpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/lpspi/fsl_lpspi.c
-    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
-    ${SDK_DIR}/drivers/ocotp/fsl_ocotp.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT_WITH_CORE}.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
+    # mcuxsdk-core drivers
+    ${MCUX_CORE}/drivers/common/fsl_common.c
+    ${MCUX_CORE}/drivers/common/fsl_common_arm.c
+    ${MCUX_CORE}/drivers/igpio/fsl_gpio.c
+    ${MCUX_CORE}/drivers/lpspi/fsl_lpspi.c
+    ${MCUX_CORE}/drivers/lpuart/fsl_lpuart.c
+    ${MCUX_CORE}/drivers/ocotp/fsl_ocotp.c
+    # device specific
+    ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/system_${MCU_VARIANT_WITH_CORE}.c
+    ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/fsl_clock.c
     )
 
-  # Optional drivers: only available for some mcus: rt1160, rt1170
-  set(OPTIONAL_DRIVER fsl_dcdc.c fsl_pmu.c fsl_anatop_ai.c)
-  foreach(FILE IN LISTS OPTIONAL_DRIVER)
-    if(EXISTS ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/${FILE})
-      target_sources(${BOARD_TARGET} PRIVATE ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/${FILE})
-    endif()
-  endforeach()
+  # Additional drivers in subdirectories (RT1170 power/anatop_ai)
+  if (MCU_FAMILY STREQUAL "RT1170")
+    target_sources(${BOARD_TARGET} PRIVATE
+      ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/power/fsl_dcdc.c
+      ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/power/fsl_pmu.c
+      ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/anatop_ai/fsl_anatop_ai.c
+      )
+  endif()
 
   if (NOT M4 STREQUAL "1")
     target_compile_definitions(${BOARD_TARGET} PUBLIC
@@ -66,15 +80,27 @@ function(family_add_board BOARD_TARGET)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}/board
     ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/igpio
-    ${SDK_DIR}/drivers/lpspi
-    ${SDK_DIR}/drivers/lpuart
-    ${SDK_DIR}/drivers/ocotp
+    # device specific
+    ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}
+    ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers
+    ${MCUX_DEVICES}/${MCU_FAMILY}/periph
+    # mcuxsdk-core drivers
+    ${MCUX_CORE}/drivers/common
+    ${MCUX_CORE}/drivers/igpio
+    ${MCUX_CORE}/drivers/lpspi
+    ${MCUX_CORE}/drivers/lpuart
+    ${MCUX_CORE}/drivers/ocotp
     )
 
+  # Include power/anatop_ai driver directories if they exist
+  foreach(SUBDIR power anatop_ai)
+    if(EXISTS ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/${SUBDIR})
+      target_include_directories(${BOARD_TARGET} PUBLIC
+        ${MCUX_DEVICES}/${MCU_FAMILY}/${MCU_VARIANT}/drivers/${SUBDIR}
+        )
+    endif()
+  endforeach()
+
   update_board(${BOARD_TARGET})
 endfunction()
 
@@ -91,13 +117,14 @@ function(family_configure_example TARGET RTOS)
     ${TOP}/src/portable/chipidea/ci_hs/dcd_ci_hs.c
     ${TOP}/src/portable/chipidea/ci_hs/hcd_ci_hs.c
     ${TOP}/src/portable/ehci/ehci.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/xip/fsl_flexspi_nor_boot.c
+    ${XIP_DIR}/fsl_flexspi_nor_boot.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    ${XIP_DIR}
     )
   target_compile_definitions(${TARGET} PUBLIC
     __START=main # required with -nostartfiles
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 42000671d..59735670a 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -1,11 +1,22 @@
 UF2_FAMILY_ID = 0x4fb2d5bd
-SDK_DIR = hw/mcu/nxp/mcux-sdk
+MCUX_CORE = hw/mcu/nxp/mcuxsdk-core
+MCUX_DEVICES = hw/mcu/nxp/mcux-devices-rt
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m7
 MCU_VARIANT_WITH_CORE = ${MCU_VARIANT}${MCU_CORE}
-MCU_DIR = $(SDK_DIR)/devices/$(MCU_VARIANT)
+MCU_DIR = $(MCUX_DEVICES)/$(MCU_FAMILY)/$(MCU_VARIANT)
+
+# XIP boot files: some devices reference RT1052's xip (see each device's xip/CMakeLists.txt)
+ifeq ($(MCU_FAMILY),RT1064)
+  XIP_DIR = $(MCUX_DEVICES)/RT1064/MIMXRT1064/xip
+else ifeq ($(MCU_FAMILY),RT1170)
+  XIP_DIR = $(MCUX_DEVICES)/RT1170/MIMXRT1176/xip
+else
+  # RT1010, RT1015, RT1020, RT1050, RT1060 all use RT1052's xip
+  XIP_DIR = $(MCUX_DEVICES)/RT1050/MIMXRT1052/xip
+endif
 
 CFLAGS += \
 	-D__START=main \
@@ -48,32 +59,36 @@ SRC_C += \
 	${BOARD_PATH}/board/clock_config.c \
 	${BOARD_PATH}/board/pin_mux.c \
 	$(MCU_DIR)/system_$(MCU_VARIANT_WITH_CORE).c \
-	$(MCU_DIR)/xip/fsl_flexspi_nor_boot.c \
+	$(XIP_DIR)/fsl_flexspi_nor_boot.c \
 	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(SDK_DIR)/drivers/common/fsl_common.c \
-	$(SDK_DIR)/drivers/common/fsl_common_arm.c \
-	$(SDK_DIR)/drivers/igpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c \
-	$(SDK_DIR)/drivers/ocotp/fsl_ocotp.c \
-
-# Optional drivers: only available for some mcus: rt1160, rt1170
-ifneq (,$(wildcard ${TOP}/${MCU_DIR}/drivers/fsl_dcdc.c))
+	$(MCUX_CORE)/drivers/common/fsl_common.c \
+	$(MCUX_CORE)/drivers/common/fsl_common_arm.c \
+	$(MCUX_CORE)/drivers/igpio/fsl_gpio.c \
+	$(MCUX_CORE)/drivers/lpuart/fsl_lpuart.c \
+	$(MCUX_CORE)/drivers/ocotp/fsl_ocotp.c \
+
+# Optional drivers: RT1170 power/anatop_ai subdirectories
+ifneq (,$(wildcard ${TOP}/${MCU_DIR}/drivers/power/fsl_dcdc.c))
 SRC_C += \
-  ${MCU_DIR}/drivers/fsl_dcdc.c \
-  ${MCU_DIR}/drivers/fsl_pmu.c \
-  ${MCU_DIR}/drivers/fsl_anatop_ai.c
+  ${MCU_DIR}/drivers/power/fsl_dcdc.c \
+  ${MCU_DIR}/drivers/power/fsl_pmu.c \
+  ${MCU_DIR}/drivers/anatop_ai/fsl_anatop_ai.c
+INC += \
+  $(TOP)/$(MCU_DIR)/drivers/power \
+  $(TOP)/$(MCU_DIR)/drivers/anatop_ai
 endif
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
 	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/project_template \
 	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/igpio \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(SDK_DIR)/drivers/ocotp \
+	$(TOP)/$(MCUX_DEVICES)/$(MCU_FAMILY)/periph \
+	$(TOP)/$(MCUX_CORE)/drivers/common \
+	$(TOP)/$(MCUX_CORE)/drivers/igpio \
+	$(TOP)/$(MCUX_CORE)/drivers/lpuart \
+	$(TOP)/$(MCUX_CORE)/drivers/ocotp \
+	$(TOP)/$(XIP_DIR) \
 
 SRC_S += $(MCU_DIR)/gcc/startup_$(MCU_VARIANT_WITH_CORE).S
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index bf91428f4..115120ef7 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -63,16 +63,19 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcuxsdk-core': ['https://github.com/nxp-mcuxpresso/mcuxsdk-core',
                             '0c5c6b16deb211110e06bde896cdff59ab213e16',
-                            'lpc51 lpc55 mcx'],
+                            'imxrt lpc51 lpc55 mcx'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x imxrt'],
+                            'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x'],
     'hw/mcu/nxp/mcux-devices-lpc': ['https://github.com/nxp-mcuxpresso/mcux-devices-lpc',
                             '8096b783ec09d0d1c8629025a5f9d8e7df26e520',
                             'lpc51 lpc55'],
     'hw/mcu/nxp/mcux-devices-mcx': ['https://github.com/nxp-mcuxpresso/mcux-devices-mcx',
                             'ada1c97c761123ec0c179bb9bb9f744bf9a11475',
                             'mcx'],
+    'hw/mcu/nxp/mcux-devices-rt': ['https://github.com/nxp-mcuxpresso/mcux-devices-rt',
+                            'dba2b523c9df61f3330bd186242f8210a8e47c45',
+                            'imxrt'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                          'rp2040'],
@@ -264,7 +267,7 @@ deps_optional = {
                                'hpmicro'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
-                    'imxrt kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x '
+                    'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
                     'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba '
@@ -272,7 +275,7 @@ deps_optional = {
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-                    'ra stm32n6 lpc51 lpc55 mcx'],
+                    'imxrt ra stm32n6 lpc51 lpc55 mcx'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From 5794e50c377b615ba7d29484cf8575433affe0fe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 11:46:53 +0700
Subject: rename and migrate kinetis_k32l to new mcux-devices

---
 .github/workflows/ci_set_matrix.py                 |   2 +-
 docs/reference/boards.rst                          |   6 +-
 docs/reference/dependencies.rst                    |   4 +-
 .../kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h  | 170 -------
 .../kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake |  15 -
 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h  |  96 ----
 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk |  18 -
 .../boards/frdm_k32l2a4s/clock_config.c            | 491 ---------------------
 .../boards/frdm_k32l2a4s/clock_config.h            | 164 -------
 .../kinetis_k32l2/boards/frdm_k32l2b/board.cmake   |  15 -
 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h    |  82 ----
 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk   |  18 -
 .../boards/frdm_k32l2b/clock_config.c              | 220 ---------
 .../boards/frdm_k32l2b/clock_config.h              | 110 -----
 hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake      |  15 -
 hw/bsp/kinetis_k32l2/boards/kuiic/board.h          |  69 ---
 hw/bsp/kinetis_k32l2/boards/kuiic/board.mk         |  18 -
 hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c   |  39 --
 hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h   |  14 -
 hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld         | 216 ---------
 hw/bsp/kinetis_k32l2/family.c                      | 175 --------
 hw/bsp/kinetis_k32l2/family.cmake                  |  97 ----
 hw/bsp/kinetis_k32l2/family.mk                     |  35 --
 tools/get_deps.py                                  |  11 +-
 24 files changed, 13 insertions(+), 2087 deletions(-)
 delete mode 100644 hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/board.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h
 delete mode 100644 hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld
 delete mode 100644 hw/bsp/kinetis_k32l2/family.c
 delete mode 100644 hw/bsp/kinetis_k32l2/family.cmake
 delete mode 100644 hw/bsp/kinetis_k32l2/family.mk

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index cd7dfa76b..b5c8d9544 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -34,7 +34,7 @@ family_list = {
     "hpmicro": ["riscv-gcc"],
     "imxrt": ["arm-gcc", "arm-clang"],
     "kinetis_k": ["arm-gcc", "arm-clang"],
-    "kinetis_k32l2": ["arm-gcc", "arm-clang"],
+    "kinetis_k32l": ["arm-gcc", "arm-clang"],
     "kinetis_kl": ["arm-gcc", "arm-clang"],
     "lpc11": ["arm-gcc", "arm-clang"],
     "lpc13": ["arm-gcc", "arm-clang"],
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index f6dd3cd91..eaef078d3 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -166,9 +166,9 @@ teensy_40           Teensy 4.0                                 imxrt          ht
 teensy_41           Teensy 4.1                                 imxrt          https://www.pjrc.com/store/teensy41.html
 frdm_k64f           Freedom K64F                               kinetis_k      https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-k64-k63-and-k24-mcus:FRDM-K64F
 teensy_35           Teensy 3.5                                 kinetis_k      https://www.pjrc.com/store/teensy35.html
-frdm_k32l2a4s       Freedom K32L2A4S                           kinetis_k32l2  https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-K32L2A4S
-frdm_k32l2b         Freedom K32L2B3                            kinetis_k32l2  https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3
-kuiic               Kuiic                                      kinetis_k32l2  https://github.com/nxf58843/kuiic
+frdm_k32l2a4s       Freedom K32L2A4S                           kinetis_k32l  https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-K32L2A4S
+frdm_k32l2b         Freedom K32L2B3                            kinetis_k32l  https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3
+kuiic               Kuiic                                      kinetis_k32l  https://github.com/nxf58843/kuiic
 frdm_kl25z          fomu                                       kinetis_kl     https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-kl14-kl15-kl24-kl25-mcus:FRDM-KL25Z
 lpcxpresso11u37     LPCXpresso11U37                            lpc11          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13074
 lpcxpresso11u68     LPCXpresso11U68                            lpc11          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13058
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index ce5f265d5..9b61e10a8 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -26,7 +26,7 @@ hw/mcu/mindmotion/mm32sdk                 https://github.com/hathach/mm32sdk.git
 hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                   11f57e578c7feea13f21c79ea0efab2630ac68c7  nrf
 hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                        2204191ec76283371419fbcec207da02e1bc22fa  nuc100_120 nuc121_125 nuc126 nuc505
 hw/mcu/nxp/lpcopen                        https://github.com/hathach/nxp_lpcopen.git                        b41cf930e65c734d8ec6de04f1d57d46787c76ae  lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
-hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
+hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_k32l kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
 hw/mcu/raspberry_pi/Pico-PIO-USB          https://github.com/sekigon-gonnoc/Pico-PIO-USB.git                675543bcc9baa8170f868ab7ba316d418dbcf41f  rp2040
 hw/mcu/renesas/fsp                        https://github.com/renesas/fsp.git                                edcc97d684b6f716728a60d7a6fea049d9870bd6  ra
 hw/mcu/renesas/rx                         https://github.com/kkitayam/rx_device.git                         706b4e0cf485605c32351e2f90f5698267996023  rx
@@ -81,7 +81,7 @@ hw/mcu/wch/ch32f20x                       https://github.com/openwch/ch32f20x.gi
 hw/mcu/wch/ch32v103                       https://github.com/openwch/ch32v103.git                           7578cae0b21f86dd053a1f781b2fc6ab99d0ec17  ch32v10x
 hw/mcu/wch/ch32v20x                       https://github.com/openwch/ch32v20x.git                           c4c38f507e258a4e69b059ccc2dc27dde33cea1b  ch32v20x
 hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                           184f21b852cb95eed58e86e901837bc9fff68775  ch32v30x
-lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  imxrt kinetis_k32l2 kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wbasam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg tm4c
+lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  imxrt kinetis_k32l kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wbasam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg tm4c
 lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  ra stm32n6
 lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                   cc0e0707c0c748713485b870bb980852b210877f  all
 lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                            159e31b689577dbf69cf0683bbaffbd71fa5ee10  all
diff --git a/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h
deleted file mode 100644
index 0225abe8d..000000000
--- a/hw/bsp/kinetis_k32l2/FreeRTOSConfig/FreeRTOSConfig.h
+++ /dev/null
@@ -1,170 +0,0 @@
-/*
- * FreeRTOS Kernel V10.0.0
- * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy of
- * this software and associated documentation files (the "Software"), to deal in
- * the Software without restriction, including without limitation the rights to
- * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
- * the Software, and to permit persons to whom the Software is furnished to do so,
- * subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in all
- * copies or substantial portions of the Software. If you wish to use our Amazon
- * FreeRTOS name, please do so in a fair use way that does not cause confusion.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
- * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
- * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
- * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
- * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
- *
- * http://www.FreeRTOS.org
- * http://aws.amazon.com/freertos
- *
- * 1 tab == 4 spaces!
- */
-
-
-#ifndef FREERTOS_CONFIG_H
-#define FREERTOS_CONFIG_H
-
-/*-----------------------------------------------------------
- * Application specific definitions.
- *
- * These definitions should be adjusted for your particular hardware and
- * application requirements.
- *
- * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
- * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
- *
- * See http://www.freertos.org/a00110.html.
- *----------------------------------------------------------*/
-
-// skip if included from IAR assembler
-#ifndef __IASMARM__
-  #include "fsl_device_registers.h"
-#endif
-
-/* Cortex M23/M33 port configuration. */
-#define configENABLE_MPU                        0
-#if defined(__ARM_FP) && __ARM_FP >= 4
-  #define configENABLE_FPU                      1
-#else
-  #define configENABLE_FPU                      0
-#endif
-#define configENABLE_TRUSTZONE                  0
-#define configMINIMAL_SECURE_STACK_SIZE         (1024)
-
-#define configUSE_PREEMPTION                    1
-#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
-#define configCPU_CLOCK_HZ                      SystemCoreClock
-#define configTICK_RATE_HZ                      ( 1000 )
-#define configMAX_PRIORITIES                    ( 5 )
-#define configMINIMAL_STACK_SIZE                ( 128 )
-#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
-#define configMAX_TASK_NAME_LEN                 16
-#define configUSE_16_BIT_TICKS                  0
-#define configIDLE_SHOULD_YIELD                 1
-#define configUSE_MUTEXES                       1
-#define configUSE_RECURSIVE_MUTEXES             1
-#define configUSE_COUNTING_SEMAPHORES           1
-#define configQUEUE_REGISTRY_SIZE               2
-#define configUSE_QUEUE_SETS                    0
-#define configUSE_TIME_SLICING                  0
-#define configUSE_NEWLIB_REENTRANT              0
-#define configENABLE_BACKWARD_COMPATIBILITY     1
-#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
-
-#define configSUPPORT_STATIC_ALLOCATION         1
-#define configSUPPORT_DYNAMIC_ALLOCATION        0
-
-/* Hook function related definitions. */
-#define configUSE_IDLE_HOOK                    0
-#define configUSE_TICK_HOOK                    0
-#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
-#define configCHECK_FOR_STACK_OVERFLOW         2
-#define configCHECK_HANDLER_INSTALLATION       0
-
-/* Run time and task stats gathering related definitions. */
-#define configGENERATE_RUN_TIME_STATS          0
-#define configRECORD_STACK_HIGH_ADDRESS        1
-#define configUSE_TRACE_FACILITY               1 // legacy trace
-#define configUSE_STATS_FORMATTING_FUNCTIONS   0
-
-/* Co-routine definitions. */
-#define configUSE_CO_ROUTINES                  0
-#define configMAX_CO_ROUTINE_PRIORITIES        2
-
-/* Software timer related definitions. */
-#define configUSE_TIMERS                       1
-#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
-#define configTIMER_QUEUE_LENGTH               32
-#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
-
-/* Optional functions - most linkers will remove unused functions anyway. */
-#define INCLUDE_vTaskPrioritySet               0
-#define INCLUDE_uxTaskPriorityGet              0
-#define INCLUDE_vTaskDelete                    0
-#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
-#define INCLUDE_xResumeFromISR                 0
-#define INCLUDE_vTaskDelayUntil                1
-#define INCLUDE_vTaskDelay                     1
-#define INCLUDE_xTaskGetSchedulerState         0
-#define INCLUDE_xTaskGetCurrentTaskHandle      1
-#define INCLUDE_uxTaskGetStackHighWaterMark    0
-#define INCLUDE_xTaskGetIdleTaskHandle         0
-#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
-#define INCLUDE_pcTaskGetTaskName              0
-#define INCLUDE_eTaskGetState                  0
-#define INCLUDE_xEventGroupSetBitFromISR       0
-#define INCLUDE_xTimerPendFunctionCall         0
-
-/* Define to trap errors during development. */
-// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
-#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
-  #define configASSERT(_exp) \
-    do {\
-      if ( !(_exp) ) { \
-        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
-        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
-          taskDISABLE_INTERRUPTS(); \
-           __asm("BKPT #0\n"); \
-        }\
-      }\
-    } while(0)
-#else
-  #define configASSERT( x )
-#endif
-
-/* FreeRTOS hooks to NVIC vectors */
-#define xPortPendSVHandler    PendSV_Handler
-#define xPortSysTickHandler   SysTick_Handler
-#define vPortSVCHandler       SVC_Handler
-
-//--------------------------------------------------------------------+
-// Interrupt nesting behavior configuration.
-//--------------------------------------------------------------------+
-
-// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
-#define configPRIO_BITS       2
-
-/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
-#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
-
-/* The highest interrupt priority that can be used by any interrupt service
-routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
-INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
-PRIORITY THAN THIS! (higher priorities are lower numeric values. */
-#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
-
-/* Interrupt priorities used by the kernel port layer itself.  These are generic
-to all Cortex-M ports, and do not rely on any particular library functions. */
-#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
-See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
-#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
-
-#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake
deleted file mode 100644
index 538aec2ca..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-set(MCU_VARIANT K32L2A41A)
-
-set(JLINK_DEVICE K32L2A41xxxxA)
-set(PYOCD_TARGET K32L2A)
-
-set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/K32L2A41xxxxA_flash.ld)
-
-function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
-    )
-  target_compile_definitions(${TARGET} PUBLIC
-    CPU_K32L2A41VLH1A
-    )
-endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
deleted file mode 100644
index 9e2534307..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.h
+++ /dev/null
@@ -1,96 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Freedom K32L2A4S
-   url: https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-K32L2A4S
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#include "fsl_device_registers.h"
-
-#define USB_CLOCK_SOURCE kCLOCK_IpSrcFircAsync
-
-// LED
-// The Red   LED is on PTE29.
-// The Green LED is on PTC4.
-// The Blue  LED is on PTE31.
-#define LED_PIN_CLOCK         kCLOCK_PortC
-#define LED_GPIO              GPIOC
-#define LED_PORT              PORTC
-#define LED_PIN               4
-#define LED_STATE_ON          0
-
-// SW3 button1
-#define BUTTON_PIN_CLOCK      kCLOCK_PortE
-#define BUTTON_GPIO           GPIOE
-#define BUTTON_PORT           PORTE
-#define BUTTON_PIN            4
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_PORT             LPUART0
-#define UART_PIN_CLOCK        kCLOCK_PortB
-#define UART_PIN_GPIO         GPIOB
-#define UART_PIN_PORT         PORTB
-#define UART_PIN_RX           16u
-#define UART_PIN_TX           17u
-#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_ScgFircClk)
-
-static inline void BOARD_InitBootPins(void) {
-  /*
-    Enable LPUART0 clock and configure port pins.
-    FIR clock is being used so the USB examples work.
-  */
-  PCC_LPUART0 = 0U;                          /* Clock must be off to set PCS */
-  PCC_LPUART0 = PCC_CLKCFG_PCS(
-      3U);        /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */
-  PCC_LPUART0 |= PCC_CLKCFG_CGC(1U);        /* Enable LPUART */
-
-  /* PORTB16 (pin 62) is configured as LPUART0_RX */
-  gpio_pin_config_t const lpuart_config_rx = {kGPIO_DigitalInput, 0};
-  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx);
-  const port_pin_config_t UART_CFG = {
-      kPORT_PullUp,
-      kPORT_FastSlewRate,
-      kPORT_PassiveFilterDisable,
-      kPORT_OpenDrainDisable,
-      kPORT_LowDriveStrength,
-      kPORT_MuxAsGpio,
-      kPORT_UnlockRegister
-  };
-  PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG);
-  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3);
-
-  /* PORTB17 (pin 63) is configured as LPUART0_TX */
-  gpio_pin_config_t const lpuart_config_tx = {kGPIO_DigitalOutput, 0};
-  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx);
-  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3);
-}
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
deleted file mode 100644
index fb3eb2a03..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/board.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-MCU = K32L2A41A
-
-CFLAGS += -DCPU_K32L2A41VLH1A
-
-# mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
-
-# All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = K32L2A41xxxxA
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2A
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
deleted file mode 100644
index 7947faefe..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.c
+++ /dev/null
@@ -1,491 +0,0 @@
-/*
- * Copyright 2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to setup clock using clock driver functions:
- *
- * 1. Call CLOCK_InitXXX() to configure corresponding SCG clock source.
- *    Note: The clock could not be set when it is being used as system clock.
- *    In default out of reset, the CPU is clocked from FIRC(IRC48M),
- *    so before setting FIRC, change to use another available clock source.
- *
- * 2. Call CLOCK_SetXtal0Freq() to set XTAL0 frequency based on board settings.
- *
- * 3. Call CLOCK_SetXxxModeSysClkConfig() to set SCG mode for Xxx run mode.
- *    Wait until the system clock source is changed to target source.
- *
- * 4. If power mode change is needed, call SMC_SetPowerModeProtection() to allow
- *    corresponding power mode and SMC_SetPowerModeXxx() to change to Xxx mode.
- *    Supported run mode and clock restrictions could be found in Reference Manual.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: K32L2A41xxxxA
-package_id: K32L2A41VLL1A
-mcu_data: ksdk2_0
-processor_version: 9.0.0
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_smc.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define SCG_CLKOUTCNFG_SIRC                               2U  /*!< SCG CLKOUT clock select: Slow IRC */
-#define SCG_SOSC_DISABLE                                  0U  /*!< System OSC disabled */
-#define SCG_SPLL_DISABLE                                  0U  /*!< System PLL disabled */
-#define SCG_SYS_OSC_CAP_0P                                0U  /*!< Oscillator 0pF capacitor load */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-//extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- * Code
- ******************************************************************************/
-/*FUNCTION**********************************************************************
- *
- * Function Name : CLOCK_CONFIG_SetScgOutSel
- * Description   : Set the SCG clock out select (CLKOUTSEL).
- * Param setting : The selected clock source.
- *
- *END**************************************************************************/
-static void CLOCK_CONFIG_SetScgOutSel(uint8_t setting)
-{
-     SCG->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting);
-}
-
-/*FUNCTION**********************************************************************
- *
- * Function Name : CLOCK_CONFIG_FircSafeConfig
- * Description   : This function is used to safely configure FIRC clock.
- *                 In default out of reset, the CPU is clocked from FIRC(IRC48M).
- *                 Before setting FIRC, change to use SIRC as system clock,
- *                 then configure FIRC. After FIRC is set, change back to use FIRC
- *                 in case SIRC need to be configured.
- * Param fircConfig  : FIRC configuration.
- *
- *END**************************************************************************/
-static void CLOCK_CONFIG_FircSafeConfig(const scg_firc_config_t *fircConfig)
-{
-    scg_sys_clk_config_t curConfig;
-    const scg_sirc_config_t scgSircConfig = {.enableMode = kSCG_SircEnable,
-                                             .div1 = kSCG_AsyncClkDisable,
-                                             .div3 = kSCG_AsyncClkDivBy2,
-                                             .range = kSCG_SircRangeHigh};
-    scg_sys_clk_config_t sysClkSafeConfigSource = {
-         .divSlow = kSCG_SysClkDivBy4, /* Slow clock divider */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-         .reserved1 = 0,
-         .reserved2 = 0,
-         .reserved3 = 0,
-#endif
-         .divCore = kSCG_SysClkDivBy1, /* Core clock divider */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-         .reserved4 = 0,
-#endif
-         .src = kSCG_SysClkSrcSirc,    /* System clock source */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-         .reserved5 = 0,
-#endif
-    };
-    /* Init Sirc. */
-    CLOCK_InitSirc(&scgSircConfig);
-    /* Change to use SIRC as system clock source to prepare to change FIRCCFG register. */
-    CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);
-    /* Wait for clock source switch finished. */
-    do
-    {
-         CLOCK_GetCurSysClkConfig(&curConfig);
-    } while (curConfig.src != sysClkSafeConfigSource.src);
-
-    /* Init Firc. */
-    CLOCK_InitFirc(fircConfig);
-    /* Change back to use FIRC as system clock source in order to configure SIRC if needed. */
-    sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc;
-    CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);
-    /* Wait for clock source switch finished. */
-    do
-    {
-         CLOCK_GetCurSysClkConfig(&curConfig);
-    } while (curConfig.src != sysClkSafeConfigSource.src);
-}
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockRUN();
-}
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockRUN
-called_from_default_init: true
-outputs:
-- {id: Core_clock.outFreq, value: 48 MHz}
-- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz}
-- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz}
-- {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: OSC32KCLK.outFreq, value: 32.768 kHz}
-- {id: SIRCDIV3_CLK.outFreq, value: 4 MHz}
-- {id: SIRC_CLK.outFreq, value: 8 MHz}
-- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz}
-- {id: SOSCER_CLK.outFreq, value: 32.768 kHz}
-- {id: SOSC_CLK.outFreq, value: 32.768 kHz}
-- {id: Slow_clock.outFreq, value: 24 MHz}
-- {id: System_clock.outFreq, value: 48 MHz}
-settings:
-- {id: SCG.FIRCDIV1.scale, value: '1', locked: true}
-- {id: SCG.FIRCDIV3.scale, value: '1', locked: true}
-- {id: SCG.SIRCDIV3.scale, value: '2', locked: true}
-- {id: SCG.SOSCDIV3.scale, value: '1', locked: true}
-- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower}
-- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
-- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled}
-sources:
-- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockRUN configuration
- ******************************************************************************/
-const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN =
-    {
-        .divSlow = kSCG_SysClkDivBy2,             /* Slow Clock Divider: divided by 2 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved1 = 0,
-        .reserved2 = 0,
-        .reserved3 = 0,
-#endif
-        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved4 = 0,
-#endif
-        .src = kSCG_SysClkSrcFirc,                /* Fast IRC is selected as System Clock Source */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved5 = 0,
-#endif
-    };
-const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN =
-    {
-        .freq = 32768U,                           /* System Oscillator frequency: 32768Hz */
-        .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */
-        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 3: divided by 1 */
-        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
-        .workMode = kSCG_SysOscModeOscLowPower,   /* Oscillator low power */
-    };
-const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN =
-    {
-        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
-        .div1 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDivBy2,              /* Slow IRC Clock Divider 3: divided by 2 */
-        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
-    };
-const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN =
-    {
-        .enableMode = kSCG_FircEnable,            /* Enable FIRC clock */
-        .div1 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 1: divided by 1 */
-        .div3 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 3: divided by 1 */
-        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
-        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
-    };
-const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
-    {
-        .enableMode = SCG_SPLL_DISABLE,           /* System PLL disabled */
-        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 3: Clock output is disabled */
-        .src = kSCG_SysPllSrcSysOsc,              /* System PLL clock source is System OSC */
-        .prediv = 0,                              /* Divided by 1 */
-        .mult = 0,                                /* Multiply Factor is 16 */
-    };
-/*******************************************************************************
- * Code for BOARD_BootClockRUN configuration
- ******************************************************************************/
-void BOARD_BootClockRUN(void)
-{
-    scg_sys_clk_config_t curConfig;
-
-    /* Init SOSC according to board configuration. */
-    CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockRUN);
-    /* Set the XTAL0 frequency based on board settings. */
-    CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockRUN.freq);
-    /* Init FIRC. */
-    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockRUN);
-    /* Init SIRC. */
-    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockRUN);
-    /* Set SCG to FIRC mode. */
-    CLOCK_SetRunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockRUN);
-    /* Wait for clock source switch finished. */
-    do
-    {
-         CLOCK_GetCurSysClkConfig(&curConfig);
-    } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src);
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
-}
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockHSRUN **********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockHSRUN
-outputs:
-- {id: CLKOUT.outFreq, value: 8 MHz}
-- {id: Core_clock.outFreq, value: 96 MHz, locked: true, accuracy: '0.001'}
-- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz}
-- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz}
-- {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: OSC32KCLK.outFreq, value: 32.768 kHz}
-- {id: PLLDIV1_CLK.outFreq, value: 96 MHz}
-- {id: PLLDIV3_CLK.outFreq, value: 96 MHz}
-- {id: SIRCDIV1_CLK.outFreq, value: 8 MHz}
-- {id: SIRCDIV3_CLK.outFreq, value: 8 MHz}
-- {id: SIRC_CLK.outFreq, value: 8 MHz}
-- {id: SOSCDIV1_CLK.outFreq, value: 32.768 kHz}
-- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz}
-- {id: SOSCER_CLK.outFreq, value: 32.768 kHz}
-- {id: SOSC_CLK.outFreq, value: 32.768 kHz}
-- {id: Slow_clock.outFreq, value: 24 MHz, locked: true, accuracy: '0.001'}
-- {id: System_clock.outFreq, value: 96 MHz}
-settings:
-- {id: SCGMode, value: SPLL}
-- {id: powerMode, value: HSRUN}
-- {id: CLKOUTConfig, value: 'yes'}
-- {id: SCG.DIVSLOW.scale, value: '4'}
-- {id: SCG.FIRCDIV1.scale, value: '1', locked: true}
-- {id: SCG.FIRCDIV3.scale, value: '1', locked: true}
-- {id: SCG.PREDIV.scale, value: '4'}
-- {id: SCG.SCSSEL.sel, value: SCG.SPLL_DIV2_CLK}
-- {id: SCG.SIRCDIV1.scale, value: '1', locked: true}
-- {id: SCG.SIRCDIV3.scale, value: '1', locked: true}
-- {id: SCG.SOSCDIV1.scale, value: '1', locked: true}
-- {id: SCG.SOSCDIV3.scale, value: '1', locked: true}
-- {id: SCG.SPLLDIV1.scale, value: '1', locked: true}
-- {id: SCG.SPLLDIV3.scale, value: '1', locked: true}
-- {id: SCG.SPLLSRCSEL.sel, value: SCG.FIRC}
-- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower}
-- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
-- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled}
-- {id: SCG_SPLLCSR_SPLLEN_CFG, value: Enabled}
-sources:
-- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockHSRUN configuration
- ******************************************************************************/
-const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN =
-    {
-        .divSlow = kSCG_SysClkDivBy4,             /* Slow Clock Divider: divided by 4 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved1 = 0,
-        .reserved2 = 0,
-        .reserved3 = 0,
-#endif
-        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved4 = 0,
-#endif
-        .src = kSCG_SysClkSrcSysPll,              /* System PLL is selected as System Clock Source */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved5 = 0,
-#endif
-    };
-const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN =
-    {
-        .freq = 32768U,                           /* System Oscillator frequency: 32768Hz */
-        .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */
-        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 1: divided by 1 */
-        .div3 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 3: divided by 1 */
-        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
-        .workMode = kSCG_SysOscModeOscLowPower,   /* Oscillator low power */
-    };
-const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN =
-    {
-        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
-        .div1 = kSCG_AsyncClkDivBy1,              /* Slow IRC Clock Divider 1: divided by 1 */
-        .div3 = kSCG_AsyncClkDivBy1,              /* Slow IRC Clock Divider 3: divided by 1 */
-        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
-    };
-const scg_firc_config_t g_scgFircConfig_BOARD_BootClockHSRUN =
-    {
-        .enableMode = kSCG_FircEnable,            /* Enable FIRC clock */
-        .div1 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 1: divided by 1 */
-        .div3 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 3: divided by 1 */
-        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
-        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
-    };
-const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN =
-    {
-        .enableMode = kSCG_SysPllEnable,          /* Enable SPLL clock */
-        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDivBy1,              /* System PLL Clock Divider 1: divided by 1 */
-        .div3 = kSCG_AsyncClkDivBy1,              /* System PLL Clock Divider 3: divided by 1 */
-        .src = kSCG_SysPllSrcFirc,                /* System PLL clock source is Fast IRC */
-        .prediv = 3,                              /* Divided by 4 */
-        .mult = 0,                                /* Multiply Factor is 16 */
-    };
-/*******************************************************************************
- * Code for BOARD_BootClockHSRUN configuration
- ******************************************************************************/
-void BOARD_BootClockHSRUN(void)
-{
-    scg_sys_clk_config_t curConfig;
-
-    /* Init SOSC according to board configuration. */
-    CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockHSRUN);
-    /* Set the XTAL0 frequency based on board settings. */
-    CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockHSRUN.freq);
-    /* Init FIRC. */
-    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockHSRUN);
-    /* Init SIRC. */
-    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockHSRUN);
-    /* Init SysPll. */
-    CLOCK_InitSysPll(&g_scgSysPllConfig_BOARD_BootClockHSRUN);
-    /* Set HSRUN power mode. */
-    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
-    SMC_SetPowerModeHsrun(SMC);
-    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateHsrun)
-    {
-    }
-
-    /* Set SCG to SPLL mode. */
-    CLOCK_SetHsrunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockHSRUN);
-    /* Wait for clock source switch finished. */
-    do
-    {
-         CLOCK_GetCurSysClkConfig(&curConfig);
-    } while (curConfig.src != g_sysClkConfig_BOARD_BootClockHSRUN.src);
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKHSRUN_CORE_CLOCK;
-    /* Set SCG CLKOUT selection. */
-    CLOCK_CONFIG_SetScgOutSel(SCG_CLKOUTCNFG_SIRC);
-}
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockVLPR ***********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockVLPR
-outputs:
-- {id: Core_clock.outFreq, value: 8 MHz, locked: true, accuracy: '0.001'}
-- {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: SIRC_CLK.outFreq, value: 8 MHz}
-- {id: Slow_clock.outFreq, value: 1 MHz, locked: true, accuracy: '0.001'}
-- {id: System_clock.outFreq, value: 8 MHz}
-settings:
-- {id: SCGMode, value: SIRC}
-- {id: powerMode, value: VLPR}
-- {id: SCG.DIVSLOW.scale, value: '8'}
-- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
-- {id: SCG_FIRCCSR_FIRCLPEN_CFG, value: Enabled}
-sources:
-- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR =
-    {
-        .divSlow = kSCG_SysClkDivBy8,             /* Slow Clock Divider: divided by 8 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved1 = 0,
-        .reserved2 = 0,
-        .reserved3 = 0,
-#endif
-        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved4 = 0,
-#endif
-        .src = kSCG_SysClkSrcSirc,                /* Slow IRC is selected as System Clock Source */
-#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
-        .reserved5 = 0,
-#endif
-    };
-const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR =
-    {
-        .freq = 0U,                               /* System Oscillator frequency: 0Hz */
-        .enableMode = SCG_SOSC_DISABLE,           /* System OSC disabled */
-        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 3: Clock output is disabled */
-        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
-        .workMode = kSCG_SysOscModeExt,           /* Use external clock */
-    };
-const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR =
-    {
-        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
-        .div1 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 3: Clock output is disabled */
-        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
-    };
-const scg_firc_config_t g_scgFircConfig_BOARD_BootClockVLPR =
-    {
-        .enableMode = kSCG_FircEnable | kSCG_FircEnableInLowPower,/* Enable FIRC clock, Enable FIRC in low power mode */
-        .div1 = kSCG_AsyncClkDisable,             /* Fast IRC Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDisable,             /* Fast IRC Clock Divider 3: Clock output is disabled */
-        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
-        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
-    };
-const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR =
-    {
-        .enableMode = SCG_SPLL_DISABLE,           /* System PLL disabled */
-        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
-        .div1 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 1: Clock output is disabled */
-        .div3 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 3: Clock output is disabled */
-        .src = kSCG_SysPllSrcSysOsc,              /* System PLL clock source is System OSC */
-        .prediv = 0,                              /* Divided by 1 */
-        .mult = 0,                                /* Multiply Factor is 16 */
-    };
-/*******************************************************************************
- * Code for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-void BOARD_BootClockVLPR(void)
-{
-    /* Init FIRC. */
-    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockVLPR);
-    /* Init SIRC. */
-    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockVLPR);
-    /* Allow SMC all power modes. */
-    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
-    /* Set VLPR power mode. */
-    SMC_SetPowerModeVlpr(SMC);
-    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
-    {
-    }
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
-}
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h
deleted file mode 100644
index c01d5e03c..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2a4s/clock_config.h
+++ /dev/null
@@ -1,164 +0,0 @@
-/*
- * Copyright 2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define BOARD_XTAL0_CLK_HZ                            32768U  /*!< Board xtal0 frequency in Hz */
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK              48000000U  /*!< Core clock frequency: 48000000Hz */
-
-/*! @brief SCG set for BOARD_BootClockRUN configuration.
- */
-extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN;
-/*! @brief System OSC set for BOARD_BootClockRUN configuration.
- */
-extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN;
-/*! @brief SIRC set for BOARD_BootClockRUN configuration.
- */
-extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN;
-/*! @brief FIRC set for BOARD_BootClockRUN configuration.
- */
-extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockRUN;
-extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
-/*! @brief Low Power FLL set for BOARD_BootClockRUN configuration.
- */
-
-/*******************************************************************************
- * API for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockRUN(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockHSRUN **********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockHSRUN configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKHSRUN_CORE_CLOCK            96000000U  /*!< Core clock frequency: 96000000Hz */
-
-/*! @brief SCG set for BOARD_BootClockHSRUN configuration.
- */
-extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN;
-/*! @brief System OSC set for BOARD_BootClockHSRUN configuration.
- */
-extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN;
-/*! @brief SIRC set for BOARD_BootClockHSRUN configuration.
- */
-extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN;
-/*! @brief FIRC set for BOARD_BootClockHSRUN configuration.
- */
-extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockHSRUN;
-extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
-/*! @brief Low Power FLL set for BOARD_BootClockHSRUN configuration.
- */
-
-/*******************************************************************************
- * API for BOARD_BootClockHSRUN configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockHSRUN(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockVLPR ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK              8000000U  /*!< Core clock frequency: 8000000Hz */
-
-/*! @brief SCG set for BOARD_BootClockVLPR configuration.
- */
-extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR;
-/*! @brief System OSC set for BOARD_BootClockVLPR configuration.
- */
-extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR;
-/*! @brief SIRC set for BOARD_BootClockVLPR configuration.
- */
-extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR;
-/*! @brief FIRC set for BOARD_BootClockVLPR configuration.
- */
-extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockVLPR;
-extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
-/*! @brief Low Power FLL set for BOARD_BootClockVLPR configuration.
- */
-
-/*******************************************************************************
- * API for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockVLPR(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake
deleted file mode 100644
index 2ec2acace..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-set(MCU_VARIANT K32L2B31A)
-
-set(JLINK_DEVICE K32L2B31xxxxA)
-set(PYOCD_TARGET K32L2B)
-
-set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/K32L2B31xxxxA_flash.ld)
-
-function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
-    )
-  target_compile_definitions(${TARGET} PUBLIC
-    CPU_K32L2B31VLH0A
-    )
-endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
deleted file mode 100644
index 854340d6d..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.h
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Freedom K32L2B3
-   url: https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#include "fsl_device_registers.h"
-
-#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
-
-// LED
-#define LED_PIN_CLOCK         kCLOCK_PortD
-#define LED_GPIO              GPIOD
-#define LED_PORT              PORTD
-#define LED_PIN               5
-#define LED_STATE_ON          0
-
-// SW3 button1
-#define BUTTON_PIN_CLOCK      kCLOCK_PortC
-#define BUTTON_GPIO           GPIOC
-#define BUTTON_PORT           PORTC
-#define BUTTON_PIN            3
-#define BUTTON_STATE_ACTIVE   0
-
-// UART
-#define UART_PORT             LPUART0
-#define UART_PIN_CLOCK        kCLOCK_PortA
-#define UART_PIN_PORT         PORTA
-#define UART_PIN_RX           1u
-#define UART_PIN_TX           2u
-#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */
-#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */
-#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
-
-static inline void BOARD_InitBootPins(void) {
-  /* PORTA1 (pin 23) is configured as LPUART0_RX */
-  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2);
-  /* PORTA2 (pin 24) is configured as LPUART0_TX */
-  PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2);
-
-  SIM->SOPT5 = ((SIM->SOPT5 &
-                 /* Mask bits to zero which are setting */
-                 (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK)))
-                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
-                | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX)
-                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
-                | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX));
-
-  BOARD_BootClockRUN();
-  SystemCoreClockUpdate();
-  CLOCK_SetLpuart0Clock(1);
-}
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
deleted file mode 100644
index 9cf36c500..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/board.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-MCU = K32L2B31A
-
-CFLAGS += -DCPU_K32L2B31VLH0A
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
-
-# All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
-
-# For flash-jlink target
-JLINK_DEVICE = K32L2B31xxxxA
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2B
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
deleted file mode 100644
index 86eb42ef8..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.c
+++ /dev/null
@@ -1,220 +0,0 @@
-/*
- * Copyright 2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-/*
- * How to setup clock using clock driver functions:
- *
- * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
- *    and flash clock are in allowed range during clock mode switch.
- *
- * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
- *
- * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
- *
- * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
- */
-
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!GlobalInfo
-product: Clocks v7.0
-processor: K32L2B31xxxxA
-package_id: K32L2B31VLH0A
-mcu_data: ksdk2_0
-processor_version: 9.0.0
-board: FRDM-K32L2B
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-#include "fsl_smc.h"
-#include "clock_config.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define OSC_CAP0P                                         0U  /*!< Oscillator 0pF capacitor load */
-#define OSC_ER_CLK_DISABLE                                0U  /*!< Disable external reference clock */
-#define SIM_OSC32KSEL_OSC32KCLK_CLK                       0U  /*!< OSC32KSEL select: OSC32KCLK clock */
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-//extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-void BOARD_InitBootClocks(void)
-{
-    BOARD_BootClockRUN();
-}
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockRUN
-called_from_default_init: true
-outputs:
-- {id: Bus_clock.outFreq, value: 24 MHz}
-- {id: Core_clock.outFreq, value: 48 MHz}
-- {id: Flash_clock.outFreq, value: 24 MHz}
-- {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: MCGIRCLK.outFreq, value: 8 MHz}
-- {id: MCGPCLK.outFreq, value: 48 MHz}
-- {id: System_clock.outFreq, value: 48 MHz}
-settings:
-- {id: MCGMode, value: HIRC}
-- {id: MCG.CLKS.sel, value: MCG.HIRC}
-- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
-- {id: MCG_C2_RANGE0_CFG, value: Very_high}
-- {id: MCG_MC_HIRCEN_CFG, value: Enabled}
-- {id: OSC0_CR_ERCLKEN_CFG, value: Enabled}
-- {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
-- {id: SIM.CLKOUTSEL.sel, value: MCG.MCGPCLK}
-- {id: SIM.COPCLKSEL.sel, value: OSC.OSCERCLK}
-- {id: SIM.FLEXIOSRCSEL.sel, value: MCG.MCGPCLK}
-- {id: SIM.LPUART0SRCSEL.sel, value: MCG.MCGPCLK}
-- {id: SIM.LPUART1SRCSEL.sel, value: MCG.MCGPCLK}
-- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
-- {id: SIM.TPMSRCSEL.sel, value: MCG.MCGPCLK}
-- {id: SIM.USBSRCSEL.sel, value: MCG.MCGPCLK}
-sources:
-- {id: MCG.HIRC.outFreq, value: 48 MHz}
-- {id: OSC.OSC.outFreq, value: 32 MHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockRUN configuration
- ******************************************************************************/
-const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN =
-    {
-        .outSrc = kMCGLITE_ClkSrcHirc,            /* MCGOUTCLK source is HIRC */
-        .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
-        .ircs = kMCGLITE_Lirc8M,                  /* Slow internal reference (LIRC) 8 MHz clock selected */
-        .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
-        .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
-        .hircEnableInNotHircMode = true,          /* HIRC source is enabled */
-    };
-const sim_clock_config_t simConfig_BOARD_BootClockRUN =
-    {
-        .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
-        .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
-    };
-const osc_config_t oscConfig_BOARD_BootClockRUN =
-    {
-        .freq = 0U,                               /* Oscillator frequency: 0Hz */
-        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
-        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
-        .oscerConfig =
-            {
-                .enableMode = kOSC_ErClkEnable,   /* Enable external reference clock, disable external reference clock in STOP mode */
-            }
-    };
-
-/*******************************************************************************
- * Code for BOARD_BootClockRUN configuration
- ******************************************************************************/
-void BOARD_BootClockRUN(void)
-{
-    /* Set the system clock dividers in SIM to safe value. */
-    CLOCK_SetSimSafeDivs();
-    /* Set MCG to HIRC mode. */
-    CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
-    /* Set the clock configuration in SIM module. */
-    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
-}
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockVLPR ***********************
- ******************************************************************************/
-/* clang-format off */
-/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
-!!Configuration
-name: BOARD_BootClockVLPR
-outputs:
-- {id: Bus_clock.outFreq, value: 1 MHz}
-- {id: Core_clock.outFreq, value: 2 MHz}
-- {id: Flash_clock.outFreq, value: 1 MHz}
-- {id: LPO_clock.outFreq, value: 1 kHz}
-- {id: MCGIRCLK.outFreq, value: 2 MHz}
-- {id: System_clock.outFreq, value: 2 MHz}
-settings:
-- {id: MCGMode, value: LIRC2M}
-- {id: powerMode, value: VLPR}
-- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
-- {id: RTCCLKOUTConfig, value: 'yes'}
-- {id: SIM.OUTDIV4.scale, value: '2', locked: true}
-- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
-sources:
-- {id: MCG.LIRC.outFreq, value: 2 MHz}
-- {id: OSC.OSC.outFreq, value: 32.768 kHz}
- * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
-/* clang-format on */
-
-/*******************************************************************************
- * Variables for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR =
-    {
-        .outSrc = kMCGLITE_ClkSrcLirc,            /* MCGOUTCLK source is LIRC */
-        .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
-        .ircs = kMCGLITE_Lirc2M,                  /* Slow internal reference (LIRC) 2 MHz clock selected */
-        .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
-        .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
-        .hircEnableInNotHircMode = false,         /* HIRC source is not enabled */
-    };
-const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
-    {
-        .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
-        .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
-    };
-const osc_config_t oscConfig_BOARD_BootClockVLPR =
-    {
-        .freq = 0U,                               /* Oscillator frequency: 0Hz */
-        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
-        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
-        .oscerConfig =
-            {
-                .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
-            }
-    };
-
-/*******************************************************************************
- * Code for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-void BOARD_BootClockVLPR(void)
-{
-    /* Set the system clock dividers in SIM to safe value. */
-    CLOCK_SetSimSafeDivs();
-    /* Set MCG to LIRC2M mode. */
-    CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR);
-    /* Set the clock configuration in SIM module. */
-    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
-    /* Set VLPR power mode. */
-    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
-#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
-    SMC_SetPowerModeVlpr(SMC, false);
-#else
-    SMC_SetPowerModeVlpr(SMC);
-#endif
-    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
-    {
-    }
-    /* Set SystemCoreClock variable. */
-    SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
-}
diff --git a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h b/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h
deleted file mode 100644
index 37328e7d8..000000000
--- a/hw/bsp/kinetis_k32l2/boards/frdm_k32l2b/clock_config.h
+++ /dev/null
@@ -1,110 +0,0 @@
-/*
- * Copyright 2019 ,2021 NXP
- * All rights reserved.
- *
- * SPDX-License-Identifier: BSD-3-Clause
- */
-
-/***********************************************************************************************************************
- * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
- * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
- **********************************************************************************************************************/
-
-#ifndef _CLOCK_CONFIG_H_
-#define _CLOCK_CONFIG_H_
-
-#include "fsl_common.h"
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-
-/*******************************************************************************
- ************************ BOARD_InitBootClocks function ************************
- ******************************************************************************/
-
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes default configuration of clocks.
- *
- */
-void BOARD_InitBootClocks(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************** Configuration BOARD_BootClockRUN ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK              48000000U  /*!< Core clock frequency: 48000000Hz */
-
-/*! @brief MCG lite set for BOARD_BootClockRUN configuration.
- */
-extern const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN;
-/*! @brief SIM module set for BOARD_BootClockRUN configuration.
- */
-extern const sim_clock_config_t simConfig_BOARD_BootClockRUN;
-/*! @brief OSC set for BOARD_BootClockRUN configuration.
- */
-extern const osc_config_t oscConfig_BOARD_BootClockRUN;
-
-/*******************************************************************************
- * API for BOARD_BootClockRUN configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockRUN(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-/*******************************************************************************
- ********************* Configuration BOARD_BootClockVLPR ***********************
- ******************************************************************************/
-/*******************************************************************************
- * Definitions for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK              2000000U  /*!< Core clock frequency: 2000000Hz */
-
-/*! @brief MCG lite set for BOARD_BootClockVLPR configuration.
- */
-extern const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR;
-/*! @brief SIM module set for BOARD_BootClockVLPR configuration.
- */
-extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR;
-/*! @brief OSC set for BOARD_BootClockVLPR configuration.
- */
-extern const osc_config_t oscConfig_BOARD_BootClockVLPR;
-
-/*******************************************************************************
- * API for BOARD_BootClockVLPR configuration
- ******************************************************************************/
-#if defined(__cplusplus)
-extern "C" {
-#endif /* __cplusplus*/
-
-/*!
- * @brief This function executes configuration of clocks.
- *
- */
-void BOARD_BootClockVLPR(void);
-
-#if defined(__cplusplus)
-}
-#endif /* __cplusplus*/
-
-#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake b/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake
deleted file mode 100644
index cf14000ac..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/board.cmake
+++ /dev/null
@@ -1,15 +0,0 @@
-set(MCU_VARIANT K32L2B31A)
-
-set(JLINK_DEVICE K32L2B31xxxxA)
-set(PYOCD_TARGET K32L2B)
-
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/kuiic.ld)
-
-function(update_board TARGET)
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
-    )
-  target_compile_definitions(${TARGET} PUBLIC
-    CPU_K32L2B31VLH0A
-    )
-endfunction()
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.h b/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
deleted file mode 100644
index f5895fc65..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/board.h
+++ /dev/null
@@ -1,69 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2019, Ha Thach (tinyusb.org)
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Kuiic
-   url: https://github.com/nxf58843/kuiic
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#include "fsl_device_registers.h"
-
-#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
-
-// LED
-#define LED_PIN_CLOCK         kCLOCK_PortA
-#define LED_GPIO              GPIOA
-#define LED_PORT              PORTA
-#define LED_PIN               2
-#define LED_STATE_ON          1
-
-// UART
-#define UART_PORT             LPUART1
-#define UART_PIN_RX           3u
-#define UART_PIN_TX           0u
-
-#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
-
-static inline void BOARD_InitBootPins(void) {
-  /* PORTC3 is configured as LPUART0_RX */
-  PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
-  /* PORTA2 (pin 24) is configured as LPUART0_TX */
-  PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
-
-  SIM->SOPT5 = ((SIM->SOPT5 &
-                 /* Mask bits to zero which are setting */
-                 (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
-                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
-                | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX)
-                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
-                | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX));
-  CLOCK_SetLpuart1Clock(1);
-}
-
-#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
deleted file mode 100644
index 2bc5b1e34..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/board.mk
+++ /dev/null
@@ -1,18 +0,0 @@
-MCU = K32L2B31A
-
-CFLAGS += -DCPU_K32L2B31VLH0A
-
-# mcu driver cause following warnings
-CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
-
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/kuiic.ld
-
-# For flash-jlink target
-JLINK_DEVICE = K32L2B31xxxxA
-
-# For flash-pyocd target
-PYOCD_TARGET = K32L2B
-
-# flash using pyocd
-flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c
deleted file mode 100644
index c1a6d1a8d..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.c
+++ /dev/null
@@ -1,39 +0,0 @@
-#include "clock_config.h"
-#include "fsl_clock.h"
-
-/*******************************************************************************
- * Variables
- ******************************************************************************/
-/* System clock frequency. */
-// extern uint32_t SystemCoreClock;
-
-/*******************************************************************************
- * Variables for BOARD_BootClockRUN configuration
- ******************************************************************************/
-const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
-    .outSrc          = kMCGLITE_ClkSrcHirc,  /* MCGOUTCLK source is HIRC */
-    .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
-    .ircs            = kMCGLITE_Lirc8M,      /* Slow internal reference (LIRC) 8 MHz clock selected */
-    .fcrdiv          = kMCGLITE_LircDivBy1,  /* Low-frequency Internal Reference Clock Divider: divided by 1 */
-    .lircDiv2        = kMCGLITE_LircDivBy1,  /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
-    .hircEnableInNotHircMode = true,         /* HIRC source is enabled */
-};
-const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
-    .er32kSrc = SIM_OSC32KSEL_LPO_CLK,       /* OSC32KSEL select: LPO clock */
-    .clkdiv1  = 0x10000U,                    /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
-};
-
-/*******************************************************************************
- * Code for BOARD_BootClockRUN configuration
- ******************************************************************************/
-void BOARD_BootClockRUN(void)
-{
-  /* Set the system clock dividers in SIM to safe value. */
-  CLOCK_SetSimSafeDivs();
-  /* Set MCG to HIRC mode. */
-  CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
-  /* Set the clock configuration in SIM module. */
-  CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
-  /* Set SystemCoreClock variable. */
-  SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
-}
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h b/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h
deleted file mode 100644
index 920cad98f..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/clock_config.h
+++ /dev/null
@@ -1,14 +0,0 @@
-#ifndef CLOCK_CONFIG_H
-#define CLOCK_CONFIG_H
-
-/*******************************************************************************
- * Definitions
- ******************************************************************************/
-#define SIM_OSC32KSEL_LPO_CLK         3U        /*!< OSC32KSEL select: LPO clock */
-#define SOPT5_LPUART1RXSRC_LPUART_RX  0x00u     /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */
-#define SOPT5_LPUART1TXSRC_LPUART_TX  0x00u     /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */
-#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
-
-void BOARD_BootClockRUN(void);
-
-#endif
diff --git a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld b/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld
deleted file mode 100644
index f478a99c7..000000000
--- a/hw/bsp/kinetis_k32l2/boards/kuiic/kuiic.ld
+++ /dev/null
@@ -1,216 +0,0 @@
-/*
-** ###################################################################
-**     Processors:          K32L2B31VFM0A
-**                          K32L2B31VFT0A
-**                          K32L2B31VLH0A
-**                          K32L2B31VMP0A
-**
-**     Compiler:            GNU C Compiler
-**     Reference manual:    K32L2B3xRM, Rev.0, July 2019
-**     Version:             rev. 1.0, 2019-07-30
-**     Build:               b190930
-**
-**     Abstract:
-**         Linker file for the GNU C Compiler
-**
-**     Copyright 2016 Freescale Semiconductor, Inc.
-**     Copyright 2016-2019 NXP
-**     All rights reserved.
-**
-**     SPDX-License-Identifier: BSD-3-Clause
-**
-**     http:                 www.nxp.com
-**     mail:                 support@nxp.com
-**
-** ###################################################################
-*/
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
-STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
-
-/* Specify the memory areas */
-MEMORY
-{
-  m_interrupts          (RX)  : ORIGIN = 0x00008000, LENGTH = 0x00000200
-  m_flash_config        (RX)  : ORIGIN = 0x00008400, LENGTH = 0x00000010
-  m_text                (RX)  : ORIGIN = 0x00008410, LENGTH = 0x00037BF0
-  m_data                (RW)  : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000
-}
-
-/* Define output sections */
-SECTIONS
-{
-  /* The startup code goes first into internal flash */
-  .interrupts :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector))     /* Startup code */
-    . = ALIGN(4);
-  } > m_interrupts
-
-  .flash_config :
-  {
-    . = ALIGN(4);
-    KEEP(*(.FlashConfig))    /* Flash Configuration Field (FCF) */
-    . = ALIGN(4);
-  } > m_flash_config
-
-  /* The program code and other data goes into internal flash */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)                 /* .text sections (code) */
-    *(.text*)                /* .text* sections (code) */
-    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
-    *(.glue_7)               /* glue arm to thumb code */
-    *(.glue_7t)              /* glue thumb to arm code */
-    *(.eh_frame)
-    KEEP (*(.init))
-    KEEP (*(.fini))
-    . = ALIGN(4);
-  } > m_text
-
-  .ARM.extab :
-  {
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-  } > m_text
-
-  .ARM :
-  {
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-  } > m_text
-
- .ctors :
-  {
-    __CTOR_LIST__ = .;
-    /* gcc uses crtbegin.o to find the start of
-       the constructors, so we make sure it is
-       first.  Because this is a wildcard, it
-       doesn't matter if the user does not
-       actually link against crtbegin.o; the
-       linker won't look for a file to match a
-       wildcard.  The wildcard also means that it
-       doesn't matter which directory crtbegin.o
-       is in.  */
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    /* We don't want to include the .ctor section from
-       from the crtend.o file until after the sorted ctors.
-       The .ctor section from the crtend file contains the
-       end of ctors marker and it must be last */
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-    __CTOR_END__ = .;
-  } > m_text
-
-  .dtors :
-  {
-    __DTOR_LIST__ = .;
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-    __DTOR_END__ = .;
-  } > m_text
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } > m_text
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } > m_text
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } > m_text
-
-  __etext = .;    /* define a global symbol at end of code */
-  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
-
-  /* reserve MTB memory at the beginning of m_data */
-  .mtb : /* MTB buffer address as defined by the hardware */
-  {
-    . = ALIGN(8);
-    _mtb_start = .;
-    KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */
-    . = ALIGN(8);
-    _mtb_end = .;
-  } > m_data
-
-  .data : AT(__DATA_ROM)
-  {
-    . = ALIGN(4);
-    __DATA_RAM = .;
-    __data_start__ = .;      /* create a global symbol at data start */
-    *(.data)                 /* .data sections */
-    *(.data*)                /* .data* sections */
-    KEEP(*(.jcr*))
-    . = ALIGN(4);
-    __data_end__ = .;        /* define a global symbol at data end */
-  } > m_data
-
-  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
-  text_end = ORIGIN(m_text) + LENGTH(m_text);
-  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
-
-  /* Uninitialized data section */
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    . = ALIGN(4);
-    __START_BSS = .;
-    __bss_start__ = .;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-    . = ALIGN(4);
-    __bss_end__ = .;
-    __END_BSS = .;
-  } > m_data
-
-  .heap :
-  {
-    . = ALIGN(8);
-    __end__ = .;
-    PROVIDE(end = .);
-    __HeapBase = .;
-    . += HEAP_SIZE;
-    __HeapLimit = .;
-    __heap_limit = .; /* Add for _sbrk */
-  } > m_data
-
-  .stack :
-  {
-    . = ALIGN(8);
-    . += STACK_SIZE;
-  } > m_data
-
-  /* Initializes stack on the end of block */
-  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
-  __StackLimit = __StackTop - STACK_SIZE;
-  PROVIDE(__stack = __StackTop);
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-
-  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
-}
diff --git a/hw/bsp/kinetis_k32l2/family.c b/hw/bsp/kinetis_k32l2/family.c
deleted file mode 100644
index ec8dc6ecf..000000000
--- a/hw/bsp/kinetis_k32l2/family.c
+++ /dev/null
@@ -1,175 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2018, hathach (tinyusb.org)
- * Copyright (c) 2020, Koji Kitayama
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   manufacturer: NXP
-*/
-
-#include "fsl_gpio.h"
-#include "fsl_port.h"
-#include "fsl_clock.h"
-#include "fsl_lpuart.h"
-
-#include "clock_config.h"
-#include "bsp/board_api.h"
-#include "board.h"
-
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void USB0_IRQHandler(void) {
-  tud_int_handler(0);
-}
-
-void board_init(void) {
-  /* Enable port clocks for GPIO pins */
-  CLOCK_EnableClock(kCLOCK_PortA);
-  CLOCK_EnableClock(kCLOCK_PortB);
-  CLOCK_EnableClock(kCLOCK_PortC);
-  CLOCK_EnableClock(kCLOCK_PortD);
-  CLOCK_EnableClock(kCLOCK_PortE);
-
-  BOARD_InitBootPins();
-  BOARD_BootClockRUN();
-  SystemCoreClockUpdate();
-
-  gpio_pin_config_t led_config = {kGPIO_DigitalOutput, 0};
-  GPIO_PinInit(LED_GPIO, LED_PIN, &led_config);
-  PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio);
-
-#ifdef BUTTON_PIN
-  gpio_pin_config_t button_config = {kGPIO_DigitalInput, 0};
-  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
-  const port_pin_config_t BUTTON_CFG = {
-      kPORT_PullUp,
-      kPORT_FastSlewRate,
-      kPORT_PassiveFilterDisable,
-#if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
-      kPORT_OpenDrainDisable,
-#endif
-      kPORT_LowDriveStrength,
-      kPORT_MuxAsGpio,
-#if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
-      kPORT_UnlockRegister
-#endif
-  };
-  PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
-#endif
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  // 1ms tick timer
-  SysTick_Config(SystemCoreClock / 1000);
-#elif CFG_TUSB_OS == OPT_OS_FREERTOS
-  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
-#endif
-
-  lpuart_config_t uart_config;
-  LPUART_GetDefaultConfig(&uart_config);
-  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
-  uart_config.enableTx = true;
-  uart_config.enableRx = true;
-  LPUART_Init(UART_PORT, &uart_config, UART_CLOCK_SOURCE_HZ);
-
-  // USB
-  CLOCK_EnableUsbfs0Clock(USB_CLOCK_SOURCE, 48000000U);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state) {
-  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
-}
-
-uint32_t board_button_read(void) {
-#ifdef BUTTON_PIN
-  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
-#else
-  return 0;
-#endif
-}
-
-int board_uart_read(uint8_t* buf, int len) {
-#if 0 /*
-	Use this version if want the LED to blink during BOARD=board_test,
-	without having to hit a key.
-      */
-  if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) )
-    {
-      LPUART_ReadBlocking(UART_PORT, buf, len);
-      return len;
-    }
-
-  return( 0 );
-#else /* Wait for 'len' characters to come in */
-
-  LPUART_ReadBlocking(UART_PORT, buf, len);
-  return len;
-
-#endif
-}
-
-int board_uart_write(void const* buf, int len) {
-  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
-  return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-
-void SysTick_Handler(void) {
-  system_ticks++;
-}
-
-uint32_t tusb_time_millis_api(void) {
-  return system_ticks;
-}
-
-#endif
-
-#ifndef __ICCARM__
-// Implement _start() since we use linker flag '-nostartfiles'.
-// Requires defined __STARTUP_CLEAR_BSS,
-extern int main(void);
-
-TU_ATTR_UNUSED void _start(void) {
-  // called by startup code
-  main();
-  while (1) {}
-}
-
-#ifdef __clang__
-void	_exit (int __status) {
-  (void) __status;
-  while (1) {}
-}
-#endif
-
-#endif
diff --git a/hw/bsp/kinetis_k32l2/family.cmake b/hw/bsp/kinetis_k32l2/family.cmake
deleted file mode 100644
index 110335ab2..000000000
--- a/hw/bsp/kinetis_k32l2/family.cmake
+++ /dev/null
@@ -1,97 +0,0 @@
-include_guard()
-
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
-set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
-
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-# toolchain set up
-set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS KINETIS_K32L CACHE INTERNAL "")
-
-
-#------------------------------------
-# Startup & Linker script
-#------------------------------------
-set(LD_FILE_Clang ${LD_FILE_GNU})
-set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
-set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-#------------------------------------
-# Board Target
-#------------------------------------
-function(family_add_board BOARD_TARGET)
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_DIR}/drivers/gpio/fsl_gpio.c
-    ${SDK_DIR}/drivers/lpuart/fsl_lpuart.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
-    ${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    __STARTUP_CLEAR_BSS
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${CMSIS_DIR}/CMSIS/Core/Include
-    ${SDK_DIR}/devices/${MCU_VARIANT}
-    ${SDK_DIR}/devices/${MCU_VARIANT}/drivers
-    ${SDK_DIR}/drivers/common
-    ${SDK_DIR}/drivers/gpio
-    ${SDK_DIR}/drivers/lpuart
-    ${SDK_DIR}/drivers/port
-    ${SDK_DIR}/drivers/smc
-    )
-
-  update_board(${BOARD_TARGET})
-endfunction()
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K32L)
-
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    ${TOP}/src/portable/nxp/khci/dcd_khci.c
-    ${TOP}/src/portable/nxp/khci/hcd_khci.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-    )
-  target_include_directories(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      --specs=nosys.specs --specs=nano.specs
-      -nostartfiles
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--config=${LD_FILE_IAR}"
-      )
-  endif ()
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
-    SKIP_LINTING ON
-    COMPILE_OPTIONS -w)
-
-  # Flashing
-  family_flash_jlink(${TARGET})
-  family_add_bin_hex(${TARGET})
-  family_flash_teensy(${TARGET})
-endfunction()
diff --git a/hw/bsp/kinetis_k32l2/family.mk b/hw/bsp/kinetis_k32l2/family.mk
deleted file mode 100644
index e18348d4d..000000000
--- a/hw/bsp/kinetis_k32l2/family.mk
+++ /dev/null
@@ -1,35 +0,0 @@
-UF2_FAMILY_ID = 0x7f83e793
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
-
-include $(TOP)/$(BOARD_PATH)/board.mk
-CPU_CORE ?= cortex-m0plus
-
-CFLAGS += \
-	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
-
-LDFLAGS_GCC += \
-  -nostartfiles \
-  -specs=nosys.specs -specs=nano.specs
-
-SRC_C += \
-	src/portable/nxp/khci/dcd_khci.c \
-	src/portable/nxp/khci/hcd_khci.c \
-	$(MCU_DIR)/system_$(MCU).c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
-
-INC += \
-	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/project_template \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/gpio \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(SDK_DIR)/drivers/port \
-	$(TOP)/$(SDK_DIR)/drivers/smc \
-
-SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 115120ef7..77c3a593a 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -63,10 +63,13 @@ deps_optional = {
                            'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43'],
     'hw/mcu/nxp/mcuxsdk-core': ['https://github.com/nxp-mcuxpresso/mcuxsdk-core',
                             '0c5c6b16deb211110e06bde896cdff59ab213e16',
-                            'imxrt lpc51 lpc55 mcx'],
+                            'imxrt kinetis_k32l lpc51 lpc55 mcx'],
     'hw/mcu/nxp/mcux-sdk': ['https://github.com/nxp-mcuxpresso/mcux-sdk',
                             'a1bdae309a14ec95a4f64a96d3315a4f89c397c6',
-                            'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x'],
+                            'kinetis_k kinetis_kl lpc54 rw61x'],
+    'hw/mcu/nxp/mcux-devices-kinetis': ['https://github.com/nxp-mcuxpresso/mcux-devices-kinetis',
+                            '98a155e666c54f396e528ec3131f27a5d5b71f76',
+                            'kinetis_k32l'],
     'hw/mcu/nxp/mcux-devices-lpc': ['https://github.com/nxp-mcuxpresso/mcux-devices-lpc',
                             '8096b783ec09d0d1c8629025a5f9d8e7df26e520',
                             'lpc51 lpc55'],
@@ -267,7 +270,7 @@ deps_optional = {
                                'hpmicro'],
     'lib/CMSIS_5': ['https://github.com/ARM-software/CMSIS_5.git',
                     '2b7495b8535bdcb306dac29b9ded4cfb679d7e5c',
-                    'kinetis_k kinetis_k32l2 kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x '
+                    'kinetis_k kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x '
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
                     'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba '
@@ -275,7 +278,7 @@ deps_optional = {
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-                    'imxrt ra stm32n6 lpc51 lpc55 mcx'],
+                    'imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From aa1535a226ef5de12f01e4334e0e6c08ecb3b869 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 12:18:27 +0700
Subject: add support for CH32F20X MCU and update board configuration

---
 .../device/audio_4_channel_mic_freertos/skip.txt   |  1 +
 examples/device/audio_test_freertos/skip.txt       |  1 +
 examples/device/cdc_msc_freertos/skip.txt          |  1 +
 examples/device/hid_composite_freertos/skip.txt    |  1 +
 examples/device/midi_test_freertos/skip.txt        |  1 +
 examples/host/cdc_msc_hid_freertos/skip.txt        |  1 +
 hw/bsp/ch32f20x/boards/ch32f205r-r0/board.cmake    |  7 ++
 hw/bsp/ch32f20x/family.cmake                       | 97 ++++++++++++++++++++++
 test/hil/tinyusb.json                              | 24 +++---
 9 files changed, 122 insertions(+), 12 deletions(-)
 create mode 100644 hw/bsp/ch32f20x/boards/ch32f205r-r0/board.cmake
 create mode 100644 hw/bsp/ch32f20x/family.cmake

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index db01347ed..ded5ee4bc 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -1,3 +1,4 @@
+mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 7463aa86a..be1912a31 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -1,3 +1,4 @@
+mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index d3a096eb0..199cd8ac6 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -1,3 +1,4 @@
+mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 06920db67..62f4a3795 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -1,3 +1,4 @@
+mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index 06920db67..62f4a3795 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -1,3 +1,4 @@
+mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
diff --git a/examples/host/cdc_msc_hid_freertos/skip.txt b/examples/host/cdc_msc_hid_freertos/skip.txt
index 54e7be1ba..74ee436cb 100644
--- a/examples/host/cdc_msc_hid_freertos/skip.txt
+++ b/examples/host/cdc_msc_hid_freertos/skip.txt
@@ -1,2 +1,3 @@
+mcu:CH32F20X
 mcu:RP2040
 board:lpcxpresso54114
diff --git a/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.cmake b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.cmake
new file mode 100644
index 000000000..d2877102d
--- /dev/null
+++ b/hw/bsp/ch32f20x/boards/ch32f205r-r0/board.cmake
@@ -0,0 +1,7 @@
+set(MCU_VARIANT D8C)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CH32F20x_D8C
+    )
+endfunction()
diff --git a/hw/bsp/ch32f20x/family.cmake b/hw/bsp/ch32f20x/family.cmake
new file mode 100644
index 000000000..2027f7bb1
--- /dev/null
+++ b/hw/bsp/ch32f20x/family.cmake
@@ -0,0 +1,97 @@
+include_guard()
+
+set(CH32_FAMILY ch32f20x)
+set(SDK_DIR ${TOP}/hw/mcu/wch/${CH32_FAMILY})
+set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m3 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS CH32F20X CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/ch32f205.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+if (NOT DEFINED STARTUP_FILE_GNU)
+  set(STARTUP_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/startup_gcc_ch32f20x_d8c.s)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/src/${CH32_FAMILY}_gpio.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/src/${CH32_FAMILY}_misc.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/src/${CH32_FAMILY}_rcc.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/src/${CH32_FAMILY}_usart.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_${CH32_FAMILY}.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/inc
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH32F20X)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbhs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_stlink(${TARGET})
+endfunction()
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index e1ba5da57..8de8c7f32 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -76,6 +76,18 @@
                 "args": "-device ATSAMD51J19"
             }
         },
+        {
+            "name": "mimxrt1015_evk",
+            "uid": "DC28F865D2111D228D00B0543A70463C",
+            "tests": {
+                "device": true, "host": false, "dual": false
+            },
+            "flasher": {
+                "name": "jlink",
+                "uid": "000726284213",
+                "args": "-device MIMXRT1015DAF5A"
+            }
+        },
         {
             "name": "mimxrt1064_evk",
             "uid": "BAE96FB95AFA6DBB8F00005002001200",
@@ -233,18 +245,6 @@
                 "args": "-device stm32f769ni"
             }
         },
-        {
-            "name": "mimxrt1015_evk",
-            "uid": "DC28F865D2111D228D00B0543A70463C",
-            "tests": {
-                "device": true, "host": false, "dual": false
-            },
-            "flasher": {
-                "name": "jlink",
-                "uid": "000726284213",
-                "args": "-device MIMXRT1015DAF5A"
-            }
-        },
         {
             "name": "nanoch32v203",
             "uid": "CDAB277B0FBC03E339E339E3",
-- 
cgit v1.3.1


From 9dcd8506c438d25806be183046860cdbf39bb3c3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 14:41:26 +0700
Subject: forgot to add files add cmake support for rx

---
 hw/bsp/family_support.cmake                        |  19 +
 .../kinetis_k32l/FreeRTOSConfig/FreeRTOSConfig.h   | 170 +++++++
 .../kinetis_k32l/boards/frdm_k32l2a4s/board.cmake  |  19 +
 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h   |  96 ++++
 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk  |  18 +
 .../boards/frdm_k32l2a4s/clock_config.c            | 491 +++++++++++++++++++++
 .../boards/frdm_k32l2a4s/clock_config.h            | 164 +++++++
 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake |  19 +
 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h     |  82 ++++
 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk    |  18 +
 .../kinetis_k32l/boards/frdm_k32l2b/clock_config.c | 220 +++++++++
 .../kinetis_k32l/boards/frdm_k32l2b/clock_config.h | 110 +++++
 hw/bsp/kinetis_k32l/boards/kuiic/board.cmake       |  19 +
 hw/bsp/kinetis_k32l/boards/kuiic/board.h           |  69 +++
 hw/bsp/kinetis_k32l/boards/kuiic/board.mk          |  18 +
 hw/bsp/kinetis_k32l/boards/kuiic/clock_config.c    |  39 ++
 hw/bsp/kinetis_k32l/boards/kuiic/clock_config.h    |  14 +
 hw/bsp/kinetis_k32l/boards/kuiic/kuiic.ld          | 216 +++++++++
 hw/bsp/kinetis_k32l/family.c                       | 175 ++++++++
 hw/bsp/kinetis_k32l/family.cmake                   | 107 +++++
 hw/bsp/kinetis_k32l/family.mk                      |  35 ++
 hw/bsp/rx/FreeRTOSConfig/FreeRTOSConfig.h          |   2 +-
 hw/bsp/rx/boards/gr_citrus/board.cmake             |  19 +
 hw/bsp/rx/boards/gr_citrus/board.h                 |  21 +
 hw/bsp/rx/boards/gr_citrus/gr_citrus.c             | 199 +--------
 hw/bsp/rx/boards/gr_citrus/hwinit.c                |  31 --
 hw/bsp/rx/boards/rx65n_target/board.cmake          |  27 ++
 hw/bsp/rx/boards/rx65n_target/board.h              |  28 ++
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c       | 207 +--------
 hw/bsp/rx/family.c                                 | 234 ++++++++++
 hw/bsp/rx/family.cmake                             |  83 ++++
 hw/bsp/rx/family.mk                                |   4 +-
 32 files changed, 2567 insertions(+), 406 deletions(-)
 create mode 100644 hw/bsp/kinetis_k32l/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.c
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.c
 create mode 100644 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/board.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/board.mk
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/clock_config.c
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/clock_config.h
 create mode 100644 hw/bsp/kinetis_k32l/boards/kuiic/kuiic.ld
 create mode 100644 hw/bsp/kinetis_k32l/family.c
 create mode 100644 hw/bsp/kinetis_k32l/family.cmake
 create mode 100644 hw/bsp/kinetis_k32l/family.mk
 create mode 100644 hw/bsp/rx/boards/gr_citrus/board.cmake
 delete mode 100644 hw/bsp/rx/boards/gr_citrus/hwinit.c
 create mode 100644 hw/bsp/rx/boards/rx65n_target/board.cmake
 create mode 100644 hw/bsp/rx/family.c
 create mode 100644 hw/bsp/rx/family.cmake

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 5d21b4f79..8cc2af190 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -846,6 +846,25 @@ function(family_flash_msp430flasher TARGET)
   set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
+function(family_flash_rfp TARGET)
+  if (NOT DEFINED RFP_CLI)
+    set(RFP_CLI rfp-cli)
+  endif ()
+
+  add_custom_target(${TARGET}-rfp
+    DEPENDS ${TARGET}
+    COMMAND ${CMAKE_OBJCOPY} -O srec -I elf32-rx-be-ns $<TARGET_FILE:${TARGET}> $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.mot
+    COMMAND ${RFP_CLI} -device ${RFP_DEVICE} -tool ${RFP_TOOL} -if fine
+      -fo id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
+      -auth id FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF
+      -auto $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.mot
+    VERBATIM
+    )
+
+  set_property(TARGET ${TARGET}-rfp PROPERTY FOLDER ${TARGET}-group)
+endfunction()
+
+
 function(family_flash_uniflash TARGET)
   if (NOT DEFINED DSLITE)
     set(DSLITE dslite.sh)
diff --git a/hw/bsp/kinetis_k32l/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/kinetis_k32l/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..0225abe8d
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,170 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "fsl_device_registers.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#if defined(__ARM_FP) && __ARM_FP >= 4
+  #define configENABLE_FPU                      1
+#else
+  #define configENABLE_FPU                      0
+#endif
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 128 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               2
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#else
+  #define configASSERT( x )
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       2
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY			  ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY	2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY 		          ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY 	        ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif /* __FREERTOS_CONFIG__H */
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
new file mode 100644
index 000000000..d7cafa495
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT K32L2A41A)
+set(MCU_CORE ${MCU_VARIANT})
+
+set(JLINK_DEVICE K32L2A41xxxxA)
+set(PYOCD_TARGET K32L2A)
+
+set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/K32L2A41xxxxA_flash.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2A41VLH1A
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/K32L/periph1
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
new file mode 100644
index 000000000..9e2534307
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.h
@@ -0,0 +1,96 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Freedom K32L2A4S
+   url: https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-K32L2A4S
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "fsl_device_registers.h"
+
+#define USB_CLOCK_SOURCE kCLOCK_IpSrcFircAsync
+
+// LED
+// The Red   LED is on PTE29.
+// The Green LED is on PTC4.
+// The Blue  LED is on PTE31.
+#define LED_PIN_CLOCK         kCLOCK_PortC
+#define LED_GPIO              GPIOC
+#define LED_PORT              PORTC
+#define LED_PIN               4
+#define LED_STATE_ON          0
+
+// SW3 button1
+#define BUTTON_PIN_CLOCK      kCLOCK_PortE
+#define BUTTON_GPIO           GPIOE
+#define BUTTON_PORT           PORTE
+#define BUTTON_PIN            4
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_PORT             LPUART0
+#define UART_PIN_CLOCK        kCLOCK_PortB
+#define UART_PIN_GPIO         GPIOB
+#define UART_PIN_PORT         PORTB
+#define UART_PIN_RX           16u
+#define UART_PIN_TX           17u
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_ScgFircClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /*
+    Enable LPUART0 clock and configure port pins.
+    FIR clock is being used so the USB examples work.
+  */
+  PCC_LPUART0 = 0U;                          /* Clock must be off to set PCS */
+  PCC_LPUART0 = PCC_CLKCFG_PCS(
+      3U);        /* Select the clock. 1:OSCCLK/Bus Clock, 2:Slow IRC, 3: Fast IRC, 6: System PLL */
+  PCC_LPUART0 |= PCC_CLKCFG_CGC(1U);        /* Enable LPUART */
+
+  /* PORTB16 (pin 62) is configured as LPUART0_RX */
+  gpio_pin_config_t const lpuart_config_rx = {kGPIO_DigitalInput, 0};
+  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_RX, &lpuart_config_rx);
+  const port_pin_config_t UART_CFG = {
+      kPORT_PullUp,
+      kPORT_FastSlewRate,
+      kPORT_PassiveFilterDisable,
+      kPORT_OpenDrainDisable,
+      kPORT_LowDriveStrength,
+      kPORT_MuxAsGpio,
+      kPORT_UnlockRegister
+  };
+  PORT_SetPinConfig(UART_PIN_PORT, UART_PIN_RX, &UART_CFG);
+  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_RX, kPORT_MuxAlt3);
+
+  /* PORTB17 (pin 63) is configured as LPUART0_TX */
+  gpio_pin_config_t const lpuart_config_tx = {kGPIO_DigitalOutput, 0};
+  GPIO_PinInit(UART_PIN_GPIO, UART_PIN_TX, &lpuart_config_tx);
+  PORT_SetPinMux(UART_PIN_PORT, UART_PIN_TX, kPORT_MuxAlt3);
+}
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
new file mode 100644
index 000000000..fb3eb2a03
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
@@ -0,0 +1,18 @@
+MCU = K32L2A41A
+
+CFLAGS += -DCPU_K32L2A41VLH1A
+
+# mcu driver cause following warnings
+CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
+
+# All source paths should be relative to the top level.
+LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2A41xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2A
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.c
new file mode 100644
index 000000000..7947faefe
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.c
@@ -0,0 +1,491 @@
+/*
+ * Copyright 2019 ,2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. Call CLOCK_InitXXX() to configure corresponding SCG clock source.
+ *    Note: The clock could not be set when it is being used as system clock.
+ *    In default out of reset, the CPU is clocked from FIRC(IRC48M),
+ *    so before setting FIRC, change to use another available clock source.
+ *
+ * 2. Call CLOCK_SetXtal0Freq() to set XTAL0 frequency based on board settings.
+ *
+ * 3. Call CLOCK_SetXxxModeSysClkConfig() to set SCG mode for Xxx run mode.
+ *    Wait until the system clock source is changed to target source.
+ *
+ * 4. If power mode change is needed, call SMC_SetPowerModeProtection() to allow
+ *    corresponding power mode and SMC_SetPowerModeXxx() to change to Xxx mode.
+ *    Supported run mode and clock restrictions could be found in Reference Manual.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v7.0
+processor: K32L2A41xxxxA
+package_id: K32L2A41VLL1A
+mcu_data: ksdk2_0
+processor_version: 9.0.0
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_smc.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define SCG_CLKOUTCNFG_SIRC                               2U  /*!< SCG CLKOUT clock select: Slow IRC */
+#define SCG_SOSC_DISABLE                                  0U  /*!< System OSC disabled */
+#define SCG_SPLL_DISABLE                                  0U  /*!< System PLL disabled */
+#define SCG_SYS_OSC_CAP_0P                                0U  /*!< Oscillator 0pF capacitor load */
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+//extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ * Code
+ ******************************************************************************/
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : CLOCK_CONFIG_SetScgOutSel
+ * Description   : Set the SCG clock out select (CLKOUTSEL).
+ * Param setting : The selected clock source.
+ *
+ *END**************************************************************************/
+static void CLOCK_CONFIG_SetScgOutSel(uint8_t setting)
+{
+     SCG->CLKOUTCNFG = SCG_CLKOUTCNFG_CLKOUTSEL(setting);
+}
+
+/*FUNCTION**********************************************************************
+ *
+ * Function Name : CLOCK_CONFIG_FircSafeConfig
+ * Description   : This function is used to safely configure FIRC clock.
+ *                 In default out of reset, the CPU is clocked from FIRC(IRC48M).
+ *                 Before setting FIRC, change to use SIRC as system clock,
+ *                 then configure FIRC. After FIRC is set, change back to use FIRC
+ *                 in case SIRC need to be configured.
+ * Param fircConfig  : FIRC configuration.
+ *
+ *END**************************************************************************/
+static void CLOCK_CONFIG_FircSafeConfig(const scg_firc_config_t *fircConfig)
+{
+    scg_sys_clk_config_t curConfig;
+    const scg_sirc_config_t scgSircConfig = {.enableMode = kSCG_SircEnable,
+                                             .div1 = kSCG_AsyncClkDisable,
+                                             .div3 = kSCG_AsyncClkDivBy2,
+                                             .range = kSCG_SircRangeHigh};
+    scg_sys_clk_config_t sysClkSafeConfigSource = {
+         .divSlow = kSCG_SysClkDivBy4, /* Slow clock divider */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+         .reserved1 = 0,
+         .reserved2 = 0,
+         .reserved3 = 0,
+#endif
+         .divCore = kSCG_SysClkDivBy1, /* Core clock divider */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+         .reserved4 = 0,
+#endif
+         .src = kSCG_SysClkSrcSirc,    /* System clock source */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+         .reserved5 = 0,
+#endif
+    };
+    /* Init Sirc. */
+    CLOCK_InitSirc(&scgSircConfig);
+    /* Change to use SIRC as system clock source to prepare to change FIRCCFG register. */
+    CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);
+    /* Wait for clock source switch finished. */
+    do
+    {
+         CLOCK_GetCurSysClkConfig(&curConfig);
+    } while (curConfig.src != sysClkSafeConfigSource.src);
+
+    /* Init Firc. */
+    CLOCK_InitFirc(fircConfig);
+    /* Change back to use FIRC as system clock source in order to configure SIRC if needed. */
+    sysClkSafeConfigSource.src = kSCG_SysClkSrcFirc;
+    CLOCK_SetRunModeSysClkConfig(&sysClkSafeConfigSource);
+    /* Wait for clock source switch finished. */
+    do
+    {
+         CLOCK_GetCurSysClkConfig(&curConfig);
+    } while (curConfig.src != sysClkSafeConfigSource.src);
+}
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: Core_clock.outFreq, value: 48 MHz}
+- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz}
+- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: OSC32KCLK.outFreq, value: 32.768 kHz}
+- {id: SIRCDIV3_CLK.outFreq, value: 4 MHz}
+- {id: SIRC_CLK.outFreq, value: 8 MHz}
+- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz}
+- {id: SOSCER_CLK.outFreq, value: 32.768 kHz}
+- {id: SOSC_CLK.outFreq, value: 32.768 kHz}
+- {id: Slow_clock.outFreq, value: 24 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+settings:
+- {id: SCG.FIRCDIV1.scale, value: '1', locked: true}
+- {id: SCG.FIRCDIV3.scale, value: '1', locked: true}
+- {id: SCG.SIRCDIV3.scale, value: '2', locked: true}
+- {id: SCG.SOSCDIV3.scale, value: '1', locked: true}
+- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
+- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled}
+sources:
+- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN =
+    {
+        .divSlow = kSCG_SysClkDivBy2,             /* Slow Clock Divider: divided by 2 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved1 = 0,
+        .reserved2 = 0,
+        .reserved3 = 0,
+#endif
+        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved4 = 0,
+#endif
+        .src = kSCG_SysClkSrcFirc,                /* Fast IRC is selected as System Clock Source */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved5 = 0,
+#endif
+    };
+const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN =
+    {
+        .freq = 32768U,                           /* System Oscillator frequency: 32768Hz */
+        .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */
+        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 3: divided by 1 */
+        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
+        .workMode = kSCG_SysOscModeOscLowPower,   /* Oscillator low power */
+    };
+const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN =
+    {
+        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
+        .div1 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDivBy2,              /* Slow IRC Clock Divider 3: divided by 2 */
+        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
+    };
+const scg_firc_config_t g_scgFircConfig_BOARD_BootClockRUN =
+    {
+        .enableMode = kSCG_FircEnable,            /* Enable FIRC clock */
+        .div1 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 1: divided by 1 */
+        .div3 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 3: divided by 1 */
+        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
+        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
+    };
+const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockRUN =
+    {
+        .enableMode = SCG_SPLL_DISABLE,           /* System PLL disabled */
+        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 3: Clock output is disabled */
+        .src = kSCG_SysPllSrcSysOsc,              /* System PLL clock source is System OSC */
+        .prediv = 0,                              /* Divided by 1 */
+        .mult = 0,                                /* Multiply Factor is 16 */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    scg_sys_clk_config_t curConfig;
+
+    /* Init SOSC according to board configuration. */
+    CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockRUN);
+    /* Set the XTAL0 frequency based on board settings. */
+    CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockRUN.freq);
+    /* Init FIRC. */
+    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockRUN);
+    /* Init SIRC. */
+    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockRUN);
+    /* Set SCG to FIRC mode. */
+    CLOCK_SetRunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockRUN);
+    /* Wait for clock source switch finished. */
+    do
+    {
+         CLOCK_GetCurSysClkConfig(&curConfig);
+    } while (curConfig.src != g_sysClkConfig_BOARD_BootClockRUN.src);
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockHSRUN **********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockHSRUN
+outputs:
+- {id: CLKOUT.outFreq, value: 8 MHz}
+- {id: Core_clock.outFreq, value: 96 MHz, locked: true, accuracy: '0.001'}
+- {id: FIRCDIV1_CLK.outFreq, value: 48 MHz}
+- {id: FIRCDIV3_CLK.outFreq, value: 48 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: OSC32KCLK.outFreq, value: 32.768 kHz}
+- {id: PLLDIV1_CLK.outFreq, value: 96 MHz}
+- {id: PLLDIV3_CLK.outFreq, value: 96 MHz}
+- {id: SIRCDIV1_CLK.outFreq, value: 8 MHz}
+- {id: SIRCDIV3_CLK.outFreq, value: 8 MHz}
+- {id: SIRC_CLK.outFreq, value: 8 MHz}
+- {id: SOSCDIV1_CLK.outFreq, value: 32.768 kHz}
+- {id: SOSCDIV3_CLK.outFreq, value: 32.768 kHz}
+- {id: SOSCER_CLK.outFreq, value: 32.768 kHz}
+- {id: SOSC_CLK.outFreq, value: 32.768 kHz}
+- {id: Slow_clock.outFreq, value: 24 MHz, locked: true, accuracy: '0.001'}
+- {id: System_clock.outFreq, value: 96 MHz}
+settings:
+- {id: SCGMode, value: SPLL}
+- {id: powerMode, value: HSRUN}
+- {id: CLKOUTConfig, value: 'yes'}
+- {id: SCG.DIVSLOW.scale, value: '4'}
+- {id: SCG.FIRCDIV1.scale, value: '1', locked: true}
+- {id: SCG.FIRCDIV3.scale, value: '1', locked: true}
+- {id: SCG.PREDIV.scale, value: '4'}
+- {id: SCG.SCSSEL.sel, value: SCG.SPLL_DIV2_CLK}
+- {id: SCG.SIRCDIV1.scale, value: '1', locked: true}
+- {id: SCG.SIRCDIV3.scale, value: '1', locked: true}
+- {id: SCG.SOSCDIV1.scale, value: '1', locked: true}
+- {id: SCG.SOSCDIV3.scale, value: '1', locked: true}
+- {id: SCG.SPLLDIV1.scale, value: '1', locked: true}
+- {id: SCG.SPLLDIV3.scale, value: '1', locked: true}
+- {id: SCG.SPLLSRCSEL.sel, value: SCG.FIRC}
+- {id: SCG_SOSCCFG_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: SCG_SOSCCSR_SOSCEN_CFG, value: Enabled}
+- {id: SCG_SOSCCSR_SOSCERCLKEN_CFG, value: Enabled}
+- {id: SCG_SPLLCSR_SPLLEN_CFG, value: Enabled}
+sources:
+- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockHSRUN configuration
+ ******************************************************************************/
+const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN =
+    {
+        .divSlow = kSCG_SysClkDivBy4,             /* Slow Clock Divider: divided by 4 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved1 = 0,
+        .reserved2 = 0,
+        .reserved3 = 0,
+#endif
+        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved4 = 0,
+#endif
+        .src = kSCG_SysClkSrcSysPll,              /* System PLL is selected as System Clock Source */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved5 = 0,
+#endif
+    };
+const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN =
+    {
+        .freq = 32768U,                           /* System Oscillator frequency: 32768Hz */
+        .enableMode = kSCG_SysOscEnable | kSCG_SysOscEnableErClk,/* Enable System OSC clock, Enable OSCERCLK */
+        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 1: divided by 1 */
+        .div3 = kSCG_AsyncClkDivBy1,              /* System OSC Clock Divider 3: divided by 1 */
+        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
+        .workMode = kSCG_SysOscModeOscLowPower,   /* Oscillator low power */
+    };
+const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN =
+    {
+        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
+        .div1 = kSCG_AsyncClkDivBy1,              /* Slow IRC Clock Divider 1: divided by 1 */
+        .div3 = kSCG_AsyncClkDivBy1,              /* Slow IRC Clock Divider 3: divided by 1 */
+        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
+    };
+const scg_firc_config_t g_scgFircConfig_BOARD_BootClockHSRUN =
+    {
+        .enableMode = kSCG_FircEnable,            /* Enable FIRC clock */
+        .div1 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 1: divided by 1 */
+        .div3 = kSCG_AsyncClkDivBy1,              /* Fast IRC Clock Divider 3: divided by 1 */
+        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
+        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
+    };
+const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockHSRUN =
+    {
+        .enableMode = kSCG_SysPllEnable,          /* Enable SPLL clock */
+        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDivBy1,              /* System PLL Clock Divider 1: divided by 1 */
+        .div3 = kSCG_AsyncClkDivBy1,              /* System PLL Clock Divider 3: divided by 1 */
+        .src = kSCG_SysPllSrcFirc,                /* System PLL clock source is Fast IRC */
+        .prediv = 3,                              /* Divided by 4 */
+        .mult = 0,                                /* Multiply Factor is 16 */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockHSRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockHSRUN(void)
+{
+    scg_sys_clk_config_t curConfig;
+
+    /* Init SOSC according to board configuration. */
+    CLOCK_InitSysOsc(&g_scgSysOscConfig_BOARD_BootClockHSRUN);
+    /* Set the XTAL0 frequency based on board settings. */
+    CLOCK_SetXtal0Freq(g_scgSysOscConfig_BOARD_BootClockHSRUN.freq);
+    /* Init FIRC. */
+    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockHSRUN);
+    /* Init SIRC. */
+    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockHSRUN);
+    /* Init SysPll. */
+    CLOCK_InitSysPll(&g_scgSysPllConfig_BOARD_BootClockHSRUN);
+    /* Set HSRUN power mode. */
+    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
+    SMC_SetPowerModeHsrun(SMC);
+    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateHsrun)
+    {
+    }
+
+    /* Set SCG to SPLL mode. */
+    CLOCK_SetHsrunModeSysClkConfig(&g_sysClkConfig_BOARD_BootClockHSRUN);
+    /* Wait for clock source switch finished. */
+    do
+    {
+         CLOCK_GetCurSysClkConfig(&curConfig);
+    } while (curConfig.src != g_sysClkConfig_BOARD_BootClockHSRUN.src);
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKHSRUN_CORE_CLOCK;
+    /* Set SCG CLKOUT selection. */
+    CLOCK_CONFIG_SetScgOutSel(SCG_CLKOUTCNFG_SIRC);
+}
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockVLPR
+outputs:
+- {id: Core_clock.outFreq, value: 8 MHz, locked: true, accuracy: '0.001'}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: SIRC_CLK.outFreq, value: 8 MHz}
+- {id: Slow_clock.outFreq, value: 1 MHz, locked: true, accuracy: '0.001'}
+- {id: System_clock.outFreq, value: 8 MHz}
+settings:
+- {id: SCGMode, value: SIRC}
+- {id: powerMode, value: VLPR}
+- {id: SCG.DIVSLOW.scale, value: '8'}
+- {id: SCG.SCSSEL.sel, value: SCG.SIRC}
+- {id: SCG_FIRCCSR_FIRCLPEN_CFG, value: Enabled}
+sources:
+- {id: SCG.SOSC.outFreq, value: 32.768 kHz, enabled: true}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR =
+    {
+        .divSlow = kSCG_SysClkDivBy8,             /* Slow Clock Divider: divided by 8 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved1 = 0,
+        .reserved2 = 0,
+        .reserved3 = 0,
+#endif
+        .divCore = kSCG_SysClkDivBy1,             /* Core Clock Divider: divided by 1 */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved4 = 0,
+#endif
+        .src = kSCG_SysClkSrcSirc,                /* Slow IRC is selected as System Clock Source */
+#if FSL_CLOCK_DRIVER_VERSION < MAKE_VERSION(2, 1, 1)
+        .reserved5 = 0,
+#endif
+    };
+const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR =
+    {
+        .freq = 0U,                               /* System Oscillator frequency: 0Hz */
+        .enableMode = SCG_SOSC_DISABLE,           /* System OSC disabled */
+        .monitorMode = kSCG_SysOscMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDisable,             /* System OSC Clock Divider 3: Clock output is disabled */
+        .capLoad = SCG_SYS_OSC_CAP_0P,            /* Oscillator capacity load: 0pF */
+        .workMode = kSCG_SysOscModeExt,           /* Use external clock */
+    };
+const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR =
+    {
+        .enableMode = kSCG_SircEnable | kSCG_SircEnableInLowPower,/* Enable SIRC clock, Enable SIRC in low power mode */
+        .div1 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDisable,             /* Slow IRC Clock Divider 3: Clock output is disabled */
+        .range = kSCG_SircRangeHigh,              /* Slow IRC high range clock (8 MHz) */
+    };
+const scg_firc_config_t g_scgFircConfig_BOARD_BootClockVLPR =
+    {
+        .enableMode = kSCG_FircEnable | kSCG_FircEnableInLowPower,/* Enable FIRC clock, Enable FIRC in low power mode */
+        .div1 = kSCG_AsyncClkDisable,             /* Fast IRC Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDisable,             /* Fast IRC Clock Divider 3: Clock output is disabled */
+        .range = kSCG_FircRange48M,               /* Fast IRC is trimmed to 48MHz */
+        .trimConfig = NULL,                       /* Fast IRC Trim disabled */
+    };
+const scg_spll_config_t g_scgSysPllConfig_BOARD_BootClockVLPR =
+    {
+        .enableMode = SCG_SPLL_DISABLE,           /* System PLL disabled */
+        .monitorMode = kSCG_SysPllMonitorDisable, /* Monitor disabled */
+        .div1 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 1: Clock output is disabled */
+        .div3 = kSCG_AsyncClkDisable,             /* System PLL Clock Divider 3: Clock output is disabled */
+        .src = kSCG_SysPllSrcSysOsc,              /* System PLL clock source is System OSC */
+        .prediv = 0,                              /* Divided by 1 */
+        .mult = 0,                                /* Multiply Factor is 16 */
+    };
+/*******************************************************************************
+ * Code for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+void BOARD_BootClockVLPR(void)
+{
+    /* Init FIRC. */
+    CLOCK_CONFIG_FircSafeConfig(&g_scgFircConfig_BOARD_BootClockVLPR);
+    /* Init SIRC. */
+    CLOCK_InitSirc(&g_scgSircConfig_BOARD_BootClockVLPR);
+    /* Allow SMC all power modes. */
+    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
+    /* Set VLPR power mode. */
+    SMC_SetPowerModeVlpr(SMC);
+    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
+    {
+    }
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
+}
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.h
new file mode 100644
index 000000000..c01d5e03c
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/clock_config.h
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2019 ,2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define BOARD_XTAL0_CLK_HZ                            32768U  /*!< Board xtal0 frequency in Hz */
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK              48000000U  /*!< Core clock frequency: 48000000Hz */
+
+/*! @brief SCG set for BOARD_BootClockRUN configuration.
+ */
+extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockRUN;
+/*! @brief System OSC set for BOARD_BootClockRUN configuration.
+ */
+extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockRUN;
+/*! @brief SIRC set for BOARD_BootClockRUN configuration.
+ */
+extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockRUN;
+/*! @brief FIRC set for BOARD_BootClockRUN configuration.
+ */
+extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockRUN;
+extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockRUN;
+/*! @brief Low Power FLL set for BOARD_BootClockRUN configuration.
+ */
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockHSRUN **********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockHSRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKHSRUN_CORE_CLOCK            96000000U  /*!< Core clock frequency: 96000000Hz */
+
+/*! @brief SCG set for BOARD_BootClockHSRUN configuration.
+ */
+extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockHSRUN;
+/*! @brief System OSC set for BOARD_BootClockHSRUN configuration.
+ */
+extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockHSRUN;
+/*! @brief SIRC set for BOARD_BootClockHSRUN configuration.
+ */
+extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockHSRUN;
+/*! @brief FIRC set for BOARD_BootClockHSRUN configuration.
+ */
+extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockHSRUN;
+extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockHSRUN;
+/*! @brief Low Power FLL set for BOARD_BootClockHSRUN configuration.
+ */
+
+/*******************************************************************************
+ * API for BOARD_BootClockHSRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockHSRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK              8000000U  /*!< Core clock frequency: 8000000Hz */
+
+/*! @brief SCG set for BOARD_BootClockVLPR configuration.
+ */
+extern const scg_sys_clk_config_t g_sysClkConfig_BOARD_BootClockVLPR;
+/*! @brief System OSC set for BOARD_BootClockVLPR configuration.
+ */
+extern const scg_sosc_config_t g_scgSysOscConfig_BOARD_BootClockVLPR;
+/*! @brief SIRC set for BOARD_BootClockVLPR configuration.
+ */
+extern const scg_sirc_config_t g_scgSircConfig_BOARD_BootClockVLPR;
+/*! @brief FIRC set for BOARD_BootClockVLPR configuration.
+ */
+extern const scg_firc_config_t g_scgFircConfigBOARD_BootClockVLPR;
+extern const scg_spll_config_t g_scgSysPllConfigBOARD_BootClockVLPR;
+/*! @brief Low Power FLL set for BOARD_BootClockVLPR configuration.
+ */
+
+/*******************************************************************************
+ * API for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockVLPR(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
new file mode 100644
index 000000000..f02230063
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT K32L2B31A)
+set(MCU_CORE ${MCU_VARIANT})
+
+set(JLINK_DEVICE K32L2B31xxxxA)
+set(PYOCD_TARGET K32L2B)
+
+set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/K32L2B31xxxxA_flash.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2B31VLH0A
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/K32L/periph2
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
new file mode 100644
index 000000000..854340d6d
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.h
@@ -0,0 +1,82 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Freedom K32L2B3
+   url: https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "fsl_device_registers.h"
+
+#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
+
+// LED
+#define LED_PIN_CLOCK         kCLOCK_PortD
+#define LED_GPIO              GPIOD
+#define LED_PORT              PORTD
+#define LED_PIN               5
+#define LED_STATE_ON          0
+
+// SW3 button1
+#define BUTTON_PIN_CLOCK      kCLOCK_PortC
+#define BUTTON_GPIO           GPIOC
+#define BUTTON_PORT           PORTC
+#define BUTTON_PIN            3
+#define BUTTON_STATE_ACTIVE   0
+
+// UART
+#define UART_PORT             LPUART0
+#define UART_PIN_CLOCK        kCLOCK_PortA
+#define UART_PIN_PORT         PORTA
+#define UART_PIN_RX           1u
+#define UART_PIN_TX           2u
+#define SOPT5_LPUART0RXSRC_LPUART_RX 0x00u /*!<@brief LPUART0 Receive Data Source Select: LPUART_RX pin */
+#define SOPT5_LPUART0TXSRC_LPUART_TX 0x00u /*!<@brief LPUART0 Transmit Data Source Select: LPUART0_TX pin */
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /* PORTA1 (pin 23) is configured as LPUART0_RX */
+  PORT_SetPinMux(PORTA, 1U, kPORT_MuxAlt2);
+  /* PORTA2 (pin 24) is configured as LPUART0_TX */
+  PORT_SetPinMux(PORTA, 2U, kPORT_MuxAlt2);
+
+  SIM->SOPT5 = ((SIM->SOPT5 &
+                 /* Mask bits to zero which are setting */
+                 (~(SIM_SOPT5_LPUART0TXSRC_MASK | SIM_SOPT5_LPUART0RXSRC_MASK)))
+                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
+                | SIM_SOPT5_LPUART0TXSRC(SOPT5_LPUART0TXSRC_LPUART_TX)
+                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
+                | SIM_SOPT5_LPUART0RXSRC(SOPT5_LPUART0RXSRC_LPUART_RX));
+
+  BOARD_BootClockRUN();
+  SystemCoreClockUpdate();
+  CLOCK_SetLpuart0Clock(1);
+}
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
new file mode 100644
index 000000000..9cf36c500
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
@@ -0,0 +1,18 @@
+MCU = K32L2B31A
+
+CFLAGS += -DCPU_K32L2B31VLH0A
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+# All source paths should be relative to the top level.
+LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2B31xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2B
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.c b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.c
new file mode 100644
index 000000000..86eb42ef8
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.c
@@ -0,0 +1,220 @@
+/*
+ * Copyright 2019 ,2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+/*
+ * How to setup clock using clock driver functions:
+ *
+ * 1. CLOCK_SetSimSafeDivs, to make sure core clock, bus clock, flexbus clock
+ *    and flash clock are in allowed range during clock mode switch.
+ *
+ * 2. Call CLOCK_Osc0Init to setup OSC clock, if it is used in target mode.
+ *
+ * 3. Call CLOCK_SetMcgliteConfig to set MCG_Lite configuration.
+ *
+ * 4. Call CLOCK_SetSimConfig to set the clock configuration in SIM.
+ */
+
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!GlobalInfo
+product: Clocks v7.0
+processor: K32L2B31xxxxA
+package_id: K32L2B31VLH0A
+mcu_data: ksdk2_0
+processor_version: 9.0.0
+board: FRDM-K32L2B
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+#include "fsl_smc.h"
+#include "clock_config.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define OSC_CAP0P                                         0U  /*!< Oscillator 0pF capacitor load */
+#define OSC_ER_CLK_DISABLE                                0U  /*!< Disable external reference clock */
+#define SIM_OSC32KSEL_OSC32KCLK_CLK                       0U  /*!< OSC32KSEL select: OSC32KCLK clock */
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+//extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+void BOARD_InitBootClocks(void)
+{
+    BOARD_BootClockRUN();
+}
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockRUN
+called_from_default_init: true
+outputs:
+- {id: Bus_clock.outFreq, value: 24 MHz}
+- {id: Core_clock.outFreq, value: 48 MHz}
+- {id: Flash_clock.outFreq, value: 24 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: MCGIRCLK.outFreq, value: 8 MHz}
+- {id: MCGPCLK.outFreq, value: 48 MHz}
+- {id: System_clock.outFreq, value: 48 MHz}
+settings:
+- {id: MCGMode, value: HIRC}
+- {id: MCG.CLKS.sel, value: MCG.HIRC}
+- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: MCG_C2_RANGE0_CFG, value: Very_high}
+- {id: MCG_MC_HIRCEN_CFG, value: Enabled}
+- {id: OSC0_CR_ERCLKEN_CFG, value: Enabled}
+- {id: OSC_CR_ERCLKEN_CFG, value: Enabled}
+- {id: SIM.CLKOUTSEL.sel, value: MCG.MCGPCLK}
+- {id: SIM.COPCLKSEL.sel, value: OSC.OSCERCLK}
+- {id: SIM.FLEXIOSRCSEL.sel, value: MCG.MCGPCLK}
+- {id: SIM.LPUART0SRCSEL.sel, value: MCG.MCGPCLK}
+- {id: SIM.LPUART1SRCSEL.sel, value: MCG.MCGPCLK}
+- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
+- {id: SIM.TPMSRCSEL.sel, value: MCG.MCGPCLK}
+- {id: SIM.USBSRCSEL.sel, value: MCG.MCGPCLK}
+sources:
+- {id: MCG.HIRC.outFreq, value: 48 MHz}
+- {id: OSC.OSC.outFreq, value: 32 MHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN =
+    {
+        .outSrc = kMCGLITE_ClkSrcHirc,            /* MCGOUTCLK source is HIRC */
+        .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+        .ircs = kMCGLITE_Lirc8M,                  /* Slow internal reference (LIRC) 8 MHz clock selected */
+        .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
+        .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
+        .hircEnableInNotHircMode = true,          /* HIRC source is enabled */
+    };
+const sim_clock_config_t simConfig_BOARD_BootClockRUN =
+    {
+        .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
+        .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
+    };
+const osc_config_t oscConfig_BOARD_BootClockRUN =
+    {
+        .freq = 0U,                               /* Oscillator frequency: 0Hz */
+        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
+        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
+        .oscerConfig =
+            {
+                .enableMode = kOSC_ErClkEnable,   /* Enable external reference clock, disable external reference clock in STOP mode */
+            }
+    };
+
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+    /* Set the system clock dividers in SIM to safe value. */
+    CLOCK_SetSimSafeDivs();
+    /* Set MCG to HIRC mode. */
+    CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
+    /* Set the clock configuration in SIM module. */
+    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/* clang-format off */
+/* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
+!!Configuration
+name: BOARD_BootClockVLPR
+outputs:
+- {id: Bus_clock.outFreq, value: 1 MHz}
+- {id: Core_clock.outFreq, value: 2 MHz}
+- {id: Flash_clock.outFreq, value: 1 MHz}
+- {id: LPO_clock.outFreq, value: 1 kHz}
+- {id: MCGIRCLK.outFreq, value: 2 MHz}
+- {id: System_clock.outFreq, value: 2 MHz}
+settings:
+- {id: MCGMode, value: LIRC2M}
+- {id: powerMode, value: VLPR}
+- {id: MCG_C2_OSC_MODE_CFG, value: ModeOscLowPower}
+- {id: RTCCLKOUTConfig, value: 'yes'}
+- {id: SIM.OUTDIV4.scale, value: '2', locked: true}
+- {id: SIM.RTCCLKOUTSEL.sel, value: OSC.OSCERCLK}
+sources:
+- {id: MCG.LIRC.outFreq, value: 2 MHz}
+- {id: OSC.OSC.outFreq, value: 32.768 kHz}
+ * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
+/* clang-format on */
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR =
+    {
+        .outSrc = kMCGLITE_ClkSrcLirc,            /* MCGOUTCLK source is LIRC */
+        .irclkEnableMode = kMCGLITE_IrclkEnable,  /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+        .ircs = kMCGLITE_Lirc2M,                  /* Slow internal reference (LIRC) 2 MHz clock selected */
+        .fcrdiv = kMCGLITE_LircDivBy1,            /* Low-frequency Internal Reference Clock Divider: divided by 1 */
+        .lircDiv2 = kMCGLITE_LircDivBy1,          /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
+        .hircEnableInNotHircMode = false,         /* HIRC source is not enabled */
+    };
+const sim_clock_config_t simConfig_BOARD_BootClockVLPR =
+    {
+        .er32kSrc = SIM_OSC32KSEL_OSC32KCLK_CLK,  /* OSC32KSEL select: OSC32KCLK clock */
+        .clkdiv1 = 0x10000U,                      /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
+    };
+const osc_config_t oscConfig_BOARD_BootClockVLPR =
+    {
+        .freq = 0U,                               /* Oscillator frequency: 0Hz */
+        .capLoad = (OSC_CAP0P),                   /* Oscillator capacity load: 0pF */
+        .workMode = kOSC_ModeOscLowPower,         /* Oscillator low power */
+        .oscerConfig =
+            {
+                .enableMode = OSC_ER_CLK_DISABLE, /* Disable external reference clock */
+            }
+    };
+
+/*******************************************************************************
+ * Code for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+void BOARD_BootClockVLPR(void)
+{
+    /* Set the system clock dividers in SIM to safe value. */
+    CLOCK_SetSimSafeDivs();
+    /* Set MCG to LIRC2M mode. */
+    CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockVLPR);
+    /* Set the clock configuration in SIM module. */
+    CLOCK_SetSimConfig(&simConfig_BOARD_BootClockVLPR);
+    /* Set VLPR power mode. */
+    SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
+#if (defined(FSL_FEATURE_SMC_HAS_LPWUI) && FSL_FEATURE_SMC_HAS_LPWUI)
+    SMC_SetPowerModeVlpr(SMC, false);
+#else
+    SMC_SetPowerModeVlpr(SMC);
+#endif
+    while (SMC_GetPowerModeState(SMC) != kSMC_PowerStateVlpr)
+    {
+    }
+    /* Set SystemCoreClock variable. */
+    SystemCoreClock = BOARD_BOOTCLOCKVLPR_CORE_CLOCK;
+}
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.h b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.h
new file mode 100644
index 000000000..37328e7d8
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/clock_config.h
@@ -0,0 +1,110 @@
+/*
+ * Copyright 2019 ,2021 NXP
+ * All rights reserved.
+ *
+ * SPDX-License-Identifier: BSD-3-Clause
+ */
+
+/***********************************************************************************************************************
+ * This file was generated by the MCUXpresso Config Tools. Any manual edits made to this file
+ * will be overwritten if the respective MCUXpresso Config Tools is used to update this file.
+ **********************************************************************************************************************/
+
+#ifndef _CLOCK_CONFIG_H_
+#define _CLOCK_CONFIG_H_
+
+#include "fsl_common.h"
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+
+/*******************************************************************************
+ ************************ BOARD_InitBootClocks function ************************
+ ******************************************************************************/
+
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes default configuration of clocks.
+ *
+ */
+void BOARD_InitBootClocks(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************** Configuration BOARD_BootClockRUN ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK              48000000U  /*!< Core clock frequency: 48000000Hz */
+
+/*! @brief MCG lite set for BOARD_BootClockRUN configuration.
+ */
+extern const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN;
+/*! @brief SIM module set for BOARD_BootClockRUN configuration.
+ */
+extern const sim_clock_config_t simConfig_BOARD_BootClockRUN;
+/*! @brief OSC set for BOARD_BootClockRUN configuration.
+ */
+extern const osc_config_t oscConfig_BOARD_BootClockRUN;
+
+/*******************************************************************************
+ * API for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockRUN(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+/*******************************************************************************
+ ********************* Configuration BOARD_BootClockVLPR ***********************
+ ******************************************************************************/
+/*******************************************************************************
+ * Definitions for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#define BOARD_BOOTCLOCKVLPR_CORE_CLOCK              2000000U  /*!< Core clock frequency: 2000000Hz */
+
+/*! @brief MCG lite set for BOARD_BootClockVLPR configuration.
+ */
+extern const mcglite_config_t mcgliteConfig_BOARD_BootClockVLPR;
+/*! @brief SIM module set for BOARD_BootClockVLPR configuration.
+ */
+extern const sim_clock_config_t simConfig_BOARD_BootClockVLPR;
+/*! @brief OSC set for BOARD_BootClockVLPR configuration.
+ */
+extern const osc_config_t oscConfig_BOARD_BootClockVLPR;
+
+/*******************************************************************************
+ * API for BOARD_BootClockVLPR configuration
+ ******************************************************************************/
+#if defined(__cplusplus)
+extern "C" {
+#endif /* __cplusplus*/
+
+/*!
+ * @brief This function executes configuration of clocks.
+ *
+ */
+void BOARD_BootClockVLPR(void);
+
+#if defined(__cplusplus)
+}
+#endif /* __cplusplus*/
+
+#endif /* _CLOCK_CONFIG_H_ */
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake b/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
new file mode 100644
index 000000000..c99029109
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT K32L2B31A)
+set(MCU_CORE ${MCU_VARIANT})
+
+set(JLINK_DEVICE K32L2B31xxxxA)
+set(PYOCD_TARGET K32L2B)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/kuiic.ld)
+
+function(update_board TARGET)
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/clock_config.c
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    CPU_K32L2B31VLH0A
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${SDK_DIR}/K32L/periph2
+    )
+endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.h b/hw/bsp/kinetis_k32l/boards/kuiic/board.h
new file mode 100644
index 000000000..f5895fc65
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/board.h
@@ -0,0 +1,69 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Kuiic
+   url: https://github.com/nxf58843/kuiic
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#include "fsl_device_registers.h"
+
+#define USB_CLOCK_SOURCE kCLOCK_UsbSrcIrc48M
+
+// LED
+#define LED_PIN_CLOCK         kCLOCK_PortA
+#define LED_GPIO              GPIOA
+#define LED_PORT              PORTA
+#define LED_PIN               2
+#define LED_STATE_ON          1
+
+// UART
+#define UART_PORT             LPUART1
+#define UART_PIN_RX           3u
+#define UART_PIN_TX           0u
+
+#define UART_CLOCK_SOURCE_HZ  CLOCK_GetFreq(kCLOCK_McgIrc48MClk)
+
+static inline void BOARD_InitBootPins(void) {
+  /* PORTC3 is configured as LPUART0_RX */
+  PORT_SetPinMux(PORTC, 3U, kPORT_MuxAlt3);
+  /* PORTA2 (pin 24) is configured as LPUART0_TX */
+  PORT_SetPinMux(PORTE, 0U, kPORT_MuxAlt3);
+
+  SIM->SOPT5 = ((SIM->SOPT5 &
+                 /* Mask bits to zero which are setting */
+                 (~(SIM_SOPT5_LPUART1TXSRC_MASK | SIM_SOPT5_LPUART1RXSRC_MASK)))
+                /* LPUART0 Transmit Data Source Select: LPUART0_TX pin. */
+                | SIM_SOPT5_LPUART1TXSRC(SOPT5_LPUART1TXSRC_LPUART_TX)
+                /* LPUART0 Receive Data Source Select: LPUART_RX pin. */
+                | SIM_SOPT5_LPUART1RXSRC(SOPT5_LPUART1RXSRC_LPUART_RX));
+  CLOCK_SetLpuart1Clock(1);
+}
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
new file mode 100644
index 000000000..2bc5b1e34
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
@@ -0,0 +1,18 @@
+MCU = K32L2B31A
+
+CFLAGS += -DCPU_K32L2B31VLH0A
+
+# mcu driver cause following warnings
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+# All source paths should be relative to the top level.
+LD_FILE = $(BOARD_PATH)/kuiic.ld
+
+# For flash-jlink target
+JLINK_DEVICE = K32L2B31xxxxA
+
+# For flash-pyocd target
+PYOCD_TARGET = K32L2B
+
+# flash using pyocd
+flash: flash-pyocd
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.c b/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.c
new file mode 100644
index 000000000..c1a6d1a8d
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.c
@@ -0,0 +1,39 @@
+#include "clock_config.h"
+#include "fsl_clock.h"
+
+/*******************************************************************************
+ * Variables
+ ******************************************************************************/
+/* System clock frequency. */
+// extern uint32_t SystemCoreClock;
+
+/*******************************************************************************
+ * Variables for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+const mcglite_config_t mcgliteConfig_BOARD_BootClockRUN = {
+    .outSrc          = kMCGLITE_ClkSrcHirc,  /* MCGOUTCLK source is HIRC */
+    .irclkEnableMode = kMCGLITE_IrclkEnable, /* MCGIRCLK enabled, MCGIRCLK disabled in STOP mode */
+    .ircs            = kMCGLITE_Lirc8M,      /* Slow internal reference (LIRC) 8 MHz clock selected */
+    .fcrdiv          = kMCGLITE_LircDivBy1,  /* Low-frequency Internal Reference Clock Divider: divided by 1 */
+    .lircDiv2        = kMCGLITE_LircDivBy1,  /* Second Low-frequency Internal Reference Clock Divider: divided by 1 */
+    .hircEnableInNotHircMode = true,         /* HIRC source is enabled */
+};
+const sim_clock_config_t simConfig_BOARD_BootClockRUN = {
+    .er32kSrc = SIM_OSC32KSEL_LPO_CLK,       /* OSC32KSEL select: LPO clock */
+    .clkdiv1  = 0x10000U,                    /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
+};
+
+/*******************************************************************************
+ * Code for BOARD_BootClockRUN configuration
+ ******************************************************************************/
+void BOARD_BootClockRUN(void)
+{
+  /* Set the system clock dividers in SIM to safe value. */
+  CLOCK_SetSimSafeDivs();
+  /* Set MCG to HIRC mode. */
+  CLOCK_SetMcgliteConfig(&mcgliteConfig_BOARD_BootClockRUN);
+  /* Set the clock configuration in SIM module. */
+  CLOCK_SetSimConfig(&simConfig_BOARD_BootClockRUN);
+  /* Set SystemCoreClock variable. */
+  SystemCoreClock = BOARD_BOOTCLOCKRUN_CORE_CLOCK;
+}
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.h b/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.h
new file mode 100644
index 000000000..920cad98f
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/clock_config.h
@@ -0,0 +1,14 @@
+#ifndef CLOCK_CONFIG_H
+#define CLOCK_CONFIG_H
+
+/*******************************************************************************
+ * Definitions
+ ******************************************************************************/
+#define SIM_OSC32KSEL_LPO_CLK         3U        /*!< OSC32KSEL select: LPO clock */
+#define SOPT5_LPUART1RXSRC_LPUART_RX  0x00u     /*!<@brief LPUART1 Receive Data Source Select: LPUART_RX pin */
+#define SOPT5_LPUART1TXSRC_LPUART_TX  0x00u     /*!<@brief LPUART1 Transmit Data Source Select: LPUART_TX pin */
+#define BOARD_BOOTCLOCKRUN_CORE_CLOCK 48000000U /*!< Core clock frequency: 48000000Hz */
+
+void BOARD_BootClockRUN(void);
+
+#endif
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.ld b/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.ld
new file mode 100644
index 000000000..f478a99c7
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/kuiic.ld
@@ -0,0 +1,216 @@
+/*
+** ###################################################################
+**     Processors:          K32L2B31VFM0A
+**                          K32L2B31VFT0A
+**                          K32L2B31VLH0A
+**                          K32L2B31VMP0A
+**
+**     Compiler:            GNU C Compiler
+**     Reference manual:    K32L2B3xRM, Rev.0, July 2019
+**     Version:             rev. 1.0, 2019-07-30
+**     Build:               b190930
+**
+**     Abstract:
+**         Linker file for the GNU C Compiler
+**
+**     Copyright 2016 Freescale Semiconductor, Inc.
+**     Copyright 2016-2019 NXP
+**     All rights reserved.
+**
+**     SPDX-License-Identifier: BSD-3-Clause
+**
+**     http:                 www.nxp.com
+**     mail:                 support@nxp.com
+**
+** ###################################################################
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE  = DEFINED(__heap_size__)  ? __heap_size__  : 0x0400;
+STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
+
+/* Specify the memory areas */
+MEMORY
+{
+  m_interrupts          (RX)  : ORIGIN = 0x00008000, LENGTH = 0x00000200
+  m_flash_config        (RX)  : ORIGIN = 0x00008400, LENGTH = 0x00000010
+  m_text                (RX)  : ORIGIN = 0x00008410, LENGTH = 0x00037BF0
+  m_data                (RW)  : ORIGIN = 0x1FFFE000, LENGTH = 0x00008000
+}
+
+/* Define output sections */
+SECTIONS
+{
+  /* The startup code goes first into internal flash */
+  .interrupts :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector))     /* Startup code */
+    . = ALIGN(4);
+  } > m_interrupts
+
+  .flash_config :
+  {
+    . = ALIGN(4);
+    KEEP(*(.FlashConfig))    /* Flash Configuration Field (FCF) */
+    . = ALIGN(4);
+  } > m_flash_config
+
+  /* The program code and other data goes into internal flash */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)                 /* .text sections (code) */
+    *(.text*)                /* .text* sections (code) */
+    *(.rodata)               /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)              /* .rodata* sections (constants, strings, etc.) */
+    *(.glue_7)               /* glue arm to thumb code */
+    *(.glue_7t)              /* glue thumb to arm code */
+    *(.eh_frame)
+    KEEP (*(.init))
+    KEEP (*(.fini))
+    . = ALIGN(4);
+  } > m_text
+
+  .ARM.extab :
+  {
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+  } > m_text
+
+  .ARM :
+  {
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+  } > m_text
+
+ .ctors :
+  {
+    __CTOR_LIST__ = .;
+    /* gcc uses crtbegin.o to find the start of
+       the constructors, so we make sure it is
+       first.  Because this is a wildcard, it
+       doesn't matter if the user does not
+       actually link against crtbegin.o; the
+       linker won't look for a file to match a
+       wildcard.  The wildcard also means that it
+       doesn't matter which directory crtbegin.o
+       is in.  */
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    /* We don't want to include the .ctor section from
+       from the crtend.o file until after the sorted ctors.
+       The .ctor section from the crtend file contains the
+       end of ctors marker and it must be last */
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+    __CTOR_END__ = .;
+  } > m_text
+
+  .dtors :
+  {
+    __DTOR_LIST__ = .;
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+    __DTOR_END__ = .;
+  } > m_text
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } > m_text
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } > m_text
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } > m_text
+
+  __etext = .;    /* define a global symbol at end of code */
+  __DATA_ROM = .; /* Symbol is used by startup for data initialization */
+
+  /* reserve MTB memory at the beginning of m_data */
+  .mtb : /* MTB buffer address as defined by the hardware */
+  {
+    . = ALIGN(8);
+    _mtb_start = .;
+    KEEP(*(.mtb_buf)) /* need to KEEP Micro Trace Buffer as not referenced by application */
+    . = ALIGN(8);
+    _mtb_end = .;
+  } > m_data
+
+  .data : AT(__DATA_ROM)
+  {
+    . = ALIGN(4);
+    __DATA_RAM = .;
+    __data_start__ = .;      /* create a global symbol at data start */
+    *(.data)                 /* .data sections */
+    *(.data*)                /* .data* sections */
+    KEEP(*(.jcr*))
+    . = ALIGN(4);
+    __data_end__ = .;        /* define a global symbol at data end */
+  } > m_data
+
+  __DATA_END = __DATA_ROM + (__data_end__ - __data_start__);
+  text_end = ORIGIN(m_text) + LENGTH(m_text);
+  ASSERT(__DATA_END <= text_end, "region m_text overflowed with text and data")
+
+  /* Uninitialized data section */
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    . = ALIGN(4);
+    __START_BSS = .;
+    __bss_start__ = .;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+    . = ALIGN(4);
+    __bss_end__ = .;
+    __END_BSS = .;
+  } > m_data
+
+  .heap :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE(end = .);
+    __HeapBase = .;
+    . += HEAP_SIZE;
+    __HeapLimit = .;
+    __heap_limit = .; /* Add for _sbrk */
+  } > m_data
+
+  .stack :
+  {
+    . = ALIGN(8);
+    . += STACK_SIZE;
+  } > m_data
+
+  /* Initializes stack on the end of block */
+  __StackTop   = ORIGIN(m_data) + LENGTH(m_data);
+  __StackLimit = __StackTop - STACK_SIZE;
+  PROVIDE(__stack = __StackTop);
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+
+  ASSERT(__StackLimit >= __HeapLimit, "region m_data overflowed with stack and heap")
+}
diff --git a/hw/bsp/kinetis_k32l/family.c b/hw/bsp/kinetis_k32l/family.c
new file mode 100644
index 000000000..ec8dc6ecf
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/family.c
@@ -0,0 +1,175 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2018, hathach (tinyusb.org)
+ * Copyright (c) 2020, Koji Kitayama
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: NXP
+*/
+
+#include "fsl_gpio.h"
+#include "fsl_port.h"
+#include "fsl_clock.h"
+#include "fsl_lpuart.h"
+
+#include "clock_config.h"
+#include "bsp/board_api.h"
+#include "board.h"
+
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB0_IRQHandler(void) {
+  tud_int_handler(0);
+}
+
+void board_init(void) {
+  /* Enable port clocks for GPIO pins */
+  CLOCK_EnableClock(kCLOCK_PortA);
+  CLOCK_EnableClock(kCLOCK_PortB);
+  CLOCK_EnableClock(kCLOCK_PortC);
+  CLOCK_EnableClock(kCLOCK_PortD);
+  CLOCK_EnableClock(kCLOCK_PortE);
+
+  BOARD_InitBootPins();
+  BOARD_BootClockRUN();
+  SystemCoreClockUpdate();
+
+  gpio_pin_config_t led_config = {kGPIO_DigitalOutput, 0};
+  GPIO_PinInit(LED_GPIO, LED_PIN, &led_config);
+  PORT_SetPinMux(LED_PORT, LED_PIN, kPORT_MuxAsGpio);
+
+#ifdef BUTTON_PIN
+  gpio_pin_config_t button_config = {kGPIO_DigitalInput, 0};
+  GPIO_PinInit(BUTTON_GPIO, BUTTON_PIN, &button_config);
+  const port_pin_config_t BUTTON_CFG = {
+      kPORT_PullUp,
+      kPORT_FastSlewRate,
+      kPORT_PassiveFilterDisable,
+#if defined(FSL_FEATURE_PORT_HAS_OPEN_DRAIN) && FSL_FEATURE_PORT_HAS_OPEN_DRAIN
+      kPORT_OpenDrainDisable,
+#endif
+      kPORT_LowDriveStrength,
+      kPORT_MuxAsGpio,
+#if defined(FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK) && FSL_FEATURE_PORT_HAS_PIN_CONTROL_LOCK
+      kPORT_UnlockRegister
+#endif
+  };
+  PORT_SetPinConfig(BUTTON_PORT, BUTTON_PIN, &BUTTON_CFG);
+#endif
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+#endif
+
+  lpuart_config_t uart_config;
+  LPUART_GetDefaultConfig(&uart_config);
+  uart_config.baudRate_Bps = CFG_BOARD_UART_BAUDRATE;
+  uart_config.enableTx = true;
+  uart_config.enableRx = true;
+  LPUART_Init(UART_PORT, &uart_config, UART_CLOCK_SOURCE_HZ);
+
+  // USB
+  CLOCK_EnableUsbfs0Clock(USB_CLOCK_SOURCE, 48000000U);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  GPIO_PinWrite(LED_GPIO, LED_PIN, state ? LED_STATE_ON : (1 - LED_STATE_ON));
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  return BUTTON_STATE_ACTIVE == GPIO_PinRead(BUTTON_GPIO, BUTTON_PIN);
+#else
+  return 0;
+#endif
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+#if 0 /*
+	Use this version if want the LED to blink during BOARD=board_test,
+	without having to hit a key.
+      */
+  if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) )
+    {
+      LPUART_ReadBlocking(UART_PORT, buf, len);
+      return len;
+    }
+
+  return( 0 );
+#else /* Wait for 'len' characters to come in */
+
+  LPUART_ReadBlocking(UART_PORT, buf, len);
+  return len;
+
+#endif
+}
+
+int board_uart_write(void const* buf, int len) {
+  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
+  return len;
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+}
+
+uint32_t tusb_time_millis_api(void) {
+  return system_ticks;
+}
+
+#endif
+
+#ifndef __ICCARM__
+// Implement _start() since we use linker flag '-nostartfiles'.
+// Requires defined __STARTUP_CLEAR_BSS,
+extern int main(void);
+
+TU_ATTR_UNUSED void _start(void) {
+  // called by startup code
+  main();
+  while (1) {}
+}
+
+#ifdef __clang__
+void	_exit (int __status) {
+  (void) __status;
+  while (1) {}
+}
+#endif
+
+#endif
diff --git a/hw/bsp/kinetis_k32l/family.cmake b/hw/bsp/kinetis_k32l/family.cmake
new file mode 100644
index 000000000..9de4befd6
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/family.cmake
@@ -0,0 +1,107 @@
+include_guard()
+
+set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-kinetis)
+set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m0plus CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS KINETIS_K32L CACHE INTERNAL "")
+
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+if (NOT DEFINED STARTUP_FILE_GNU)
+  set(STARTUP_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    # driver
+    ${MCUX_DIR}/drivers/gpio/fsl_gpio.c
+    ${MCUX_DIR}/drivers/common/fsl_common_arm.c
+    ${MCUX_DIR}/drivers/lpuart/fsl_lpuart.c
+    # mcu
+    ${SDK_DIR}/K32L/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    ${SDK_DIR}/K32L/${MCU_VARIANT}/drivers/fsl_clock.c
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    __STARTUP_CLEAR_BSS
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMSIS_DIR}/CMSIS/Core/Include
+    ${MCUX_DIR}/drivers/common
+    ${MCUX_DIR}/drivers/gpio
+    ${MCUX_DIR}/drivers/lpuart
+    ${MCUX_DIR}/drivers/port
+    ${MCUX_DIR}/drivers/smc
+    ${SDK_DIR}/K32L/${MCU_VARIANT}
+    ${SDK_DIR}/K32L/${MCU_VARIANT}/drivers
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_KINETIS_K32L)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/nxp/khci/dcd_khci.c
+    ${TOP}/src/portable/nxp/khci/hcd_khci.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      --specs=nosys.specs --specs=nano.specs
+      -nostartfiles
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_flash_jlink(${TARGET})
+  family_add_bin_hex(${TARGET})
+  family_flash_teensy(${TARGET})
+endfunction()
diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l/family.mk
new file mode 100644
index 000000000..e18348d4d
--- /dev/null
+++ b/hw/bsp/kinetis_k32l/family.mk
@@ -0,0 +1,35 @@
+UF2_FAMILY_ID = 0x7f83e793
+SDK_DIR = hw/mcu/nxp/mcux-sdk
+MCU_DIR = $(SDK_DIR)/devices/$(MCU)
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m0plus
+
+CFLAGS += \
+	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
+
+LDFLAGS_GCC += \
+  -nostartfiles \
+  -specs=nosys.specs -specs=nano.specs
+
+SRC_C += \
+	src/portable/nxp/khci/dcd_khci.c \
+	src/portable/nxp/khci/hcd_khci.c \
+	$(MCU_DIR)/system_$(MCU).c \
+	$(MCU_DIR)/drivers/fsl_clock.c \
+	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
+	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
+	$(TOP)/$(MCU_DIR) \
+	$(TOP)/$(MCU_DIR)/project_template \
+	$(TOP)/$(MCU_DIR)/drivers \
+	$(TOP)/$(SDK_DIR)/drivers/common \
+	$(TOP)/$(SDK_DIR)/drivers/gpio \
+	$(TOP)/$(SDK_DIR)/drivers/lpuart \
+	$(TOP)/$(SDK_DIR)/drivers/port \
+	$(TOP)/$(SDK_DIR)/drivers/smc \
+
+SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
diff --git a/hw/bsp/rx/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/rx/FreeRTOSConfig/FreeRTOSConfig.h
index edf0a8433..d9de30099 100644
--- a/hw/bsp/rx/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/rx/FreeRTOSConfig/FreeRTOSConfig.h
@@ -109,7 +109,7 @@ extern uint32_t SystemCoreClock;
 #define INCLUDE_vTaskDelayUntil                1
 #define INCLUDE_vTaskDelay                     1
 #define INCLUDE_xTaskGetSchedulerState         0
-#define INCLUDE_xTaskGetCurrentTaskHandle      0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
 #define INCLUDE_uxTaskGetStackHighWaterMark    0
 #define INCLUDE_xTaskGetIdleTaskHandle         0
 #define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
diff --git a/hw/bsp/rx/boards/gr_citrus/board.cmake b/hw/bsp/rx/boards/gr_citrus/board.cmake
new file mode 100644
index 000000000..d6200e386
--- /dev/null
+++ b/hw/bsp/rx/boards/gr_citrus/board.cmake
@@ -0,0 +1,19 @@
+set(MCU_VARIANT rx63n)
+set(MCU_FAMILY RX63X)
+
+set(CMAKE_SYSTEM_CPU rx610 CACHE INTERNAL "System Processor")
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/r5f5631fd.ld)
+
+set(JLINK_DEVICE R5F5631F)
+set(JLINK_IF JTAG)
+
+set(BOARD_SOURCES
+  ${CMAKE_CURRENT_LIST_DIR}/gr_citrus.c
+  )
+
+function(update_board TARGET)
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+endfunction()
diff --git a/hw/bsp/rx/boards/gr_citrus/board.h b/hw/bsp/rx/boards/gr_citrus/board.h
index 617d309c3..cc0139e18 100644
--- a/hw/bsp/rx/boards/gr_citrus/board.h
+++ b/hw/bsp/rx/boards/gr_citrus/board.h
@@ -32,10 +32,31 @@
 #ifndef BOARD_H_
 #define BOARD_H_
 
+#include "iodefine.h"
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
+// LED: PA0, active high
+#define BOARD_LED_WRITE(state)    (PORTA.PODR.BIT.B0 = (state) ? 1 : 0)
+
+// No user button
+#define BOARD_BUTTON_READ()       0
+
+// UART: SCI0
+#define BOARD_UART_SCI            SCI0
+#define BOARD_SCI_TXI_HANDLER     INT_Excep_SCI0_TXI0
+#define BOARD_SCI_TEI_HANDLER     INT_Excep_SCI0_TEI0
+#define BOARD_SCI_RXI_HANDLER     INT_Excep_SCI0_RXI0
+
+// USB interrupt handler
+#define BOARD_USB_IRQ_HANDLER     INT_Excep_USB0_USBI0
+
+// Clocks
+#define BOARD_PCLK                48000000
+#define BOARD_CPUCLK              96000000
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
index e5b24bf69..af8c108d0 100644
--- a/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
+++ b/hw/bsp/rx/boards/gr_citrus/gr_citrus.c
@@ -52,141 +52,63 @@
  * regarding downloading.
  */
 
-#include "bsp/board_api.h"
 #include "iodefine.h"
-#include "interrupt_handlers.h"
-
-#define IRQ_PRIORITY_CMT0     5
-#define IRQ_PRIORITY_USBI0    6
-#define IRQ_PRIORITY_SCI0     5
+#include "board.h"
 
 #define SYSTEM_PRCR_PRC1      (1<<1)
 #define SYSTEM_PRCR_PRKEY     (0xA5u<<8)
-
-#define CMT_PCLK              48000000
-#define CMT_CMCR_CKS_DIV_128  2
-#define CMT_CMCR_CMIE         (1<<6)
 #define MPC_PFS_ISEL          (1<<6)
 
+#define IRQ_PRIORITY_SCI0     5
 #define SCI_PCLK              48000000
-#define SCI_SSR_FER           (1<<4)
-#define SCI_SSR_ORER          (1<<5)
-
-#define SCI_SCR_TEIE          (1u<<2)
-#define SCI_SCR_RE            (1u<<4)
-#define SCI_SCR_TE            (1u<<5)
-#define SCI_SCR_RIE           (1u<<6)
-#define SCI_SCR_TIE           (1u<<7)
-
-//--------------------------------------------------------------------+
-// SCI0 handling
-//--------------------------------------------------------------------+
-typedef struct {
-  uint8_t *buf;
-  uint32_t cnt;
-} sci_buf_t;
-static volatile sci_buf_t sci0_buf[2];
-
-void INT_Excep_SCI0_TXI0(void)
-{
-  uint8_t *buf = sci0_buf[0].buf;
-  uint32_t cnt = sci0_buf[0].cnt;
-
-  if (!buf || !cnt) {
-    SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
-    return;
-  }
-  SCI0.TDR = *buf;
-  if (--cnt) {
-    ++buf;
-  } else {
-    buf = NULL;
-    SCI0.SCR.BIT.TIE  = 0;
-    SCI0.SCR.BIT.TEIE = 1;
-  }
-  sci0_buf[0].buf = buf;
-  sci0_buf[0].cnt = cnt;
-}
-
-void INT_Excep_SCI0_TEI0(void)
-{
-  SCI0.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
-}
-
-void INT_Excep_SCI0_RXI0(void)
-{
-  uint8_t *buf = sci0_buf[1].buf;
-  uint32_t cnt = sci0_buf[1].cnt;
-
-  if (!buf || !cnt ||
-      (SCI0.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
-    sci0_buf[1].buf = NULL;
-    SCI0.SSR.BYTE   = 0;
-    SCI0.SCR.BYTE  &= ~(SCI_SCR_RE | SCI_SCR_RIE);
-    return;
-  }
-  *buf = SCI0.RDR;
-  if (--cnt) {
-    ++buf;
-  } else {
-    buf = NULL;
-    SCI0.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
-  }
-  sci0_buf[1].buf = buf;
-  sci0_buf[1].cnt = cnt;
-}
 
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void INT_Excep_USB0_USBI0(void)
+void HardwareSetup(void)
 {
-  tud_int_handler(0);
+  SYSTEM.PRCR.WORD     = 0xA503u;
+  SYSTEM.SOSCCR.BYTE   = 0x01u;
+  SYSTEM.MOSCWTCR.BYTE = 0x0Du;
+  SYSTEM.PLLWTCR.BYTE  = 0x0Eu;
+  SYSTEM.PLLCR.WORD    = 0x0F00u;
+  SYSTEM.MOSCCR.BYTE   = 0x00u;
+  SYSTEM.PLLCR2.BYTE   = 0x00u;
+  for (unsigned i = 0; i < 2075u; ++i) __asm("nop");
+  SYSTEM.SCKCR.LONG    = 0x21021211u;
+  SYSTEM.SCKCR2.WORD   = 0x0033u;
+  SYSTEM.SCKCR3.WORD   = 0x0400u;
+  SYSTEM.SYSCR0.WORD   = 0x5A01;
+  SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
+  SYSTEM.PRCR.WORD     = 0xA500u;
 }
 
-void board_init(void)
+void board_pin_init(void)
 {
-#if CFG_TUSB_OS == OPT_OS_NONE
-  /* Enable CMT0 */
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(CMT0)       = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  /* Setup 1ms tick timer */
-  CMT0.CMCNT      = 0;
-  CMT0.CMCOR      = CMT_PCLK / 1000 / 128;
-  CMT0.CMCR.WORD  = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
-  IR(CMT0, CMI0)  = 0;
-  IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
-  IEN(CMT0, CMI0) = 1;
-  CMT.CMSTR0.BIT.STR0 = 1;
-#endif
-
   /* Unlock MPC registers */
   MPC.PWPR.BIT.B0WI  = 0;
   MPC.PWPR.BIT.PFSWE = 1;
+
   /* LED PA0 */
   PORTA.PMR.BIT.B0  = 0U;
   PORTA.PODR.BIT.B0 = 0U;
   PORTA.PDR.BIT.B0  = 1U;
+
   /* UART TXD0 => P20, RXD0 => P21 */
   PORT2.PMR.BIT.B0 = 1U;
   PORT2.PCR.BIT.B0 = 1U;
   MPC.P20PFS.BYTE  = 0b01010;
   PORT2.PMR.BIT.B1 = 1U;
   MPC.P21PFS.BYTE  = 0b01010;
+
   /* USB VBUS -> P16 DPUPE -> P14 */
   PORT1.PMR.BIT.B4 = 1U;
   PORT1.PMR.BIT.B6 = 1U;
   MPC.P14PFS.BYTE  = 0b10001;
   MPC.P16PFS.BYTE  = MPC_PFS_ISEL | 0b10001;
   MPC.PFUSB0.BIT.PUPHZS = 1;
+
   /* Lock MPC registers */
   MPC.PWPR.BIT.PFSWE = 0;
   MPC.PWPR.BIT.B0WI  = 1;
 
-  IR(USB0, USBI0)  = 0;
-  IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
-
   /* Enable SCI0 */
   SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
   MSTP(SCI0) = 0;
@@ -201,81 +123,4 @@ void board_init(void)
   IEN(SCI0, RXI0) = 1;
   IEN(SCI0, TXI0) = 1;
   IEN(SCI0, TEI0) = 1;
-
-  /* Enable USB0 */
-  unsigned short oldPRCR = SYSTEM.PRCR.WORD;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | oldPRCR;
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  PORTA.PODR.BIT.B0 = state ? 1 : 0;
-}
-
-uint32_t board_button_read(void)
-{
-  return 0;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  sci0_buf[1].buf = buf;
-  sci0_buf[1].cnt = len;
-  SCI0.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
-  while (SCI0.SCR.BIT.RE) ;
-  return len - sci0_buf[1].cnt;
-}
-
-int board_uart_write(void const *buf, int len)
-{
-  sci0_buf[0].buf = (uint8_t*)(uintptr_t) buf;
-  sci0_buf[0].cnt = len;
-  SCI0.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
-  while (SCI0.SCR.BIT.TE) ;
-  return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void INT_Excep_CMT0_CMI0(void)
-{
-  ++system_ticks;
-}
-
-uint32_t tusb_time_millis_api(void)
-{
-  return system_ticks;
-}
-#else
-uint32_t SystemCoreClock = 96000000;
-#endif
-
-int close(int fd)
-{
-    (void)fd;
-    return -1;
-}
-int fstat(int fd, void *pstat)
-{
-    (void)fd;
-    (void)pstat;
-    return 0;
-}
-off_t lseek(int fd, off_t pos, int whence)
-{
-    (void)fd;
-    (void)pos;
-    (void)whence;
-    return 0;
-}
-int isatty(int fd)
-{
-    (void)fd;
-    return 1;
 }
diff --git a/hw/bsp/rx/boards/gr_citrus/hwinit.c b/hw/bsp/rx/boards/gr_citrus/hwinit.c
deleted file mode 100644
index 8245d7744..000000000
--- a/hw/bsp/rx/boards/gr_citrus/hwinit.c
+++ /dev/null
@@ -1,31 +0,0 @@
-/************************************************************************/
-/*    File Version: V1.00                                               */
-/*    Date Generated: 08/07/2013                                        */
-/************************************************************************/
-
-#include "iodefine.h"
-#ifdef __cplusplus
-extern "C" {
-#endif
-extern void HardwareSetup(void);
-#ifdef __cplusplus
-}
-#endif
-
-void HardwareSetup(void)
-{
-    SYSTEM.PRCR.WORD     = 0xA503u;
-    SYSTEM.SOSCCR.BYTE   = 0x01u;
-    SYSTEM.MOSCWTCR.BYTE = 0x0Du;
-    SYSTEM.PLLWTCR.BYTE  = 0x0Eu;
-    SYSTEM.PLLCR.WORD    = 0x0F00u;
-    SYSTEM.MOSCCR.BYTE   = 0x00u;
-    SYSTEM.PLLCR2.BYTE   = 0x00u;
-    for (unsigned i = 0; i < 2075u; ++i) __asm("nop");
-    SYSTEM.SCKCR.LONG    = 0x21021211u;
-    SYSTEM.SCKCR2.WORD   = 0x0033u;
-    SYSTEM.SCKCR3.WORD   = 0x0400u;
-    SYSTEM.SYSCR0.WORD   = 0x5A01;
-    SYSTEM.MSTPCRB.BIT.MSTPB15 = 0;
-    SYSTEM.PRCR.WORD     = 0xA500u;
-}
diff --git a/hw/bsp/rx/boards/rx65n_target/board.cmake b/hw/bsp/rx/boards/rx65n_target/board.cmake
new file mode 100644
index 000000000..e365fe8ad
--- /dev/null
+++ b/hw/bsp/rx/boards/rx65n_target/board.cmake
@@ -0,0 +1,27 @@
+set(MCU_VARIANT rx65n)
+set(MCU_FAMILY RX65X)
+
+set(CMAKE_SYSTEM_CPU rx64m CACHE INTERNAL "System Processor")
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/r5f565ne.ld)
+
+set(JLINK_DEVICE R5F565NE)
+set(JLINK_IF JTAG)
+
+set(RFP_DEVICE rx65x)
+set(RFP_TOOL e2l)
+
+set(BOARD_SOURCES
+  ${CMAKE_CURRENT_LIST_DIR}/rx65n_target.c
+  )
+
+function(update_board TARGET)
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+  target_compile_definitions(${TARGET} PUBLIC
+    IR_USB0_USBI0=IR_PERIB_INTB185
+    IER_USB0_USBI0=IER_PERIB_INTB185
+    IEN_USB0_USBI0=IEN_PERIB_INTB185
+    )
+endfunction()
diff --git a/hw/bsp/rx/boards/rx65n_target/board.h b/hw/bsp/rx/boards/rx65n_target/board.h
index 8c8e7b95f..4f1367fbd 100644
--- a/hw/bsp/rx/boards/rx65n_target/board.h
+++ b/hw/bsp/rx/boards/rx65n_target/board.h
@@ -32,10 +32,38 @@
 #ifndef BOARD_H_
 #define BOARD_H_
 
+#include "iodefine.h"
+
 #ifdef __cplusplus
  extern "C" {
 #endif
 
+// LED: PD6, active low (open-drain)
+#define BOARD_LED_WRITE(state)    (PORTD.PODR.BIT.B6 = (state) ? 0 : 1)
+
+// Button: PB1, active low
+#define BOARD_BUTTON_READ()       (PORTB.PIDR.BIT.B1 ? 0 : 1)
+
+// UART: SCI5
+#define BOARD_UART_SCI            SCI5
+#define BOARD_SCI_TXI_HANDLER     INT_Excep_SCI5_TXI5
+#define BOARD_SCI_TEI_HANDLER     INT_Excep_ICU_GROUPBL0  // SCI5 TEI uses group interrupt
+#define BOARD_SCI_RXI_HANDLER     INT_Excep_SCI5_RXI5
+
+// USB interrupt handler (software configurable vector)
+#define IRQ_USB0_USBI0            62
+#define SLIBR_USBI0               SLIBR185
+#define IR_USB0_USBI0             IR_PERIB_INTB185
+#define IER_USB0_USBI0            IER_PERIB_INTB185
+#define IEN_USB0_USBI0            IEN_PERIB_INTB185
+#define IPR_USB0_USBI0            IPR_PERIB_INTB185
+#define INT_Excep_USB0_USBI0      INT_Excep_PERIB_INTB185
+#define BOARD_USB_IRQ_HANDLER     INT_Excep_USB0_USBI0
+
+// Clocks
+#define BOARD_PCLK                60000000
+#define BOARD_CPUCLK              120000000
+
 #ifdef __cplusplus
  }
 #endif
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index d5c2de05a..dbaa9d6fe 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -50,37 +50,15 @@
  * regarding downloading.
  */
 
-#include "bsp/board_api.h"
 #include "iodefine.h"
-#include "interrupt_handlers.h"
-
-#define IRQ_PRIORITY_CMT0     5
-#define IRQ_PRIORITY_USBI0    6
-#define IRQ_PRIORITY_SCI5     5
+#include "board.h"
 
 #define SYSTEM_PRCR_PRC1      (1<<1)
 #define SYSTEM_PRCR_PRKEY     (0xA5u<<8)
-
-#define CMT_PCLK              60000000
-#define CMT_CMCR_CKS_DIV_128  2
-#define CMT_CMCR_CMIE         (1<<6)
 #define MPC_PFS_ISEL          (1<<6)
 
+#define IRQ_PRIORITY_SCI5     5
 #define SCI_PCLK              60000000
-#define SCI_SSR_FER           (1<<4)
-#define SCI_SSR_ORER          (1<<5)
-
-#define SCI_SCR_TEIE          (1u<<2)
-#define SCI_SCR_RE            (1u<<4)
-#define SCI_SCR_TE            (1u<<5)
-#define SCI_SCR_RIE           (1u<<6)
-#define SCI_SCR_TIE           (1u<<7)
-#define INT_Excep_SCI5_TEI5   INT_Excep_ICU_GROUPBL0
-
-#define IRQ_USB0_USBI0        62
-#define SLIBR_USBI0           SLIBR185
-#define IPR_USB0_USBI0        IPR_PERIB_INTB185
-#define INT_Excep_USB0_USBI0  INT_Excep_PERIB_INTB185
 
 void HardwareSetup(void)
 {
@@ -113,118 +91,37 @@ void HardwareSetup(void)
   SYSTEM.PRCR.WORD   = 0xA500u;
 }
 
-//--------------------------------------------------------------------+
-// SCI handling
-//--------------------------------------------------------------------+
-typedef struct {
-  uint8_t *buf;
-  uint32_t cnt;
-} sci_buf_t;
-static volatile sci_buf_t sci_buf[2];
-
-void INT_Excep_SCI5_TXI5(void)
-{
-  uint8_t *buf = sci_buf[0].buf;
-  uint32_t cnt = sci_buf[0].cnt;
-
-  if (!buf || !cnt) {
-    SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
-    return;
-  }
-  SCI5.TDR = *buf;
-  if (--cnt) {
-    ++buf;
-  } else {
-    buf = NULL;
-    SCI5.SCR.BIT.TIE  = 0;
-    SCI5.SCR.BIT.TEIE = 1;
-  }
-  sci_buf[0].buf = buf;
-  sci_buf[0].cnt = cnt;
-}
-
-void INT_Excep_SCI5_TEI5(void)
-{
-  SCI5.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
-}
-
-void INT_Excep_SCI5_RXI5(void)
+void board_pin_init(void)
 {
-  uint8_t *buf = sci_buf[1].buf;
-  uint32_t cnt = sci_buf[1].cnt;
-
-  if (!buf || !cnt ||
-      (SCI5.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
-    sci_buf[1].buf = NULL;
-    SCI5.SSR.BYTE   = 0;
-    SCI5.SCR.BYTE  &= ~(SCI_SCR_RE | SCI_SCR_RIE);
-    return;
-  }
-  *buf = SCI5.RDR;
-  if (--cnt) {
-    ++buf;
-  } else {
-    buf = NULL;
-    SCI5.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
-  }
-  sci_buf[1].buf = buf;
-  sci_buf[1].cnt = cnt;
-}
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-void INT_Excep_USB0_USBI0(void)
-{
-#if CFG_TUH_ENABLED
-  tuh_int_handler(0, true);
-#endif
-#if CFG_TUD_ENABLED
-  tud_int_handler(0);
-#endif
-}
-
-void board_init(void)
-{
-  /* setup software configurable interrupts */
+  /* Setup software configurable interrupts for USB */
   ICU.SLIBR_USBI0.BYTE = IRQ_USB0_USBI0;
   ICU.SLIPRCR.BYTE     = 1;
 
-#if CFG_TUSB_OS == OPT_OS_NONE
-  /* Enable CMT0 */
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(CMT0)       = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
-  /* Setup 1ms tick timer */
-  CMT0.CMCNT      = 0;
-  CMT0.CMCOR      = CMT_PCLK / 1000 / 128;
-  CMT0.CMCR.WORD  = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
-  IR(CMT0, CMI0)  = 0;
-  IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
-  IEN(CMT0, CMI0) = 1;
-  CMT.CMSTR0.BIT.STR0 = 1;
-#endif
-
   /* Unlock MPC registers */
   MPC.PWPR.BIT.B0WI  = 0;
   MPC.PWPR.BIT.PFSWE = 1;
-  // SW PB1
+
+  /* Button PB1 */
   PORTB.PMR.BIT.B1 = 0U;
   PORTB.PDR.BIT.B1 = 0U;
-  // LED PD6
+
+  /* LED PD6 (open-drain, active low) */
   PORTD.PODR.BIT.B6 = 1U;
   PORTD.ODR1.BIT.B4 = 1U;
   PORTD.PMR.BIT.B6  = 0U;
   PORTD.PDR.BIT.B6  = 1U;
+
   /* UART TXD5 => PA4, RXD5 => PA3 */
   PORTA.PMR.BIT.B4 = 1U;
   PORTA.PCR.BIT.B4 = 1U;
   MPC.PA4PFS.BYTE  = 0b01010;
   PORTA.PMR.BIT.B3 = 1U;
   MPC.PA5PFS.BYTE  = 0b01010;
+
   /* USB VBUS -> P16 */
   PORT1.PMR.BIT.B6 = 1U;
   MPC.P16PFS.BYTE  = MPC_PFS_ISEL | 0b10001;
+
   /* Lock MPC registers */
   MPC.PWPR.BIT.PFSWE = 0;
   MPC.PWPR.BIT.B0WI  = 1;
@@ -247,86 +144,4 @@ void board_init(void)
   IEN(SCI5, TXI5)    = 1;
   IEN(ICU,GROUPBL0)  = 1;
   EN(SCI5, TEI5)     = 1;
-
-  /* Enable USB0 */
-  unsigned short oldPRCR = SYSTEM.PRCR.WORD;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
-  MSTP(USB0) = 0;
-  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | oldPRCR;
-
-  /* setup USBI0 interrupt. */
-  IR(USB0, USBI0)  = 0;
-  IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state)
-{
-  PORTD.PODR.BIT.B6 = state ? 0 : 1;
-}
-
-uint32_t board_button_read(void)
-{
-  return PORTB.PIDR.BIT.B1 ? 0 : 1;
-}
-
-int board_uart_read(uint8_t* buf, int len)
-{
-  sci_buf[1].buf = buf;
-  sci_buf[1].cnt = len;
-  SCI5.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
-  // TODO change to non blocking, return -1 immediately if no data
-  while (SCI5.SCR.BIT.RE) ;
-  return len - sci_buf[1].cnt;
-}
-
-int board_uart_write(void const *buf, int len)
-{
-  sci_buf[0].buf = (uint8_t*)(uintptr_t) buf;
-  sci_buf[0].cnt = len;
-  SCI5.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
-  while (SCI5.SCR.BIT.TE) ;
-  return len;
-}
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-void INT_Excep_CMT0_CMI0(void)
-{
-  ++system_ticks;
-}
-
-uint32_t tusb_time_millis_api(void)
-{
-  return system_ticks;
-}
-#else
-uint32_t SystemCoreClock = 120000000;
-#endif
-
-int close(int fd)
-{
-    (void)fd;
-    return -1;
-}
-int fstat(int fd, void *pstat)
-{
-    (void)fd;
-    (void)pstat;
-    return 0;
-}
-off_t lseek(int fd, off_t pos, int whence)
-{
-    (void)fd;
-    (void)pos;
-    (void)whence;
-    return 0;
-}
-int isatty(int fd)
-{
-    (void)fd;
-    return 1;
 }
diff --git a/hw/bsp/rx/family.c b/hw/bsp/rx/family.c
new file mode 100644
index 000000000..5741b44ef
--- /dev/null
+++ b/hw/bsp/rx/family.c
@@ -0,0 +1,234 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Koji Kitayama
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "bsp/board_api.h"
+#include "board.h"
+#include "interrupt_handlers.h"
+
+#define SYSTEM_PRCR_PRC1      (1<<1)
+#define SYSTEM_PRCR_PRKEY     (0xA5u<<8)
+
+#define CMT_CMCR_CKS_DIV_128  2
+#define CMT_CMCR_CMIE         (1<<6)
+
+#define IRQ_PRIORITY_CMT0     5
+#define IRQ_PRIORITY_USBI0    6
+
+#define SCI_SSR_FER           (1<<4)
+#define SCI_SSR_ORER          (1<<5)
+#define SCI_SCR_TEIE          (1u<<2)
+#define SCI_SCR_RE            (1u<<4)
+#define SCI_SCR_TE            (1u<<5)
+#define SCI_SCR_RIE           (1u<<6)
+#define SCI_SCR_TIE           (1u<<7)
+
+// Board-specific pin/peripheral init (implemented per board)
+void board_pin_init(void);
+
+//--------------------------------------------------------------------+
+// SCI UART interrupt handlers
+//--------------------------------------------------------------------+
+typedef struct {
+  uint8_t *buf;
+  uint32_t cnt;
+} sci_buf_t;
+static volatile sci_buf_t sci_buf[2];
+
+void BOARD_SCI_TXI_HANDLER(void)
+{
+  uint8_t *buf = sci_buf[0].buf;
+  uint32_t cnt = sci_buf[0].cnt;
+
+  if (!buf || !cnt) {
+    BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
+    return;
+  }
+  BOARD_UART_SCI.TDR = *buf;
+  if (--cnt) {
+    ++buf;
+  } else {
+    buf = NULL;
+    BOARD_UART_SCI.SCR.BIT.TIE  = 0;
+    BOARD_UART_SCI.SCR.BIT.TEIE = 1;
+  }
+  sci_buf[0].buf = buf;
+  sci_buf[0].cnt = cnt;
+}
+
+void BOARD_SCI_TEI_HANDLER(void)
+{
+  BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_TEIE | SCI_SCR_TE | SCI_SCR_TIE);
+}
+
+void BOARD_SCI_RXI_HANDLER(void)
+{
+  uint8_t *buf = sci_buf[1].buf;
+  uint32_t cnt = sci_buf[1].cnt;
+
+  if (!buf || !cnt ||
+      (BOARD_UART_SCI.SSR.BYTE & (SCI_SSR_FER | SCI_SSR_ORER))) {
+    sci_buf[1].buf = NULL;
+    BOARD_UART_SCI.SSR.BYTE   = 0;
+    BOARD_UART_SCI.SCR.BYTE  &= ~(SCI_SCR_RE | SCI_SCR_RIE);
+    return;
+  }
+  *buf = BOARD_UART_SCI.RDR;
+  if (--cnt) {
+    ++buf;
+  } else {
+    buf = NULL;
+    BOARD_UART_SCI.SCR.BYTE &= ~(SCI_SCR_RE | SCI_SCR_RIE);
+  }
+  sci_buf[1].buf = buf;
+  sci_buf[1].cnt = cnt;
+}
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void BOARD_USB_IRQ_HANDLER(void)
+{
+#if CFG_TUH_ENABLED
+  tuh_int_handler(0, true);
+#endif
+#if CFG_TUD_ENABLED
+  tud_int_handler(0);
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board init
+//--------------------------------------------------------------------+
+void board_init(void)
+{
+#if CFG_TUSB_OS == OPT_OS_NONE
+  /* Enable CMT0 */
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(CMT0)       = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY;
+  /* Setup 1ms tick timer */
+  CMT0.CMCNT      = 0;
+  CMT0.CMCOR      = BOARD_PCLK / 1000 / 128;
+  CMT0.CMCR.WORD  = CMT_CMCR_CMIE | CMT_CMCR_CKS_DIV_128;
+  IR(CMT0, CMI0)  = 0;
+  IPR(CMT0, CMI0) = IRQ_PRIORITY_CMT0;
+  IEN(CMT0, CMI0) = 1;
+  CMT.CMSTR0.BIT.STR0 = 1;
+#endif
+
+  /* Board-specific: pin mux, SCI, USB pin config */
+  board_pin_init();
+
+  /* Enable USB0 module */
+  unsigned short oldPRCR = SYSTEM.PRCR.WORD;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | SYSTEM_PRCR_PRC1;
+  MSTP(USB0) = 0;
+  SYSTEM.PRCR.WORD = SYSTEM_PRCR_PRKEY | oldPRCR;
+
+  /* USB IRQ */
+  IR(USB0, USBI0)  = 0;
+  IPR(USB0, USBI0) = IRQ_PRIORITY_USBI0;
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state)
+{
+  BOARD_LED_WRITE(state);
+}
+
+uint32_t board_button_read(void)
+{
+  return BOARD_BUTTON_READ();
+}
+
+int board_uart_read(uint8_t* buf, int len)
+{
+  sci_buf[1].buf = buf;
+  sci_buf[1].cnt = len;
+  BOARD_UART_SCI.SCR.BYTE |= SCI_SCR_RE | SCI_SCR_RIE;
+  while (BOARD_UART_SCI.SCR.BIT.RE) ;
+  return len - sci_buf[1].cnt;
+}
+
+int board_uart_write(void const *buf, int len)
+{
+  sci_buf[0].buf = (uint8_t*)(uintptr_t) buf;
+  sci_buf[0].cnt = len;
+  BOARD_UART_SCI.SCR.BYTE |= SCI_SCR_TE | SCI_SCR_TIE;
+  while (BOARD_UART_SCI.SCR.BIT.TE) ;
+  return len;
+}
+
+//--------------------------------------------------------------------+
+// Tick timer
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+void INT_Excep_CMT0_CMI0(void)
+{
+  ++system_ticks;
+}
+
+uint32_t tusb_time_millis_api(void)
+{
+  return system_ticks;
+}
+#else
+uint32_t SystemCoreClock = BOARD_CPUCLK;
+#endif
+
+//--------------------------------------------------------------------+
+// Newlib syscall stubs
+//--------------------------------------------------------------------+
+int close(int fd)
+{
+  (void)fd;
+  return -1;
+}
+
+int fstat(int fd, void *pstat)
+{
+  (void)fd;
+  (void)pstat;
+  return 0;
+}
+
+off_t lseek(int fd, off_t pos, int whence)
+{
+  (void)fd;
+  (void)pos;
+  (void)whence;
+  return 0;
+}
+
+int isatty(int fd)
+{
+  (void)fd;
+  return 1;
+}
diff --git a/hw/bsp/rx/family.cmake b/hw/bsp/rx/family.cmake
new file mode 100644
index 000000000..9bb0dcebb
--- /dev/null
+++ b/hw/bsp/rx/family.cmake
@@ -0,0 +1,83 @@
+include_guard()
+
+set(MCU_DIR ${TOP}/hw/mcu/renesas/rx)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/rx_gcc.cmake)
+
+set(FAMILY_MCUS ${MCU_FAMILY} CACHE INTERNAL "")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${MCU_DIR}/${MCU_VARIANT}/vects.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${MCU_DIR}/${MCU_VARIANT}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    SSIZE_MAX=__INT_MAX__
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_${MCU_FAMILY})
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/renesas/rusb2/rusb2_common.c
+    ${TOP}/src/portable/renesas/rusb2/dcd_rusb2.c
+    ${TOP}/src/portable/renesas/rusb2/hcd_rusb2.c
+    ${MCU_DIR}/${MCU_VARIANT}/start.S
+    ${BOARD_SOURCES}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${TARGET} PUBLIC
+      -Wno-error=redundant-decls
+      )
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  endif ()
+
+  set_source_files_properties(${MCU_DIR}/${MCU_VARIANT}/start.S PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Suppress warnings for board-specific and family source files
+  set_source_files_properties(
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${BOARD_SOURCES}
+    PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+  family_flash_rfp(${TARGET})
+endfunction()
diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk
index 4ecf80409..8b23b6c46 100644
--- a/hw/bsp/rx/family.mk
+++ b/hw/bsp/rx/family.mk
@@ -19,7 +19,9 @@ LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
 	src/portable/renesas/rusb2/hcd_rusb2.c \
-	$(MCU_DIR)/vects.c
+	src/portable/renesas/rusb2/rusb2_common.c \
+	$(MCU_DIR)/vects.c \
+	$(FAMILY_PATH)/family.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-- 
cgit v1.3.1


From 8a70453baee2117348a4901735a5999509fb5a69 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 18:11:18 +0700
Subject: fix ci

---
 hw/bsp/kinetis_k32l/family.cmake | 1 -
 1 file changed, 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/kinetis_k32l/family.cmake b/hw/bsp/kinetis_k32l/family.cmake
index 9de4befd6..694017cb4 100644
--- a/hw/bsp/kinetis_k32l/family.cmake
+++ b/hw/bsp/kinetis_k32l/family.cmake
@@ -34,7 +34,6 @@ function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     # driver
     ${MCUX_DIR}/drivers/gpio/fsl_gpio.c
-    ${MCUX_DIR}/drivers/common/fsl_common_arm.c
     ${MCUX_DIR}/drivers/lpuart/fsl_lpuart.c
     # mcu
     ${SDK_DIR}/K32L/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-- 
cgit v1.3.1


From 7ce1e7820451319227b2c1120a2b5e4a63ebf0a9 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 18:11:59 +0700
Subject: actual build make/cmake for ft9xx

---
 docs/reference/boards.rst                          |   2 +-
 docs/reference/dependencies.rst                    |   2 +-
 .../device/audio_4_channel_mic_freertos/skip.txt   |   1 +
 examples/device/audio_test_freertos/skip.txt       |   1 +
 examples/device/cdc_msc_freertos/skip.txt          |   1 +
 examples/device/hid_composite_freertos/skip.txt    |   1 +
 examples/device/midi_test_freertos/skip.txt        |   1 +
 examples/host/cdc_msc_hid_freertos/skip.txt        |   1 +
 hw/bsp/brtmm90x/boards/mm900evxb/board.h           |  87 -------
 hw/bsp/brtmm90x/family.c                           | 260 ---------------------
 hw/bsp/brtmm90x/family.mk                          |  66 ------
 hw/bsp/family_support.cmake                        |  15 ++
 hw/bsp/ft9xx/boards/mm900evxb/board.cmake          |   5 +
 hw/bsp/ft9xx/boards/mm900evxb/board.h              |  87 +++++++
 hw/bsp/ft9xx/boards/mm900evxb/board.mk             |   1 +
 hw/bsp/ft9xx/family.c                              | 260 +++++++++++++++++++++
 hw/bsp/ft9xx/family.cmake                          |  74 ++++++
 hw/bsp/ft9xx/family.mk                             |  75 ++++++
 tools/get_deps.py                                  |   4 +-
 19 files changed, 527 insertions(+), 417 deletions(-)
 delete mode 100644 hw/bsp/brtmm90x/boards/mm900evxb/board.h
 delete mode 100644 hw/bsp/brtmm90x/family.c
 delete mode 100644 hw/bsp/brtmm90x/family.mk
 create mode 100644 hw/bsp/ft9xx/boards/mm900evxb/board.cmake
 create mode 100644 hw/bsp/ft9xx/boards/mm900evxb/board.h
 create mode 100644 hw/bsp/ft9xx/boards/mm900evxb/board.mk
 create mode 100644 hw/bsp/ft9xx/family.c
 create mode 100644 hw/bsp/ft9xx/family.cmake
 create mode 100644 hw/bsp/ft9xx/family.mk

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index eaef078d3..e01ea9d23 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -55,7 +55,7 @@ Bridgetek
 =========  =========  ========  =====================================  ======
 Board      Name       Family    URL                                    Note
 =========  =========  ========  =====================================  ======
-mm900evxb  MM900EVxB  brtmm90x  https://brtchip.com/product/mm900ev1b
+mm900evxb  MM900EVxB  ft9xx     https://brtchip.com/product/mm900ev1b
 =========  =========  ========  =====================================  ======
 
 Espressif
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index 9b61e10a8..16a43f479 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -17,7 +17,7 @@ hw/mcu/artery/at32f423                    https://github.com/ArteryTek/AT32F423_
 hw/mcu/artery/at32f425                    https://github.com/ArteryTek/AT32F425_Firmware_Library.git        620233e1357d5c1b7e2bde6b9dd5196822b91817  at32f425
 hw/mcu/artery/at32f435_437                https://github.com/ArteryTek/AT32F435_437_Firmware_Library.git    25439cc6650a8ae0345934e8707a5f38c7ae41f8  at32f435_437
 hw/mcu/artery/at32f45x                    https://github.com/ArteryTek/AT32F45x_Firmware_Library.git        3d4a1b38be8ebac292e2350ca53bc4bfa4430233  at32f45x
-hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                       91060164afe239fcb394122e8bf9eb24d3194eb1  brtmm90x
+hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                       91060164afe239fcb394122e8bf9eb24d3194eb1  ft9xx
 hw/mcu/broadcom                           https://github.com/adafruit/broadcom-peripherals.git              08370086080759ed54ac1136d62d2ad24c6fa267  broadcom_32bit broadcom_64bit
 hw/mcu/gd/nuclei-sdk                      https://github.com/Nuclei-Software/nuclei-sdk.git                 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7  gd32vf103
 hw/mcu/infineon/mtb-xmclib-cat3           https://github.com/Infineon/mtb-xmclib-cat3.git                   daf5500d03cba23e68c2f241c30af79cd9d63880  xmc4000
diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index ded5ee4bc..be44cb2c0 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -8,6 +8,7 @@ mcu:GD32VF103
 mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
+mcu:FT90X
 mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index be1912a31..007fece53 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -8,6 +8,7 @@ mcu:GD32VF103
 mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
+mcu:FT90X
 mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index 199cd8ac6..31d808d8e 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -8,6 +8,7 @@ mcu:GD32VF103
 mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
+mcu:FT90X
 mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 62f4a3795..8ae238584 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -8,6 +8,7 @@ mcu:GD32VF103
 mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
+mcu:FT90X
 mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index 62f4a3795..8ae238584 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -8,6 +8,7 @@ mcu:GD32VF103
 mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
+mcu:FT90X
 mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
diff --git a/examples/host/cdc_msc_hid_freertos/skip.txt b/examples/host/cdc_msc_hid_freertos/skip.txt
index 74ee436cb..bb62547a6 100644
--- a/examples/host/cdc_msc_hid_freertos/skip.txt
+++ b/examples/host/cdc_msc_hid_freertos/skip.txt
@@ -1,3 +1,4 @@
 mcu:CH32F20X
 mcu:RP2040
 board:lpcxpresso54114
+mcu:FT90X
diff --git a/hw/bsp/brtmm90x/boards/mm900evxb/board.h b/hw/bsp/brtmm90x/boards/mm900evxb/board.h
deleted file mode 100644
index 623033c2c..000000000
--- a/hw/bsp/brtmm90x/boards/mm900evxb/board.h
+++ /dev/null
@@ -1,87 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright 2021 Bridgetek Pte Ltd
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: MM900EVxB
-   url: https://brtchip.com/product/mm900ev1b
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-// Note: This definition file covers all MM900EV1B, MM900EV2B, MM900EV3B,
-// MM900EV-Lite boards.
-// Each of these boards has an FT900 device.
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-// UART to use on this board.
-#ifndef BOARD_UART
-#define BOARD_UART UART0
-#endif
-
-// UART is on connector CN1.
-#ifndef BOARD_GPIO_UART0_TX
-#define BOARD_GPIO_UART0_TX 48 // Pin 4 of CN1.
-#endif
-#ifndef BOARD_GPIO_UART0_RX
-#define BOARD_GPIO_UART0_RX 49 // Pin 6 of CN1.
-#endif
-
-// LED is connected to pins 17 (signal) and 15 (GND) of CN1.
-#ifndef BOARD_GPIO_LED
-#define BOARD_GPIO_LED 35
-#endif
-#ifndef BOARD_GPIO_LED_STATE_ON
-#define BOARD_GPIO_LED_STATE_ON 1
-#endif
-// Button is connected to pins 13 (signal) and 15 (GND) of CN1.
-#ifndef BOARD_GPIO_BUTTON
-#define BOARD_GPIO_BUTTON 56
-#endif
-// Button is pulled up and grounded for active.
-#ifndef BOARD_GPIO_BUTTON_STATE_ACTIVE
-#define BOARD_GPIO_BUTTON_STATE_ACTIVE 0
-#endif
-
-// Enable the Remote Wakeup signalling.
-// Remote wakeup is wired to pin 40 of CN1.
-#ifndef BOARD_GPIO_REMOTE_WAKEUP
-#define BOARD_GPIO_REMOTE_WAKEUP 18
-#endif
-
-// USB VBus signal is connected directly to the FT900.
-#ifndef BOARD_USBD_VBUS_DTC_PIN
-#define BOARD_USBD_VBUS_DTC_PIN 3
-#endif
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
diff --git a/hw/bsp/brtmm90x/family.c b/hw/bsp/brtmm90x/family.c
deleted file mode 100644
index ff24cfe89..000000000
--- a/hw/bsp/brtmm90x/family.c
+++ /dev/null
@@ -1,260 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright 2021 Bridgetek Pte Ltd
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   manufacturer: Bridgetek
-*/
-
-#include "bsp/board_api.h"
-#include "board.h"
-
-#include <ft900.h>
-#include <registers/ft900_registers.h>
-
-#if CFG_TUD_ENABLED
-int8_t board_ft9xx_vbus(void); // Board specific implementation of VBUS detection for USB device.
-extern void ft9xx_usbd_pm_ISR(uint16_t pmcfg); // Interrupt handler for USB device power management
-#endif
-
-#ifdef BOARD_GPIO_REMOTE_WAKEUP
-void gpio_ISR(void);
-#endif
-void timer_ISR(void);
-volatile unsigned int timer_ms = 0;
-void board_pm_ISR(void);
-
-#define WELCOME_MSG "\x1B[2J\x1B[H" \
-                    "MM900EVxB board\r\n"
-
-// Initialize on-board peripherals : led, button, uart and USB
-void board_init(void)
-{
-	sys_reset_all();
-
-    // Enable the UART Device.
-    sys_enable(sys_device_uart0);
-    // Set BOARD_UART GPIO function pins for TXD and RXD.
-#ifdef BOARD_GPIO_UART_TX
-    gpio_function(BOARD_GPIO_UART_TX, pad_uart0_txd); /* UART0 TXD */
-#endif
-#ifdef BOARD_GPIO_UART_RX
-    gpio_function(BOARD_GPIO_UART_RX, pad_uart0_rxd); /* UART0 RXD */
-#endif
-    uart_open(BOARD_UART,                             /* Device */
-              1,                                 /* Prescaler = 1 */
-              UART_DIVIDER_19200_BAUD,           /* Divider = 1302 */
-              uart_data_bits_8,                  /* No. Data Bits */
-              uart_parity_none,                  /* Parity */
-              uart_stop_bits_1);                 /* No. Stop Bits */
-	// Print out a welcome message.
-    // Use sizeof to avoid pulling in strlen unnecessarily.
-    board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG));
-
-#ifdef BOARD_GPIO_LED
-    gpio_function(BOARD_GPIO_LED, pad_func_0);
-    gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA);
-    gpio_dir(BOARD_GPIO_LED, pad_dir_output);
-#endif
-
-#ifdef BOARD_GPIO_BUTTON
-    gpio_function(BOARD_GPIO_BUTTON, pad_func_0);
-    // Pull up if active low. Down if active high.
-    gpio_pull(BOARD_GPIO_BUTTON, (BOARD_GPIO_BUTTON_STATE_ACTIVE == 0)?pad_pull_pullup:pad_pull_pulldown);
-    gpio_dir(BOARD_GPIO_BUTTON, pad_dir_input);
-#endif
-
-	sys_enable(sys_device_timer_wdt);
-	/* Timer A = 1ms */
-	timer_prescaler(timer_select_a, 1000);
-	timer_init(timer_select_a, 100, timer_direction_down, timer_prescaler_select_on, timer_mode_continuous);
-	timer_enable_interrupt(timer_select_a);
-	timer_start(timer_select_a);
-	interrupt_attach(interrupt_timers, (int8_t)interrupt_timers, timer_ISR);
-
-    // Setup VBUS detect GPIO. If the device is connected then this
-    // will set the MASK_SYS_PMCFG_DEV_DETECT_EN bit in PMCFG.
-    gpio_interrupt_disable(BOARD_USBD_VBUS_DTC_PIN);
-    gpio_function(BOARD_USBD_VBUS_DTC_PIN, pad_vbus_dtc);
-    gpio_pull(BOARD_USBD_VBUS_DTC_PIN, pad_pull_pulldown);
-    gpio_dir(BOARD_USBD_VBUS_DTC_PIN, pad_dir_input);
-
-    interrupt_attach(interrupt_0, (int8_t)interrupt_0, board_pm_ISR);
-
-#ifdef BOARD_GPIO_REMOTE_WAKEUP
-    // Configuring GPIO pin to wakeup.
-    // Set up the wakeup pin.
-    gpio_dir(BOARD_GPIO_REMOTE_WAKEUP, pad_dir_input);
-    gpio_pull(BOARD_GPIO_REMOTE_WAKEUP, pad_pull_pullup);
-
-    // Attach an interrupt handler.
-    interrupt_attach(interrupt_gpio, (uint8_t)interrupt_gpio, gpio_ISR);
-    gpio_interrupt_enable(BOARD_GPIO_REMOTE_WAKEUP, gpio_int_edge_falling);
-#endif
-
-	uart_disable_interrupt(BOARD_UART, uart_interrupt_tx);
-	uart_disable_interrupt(BOARD_UART, uart_interrupt_rx);
-
-    // Enable all peripheral interrupts.
-    interrupt_enable_globally();
-
-    TU_LOG1("MM900EV1B board setup complete\r\n");
-};
-
-void timer_ISR(void)
-{
-    if (timer_is_interrupted(timer_select_a))
-    {
-        timer_ms++;
-    }
-}
-
-#ifdef BOARD_GPIO_REMOTE_WAKEUP
-void gpio_ISR(void)
-{
-    if (gpio_is_interrupted(BOARD_GPIO_REMOTE_WAKEUP))
-    {
-    }
-}
-#endif
-
-/* Power management ISR */
-void board_pm_ISR(void)
-{
-    uint16_t pmcfg = SYS->PMCFG_H;
-
-#if defined(__FT930__)
-    if (pmcfg & MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND)
-    {
-        // Clear d2xx hw engine wakeup.
-        SYS->PMCFG_H = MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND;
-    }
-#endif
-    if (pmcfg & MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND)
-    {
-        // Clear GPIO wakeup pending.
-        SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
-    }
-
-#if defined(__FT900__)
-    // USB device power management interrupts.
-    if (pmcfg & (MASK_SYS_PMCFG_DEV_CONN_DEV |
-              MASK_SYS_PMCFG_DEV_DIS_DEV |
-              MASK_SYS_PMCFG_HOST_RST_DEV |
-              MASK_SYS_PMCFG_HOST_RESUME_DEV)
-    )
-    {
-#if CFG_TUD_ENABLED
-        ft9xx_usbd_pm_ISR(pmcfg);
-#endif
-    }
-#endif
-}
-
-#if CFG_TUD_ENABLED
-int8_t board_ft9xx_vbus(void)
-{
-	return gpio_read(BOARD_USBD_VBUS_DTC_PIN);
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-// Turn LED on or off
-void board_led_write(bool state)
-{
-#ifdef BOARD_GPIO_LED
-    gpio_write(BOARD_GPIO_LED, (state == 0)?(BOARD_GPIO_LED_STATE_ON?0:1):BOARD_GPIO_LED_STATE_ON);
-#endif
-}
-
-// Get the current state of button
-// a '1' means active (pressed), a '0' means inactive.
-uint32_t board_button_read(void)
-{
-    uint32_t state = 0;
-#ifdef BOARD_GPIO_BUTTON
-    state = (gpio_read(BOARD_GPIO_BUTTON) == BOARD_GPIO_BUTTON_STATE_ACTIVE)?1:0;
-#endif
-    return state;
-}
-
-// Get characters from UART
-int board_uart_read(uint8_t *buf, int len)
-{
-    int r = 0;
-
-#ifdef BOARD_UART
-    if (uart_rx_has_data(BOARD_UART))
-    {
-        r = uart_readn(BOARD_UART, (uint8_t *)buf, len);
-    }
-#endif
-
-    return r;
-}
-
-// Send characters to UART
-int board_uart_write(void const *buf, int len)
-{
-    int r = 0;
-
-#ifdef BOARD_UART
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wcast-qual" // uart_writen does not have const for buffer parameter.
-    r = uart_writen(BOARD_UART, (uint8_t *)((const void *)buf), len);
-#pragma GCC diagnostic pop
-#endif
-
-    return r;
-}
-
-// Get current milliseconds
-uint32_t tusb_time_millis_api(void)
-{
-    uint32_t safe_ms;
-
-    CRITICAL_SECTION_BEGIN
-    safe_ms = timer_ms;
-    CRITICAL_SECTION_END
-
-    return safe_ms;
-}
-
-// Restart the program
-// Called in the event of a watchdog timeout
-void chip_reboot(void)
-{
-    // SOFT reset
-    __asm__("call 0");
- #if 0
-    // HARD reset
-    // Initiates data transfer from Flash Memory to Data Memory (DBG_CMDF2D3)
-    // followed by a system reboot
- 	dbg_memory_copy(0xfe, 0, 0, 255);
-#endif
-}
diff --git a/hw/bsp/brtmm90x/family.mk b/hw/bsp/brtmm90x/family.mk
deleted file mode 100644
index 2de4dc760..000000000
--- a/hw/bsp/brtmm90x/family.mk
+++ /dev/null
@@ -1,66 +0,0 @@
-# GCC prefix for FT90X compile tools.
-CROSS_COMPILE = ft32-elf-
-SKIP_NANOLIB = 1
-
-# Set to use FT90X prebuilt libraries.
-FT9XX_PREBUILT_LIBS = 0
-ifeq ($(FT9XX_PREBUILT_LIBS),1)
-# If the FT90X toolchain is installed on Windows systems then the SDK
-# include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware
-FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware
-INC += "$(FT9XX_SDK)/include"
-else
-# The submodule BRTSG-FOSS/ft90x-sdk contains header files and source
-# code for the Bridgetek SDK. This can be used instead of the prebuilt
-# library.
-# The SDK can be used to load specific files from the Bridgetek SDK.
-FT9XX_SDK = hw/mcu/bridgetek/ft9xx/ft90x-sdk/Source
-INC += "$(TOP)/$(FT9XX_SDK)/include"
-endif
-
-# Add include files which are within the TinyUSB directory structure.
-INC += \
-	$(TOP)/$(BOARD_PATH)
-
-# Add required C Compiler flags for FT90X.
-CFLAGS += \
-	-D__FT900__ \
-	-fvar-tracking \
-	-fvar-tracking-assignments \
-	-fmessage-length=0 \
-	-ffunction-sections \
-	-DCFG_TUSB_MCU=OPT_MCU_FT90X
-
-# Maximum USB device speed supported by the board
-CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
-
-# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
-CFLAGS += -Wno-error=shadow
-
-# Set Linker flags.
-LD_FILE = hw/mcu/bridgetek/ft9xx/scripts/ldscript.ld
-LDFLAGS += $(addprefix -L,$(LDINC)) \
-	-Xlinker --entry=_start \
-	-Wl,-lc
-
-# Additional Source files for FT90X.
-SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c
-
-# Linker library.
-ifneq ($(FT9XX_PREBUILT_LIBS),1)
-# Optionally add in files from the Bridgetek SDK instead of the prebuilt
-# library. These are the minimum required.
-SRC_C += $(FT9XX_SDK)/src/sys.c
-SRC_C += $(FT9XX_SDK)/src/interrupt.c
-SRC_C += $(FT9XX_SDK)/src/delay.c
-SRC_C += $(FT9XX_SDK)/src/timers.c
-SRC_C += $(FT9XX_SDK)/src/uart_simple.c
-SRC_C += $(FT9XX_SDK)/src/gpio.c
-else
-# Or if using the prebuilt libraries add them.
-LDFLAGS += -L"$(FT9XX_SDK)/lib"
-LIBS += -lft900
-endif
-
-# Not required crt0 file for FT90X. Use compiler built-in file.
-#SRC_S += hw/mcu/bridgetek/ft9xx/scripts/crt0.S
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 8cc2af190..96d6993e6 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -881,6 +881,21 @@ function(family_flash_uniflash TARGET)
   set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
+# Add flash ft9xx target need to remove kernal's ftdi_sio and bind D2XX drivers
+# sudo rmmod ftdi_sio && for i in 0 1 2 3; do sudo sh -c "echo 3-3.4:1.$i > /sys/bus/usb/drivers/ftdi_sio/unbind" 2>/dev/null; done
+function(family_flash_ft9xx TARGET)
+  if (NOT DEFINED FT9XXPROG)
+    set(FT9XXPROG FT9xxProg)
+  endif ()
+
+  add_custom_target(${TARGET}-ft9xx
+    DEPENDS ${TARGET}
+    COMMAND ${FT9XXPROG} -f $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+    )
+
+  set_property(TARGET ${TARGET}-ft9xx PROPERTY FOLDER ${TARGET}-group)
+endfunction()
+
 #----------------------------------
 # Family specific
 #----------------------------------
diff --git a/hw/bsp/ft9xx/boards/mm900evxb/board.cmake b/hw/bsp/ft9xx/boards/mm900evxb/board.cmake
new file mode 100644
index 000000000..49b779de4
--- /dev/null
+++ b/hw/bsp/ft9xx/boards/mm900evxb/board.cmake
@@ -0,0 +1,5 @@
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    __FT900__
+    )
+endfunction()
diff --git a/hw/bsp/ft9xx/boards/mm900evxb/board.h b/hw/bsp/ft9xx/boards/mm900evxb/board.h
new file mode 100644
index 000000000..623033c2c
--- /dev/null
+++ b/hw/bsp/ft9xx/boards/mm900evxb/board.h
@@ -0,0 +1,87 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright 2021 Bridgetek Pte Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: MM900EVxB
+   url: https://brtchip.com/product/mm900ev1b
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+// Note: This definition file covers all MM900EV1B, MM900EV2B, MM900EV3B,
+// MM900EV-Lite boards.
+// Each of these boards has an FT900 device.
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// UART to use on this board.
+#ifndef BOARD_UART
+#define BOARD_UART UART0
+#endif
+
+// UART is on connector CN1.
+#ifndef BOARD_GPIO_UART0_TX
+#define BOARD_GPIO_UART0_TX 48 // Pin 4 of CN1.
+#endif
+#ifndef BOARD_GPIO_UART0_RX
+#define BOARD_GPIO_UART0_RX 49 // Pin 6 of CN1.
+#endif
+
+// LED is connected to pins 17 (signal) and 15 (GND) of CN1.
+#ifndef BOARD_GPIO_LED
+#define BOARD_GPIO_LED 35
+#endif
+#ifndef BOARD_GPIO_LED_STATE_ON
+#define BOARD_GPIO_LED_STATE_ON 1
+#endif
+// Button is connected to pins 13 (signal) and 15 (GND) of CN1.
+#ifndef BOARD_GPIO_BUTTON
+#define BOARD_GPIO_BUTTON 56
+#endif
+// Button is pulled up and grounded for active.
+#ifndef BOARD_GPIO_BUTTON_STATE_ACTIVE
+#define BOARD_GPIO_BUTTON_STATE_ACTIVE 0
+#endif
+
+// Enable the Remote Wakeup signalling.
+// Remote wakeup is wired to pin 40 of CN1.
+#ifndef BOARD_GPIO_REMOTE_WAKEUP
+#define BOARD_GPIO_REMOTE_WAKEUP 18
+#endif
+
+// USB VBus signal is connected directly to the FT900.
+#ifndef BOARD_USBD_VBUS_DTC_PIN
+#define BOARD_USBD_VBUS_DTC_PIN 3
+#endif
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
diff --git a/hw/bsp/ft9xx/boards/mm900evxb/board.mk b/hw/bsp/ft9xx/boards/mm900evxb/board.mk
new file mode 100644
index 000000000..4e22ff2e6
--- /dev/null
+++ b/hw/bsp/ft9xx/boards/mm900evxb/board.mk
@@ -0,0 +1 @@
+CFLAGS += -D__FT900__
diff --git a/hw/bsp/ft9xx/family.c b/hw/bsp/ft9xx/family.c
new file mode 100644
index 000000000..ff24cfe89
--- /dev/null
+++ b/hw/bsp/ft9xx/family.c
@@ -0,0 +1,260 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright 2021 Bridgetek Pte Ltd
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: Bridgetek
+*/
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+#include <ft900.h>
+#include <registers/ft900_registers.h>
+
+#if CFG_TUD_ENABLED
+int8_t board_ft9xx_vbus(void); // Board specific implementation of VBUS detection for USB device.
+extern void ft9xx_usbd_pm_ISR(uint16_t pmcfg); // Interrupt handler for USB device power management
+#endif
+
+#ifdef BOARD_GPIO_REMOTE_WAKEUP
+void gpio_ISR(void);
+#endif
+void timer_ISR(void);
+volatile unsigned int timer_ms = 0;
+void board_pm_ISR(void);
+
+#define WELCOME_MSG "\x1B[2J\x1B[H" \
+                    "MM900EVxB board\r\n"
+
+// Initialize on-board peripherals : led, button, uart and USB
+void board_init(void)
+{
+	sys_reset_all();
+
+    // Enable the UART Device.
+    sys_enable(sys_device_uart0);
+    // Set BOARD_UART GPIO function pins for TXD and RXD.
+#ifdef BOARD_GPIO_UART_TX
+    gpio_function(BOARD_GPIO_UART_TX, pad_uart0_txd); /* UART0 TXD */
+#endif
+#ifdef BOARD_GPIO_UART_RX
+    gpio_function(BOARD_GPIO_UART_RX, pad_uart0_rxd); /* UART0 RXD */
+#endif
+    uart_open(BOARD_UART,                             /* Device */
+              1,                                 /* Prescaler = 1 */
+              UART_DIVIDER_19200_BAUD,           /* Divider = 1302 */
+              uart_data_bits_8,                  /* No. Data Bits */
+              uart_parity_none,                  /* Parity */
+              uart_stop_bits_1);                 /* No. Stop Bits */
+	// Print out a welcome message.
+    // Use sizeof to avoid pulling in strlen unnecessarily.
+    board_uart_write(WELCOME_MSG, sizeof(WELCOME_MSG));
+
+#ifdef BOARD_GPIO_LED
+    gpio_function(BOARD_GPIO_LED, pad_func_0);
+    gpio_idrive(BOARD_GPIO_LED, pad_drive_12mA);
+    gpio_dir(BOARD_GPIO_LED, pad_dir_output);
+#endif
+
+#ifdef BOARD_GPIO_BUTTON
+    gpio_function(BOARD_GPIO_BUTTON, pad_func_0);
+    // Pull up if active low. Down if active high.
+    gpio_pull(BOARD_GPIO_BUTTON, (BOARD_GPIO_BUTTON_STATE_ACTIVE == 0)?pad_pull_pullup:pad_pull_pulldown);
+    gpio_dir(BOARD_GPIO_BUTTON, pad_dir_input);
+#endif
+
+	sys_enable(sys_device_timer_wdt);
+	/* Timer A = 1ms */
+	timer_prescaler(timer_select_a, 1000);
+	timer_init(timer_select_a, 100, timer_direction_down, timer_prescaler_select_on, timer_mode_continuous);
+	timer_enable_interrupt(timer_select_a);
+	timer_start(timer_select_a);
+	interrupt_attach(interrupt_timers, (int8_t)interrupt_timers, timer_ISR);
+
+    // Setup VBUS detect GPIO. If the device is connected then this
+    // will set the MASK_SYS_PMCFG_DEV_DETECT_EN bit in PMCFG.
+    gpio_interrupt_disable(BOARD_USBD_VBUS_DTC_PIN);
+    gpio_function(BOARD_USBD_VBUS_DTC_PIN, pad_vbus_dtc);
+    gpio_pull(BOARD_USBD_VBUS_DTC_PIN, pad_pull_pulldown);
+    gpio_dir(BOARD_USBD_VBUS_DTC_PIN, pad_dir_input);
+
+    interrupt_attach(interrupt_0, (int8_t)interrupt_0, board_pm_ISR);
+
+#ifdef BOARD_GPIO_REMOTE_WAKEUP
+    // Configuring GPIO pin to wakeup.
+    // Set up the wakeup pin.
+    gpio_dir(BOARD_GPIO_REMOTE_WAKEUP, pad_dir_input);
+    gpio_pull(BOARD_GPIO_REMOTE_WAKEUP, pad_pull_pullup);
+
+    // Attach an interrupt handler.
+    interrupt_attach(interrupt_gpio, (uint8_t)interrupt_gpio, gpio_ISR);
+    gpio_interrupt_enable(BOARD_GPIO_REMOTE_WAKEUP, gpio_int_edge_falling);
+#endif
+
+	uart_disable_interrupt(BOARD_UART, uart_interrupt_tx);
+	uart_disable_interrupt(BOARD_UART, uart_interrupt_rx);
+
+    // Enable all peripheral interrupts.
+    interrupt_enable_globally();
+
+    TU_LOG1("MM900EV1B board setup complete\r\n");
+};
+
+void timer_ISR(void)
+{
+    if (timer_is_interrupted(timer_select_a))
+    {
+        timer_ms++;
+    }
+}
+
+#ifdef BOARD_GPIO_REMOTE_WAKEUP
+void gpio_ISR(void)
+{
+    if (gpio_is_interrupted(BOARD_GPIO_REMOTE_WAKEUP))
+    {
+    }
+}
+#endif
+
+/* Power management ISR */
+void board_pm_ISR(void)
+{
+    uint16_t pmcfg = SYS->PMCFG_H;
+
+#if defined(__FT930__)
+    if (pmcfg & MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND)
+    {
+        // Clear d2xx hw engine wakeup.
+        SYS->PMCFG_H = MASK_SYS_PMCFG_SLAVE_PERI_IRQ_PEND;
+    }
+#endif
+    if (pmcfg & MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND)
+    {
+        // Clear GPIO wakeup pending.
+        SYS->PMCFG_H = MASK_SYS_PMCFG_PM_GPIO_IRQ_PEND;
+    }
+
+#if defined(__FT900__)
+    // USB device power management interrupts.
+    if (pmcfg & (MASK_SYS_PMCFG_DEV_CONN_DEV |
+              MASK_SYS_PMCFG_DEV_DIS_DEV |
+              MASK_SYS_PMCFG_HOST_RST_DEV |
+              MASK_SYS_PMCFG_HOST_RESUME_DEV)
+    )
+    {
+#if CFG_TUD_ENABLED
+        ft9xx_usbd_pm_ISR(pmcfg);
+#endif
+    }
+#endif
+}
+
+#if CFG_TUD_ENABLED
+int8_t board_ft9xx_vbus(void)
+{
+	return gpio_read(BOARD_USBD_VBUS_DTC_PIN);
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+// Turn LED on or off
+void board_led_write(bool state)
+{
+#ifdef BOARD_GPIO_LED
+    gpio_write(BOARD_GPIO_LED, (state == 0)?(BOARD_GPIO_LED_STATE_ON?0:1):BOARD_GPIO_LED_STATE_ON);
+#endif
+}
+
+// Get the current state of button
+// a '1' means active (pressed), a '0' means inactive.
+uint32_t board_button_read(void)
+{
+    uint32_t state = 0;
+#ifdef BOARD_GPIO_BUTTON
+    state = (gpio_read(BOARD_GPIO_BUTTON) == BOARD_GPIO_BUTTON_STATE_ACTIVE)?1:0;
+#endif
+    return state;
+}
+
+// Get characters from UART
+int board_uart_read(uint8_t *buf, int len)
+{
+    int r = 0;
+
+#ifdef BOARD_UART
+    if (uart_rx_has_data(BOARD_UART))
+    {
+        r = uart_readn(BOARD_UART, (uint8_t *)buf, len);
+    }
+#endif
+
+    return r;
+}
+
+// Send characters to UART
+int board_uart_write(void const *buf, int len)
+{
+    int r = 0;
+
+#ifdef BOARD_UART
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-qual" // uart_writen does not have const for buffer parameter.
+    r = uart_writen(BOARD_UART, (uint8_t *)((const void *)buf), len);
+#pragma GCC diagnostic pop
+#endif
+
+    return r;
+}
+
+// Get current milliseconds
+uint32_t tusb_time_millis_api(void)
+{
+    uint32_t safe_ms;
+
+    CRITICAL_SECTION_BEGIN
+    safe_ms = timer_ms;
+    CRITICAL_SECTION_END
+
+    return safe_ms;
+}
+
+// Restart the program
+// Called in the event of a watchdog timeout
+void chip_reboot(void)
+{
+    // SOFT reset
+    __asm__("call 0");
+ #if 0
+    // HARD reset
+    // Initiates data transfer from Flash Memory to Data Memory (DBG_CMDF2D3)
+    // followed by a system reboot
+ 	dbg_memory_copy(0xfe, 0, 0, 255);
+#endif
+}
diff --git a/hw/bsp/ft9xx/family.cmake b/hw/bsp/ft9xx/family.cmake
new file mode 100644
index 000000000..31efb3c10
--- /dev/null
+++ b/hw/bsp/ft9xx/family.cmake
@@ -0,0 +1,74 @@
+include_guard()
+
+set(FT9XX_SDK ${TOP}/hw/mcu/bridgetek/ft9xx/ft90x-sdk/Source)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU ft32 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/ft32_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS FT90X CACHE INTERNAL "")
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${FT9XX_SDK}/src/sys.c
+    ${FT9XX_SDK}/src/interrupt.c
+    ${FT9XX_SDK}/src/delay.c
+    ${FT9XX_SDK}/src/timers.c
+    ${FT9XX_SDK}/src/uart_simple.c
+    ${FT9XX_SDK}/src/gpio.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${FT9XX_SDK}/include
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+    )
+  target_compile_options(${BOARD_TARGET} PUBLIC
+    -fmessage-length=0
+    )
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_FT90X)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+    ${FT9XX_SDK}/src/bootstrap.c
+    )
+  set_source_files_properties(${FT9XX_SDK}/src/bootstrap.c PROPERTIES
+    COMPILE_OPTIONS "-w")
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+  target_compile_options(${TARGET} PUBLIC
+    -Wno-error=shadow
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${TOP}/hw/mcu/bridgetek/ft9xx/scripts/ldscript.ld"
+      "LINKER:--entry=_start"
+      )
+  endif ()
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_ft9xx(${TARGET})
+endfunction()
diff --git a/hw/bsp/ft9xx/family.mk b/hw/bsp/ft9xx/family.mk
new file mode 100644
index 000000000..9d71bf321
--- /dev/null
+++ b/hw/bsp/ft9xx/family.mk
@@ -0,0 +1,75 @@
+# GCC prefix for FT90X compile tools.
+CROSS_COMPILE = ft32-elf-
+SKIP_NANOLIB = 1
+
+# Set to use FT90X prebuilt libraries.
+FT9XX_PREBUILT_LIBS = 0
+ifeq ($(FT9XX_PREBUILT_LIBS),1)
+# If the FT90X toolchain is installed on Windows systems then the SDK
+# include files and prebuilt libraries are at: %FT90X_TOOLCHAIN%/hardware
+FT9XX_SDK = $(FT90X_TOOLCHAIN)/hardware
+INC += "$(FT9XX_SDK)/include"
+else
+# The submodule BRTSG-FOSS/ft90x-sdk contains header files and source
+# code for the Bridgetek SDK. This can be used instead of the prebuilt
+# library.
+# The SDK can be used to load specific files from the Bridgetek SDK.
+FT9XX_SDK = hw/mcu/bridgetek/ft9xx/ft90x-sdk/Source
+INC += "$(TOP)/$(FT9XX_SDK)/include"
+endif
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+
+# Add include files which are within the TinyUSB directory structure.
+INC += \
+	$(TOP)/$(BOARD_PATH)
+
+# Add required C Compiler flags for FT9XX.
+CFLAGS += \
+	-fvar-tracking \
+	-fvar-tracking-assignments \
+	-fmessage-length=0 \
+	-ffunction-sections \
+	-DCFG_TUSB_MCU=OPT_MCU_FT90X
+
+# Maximum USB device speed supported by the board
+CFLAGS += -DBOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
+
+# lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
+CFLAGS += -Wno-error=shadow
+
+# Set Linker flags.
+LD_FILE = hw/mcu/bridgetek/ft9xx/scripts/ldscript.ld
+LDFLAGS += $(addprefix -L,$(LDINC)) \
+	-Xlinker --entry=_start \
+	-Wl,-lc
+
+# Additional Source files for FT90X.
+SRC_C += src/portable/bridgetek/ft9xx/dcd_ft9xx.c
+
+# Linker library.
+ifneq ($(FT9XX_PREBUILT_LIBS),1)
+# Optionally add in files from the Bridgetek SDK instead of the prebuilt
+# library. These are the minimum required.
+SRC_C += $(FT9XX_SDK)/src/bootstrap.c
+SRC_C += $(FT9XX_SDK)/src/sys.c
+SRC_C += $(FT9XX_SDK)/src/interrupt.c
+SRC_C += $(FT9XX_SDK)/src/delay.c
+SRC_C += $(FT9XX_SDK)/src/timers.c
+SRC_C += $(FT9XX_SDK)/src/uart_simple.c
+SRC_C += $(FT9XX_SDK)/src/gpio.c
+else
+# Or if using the prebuilt libraries add them.
+LDFLAGS += -L"$(FT9XX_SDK)/lib"
+LIBS += -lft900
+endif
+
+# Not required crt0 file for FT90X. Use compiler built-in file.
+#SRC_S += hw/mcu/bridgetek/ft9xx/scripts/crt0.S
+
+# Flash using FT9xxProg, need to remove kernal's ftdi_sio and bind D2XX drivers
+# sudo rmmod ftdi_sio && for i in 0 1 2 3; do sudo sh -c "echo 3-3.4:1.$i > /sys/bus/usb/drivers/ftdi_sio/unbind" 2>/dev/null; done
+FT9XXPROG ?= FT9xxProg
+flash: flash-ft9xx
+flash-ft9xx: $(BUILD)/$(PROJECT).bin
+	$(FT9XXPROG) -f $<
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 77c3a593a..c4ec5454e 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -35,8 +35,8 @@ deps_optional = {
                              'b20b398d3e5e2007594e54a74ba3d2a2e50ddd75',
                              'maxim'],
     'hw/mcu/bridgetek/ft9xx/ft90x-sdk': ['https://github.com/BRTSG-FOSS/ft90x-sdk.git',
-                                         '91060164afe239fcb394122e8bf9eb24d3194eb1',
-                                         'brtmm90x'],
+                                         '03f74eac84645178fdde7f2e5ca9acdcb7bd9dcd',
+                                         'ft9xx'],
     'hw/mcu/broadcom': ['https://github.com/adafruit/broadcom-peripherals.git',
                         '08370086080759ed54ac1136d62d2ad24c6fa267',
                         'broadcom_32bit broadcom_64bit'],
-- 
cgit v1.3.1


From e2ead60107ce2e1324c7578fcee98efb8f0c5975 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 13 Mar 2026 23:07:46 +0700
Subject: add ft9xx-gcc toolchain support to CI

---
 docs/reference/boards.rst                          | 95 ++++++++++++----------
 docs/reference/dependencies.rst                    | 28 ++++---
 examples/build_system/cmake/cpu/ft32.cmake         | 13 +++
 examples/build_system/cmake/cpu/rx610.cmake        | 12 +++
 examples/build_system/cmake/cpu/rx64m.cmake        | 12 +++
 .../build_system/cmake/toolchain/ft32_gcc.cmake    | 22 +++++
 examples/build_system/cmake/toolchain/rx_gcc.cmake | 26 ++++++
 hw/bsp/hpmicro/boards/hpm6750evk2/board.h          |  5 ++
 8 files changed, 160 insertions(+), 53 deletions(-)
 create mode 100644 examples/build_system/cmake/cpu/ft32.cmake
 create mode 100644 examples/build_system/cmake/cpu/rx610.cmake
 create mode 100644 examples/build_system/cmake/cpu/rx64m.cmake
 create mode 100644 examples/build_system/cmake/toolchain/ft32_gcc.cmake
 create mode 100644 examples/build_system/cmake/toolchain/rx_gcc.cmake

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index e01ea9d23..ef53c66c1 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -90,6 +90,15 @@ Board               Name                Family     URL
 sipeed_longan_nano  Sipeed Longan Nano  gd32vf103  https://longan.sipeed.com/en/
 ==================  ==================  =========  =============================  ======
 
+HPMicro
+-------
+
+===========  ===========  ========  ==========================================================================  ======
+Board        Name         Family    URL                                                                         Note
+===========  ===========  ========  ==========================================================================  ======
+hpm6750evk2  HPM6750EVK2  hpmicro   https://hpm-sdk.readthedocs.io/en/v1.6.0/boards/hpm6750evk2/README_en.html
+===========  ===========  ========  ==========================================================================  ======
+
 Infineon
 --------
 
@@ -149,51 +158,51 @@ mm32f327x_pitaya_lite  DshanMCU Pitaya Lite with MM32F3273G8P  mm32      https:/
 NXP
 ---
 
-==================  =========================================  =============  =========================================================================================================================================================================  ======
-Board               Name                                       Family         URL                                                                                                                                                                        Note
-==================  =========================================  =============  =========================================================================================================================================================================  ======
-metro_m7_1011       Adafruit Metro M7 1011                     imxrt          https://www.adafruit.com/product/5600
-metro_m7_1011_sd    Adafruit Metro M7 1011 SD                  imxrt          https://www.adafruit.com/product/5600
-mimxrt1010_evk      i.MX RT1010 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1010-evaluation-kit:MIMXRT1010-EVK
-mimxrt1015_evk      i.MX RT1015 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1015-EVK
-mimxrt1020_evk      i.MX RT1020 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1020-EVK
-mimxrt1024_evk      i.MX RT1024 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1024-evaluation-kit:MIMXRT1024-EVK
-mimxrt1050_evkb     i.MX RT1050 Evaluation Kit revB            imxrt          https://www.nxp.com/part/IMXRT1050-EVKB
-mimxrt1060_evk      i.MX RT1060 Evaluation Kit revB            imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1060-EVKB
-mimxrt1064_evk      i.MX RT1064 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1064-EVK
-mimxrt1170_evkb     i.MX RT1070 Evaluation Kit                 imxrt          https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1170-evaluation-kit:MIMXRT1170-EVKB
-teensy_40           Teensy 4.0                                 imxrt          https://www.pjrc.com/store/teensy40.html
-teensy_41           Teensy 4.1                                 imxrt          https://www.pjrc.com/store/teensy41.html
-frdm_k64f           Freedom K64F                               kinetis_k      https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-k64-k63-and-k24-mcus:FRDM-K64F
-teensy_35           Teensy 3.5                                 kinetis_k      https://www.pjrc.com/store/teensy35.html
+==================  =========================================  ============  =========================================================================================================================================================================  ======
+Board               Name                                       Family        URL                                                                                                                                                                        Note
+==================  =========================================  ============  =========================================================================================================================================================================  ======
+metro_m7_1011       Adafruit Metro M7 1011                     imxrt         https://www.adafruit.com/product/5600
+mimxrt1010_evk      i.MX RT1010 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1010-evaluation-kit:MIMXRT1010-EVK
+mimxrt1015_evk      i.MX RT1015 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1015-EVK
+mimxrt1020_evk      i.MX RT1020 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1020-EVK
+mimxrt1024_evk      i.MX RT1024 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1024-evaluation-kit:MIMXRT1024-EVK
+mimxrt1050_evkb     i.MX RT1050 Evaluation Kit revB            imxrt         https://www.nxp.com/part/IMXRT1050-EVKB
+mimxrt1060_evk      i.MX RT1060 Evaluation Kit revB            imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1060-EVKB
+mimxrt1064_evk      i.MX RT1064 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/MIMXRT1064-EVK
+mimxrt1170_evkb     i.MX RT1070 Evaluation Kit                 imxrt         https://www.nxp.com/design/design-center/development-boards-and-designs/i-mx-evaluation-and-development-boards/i-mx-rt1170-evaluation-kit:MIMXRT1170-EVKB
+teensy_40           Teensy 4.0                                 imxrt         https://www.pjrc.com/store/teensy40.html
+teensy_41           Teensy 4.1                                 imxrt         https://www.pjrc.com/store/teensy41.html
+frdm_k64f           Freedom K64F                               kinetis_k     https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-k64-k63-and-k24-mcus:FRDM-K64F
+teensy_35           Teensy 3.5                                 kinetis_k     https://www.pjrc.com/store/teensy35.html
 frdm_k32l2a4s       Freedom K32L2A4S                           kinetis_k32l  https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-K32L2A4S
 frdm_k32l2b         Freedom K32L2B3                            kinetis_k32l  https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/nxp-freedom-development-platform-for-k32-l2b-mcus:FRDM-K32L2B3
 kuiic               Kuiic                                      kinetis_k32l  https://github.com/nxf58843/kuiic
-frdm_kl25z          fomu                                       kinetis_kl     https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-kl14-kl15-kl24-kl25-mcus:FRDM-KL25Z
-lpcxpresso11u37     LPCXpresso11U37                            lpc11          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13074
-lpcxpresso11u68     LPCXpresso11U68                            lpc11          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13058
-lpcxpresso1347      LPCXpresso1347                             lpc13          https://www.nxp.com/products/no-longer-manufactured/lpcxpresso-board-for-lpc1347:OM13045
-lpcxpresso1549      LPCXpresso1549                             lpc15          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13056
-lpcxpresso1769      LPCXpresso1769                             lpc17          https://www.nxp.com/design/design-center/development-boards-and-designs/OM13000
-mbed1768            mbed 1768                                  lpc17          https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1700-arm-cortex-m3/arm-mbed-lpc1768-board:OM11043
-lpcxpresso18s37     LPCXpresso18s37                            lpc18          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso18s37-development-board:OM13076
-mcb1800             Keil MCB1800                               lpc18          https://www.keil.com/arm/mcb1800/
-ea4088_quickstart   Embedded Artists LPC4088 QuickStart Board  lpc40          https://www.embeddedartists.com/products/lpc4088-quickstart-board/
-ea4357              Embedded Artists LPC4357 Development Kit   lpc43          https://www.embeddedartists.com/products/lpc4357-developers-kit/
-lpcxpresso43s67     LPCXpresso43S67                            lpc43          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso43s67-development-board:OM13084
-lpcxpresso51u68     LPCXpresso51u68                            lpc51          https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpcxpresso51u68-for-the-lpc51u68-mcus:OM40005
-lpcxpresso54114     LPCXpresso54114                            lpc54          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso54114-board:OM13089
-lpcxpresso54608     LPCXpresso54608                            lpc54          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-development-board-for-lpc5460x-mcus:OM13092
-lpcxpresso54628     LPCXpresso54628                            lpc54          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso54628-development-board:OM13098
-double_m33_express  Double M33 Express                         lpc55          https://www.crowdsupply.com/steiert-solutions/double-m33-express
-lpcxpresso55s28     LPCXpresso55s28                            lpc55          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso55s28-development-board:LPC55S28-EVK
-lpcxpresso55s69     LPCXpresso55s69                            lpc55          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso55s69-development-board:LPC55S69-EVK
-mcu_link            MCU Link                                   lpc55          https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcu-link-debug-probe:MCU-LINK
-frdm_mcxa153        Freedom MCXA153                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA153
-frdm_mcxa156        Freedom MCXA156                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA156
-frdm_mcxn947        Freedom MCXN947                            mcx            https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXN947
-mcxn947brk          MCXN947 Breakout                           mcx            n/a
-==================  =========================================  =============  =========================================================================================================================================================================  ======
+frdm_kl25z          fomu                                       kinetis_kl    https://www.nxp.com/design/design-center/development-boards-and-designs/general-purpose-mcus/freedom-development-platform-for-kinetis-kl14-kl15-kl24-kl25-mcus:FRDM-KL25Z
+lpcxpresso11u37     LPCXpresso11U37                            lpc11         https://www.nxp.com/design/design-center/development-boards-and-designs/OM13074
+lpcxpresso11u68     LPCXpresso11U68                            lpc11         https://www.nxp.com/design/design-center/development-boards-and-designs/OM13058
+lpcxpresso1347      LPCXpresso1347                             lpc13         https://www.nxp.com/products/no-longer-manufactured/lpcxpresso-board-for-lpc1347:OM13045
+lpcxpresso1549      LPCXpresso1549                             lpc15         https://www.nxp.com/design/design-center/development-boards-and-designs/OM13056
+lpcxpresso1769      LPCXpresso1769                             lpc17         https://www.nxp.com/design/design-center/development-boards-and-designs/OM13000
+mbed1768            mbed 1768                                  lpc17         https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpc1700-arm-cortex-m3/arm-mbed-lpc1768-board:OM11043
+lpcxpresso18s37     LPCXpresso18s37                            lpc18         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso18s37-development-board:OM13076
+mcb1800             Keil MCB1800                               lpc18         https://www.keil.com/arm/mcb1800/
+ea4088_quickstart   Embedded Artists LPC4088 QuickStart Board  lpc40         https://www.embeddedartists.com/products/lpc4088-quickstart-board/
+ea4357              Embedded Artists LPC4357 Development Kit   lpc43         https://www.embeddedartists.com/products/lpc4357-developers-kit/
+lpcxpresso43s67     LPCXpresso43S67                            lpc43         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso43s67-development-board:OM13084
+lpcxpresso51u68     LPCXpresso51u68                            lpc51         https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/general-purpose-mcus/lpcxpresso51u68-for-the-lpc51u68-mcus:OM40005
+lpcxpresso54114     LPCXpresso54114                            lpc54         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso54114-board:OM13089
+lpcxpresso54608     LPCXpresso54608                            lpc54         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-development-board-for-lpc5460x-mcus:OM13092
+lpcxpresso54628     LPCXpresso54628                            lpc54         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso54628-development-board:OM13098
+double_m33_express  Double M33 Express                         lpc55         https://www.crowdsupply.com/steiert-solutions/double-m33-express
+lpcxpresso55s28     LPCXpresso55s28                            lpc55         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso55s28-development-board:LPC55S28-EVK
+lpcxpresso55s69     LPCXpresso55s69                            lpc55         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/lpcxpresso-boards/lpcxpresso55s69-development-board:LPC55S69-EVK
+mcu_link            MCU Link                                   lpc55         https://www.nxp.com/design/design-center/software/development-software/mcuxpresso-software-and-tools-/mcu-link-debug-probe:MCU-LINK
+frdm_mcxa153        Freedom MCXA153                            mcx           https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA153
+frdm_mcxa156        Freedom MCXA156                            mcx           https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXA156
+frdm_mcxn947        Freedom MCXN947                            mcx           https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-MCXN947
+mcxn947brk          MCXN947 Breakout                           mcx           n/a
+frdm_rw612          FRDM-RW612                                 rw61x         https://www.nxp.com/design/design-center/development-boards-and-designs/FRDM-RW612
+==================  =========================================  ============  =========================================================================================================================================================================  ======
 
 Nordic Semiconductor
 --------------------
@@ -292,7 +301,7 @@ stm32h723nucleo      STM32 H723 Nucleo                  stm32h7    https://www.s
 stm32h743eval        STM32 H743 Eval                    stm32h7    https://www.st.com/en/evaluation-tools/stm32h743i-eval.html
 stm32h743nucleo      STM32 H743 Nucleo                  stm32h7    https://www.st.com/en/evaluation-tools/nucleo-h743zi.html
 stm32h745disco       STM32 H745 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
-stm32h747disco       STM32 H747 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
+stm32h747disco       STM32 H745 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
 stm32h750_weact      STM32 H750 WeAct                   stm32h7    https://www.adafruit.com/product/5032
 stm32h750bdk         STM32 H750b Discovery Kit          stm32h7    https://www.st.com/en/evaluation-tools/stm32h750b-dk.html
 waveshare_openh743i  Waveshare Open H743i               stm32h7    https://www.waveshare.com/openh743i-c-standard.htm
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index 16a43f479..450ec6a25 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -4,9 +4,9 @@ Dependencies
 
 MCU low-level peripheral drivers and external libraries for building TinyUSB examples
 
-========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
 Local Path                                Repo                                                              Commit                                    Required by
-========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
 hw/mcu/allwinner                          https://github.com/hathach/allwinner_driver.git                   8e5e89e8e132c0fd90e72d5422e5d3d68232b756  fc100s
 hw/mcu/analog/msdk                        https://github.com/analogdevicesinc/msdk.git                      b20b398d3e5e2007594e54a74ba3d2a2e50ddd75  maxim
 hw/mcu/artery/at32f402_405                https://github.com/ArteryTek/AT32F402_405_Firmware_Library.git    4424515c2663e82438654e0947695295df2abdfe  at32f402_405
@@ -17,16 +17,22 @@ hw/mcu/artery/at32f423                    https://github.com/ArteryTek/AT32F423_
 hw/mcu/artery/at32f425                    https://github.com/ArteryTek/AT32F425_Firmware_Library.git        620233e1357d5c1b7e2bde6b9dd5196822b91817  at32f425
 hw/mcu/artery/at32f435_437                https://github.com/ArteryTek/AT32F435_437_Firmware_Library.git    25439cc6650a8ae0345934e8707a5f38c7ae41f8  at32f435_437
 hw/mcu/artery/at32f45x                    https://github.com/ArteryTek/AT32F45x_Firmware_Library.git        3d4a1b38be8ebac292e2350ca53bc4bfa4430233  at32f45x
-hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                       91060164afe239fcb394122e8bf9eb24d3194eb1  ft9xx
+hw/mcu/bridgetek/ft9xx/ft90x-sdk          https://github.com/BRTSG-FOSS/ft90x-sdk.git                       03f74eac84645178fdde7f2e5ca9acdcb7bd9dcd  ft9xx
 hw/mcu/broadcom                           https://github.com/adafruit/broadcom-peripherals.git              08370086080759ed54ac1136d62d2ad24c6fa267  broadcom_32bit broadcom_64bit
 hw/mcu/gd/nuclei-sdk                      https://github.com/Nuclei-Software/nuclei-sdk.git                 7eb7bfa9ea4fbeacfafe1d5f77d5a0e6ed3922e7  gd32vf103
+hw/mcu/hpmicro/hpm_sdk                    https://github.com/hpmicro/hpm_sdk                                8d2af741ecc4aaa82d7ee395dc1ce25d7070c3ff  hpmicro
 hw/mcu/infineon/mtb-xmclib-cat3           https://github.com/Infineon/mtb-xmclib-cat3.git                   daf5500d03cba23e68c2f241c30af79cd9d63880  xmc4000
-hw/mcu/microchip                          https://github.com/hathach/microchip_driver.git                   9e8b37e307d8404033bb881623a113931e1edf27  sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg
+hw/mcu/microchip                          https://github.com/hathach/microchip_driver.git                   9e8b37e307d8404033bb881623a113931e1edf27  sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samd2x_l2x samg
 hw/mcu/mindmotion/mm32sdk                 https://github.com/hathach/mm32sdk.git                            b93e856211060ae825216c6a1d6aa347ec758843  mm32
 hw/mcu/nordic/nrfx                        https://github.com/NordicSemiconductor/nrfx.git                   11f57e578c7feea13f21c79ea0efab2630ac68c7  nrf
 hw/mcu/nuvoton                            https://github.com/majbthrd/nuc_driver.git                        2204191ec76283371419fbcec207da02e1bc22fa  nuc100_120 nuc121_125 nuc126 nuc505
 hw/mcu/nxp/lpcopen                        https://github.com/hathach/nxp_lpcopen.git                        b41cf930e65c734d8ec6de04f1d57d46787c76ae  lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43
-hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_k32l kinetis_kl lpc51 lpc54 lpc55 mcx imxrt
+hw/mcu/nxp/mcux-devices-kinetis           https://github.com/nxp-mcuxpresso/mcux-devices-kinetis            98a155e666c54f396e528ec3131f27a5d5b71f76  kinetis_k32l
+hw/mcu/nxp/mcux-devices-lpc               https://github.com/nxp-mcuxpresso/mcux-devices-lpc                8096b783ec09d0d1c8629025a5f9d8e7df26e520  lpc51 lpc55
+hw/mcu/nxp/mcux-devices-mcx               https://github.com/nxp-mcuxpresso/mcux-devices-mcx                ada1c97c761123ec0c179bb9bb9f744bf9a11475  mcx
+hw/mcu/nxp/mcux-devices-rt                https://github.com/nxp-mcuxpresso/mcux-devices-rt                 dba2b523c9df61f3330bd186242f8210a8e47c45  imxrt
+hw/mcu/nxp/mcux-sdk                       https://github.com/nxp-mcuxpresso/mcux-sdk                        a1bdae309a14ec95a4f64a96d3315a4f89c397c6  kinetis_k kinetis_kl lpc54 rw61x
+hw/mcu/nxp/mcuxsdk-core                   https://github.com/nxp-mcuxpresso/mcuxsdk-core                    0c5c6b16deb211110e06bde896cdff59ab213e16  imxrt kinetis_k32l lpc51 lpc55 mcx
 hw/mcu/raspberry_pi/Pico-PIO-USB          https://github.com/sekigon-gonnoc/Pico-PIO-USB.git                675543bcc9baa8170f868ab7ba316d418dbcf41f  rp2040
 hw/mcu/renesas/fsp                        https://github.com/renesas/fsp.git                                edcc97d684b6f716728a60d7a6fea049d9870bd6  ra
 hw/mcu/renesas/rx                         https://github.com/kkitayam/rx_device.git                         706b4e0cf485605c32351e2f90f5698267996023  rx
@@ -54,7 +60,7 @@ hw/mcu/st/cmsis_device_n6                 https://github.com/STMicroelectronics/
 hw/mcu/st/cmsis_device_u5                 https://github.com/STMicroelectronics/cmsis_device_u5.git         6e67187dec98035893692ab2923914cb5f4e0117  stm32u5
 hw/mcu/st/cmsis_device_wb                 https://github.com/STMicroelectronics/cmsis_device_wb.git         cda2cb9fc4a5232ab18efece0bb06b0b60910083  stm32wb
 hw/mcu/st/stm32-mfxstm32l152              https://github.com/STMicroelectronics/stm32-mfxstm32l152.git      7f4389efee9c6a655b55e5df3fceef5586b35f9b  stm32h7
-hw/mcu/st/stm32-tcpp0203                  https://github.com/STMicroelectronics/stm32-tcpp0203.git          9918655bff176ac3046ccf378b5c7bbbc6a38d15  stm32h7rs stm32n6
+hw/mcu/st/stm32-tcpp0203                  https://github.com/STMicroelectronics/stm32-tcpp0203.git          9918655bff176ac3046ccf378b5c7bbbc6a38d15  stm32h5 stm32h7rs stm32n6
 hw/mcu/st/stm32c0xx_hal_driver            https://github.com/STMicroelectronics/stm32c0xx_hal_driver.git    c283b143bef6bdaacf64240ee6f15eb61dad6125  stm32c0
 hw/mcu/st/stm32f0xx_hal_driver            https://github.com/STMicroelectronics/stm32f0xx_hal_driver.git    94399697cb5eeaf8511b81b7f50dc62f0a5a3f6c  stm32f0
 hw/mcu/st/stm32f1xx_hal_driver            https://github.com/STMicroelectronics/stm32f1xx_hal_driver.git    18074e3e5ecad0b380a5cf5a9131fe4b5ed1b2b7  stm32f1
@@ -76,15 +82,17 @@ hw/mcu/st/stm32u0xx_hal_driver            https://github.com/STMicroelectronics/
 hw/mcu/st/stm32u5xx_hal_driver            https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git    2c5e2568fbdb1900a13ca3b2901fdd302cac3444  stm32u5
 hw/mcu/st/stm32wbaxx_hal_driver           https://github.com/STMicroelectronics/stm32wbaxx_hal_driver.git   9442fbb71f855ff2e64fbf662b7726beba511a24  stm32wba
 hw/mcu/st/stm32wbxx_hal_driver            https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git    d60dd46996876506f1d2e9abd6b1cc110c8004cd  stm32wb
-hw/mcu/ti                                 https://github.com/hathach/ti_driver.git                          143ed6cc20a7615d042b03b21e070197d473e6e5  msp430 msp432e4 tm4c
+hw/mcu/ti                                 https://github.com/hathach/ti_driver.git                          083944907e7d08fcb1f614b47598ce45935b8da1  msp430 msp432e4 tm4c
 hw/mcu/wch/ch32f20x                       https://github.com/openwch/ch32f20x.git                           77c4095087e5ed2c548ec9058e655d0b8757663b  ch32f20x
 hw/mcu/wch/ch32v103                       https://github.com/openwch/ch32v103.git                           7578cae0b21f86dd053a1f781b2fc6ab99d0ec17  ch32v10x
 hw/mcu/wch/ch32v20x                       https://github.com/openwch/ch32v20x.git                           c4c38f507e258a4e69b059ccc2dc27dde33cea1b  ch32v20x
 hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                           184f21b852cb95eed58e86e901837bc9fff68775  ch32v30x
-lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  imxrt kinetis_k32l kinetis_kl lpc51 lpc54 lpc55 mcx mm32 msp432e4 nrf saml2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wbasam3x samd11 samd21 samd51 samd5x_e5x same5x same7x saml2x samg tm4c
-lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  ra stm32n6
+lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  kinetis_k kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samd2x_l2x samg tm4c
+lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx
 lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                   cc0e0707c0c748713485b870bb980852b210877f  all
 lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                            159e31b689577dbf69cf0683bbaffbd71fa5ee10  all
 lib/sct_neopixel                          https://github.com/gsteiert/sct_neopixel.git                      e73e04ca63495672d955f9268e003cffe168fcd8  lpc55
+lib/threadx                               https://github.com/eclipse-threadx/threadx.git                    4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae  all
+tools/linkermap                           https://github.com/hathach/linkermap.git                          8e1f440fa15c567aceb5aa0d14f6d18c329cc67f  all
 tools/uf2                                 https://github.com/microsoft/uf2.git                              c594542b2faa01cc33a2b97c9fbebc38549df80a  all
-========================================  ================================================================  ========================================  ==============================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
diff --git a/examples/build_system/cmake/cpu/ft32.cmake b/examples/build_system/cmake/cpu/ft32.cmake
new file mode 100644
index 000000000..13153e555
--- /dev/null
+++ b/examples/build_system/cmake/cpu/ft32.cmake
@@ -0,0 +1,13 @@
+if (TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -fvar-tracking
+    -fvar-tracking-assignments
+    )
+
+elseif (TOOLCHAIN STREQUAL "clang")
+  message(FATAL_ERROR "Clang is not supported for this target")
+
+elseif (TOOLCHAIN STREQUAL "iar")
+  message(FATAL_ERROR "IAR is not supported for this target")
+
+endif ()
diff --git a/examples/build_system/cmake/cpu/rx610.cmake b/examples/build_system/cmake/cpu/rx610.cmake
new file mode 100644
index 000000000..6f535275d
--- /dev/null
+++ b/examples/build_system/cmake/cpu/rx610.cmake
@@ -0,0 +1,12 @@
+if (NOT DEFINED TOOLCHAIN OR TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mcpu=rx610
+    -misa=v1
+    -mlittle-endian-data
+    -fshort-enums
+    )
+  set(FREERTOS_PORT GCC_RX600 CACHE INTERNAL "")
+
+else ()
+  message(FATAL_ERROR "Toolchain ${TOOLCHAIN} is not supported for RX")
+endif ()
diff --git a/examples/build_system/cmake/cpu/rx64m.cmake b/examples/build_system/cmake/cpu/rx64m.cmake
new file mode 100644
index 000000000..2b106ea00
--- /dev/null
+++ b/examples/build_system/cmake/cpu/rx64m.cmake
@@ -0,0 +1,12 @@
+if (NOT DEFINED TOOLCHAIN OR TOOLCHAIN STREQUAL "gcc")
+  set(TOOLCHAIN_COMMON_FLAGS
+    -mcpu=rx64m
+    -misa=v2
+    -mlittle-endian-data
+    -fshort-enums
+    )
+  set(FREERTOS_PORT GCC_RX600 CACHE INTERNAL "")
+
+else ()
+  message(FATAL_ERROR "Toolchain ${TOOLCHAIN} is not supported for RX")
+endif ()
diff --git a/examples/build_system/cmake/toolchain/ft32_gcc.cmake b/examples/build_system/cmake/toolchain/ft32_gcc.cmake
new file mode 100644
index 000000000..edf8048ab
--- /dev/null
+++ b/examples/build_system/cmake/toolchain/ft32_gcc.cmake
@@ -0,0 +1,22 @@
+if (NOT DEFINED CMAKE_C_COMPILER)
+  set(CMAKE_C_COMPILER "ft32-elf-gcc")
+endif ()
+
+if (NOT DEFINED CMAKE_CXX_COMPILER)
+  set(CMAKE_CXX_COMPILER "ft32-elf-g++")
+endif ()
+
+set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
+
+find_program(CMAKE_SIZE ft32-elf-size)
+find_program(CMAKE_OBJCOPY ft32-elf-objcopy)
+find_program(CMAKE_OBJDUMP ft32-elf-objdump)
+
+include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)
+
+get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
+if (IS_IN_TRY_COMPILE)
+  set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
+  set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
+  cmake_print_variables(CMAKE_C_LINK_FLAGS)
+endif ()
diff --git a/examples/build_system/cmake/toolchain/rx_gcc.cmake b/examples/build_system/cmake/toolchain/rx_gcc.cmake
new file mode 100644
index 000000000..3f8e3662e
--- /dev/null
+++ b/examples/build_system/cmake/toolchain/rx_gcc.cmake
@@ -0,0 +1,26 @@
+# Cross Compiler for RX
+if (NOT DEFINED CROSS_COMPILE)
+  set(CROSS_COMPILE "rx-elf-")
+endif ()
+
+if (NOT DEFINED CMAKE_C_COMPILER)
+  set(CMAKE_C_COMPILER ${CROSS_COMPILE}gcc)
+endif ()
+
+if (NOT DEFINED CMAKE_CXX_COMPILER)
+  set(CMAKE_CXX_COMPILER ${CROSS_COMPILE}g++)
+endif ()
+
+set(CMAKE_ASM_COMPILER ${CMAKE_C_COMPILER})
+find_program(CMAKE_SIZE ${CROSS_COMPILE}size)
+find_program(CMAKE_OBJCOPY ${CROSS_COMPILE}objcopy)
+find_program(CMAKE_OBJDUMP ${CROSS_COMPILE}objdump)
+
+include(${CMAKE_CURRENT_LIST_DIR}/common.cmake)
+
+get_property(IS_IN_TRY_COMPILE GLOBAL PROPERTY IN_TRY_COMPILE)
+if (IS_IN_TRY_COMPILE)
+  set(CMAKE_C_LINK_FLAGS "${CMAKE_C_LINK_FLAGS} -nostdlib")
+  set(CMAKE_CXX_LINK_FLAGS "${CMAKE_CXX_LINK_FLAGS} -nostdlib")
+  cmake_print_variables(CMAKE_C_LINK_FLAGS)
+endif ()
diff --git a/hw/bsp/hpmicro/boards/hpm6750evk2/board.h b/hw/bsp/hpmicro/boards/hpm6750evk2/board.h
index 0636a4722..929e11c0d 100644
--- a/hw/bsp/hpmicro/boards/hpm6750evk2/board.h
+++ b/hw/bsp/hpmicro/boards/hpm6750evk2/board.h
@@ -5,6 +5,11 @@
  *
  */
 
+/* metadata:
+   name: HPM6750EVK2
+   url: https://hpm-sdk.readthedocs.io/en/v1.6.0/boards/hpm6750evk2/README_en.html
+*/
+
 #ifndef _HPM_BOARD_H
 #define _HPM_BOARD_H
 
-- 
cgit v1.3.1


From 36400d108fc3d5aad754305d2667456321ad3412 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 14 Mar 2026 00:11:45 +0700
Subject: migrate kinetis_k32l build system to new mcux-devices paths

---
 .github/workflows/ci_set_matrix.py                 |  6 +--
 .../kinetis_k32l/boards/frdm_k32l2a4s/board.cmake  |  4 +-
 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk  | 10 ++++-
 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake |  4 +-
 hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk    | 10 ++++-
 hw/bsp/kinetis_k32l/boards/kuiic/board.cmake       |  2 +-
 hw/bsp/kinetis_k32l/boards/kuiic/board.mk          |  8 +++-
 hw/bsp/kinetis_k32l/family.cmake                   | 43 +++++++++-------------
 hw/bsp/kinetis_k32l/family.mk                      | 32 ++++++++--------
 9 files changed, 64 insertions(+), 55 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 1ea5199cf..98d15c8f9 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -35,9 +35,9 @@ family_list = {
     "gd32vf103": ["riscv-gcc"],
     "hpmicro": ["riscv-gcc"],
     "imxrt": ["arm-gcc", "arm-clang"],
-    "kinetis_k": ["arm-gcc", "arm-clang"],
-    "kinetis_k32l": ["arm-gcc", "arm-clang"],
-    "kinetis_kl": ["arm-gcc", "arm-clang"],
+    "kinetis_k": ["arm-gcc"],
+    "kinetis_k32l": ["arm-gcc"],
+    "kinetis_kl": ["arm-gcc"],
     "lpc11": ["arm-gcc", "arm-clang"],
     "lpc13": ["arm-gcc", "arm-clang"],
     "lpc15": ["arm-gcc", "arm-clang"],
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
index d7cafa495..3e7a4cac6 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.cmake
@@ -4,7 +4,7 @@ set(MCU_CORE ${MCU_VARIANT})
 set(JLINK_DEVICE K32L2A41xxxxA)
 set(PYOCD_TARGET K32L2A)
 
-set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/K32L2A41xxxxA_flash.ld)
+set(LD_FILE_GNU ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/gcc/K32L2A41xxxxA_flash.ld)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
@@ -14,6 +14,6 @@ function(update_board TARGET)
     CPU_K32L2A41VLH1A
     )
   target_include_directories(${TARGET} PUBLIC
-    ${SDK_DIR}/K32L/periph1
+    ${MCUX_DEVICES}/K32L/periph1
     )
 endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
index fb3eb2a03..513b78d66 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
@@ -1,4 +1,4 @@
-MCU = K32L2A41A
+MCU_VARIANT = K32L2A41A
 
 CFLAGS += -DCPU_K32L2A41VLH1A
 
@@ -6,7 +6,13 @@ CFLAGS += -DCPU_K32L2A41VLH1A
 CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
 
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/K32L2A41xxxxA_flash.ld
+LD_FILE = $(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/gcc/K32L2A41xxxxA_flash.ld
+
+INC += \
+	$(TOP)/$(MCUX_DEVICES)/K32L/periph1
+
+SRC_C += \
+	$(BOARD_PATH)/clock_config.c
 
 # For flash-jlink target
 JLINK_DEVICE = K32L2A41xxxxA
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
index f02230063..0efb0cb3f 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.cmake
@@ -4,7 +4,7 @@ set(MCU_CORE ${MCU_VARIANT})
 set(JLINK_DEVICE K32L2B31xxxxA)
 set(PYOCD_TARGET K32L2B)
 
-set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/K32L2B31xxxxA_flash.ld)
+set(LD_FILE_GNU ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/gcc/K32L2B31xxxxA_flash.ld)
 
 function(update_board TARGET)
   target_sources(${TARGET} PUBLIC
@@ -14,6 +14,6 @@ function(update_board TARGET)
     CPU_K32L2B31VLH0A
     )
   target_include_directories(${TARGET} PUBLIC
-    ${SDK_DIR}/K32L/periph2
+    ${MCUX_DEVICES}/K32L/periph2
     )
 endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
index 9cf36c500..b204a142c 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2b/board.mk
@@ -1,4 +1,4 @@
-MCU = K32L2B31A
+MCU_VARIANT = K32L2B31A
 
 CFLAGS += -DCPU_K32L2B31VLH0A
 
@@ -6,7 +6,13 @@ CFLAGS += -DCPU_K32L2B31VLH0A
 CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
 
 # All source paths should be relative to the top level.
-LD_FILE = $(MCU_DIR)/gcc/K32L2B31xxxxA_flash.ld
+LD_FILE = $(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/gcc/K32L2B31xxxxA_flash.ld
+
+INC += \
+	$(TOP)/$(MCUX_DEVICES)/K32L/periph2
+
+SRC_C += \
+	$(BOARD_PATH)/clock_config.c
 
 # For flash-jlink target
 JLINK_DEVICE = K32L2B31xxxxA
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake b/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
index c99029109..506f23e51 100644
--- a/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/board.cmake
@@ -14,6 +14,6 @@ function(update_board TARGET)
     CPU_K32L2B31VLH0A
     )
   target_include_directories(${TARGET} PUBLIC
-    ${SDK_DIR}/K32L/periph2
+    ${MCUX_DEVICES}/K32L/periph2
     )
 endfunction()
diff --git a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
index 2bc5b1e34..4dc4ff60b 100644
--- a/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
+++ b/hw/bsp/kinetis_k32l/boards/kuiic/board.mk
@@ -1,4 +1,4 @@
-MCU = K32L2B31A
+MCU_VARIANT = K32L2B31A
 
 CFLAGS += -DCPU_K32L2B31VLH0A
 
@@ -8,6 +8,12 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/kuiic.ld
 
+INC += \
+	$(TOP)/$(MCUX_DEVICES)/K32L/periph2
+
+SRC_C += \
+	$(BOARD_PATH)/clock_config.c
+
 # For flash-jlink target
 JLINK_DEVICE = K32L2B31xxxxA
 
diff --git a/hw/bsp/kinetis_k32l/family.cmake b/hw/bsp/kinetis_k32l/family.cmake
index 694017cb4..020695589 100644
--- a/hw/bsp/kinetis_k32l/family.cmake
+++ b/hw/bsp/kinetis_k32l/family.cmake
@@ -1,7 +1,7 @@
 include_guard()
 
-set(MCUX_DIR ${TOP}/hw/mcu/nxp/mcuxsdk-core)
-set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-devices-kinetis)
+set(MCUX_CORE ${TOP}/hw/mcu/nxp/mcuxsdk-core)
+set(MCUX_DEVICES ${TOP}/hw/mcu/nxp/mcux-devices-kinetis)
 set(CMSIS_DIR ${TOP}/lib/CMSIS_6)
 
 # include board specific
@@ -18,14 +18,11 @@ set(FAMILY_MCUS KINETIS_K32L CACHE INTERNAL "")
 # Startup & Linker script
 #------------------------------------
 if (NOT DEFINED LD_FILE_GNU)
-  set(LD_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
+  set(LD_FILE_GNU ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
 endif ()
-set(LD_FILE_Clang ${LD_FILE_GNU})
-
 if (NOT DEFINED STARTUP_FILE_GNU)
-  set(STARTUP_FILE_GNU ${SDK_DIR}/K32L/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
+  set(STARTUP_FILE_GNU ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/gcc/startup_${MCU_VARIANT}.S)
 endif ()
-set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 
 #------------------------------------
 # Board Target
@@ -33,24 +30,25 @@ set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
 function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     # driver
-    ${MCUX_DIR}/drivers/gpio/fsl_gpio.c
-    ${MCUX_DIR}/drivers/lpuart/fsl_lpuart.c
+    ${MCUX_CORE}/drivers/gpio/fsl_gpio.c
+    ${MCUX_CORE}/drivers/common/fsl_common_arm.c
+    ${MCUX_CORE}/drivers/lpuart/fsl_lpuart.c
     # mcu
-    ${SDK_DIR}/K32L/${MCU_VARIANT}/system_${MCU_VARIANT}.c
-    ${SDK_DIR}/K32L/${MCU_VARIANT}/drivers/fsl_clock.c
+    ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/system_${MCU_VARIANT}.c
+    ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/drivers/fsl_clock.c
     )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     __STARTUP_CLEAR_BSS
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
     ${CMSIS_DIR}/CMSIS/Core/Include
-    ${MCUX_DIR}/drivers/common
-    ${MCUX_DIR}/drivers/gpio
-    ${MCUX_DIR}/drivers/lpuart
-    ${MCUX_DIR}/drivers/port
-    ${MCUX_DIR}/drivers/smc
-    ${SDK_DIR}/K32L/${MCU_VARIANT}
-    ${SDK_DIR}/K32L/${MCU_VARIANT}/drivers
+    ${MCUX_CORE}/drivers/common
+    ${MCUX_CORE}/drivers/gpio
+    ${MCUX_CORE}/drivers/lpuart
+    ${MCUX_CORE}/drivers/port
+    ${MCUX_CORE}/drivers/smc
+    ${MCUX_DEVICES}/K32L/${MCU_VARIANT}
+    ${MCUX_DEVICES}/K32L/${MCU_VARIANT}/drivers
     )
 
   update_board(${BOARD_TARGET})
@@ -82,19 +80,12 @@ function(family_configure_example TARGET RTOS)
       --specs=nosys.specs --specs=nano.specs
       -nostartfiles
       )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    target_link_options(${TARGET} PUBLIC
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
   elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
     target_link_options(${TARGET} PUBLIC
       "LINKER:--config=${LD_FILE_IAR}"
       )
   endif ()
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
-  endif ()
   set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
     SKIP_LINTING ON
     COMPILE_OPTIONS -w)
diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l/family.mk
index e18348d4d..2802337d3 100644
--- a/hw/bsp/kinetis_k32l/family.mk
+++ b/hw/bsp/kinetis_k32l/family.mk
@@ -1,9 +1,9 @@
 UF2_FAMILY_ID = 0x7f83e793
-SDK_DIR = hw/mcu/nxp/mcux-sdk
-MCU_DIR = $(SDK_DIR)/devices/$(MCU)
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 CPU_CORE ?= cortex-m0plus
+MCUX_CORE = hw/mcu/nxp/mcuxsdk-core
+MCUX_DEVICES = hw/mcu/nxp/mcux-devices-kinetis
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
@@ -15,21 +15,21 @@ LDFLAGS_GCC += \
 SRC_C += \
 	src/portable/nxp/khci/dcd_khci.c \
 	src/portable/nxp/khci/hcd_khci.c \
-	$(MCU_DIR)/system_$(MCU).c \
-	$(MCU_DIR)/drivers/fsl_clock.c \
-	$(SDK_DIR)/drivers/gpio/fsl_gpio.c \
-	$(SDK_DIR)/drivers/lpuart/fsl_lpuart.c
+	$(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/system_$(MCU_VARIANT).c \
+	$(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/drivers/fsl_clock.c \
+	$(MCUX_CORE)/drivers/gpio/fsl_gpio.c \
+	$(MCUX_CORE)/drivers/lpuart/fsl_lpuart.c \
+	$(MCUX_CORE)/drivers/common/fsl_common_arm.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-	$(TOP)/$(MCU_DIR) \
-	$(TOP)/$(MCU_DIR)/project_template \
-	$(TOP)/$(MCU_DIR)/drivers \
-	$(TOP)/$(SDK_DIR)/drivers/common \
-	$(TOP)/$(SDK_DIR)/drivers/gpio \
-	$(TOP)/$(SDK_DIR)/drivers/lpuart \
-	$(TOP)/$(SDK_DIR)/drivers/port \
-	$(TOP)/$(SDK_DIR)/drivers/smc \
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
+	$(TOP)/$(MCUX_DEVICES)/K32L/$(MCU_VARIANT) \
+	$(TOP)/$(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/drivers \
+	$(TOP)/$(MCUX_CORE)/drivers/common \
+	$(TOP)/$(MCUX_CORE)/drivers/gpio \
+	$(TOP)/$(MCUX_CORE)/drivers/lpuart \
+	$(TOP)/$(MCUX_CORE)/drivers/port \
+	$(TOP)/$(MCUX_CORE)/drivers/smc
 
-SRC_S += $(MCU_DIR)/gcc/startup_$(MCU).S
+SRC_S += $(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/gcc/startup_$(MCU_VARIANT).S
-- 
cgit v1.3.1


From c5e3098c37cf165ffde9a304238558294e328e73 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 14 Mar 2026 11:08:52 +0700
Subject: update rx65n_target: correct pin configuration and remove unused USB
 interrupt definitions

---
 .github/workflows/ci_set_matrix.py           | 1 +
 docs/reference/boards.rst                    | 2 +-
 docs/reference/dependencies.rst              | 8 ++++----
 hw/bsp/rx/boards/rx65n_target/board.cmake    | 5 -----
 hw/bsp/rx/boards/rx65n_target/rx65n_target.c | 2 +-
 hw/bsp/stm32h7/boards/stm32h747disco/board.h | 4 ++--
 tools/get_deps.py                            | 2 +-
 7 files changed, 10 insertions(+), 14 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 98d15c8f9..1d35f15dd 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -26,6 +26,7 @@ family_list = {
     "at32f45x": ["arm-gcc"],
     "broadcom_32bit": ["arm-gcc"],
     "broadcom_64bit": ["aarch64-gcc"],
+    "ch32f20x": ["arm-gcc"],
     "ch32v10x": ["riscv-gcc"],
     "ch32v20x": ["riscv-gcc"],
     "ch32v30x": ["riscv-gcc"],
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index ef53c66c1..ec91b343e 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -301,7 +301,7 @@ stm32h723nucleo      STM32 H723 Nucleo                  stm32h7    https://www.s
 stm32h743eval        STM32 H743 Eval                    stm32h7    https://www.st.com/en/evaluation-tools/stm32h743i-eval.html
 stm32h743nucleo      STM32 H743 Nucleo                  stm32h7    https://www.st.com/en/evaluation-tools/nucleo-h743zi.html
 stm32h745disco       STM32 H745 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
-stm32h747disco       STM32 H745 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
+stm32h747disco       STM32 H747 Discovery               stm32h7    https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
 stm32h750_weact      STM32 H750 WeAct                   stm32h7    https://www.adafruit.com/product/5032
 stm32h750bdk         STM32 H750b Discovery Kit          stm32h7    https://www.st.com/en/evaluation-tools/stm32h750b-dk.html
 waveshare_openh743i  Waveshare Open H743i               stm32h7    https://www.waveshare.com/openh743i-c-standard.htm
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index 450ec6a25..c5b755577 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -4,9 +4,9 @@ Dependencies
 
 MCU low-level peripheral drivers and external libraries for building TinyUSB examples
 
-========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ========================================================================================================================================================================================================================================================================================================================================
 Local Path                                Repo                                                              Commit                                    Required by
-========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ========================================================================================================================================================================================================================================================================================================================================
 hw/mcu/allwinner                          https://github.com/hathach/allwinner_driver.git                   8e5e89e8e132c0fd90e72d5422e5d3d68232b756  fc100s
 hw/mcu/analog/msdk                        https://github.com/analogdevicesinc/msdk.git                      b20b398d3e5e2007594e54a74ba3d2a2e50ddd75  maxim
 hw/mcu/artery/at32f402_405                https://github.com/ArteryTek/AT32F402_405_Firmware_Library.git    4424515c2663e82438654e0947695295df2abdfe  at32f402_405
@@ -87,7 +87,7 @@ hw/mcu/wch/ch32f20x                       https://github.com/openwch/ch32f20x.gi
 hw/mcu/wch/ch32v103                       https://github.com/openwch/ch32v103.git                           7578cae0b21f86dd053a1f781b2fc6ab99d0ec17  ch32v10x
 hw/mcu/wch/ch32v20x                       https://github.com/openwch/ch32v20x.git                           c4c38f507e258a4e69b059ccc2dc27dde33cea1b  ch32v20x
 hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                           184f21b852cb95eed58e86e901837bc9fff68775  ch32v30x
-lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  kinetis_k kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samd2x_l2x samg tm4c
+lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  kinetis_k kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samg tm4c
 lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx
 lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                   cc0e0707c0c748713485b870bb980852b210877f  all
 lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                            159e31b689577dbf69cf0683bbaffbd71fa5ee10  all
@@ -95,4 +95,4 @@ lib/sct_neopixel                          https://github.com/gsteiert/sct_neopix
 lib/threadx                               https://github.com/eclipse-threadx/threadx.git                    4b6e8100d932a3a67b34c6eb17f84f3bffb9e2ae  all
 tools/linkermap                           https://github.com/hathach/linkermap.git                          8e1f440fa15c567aceb5aa0d14f6d18c329cc67f  all
 tools/uf2                                 https://github.com/microsoft/uf2.git                              c594542b2faa01cc33a2b97c9fbebc38549df80a  all
-========================================  ================================================================  ========================================  ===================================================================================================================================================================================================================================================================================================================================================
+========================================  ================================================================  ========================================  ========================================================================================================================================================================================================================================================================================================================================
diff --git a/hw/bsp/rx/boards/rx65n_target/board.cmake b/hw/bsp/rx/boards/rx65n_target/board.cmake
index e365fe8ad..c8b9286bc 100644
--- a/hw/bsp/rx/boards/rx65n_target/board.cmake
+++ b/hw/bsp/rx/boards/rx65n_target/board.cmake
@@ -19,9 +19,4 @@ function(update_board TARGET)
   target_include_directories(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     )
-  target_compile_definitions(${TARGET} PUBLIC
-    IR_USB0_USBI0=IR_PERIB_INTB185
-    IER_USB0_USBI0=IER_PERIB_INTB185
-    IEN_USB0_USBI0=IEN_PERIB_INTB185
-    )
 endfunction()
diff --git a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
index dbaa9d6fe..318cd1b6d 100644
--- a/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
+++ b/hw/bsp/rx/boards/rx65n_target/rx65n_target.c
@@ -116,7 +116,7 @@ void board_pin_init(void)
   PORTA.PCR.BIT.B4 = 1U;
   MPC.PA4PFS.BYTE  = 0b01010;
   PORTA.PMR.BIT.B3 = 1U;
-  MPC.PA5PFS.BYTE  = 0b01010;
+  MPC.PA3PFS.BYTE  = 0b01010;
 
   /* USB VBUS -> P16 */
   PORT1.PMR.BIT.B6 = 1U;
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.h b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
index 0a25c89dc..1793338f8 100644
--- a/hw/bsp/stm32h7/boards/stm32h747disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
@@ -25,8 +25,8 @@
  */
 
 /* metadata:
-   name: STM32 H745 Discovery
-   url: https://www.st.com/en/evaluation-tools/stm32h745i-disco.html
+   name: STM32 H747 Discovery
+   url: https://www.st.com/en/evaluation-tools/stm32h747i-disco.html
 */
 
 #ifndef BOARD_H_
diff --git a/tools/get_deps.py b/tools/get_deps.py
index c4ec5454e..25b85ac3b 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -274,7 +274,7 @@ deps_optional = {
                     'lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 '
                     'stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 '
                     'stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba '
-                    'sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samd2x_l2x samg '
+                    'sam3x samd11 samd21 samd2x_l2x samd51 samd5x_e5x same5x same7x samg '
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-- 
cgit v1.3.1


From 3da88d755dd0438570f254a43eea18b84fc1bb83 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 16 Mar 2026 15:15:23 +0700
Subject: add stm32u083nucleo board

---
 .../boards/stm32u083cdk/STM32U083MCTx_FLASH.ld     | 176 --------------------
 hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake     |   3 -
 hw/bsp/stm32u0/boards/stm32u083cdk/board.h         |   9 +-
 hw/bsp/stm32u0/boards/stm32u083cdk/board.mk        |   4 -
 .../boards/stm32u083cdk/stm32u083xx_flash.icf      |  32 ----
 .../boards/stm32u083nucleo/cubemx/cubemx.ioc       | 185 +++++++++++++++++++++
 hw/bsp/stm32u0/family.c                            |   5 +-
 hw/bsp/stm32u0/family.mk                           |   2 +
 hw/bsp/stm32u0/linker/STM32U083xx_FLASH.ld         | 176 ++++++++++++++++++++
 hw/bsp/stm32u0/linker/stm32u083xx_flash.icf        |  32 ++++
 10 files changed, 403 insertions(+), 221 deletions(-)
 delete mode 100644 hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld
 delete mode 100644 hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf
 create mode 100644 hw/bsp/stm32u0/boards/stm32u083nucleo/cubemx/cubemx.ioc
 create mode 100644 hw/bsp/stm32u0/linker/STM32U083xx_FLASH.ld
 create mode 100644 hw/bsp/stm32u0/linker/stm32u083xx_flash.icf

(limited to 'hw')

diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld b/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld
deleted file mode 100644
index c5ea72fb0..000000000
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/STM32U083MCTx_FLASH.ld
+++ /dev/null
@@ -1,176 +0,0 @@
-/**
-  ******************************************************************************
-  * @file      LinkerScript.ld
-  * @author    Auto-generated by STM32CubeIDE
-  * @brief     Linker script for STM32U083MCTx Device from STM32U0 series
-  *            256KBytes FLASH
-  *            40KBytes RAM
-  *
-  *            Set heap size, stack size and stack location according
-  *            to application requirements.
-  *
-  *            Set memory bank area and size if external memory is used
-  ******************************************************************************
-  * @attention
-  *
-  * Copyright (c) 2023 STMicroelectronics.
-  * All rights reserved.
-  *
-  * This software is licensed under terms that can be found in the LICENSE file
-  * in the root directory of this software component.
-  * If no LICENSE file comes with this software, it is provided AS-IS.
-  *
-  ******************************************************************************
-  */
-
-/* Entry Point */
-ENTRY(Reset_Handler)
-
-/* Memories definition */
-MEMORY
-{
-  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 40K
-  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 256K
-}
-
-/* Highest address of the user mode stack */
-_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
-
-_Min_Heap_Size = 0x200;  /* required amount of heap */
-_Min_Stack_Size = 0x800; /* required amount of stack */
-
-/* Sections */
-SECTIONS
-{
-  /* The startup code into "FLASH" Rom type memory */
-  .isr_vector :
-  {
-    . = ALIGN(4);
-    KEEP(*(.isr_vector)) /* Startup code */
-    . = ALIGN(4);
-  } >FLASH
-
-  /* The program code and other data into "FLASH" Rom type memory */
-  .text :
-  {
-    . = ALIGN(4);
-    *(.text)           /* .text sections (code) */
-    *(.text*)          /* .text* sections (code) */
-    *(.glue_7)         /* glue arm to thumb code */
-    *(.glue_7t)        /* glue thumb to arm code */
-    *(.eh_frame)
-
-    KEEP (*(.init))
-    KEEP (*(.fini))
-
-    . = ALIGN(4);
-    _etext = .;        /* define a global symbols at end of code */
-  } >FLASH
-
-  /* Constant data into "FLASH" Rom type memory */
-  .rodata :
-  {
-    . = ALIGN(4);
-    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
-    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM.extab   : {
-    . = ALIGN(4);
-    *(.ARM.extab* .gnu.linkonce.armextab.*)
-    . = ALIGN(4);
-  } >FLASH
-
-  .ARM : {
-    . = ALIGN(4);
-    __exidx_start = .;
-    *(.ARM.exidx*)
-    __exidx_end = .;
-    . = ALIGN(4);
-  } >FLASH
-
-  .preinit_array     :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array*))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  .init_array :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT(.init_array.*)))
-    KEEP (*(.init_array*))
-    PROVIDE_HIDDEN (__init_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  .fini_array :
-  {
-    . = ALIGN(4);
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT(.fini_array.*)))
-    KEEP (*(.fini_array*))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-    . = ALIGN(4);
-  } >FLASH
-
-  /* Used by the startup to initialize data */
-  _sidata = LOADADDR(.data);
-
-  /* Initialized data sections into "RAM" Ram type memory */
-  .data :
-  {
-    . = ALIGN(4);
-    _sdata = .;        /* create a global symbol at data start */
-    *(.data)           /* .data sections */
-    *(.data*)          /* .data* sections */
-    *(.RamFunc)        /* .RamFunc sections */
-    *(.RamFunc*)       /* .RamFunc* sections */
-
-    . = ALIGN(4);
-    _edata = .;        /* define a global symbol at data end */
-
-  } >RAM AT> FLASH
-
-  /* Uninitialized data section into "RAM" Ram type memory */
-  . = ALIGN(4);
-  .bss :
-  {
-    /* This is used by the startup in order to initialize the .bss section */
-    _sbss = .;         /* define a global symbol at bss start */
-    __bss_start__ = _sbss;
-    *(.bss)
-    *(.bss*)
-    *(COMMON)
-
-    . = ALIGN(4);
-    _ebss = .;         /* define a global symbol at bss end */
-    __bss_end__ = _ebss;
-  } >RAM
-
-  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
-  ._user_heap_stack :
-  {
-    . = ALIGN(8);
-    PROVIDE ( end = . );
-    PROVIDE ( _end = . );
-    . = . + _Min_Heap_Size;
-    . = . + _Min_Stack_Size;
-    . = ALIGN(8);
-  } >RAM
-
-  /* Remove information from the compiler libraries */
-  /DISCARD/ :
-  {
-    libc.a ( * )
-    libm.a ( * )
-    libgcc.a ( * )
-  }
-
-  .ARM.attributes 0 : { *(.ARM.attributes) }
-}
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake b/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake
index 945146810..e00e681d8 100644
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.cmake
@@ -1,9 +1,6 @@
 set(MCU_VARIANT stm32u083xx)
 set(JLINK_DEVICE stm32u083mc)
 
-set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32U083MCTx_FLASH.ld)
-set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/stm32u083xx_flash.icf)
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     STM32U083xx
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.h b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
index 3030b1a1d..278d9b695 100644
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
@@ -57,8 +57,7 @@
 //--------------------------------------------------------------------+
 // RCC Clock
 //--------------------------------------------------------------------+
-static inline void board_stm32u0_clock_init(void)
-{
+static inline void SystemClock_Config(void) {
   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
   RCC_CRSInitTypeDef RCC_CRSInitStruct = {0};
@@ -78,10 +77,10 @@ static inline void board_stm32u0_clock_init(void)
   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
   RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
-  RCC_OscInitStruct.PLL.PLLN = 8;
+  RCC_OscInitStruct.PLL.PLLN = 7;
   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
-  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
-  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV4;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
   HAL_RCC_OscConfig(&RCC_OscInitStruct);
 
   /** Initializes the CPU, AHB and APB buses clocks
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk b/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk
index 892854f54..09216440b 100644
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.mk
@@ -2,10 +2,6 @@ MCU_VARIANT = stm32u083xx
 CFLAGS += \
   -DSTM32U083xx
 
-# All source paths should be relative to the top level.
-LD_FILE = $(BOARD_PATH)/STM32U083MCTx_FLASH.ld
-LD_FILE_IAR = $(BOARD_PATH)/stm32u083xx_flash.icf
-
 # For flash-jlink target
 JLINK_DEVICE = STM32U083MC
 
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf b/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf
deleted file mode 100644
index cfaa305af..000000000
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/stm32u083xx_flash.icf
+++ /dev/null
@@ -1,32 +0,0 @@
-/*###ICF### Section handled by ICF editor, don't touch! ****/
-/*-Editor annotation file-*/
-/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
-/*-Specials-*/
-define symbol __ICFEDIT_intvec_start__ = 0x08000000;
-/*-Memory Regions-*/
-define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
-define symbol __ICFEDIT_region_ROM_end__   = 0x0803FFFF;
-define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
-define symbol __ICFEDIT_region_RAM_end__   = 0x20007FFF;
-
-/*-Sizes-*/
-define symbol __ICFEDIT_size_cstack__ = 0x800;
-define symbol __ICFEDIT_size_heap__   = 0x200;
-/**** End of ICF editor section. ###ICF###*/
-
-
-define memory mem with size = 4G;
-define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
-define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
-
-define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
-define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
-
-initialize by copy { readwrite };
-do not initialize  { section .noinit };
-
-place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
-
-place in ROM_region   { readonly };
-place in RAM_region   { readwrite,
-                        block CSTACK, block HEAP };
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/cubemx/cubemx.ioc b/hw/bsp/stm32u0/boards/stm32u083nucleo/cubemx/cubemx.ioc
new file mode 100644
index 000000000..5e40247b2
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/cubemx/cubemx.ioc
@@ -0,0 +1,185 @@
+#MicroXplorer Configuration settings - do not modify
+BSP_IP_NAME=NUCLEO-U083RC
+CAD.formats=[]
+CAD.pinconfig=Dual
+CAD.provider=
+File.Version=6
+GPIO.groupedBy=
+KeepUserPlacement=false
+Mcu.CPN=STM32U083RCT6
+Mcu.Family=STM32U0
+Mcu.IP0=CORTEX_M0+
+Mcu.IP1=NVIC
+Mcu.IP2=PWR
+Mcu.IP3=RCC
+Mcu.IP4=SYS
+Mcu.IP5=USART2
+Mcu.IP6=USB
+Mcu.IP7=NUCLEO-U083RC
+Mcu.IPNb=8
+Mcu.Name=STM32U083RCTx
+Mcu.Package=LQFP64
+Mcu.Pin0=PC14-OSC32_IN
+Mcu.Pin1=PC15-OSC32_OUT
+Mcu.Pin10=VP_PWR_VS_SECSignals
+Mcu.Pin11=VP_SYS_VS_Systick
+Mcu.Pin2=PF0-OSC_IN
+Mcu.Pin3=PF1-OSC_OUT
+Mcu.Pin4=PA2
+Mcu.Pin5=PA3
+Mcu.Pin6=PA11 [PA9]
+Mcu.Pin7=PA12 [PA10]
+Mcu.Pin8=PA13 (SWDIO)
+Mcu.Pin9=PA14 (SWCLK)
+Mcu.PinsNb=12
+Mcu.ThirdPartyNb=0
+Mcu.UserConstants=
+Mcu.UserName=STM32U083RCTx
+MxCube.Version=6.17.0
+MxDb.Version=DB.6.0.170
+NVIC.ForceEnableDMAVector=true
+NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.NonMaskableInt_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PendSV_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.PriorityGroup=NVIC_PRIORITYGROUP_2
+NVIC.SVCall_IRQn=true\:0\:0\:false\:false\:true\:false\:false\:false
+NVIC.SysTick_IRQn=true\:3\:0\:false\:false\:true\:false\:true\:false
+PA11\ [PA9].Mode=Device
+PA11\ [PA9].Signal=USB_DM
+PA12\ [PA10].Mode=Device
+PA12\ [PA10].Signal=USB_DP
+PA13\ (SWDIO).GPIOParameters=GPIO_Label
+PA13\ (SWDIO).GPIO_Label=SWDIO
+PA13\ (SWDIO).Locked=true
+PA13\ (SWDIO).Signal=DEBUG_JTMS-SWDIO
+PA14\ (SWCLK).GPIOParameters=GPIO_Label
+PA14\ (SWCLK).GPIO_Label=SWCLK
+PA14\ (SWCLK).Locked=true
+PA14\ (SWCLK).Signal=DEBUG_JTCK-SWCLK
+PA2.GPIOParameters=GPIO_ModeDefaultPP,GPIO_Speed,GPIO_PuPd
+PA2.GPIO_ModeDefaultPP=GPIO_MODE_AF_PP
+PA2.GPIO_PuPd=GPIO_NOPULL
+PA2.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PA2.Locked=true
+PA2.Mode=Asynchronous
+PA2.Signal=USART2_TX
+PA3.GPIOParameters=GPIO_ModeDefaultPP,GPIO_Speed,GPIO_PuPd
+PA3.GPIO_ModeDefaultPP=GPIO_MODE_AF_PP
+PA3.GPIO_PuPd=GPIO_NOPULL
+PA3.GPIO_Speed=GPIO_SPEED_FREQ_LOW
+PA3.Locked=true
+PA3.Mode=Asynchronous
+PA3.Signal=USART2_RX
+PC14-OSC32_IN.GPIOParameters=GPIO_Label
+PC14-OSC32_IN.GPIO_Label=OSC32_IN
+PC14-OSC32_IN.Locked=true
+PC14-OSC32_IN.Mode=LSE-External-Oscillator-for-RTC
+PC14-OSC32_IN.Signal=RCC_OSC32_IN
+PC15-OSC32_OUT.GPIOParameters=GPIO_Label
+PC15-OSC32_OUT.GPIO_Label=OSC32_OUT
+PC15-OSC32_OUT.Locked=true
+PC15-OSC32_OUT.Mode=LSE-External-Oscillator-for-RTC
+PC15-OSC32_OUT.Signal=RCC_OSC32_OUT
+PCC.Checker=false
+PCC.Display=Plot\: All Steps
+PCC.Line=STM32U0x3
+PCC.MCU=STM32U083RCTx
+PCC.PartNumber=STM32U083RCTx
+PCC.Series=STM32U0
+PCC.Temperature=25
+PCC.Vdd=3.0
+PF0-OSC_IN.GPIOParameters=GPIO_Label
+PF0-OSC_IN.GPIO_Label=OSC_IN
+PF0-OSC_IN.Locked=true
+PF0-OSC_IN.Signal=RCC_OSC_IN
+PF1-OSC_OUT.GPIOParameters=GPIO_Label
+PF1-OSC_OUT.GPIO_Label=OSC_OUT
+PF1-OSC_OUT.Locked=true
+PF1-OSC_OUT.Signal=RCC_OSC_OUT
+PinOutPanel.RotationAngle=0
+ProjectManager.AskForMigrate=true
+ProjectManager.BackupPrevious=false
+ProjectManager.CompilerLinker=GCC
+ProjectManager.CompilerOptimize=6
+ProjectManager.ComputerToolchain=false
+ProjectManager.CoupleFile=false
+ProjectManager.CustomerFirmwarePackage=
+ProjectManager.DefaultFWLocation=true
+ProjectManager.DeletePrevious=true
+ProjectManager.DeviceId=STM32U083RCTx
+ProjectManager.FirmwarePackage=STM32Cube FW_U0 V1.3.0
+ProjectManager.FreePins=false
+ProjectManager.FreePinsContext=
+ProjectManager.HalAssertFull=false
+ProjectManager.HeapSize=0x200
+ProjectManager.KeepUserCode=true
+ProjectManager.LastFirmware=true
+ProjectManager.LibraryCopy=2
+ProjectManager.MainLocation=Core/Src
+ProjectManager.NoMain=false
+ProjectManager.PreviousToolchain=
+ProjectManager.ProjectBuild=false
+ProjectManager.ProjectFileName=cubemx.ioc
+ProjectManager.ProjectName=cubemx
+ProjectManager.ProjectStructure=
+ProjectManager.RegisterCallBack=
+ProjectManager.StackSize=0x400
+ProjectManager.TargetToolchain=CMake
+ProjectManager.ToolChainLocation=
+ProjectManager.UAScriptAfterPath=
+ProjectManager.UAScriptBeforePath=
+ProjectManager.UnderRoot=false
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART2_UART_Init-USART2-false-HAL-true,4-MX_USB_PCD_Init-USB-false-HAL-true,0-MX_CORTEX_M0+_Init-CORTEX_M0+-false-HAL-true,0-MX_PWR_Init-PWR-false-HAL-true
+RCC.ADCFreq_Value=56000000
+RCC.AHBFreq_Value=56000000
+RCC.APBFreq_Value=56000000
+RCC.APBTimFreq_Value=56000000
+RCC.CortexFreq_Value=56000000
+RCC.FCLKCortexFreq_Value=56000000
+RCC.FamilyName=M
+RCC.HCLKFreq_Value=56000000
+RCC.HSE_VALUE=4000000
+RCC.HSI48_VALUE=48000000
+RCC.HSI_VALUE=16000000
+RCC.I2C1Freq_Value=56000000
+RCC.I2C3Freq_Value=56000000
+RCC.IPParameters=ADCFreq_Value,AHBFreq_Value,APBFreq_Value,APBTimFreq_Value,CortexFreq_Value,FCLKCortexFreq_Value,FamilyName,HCLKFreq_Value,HSE_VALUE,HSI48_VALUE,HSI_VALUE,I2C1Freq_Value,I2C3Freq_Value,LPTIM1Freq_Value,LPTIM2Freq_Value,LPTIM3Freq_Value,LPUART1Freq_Value,LPUART2Freq_Value,LPUART3Freq_Value,LSCOPinFreq_Value,LSI_VALUE,MCO1PinFreq_Value,MCO2PinFreq_Value,MSIClockRangeVal,MSI_VALUE,PLLN,PLLPoutputFreq_Value,PLLQ,PLLQoutputFreq_Value,PLLRCLKFreq_Value,PWRFreq_Value,RNGFreq_Value,SYSCLKFreq_VALUE,SYSCLKSource,TIM15Freq_Value,TIM1Freq_Value,USART1Freq_Value,USART2Freq_Value,USBCLockSelection,USBFreq_Value,VCOInputFreq_Value,VCOOutputFreq_Value
+RCC.LPTIM1Freq_Value=56000000
+RCC.LPTIM2Freq_Value=56000000
+RCC.LPTIM3Freq_Value=56000000
+RCC.LPUART1Freq_Value=56000000
+RCC.LPUART2Freq_Value=56000000
+RCC.LPUART3Freq_Value=56000000
+RCC.LSCOPinFreq_Value=32000
+RCC.LSI_VALUE=32000
+RCC.MCO1PinFreq_Value=56000000
+RCC.MCO2PinFreq_Value=56000000
+RCC.MSIClockRangeVal=RCC_MSIRANGE_11
+RCC.MSI_VALUE=48000000
+RCC.PLLN=7
+RCC.PLLPoutputFreq_Value=56000000
+RCC.PLLQ=RCC_PLLQ_DIV4
+RCC.PLLQoutputFreq_Value=28000000
+RCC.PLLRCLKFreq_Value=56000000
+RCC.PWRFreq_Value=56000000
+RCC.RNGFreq_Value=48000000
+RCC.SYSCLKFreq_VALUE=56000000
+RCC.SYSCLKSource=RCC_SYSCLKSOURCE_PLLCLK
+RCC.TIM15Freq_Value=56000000
+RCC.TIM1Freq_Value=56000000
+RCC.USART1Freq_Value=56000000
+RCC.USART2Freq_Value=56000000
+RCC.USBCLockSelection=RCC_USBCLKSOURCE_HSI48
+RCC.USBFreq_Value=48000000
+RCC.VCOInputFreq_Value=16000000
+RCC.VCOOutputFreq_Value=112000000
+USART2.IPParameters=VirtualMode-Asynchronous
+USART2.VirtualMode-Asynchronous=VM_ASYNC
+USB.IPParameters=VirtualMode
+USB.VirtualMode=Device_Only
+VP_PWR_VS_SECSignals.Mode=Security/Privilege
+VP_PWR_VS_SECSignals.Signal=PWR_VS_SECSignals
+VP_SYS_VS_Systick.Mode=SysTick
+VP_SYS_VS_Systick.Signal=SYS_VS_Systick
+board=NUCLEO-U083RC
+boardIOC=true
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index 0f91d1f30..af39ae398 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -30,6 +30,9 @@
 
 #include "stm32u0xx_hal.h"
 #include "bsp/board_api.h"
+
+TU_ATTR_UNUSED static void Error_Handler(void) { }
+
 #include "board.h"
 
 //--------------------------------------------------------------------+
@@ -47,7 +50,7 @@ UART_HandleTypeDef UartHandle;
 #endif
 
 void board_init(void) {
-  board_stm32u0_clock_init();
+  SystemClock_Config();
 
   // Enable All GPIOs clocks
   __HAL_RCC_GPIOA_CLK_ENABLE();
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
index 5f25906d3..241323f62 100644
--- a/hw/bsp/stm32u0/family.mk
+++ b/hw/bsp/stm32u0/family.mk
@@ -48,4 +48,6 @@ SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
 
 # Linker
+MCU_VARIANT_UPPER = $(subst stm32u,STM32U,$(MCU_VARIANT))
+LD_FILE ?= $(FAMILY_PATH)/linker/$(MCU_VARIANT_UPPER)_FLASH.ld
 LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32u0/linker/STM32U083xx_FLASH.ld b/hw/bsp/stm32u0/linker/STM32U083xx_FLASH.ld
new file mode 100644
index 000000000..410d247a1
--- /dev/null
+++ b/hw/bsp/stm32u0/linker/STM32U083xx_FLASH.ld
@@ -0,0 +1,176 @@
+/**
+  ******************************************************************************
+  * @file      LinkerScript.ld
+  * @author    Auto-generated by STM32CubeIDE
+  * @brief     Linker script for STM32U083xx Device from STM32U0 series
+  *            256KBytes FLASH
+  *            40KBytes RAM
+  *
+  *            Set heap size, stack size and stack location according
+  *            to application requirements.
+  *
+  *            Set memory bank area and size if external memory is used
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2023 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the LICENSE file
+  * in the root directory of this software component.
+  * If no LICENSE file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+/* Memories definition */
+MEMORY
+{
+  RAM    (xrw)    : ORIGIN = 0x20000000,   LENGTH = 40K
+  FLASH    (rx)    : ORIGIN = 0x8000000,   LENGTH = 256K
+}
+
+/* Highest address of the user mode stack */
+_estack = ORIGIN(RAM) + LENGTH(RAM); /* end of "RAM" Ram type memory */
+
+_Min_Heap_Size = 0x200;  /* required amount of heap */
+_Min_Stack_Size = 0x800; /* required amount of stack */
+
+/* Sections */
+SECTIONS
+{
+  /* The startup code into "FLASH" Rom type memory */
+  .isr_vector :
+  {
+    . = ALIGN(4);
+    KEEP(*(.isr_vector)) /* Startup code */
+    . = ALIGN(4);
+  } >FLASH
+
+  /* The program code and other data into "FLASH" Rom type memory */
+  .text :
+  {
+    . = ALIGN(4);
+    *(.text)           /* .text sections (code) */
+    *(.text*)          /* .text* sections (code) */
+    *(.glue_7)         /* glue arm to thumb code */
+    *(.glue_7t)        /* glue thumb to arm code */
+    *(.eh_frame)
+
+    KEEP (*(.init))
+    KEEP (*(.fini))
+
+    . = ALIGN(4);
+    _etext = .;        /* define a global symbols at end of code */
+  } >FLASH
+
+  /* Constant data into "FLASH" Rom type memory */
+  .rodata :
+  {
+    . = ALIGN(4);
+    *(.rodata)         /* .rodata sections (constants, strings, etc.) */
+    *(.rodata*)        /* .rodata* sections (constants, strings, etc.) */
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM.extab   : {
+    . = ALIGN(4);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(4);
+  } >FLASH
+
+  .ARM : {
+    . = ALIGN(4);
+    __exidx_start = .;
+    *(.ARM.exidx*)
+    __exidx_end = .;
+    . = ALIGN(4);
+  } >FLASH
+
+  .preinit_array     :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .init_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)))
+    KEEP (*(.init_array*))
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  .fini_array :
+  {
+    . = ALIGN(4);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)))
+    KEEP (*(.fini_array*))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(4);
+  } >FLASH
+
+  /* Used by the startup to initialize data */
+  _sidata = LOADADDR(.data);
+
+  /* Initialized data sections into "RAM" Ram type memory */
+  .data :
+  {
+    . = ALIGN(4);
+    _sdata = .;        /* create a global symbol at data start */
+    *(.data)           /* .data sections */
+    *(.data*)          /* .data* sections */
+    *(.RamFunc)        /* .RamFunc sections */
+    *(.RamFunc*)       /* .RamFunc* sections */
+
+    . = ALIGN(4);
+    _edata = .;        /* define a global symbol at data end */
+
+  } >RAM AT> FLASH
+
+  /* Uninitialized data section into "RAM" Ram type memory */
+  . = ALIGN(4);
+  .bss :
+  {
+    /* This is used by the startup in order to initialize the .bss section */
+    _sbss = .;         /* define a global symbol at bss start */
+    __bss_start__ = _sbss;
+    *(.bss)
+    *(.bss*)
+    *(COMMON)
+
+    . = ALIGN(4);
+    _ebss = .;         /* define a global symbol at bss end */
+    __bss_end__ = _ebss;
+  } >RAM
+
+  /* User_heap_stack section, used to check that there is enough "RAM" Ram  type memory left */
+  ._user_heap_stack :
+  {
+    . = ALIGN(8);
+    PROVIDE ( end = . );
+    PROVIDE ( _end = . );
+    . = . + _Min_Heap_Size;
+    . = . + _Min_Stack_Size;
+    . = ALIGN(8);
+  } >RAM
+
+  /* Remove information from the compiler libraries */
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 : { *(.ARM.attributes) }
+}
diff --git a/hw/bsp/stm32u0/linker/stm32u083xx_flash.icf b/hw/bsp/stm32u0/linker/stm32u083xx_flash.icf
new file mode 100644
index 000000000..cfaa305af
--- /dev/null
+++ b/hw/bsp/stm32u0/linker/stm32u083xx_flash.icf
@@ -0,0 +1,32 @@
+/*###ICF### Section handled by ICF editor, don't touch! ****/
+/*-Editor annotation file-*/
+/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */
+/*-Specials-*/
+define symbol __ICFEDIT_intvec_start__ = 0x08000000;
+/*-Memory Regions-*/
+define symbol __ICFEDIT_region_ROM_start__ = 0x08000000;
+define symbol __ICFEDIT_region_ROM_end__   = 0x0803FFFF;
+define symbol __ICFEDIT_region_RAM_start__ = 0x20000000;
+define symbol __ICFEDIT_region_RAM_end__   = 0x20007FFF;
+
+/*-Sizes-*/
+define symbol __ICFEDIT_size_cstack__ = 0x800;
+define symbol __ICFEDIT_size_heap__   = 0x200;
+/**** End of ICF editor section. ###ICF###*/
+
+
+define memory mem with size = 4G;
+define region ROM_region      = mem:[from __ICFEDIT_region_ROM_start__   to __ICFEDIT_region_ROM_end__];
+define region RAM_region      = mem:[from __ICFEDIT_region_RAM_start__   to __ICFEDIT_region_RAM_end__];
+
+define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
+define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };
+
+initialize by copy { readwrite };
+do not initialize  { section .noinit };
+
+place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };
+
+place in ROM_region   { readonly };
+place in RAM_region   { readwrite,
+                        block CSTACK, block HEAP };
-- 
cgit v1.3.1


From 8e8bb9a66fb4c822489f76bac434cdf10a45db93 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 16 Mar 2026 22:30:03 +0700
Subject: add missing stm32u083nucleo board files

The board.cmake, board.mk, and board.h were created but not
included in the previous commit, causing CI cmake failure.

Co-Authored-By: Claude Opus 4.6 <noreply@anthropic.com>
---
 hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake |  9 +++
 hw/bsp/stm32u0/boards/stm32u083nucleo/board.h     | 99 +++++++++++++++++++++++
 hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk    |  9 +++
 3 files changed, 117 insertions(+)
 create mode 100644 hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake
 create mode 100644 hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
 create mode 100644 hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk

(limited to 'hw')

diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake
new file mode 100644
index 000000000..8d1dafc15
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.cmake
@@ -0,0 +1,9 @@
+set(MCU_VARIANT stm32u083xx)
+set(JLINK_DEVICE stm32u083rc)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32U083xx
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
new file mode 100644
index 000000000..23fddbef9
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
@@ -0,0 +1,99 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: NUCLEO-U083RC
+   url: https://www.st.com/en/evaluation-tools/nucleo-u083rc.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+// LED: PA5 (LD4, Green)
+#define LED_PORT              GPIOA
+#define LED_PIN               GPIO_PIN_5
+#define LED_STATE_ON          1
+
+// Button: PC13 (B1, Blue)
+#define BUTTON_PORT           GPIOC
+#define BUTTON_PIN            GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   0
+
+// UART: USART2 on PA2/PA3 (VCP via ST-Link)
+#define UART_DEV              USART2
+#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_GPIO_PORT        GPIOA
+#define UART_GPIO_AF          GPIO_AF7_USART2
+#define UART_TX_PIN           GPIO_PIN_2
+#define UART_RX_PIN           GPIO_PIN_3
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void SystemClock_Config(void) {
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+  RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
+
+  HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
+  RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV1;
+  RCC_OscInitStruct.PLL.PLLN = 7;
+  RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
+  RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4;
+  RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
+  HAL_RCC_OscConfig(&RCC_OscInitStruct);
+
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
+                              | RCC_CLOCKTYPE_PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
+
+  PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+  HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit);
+}
+
+static inline void board_vbus_sense_init(void) {
+}
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk
new file mode 100644
index 000000000..f5f3d41b3
--- /dev/null
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.mk
@@ -0,0 +1,9 @@
+MCU_VARIANT = stm32u083xx
+CFLAGS += \
+  -DSTM32U083xx
+
+# For flash-jlink target
+JLINK_DEVICE = STM32U083RC
+
+# flash target using on-board stlink
+flash: flash-stlink
-- 
cgit v1.3.1


From a3b2b4217630eea3f514ee042ee399e9ee397b8a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 17 Mar 2026 14:58:45 +0700
Subject: add hil host cdc test

---
 AGENTS.md                                   |  1 -
 hw/bsp/stm32h7/boards/stm32h743eval/board.h | 20 ++++++--
 hw/bsp/stm32h7/family.c                     | 20 +++++++-
 test/hil/hil_test.py                        | 75 +++++++++++++++++++++++++++++
 test/hil/tinyusb.json                       | 16 +++---
 5 files changed, 117 insertions(+), 15 deletions(-)

(limited to 'hw')

diff --git a/AGENTS.md b/AGENTS.md
index 4e510b01e..d491f94f1 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -27,7 +27,6 @@ information that does not match the info here.
 ## Build Examples
 
 Choose ONE of these approaches:
-
 **Option 1: Individual Example with CMake and Ninja (RECOMMENDED)**
 
 ```bash
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index d2f61a5ce..3914d7aac 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -205,13 +205,25 @@ static int32_t board_i2c_deinit(void) {
 }
 
 static int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
-  TU_ASSERT (HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
-  return 0;
+  for (int retry = 0; retry < 3; retry++) {
+    if (HAL_OK == HAL_I2C_Mem_Read(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000)) {
+      return 0;
+    }
+    HAL_Delay(10);
+  }
+  TU_ASSERT(0);
+  return -1;
 }
 
 static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Length) {
-  TU_ASSERT(HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000));
-  return 0;
+  for (int retry = 0; retry < 3; retry++) {
+    if (HAL_OK == HAL_I2C_Mem_Write(&i2c_handle, DevAddr, Reg, I2C_MEMADD_SIZE_8BIT, pData, Length, 10000)) {
+      return 0;
+    }
+    HAL_Delay(10);
+  }
+  TU_ASSERT(0);
+  return -1;
 }
 
 static int32_t i2c_get_tick(void) {
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index c94c2e755..a95674217 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -275,9 +275,25 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  // clear overrun error if any
+  if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_ORE)) {
+    __HAL_UART_CLEAR_FLAG(&UartHandle, UART_CLEAR_OREF);
+  }
+  for (int i = 0; i < len; i++) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[i] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 7cffd2da8..65585d929 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -416,6 +416,80 @@ def test_host_device_info(board):
     return 0
 
 
+def test_host_cdc_msc_hid(board):
+    flasher = board['flasher']
+    cdc_devs = [d for d in board['tests'].get('dev_attached', []) if d.get('is_cdc')]
+    if not cdc_devs:
+        return
+
+    port = get_serial_dev(flasher["uid"], None, None, 0)
+    ser = open_serial_dev(port)
+    ser.timeout = 0.1
+
+    # reset device to catch mount messages
+    ret = globals()[f'reset_{flasher["name"].lower()}'](board)
+    assert ret.returncode == 0, 'Failed to reset device'
+
+    # Wait for CDC mounted message
+    data = b''
+    timeout = ENUM_TIMEOUT
+    while timeout > 0:
+        new_data = ser.read(ser.in_waiting or 1)
+        if new_data:
+            data += new_data
+            if b'CDC Interface is mounted' in data:
+                break
+        time.sleep(0.1)
+        timeout -= 0.1
+    assert b'CDC Interface is mounted' in data, 'CDC device not mounted on host'
+
+    # Lookup serial chip name from vid_pid
+    vid_pid_name = {
+        '0403_6001': 'FTDI', '0403_6010': 'FTDI', '0403_6011': 'FTDI', '0403_6014': 'FTDI',
+        '10c4_ea60': 'CP210x', '10c4_ea70': 'CP210x',
+        '067b_2303': 'PL2303', '067b_23a3': 'PL2303',
+        '1a86_7523': 'CH340', '1a86_7522': 'CH340',
+        '1a86_55d3': 'CH9102', '1a86_55d4': 'CH9102',
+    }
+    dev = cdc_devs[0]
+    chip_name = vid_pid_name.get(dev['vid_pid'], dev['vid_pid'])
+    for l in data.decode('utf-8', errors='ignore').splitlines():
+        if 'CDC Interface is mounted' in l:
+            print(f'\r\n  {chip_name}: {l} ', end='')
+
+    # CDC echo test via flasher serial
+    time.sleep(2)
+    ser.reset_input_buffer()
+
+    def rand_ascii(length):
+        return "".join(random.choices(string.ascii_letters + string.digits, k=length)).encode("ascii")
+
+    sizes = [8, 32, 64, 128]
+    for size in sizes:
+        test_data = rand_ascii(size)
+        ser.reset_input_buffer()
+
+        # Write byte-by-byte with delay to avoid UART overrun
+        for b in test_data:
+            ser.write(bytes([b]))
+            ser.flush()
+            time.sleep(0.001)
+
+        # Read echo back with timeout
+        echo = b''
+        t = 5.0
+        while t > 0 and len(echo) < size:
+            rd = ser.read(max(1, ser.in_waiting))
+            if rd:
+                echo += rd
+            time.sleep(0.05)
+            t -= 0.05
+        assert echo == test_data, (f'CDC echo wrong data ({size} bytes):\n'
+                                   f'  expected: {test_data}\n  received: {echo}')
+
+    ser.close()
+
+
 # -------------------------------------------------------------
 # Tests: device
 # -------------------------------------------------------------
@@ -763,6 +837,7 @@ dual_tests = [
 ]
 
 host_test = [
+    'host/cdc_msc_hid',
     'host/device_info',
 ]
 
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index e8449ba74..eaf60c6ce 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -8,7 +8,7 @@
             },
             "tests": {
                 "only": ["device/cdc_msc_freertos", "device/hid_composite_freertos", "host/device_info"],
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002427"}]
+                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002427", "is_cdc": true}]
             },
             "flasher": {
                 "name": "esptool",
@@ -26,7 +26,7 @@
             },
             "tests": {
                 "only": ["device/cdc_msc_freertos", "device/hid_composite_freertos", "host/device_info"],
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2005402"}]
+                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2005402", "is_cdc": true}]
             },
             "flasher": {
                 "name": "esptool",
@@ -67,7 +67,7 @@
             },
             "tests": {
                 "device": true, "host": false, "dual": true,
-                "dev_attached": [{"vid_pid": "067b_2303", "serial": "0"}],
+                "dev_attached": [{"vid_pid": "067b_2303", "serial": "0", "is_cdc": true}],
                 "comment": "pl23x"
             },
             "flasher": {
@@ -93,7 +93,7 @@
             "uid": "BAE96FB95AFA6DBB8F00005002001200",
             "tests": {
                 "device": true, "host": true, "dual": true,
-                "dev_attached": [{"vid_pid": "10c4_ea60", "serial": "0001"}],
+                "dev_attached": [{"vid_pid": "10c4_ea60", "serial": "0001", "is_cdc": true}],
                 "comment": "cp2102"
             },
             "flasher": {
@@ -136,7 +136,7 @@
             },
             "tests": {
                 "device": true, "host": true, "dual": true,
-                "dev_attached": [{"vid_pid": "1a86_7523", "serial": "0"}],
+                "dev_attached": [{"vid_pid": "1a86_7523", "serial": "0", "is_cdc": true}],
                 "comment": "ch34x"
             },
             "flasher": {
@@ -150,7 +150,7 @@
             "uid": "E6614C311B764A37",
             "tests": {
                 "device": false, "host": true, "dual": false,
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2023934"}]
+                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2023934", "is_cdc": true}]
             },
             "flasher": {
                 "name": "openocd",
@@ -167,7 +167,7 @@
             },
             "tests": {
                 "device": true, "host": true, "dual": true,
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "533D004242"}]
+                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "533D004242", "is_cdc": true}]
             },
             "flasher": {
                 "name": "openocd",
@@ -193,7 +193,7 @@
             },
             "tests": {
                 "device": true, "host": true, "dual": false,
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2003414"}]
+                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2003414", "is_cdc": true}]
             },
             "flasher": {
                 "name": "jlink",
-- 
cgit v1.3.1


From 45e80a1042ea802b74ebe97db350f9da17cb2fe4 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 17 Mar 2026 21:38:46 +0700
Subject: add hil test for host msc and cdc

---
 AGENTS.md                                          |   7 +
 LICENSE                                            |   2 +-
 examples/host/msc_file_explorer/src/msc_app.c      |  11 +-
 .../adafruit_feather_rp2040_usb_host/board.cmake   |   1 +
 .../rp2040/boards/adafruit_fruit_jam/board.cmake   |   2 +
 .../boards/adafruit_metro_rp2350/board.cmake       |   2 +
 hw/bsp/rp2040/family.cmake                         |   6 +
 test/hil/hil_test.py                               | 169 ++++++++++++++++++---
 test/hil/tinyusb.json                              |  19 +++
 9 files changed, 195 insertions(+), 24 deletions(-)

(limited to 'hw')

diff --git a/AGENTS.md b/AGENTS.md
index d491f94f1..eb6b737c3 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -151,6 +151,13 @@ openocd -f interface/stlink.cfg -f target/stm32h7x.cfg
 openocd -f interface/jlink.cfg -f target/stm32h7x.cfg
 ```
 
+For **rp2040/rp2350** with a CMSIS-DAP probe (e.g. Picoprobe, debugprobe):
+```bash
+openocd -f interface/cmsis-dap.cfg -f target/rp2040.cfg -c "adapter speed 5000"
+# or for rp2350:
+openocd -f interface/cmsis-dap.cfg -f target/rp2350.cfg -c "adapter speed 5000"
+```
+
 For boards that define `OPENOCD_OPTION` in `board.cmake`, use those options directly:
 ```bash
 openocd $(cat hw/bsp/FAMILY/boards/BOARD/board.cmake | grep OPENOCD_OPTION | ...)
diff --git a/LICENSE b/LICENSE
index ddd4ab410..0680c2f05 100644
--- a/LICENSE
+++ b/LICENSE
@@ -1,6 +1,6 @@
 The MIT License (MIT)
 
-Copyright (c) 2018, hathach (tinyusb.org)
+Copyright (c) 2012-2026, hathach (tinyusb.org)
 
 Permission is hereby granted, free of charge, to any person obtaining a copy
 of this software and associated documentation files (the "Software"), to deal
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 6ac63e937..238af5431 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -130,11 +130,16 @@ static bool inquiry_complete_cb(uint8_t dev_addr, const tuh_msc_complete_data_t
   drive_path[0] += drive_num;
 
   if (f_mount(&fatfs[drive_num], drive_path, 1) != FR_OK) {
-    puts("mount failed");
+    printf("mount failed\r\n");
+    return true;
   }
 
   // change to newly mounted drive
-  f_chdir(drive_path);
+  f_chdrive(drive_path);
+  FRESULT rc = f_chdir("/");
+  if (rc != FR_OK) {
+    printf("chdir failed: %d\r\n", rc);
+  }
 
   // print the drive label
   //  char label[34];
@@ -148,7 +153,7 @@ static bool inquiry_complete_cb(uint8_t dev_addr, const tuh_msc_complete_data_t
 
 //------------- IMPLEMENTATION -------------//
 void tuh_msc_mount_cb(uint8_t dev_addr) {
-  printf("A MassStorage device is mounted\r\n");
+  printf("A MassStorage device (addr = %u) is mounted\r\n", dev_addr);
 
   const uint8_t lun = 0;
   tuh_msc_inquiry(dev_addr, lun, &scsi_resp.inquiry, inquiry_complete_cb, 0);
diff --git a/hw/bsp/rp2040/boards/adafruit_feather_rp2040_usb_host/board.cmake b/hw/bsp/rp2040/boards/adafruit_feather_rp2040_usb_host/board.cmake
index 41897f644..66758d7d0 100644
--- a/hw/bsp/rp2040/boards/adafruit_feather_rp2040_usb_host/board.cmake
+++ b/hw/bsp/rp2040/boards/adafruit_feather_rp2040_usb_host/board.cmake
@@ -1,2 +1,3 @@
 set(PICO_PLATFORM rp2040)
 set(PICO_BOARD adafruit_feather_rp2040_usb_host)
+set(CFG_TUH_RPI_PIO_USB 1)
diff --git a/hw/bsp/rp2040/boards/adafruit_fruit_jam/board.cmake b/hw/bsp/rp2040/boards/adafruit_fruit_jam/board.cmake
index 4ab8a5477..d3535fa36 100644
--- a/hw/bsp/rp2040/boards/adafruit_fruit_jam/board.cmake
+++ b/hw/bsp/rp2040/boards/adafruit_fruit_jam/board.cmake
@@ -2,3 +2,5 @@ set(PICO_PLATFORM rp2350-arm-s)
 set(PICO_BOARD adafruit_fruit_jam)
 set(PICO_BOARD_HEADER_DIRS ${CMAKE_CURRENT_LIST_DIR})
 #set(OPENOCD_SERIAL E6614103E78E8324)
+
+set(CFG_TUH_RPI_PIO_USB 1)
diff --git a/hw/bsp/rp2040/boards/adafruit_metro_rp2350/board.cmake b/hw/bsp/rp2040/boards/adafruit_metro_rp2350/board.cmake
index 9a58821a5..f1f54d217 100644
--- a/hw/bsp/rp2040/boards/adafruit_metro_rp2350/board.cmake
+++ b/hw/bsp/rp2040/boards/adafruit_metro_rp2350/board.cmake
@@ -2,3 +2,5 @@ set(PICO_PLATFORM rp2350-arm-s)
 set(PICO_BOARD adafruit_metro_rp2350)
 set(PICO_BOARD_HEADER_DIRS ${CMAKE_CURRENT_LIST_DIR})
 #set(OPENOCD_SERIAL E6614103E78E8324)
+
+set(CFG_TUH_RPI_PIO_USB 1)
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index e31abe50b..2e2cd436a 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -72,6 +72,12 @@ target_compile_definitions(tinyusb_common_base INTERFACE
 	CFG_TUSB_DEBUG=${TINYUSB_DEBUG_LEVEL}
 )
 
+if (CFG_TUH_RPI_PIO_USB)
+	target_compile_definitions(tinyusb_common_base INTERFACE
+		CFG_TUH_RPI_PIO_USB=1
+	)
+endif()
+
 target_link_libraries(tinyusb_common_base INTERFACE
 	hardware_structs
 	hardware_irq
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 65585d929..a2c054e61 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -80,6 +80,11 @@ flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
 echo "Ready for Remote Connections"
 """
 
+MSC_README_TXT = \
+b"This is tinyusb's MassStorage Class demo.\r\n\r\n\
+If you find any bugs or get any questions, feel free to file an\r\n\
+issue at github.com/hathach/tinyusb"
+
 # -------------------------------------------------------------
 # Path
 # -------------------------------------------------------------
@@ -360,10 +365,27 @@ def test_dual_host_info_to_device_cdc(board):
     declared_devs = [f'{d["vid_pid"]}_{d["serial"]}' for d in board['tests']['dev_attached']]
     port = get_serial_dev(uid, 'TinyUSB', "TinyUSB_Device", 0)
     ser = open_serial_dev(port)
+    ser.timeout = 0.1
 
-    # read from cdc, first line should contain vid/pid and serial
-    data = ser.read(10000)
+    # read until all expected devices are enumerated
+    data = b''
+    timeout = ENUM_TIMEOUT
+    while timeout > 0:
+        new_data = ser.read(ser.in_waiting or 1)
+        if new_data:
+            data += new_data
+        # check if all devices found
+        enum_dev_sn = []
+        for l in data.decode('utf-8', errors='ignore').splitlines():
+            vid_pid_sn = re.search(r'ID ([0-9a-fA-F]+):([0-9a-fA-F]+) SN (\w+)', l)
+            if vid_pid_sn:
+                enum_dev_sn.append(f'{vid_pid_sn.group(1)}_{vid_pid_sn.group(2)}_{vid_pid_sn.group(3)}')
+        if set(declared_devs).issubset(set(enum_dev_sn)):
+            break
+        time.sleep(0.1)
+        timeout -= 0.1
     ser.close()
+
     if len(data) == 0:
         assert False, 'No data from device'
     lines = data.decode('utf-8', errors='ignore').splitlines()
@@ -391,13 +413,31 @@ def test_host_device_info(board):
 
     port = get_serial_dev(flasher["uid"], None, None, 0)
     ser = open_serial_dev(port)
+    ser.timeout = 0.1
 
     # reset device since we can miss the first line
     ret = globals()[f'reset_{flasher["name"].lower()}'](board)
-    assert ret.returncode == 0,  'Failed to reset device'
+    assert ret.returncode == 0, 'Failed to reset device'
 
-    data = ser.read(10000)
+    # read until all expected devices are enumerated
+    data = b''
+    timeout = ENUM_TIMEOUT
+    while timeout > 0:
+        new_data = ser.read(ser.in_waiting or 1)
+        if new_data:
+            data += new_data
+        # check if all devices found
+        enum_dev_sn = []
+        for l in data.decode('utf-8', errors='ignore').splitlines():
+            vid_pid_sn = re.search(r'ID ([0-9a-fA-F]+):([0-9a-fA-F]+) SN (\w+)', l)
+            if vid_pid_sn:
+                enum_dev_sn.append(f'{vid_pid_sn.group(1)}_{vid_pid_sn.group(2)}_{vid_pid_sn.group(3)}')
+        if set(declared_devs).issubset(set(enum_dev_sn)):
+            break
+        time.sleep(0.1)
+        timeout -= 0.1
     ser.close()
+
     if len(data) == 0:
         assert False, 'No data from device'
     lines = data.decode('utf-8', errors='ignore').splitlines()
@@ -416,10 +456,25 @@ def test_host_device_info(board):
     return 0
 
 
+def print_msc_info(lines):
+    """Print MSC inquiry and disk size on a single line"""
+    inquiry = ''
+    disk_size = ''
+    for l in lines:
+        if re.match(r'^[A-Za-z].*\s+rev\s+', l):
+            inquiry = l.strip()
+        if 'Disk Size' in l:
+            disk_size = l.strip()
+    if inquiry or disk_size:
+        print(f'\r\n  {inquiry} {disk_size} ', end='')
+
+
 def test_host_cdc_msc_hid(board):
     flasher = board['flasher']
-    cdc_devs = [d for d in board['tests'].get('dev_attached', []) if d.get('is_cdc')]
-    if not cdc_devs:
+    dev_attached = board['tests'].get('dev_attached', [])
+    cdc_devs = [d for d in dev_attached if d.get('is_cdc')]
+    msc_devs = [d for d in dev_attached if d.get('is_msc')]
+    if not cdc_devs and not msc_devs:
         return
 
     port = get_serial_dev(flasher["uid"], None, None, 0)
@@ -430,18 +485,21 @@ def test_host_cdc_msc_hid(board):
     ret = globals()[f'reset_{flasher["name"].lower()}'](board)
     assert ret.returncode == 0, 'Failed to reset device'
 
-    # Wait for CDC mounted message
+    # Wait for all expected mount messages
     data = b''
     timeout = ENUM_TIMEOUT
+    wait_cdc = len(cdc_devs) > 0
+    wait_msc = len(msc_devs) > 0
     while timeout > 0:
         new_data = ser.read(ser.in_waiting or 1)
         if new_data:
             data += new_data
-            if b'CDC Interface is mounted' in data:
+            cdc_ok = (not wait_cdc) or (b'CDC Interface is mounted' in data)
+            msc_ok = (not wait_msc) or (b'Disk Size' in data)
+            if cdc_ok and msc_ok:
                 break
         time.sleep(0.1)
         timeout -= 0.1
-    assert b'CDC Interface is mounted' in data, 'CDC device not mounted on host'
 
     # Lookup serial chip name from vid_pid
     vid_pid_name = {
@@ -451,13 +509,29 @@ def test_host_cdc_msc_hid(board):
         '1a86_7523': 'CH340', '1a86_7522': 'CH340',
         '1a86_55d3': 'CH9102', '1a86_55d4': 'CH9102',
     }
-    dev = cdc_devs[0]
-    chip_name = vid_pid_name.get(dev['vid_pid'], dev['vid_pid'])
-    for l in data.decode('utf-8', errors='ignore').splitlines():
-        if 'CDC Interface is mounted' in l:
-            print(f'\r\n  {chip_name}: {l} ', end='')
+
+    lines = data.decode('utf-8', errors='ignore').splitlines()
+
+    # Verify and print CDC mount
+    if cdc_devs:
+        assert b'CDC Interface is mounted' in data, 'CDC device not mounted on host'
+        dev = cdc_devs[0]
+        chip_name = vid_pid_name.get(dev['vid_pid'], dev['vid_pid'])
+        for l in lines:
+            if 'CDC Interface is mounted' in l:
+                print(f'\r\n  {chip_name}: {l} ', end='')
+
+    # Verify and print MSC mount (inquiry + disk size)
+    if msc_devs:
+        assert b'MassStorage device is mounted' in data, 'MSC device not mounted on host'
+        assert b'Disk Size' in data, 'MSC Disk Size not reported'
+        print_msc_info(lines)
 
     # CDC echo test via flasher serial
+    if not cdc_devs:
+        ser.close()
+        return
+
     time.sleep(2)
     ser.reset_input_buffer()
 
@@ -490,6 +564,65 @@ def test_host_cdc_msc_hid(board):
     ser.close()
 
 
+def test_host_msc_file_explorer(board):
+    flasher = board['flasher']
+    msc_devs = [d for d in board['tests'].get('dev_attached', []) if d.get('is_msc')]
+    if not msc_devs:
+        return
+
+    port = get_serial_dev(flasher["uid"], None, None, 0)
+    ser = open_serial_dev(port)
+    ser.timeout = 0.1
+
+    # reset device to catch mount messages
+    ret = globals()[f'reset_{flasher["name"].lower()}'](board)
+    assert ret.returncode == 0, 'Failed to reset device'
+
+    # Wait for MSC mount (Disk Size message)
+    data = b''
+    timeout = ENUM_TIMEOUT
+    while timeout > 0:
+        new_data = ser.read(ser.in_waiting or 1)
+        if new_data:
+            data += new_data
+            if b'Disk Size' in data:
+                break
+        time.sleep(0.1)
+        timeout -= 0.1
+    assert b'Disk Size' in data, 'MSC device not mounted'
+    lines = data.decode('utf-8', errors='ignore').splitlines()
+    print_msc_info(lines)
+
+    # Send "cat README.TXT" and read response
+    time.sleep(1)
+    ser.reset_input_buffer()
+    for ch in 'cat README.TXT\r':
+        ser.write(ch.encode())
+        ser.flush()
+        time.sleep(0.002)
+
+    # Read response
+    resp = b''
+    t = 10.0
+    while t > 0:
+        rd = ser.read(max(1, ser.in_waiting))
+        if rd:
+            resp += rd
+        # wait for prompt after command output
+        if b'>' in resp and resp.rstrip().endswith(b'>'):
+            break
+        time.sleep(0.05)
+        t -= 0.05
+
+    # Verify response contains README content
+    resp_text = resp.decode('utf-8', errors='ignore')
+    assert MSC_README_TXT.decode() in resp_text, (f'MSC README.TXT not found in response:\n'
+                                                   f'  received: {resp_text}')
+    print('README.TXT matched ', end='')
+
+    ser.close()
+
+
 # -------------------------------------------------------------
 # Tests: device
 # -------------------------------------------------------------
@@ -565,12 +698,7 @@ def test_device_cdc_msc(board):
 
     # MSC Block test
     data = read_disk_file(uid, 0, 'README.TXT')
-    readme = \
-        b"This is tinyusb's MassStorage Class demo.\r\n\r\n\
-If you find any bugs or get any questions, feel free to file an\r\n\
-issue at github.com/hathach/tinyusb"
-
-    assert data == readme, f'MSC wrong data in README.TXT\n expected: {readme.decode()}\n received: {data.decode()}'
+    assert data == MSC_README_TXT, f'MSC wrong data in README.TXT\n expected: {MSC_README_TXT.decode()}\n received: {data.decode()}'
 
 
 def test_device_cdc_msc_freertos(board):
@@ -838,6 +966,7 @@ dual_tests = [
 
 host_test = [
     'host/cdc_msc_hid',
+    'host/msc_file_explorer',
     'host/device_info',
 ]
 
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index eaf60c6ce..e84e9672b 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -175,6 +175,25 @@
                 "args": "-f interface/cmsis-dap.cfg -f target/rp2350.cfg -c \"adapter speed 5000\""
             }
         },
+        {
+            "name": "adafruit_fruit_jam",
+            "uid": "2B0DC7A45781189E",
+            "tests": {
+                "device": false,
+                "host": true,
+                "dual": true,
+                "dev_attached": [
+                    {"vid_pid": "0403_6001", "serial": "0", "is_cdc": true},
+                    {"vid_pid": "058f_6387", "serial": "A8BEE062633D", "is_msc": true,
+                        "msc_disk_size": 3730, "msc_inquiry": "Generic  Flash Disk       rev 8.07"}
+                ]
+            },
+            "flasher": {
+                "name": "openocd",
+                "uid": "E6614103E78E8324",
+                "args": "-f interface/cmsis-dap.cfg -f target/rp2350.cfg -c \"adapter speed 5000\""
+            }
+        },
         {
             "name": "stm32f072disco",
             "uid": "3A001A001357364230353532",
-- 
cgit v1.3.1


From 3e47f1fcce4d7b445a0ed161cbd860a87eafff30 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 18 Mar 2026 00:20:42 +0700
Subject: add board_uart_read() for f7

---
 .github/actions/get_deps/action.yml         |  8 ++++++--
 hw/bsp/stm32f7/family.c                     | 28 +++++++++++++++++++++++++---
 hw/bsp/stm32h7/boards/stm32h743eval/board.h |  2 --
 3 files changed, 31 insertions(+), 7 deletions(-)

(limited to 'hw')

diff --git a/.github/actions/get_deps/action.yml b/.github/actions/get_deps/action.yml
index bbe94f0fa..ff6972af6 100644
--- a/.github/actions/get_deps/action.yml
+++ b/.github/actions/get_deps/action.yml
@@ -9,8 +9,12 @@ runs:
   using: "composite"
   steps:
     - name: Checkout pico-sdk for rp2040
-      if: contains(inputs.arg, 'rp2040') || contains(inputs.arg, 'raspberry_pi_pico')
-      uses: actions/checkout@v4
+      if: >-
+        contains(inputs.arg, 'rp2040') ||
+        contains(inputs.arg, 'rp2350') ||
+        contains(inputs.arg, 'raspberry_pi_pico') ||
+        contains(inputs.arg, 'adafruit_fruit_jam')
+      uses: actions/checkout@v6
       with:
         repository: raspberrypi/pico-sdk
         ref: master
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index ce9049abe..f8145cd63 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -289,14 +289,31 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  // clear overrun error if any
+  if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_ORE)) {
+    __HAL_UART_CLEAR_FLAG(&UartHandle, UART_CLEAR_OREF);
+  }
+  for (int i = 0; i < len; i++) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[i] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
+  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
+  buf, len, 0xffff);
   return len;
 #else
   (void) buf; (void) len;
@@ -316,6 +333,11 @@ uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 
+#elif CFG_TUSB_OS == OPT_OS_THREADX
+// Keep HAL_GetTick() working for HAL functions called from board_init()
+void osal_threadx_tick_cb(void) {
+  HAL_IncTick();
+}
 #endif
 
 void HardFault_Handler(void) {
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index 3914d7aac..ea91976c8 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -211,7 +211,6 @@ static int32_t i2c_readreg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint1
     }
     HAL_Delay(10);
   }
-  TU_ASSERT(0);
   return -1;
 }
 
@@ -222,7 +221,6 @@ static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint
     }
     HAL_Delay(10);
   }
-  TU_ASSERT(0);
   return -1;
 }
 
-- 
cgit v1.3.1


From 6b0d20d70dbe0462fc89a92ab0c0ca04a9c625d0 Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Thu, 26 Feb 2026 20:46:39 +0800
Subject: add WCH CH58x (CH582/CH583) BSP and USB FS device/host driver

---
 hw/bsp/ch58x/boards/yd-ch582m/board.cmake |   5 +
 hw/bsp/ch58x/boards/yd-ch582m/board.h     |  57 +++
 hw/bsp/ch58x/boards/yd-ch582m/board.mk    |   3 +
 hw/bsp/ch58x/ch58x_it.c                   |  37 ++
 hw/bsp/ch58x/ch58x_it.h                   |  46 ++
 hw/bsp/ch58x/debug_uart.c                 |  80 ++++
 hw/bsp/ch58x/debug_uart.h                 |  36 ++
 hw/bsp/ch58x/family.c                     | 181 ++++++++
 hw/bsp/ch58x/family.cmake                 | 103 +++++
 hw/bsp/ch58x/family.mk                    |  49 ++
 hw/bsp/ch58x/linker/ch582.ld              | 167 +++++++
 hw/bsp/ch58x/system_ch58x.c               |  39 ++
 hw/bsp/ch58x/system_ch58x.h               |  43 ++
 hw/bsp/ch58x/wch-riscv.cfg                |  17 +
 src/common/tusb_mcu.h                     |  14 +
 src/portable/wch/ch58x_usbfs_reg.h        | 299 +++++++++++++
 src/portable/wch/dcd_ch58x_usbfs.c        | 583 ++++++++++++++++++++++++
 src/portable/wch/hcd_ch58x_usbfs.c        | 712 ++++++++++++++++++++++++++++++
 src/tusb_option.h                         |   1 +
 19 files changed, 2472 insertions(+)
 create mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.cmake
 create mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.h
 create mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.mk
 create mode 100644 hw/bsp/ch58x/ch58x_it.c
 create mode 100644 hw/bsp/ch58x/ch58x_it.h
 create mode 100644 hw/bsp/ch58x/debug_uart.c
 create mode 100644 hw/bsp/ch58x/debug_uart.h
 create mode 100644 hw/bsp/ch58x/family.c
 create mode 100644 hw/bsp/ch58x/family.cmake
 create mode 100644 hw/bsp/ch58x/family.mk
 create mode 100644 hw/bsp/ch58x/linker/ch582.ld
 create mode 100644 hw/bsp/ch58x/system_ch58x.c
 create mode 100644 hw/bsp/ch58x/system_ch58x.h
 create mode 100644 hw/bsp/ch58x/wch-riscv.cfg
 create mode 100644 src/portable/wch/ch58x_usbfs_reg.h
 create mode 100644 src/portable/wch/dcd_ch58x_usbfs.c
 create mode 100644 src/portable/wch/hcd_ch58x_usbfs.c

(limited to 'hw')

diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.cmake b/hw/bsp/ch58x/boards/yd-ch582m/board.cmake
new file mode 100644
index 000000000..4129c4550
--- /dev/null
+++ b/hw/bsp/ch58x/boards/yd-ch582m/board.cmake
@@ -0,0 +1,5 @@
+set(LD_FLASH_SIZE 448K)
+set(LD_RAM_SIZE 32K)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.h b/hw/bsp/ch58x/boards/yd-ch582m/board.h
new file mode 100644
index 000000000..6e25dbdd3
--- /dev/null
+++ b/hw/bsp/ch58x/boards/yd-ch582m/board.h
@@ -0,0 +1,57 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* metadata:
+   name: yd-ch582m from vcc-gnd studio
+   url: http://vcc-gnd.com/
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED: PB4 on yd-ch582m board
+#define LED_PIN               GPIO_Pin_4
+#define LED_STATE_ON          0
+
+// Directly reuse BOOT pin as user button
+#define BUTTON_PIN            GPIO_Pin_22
+#define BUTTON_STATE_ACTIVE   0
+
+// UART: UART1 TX=PA9, RX=PA8
+#define CFG_BOARD_UART_BAUDRATE   115200
+
+// Dual-port: USB1 (rhport 0) = Device, USB2 (rhport 1) = Host
+// Swap these two if you want the opposite assignment
+#define BOARD_TUD_RHPORT  0
+#define BOARD_TUH_RHPORT  1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.mk b/hw/bsp/ch58x/boards/yd-ch582m/board.mk
new file mode 100644
index 000000000..a13979799
--- /dev/null
+++ b/hw/bsp/ch58x/boards/yd-ch582m/board.mk
@@ -0,0 +1,3 @@
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=448K \
+  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch58x/ch58x_it.c b/hw/bsp/ch58x/ch58x_it.c
new file mode 100644
index 000000000..2211e1eda
--- /dev/null
+++ b/hw/bsp/ch58x/ch58x_it.c
@@ -0,0 +1,37 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "ch58x_it.h"
+
+// NMI exception handler
+__INTERRUPT __HIGH_CODE void NMI_Handler(void) {
+  while (1) {}
+}
+
+// Hard Fault exception handler
+__INTERRUPT __HIGH_CODE void HardFault_Handler(void) {
+  while (1) {}
+}
diff --git a/hw/bsp/ch58x/ch58x_it.h b/hw/bsp/ch58x/ch58x_it.h
new file mode 100644
index 000000000..c98f732e1
--- /dev/null
+++ b/hw/bsp/ch58x/ch58x_it.h
@@ -0,0 +1,46 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef __CH58X_IT_H
+#define __CH58X_IT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "CH58x_common.h"
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void USB_IRQHandler(void);
+void USB2_IRQHandler(void);
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __CH58X_IT_H */
diff --git a/hw/bsp/ch58x/debug_uart.c b/hw/bsp/ch58x/debug_uart.c
new file mode 100644
index 000000000..e63606f33
--- /dev/null
+++ b/hw/bsp/ch58x/debug_uart.c
@@ -0,0 +1,80 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "debug_uart.h"
+#include "CH58x_common.h"
+
+//--------------------------------------------------------------------+
+// Ring buffer based UART TX for non-blocking writes
+//--------------------------------------------------------------------+
+
+#define UART_RINGBUFFER_SIZE_TX  128
+#define UART_RINGBUFFER_MASK_TX  (UART_RINGBUFFER_SIZE_TX - 1)
+
+static char tx_buf[UART_RINGBUFFER_SIZE_TX];
+static unsigned int tx_produce;
+static volatile unsigned int tx_consume;
+
+void uart_write(char c) {
+  unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
+
+  // If ring buffer is full, wait
+  while (tx_produce_next == tx_consume) {}
+
+  // If UART TX FIFO is empty and no pending data, send directly
+  if ((tx_consume == tx_produce) && (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP)) {
+    R8_UART1_THR = c;
+  } else {
+    tx_buf[tx_produce] = c;
+    tx_produce = tx_produce_next;
+  }
+}
+
+void uart_sync(void) {
+  // Wait for ring buffer to drain
+  while (tx_consume != tx_produce) {
+    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
+      R8_UART1_THR = tx_buf[tx_consume];
+      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
+    }
+  }
+  // Wait for last byte to finish transmitting
+  while (!(R8_UART1_LSR & RB_LSR_TX_ALL_EMP)) {}
+}
+
+void usart_printf_init(uint32_t baudrate) {
+  tx_produce = 0;
+  tx_consume = 0;
+
+  // Configure UART1 pins: TX=PA9, RX=PA8
+  GPIOA_SetBits(GPIO_Pin_9);
+  GPIOA_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP_5mA);
+  GPIOA_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_PU);
+
+  // Init UART1 with specified baud rate
+  UART1_DefInit();
+  UART1_BaudRateCfg(baudrate);
+}
diff --git a/hw/bsp/ch58x/debug_uart.h b/hw/bsp/ch58x/debug_uart.h
new file mode 100644
index 000000000..458d838d9
--- /dev/null
+++ b/hw/bsp/ch58x/debug_uart.h
@@ -0,0 +1,36 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef DEBUG_UART_H_
+#define DEBUG_UART_H_
+
+#include <stdint.h>
+
+void uart_write(char c);
+void uart_sync(void);
+void usart_printf_init(uint32_t baudrate);
+
+#endif /* DEBUG_UART_H_ */
diff --git a/hw/bsp/ch58x/family.c b/hw/bsp/ch58x/family.c
new file mode 100644
index 000000000..463ca5637
--- /dev/null
+++ b/hw/bsp/ch58x/family.c
@@ -0,0 +1,181 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: WCH
+*/
+
+// WCH SDK's DEBUG macro enables a _write() that conflicts with TinyUSB's.
+// TinyUSB uses UART1 for printf via debug_uart.c, so DEBUG is not needed.
+// If you need a different UART or want to keep SDK's DEBUG, modify
+// debug_uart.c (TinyUSB side) or CH58x_sys.c (SDK side) to remove one _write().
+// If done, remove this #error to continue.
+#ifdef DEBUG
+  #error "Remove the DEBUG macro from preprocessor defines to avoid "  \
+         "duplicate _write() between WCH SDK and TinyUSB. "            \
+         "TinyUSB uses UART1 by default (see debug_uart.c)."
+#endif
+
+#include "debug_uart.h"
+#include "CH58x_common.h"
+#include "ch58x_it.h"
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+
+__INTERRUPT __HIGH_CODE void USB_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+__INTERRUPT __HIGH_CODE void USB2_IRQHandler(void) {
+  tusb_int_handler(1, true);
+}
+
+//--------------------------------------------------------------------+
+// SysTick
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+__INTERRUPT __HIGH_CODE void SysTick_Handler(void) {
+  SysTick->SR = 0;
+  system_ticks++;
+}
+
+uint32_t board_millis(void) {
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board Init
+//--------------------------------------------------------------------+
+
+void board_init(void) {
+  // Disable interrupts during init
+  PFIC_DisableAllIRQ();
+
+  // Set system clock to PLL 60MHz (default for CH582)
+  SetSysClock(CLK_SOURCE_PLL_60MHz);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  SysTick_Config(GetSysClock() / 1000);
+#endif
+
+  // UART1 init for debug output
+#ifdef CFG_BOARD_UART_BAUDRATE
+  usart_printf_init(CFG_BOARD_UART_BAUDRATE);
+#endif
+
+  // LED
+#ifdef LED_PORT_IS_A
+  GPIOA_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
+#else
+  GPIOB_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
+#endif
+
+  // Button
+#ifdef BUTTON_PIN
+  #ifdef BUTTON_PORT_IS_A
+    GPIOA_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
+  #else
+    GPIOB_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
+  #endif
+#endif
+
+  // USB pin enable: enable analog function for USB1 and USB2 D+/D-
+  R16_PIN_ANALOG_IE |= RB_PIN_USB_IE | RB_PIN_USB2_IE;
+
+  // D+ pull-up is only needed for the device-role port
+#if CFG_TUD_ENABLED
+  #if BOARD_TUD_RHPORT == 0
+    R16_PIN_ANALOG_IE |= RB_PIN_USB_DP_PU;
+  #else
+    R16_PIN_ANALOG_IE |= RB_PIN_USB2_DP_PU;
+  #endif
+#endif
+
+  // Keep USB clock active during sleep
+  R8_SLP_CLK_OFF1 &= ~RB_SLP_CLK_USB;
+
+  // Enable interrupts globally
+  PFIC_EnableAllIRQ();
+
+  board_delay(2);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#ifdef LED_PORT_IS_A
+  if (state ^ LED_STATE_ON) {
+    GPIOA_ResetBits(LED_PIN);
+  } else {
+    GPIOA_SetBits(LED_PIN);
+  }
+#else
+  if (state ^ LED_STATE_ON) {
+    GPIOB_ResetBits(LED_PIN);
+  } else {
+    GPIOB_SetBits(LED_PIN);
+  }
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  #ifdef BUTTON_PORT_IS_A
+    return BUTTON_STATE_ACTIVE == (GPIOA_ReadPortPin(BUTTON_PIN) ? 1 : 0);
+  #else
+    return BUTTON_STATE_ACTIVE == (GPIOB_ReadPortPin(BUTTON_PIN) ? 1 : 0);
+  #endif
+#else
+  return 0;
+#endif
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const* buf, int len) {
+  int txsize = len;
+  const char* bufc = (const char*) buf;
+  while (txsize--) {
+    uart_write(*bufc++);
+  }
+  uart_sync();
+  return len;
+}
diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
new file mode 100644
index 000000000..9ad158662
--- /dev/null
+++ b/hw/bsp/ch58x/family.cmake
@@ -0,0 +1,103 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/wch/ch58x)
+set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS CH582 CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/ch582.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+  set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_CH583.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_gpio.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_clk.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_uart1.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_sys.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/ch58x_it.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_ch58x.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/RVMSIS
+    ${SDK_SRC_DIR}/StdPeriphDriver/inc
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUD_WCH_USBIP_USBFS=1
+    FREQ_SYS=60000000
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -msmall-data-limit=8
+      -mno-save-restore
+      -fmessage-length=0
+      -fsigned-char
+      )
+  endif ()
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH582)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch58x_usbfs.c
+    ${TOP}/src/portable/wch/hcd_ch58x_usbfs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
+      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported for CH58x")
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_openocd_wch(${TARGET})
+  family_flash_wlink_rs(${TARGET})
+endfunction()
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
new file mode 100644
index 000000000..41eb36c84
--- /dev/null
+++ b/hw/bsp/ch58x/family.mk
@@ -0,0 +1,49 @@
+# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
+CROSS_COMPILE ?= riscv-none-elf-
+
+SDK_DIR = hw/mcu/wch/ch58x
+SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= rv32imac-ilp32
+
+CFLAGS += \
+	-flto \
+	-msmall-data-limit=8 \
+	-mno-save-restore \
+	-fmessage-length=0 \
+	-fsigned-char \
+	-DCFG_TUSB_MCU=OPT_MCU_CH582 \
+	-DCFG_TUD_WCH_USBIP_USBFS=1 \
+	-DFREQ_SYS=60000000 \
+
+LDFLAGS_GCC += \
+	-nostdlib -nostartfiles \
+	--specs=nosys.specs --specs=nano.specs \
+
+SRC_C += \
+	src/portable/wch/dcd_ch58x_usbfs.c \
+	src/portable/wch/hcd_ch58x_usbfs.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_gpio.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_clk.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_uart1.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_sys.c \
+	$(FAMILY_PATH)/debug_uart.c \
+	$(FAMILY_PATH)/ch58x_it.c \
+	$(FAMILY_PATH)/system_ch58x.c \
+
+SRC_S += \
+	$(SDK_SRC_DIR)/Startup/startup_CH583.S
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_SRC_DIR)/RVMSIS \
+	$(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/inc
+
+LD_FILE ?= $(FAMILY_PATH)/linker/ch582.ld
+
+OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
+flash: flash-openocd-wch
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
diff --git a/hw/bsp/ch58x/linker/ch582.ld b/hw/bsp/ch58x/linker/ch582.ld
new file mode 100644
index 000000000..821998a49
--- /dev/null
+++ b/hw/bsp/ch58x/linker/ch582.ld
@@ -0,0 +1,167 @@
+/* CH582 Linker Script for TinyUSB
+ * Based on WCH CH583 SDK Link.ld
+ * Supports parameterized flash/ram sizes via --defsym
+ */
+
+/* Default sizes if not provided via --defsym */
+__flash_size = DEFINED(__FLASH_SIZE) ? __FLASH_SIZE : 448K;
+__ram_size = DEFINED(__RAM_SIZE) ? __RAM_SIZE : 32K;
+__stack_size = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 2048;
+
+ENTRY( _start )
+
+PROVIDE( _stack_size = __stack_size );
+
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = __flash_size
+  RAM   (xrw) : ORIGIN = 0x20000000, LENGTH = __ram_size
+}
+
+SECTIONS
+{
+  .init :
+  {
+    _sinit = .;
+    . = ALIGN(4);
+    KEEP(*(SORT_NONE(.init)))
+    . = ALIGN(4);
+    _einit = .;
+  } >FLASH AT>FLASH
+
+  .highcodelalign :
+  {
+    . = ALIGN(4);
+    PROVIDE(_highcode_lma = .);
+  } >FLASH AT>FLASH
+
+  .highcode :
+  {
+    . = ALIGN(4);
+    PROVIDE(_highcode_vma_start = .);
+    *(.vector);
+    KEEP(*(SORT_NONE(.vector_handler)))
+    *(.highcode);
+    *(.highcode.*);
+    . = ALIGN(4);
+    PROVIDE(_highcode_vma_end = .);
+  } >RAM AT>FLASH
+
+  .text :
+  {
+    . = ALIGN(4);
+    KEEP(*(SORT_NONE(.handle_reset)))
+    *(.text)
+    *(.text.*)
+    *(.rodata)
+    *(.rodata*)
+    *(.sdata2.*)
+    *(.glue_7)
+    *(.glue_7t)
+    *(.gnu.linkonce.t.*)
+    . = ALIGN(4);
+  } >FLASH AT>FLASH
+
+  .fini :
+  {
+    KEEP(*(SORT_NONE(.fini)))
+    . = ALIGN(4);
+  } >FLASH AT>FLASH
+
+  PROVIDE( _etext = . );
+  PROVIDE( _eitcm = . );
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH AT>FLASH
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH AT>FLASH
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH AT>FLASH
+
+  .ctors :
+  {
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  } >FLASH AT>FLASH
+
+  .dtors :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } >FLASH AT>FLASH
+
+  .dlalign :
+  {
+    . = ALIGN(4);
+    PROVIDE(_data_lma = .);
+  } >FLASH AT>FLASH
+
+  .data :
+  {
+    . = ALIGN(4);
+    PROVIDE(_data_vma = .);
+    *(.gnu.linkonce.r.*)
+    *(.data .data.*)
+    *(.gnu.linkonce.d.*)
+    . = ALIGN(8);
+    PROVIDE( __global_pointer$ = . + 0x800 );
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+    . = ALIGN(8);
+    *(.srodata.cst16)
+    *(.srodata.cst8)
+    *(.srodata.cst4)
+    *(.srodata.cst2)
+    *(.srodata .srodata.*)
+    . = ALIGN(4);
+    PROVIDE( _edata = .);
+  } >RAM AT>FLASH
+
+  .bss :
+  {
+    . = ALIGN(4);
+    PROVIDE( _sbss = .);
+    *(.sbss*)
+    *(.gnu.linkonce.sb.*)
+    *(.bss*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON*)
+    . = ALIGN(4);
+    PROVIDE( _ebss = .);
+  } >RAM AT>FLASH
+
+  PROVIDE( _end = _ebss);
+  PROVIDE( end = . );
+
+  .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
+  {
+    PROVIDE( _heap_end = . );
+    . = ALIGN(4);
+    PROVIDE(_susrstack = . );
+    . = . + __stack_size;
+    PROVIDE( _eusrstack = .);
+    __freertos_irq_stack_top = .;
+  } >RAM
+}
diff --git a/hw/bsp/ch58x/system_ch58x.c b/hw/bsp/ch58x/system_ch58x.c
new file mode 100644
index 000000000..068c1a131
--- /dev/null
+++ b/hw/bsp/ch58x/system_ch58x.c
@@ -0,0 +1,39 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "CH58x_common.h"
+#include "system_ch58x.h"
+
+uint32_t SystemCoreClock = FREQ_SYS;
+
+void SystemInit(void) {
+  SetSysClock(CLK_SOURCE_PLL_60MHz);
+  SystemCoreClock = GetSysClock();
+}
+
+void SystemCoreClockUpdate(void) {
+  SystemCoreClock = GetSysClock();
+}
diff --git a/hw/bsp/ch58x/system_ch58x.h b/hw/bsp/ch58x/system_ch58x.h
new file mode 100644
index 000000000..ef32e603f
--- /dev/null
+++ b/hw/bsp/ch58x/system_ch58x.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef __SYSTEM_CH58X_H
+#define __SYSTEM_CH58X_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern uint32_t SystemCoreClock;  // System Clock Frequency (Core Clock)
+
+extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_CH58X_H */
diff --git a/hw/bsp/ch58x/wch-riscv.cfg b/hw/bsp/ch58x/wch-riscv.cfg
new file mode 100644
index 000000000..5913a2465
--- /dev/null
+++ b/hw/bsp/ch58x/wch-riscv.cfg
@@ -0,0 +1,17 @@
+adapter driver wlinke
+adapter speed 6000
+transport select sdi
+
+wlink_set_address 0x00000000
+set _CHIPNAME wch_riscv
+sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure  -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+set _FLASHNAME $_CHIPNAME.flash
+
+flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
+
+echo "Ready for Remote Connections"
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 34dd6af8d..02364d580 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -629,6 +629,20 @@
     #define TUP_DCD_EDPT_CLOSE_API
   #endif
 
+#elif TU_CHECK_MCU(OPT_MCU_CH582)
+  // CH58x has 2 independent USBFS controllers with merged EP registers, FS only.
+  #define TUP_USBIP_WCH_CH58X
+
+  #ifndef CFG_TUD_WCH_USBIP_USBFS
+    #define CFG_TUD_WCH_USBIP_USBFS 1
+  #endif
+
+  #ifndef CFG_TUH_WCH_USBIP_USBFS
+    #define CFG_TUH_WCH_USBIP_USBFS 1
+  #endif
+
+  #define TUP_DCD_ENDPOINT_MAX 8
+
 //--------------------------------------------------------------------+
 // Analog Devices
 //--------------------------------------------------------------------+
diff --git a/src/portable/wch/ch58x_usbfs_reg.h b/src/portable/wch/ch58x_usbfs_reg.h
new file mode 100644
index 000000000..11479a4f6
--- /dev/null
+++ b/src/portable/wch/ch58x_usbfs_reg.h
@@ -0,0 +1,299 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef CH58X_USBFS_REG_H
+#define CH58X_USBFS_REG_H
+
+#include <stdint.h>
+
+//--------------------------------------------------------------------+
+// USB Base Addresses
+//--------------------------------------------------------------------+
+#define CH58X_USB_BASE   0x40008000u
+#define CH58X_USB2_BASE  0x40008400u
+
+//--------------------------------------------------------------------+
+// Global Control / Status Registers
+//--------------------------------------------------------------------+
+#define CH58X_USB_CTRL(base)     (*(volatile uint8_t  *)((base) + 0x00))
+#define CH58X_UDEV_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x01))
+#define CH58X_USB_INT_EN(base)  (*(volatile uint8_t  *)((base) + 0x02))
+#define CH58X_USB_DEV_AD(base)  (*(volatile uint8_t  *)((base) + 0x03))
+#define CH58X_USB_MIS_ST(base)  (*(volatile uint8_t  *)((base) + 0x05))
+#define CH58X_USB_INT_FG(base)  (*(volatile uint8_t  *)((base) + 0x06))
+#define CH58X_USB_INT_ST(base)  (*(volatile uint8_t  *)((base) + 0x07))
+#define CH58X_USB_RX_LEN(base)  (*(volatile uint8_t  *)((base) + 0x08))
+
+//--------------------------------------------------------------------+
+// Endpoint Mode Registers
+//--------------------------------------------------------------------+
+#define CH58X_UEP4_1_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0C))
+#define CH58X_UEP2_3_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0D))
+#define CH58X_UEP567_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0E))
+
+//--------------------------------------------------------------------+
+// Endpoint DMA / T_LEN / CTRL offset lookup tables
+// EP0-EP4 are at low offsets, EP5-EP7 jump to higher offsets
+// EP4 shares DMA with EP0 (no independent DMA register)
+//--------------------------------------------------------------------+
+static const uint8_t ch58x_ep_dma_offset[] = {
+  0x10, 0x14, 0x18, 0x1C,  /* EP0, EP1, EP2, EP3 */
+  0xFF,                     /* EP4: shares with EP0, sentinel */
+  0x54, 0x58, 0x5C          /* EP5, EP6, EP7 */
+};
+
+static const uint8_t ch58x_ep_tlen_offset[] = {
+  0x20, 0x24, 0x28, 0x2C, 0x30, /* EP0-EP4 */
+  0x64, 0x68, 0x6C              /* EP5-EP7 */
+};
+
+static const uint8_t ch58x_ep_ctrl_offset[] = {
+  0x22, 0x26, 0x2A, 0x2E, 0x32, /* EP0-EP4 */
+  0x66, 0x6A, 0x6E              /* EP5-EP7 */
+};
+
+// EP DMA is 16-bit (only low 16 bits of RAM address, high bits implied 0x2000)
+#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ch58x_ep_dma_offset[ep]))
+#define CH58X_EP_TLEN(base, ep)  (*(volatile uint8_t  *)((base) + ch58x_ep_tlen_offset[ep]))
+#define CH58X_EP_CTRL(base, ep)  (*(volatile uint8_t  *)((base) + ch58x_ep_ctrl_offset[ep]))
+
+//--------------------------------------------------------------------+
+// USB_CTRL (R8_USB_CTRL) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UC_DMA_EN       0x01
+#define CH58X_UC_CLR_ALL      0x02
+#define CH58X_UC_RESET_SIE    0x04
+#define CH58X_UC_INT_BUSY     0x08
+#define CH58X_UC_SYS_CTRL     0x10
+#define CH58X_UC_DEV_PU_EN    0x20
+#define CH58X_UC_LOW_SPEED    0x40
+#define CH58X_UC_HOST_MODE    0x80
+
+//--------------------------------------------------------------------+
+// UDEV_CTRL (R8_UDEV_CTRL) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UD_PORT_EN      0x01
+#define CH58X_UD_GP_BIT       0x02
+#define CH58X_UD_LOW_SPEED    0x04
+#define CH58X_UD_PD_DIS       0x80
+
+//--------------------------------------------------------------------+
+// INT_EN (R8_USB_INT_EN) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UIE_BUS_RST     0x01
+#define CH58X_UIE_DETECT      0x01  /* host mode alias */
+#define CH58X_UIE_TRANSFER    0x02
+#define CH58X_UIE_SUSPEND     0x04
+#define CH58X_UIE_HST_SOF     0x08
+#define CH58X_UIE_FIFO_OV     0x10
+
+//--------------------------------------------------------------------+
+// INT_FG (R8_USB_INT_FG) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UIF_BUS_RST     0x01
+#define CH58X_UIF_DETECT      0x01  /* host mode alias */
+#define CH58X_UIF_TRANSFER    0x02
+#define CH58X_UIF_SUSPEND     0x04
+#define CH58X_UIF_HST_SOF     0x08
+#define CH58X_UIF_FIFO_OV     0x10
+#define CH58X_U_SIE_FREE      0x20
+#define CH58X_U_TOG_OK        0x40
+#define CH58X_U_IS_NAK        0x80
+
+//--------------------------------------------------------------------+
+// INT_ST (R8_USB_INT_ST) parsing
+//--------------------------------------------------------------------+
+#define CH58X_INT_ST_ENDP(x)    (((x) >> 0) & 0x0F)
+#define CH58X_INT_ST_TOKEN(x)   (((x) >> 4) & 0x03)
+#define CH58X_UIS_SETUP_ACT     0x80
+
+// Token PID values
+#define CH58X_PID_OUT    0
+#define CH58X_PID_SOF    1
+#define CH58X_PID_IN     2
+#define CH58X_PID_SETUP  3
+
+//--------------------------------------------------------------------+
+// MIS_ST (R8_USB_MIS_ST) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UMS_DEV_ATTACH  0x01
+#define CH58X_UMS_DM_LEVEL    0x02
+#define CH58X_UMS_SUSPEND     0x04
+#define CH58X_UMS_BUS_RESET   0x08
+#define CH58X_UMS_R_FIFO_RDY  0x10
+#define CH58X_UMS_SIE_FREE    0x20
+#define CH58X_UMS_SOF_ACT     0x40
+#define CH58X_UMS_SOF_PRES    0x80
+
+//--------------------------------------------------------------------+
+// EP CTRL register bit definitions (merged TX+RX in single 8-bit reg)
+//
+//  Bit 7: RB_UEP_R_TOG    RX data toggle
+//  Bit 6: RB_UEP_T_TOG    TX data toggle
+//  Bit 5: (reserved)
+//  Bit 4: RB_UEP_AUTO_TOG auto toggle (EP1/2/3 only)
+//  Bit 3: R_RES1           RX response high
+//  Bit 2: R_RES0           RX response low
+//  Bit 1: T_RES1           TX response high
+//  Bit 0: T_RES0           TX response low
+//--------------------------------------------------------------------+
+
+// TX response bits[1:0]
+#define CH58X_EP_T_RES_MASK    0x03
+#define CH58X_EP_T_RES_ACK     0x00
+#define CH58X_EP_T_RES_TOUT    0x01  /* ISO: no handshake */
+#define CH58X_EP_T_RES_NAK     0x02
+#define CH58X_EP_T_RES_STALL   0x03
+
+// RX response bits[3:2]
+#define CH58X_EP_R_RES_MASK    0x0C
+#define CH58X_EP_R_RES_ACK     0x00
+#define CH58X_EP_R_RES_TOUT    0x04  /* ISO: no handshake */
+#define CH58X_EP_R_RES_NAK     0x08
+#define CH58X_EP_R_RES_STALL   0x0C
+
+// Toggle and auto-toggle
+#define CH58X_EP_AUTO_TOG      0x10  /* bit 4, shared TX/RX */
+#define CH58X_EP_T_TOG         0x40  /* bit 6, TX DATA toggle */
+#define CH58X_EP_R_TOG         0x80  /* bit 7, RX DATA toggle */
+
+//--------------------------------------------------------------------+
+// EP Mode register (UEP4_1_MOD) bit definitions
+//--------------------------------------------------------------------+
+// R8_UEP4_1_MOD: EP4 in bits[3:2], EP1 in bits[7:4]
+#define CH58X_UEP1_BUF_MOD    0x10
+#define CH58X_UEP1_TX_EN      0x40
+#define CH58X_UEP1_RX_EN      0x80
+#define CH58X_UEP4_TX_EN      0x04
+#define CH58X_UEP4_RX_EN      0x08
+
+// R8_UEP2_3_MOD: EP3 in bits[7:4], EP2 in bits[3:0]
+#define CH58X_UEP2_BUF_MOD    0x01
+#define CH58X_UEP2_TX_EN      0x04
+#define CH58X_UEP2_RX_EN      0x08
+#define CH58X_UEP3_BUF_MOD    0x10
+#define CH58X_UEP3_TX_EN      0x40
+#define CH58X_UEP3_RX_EN      0x80
+
+// R8_UEP567_MOD
+#define CH58X_UEP5_TX_EN      0x01
+#define CH58X_UEP5_RX_EN      0x02
+#define CH58X_UEP6_TX_EN      0x04
+#define CH58X_UEP6_RX_EN      0x08
+#define CH58X_UEP7_TX_EN      0x10
+#define CH58X_UEP7_RX_EN      0x20
+
+//--------------------------------------------------------------------+
+// Host-mode Register Aliases
+// In host mode: EP2 -> RX, EP3 -> TX, EP1_CTRL -> SETUP
+//--------------------------------------------------------------------+
+#define CH58X_UHOST_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x01))  // = UDEV_CTRL
+#define CH58X_UH_EP_MOD(base)    (*(volatile uint8_t  *)((base) + 0x0D))  // = UEP2_3_MOD
+#define CH58X_UH_RX_DMA(base)    (*(volatile uint16_t *)((base) + 0x18))  // = UEP2_DMA
+#define CH58X_UH_TX_DMA(base)    (*(volatile uint16_t *)((base) + 0x1C))  // = UEP3_DMA
+#define CH58X_UH_SETUP(base)     (*(volatile uint8_t  *)((base) + 0x26))  // = UEP1_CTRL
+#define CH58X_UH_EP_PID(base)    (*(volatile uint8_t  *)((base) + 0x28))  // = UEP2_T_LEN
+#define CH58X_UH_RX_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x2A))  // = UEP2_CTRL
+#define CH58X_UH_TX_LEN(base)    (*(volatile uint8_t  *)((base) + 0x2C))  // = UEP3_T_LEN
+#define CH58X_UH_TX_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x2E))  // = UEP3_CTRL
+
+//--------------------------------------------------------------------+
+// UHOST_CTRL (R8_UHOST_CTRL) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UH_PD_DIS           0x80
+#define CH58X_UH_LOW_SPEED        0x04
+#define CH58X_UH_BUS_RESET        0x02
+#define CH58X_UH_PORT_EN          0x01
+
+//--------------------------------------------------------------------+
+// UH_EP_MOD (R8_UH_EP_MOD) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UH_EP_TX_EN         0x40
+#define CH58X_UH_EP_TBUF_MOD      0x10
+#define CH58X_UH_EP_RX_EN         0x08
+#define CH58X_UH_EP_RBUF_MOD      0x01
+
+//--------------------------------------------------------------------+
+// UH_SETUP (R8_UH_SETUP) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UH_PRE_PID_EN       0x80
+#define CH58X_UH_SOF_EN           0x40
+
+//--------------------------------------------------------------------+
+// UH_RX_CTRL (R8_UH_RX_CTRL) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UH_R_TOG            0x80
+#define CH58X_UH_R_AUTO_TOG       0x10
+#define CH58X_UH_R_RES            0x04
+
+//--------------------------------------------------------------------+
+// UH_TX_CTRL (R8_UH_TX_CTRL) bit definitions
+//--------------------------------------------------------------------+
+#define CH58X_UH_T_TOG            0x40
+#define CH58X_UH_T_AUTO_TOG       0x10
+#define CH58X_UH_T_RES            0x01
+
+//--------------------------------------------------------------------+
+// USB_INT_ST host-mode bits
+//--------------------------------------------------------------------+
+#define CH58X_UIS_H_RES_MASK      0x0F
+#define CH58X_UIS_TOG_OK          0x40
+
+//--------------------------------------------------------------------+
+// USB_DEV_AD bits
+//--------------------------------------------------------------------+
+#define CH58X_UDA_GP_BIT          0x80
+#define CH58X_USB_ADDR_MASK       0x7F
+
+//--------------------------------------------------------------------+
+// Standard USB PID values (for host token and response)
+//--------------------------------------------------------------------+
+#define CH58X_USB_PID_OUT         0x01
+#define CH58X_USB_PID_IN          0x09
+#define CH58X_USB_PID_SOF         0x05
+#define CH58X_USB_PID_SETUP       0x0D
+#define CH58X_USB_PID_DATA0       0x03
+#define CH58X_USB_PID_DATA1       0x0B
+#define CH58X_USB_PID_ACK         0x02
+#define CH58X_USB_PID_NAK         0x0A
+#define CH58X_USB_PID_STALL       0x0E
+
+//--------------------------------------------------------------------+
+// PIN_ANALOG_IE register
+//--------------------------------------------------------------------+
+#define CH58X_PIN_ANALOG_IE       (*(volatile uint16_t *)0x4000101A)
+#define CH58X_PIN_USB_DP_PU       0x40
+#define CH58X_PIN_USB_IE          0x80
+#define CH58X_PIN_USB2_DP_PU      0x10
+#define CH58X_PIN_USB2_IE         0x20
+
+//--------------------------------------------------------------------+
+// Sleep clock control
+//--------------------------------------------------------------------+
+#define CH58X_SLP_CLK_OFF1        (*(volatile uint8_t *)0x4000100D)
+#define CH58X_SLP_CLK_USB         0x10
+
+#endif /* CH58X_USBFS_REG_H */
diff --git a/src/portable/wch/dcd_ch58x_usbfs.c b/src/portable/wch/dcd_ch58x_usbfs.c
new file mode 100644
index 000000000..11ff2c7b1
--- /dev/null
+++ b/src/portable/wch/dcd_ch58x_usbfs.c
@@ -0,0 +1,583 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_CH58X) && CFG_TUD_WCH_USBIP_USBFS
+
+#include "device/dcd.h"
+#include "ch58x_usbfs_reg.h"
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+#define EP_MAX       8
+#define EP_BUF_SIZE  64
+
+//--------------------------------------------------------------------+
+// USB base address selection by rhport
+//--------------------------------------------------------------------+
+static inline uint32_t get_usb_base(uint8_t rhport) {
+  return (rhport == 0) ? CH58X_USB_BASE : CH58X_USB2_BASE;
+}
+
+//--------------------------------------------------------------------+
+// Register access helpers using base address
+//--------------------------------------------------------------------+
+#define USB_CTRL(base)     CH58X_USB_CTRL(base)
+#define USB_UDEV_CTRL(base) CH58X_UDEV_CTRL(base)
+#define USB_INT_EN(base)   CH58X_USB_INT_EN(base)
+#define USB_DEV_AD(base)   CH58X_USB_DEV_AD(base)
+#define USB_MIS_ST(base)   CH58X_USB_MIS_ST(base)
+#define USB_INT_FG(base)   CH58X_USB_INT_FG(base)
+#define USB_INT_ST(base)   CH58X_USB_INT_ST(base)
+#define USB_RX_LEN(base)   CH58X_USB_RX_LEN(base)
+
+#define EP_DMA(base, ep)   CH58X_EP_DMA(base, ep)
+#define EP_TLEN(base, ep)  CH58X_EP_TLEN(base, ep)
+#define EP_CTRL(base, ep)  CH58X_EP_CTRL(base, ep)
+
+//--------------------------------------------------------------------+
+// Inline helpers for merged EP CTRL register
+//--------------------------------------------------------------------+
+static inline void ep_set_tx_response(uint32_t base, uint8_t ep, uint8_t resp) {
+  uint8_t ctrl = EP_CTRL(base, ep);
+  ctrl = (ctrl & ~CH58X_EP_T_RES_MASK) | resp;
+  EP_CTRL(base, ep) = ctrl;
+}
+
+static inline void ep_set_rx_response(uint32_t base, uint8_t ep, uint8_t resp) {
+  uint8_t ctrl = EP_CTRL(base, ep);
+  ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | resp;
+  EP_CTRL(base, ep) = ctrl;
+}
+
+static inline void ep_set_both_response(uint32_t base, uint8_t ep, uint8_t tx_resp, uint8_t rx_resp) {
+  uint8_t ctrl = EP_CTRL(base, ep);
+  ctrl = (ctrl & ~(CH58X_EP_T_RES_MASK | CH58X_EP_R_RES_MASK)) | tx_resp | rx_resp;
+  EP_CTRL(base, ep) = ctrl;
+}
+
+//--------------------------------------------------------------------+
+// Private data structures
+//--------------------------------------------------------------------+
+struct usb_xfer {
+  bool valid;
+  uint8_t* buffer;
+  size_t len;
+  size_t processed_len;
+  size_t max_size;
+};
+
+typedef struct {
+  uint32_t usb_base;
+  bool ep0_tog;
+  bool isochronous[EP_MAX];
+  struct usb_xfer xfer[EP_MAX][2];  // [ep][dir]
+
+  // EP0 + EP4 shared buffer: EP0 OUT(64) + EP4 OUT(64) + EP4 IN(64)
+  TU_ATTR_ALIGNED(4) uint8_t ep0_buffer[EP_BUF_SIZE + EP_BUF_SIZE + EP_BUF_SIZE];
+
+  // EP1-EP3: OUT(64) + IN(64)
+  TU_ATTR_ALIGNED(4) uint8_t ep1_buffer[2][EP_BUF_SIZE];
+  TU_ATTR_ALIGNED(4) uint8_t ep2_buffer[2][EP_BUF_SIZE];
+  TU_ATTR_ALIGNED(4) uint8_t ep3_buffer[2][EP_BUF_SIZE];
+
+  // EP5-EP7: OUT(64) + IN(64)
+  TU_ATTR_ALIGNED(4) uint8_t ep5_buffer[2][EP_BUF_SIZE];
+  TU_ATTR_ALIGNED(4) uint8_t ep6_buffer[2][EP_BUF_SIZE];
+  TU_ATTR_ALIGNED(4) uint8_t ep7_buffer[2][EP_BUF_SIZE];
+} dcd_data_t;
+
+// Per-port data (support up to 2 USB ports)
+static dcd_data_t _dcd_data[2];
+
+//--------------------------------------------------------------------+
+// Buffer address helpers
+// EP0: ep0_buffer[0..63]
+// EP4 OUT: ep0_buffer[64..127]  EP4 IN: ep0_buffer[128..191]
+// Other EPs: epX_buffer[0] = OUT, epX_buffer[1] = IN
+//--------------------------------------------------------------------+
+static uint8_t* ep_out_buffer(dcd_data_t* d, uint8_t ep) {
+  switch (ep) {
+    case 0: return &d->ep0_buffer[0];
+    case 1: return d->ep1_buffer[0];
+    case 2: return d->ep2_buffer[0];
+    case 3: return d->ep3_buffer[0];
+    case 4: return &d->ep0_buffer[EP_BUF_SIZE];
+    case 5: return d->ep5_buffer[0];
+    case 6: return d->ep6_buffer[0];
+    case 7: return d->ep7_buffer[0];
+    default: return NULL;
+  }
+}
+
+static uint8_t* ep_in_buffer(dcd_data_t* d, uint8_t ep) {
+  switch (ep) {
+    case 0: return &d->ep0_buffer[0]; // EP0 IN uses same buffer as OUT
+    case 1: return d->ep1_buffer[1];
+    case 2: return d->ep2_buffer[1];
+    case 3: return d->ep3_buffer[1];
+    case 4: return &d->ep0_buffer[2 * EP_BUF_SIZE];
+    case 5: return d->ep5_buffer[1];
+    case 6: return d->ep6_buffer[1];
+    case 7: return d->ep7_buffer[1];
+    default: return NULL;
+  }
+}
+
+// Get DMA base pointer for endpoint (the buffer whose address is set to DMA register)
+// For EP4, DMA is shared with EP0, so we return EP0 buffer
+static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
+  switch (ep) {
+    case 0: case 4: return &d->ep0_buffer[0];
+    case 1: return d->ep1_buffer[0];
+    case 2: return d->ep2_buffer[0];
+    case 3: return d->ep3_buffer[0];
+    case 5: return d->ep5_buffer[0];
+    case 6: return d->ep6_buffer[0];
+    case 7: return d->ep7_buffer[0];
+    default: return NULL;
+  }
+}
+
+//--------------------------------------------------------------------+
+// EP has auto-toggle support?
+//--------------------------------------------------------------------+
+static inline bool ep_has_auto_toggle(uint8_t ep) {
+  return (ep >= 1 && ep <= 3);
+}
+
+//--------------------------------------------------------------------+
+// Private transfer helpers
+//--------------------------------------------------------------------+
+static void update_in(uint8_t rhport, uint8_t ep, bool force) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_IN];
+
+  if (xfer->valid) {
+    if (force || xfer->len) {
+      size_t len = TU_MIN(xfer->max_size, xfer->len);
+
+      // Copy data to IN buffer
+      uint8_t* buf = ep_in_buffer(d, ep);
+      if (len > 0 && xfer->buffer != NULL) {
+        memcpy(buf, xfer->buffer, len);
+      }
+
+      xfer->buffer += len;
+      xfer->len -= len;
+      xfer->processed_len += len;
+
+      EP_TLEN(base, ep) = (uint8_t) len;
+
+      if (ep == 0) {
+        // EP0: manual toggle
+        uint8_t ctrl = EP_CTRL(base, 0);
+        ctrl = (ctrl & ~(CH58X_EP_T_RES_MASK | CH58X_EP_T_TOG));
+        ctrl |= CH58X_EP_T_RES_ACK;
+        if (d->ep0_tog) ctrl |= CH58X_EP_T_TOG;
+        EP_CTRL(base, 0) = ctrl;
+        d->ep0_tog = !d->ep0_tog;
+      } else if (d->isochronous[ep]) {
+        ep_set_tx_response(base, ep, CH58X_EP_T_RES_TOUT);
+      } else {
+        ep_set_tx_response(base, ep, CH58X_EP_T_RES_ACK);
+      }
+    } else {
+      // Transfer complete
+      xfer->valid = false;
+      ep_set_tx_response(base, ep, CH58X_EP_T_RES_NAK);
+      dcd_event_xfer_complete(rhport, ep | TUSB_DIR_IN_MASK,
+                              xfer->processed_len, XFER_RESULT_SUCCESS, true);
+    }
+  }
+}
+
+static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_OUT];
+
+  if (xfer->valid) {
+    size_t len = TU_MIN(xfer->max_size, TU_MIN(xfer->len, rx_len));
+
+    // Copy from OUT buffer
+    if (len > 0 && xfer->buffer != NULL) {
+      uint8_t* buf = ep_out_buffer(d, ep);
+      memcpy(xfer->buffer, buf, len);
+    }
+
+    xfer->buffer += len;
+    xfer->len -= len;
+    xfer->processed_len += len;
+
+    if (xfer->len == 0 || len < xfer->max_size) {
+      xfer->valid = false;
+      dcd_event_xfer_complete(rhport, ep, xfer->processed_len,
+                              XFER_RESULT_SUCCESS, true);
+    }
+
+    if (ep == 0) {
+      ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
+    }
+  }
+}
+
+//--------------------------------------------------------------------+
+// DCD API Implementation
+//--------------------------------------------------------------------+
+
+bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
+  (void) rh_init;
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = get_usb_base(rhport);
+  d->usb_base = base;
+
+  // Clear state
+  tu_memclr(d->xfer, sizeof(d->xfer));
+  tu_memclr(d->isochronous, sizeof(d->isochronous));
+  d->ep0_tog = true;
+
+  // Init control registers
+  USB_CTRL(base) = CH58X_UC_DEV_PU_EN | CH58X_UC_INT_BUSY | CH58X_UC_DMA_EN;
+  USB_UDEV_CTRL(base) = CH58X_UD_PD_DIS | CH58X_UD_PORT_EN;
+  USB_DEV_AD(base) = 0x00;
+
+  // Clear all interrupt flags, then enable interrupts
+  USB_INT_FG(base) = 0xFF;
+  USB_INT_EN(base) = CH58X_UIE_BUS_RST | CH58X_UIE_TRANSFER | CH58X_UIE_SUSPEND;
+
+  // EP0 setup (also sets EP4 DMA since they share)
+  EP_DMA(base, 0) = (uint16_t)(uint32_t) &d->ep0_buffer[0];
+  EP_TLEN(base, 0) = 0;
+  EP_CTRL(base, 0) = CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
+
+  // Enable all endpoints TX+RX
+  CH58X_UEP4_1_MOD(base) = CH58X_UEP1_RX_EN | CH58X_UEP1_TX_EN |
+                             CH58X_UEP4_RX_EN | CH58X_UEP4_TX_EN;
+  CH58X_UEP2_3_MOD(base) = CH58X_UEP2_RX_EN | CH58X_UEP2_TX_EN |
+                             CH58X_UEP3_RX_EN | CH58X_UEP3_TX_EN;
+  CH58X_UEP567_MOD(base) = CH58X_UEP5_RX_EN | CH58X_UEP5_TX_EN |
+                             CH58X_UEP6_RX_EN | CH58X_UEP6_TX_EN |
+                             CH58X_UEP7_RX_EN | CH58X_UEP7_TX_EN;
+
+  // EP1-3: DMA + auto-toggle + NAK both directions
+  for (uint8_t ep = 1; ep <= 3; ep++) {
+    EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
+    EP_TLEN(base, ep) = 0;
+    EP_CTRL(base, ep) = CH58X_EP_AUTO_TOG | CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+  }
+
+  // EP4: no independent DMA, no auto-toggle
+  EP_TLEN(base, 4) = 0;
+  EP_CTRL(base, 4) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+
+  // EP5-7: DMA + no auto-toggle
+  for (uint8_t ep = 5; ep <= 7; ep++) {
+    EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
+    EP_TLEN(base, ep) = 0;
+    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+  }
+
+  // Set EP0 max size
+  d->xfer[0][TUSB_DIR_OUT].max_size = EP_BUF_SIZE;
+  d->xfer[0][TUSB_DIR_IN].max_size = EP_BUF_SIZE;
+
+  dcd_connect(rhport);
+  return true;
+}
+
+void dcd_int_handler(uint8_t rhport) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  uint8_t status = USB_INT_FG(base);
+
+  if (status & CH58X_UIF_TRANSFER) {
+    uint8_t int_st = USB_INT_ST(base);
+    uint8_t ep = CH58X_INT_ST_ENDP(int_st);
+    uint8_t token = CH58X_INT_ST_TOKEN(int_st);
+
+    // Check SETUP first via dedicated flag
+    if (int_st & CH58X_UIS_SETUP_ACT) {
+      // SETUP packet received on EP0
+      ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
+      d->ep0_tog = true;
+      dcd_event_setup_received(rhport, ep_out_buffer(d, 0), true);
+    } else {
+      switch (token) {
+        case CH58X_PID_OUT: {
+          uint8_t rx_len = USB_RX_LEN(base);
+          if (!ep_has_auto_toggle(ep) && ep != 0) {
+            // Manual toggle for EP4-7
+            EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
+          }
+          update_out(rhport, ep, rx_len);
+          break;
+        }
+
+        case CH58X_PID_IN: {
+          if (!ep_has_auto_toggle(ep) && ep != 0) {
+            // Manual toggle for EP4-7
+            EP_CTRL(base, ep) ^= CH58X_EP_T_TOG;
+          }
+          update_in(rhport, ep, false);
+          break;
+        }
+
+        default:
+          break;
+      }
+    }
+
+    USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+  } else if (status & CH58X_UIF_BUS_RST) {
+    // Bus reset
+    d->ep0_tog = true;
+    d->xfer[0][TUSB_DIR_OUT].max_size = EP_BUF_SIZE;
+    d->xfer[0][TUSB_DIR_IN].max_size = EP_BUF_SIZE;
+
+    USB_DEV_AD(base) = 0x00;
+    ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
+
+    tusb_speed_t speed = (USB_MIS_ST(base) & CH58X_UMS_DM_LEVEL) ?
+                          TUSB_SPEED_LOW : TUSB_SPEED_FULL;
+    dcd_event_bus_reset(rhport, speed, true);
+
+    USB_INT_FG(base) = CH58X_UIF_BUS_RST;
+  } else if (status & CH58X_UIF_SUSPEND) {
+    if (USB_MIS_ST(base) & CH58X_UMS_SUSPEND) {
+      dcd_event_t event = {.rhport = rhport, .event_id = DCD_EVENT_SUSPEND};
+      dcd_event_handler(&event, true);
+    } else {
+      dcd_event_t event = {.rhport = rhport, .event_id = DCD_EVENT_RESUME};
+      dcd_event_handler(&event, true);
+    }
+    USB_INT_FG(base) = CH58X_UIF_SUSPEND;
+  }
+}
+
+void dcd_int_enable(uint8_t rhport) {
+  (void) rhport;
+  // PFIC enable: USB_IRQn=22, USB2_IRQn=23
+  volatile uint32_t* pfic_ienr = (volatile uint32_t*) 0xE000E100;
+  uint8_t irqn = (rhport == 0) ? 22 : 23;
+  pfic_ienr[irqn / 32] = (1u << (irqn % 32));
+}
+
+void dcd_int_disable(uint8_t rhport) {
+  (void) rhport;
+  volatile uint32_t* pfic_irer = (volatile uint32_t*) 0xE000E180;
+  uint8_t irqn = (rhport == 0) ? 22 : 23;
+  pfic_irer[irqn / 32] = (1u << (irqn % 32));
+  __asm volatile ("fence.i");
+}
+
+void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
+  (void) dev_addr;
+  // Address is set in status stage complete callback
+  dcd_edpt_xfer(rhport, 0x80, NULL, 0, false);
+}
+
+void dcd_remote_wakeup(uint8_t rhport) {
+  uint32_t base = get_usb_base(rhport);
+  USB_UDEV_CTRL(base) |= CH58X_UD_GP_BIT;
+  for (volatile int i = 0; i < 60000; i++) { } // ~1ms resume signal
+  USB_UDEV_CTRL(base) &= ~CH58X_UD_GP_BIT;
+}
+
+void dcd_connect(uint8_t rhport) {
+  uint32_t base = get_usb_base(rhport);
+  USB_CTRL(base) |= CH58X_UC_DEV_PU_EN;
+}
+
+void dcd_disconnect(uint8_t rhport) {
+  uint32_t base = get_usb_base(rhport);
+  USB_CTRL(base) &= ~CH58X_UC_DEV_PU_EN;
+}
+
+void dcd_sof_enable(uint8_t rhport, bool en) {
+  uint32_t base = get_usb_base(rhport);
+  if (en) {
+    USB_INT_EN(base) |= CH58X_UIE_HST_SOF;
+  } else {
+    USB_INT_EN(base) &= ~CH58X_UIE_HST_SOF;
+  }
+}
+
+void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* request) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+
+  if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
+      request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
+      request->bRequest == TUSB_REQ_SET_ADDRESS) {
+    USB_DEV_AD(base) = (uint8_t) request->wValue;
+  }
+  ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
+}
+
+bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  uint8_t ep = tu_edpt_number(desc_ep->bEndpointAddress);
+  uint8_t dir = tu_edpt_dir(desc_ep->bEndpointAddress);
+  TU_ASSERT(ep < EP_MAX);
+
+  d->isochronous[ep] = (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
+  d->xfer[ep][dir].max_size = tu_edpt_packet_size(desc_ep);
+
+  if (ep != 0) {
+    dcd_int_disable(rhport);
+    uint8_t ctrl = EP_CTRL(base, ep);
+    if (dir == TUSB_DIR_OUT) {
+      if (d->isochronous[ep]) {
+        ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_TOUT;
+      } else {
+        // Start with NAK; dcd_edpt_xfer will set ACK when a transfer is submitted
+        ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_NAK;
+      }
+      // Enable auto toggle for EP1-3
+      if (ep_has_auto_toggle(ep)) {
+        ctrl |= CH58X_EP_AUTO_TOG;
+      }
+    } else {
+      EP_TLEN(base, ep) = 0;
+      ctrl = (ctrl & ~CH58X_EP_T_RES_MASK) | CH58X_EP_T_RES_NAK;
+      if (ep_has_auto_toggle(ep)) {
+        ctrl |= CH58X_EP_AUTO_TOG;
+      }
+    }
+    EP_CTRL(base, ep) = ctrl;
+    dcd_int_enable(rhport);
+  }
+  return true;
+}
+
+void dcd_edpt_close_all(uint8_t rhport) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+
+  for (uint8_t ep = 1; ep < EP_MAX; ep++) {
+    d->xfer[ep][TUSB_DIR_IN].valid = false;
+    d->xfer[ep][TUSB_DIR_OUT].valid = false;
+    d->isochronous[ep] = false;
+    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+  }
+}
+
+bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
+  (void) rhport;
+  (void) ep_addr;
+  (void) largest_packet_size;
+  return false;
+}
+
+bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t* desc_ep) {
+  (void) rhport;
+  (void) desc_ep;
+  return false;
+}
+
+bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
+                   uint16_t total_bytes, bool is_isr) {
+  (void) is_isr;
+  uint8_t ep = tu_edpt_number(ep_addr);
+  uint8_t dir = tu_edpt_dir(ep_addr);
+
+  dcd_data_t* d = &_dcd_data[rhport];
+  struct usb_xfer* xfer = &d->xfer[ep][dir];
+
+  dcd_int_disable(rhport);
+  xfer->valid = true;
+  xfer->buffer = buffer;
+  xfer->len = total_bytes;
+  xfer->processed_len = 0;
+  dcd_int_enable(rhport);
+
+  if (dir == TUSB_DIR_IN) {
+    update_in(rhport, ep, true);
+  } else {
+    // For OUT direction, set endpoint to ACK to start receiving data
+    if (ep != 0) {
+      if (d->isochronous[ep]) {
+        ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_TOUT);
+      } else {
+        ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_ACK);
+      }
+    }
+  }
+  return true;
+}
+
+void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  uint8_t ep = tu_edpt_number(ep_addr);
+  uint8_t dir = tu_edpt_dir(ep_addr);
+
+  dcd_int_disable(rhport);
+  if (ep == 0) {
+    // EP0: stall both directions
+    EP_CTRL(base, 0) = CH58X_EP_R_RES_STALL | CH58X_EP_T_RES_STALL |
+                        CH58X_EP_R_TOG | CH58X_EP_T_TOG;
+  } else {
+    if (dir == TUSB_DIR_OUT) {
+      ep_set_rx_response(base, ep, CH58X_EP_R_RES_STALL);
+    } else {
+      ep_set_tx_response(base, ep, CH58X_EP_T_RES_STALL);
+    }
+  }
+  dcd_int_enable(rhport);
+}
+
+void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
+  dcd_data_t* d = &_dcd_data[rhport];
+  uint32_t base = d->usb_base;
+  uint8_t ep = tu_edpt_number(ep_addr);
+  uint8_t dir = tu_edpt_dir(ep_addr);
+
+  dcd_int_disable(rhport);
+  if (ep == 0) {
+    if (dir == TUSB_DIR_OUT) {
+      ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
+    }
+  } else {
+    uint8_t ctrl = EP_CTRL(base, ep);
+    if (dir == TUSB_DIR_OUT) {
+      ctrl &= ~(CH58X_EP_R_RES_MASK | CH58X_EP_R_TOG);
+      ctrl |= CH58X_EP_R_RES_ACK;
+    } else {
+      ctrl &= ~(CH58X_EP_T_RES_MASK | CH58X_EP_T_TOG);
+      ctrl |= CH58X_EP_T_RES_NAK;
+    }
+    EP_CTRL(base, ep) = ctrl;
+  }
+  dcd_int_enable(rhport);
+}
+
+#endif /* CFG_TUD_ENABLED && TUP_USBIP_WCH_CH58X */
diff --git a/src/portable/wch/hcd_ch58x_usbfs.c b/src/portable/wch/hcd_ch58x_usbfs.c
new file mode 100644
index 000000000..629c2a789
--- /dev/null
+++ b/src/portable/wch/hcd_ch58x_usbfs.c
@@ -0,0 +1,712 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUH_ENABLED && defined(TUP_USBIP_WCH_CH58X) && \
+    defined(CFG_TUH_WCH_USBIP_USBFS) && CFG_TUH_WCH_USBIP_USBFS
+
+#include <string.h>
+
+#include "host/hcd.h"
+#include "host/usbh.h"
+#include "host/usbh_pvt.h"
+
+#include "ch58x_usbfs_reg.h"
+
+//--------------------------------------------------------------------+
+// Configuration
+//--------------------------------------------------------------------+
+#define USBFS_MAX_PACKET_SIZE  64
+
+#define LOG_CH58X_HCD(...)  TU_LOG3(__VA_ARGS__)
+
+//--------------------------------------------------------------------+
+// RX/TX buffers (must be 4-byte aligned and in lower 64KB of RAM)
+// Separate buffers for each USB port to avoid DMA conflicts
+//--------------------------------------------------------------------+
+TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[2][USBFS_MAX_PACKET_SIZE];
+TU_ATTR_ALIGNED(4) static uint8_t _tx_buf[2][USBFS_MAX_PACKET_SIZE];
+
+//--------------------------------------------------------------------+
+// USB base address selection by rhport
+//--------------------------------------------------------------------+
+static inline uint32_t _get_usb_base(uint8_t rhport) {
+  return (rhport == 0) ? CH58X_USB_BASE : CH58X_USB2_BASE;
+}
+
+//--------------------------------------------------------------------+
+// Endpoint record
+//--------------------------------------------------------------------+
+typedef struct {
+  bool configured;
+  uint8_t dev_addr;
+  uint8_t ep_addr;
+  uint8_t max_packet_size;
+  uint8_t xfer_type;
+  uint8_t data_toggle;   // 0=DATA0, 1=DATA1
+  bool is_nak_pending;
+  uint16_t buflen;
+  uint8_t* buf;
+} hcd_edpt_t;
+
+static hcd_edpt_t _edpt_list[CFG_TUH_DEVICE_MAX * 6] = {};
+
+//--------------------------------------------------------------------+
+// Current transfer state (only one transfer at a time per root port)
+//--------------------------------------------------------------------+
+typedef struct {
+  volatile bool is_busy;
+  uint8_t rhport;
+  uint8_t dev_addr;
+  uint8_t ep_addr;
+  uint32_t start_ms;
+  uint8_t* buffer;
+  uint16_t bufferlen;
+  uint16_t xferred_len;
+  bool nak_pending;
+} hcd_xfer_t;
+
+static volatile hcd_xfer_t _current_xfer = {};
+
+//--------------------------------------------------------------------+
+// Per-port state
+//--------------------------------------------------------------------+
+typedef struct {
+  uint32_t usb_base;
+  bool int_enabled;
+} hcd_port_t;
+
+static hcd_port_t _port_data[2] = {};
+
+//--------------------------------------------------------------------+
+// Endpoint record management
+//--------------------------------------------------------------------+
+static hcd_edpt_t* _get_edpt(uint8_t dev_addr, uint8_t ep_addr) {
+  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
+    hcd_edpt_t* e = &_edpt_list[i];
+    if (e->configured && e->dev_addr == dev_addr && e->ep_addr == ep_addr) {
+      return e;
+    }
+  }
+  return NULL;
+}
+
+static hcd_edpt_t* _alloc_edpt(void) {
+  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
+    if (!_edpt_list[i].configured) {
+      return &_edpt_list[i];
+    }
+  }
+  return NULL;
+}
+
+static hcd_edpt_t* _add_edpt(uint8_t dev_addr, uint8_t ep_addr,
+                              uint16_t max_packet_size, uint8_t xfer_type) {
+  hcd_edpt_t* e = _alloc_edpt();
+  TU_ASSERT(e != NULL, NULL);
+
+  e->dev_addr = dev_addr;
+  e->ep_addr = ep_addr;
+  e->max_packet_size = (uint8_t) TU_MIN(max_packet_size, USBFS_MAX_PACKET_SIZE);
+  e->xfer_type = xfer_type;
+  e->data_toggle = 0;
+  e->is_nak_pending = false;
+  e->buflen = 0;
+  e->buf = NULL;
+  e->configured = true;
+
+  return e;
+}
+
+static hcd_edpt_t* _get_or_add_edpt(uint8_t dev_addr, uint8_t ep_addr,
+                                     uint16_t max_packet_size, uint8_t xfer_type) {
+  hcd_edpt_t* e = _get_edpt(dev_addr, ep_addr);
+  if (e != NULL) return e;
+  return _add_edpt(dev_addr, ep_addr, max_packet_size, xfer_type);
+}
+
+static void _remove_edpts_for_device(uint8_t dev_addr) {
+  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
+    if (_edpt_list[i].configured && _edpt_list[i].dev_addr == dev_addr) {
+      _edpt_list[i].configured = false;
+    }
+  }
+}
+
+//--------------------------------------------------------------------+
+// Low-level hardware helpers
+//--------------------------------------------------------------------+
+
+// Busywait delay (approximate microseconds at ~60MHz)
+TU_ATTR_ALWAYS_INLINE static inline void _delay_loops(uint32_t count) {
+  volatile uint32_t c = count / 3;
+  if (c == 0) return;
+  while (c-- != 0) {}
+}
+
+static void _hw_init_host(uint8_t rhport, bool enabled) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  if (!enabled) {
+    // Reset SIE when disabling
+    CH58X_USB_CTRL(base) = CH58X_UC_RESET_SIE | CH58X_UC_CLR_ALL;
+    _delay_loops(600); // ~10us at 60MHz
+    CH58X_USB_CTRL(base) = 0;
+    return;
+  }
+
+  // host mode, pull-down enabled, clear addr
+  CH58X_USB_CTRL(base) = CH58X_UC_HOST_MODE;
+  while (!(CH58X_USB_CTRL(base) & CH58X_UC_HOST_MODE)) {}
+  CH58X_UHOST_CTRL(base) = 0;
+  CH58X_USB_DEV_AD(base) = 0x00;
+
+  // EP2 RX (IN), EP3 TX (OUT/SETUP)
+  CH58X_UH_EP_MOD(base) = CH58X_UH_EP_TX_EN | CH58X_UH_EP_RX_EN;
+
+  // DMA: 16-bit address, lower 64KB only
+  CH58X_UH_RX_DMA(base) = (uint16_t)(uint32_t)_rx_buf[rhport];
+  CH58X_UH_TX_DMA(base) = (uint16_t)(uint32_t)_tx_buf[rhport];
+
+  CH58X_UH_RX_CTRL(base) = 0x00;
+  CH58X_UH_TX_CTRL(base) = 0x00;
+
+  CH58X_USB_CTRL(base) = CH58X_UC_HOST_MODE | CH58X_UC_INT_BUSY | CH58X_UC_DMA_EN;
+  CH58X_UH_SETUP(base) = CH58X_UH_SOF_EN;
+
+  CH58X_USB_INT_FG(base) = 0xFF; // clear all flags
+  CH58X_USB_INT_EN(base) = CH58X_UIE_TRANSFER | CH58X_UIE_DETECT;
+}
+
+static bool _hw_start_xfer(uint8_t rhport, uint8_t pid, uint8_t ep_addr, uint8_t data_toggle) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("_hw_start_xfer(pid=0x%02x, ep=0x%02x, tog=%d)\r\n", pid, ep_addr, data_toggle);
+
+  // Workaround: small delay for low-speed devices
+  bool is_lowspeed = tuh_speed_get(_current_xfer.dev_addr) == TUSB_SPEED_LOW;
+  if (is_lowspeed) {
+    _delay_loops(60000000 / 1000000 * 40); // ~40us at 60MHz
+  }
+
+  // Set toggle controls (same as SDK: R8_UH_RX_CTRL = R8_UH_TX_CTRL = tog)
+  uint8_t tog_ctrl = (data_toggle != 0) ? CH58X_UH_T_TOG : 0;
+  CH58X_UH_TX_CTRL(base) = tog_ctrl;
+  CH58X_UH_RX_CTRL(base) = (data_toggle != 0) ? CH58X_UH_R_TOG : 0;
+
+  uint8_t pid_endp = (pid << 4) | (tu_edpt_number(ep_addr) & 0x0F);
+
+  // clear flag, enable int, then set PID to start transfer
+  CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+  CH58X_USB_INT_EN(base) |= CH58X_UIE_TRANSFER;
+  CH58X_UH_EP_PID(base) = pid_endp;
+
+  return true;
+}
+
+static void _hw_set_device_addr(uint8_t rhport, uint8_t dev_addr) {
+  uint32_t base = _port_data[rhport].usb_base;
+  CH58X_USB_DEV_AD(base) = (CH58X_USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
+                            (dev_addr & CH58X_USB_ADDR_MASK);
+}
+
+static void _hw_set_speed(uint8_t rhport, tusb_speed_t speed) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("_hw_set_speed(%s)\r\n",
+                speed == TUSB_SPEED_FULL ? "Full" : "Low");
+
+  if (speed == TUSB_SPEED_LOW) {
+    CH58X_USB_CTRL(base) |= CH58X_UC_LOW_SPEED;
+    CH58X_UHOST_CTRL(base) |= CH58X_UH_LOW_SPEED;
+  } else {
+    CH58X_USB_CTRL(base) &= ~CH58X_UC_LOW_SPEED;
+    CH58X_UHOST_CTRL(base) &= ~CH58X_UH_LOW_SPEED;
+    CH58X_UH_SETUP(base) &= ~CH58X_UH_PRE_PID_EN;
+  }
+}
+
+static void _hw_set_addr_speed(uint8_t rhport, uint8_t dev_addr) {
+  _hw_set_device_addr(rhport, dev_addr);
+
+  tusb_speed_t rhport_speed = hcd_port_speed_get(rhport);
+  tusb_speed_t dev_speed = tuh_speed_get(dev_addr);
+  _hw_set_speed(rhport, dev_speed);
+
+  // FS root + LS device: hub uses PRE PID, clear LS on host ctrl
+  if (rhport_speed == TUSB_SPEED_FULL && dev_speed == TUSB_SPEED_LOW) {
+    uint32_t base = _port_data[rhport].usb_base;
+    CH58X_UHOST_CTRL(base) &= ~CH58X_UH_LOW_SPEED;
+  }
+}
+
+static bool _hw_device_attached(uint8_t rhport) {
+  uint32_t base = _port_data[rhport].usb_base;
+  return (CH58X_USB_MIS_ST(base) & CH58X_UMS_DEV_ATTACH) != 0;
+}
+
+//--------------------------------------------------------------------+
+// NAK retry callback
+//--------------------------------------------------------------------+
+static void _xfer_retry(void* param) {
+  LOG_CH58X_HCD("_xfer_retry()\r\n");
+  hcd_edpt_t* edpt = (hcd_edpt_t*)param;
+
+  if (_current_xfer.nak_pending) {
+    uint8_t rhport = _current_xfer.rhport;
+    _current_xfer.nak_pending = false;
+    edpt->is_nak_pending = false;
+
+    uint8_t dev_addr = edpt->dev_addr;
+    uint8_t ep_addr = edpt->ep_addr;
+    uint16_t buflen = edpt->buflen;
+    uint8_t* buf = edpt->buf;
+
+    // Check if endpoint is still valid
+    hcd_edpt_t* current = _get_edpt(dev_addr, ep_addr);
+    if (current) {
+      hcd_edpt_xfer(rhport, dev_addr, ep_addr, buf, buflen);
+    }
+  }
+}
+
+//--------------------------------------------------------------------+
+// HCD API: Controller
+//--------------------------------------------------------------------+
+bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
+  (void)rh_init;
+
+  _port_data[rhport].usb_base = _get_usb_base(rhport);
+  _port_data[rhport].int_enabled = false;
+
+  // Clear endpoint records
+  tu_memclr(_edpt_list, sizeof(_edpt_list));
+  tu_memclr((void*)&_current_xfer, sizeof(_current_xfer));
+
+  _hw_init_host(rhport, true);
+
+  return true;
+}
+
+bool hcd_deinit(uint8_t rhport) {
+  _hw_init_host(rhport, false);
+  return true;
+}
+
+uint32_t hcd_frame_number(uint8_t rhport) {
+  (void)rhport;
+  return tusb_time_millis_api();
+}
+
+void hcd_int_enable(uint8_t rhport) {
+  // PFIC interrupt enable
+  volatile uint32_t* pfic_ienr = (volatile uint32_t*)0xE000E100;
+  uint8_t irqn = (rhport == 0) ? 22 : 23; // USB_IRQn or USB2_IRQn
+  pfic_ienr[irqn / 32] = (1u << (irqn % 32));
+  _port_data[rhport].int_enabled = true;
+}
+
+void hcd_int_disable(uint8_t rhport) {
+  volatile uint32_t* pfic_irer = (volatile uint32_t*)0xE000E180;
+  uint8_t irqn = (rhport == 0) ? 22 : 23;
+  pfic_irer[irqn / 32] = (1u << (irqn % 32));
+  __asm volatile("fence.i");
+  _port_data[rhport].int_enabled = false;
+}
+
+//--------------------------------------------------------------------+
+// HCD API: Port
+//--------------------------------------------------------------------+
+bool hcd_port_connect_status(uint8_t rhport) {
+  return _hw_device_attached(rhport);
+}
+
+tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
+  uint32_t base = _port_data[rhport].usb_base;
+  // DM level high = low-speed device, low = full-speed
+  if (CH58X_USB_MIS_ST(base) & CH58X_UMS_DM_LEVEL) {
+    return TUSB_SPEED_LOW;
+  }
+  return TUSB_SPEED_FULL;
+}
+
+static bool _int_state_before_reset = false;
+
+void hcd_port_reset(uint8_t rhport) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("hcd_port_reset()\r\n");
+
+  _int_state_before_reset = _port_data[rhport].int_enabled;
+  hcd_int_disable(rhport);
+
+  _hw_set_device_addr(rhport, 0x00);
+
+  // Disable port and default to full-speed before reset (matches SDK ResetRootHubPort)
+  CH58X_UHOST_CTRL(base) &= ~CH58X_UH_PORT_EN;
+  _hw_set_speed(rhport, TUSB_SPEED_FULL);
+
+  // Start bus reset (clear low-speed bit simultaneously)
+  CH58X_UHOST_CTRL(base) = (CH58X_UHOST_CTRL(base) & ~CH58X_UH_LOW_SPEED) | CH58X_UH_BUS_RESET;
+}
+
+void hcd_port_reset_end(uint8_t rhport) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("hcd_port_reset_end()\r\n");
+
+  // End bus reset
+  CH58X_UHOST_CTRL(base) &= ~CH58X_UH_BUS_RESET;
+  tusb_time_delay_ms_api(2);
+
+  // Detect speed and configure
+  if ((CH58X_UHOST_CTRL(base) & CH58X_UH_PORT_EN) == 0) {
+    if (hcd_port_speed_get(rhport) == TUSB_SPEED_LOW) {
+      _hw_set_speed(rhport, TUSB_SPEED_LOW);
+    }
+  }
+
+  // Enable port and SOF
+  CH58X_UHOST_CTRL(base) |= CH58X_UH_PORT_EN;
+  CH58X_UH_SETUP(base) |= CH58X_UH_SOF_EN;
+
+  // Suppress stale detect event
+  CH58X_USB_INT_FG(base) = CH58X_UIF_DETECT;
+
+  if (_int_state_before_reset) {
+    hcd_int_enable(rhport);
+  }
+}
+
+void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
+  (void)rhport;
+  LOG_CH58X_HCD("hcd_device_close(dev=0x%02x)\r\n", dev_addr);
+  _remove_edpts_for_device(dev_addr);
+}
+
+//--------------------------------------------------------------------+
+// HCD API: Endpoint
+//--------------------------------------------------------------------+
+bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) {
+  uint8_t ep_addr = ep_desc->bEndpointAddress;
+  uint8_t ep_num = tu_edpt_number(ep_addr);
+  uint16_t max_packet_size = ep_desc->wMaxPacketSize;
+  uint8_t xfer_type = ep_desc->bmAttributes.xfer;
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("hcd_edpt_open(dev=0x%02x, ep=0x%02x, mps=%d, type=%d)\r\n",
+                dev_addr, ep_addr, max_packet_size, xfer_type);
+
+  // Wait for any pending transfer
+  while (_current_xfer.is_busy) {}
+
+  if (ep_num == 0) {
+    TU_ASSERT(_get_or_add_edpt(dev_addr, 0x00, max_packet_size, xfer_type) != NULL, false);
+    TU_ASSERT(_get_or_add_edpt(dev_addr, 0x80, max_packet_size, xfer_type) != NULL, false);
+  } else {
+    TU_ASSERT(_get_or_add_edpt(dev_addr, ep_addr, max_packet_size, xfer_type) != NULL, false);
+  }
+
+  // Ensure port is enabled with SOF
+  CH58X_UHOST_CTRL(base) |= CH58X_UH_PORT_EN;
+  CH58X_UH_SETUP(base) |= CH58X_UH_SOF_EN;
+
+  _hw_set_addr_speed(rhport, dev_addr);
+
+  return true;
+}
+
+bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr,
+                   uint8_t* buffer, uint16_t buflen) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("hcd_edpt_xfer(dev=0x%02x, ep=0x%02x, len=%d)\r\n",
+                dev_addr, ep_addr, buflen);
+
+  // Wait for any pending transfer
+  while (_current_xfer.is_busy) {}
+  _current_xfer.is_busy = true;
+
+  hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
+  TU_ASSERT(edpt != NULL);
+
+  _hw_set_addr_speed(rhport, dev_addr);
+
+  _current_xfer.rhport = rhport;
+  _current_xfer.dev_addr = dev_addr;
+  _current_xfer.ep_addr = ep_addr;
+  _current_xfer.buffer = buffer;
+  _current_xfer.bufferlen = buflen;
+  _current_xfer.start_ms = tusb_time_millis_api();
+  _current_xfer.xferred_len = 0;
+  _current_xfer.nak_pending = false;
+
+  if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
+    // IN transfer: host receives data
+    return _hw_start_xfer(rhport, CH58X_USB_PID_IN, ep_addr, edpt->data_toggle);
+  } else {
+    // OUT transfer: host sends data
+    uint16_t copylen = TU_MIN(edpt->max_packet_size, buflen);
+    CH58X_UH_TX_LEN(base) = (uint8_t)copylen;
+    memcpy(_tx_buf[rhport], buffer, copylen);
+    return _hw_start_xfer(rhport, CH58X_USB_PID_OUT, ep_addr, edpt->data_toggle);
+  }
+}
+
+bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  (void)rhport;
+  (void)dev_addr;
+  (void)ep_addr;
+  return false;
+}
+
+bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  LOG_CH58X_HCD("hcd_setup_send(dev=0x%02x)\r\n", dev_addr);
+
+  // Wait for any pending transfer
+  while (_current_xfer.is_busy) {}
+  _current_xfer.is_busy = true;
+
+  _hw_set_addr_speed(rhport, dev_addr);
+
+  hcd_edpt_t* edpt_tx = _get_edpt(dev_addr, 0x00);
+  hcd_edpt_t* edpt_rx = _get_edpt(dev_addr, 0x80);
+  TU_ASSERT(edpt_tx != NULL, false);
+  TU_ASSERT(edpt_rx != NULL, false);
+
+  // SETUP always starts with DATA0; after SETUP, IN data starts with DATA1
+  edpt_tx->data_toggle = 0;
+  edpt_rx->data_toggle = 1;
+
+  memcpy(_tx_buf[rhport], setup_packet, 8);
+  CH58X_UH_TX_LEN(base) = 8;
+
+  _current_xfer.rhport = rhport;
+  _current_xfer.dev_addr = dev_addr;
+  _current_xfer.ep_addr = 0x00;  // SETUP always targets EP0 OUT
+  _current_xfer.start_ms = tusb_time_millis_api();
+  _current_xfer.buffer = _tx_buf[rhport];
+  _current_xfer.bufferlen = 8;
+  _current_xfer.xferred_len = 0;
+  _current_xfer.nak_pending = false;
+
+  _hw_start_xfer(rhport, CH58X_USB_PID_SETUP, 0, 0);
+
+  return true;
+}
+
+bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
+  uint32_t base = _port_data[rhport].usb_base;
+  uint8_t ep_num = tu_edpt_number(ep_addr);
+
+  LOG_CH58X_HCD("hcd_edpt_clear_stall(dev=0x%02x, ep=0x%02x)\r\n", dev_addr, ep_addr);
+
+  // Send CLEAR_FEATURE(ENDPOINT_HALT) via blocking transfer
+  uint8_t setup[8] = {
+    0x02, 0x01, 0x00, 0x00, ep_addr, 0x00, 0x00, 0x00
+  };
+  memcpy(_tx_buf[rhport], setup, 8);
+  CH58X_UH_TX_LEN(base) = 8;
+
+  bool prev_int = _port_data[rhport].int_enabled;
+  hcd_int_disable(rhport);
+
+  CH58X_UH_EP_PID(base) = (CH58X_USB_PID_SETUP << 4) | 0x00;
+  CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+  while ((CH58X_USB_INT_FG(base) & CH58X_UIF_TRANSFER) == 0) {}
+  CH58X_UH_EP_PID(base) = 0;
+
+  uint8_t response = CH58X_USB_INT_ST(base) & CH58X_UIS_H_RES_MASK;
+  (void)response;
+
+  LOG_CH58X_HCD("clear_stall response=0x%02x\r\n", response);
+
+  if (prev_int) {
+    hcd_int_enable(rhport);
+  }
+
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// Interrupt Handler
+//--------------------------------------------------------------------+
+void hcd_int_handler(uint8_t rhport, bool in_isr) {
+  uint32_t base = _port_data[rhport].usb_base;
+
+  //-- Device attach/detach detection --
+  if (CH58X_USB_INT_FG(base) & CH58X_UIF_DETECT) {
+    CH58X_USB_INT_FG(base) = CH58X_UIF_DETECT;
+
+    bool attached = _hw_device_attached(rhport);
+    LOG_CH58X_HCD("hcd_int: detect, attached=%d\r\n", attached);
+
+    if (attached) {
+      hcd_event_device_attach(rhport, in_isr);
+    } else {
+      hcd_event_device_remove(rhport, in_isr);
+    }
+    return;
+  }
+
+  //-- Transfer complete --
+  if (CH58X_USB_INT_FG(base) & CH58X_UIF_TRANSFER) {
+    // Read PID/endpoint before stopping (must read first!)
+    uint8_t pid_endp = CH58X_UH_EP_PID(base);
+    uint8_t int_st = CH58X_USB_INT_ST(base);
+    uint8_t int_fg = CH58X_USB_INT_FG(base);
+    uint8_t dev_addr = CH58X_USB_DEV_AD(base) & CH58X_USB_ADDR_MASK;
+
+    // Stop USB transaction immediately (SDK: R8_UH_EP_PID = 0x00)
+    CH58X_UH_EP_PID(base) = 0x00;
+
+    // Disable transfer interrupt (re-enabled when next transfer starts)
+    CH58X_USB_INT_EN(base) &= ~CH58X_UIE_TRANSFER;
+
+    uint8_t request_pid = pid_endp >> 4;
+    uint8_t response_pid = int_st & CH58X_UIS_H_RES_MASK;
+    uint8_t ep_addr = pid_endp & 0x0F;
+    if (request_pid == CH58X_USB_PID_IN) {
+      ep_addr |= 0x80;
+    }
+
+    LOG_CH58X_HCD("hcd_int: xfer pid=0x%02x ep=0x%02x resp=0x%02x\r\n",
+                  request_pid, ep_addr, response_pid);
+
+    hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
+    if (edpt == NULL) {
+      // Unknown endpoint, discard
+      LOG_CH58X_HCD("hcd_int: unknown edpt dev=0x%02x ep=0x%02x\r\n", dev_addr, ep_addr);
+      _current_xfer.is_busy = false;
+      CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+      return;
+    }
+
+    // Check toggle match - SDK uses R8_USB_INT_ST & RB_UIS_TOG_OK
+    if (int_st & CH58X_UIS_TOG_OK) {
+      edpt->data_toggle ^= 0x01;
+
+      switch (request_pid) {
+        case CH58X_USB_PID_SETUP:
+        case CH58X_USB_PID_OUT: {
+          uint8_t tx_len = CH58X_UH_TX_LEN(base);
+          _current_xfer.bufferlen -= tx_len;
+          _current_xfer.xferred_len += tx_len;
+
+          if (_current_xfer.bufferlen == 0) {
+            LOG_CH58X_HCD("OUT/SETUP complete, %d bytes\r\n", _current_xfer.xferred_len);
+            _current_xfer.is_busy = false;
+            hcd_event_xfer_complete(dev_addr, ep_addr,
+                                    _current_xfer.xferred_len, XFER_RESULT_SUCCESS, in_isr);
+          } else {
+            // Multi-packet OUT: send next chunk
+            _current_xfer.buffer += tx_len;
+            uint16_t copylen = TU_MIN(edpt->max_packet_size, _current_xfer.bufferlen);
+            memcpy(_tx_buf[rhport], _current_xfer.buffer, copylen);
+            CH58X_UH_TX_LEN(base) = (uint8_t)copylen;
+            _hw_start_xfer(rhport, CH58X_USB_PID_OUT, ep_addr, edpt->data_toggle);
+          }
+          break;
+        }
+
+        case CH58X_USB_PID_IN: {
+          uint8_t rx_len = CH58X_USB_RX_LEN(base);
+          _current_xfer.xferred_len += rx_len;
+          uint16_t xferred = _current_xfer.xferred_len;
+
+          if (rx_len > 0 && _current_xfer.buffer != NULL) {
+            memcpy(_current_xfer.buffer, _rx_buf[rhport], rx_len);
+            _current_xfer.buffer += rx_len;
+          }
+
+          if ((rx_len < edpt->max_packet_size) || (xferred == _current_xfer.bufferlen)) {
+            // Short packet or transfer complete
+            LOG_CH58X_HCD("IN complete, %d bytes\r\n", xferred);
+            _current_xfer.is_busy = false;
+            hcd_event_xfer_complete(dev_addr, ep_addr, xferred,
+                                    XFER_RESULT_SUCCESS, in_isr);
+          } else {
+            // More data expected
+            _hw_start_xfer(rhport, CH58X_USB_PID_IN, ep_addr, edpt->data_toggle);
+          }
+          break;
+        }
+
+        default: {
+          LOG_CH58X_HCD("unexpected PID 0x%02x\r\n", request_pid);
+          _current_xfer.is_busy = false;
+          hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
+          break;
+        }
+      }
+    } else {
+      // Toggle mismatch, check response PID
+      if (response_pid == CH58X_USB_PID_STALL) {
+        LOG_CH58X_HCD("STALL response\r\n");
+        edpt->data_toggle = 0;
+        _current_xfer.is_busy = false;
+        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_STALLED, in_isr);
+      } else if (response_pid == CH58X_USB_PID_NAK) {
+        LOG_CH58X_HCD("NAK response\r\n");
+        // NAK: schedule retry via deferred callback for all endpoint types
+        // This avoids tight polling loops and allows other tasks to run
+        _current_xfer.is_busy = false;
+        _current_xfer.nak_pending = true;
+
+        edpt->is_nak_pending = true;
+        edpt->buflen = _current_xfer.bufferlen;
+        edpt->buf = _current_xfer.buffer;
+
+        hcd_event_t event = {
+          .rhport = rhport,
+          .dev_addr = dev_addr,
+          .event_id = USBH_EVENT_FUNC_CALL,
+          .func_call = {
+            .func = _xfer_retry,
+            .param = edpt
+          }
+        };
+        hcd_event_handler(&event, in_isr);
+      } else if (response_pid == CH58X_USB_PID_DATA0 || response_pid == CH58X_USB_PID_DATA1) {
+        LOG_CH58X_HCD("toggle mismatch, DATA0/1 rx_len=%d\r\n", CH58X_USB_RX_LEN(base));
+        _current_xfer.is_busy = false;
+        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
+      } else {
+        LOG_CH58X_HCD("unexpected response 0x%02x\r\n", response_pid);
+        _current_xfer.is_busy = false;
+        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
+      }
+    }
+
+    // Clear transfer flag
+    CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+  }
+}
+
+#endif /* CFG_TUH_ENABLED && TUP_USBIP_WCH_CH58X */
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 9eb8ee533..50998613a 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -193,6 +193,7 @@
 #define OPT_MCU_CH32F20X         2210 ///< WCH CH32F20x
 #define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20X
 #define OPT_MCU_CH32V103         2230 ///< WCH CH32V103
+#define OPT_MCU_CH58X            2240 ///< WCH CH582/CH583
 
 // NXP LPC MCX
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
-- 
cgit v1.3.1


From 20fdaeef6ca8853002087927e460c0b6339049cd Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Thu, 26 Feb 2026 21:10:04 +0800
Subject: ch58x: fix MCU macro naming and add get_deps/boards entries

---
 docs/reference/boards.rst | 1 +
 hw/bsp/ch58x/family.cmake | 2 +-
 hw/bsp/ch58x/family.mk    | 2 +-
 src/common/tusb_mcu.h     | 4 ++--
 src/tusb_option.h         | 4 +++-
 tools/get_deps.py         | 3 +++
 6 files changed, 11 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index ec91b343e..517c479fe 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -368,4 +368,5 @@ ch32v203g_r0_1v0  CH32V203G-R0-1v0  ch32v20x  https://github.com/openwch/ch32v20
 nanoch32v203      nanoCH32V203      ch32v20x  https://github.com/wuxx/nanoCH32V203
 ch32v307v_r1_1v0  CH32V307V-R1-1v0  ch32v30x  https://github.com/openwch/ch32v307/tree/main/SCHPCB/CH32V307V-R1-1v0
 nanoch32v305      nanoCH32V305      ch32v30x  https://github.com/wuxx/nanoCH32V305
+yd-ch582m         yd-ch582m         ch58x     http://vcc-gnd.com
 ================  ================  ========  =====================================================================  ======
diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index 9ad158662..64b534eb1 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -64,7 +64,7 @@ endfunction()
 #------------------------------------
 function(family_configure_example TARGET RTOS)
   family_configure_common(${TARGET} ${RTOS})
-  family_add_tinyusb(${TARGET} OPT_MCU_CH582)
+  family_add_tinyusb(${TARGET} OPT_MCU_CH58X)
 
   target_sources(${TARGET} PUBLIC
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 41eb36c84..566842f93 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -13,7 +13,7 @@ CFLAGS += \
 	-mno-save-restore \
 	-fmessage-length=0 \
 	-fsigned-char \
-	-DCFG_TUSB_MCU=OPT_MCU_CH582 \
+	-DCFG_TUSB_MCU=OPT_MCU_CH58X \
 	-DCFG_TUD_WCH_USBIP_USBFS=1 \
 	-DFREQ_SYS=60000000 \
 
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 02364d580..dfeae3fbb 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -629,8 +629,8 @@
     #define TUP_DCD_EDPT_CLOSE_API
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_CH582)
-  // CH58x has 2 independent USBFS controllers with merged EP registers, FS only.
+#elif TU_CHECK_MCU(OPT_MCU_CH58X)
+  // CH582/583 has 2 independent USBFS controllers with merged EP registers, FS only.
   #define TUP_USBIP_WCH_CH58X
 
   #ifndef CFG_TUD_WCH_USBIP_USBFS
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 50998613a..699e3d44d 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -193,7 +193,9 @@
 #define OPT_MCU_CH32F20X         2210 ///< WCH CH32F20x
 #define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20X
 #define OPT_MCU_CH32V103         2230 ///< WCH CH32V103
-#define OPT_MCU_CH58X            2240 ///< WCH CH582/CH583
+#define OPT_MCU_CH58X            2240 ///< WCH CH58x series (CH582/CH583)
+#define OPT_MCU_CH582            OPT_MCU_CH58X  ///< alias
+#define OPT_MCU_CH583            OPT_MCU_CH58X  ///< alias
 
 // NXP LPC MCX
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 25b85ac3b..eb239bf34 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -241,6 +241,9 @@ deps_optional = {
     'hw/mcu/wch/ch32f20x': ['https://github.com/openwch/ch32f20x.git',
                             '77c4095087e5ed2c548ec9058e655d0b8757663b',
                             'ch32f20x'],
+    'hw/mcu/wch/ch58x': ['https://github.com/openwch/ch583.git',
+                         'bd508ad7ceed48377619837051412a651952857f',
+                         'ch58x'],
     'hw/mcu/artery/at32f403a_407': ['https://github.com/ArteryTek/AT32F403A_407_Firmware_Library.git',
                                     'f2cb360c3d28fada76b374308b8c4c61d37a090b',
                                     'at32f403a_407'],
-- 
cgit v1.3.1


From 2e913256073a07a993b3d3cb9abe8e1db97686db Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Fri, 27 Feb 2026 01:30:39 +0800
Subject: ch58x: fix build flags and driver bugs

---
 hw/bsp/ch58x/family.mk             | 14 ++++++--
 src/portable/wch/ch58x_usbfs_reg.h | 37 ++++++++------------
 src/portable/wch/dcd_ch58x_usbfs.c | 70 ++++++++++++++++++++------------------
 src/portable/wch/hcd_ch58x_usbfs.c | 60 ++++++++++++++++----------------
 src/tusb_option.h                  |  6 ++--
 5 files changed, 96 insertions(+), 91 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 566842f93..7b62af646 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -1,3 +1,9 @@
+# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
+#CROSS_COMPILE ?= riscv32-unknown-elf-
+
+# Toolchain from https://nucleisys.com/download.php
+#CROSS_COMPILE ?= riscv-nuclei-elf-
+
 # Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
 CROSS_COMPILE ?= riscv-none-elf-
 
@@ -9,17 +15,21 @@ CPU_CORE ?= rv32imac-ilp32
 
 CFLAGS += \
 	-flto \
-	-msmall-data-limit=8 \
+	-msmall-data-limit=16 \
 	-mno-save-restore \
 	-fmessage-length=0 \
 	-fsigned-char \
 	-DCFG_TUSB_MCU=OPT_MCU_CH58X \
 	-DCFG_TUD_WCH_USBIP_USBFS=1 \
 	-DFREQ_SYS=60000000 \
+	-DDISK_LIB_ENABLE=0 \
+	-DINT_SOFT \
+
+CFLAGS += -Wno-error=strict-prototypes
 
 LDFLAGS_GCC += \
 	-nostdlib -nostartfiles \
-	--specs=nosys.specs --specs=nano.specs \
+	--specs=nosys.specs \
 
 SRC_C += \
 	src/portable/wch/dcd_ch58x_usbfs.c \
diff --git a/src/portable/wch/ch58x_usbfs_reg.h b/src/portable/wch/ch58x_usbfs_reg.h
index 11479a4f6..868589729 100644
--- a/src/portable/wch/ch58x_usbfs_reg.h
+++ b/src/portable/wch/ch58x_usbfs_reg.h
@@ -55,30 +55,23 @@
 #define CH58X_UEP567_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0E))
 
 //--------------------------------------------------------------------+
-// Endpoint DMA / T_LEN / CTRL offset lookup tables
-// EP0-EP4 are at low offsets, EP5-EP7 jump to higher offsets
-// EP4 shares DMA with EP0 (no independent DMA register)
-//--------------------------------------------------------------------+
-static const uint8_t ch58x_ep_dma_offset[] = {
-  0x10, 0x14, 0x18, 0x1C,  /* EP0, EP1, EP2, EP3 */
-  0xFF,                     /* EP4: shares with EP0, sentinel */
-  0x54, 0x58, 0x5C          /* EP5, EP6, EP7 */
-};
-
-static const uint8_t ch58x_ep_tlen_offset[] = {
-  0x20, 0x24, 0x28, 0x2C, 0x30, /* EP0-EP4 */
-  0x64, 0x68, 0x6C              /* EP5-EP7 */
-};
-
-static const uint8_t ch58x_ep_ctrl_offset[] = {
-  0x22, 0x26, 0x2A, 0x2E, 0x32, /* EP0-EP4 */
-  0x66, 0x6A, 0x6E              /* EP5-EP7 */
-};
+// Endpoint DMA / T_LEN / CTRL register accessors
+//
+// EP0-EP3 DMA : base + 0x10 + ep*4  (EP4 shares EP0 DMA, no own register)
+// EP5-EP7 DMA : base + 0x54 + (ep-5)*4
+// EP0-EP4 TLEN: base + 0x20 + ep*4
+// EP5-EP7 TLEN: base + 0x64 + (ep-5)*4
+// EP0-EP4 CTRL: base + 0x22 + ep*4
+// EP5-EP7 CTRL: base + 0x66 + (ep-5)*4
+//
+// Using computed addresses avoids per-TU copies of static lookup tables.
+// EP4 DMA is not accessed directly (it shares EP0's DMA register).
+//--------------------------------------------------------------------+
 
 // EP DMA is 16-bit (only low 16 bits of RAM address, high bits implied 0x2000)
-#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ch58x_ep_dma_offset[ep]))
-#define CH58X_EP_TLEN(base, ep)  (*(volatile uint8_t  *)((base) + ch58x_ep_tlen_offset[ep]))
-#define CH58X_EP_CTRL(base, ep)  (*(volatile uint8_t  *)((base) + ch58x_ep_ctrl_offset[ep]))
+#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ((ep) <= 3 ? (0x10u + (ep)*4u) : (0x54u + ((ep)-5u)*4u))))
+#define CH58X_EP_TLEN(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x20u + (ep)*4u) : (0x64u + ((ep)-5u)*4u))))
+#define CH58X_EP_CTRL(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x22u + (ep)*4u) : (0x66u + ((ep)-5u)*4u))))
 
 //--------------------------------------------------------------------+
 // USB_CTRL (R8_USB_CTRL) bit definitions
diff --git a/src/portable/wch/dcd_ch58x_usbfs.c b/src/portable/wch/dcd_ch58x_usbfs.c
index 11ff2c7b1..ea4a5ac4a 100644
--- a/src/portable/wch/dcd_ch58x_usbfs.c
+++ b/src/portable/wch/dcd_ch58x_usbfs.c
@@ -165,16 +165,16 @@ static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
 }
 
 //--------------------------------------------------------------------+
-// EP has auto-toggle support?
+// AUTO_TOG supported on EP1/2/3/5/6/7 (no EP0 or EP4)
 //--------------------------------------------------------------------+
 static inline bool ep_has_auto_toggle(uint8_t ep) {
-  return (ep >= 1 && ep <= 3);
+  return (ep >= 1 && ep <= 3) || (ep >= 5 && ep <= 7);
 }
 
 //--------------------------------------------------------------------+
 // Private transfer helpers
 //--------------------------------------------------------------------+
-static void update_in(uint8_t rhport, uint8_t ep, bool force) {
+static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
   dcd_data_t* d = &_dcd_data[rhport];
   uint32_t base = d->usb_base;
   struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_IN];
@@ -213,12 +213,12 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force) {
       xfer->valid = false;
       ep_set_tx_response(base, ep, CH58X_EP_T_RES_NAK);
       dcd_event_xfer_complete(rhport, ep | TUSB_DIR_IN_MASK,
-                              xfer->processed_len, XFER_RESULT_SUCCESS, true);
+                              xfer->processed_len, XFER_RESULT_SUCCESS, in_isr);
     }
   }
 }
 
-static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
+static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len, bool in_isr) {
   dcd_data_t* d = &_dcd_data[rhport];
   uint32_t base = d->usb_base;
   struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_OUT];
@@ -239,7 +239,7 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
     if (xfer->len == 0 || len < xfer->max_size) {
       xfer->valid = false;
       dcd_event_xfer_complete(rhport, ep, xfer->processed_len,
-                              XFER_RESULT_SUCCESS, true);
+                              XFER_RESULT_SUCCESS, in_isr);
     }
 
     if (ep == 0) {
@@ -297,11 +297,11 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   EP_TLEN(base, 4) = 0;
   EP_CTRL(base, 4) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
 
-  // EP5-7: DMA + no auto-toggle
+  // EP5-7: DMA + auto-toggle
   for (uint8_t ep = 5; ep <= 7; ep++) {
     EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
     EP_TLEN(base, ep) = 0;
-    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+    EP_CTRL(base, ep) = CH58X_EP_AUTO_TOG | CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
   }
 
   // Set EP0 max size
@@ -325,18 +325,27 @@ void dcd_int_handler(uint8_t rhport) {
     // Check SETUP first via dedicated flag
     if (int_st & CH58X_UIS_SETUP_ACT) {
       // SETUP packet received on EP0
-      ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
+      // After SETUP, both toggle bits must be set to DATA1 (SDK reference)
+      EP_CTRL(base, 0) = CH58X_EP_R_TOG | CH58X_EP_T_TOG |
+                         CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
       d->ep0_tog = true;
       dcd_event_setup_received(rhport, ep_out_buffer(d, 0), true);
     } else {
       switch (token) {
         case CH58X_PID_OUT: {
           uint8_t rx_len = USB_RX_LEN(base);
-          if (!ep_has_auto_toggle(ep) && ep != 0) {
-            // Manual toggle for EP4-7
-            EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
+          if (ep == 0) {
+            // EP0: always process (toggle managed via SETUP reset)
+            update_out(rhport, 0, rx_len, true);
+          } else if (int_st & CH58X_UIS_TOG_OK) {
+            // Toggle matched: data is valid
+            if (!ep_has_auto_toggle(ep)) {
+              // EP4: manual toggle
+              EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
+            }
+            update_out(rhport, ep, rx_len, true);
           }
-          update_out(rhport, ep, rx_len);
+          // else: toggle mismatch, discard packet per datasheet
           break;
         }
 
@@ -345,7 +354,7 @@ void dcd_int_handler(uint8_t rhport) {
             // Manual toggle for EP4-7
             EP_CTRL(base, ep) ^= CH58X_EP_T_TOG;
           }
-          update_in(rhport, ep, false);
+          update_in(rhport, ep, false, true);
           break;
         }
 
@@ -370,19 +379,14 @@ void dcd_int_handler(uint8_t rhport) {
 
     USB_INT_FG(base) = CH58X_UIF_BUS_RST;
   } else if (status & CH58X_UIF_SUSPEND) {
-    if (USB_MIS_ST(base) & CH58X_UMS_SUSPEND) {
-      dcd_event_t event = {.rhport = rhport, .event_id = DCD_EVENT_SUSPEND};
-      dcd_event_handler(&event, true);
-    } else {
-      dcd_event_t event = {.rhport = rhport, .event_id = DCD_EVENT_RESUME};
-      dcd_event_handler(&event, true);
-    }
+    dcd_event_bus_signal(rhport,
+      (USB_MIS_ST(base) & CH58X_UMS_SUSPEND) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME,
+      true);
     USB_INT_FG(base) = CH58X_UIF_SUSPEND;
   }
 }
 
 void dcd_int_enable(uint8_t rhport) {
-  (void) rhport;
   // PFIC enable: USB_IRQn=22, USB2_IRQn=23
   volatile uint32_t* pfic_ienr = (volatile uint32_t*) 0xE000E100;
   uint8_t irqn = (rhport == 0) ? 22 : 23;
@@ -390,7 +394,6 @@ void dcd_int_enable(uint8_t rhport) {
 }
 
 void dcd_int_disable(uint8_t rhport) {
-  (void) rhport;
   volatile uint32_t* pfic_irer = (volatile uint32_t*) 0xE000E180;
   uint8_t irqn = (rhport == 0) ? 22 : 23;
   pfic_irer[irqn / 32] = (1u << (irqn % 32));
@@ -406,7 +409,7 @@ void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
 void dcd_remote_wakeup(uint8_t rhport) {
   uint32_t base = get_usb_base(rhport);
   USB_UDEV_CTRL(base) |= CH58X_UD_GP_BIT;
-  for (volatile int i = 0; i < 60000; i++) { } // ~1ms resume signal
+  tusb_time_delay_ms_api(1); // 1ms resume signal per USB spec
   USB_UDEV_CTRL(base) &= ~CH58X_UD_GP_BIT;
 }
 
@@ -421,12 +424,10 @@ void dcd_disconnect(uint8_t rhport) {
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en) {
-  uint32_t base = get_usb_base(rhport);
-  if (en) {
-    USB_INT_EN(base) |= CH58X_UIE_HST_SOF;
-  } else {
-    USB_INT_EN(base) &= ~CH58X_UIE_HST_SOF;
-  }
+  // CH58x has no device-mode SOF interrupt.
+  // RB_UIE_HST_SOF (0x08) is host-mode only and has no effect in device mode.
+  (void) rhport;
+  (void) en;
 }
 
 void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* request) {
@@ -436,7 +437,9 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* req
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
-    USB_DEV_AD(base) = (uint8_t) request->wValue;
+    // Preserve GP_BIT (bit7) when setting device address
+    USB_DEV_AD(base) = (USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
+                       ((uint8_t)request->wValue & CH58X_USB_ADDR_MASK);
   }
   ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
 }
@@ -505,7 +508,6 @@ bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t* desc_ep)
 
 bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
                    uint16_t total_bytes, bool is_isr) {
-  (void) is_isr;
   uint8_t ep = tu_edpt_number(ep_addr);
   uint8_t dir = tu_edpt_dir(ep_addr);
 
@@ -517,10 +519,9 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
   xfer->buffer = buffer;
   xfer->len = total_bytes;
   xfer->processed_len = 0;
-  dcd_int_enable(rhport);
 
   if (dir == TUSB_DIR_IN) {
-    update_in(rhport, ep, true);
+    update_in(rhport, ep, true, is_isr);
   } else {
     // For OUT direction, set endpoint to ACK to start receiving data
     if (ep != 0) {
@@ -531,6 +532,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
       }
     }
   }
+  dcd_int_enable(rhport);
   return true;
 }
 
diff --git a/src/portable/wch/hcd_ch58x_usbfs.c b/src/portable/wch/hcd_ch58x_usbfs.c
index 629c2a789..8a8da9f16 100644
--- a/src/portable/wch/hcd_ch58x_usbfs.c
+++ b/src/portable/wch/hcd_ch58x_usbfs.c
@@ -422,7 +422,13 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const*
                 dev_addr, ep_addr, max_packet_size, xfer_type);
 
   // Wait for any pending transfer
-  while (_current_xfer.is_busy) {}
+  uint32_t t0 = tusb_time_millis_api();
+  while (_current_xfer.is_busy) {
+    if (tusb_time_millis_api() - t0 > 200) {
+      _current_xfer.is_busy = false;
+      break;
+    }
+  }
 
   if (ep_num == 0) {
     TU_ASSERT(_get_or_add_edpt(dev_addr, 0x00, max_packet_size, xfer_type) != NULL, false);
@@ -447,8 +453,14 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr,
   LOG_CH58X_HCD("hcd_edpt_xfer(dev=0x%02x, ep=0x%02x, len=%d)\r\n",
                 dev_addr, ep_addr, buflen);
 
-  // Wait for any pending transfer
-  while (_current_xfer.is_busy) {}
+  // Wait for any pending transfer (with 200ms timeout to avoid deadlock on disconnect)
+  uint32_t t0 = tusb_time_millis_api();
+  while (_current_xfer.is_busy) {
+    if (tusb_time_millis_api() - t0 > 200) {
+      _current_xfer.is_busy = false;
+      return false;
+    }
+  }
   _current_xfer.is_busy = true;
 
   hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
@@ -490,7 +502,13 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   LOG_CH58X_HCD("hcd_setup_send(dev=0x%02x)\r\n", dev_addr);
 
   // Wait for any pending transfer
-  while (_current_xfer.is_busy) {}
+  uint32_t t0 = tusb_time_millis_api();
+  while (_current_xfer.is_busy) {
+    if (tusb_time_millis_api() - t0 > 200) {
+      _current_xfer.is_busy = false;
+      return false;
+    }
+  }
   _current_xfer.is_busy = true;
 
   _hw_set_addr_speed(rhport, dev_addr);
@@ -522,33 +540,12 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 }
 
 bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
-  uint32_t base = _port_data[rhport].usb_base;
-  uint8_t ep_num = tu_edpt_number(ep_addr);
+  (void) rhport;
 
   LOG_CH58X_HCD("hcd_edpt_clear_stall(dev=0x%02x, ep=0x%02x)\r\n", dev_addr, ep_addr);
-
-  // Send CLEAR_FEATURE(ENDPOINT_HALT) via blocking transfer
-  uint8_t setup[8] = {
-    0x02, 0x01, 0x00, 0x00, ep_addr, 0x00, 0x00, 0x00
-  };
-  memcpy(_tx_buf[rhport], setup, 8);
-  CH58X_UH_TX_LEN(base) = 8;
-
-  bool prev_int = _port_data[rhport].int_enabled;
-  hcd_int_disable(rhport);
-
-  CH58X_UH_EP_PID(base) = (CH58X_USB_PID_SETUP << 4) | 0x00;
-  CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-  while ((CH58X_USB_INT_FG(base) & CH58X_UIF_TRANSFER) == 0) {}
-  CH58X_UH_EP_PID(base) = 0;
-
-  uint8_t response = CH58X_USB_INT_ST(base) & CH58X_UIS_H_RES_MASK;
-  (void)response;
-
-  LOG_CH58X_HCD("clear_stall response=0x%02x\r\n", response);
-
-  if (prev_int) {
-    hcd_int_enable(rhport);
+  hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
+  if (edpt != NULL) {
+    edpt->data_toggle = 0;
   }
 
   return true;
@@ -570,6 +567,10 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
     if (attached) {
       hcd_event_device_attach(rhport, in_isr);
     } else {
+      // Stop any ongoing hardware transfer before reporting removal
+      CH58X_UH_EP_PID(base) = 0x00;
+      _current_xfer.is_busy = false;
+      _current_xfer.nak_pending = false;
       hcd_event_device_remove(rhport, in_isr);
     }
     return;
@@ -580,7 +581,6 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
     // Read PID/endpoint before stopping (must read first!)
     uint8_t pid_endp = CH58X_UH_EP_PID(base);
     uint8_t int_st = CH58X_USB_INT_ST(base);
-    uint8_t int_fg = CH58X_USB_INT_FG(base);
     uint8_t dev_addr = CH58X_USB_DEV_AD(base) & CH58X_USB_ADDR_MASK;
 
     // Stop USB transaction immediately (SDK: R8_UH_EP_PID = 0x00)
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 699e3d44d..c75908e87 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -193,9 +193,9 @@
 #define OPT_MCU_CH32F20X         2210 ///< WCH CH32F20x
 #define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20X
 #define OPT_MCU_CH32V103         2230 ///< WCH CH32V103
-#define OPT_MCU_CH58X            2240 ///< WCH CH58x series (CH582/CH583)
-#define OPT_MCU_CH582            OPT_MCU_CH58X  ///< alias
-#define OPT_MCU_CH583            OPT_MCU_CH58X  ///< alias
+#define OPT_MCU_CH58X            2240 ///< WCH CH58x
+#define OPT_MCU_CH582            2240  ///< alias to CH58x series
+#define OPT_MCU_CH583            2240  ///< alias to CH58x series
 
 // NXP LPC MCX
 #define OPT_MCU_MCXN9            2300  ///< NXP MCX N9 Series
-- 
cgit v1.3.1


From 5758fc8199eeb4571130f3b401b5c9f8df46f825 Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Mon, 2 Mar 2026 22:25:26 +0800
Subject: bsp: ch58x: sync cmake options with make and skip unsupported
 examples

---
 examples/device/audio_4_channel_mic_freertos/skip.txt |  1 +
 examples/device/audio_test_freertos/skip.txt          |  1 +
 examples/device/cdc_msc_freertos/skip.txt             |  1 +
 examples/device/hid_composite_freertos/skip.txt       |  1 +
 examples/device/midi_test_freertos/skip.txt           |  1 +
 examples/device/video_capture_2ch/skip.txt            |  1 +
 hw/bsp/ch58x/family.cmake                             | 11 +++++++----
 7 files changed, 13 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index be44cb2c0..1d0a30ee3 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -2,6 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 007fece53..302e4f45a 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -2,6 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index 31d808d8e..28f187ec9 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -2,6 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 8ae238584..3e371f05d 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -2,6 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index 8ae238584..3e371f05d 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -2,6 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/video_capture_2ch/skip.txt b/examples/device/video_capture_2ch/skip.txt
index af3b0de04..191edeb39 100644
--- a/examples/device/video_capture_2ch/skip.txt
+++ b/examples/device/video_capture_2ch/skip.txt
@@ -5,6 +5,7 @@ mcu:GD32VF103
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
+mcu:CH58X
 mcu:STM32L0
 family:espressif
 board:curiosity_nano
diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index 64b534eb1..4f7c35d28 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -45,16 +45,20 @@ function(family_add_board BOARD_TARGET)
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     CFG_TUD_WCH_USBIP_USBFS=1
     FREQ_SYS=60000000
+    DISK_LIB_ENABLE=0
+    INT_SOFT
     )
 
   update_board(${BOARD_TARGET})
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_compile_options(${BOARD_TARGET} PUBLIC
-      -msmall-data-limit=8
+      -flto
+      -msmall-data-limit=16
       -mno-save-restore
       -fmessage-length=0
       -fsigned-char
+      -Wno-error=strict-prototypes
       )
   endif ()
 endfunction()
@@ -82,8 +86,8 @@ function(family_configure_example TARGET RTOS)
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
+      -nostdlib -nostartfiles
+      --specs=nosys.specs
       -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
       -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
       "LINKER:--script=${LD_FILE_GNU}"
@@ -99,5 +103,4 @@ function(family_configure_example TARGET RTOS)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_openocd_wch(${TARGET})
-  family_flash_wlink_rs(${TARGET})
 endfunction()
-- 
cgit v1.3.1


From 6c7d9d0a21a0df5afc38a43ba5b196c81075fda2 Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Mon, 2 Mar 2026 22:55:29 +0800
Subject: bsp: ch58x fix typo FAMILY_MCUS CH582 to CH58X

---
 hw/bsp/ch58x/family.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index 4f7c35d28..3e12efb7a 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -10,7 +10,7 @@ include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
 set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor")
 set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
 
-set(FAMILY_MCUS CH582 CACHE INTERNAL "")
+set(FAMILY_MCUS CH58X CACHE INTERNAL "")
 set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
 
 #------------------------------------
-- 
cgit v1.3.1


From 2159c295e9318f888a0763dd6ad28562c2e0ca5a Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Mon, 2 Mar 2026 23:58:06 +0800
Subject: test: fix ch58x linker errors by adding libc/libgcc and libISP583

---
 hw/bsp/ch58x/family.cmake | 7 +++++--
 hw/bsp/ch58x/family.mk    | 9 +++++----
 2 files changed, 10 insertions(+), 6 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index 3e12efb7a..b4835cb41 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -42,6 +42,9 @@ function(family_add_board BOARD_TARGET)
     ${SDK_SRC_DIR}/StdPeriphDriver/inc
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
     )
+  target_link_libraries(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/libISP583.a
+    )
   target_compile_definitions(${BOARD_TARGET} PUBLIC
     CFG_TUD_WCH_USBIP_USBFS=1
     FREQ_SYS=60000000
@@ -86,8 +89,8 @@ function(family_configure_example TARGET RTOS)
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     target_link_options(${TARGET} PUBLIC
-      -nostdlib -nostartfiles
-      --specs=nosys.specs
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
       -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
       -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
       "LINKER:--script=${LD_FILE_GNU}"
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 7b62af646..71c2cada6 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -24,12 +24,13 @@ CFLAGS += \
 	-DFREQ_SYS=60000000 \
 	-DDISK_LIB_ENABLE=0 \
 	-DINT_SOFT \
-
-CFLAGS += -Wno-error=strict-prototypes
+	-Wno-error=strict-prototypes
 
 LDFLAGS_GCC += \
-	-nostdlib -nostartfiles \
-	--specs=nosys.specs \
+	-nostartfiles \
+	--specs=nosys.specs --specs=nano.specs \
+
+LIBS += $(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/libISP583.a
 
 SRC_C += \
 	src/portable/wch/dcd_ch58x_usbfs.c \
-- 
cgit v1.3.1


From 56f94bbb46bebf88e9be0332ebb9db03b30d1cb1 Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Fri, 13 Mar 2026 22:57:18 +0800
Subject: dcd_ch58x: fix toggle, SETUP race, and bus reset handling

- Switch from AUTO_TOG to manual toggle for all endpoints to fix toggle mismatch after clear-stall causing bus resets

- Fix SETUP race condition: track ep0_completion_pending and setup_pending to avoid arming stale EP0 transfers

- Defer Set Address to ISR after status ZLP is ACK'd

- Improve bus reset: reset all EPs, clear pending state

- Fix EP4 DMA macro to correctly map to EP0 base (0x10)

- Move CH58X_UIS_TOG_OK to common section (used by both DCD/HCD)

- Add #ifndef guards for BOARD_TUD/TUH_RHPORT in board.h

- Track isochronous per direction: isochronous[ep][dir]

- NAK EP0 OUT on completion to prevent premature data acceptance
---
 hw/bsp/ch58x/boards/yd-ch582m/board.h |   4 +
 src/portable/wch/ch58x_usbfs_reg.h    |  18 +---
 src/portable/wch/dcd_ch58x_usbfs.c    | 193 +++++++++++++++++++++-------------
 src/portable/wch/hcd_ch58x_usbfs.c    |   2 +-
 4 files changed, 131 insertions(+), 86 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.h b/hw/bsp/ch58x/boards/yd-ch582m/board.h
index 6e25dbdd3..a14ffd198 100644
--- a/hw/bsp/ch58x/boards/yd-ch582m/board.h
+++ b/hw/bsp/ch58x/boards/yd-ch582m/board.h
@@ -47,8 +47,12 @@ extern "C" {
 
 // Dual-port: USB1 (rhport 0) = Device, USB2 (rhport 1) = Host
 // Swap these two if you want the opposite assignment
+#ifndef BOARD_TUD_RHPORT
 #define BOARD_TUD_RHPORT  0
+#endif
+#ifndef BOARD_TUH_RHPORT
 #define BOARD_TUH_RHPORT  1
+#endif
 
 #ifdef __cplusplus
 }
diff --git a/src/portable/wch/ch58x_usbfs_reg.h b/src/portable/wch/ch58x_usbfs_reg.h
index 868589729..ed9f8d0f7 100644
--- a/src/portable/wch/ch58x_usbfs_reg.h
+++ b/src/portable/wch/ch58x_usbfs_reg.h
@@ -56,20 +56,10 @@
 
 //--------------------------------------------------------------------+
 // Endpoint DMA / T_LEN / CTRL register accessors
-//
-// EP0-EP3 DMA : base + 0x10 + ep*4  (EP4 shares EP0 DMA, no own register)
-// EP5-EP7 DMA : base + 0x54 + (ep-5)*4
-// EP0-EP4 TLEN: base + 0x20 + ep*4
-// EP5-EP7 TLEN: base + 0x64 + (ep-5)*4
-// EP0-EP4 CTRL: base + 0x22 + ep*4
-// EP5-EP7 CTRL: base + 0x66 + (ep-5)*4
-//
-// Using computed addresses avoids per-TU copies of static lookup tables.
-// EP4 DMA is not accessed directly (it shares EP0's DMA register).
 //--------------------------------------------------------------------+
 
-// EP DMA is 16-bit (only low 16 bits of RAM address, high bits implied 0x2000)
-#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ((ep) <= 3 ? (0x10u + (ep)*4u) : (0x54u + ((ep)-5u)*4u))))
+// EP DMA is 16-bit (only low 16 bits of RAM address, high bits implied 0x2000), EP4 shares EP0's DMA register (no independent DMA), so ep==4 maps to base+0x10
+#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ((ep) <= 3 ? (0x10u + (ep)*4u) : ((ep) == 4 ? 0x10u : (0x54u + ((ep)-5u)*4u)))))
 #define CH58X_EP_TLEN(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x20u + (ep)*4u) : (0x64u + ((ep)-5u)*4u))))
 #define CH58X_EP_CTRL(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x22u + (ep)*4u) : (0x66u + ((ep)-5u)*4u))))
 
@@ -121,6 +111,7 @@
 //--------------------------------------------------------------------+
 #define CH58X_INT_ST_ENDP(x)    (((x) >> 0) & 0x0F)
 #define CH58X_INT_ST_TOKEN(x)   (((x) >> 4) & 0x03)
+#define CH58X_UIS_TOG_OK         0x40  // toggle match flag (device and host)
 #define CH58X_UIS_SETUP_ACT     0x80
 
 // Token PID values
@@ -147,7 +138,7 @@
 //  Bit 7: RB_UEP_R_TOG    RX data toggle
 //  Bit 6: RB_UEP_T_TOG    TX data toggle
 //  Bit 5: (reserved)
-//  Bit 4: RB_UEP_AUTO_TOG auto toggle (EP1/2/3 only)
+//  Bit 4: RB_UEP_AUTO_TOG auto toggle (EP1/2/3/5/6/7, not EP0/EP4)
 //  Bit 3: R_RES1           RX response high
 //  Bit 2: R_RES0           RX response low
 //  Bit 1: T_RES1           TX response high
@@ -253,7 +244,6 @@
 // USB_INT_ST host-mode bits
 //--------------------------------------------------------------------+
 #define CH58X_UIS_H_RES_MASK      0x0F
-#define CH58X_UIS_TOG_OK          0x40
 
 //--------------------------------------------------------------------+
 // USB_DEV_AD bits
diff --git a/src/portable/wch/dcd_ch58x_usbfs.c b/src/portable/wch/dcd_ch58x_usbfs.c
index ea4a5ac4a..f994638c8 100644
--- a/src/portable/wch/dcd_ch58x_usbfs.c
+++ b/src/portable/wch/dcd_ch58x_usbfs.c
@@ -95,7 +95,10 @@ struct usb_xfer {
 typedef struct {
   uint32_t usb_base;
   bool ep0_tog;
-  bool isochronous[EP_MAX];
+  volatile uint8_t setup_pending;     // SETUP arrived while EP0 completion pending in queue
+  volatile bool ep0_completion_pending; // EP0 XFER_COMPLETE in event queue, not yet processed
+  uint8_t pending_addr;               // Address to set in ISR after Set Address status ZLP
+  bool isochronous[EP_MAX][2]; // [ep][dir]
   struct usb_xfer xfer[EP_MAX][2];  // [ep][dir]
 
   // EP0 + EP4 shared buffer: EP0 OUT(64) + EP4 OUT(64) + EP4 IN(64)
@@ -117,9 +120,6 @@ static dcd_data_t _dcd_data[2];
 
 //--------------------------------------------------------------------+
 // Buffer address helpers
-// EP0: ep0_buffer[0..63]
-// EP4 OUT: ep0_buffer[64..127]  EP4 IN: ep0_buffer[128..191]
-// Other EPs: epX_buffer[0] = OUT, epX_buffer[1] = IN
 //--------------------------------------------------------------------+
 static uint8_t* ep_out_buffer(dcd_data_t* d, uint8_t ep) {
   switch (ep) {
@@ -149,8 +149,7 @@ static uint8_t* ep_in_buffer(dcd_data_t* d, uint8_t ep) {
   }
 }
 
-// Get DMA base pointer for endpoint (the buffer whose address is set to DMA register)
-// For EP4, DMA is shared with EP0, so we return EP0 buffer
+// DMA base pointer (EP4 shares with EP0)
 static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
   switch (ep) {
     case 0: case 4: return &d->ep0_buffer[0];
@@ -164,12 +163,9 @@ static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
   }
 }
 
-//--------------------------------------------------------------------+
-// AUTO_TOG supported on EP1/2/3/5/6/7 (no EP0 or EP4)
-//--------------------------------------------------------------------+
-static inline bool ep_has_auto_toggle(uint8_t ep) {
-  return (ep >= 1 && ep <= 3) || (ep >= 5 && ep <= 7);
-}
+// AUTO_TOG is not used (EP1-3/5-7 support it). When clear-stall resets T_TOG/
+// R_TOG to DATA0, the hardware internal toggle doesn't sync, causing mismatch
+// and bus resets. Use manual toggle (EP_CTRL ^= TOG) in ISR instead.
 
 //--------------------------------------------------------------------+
 // Private transfer helpers
@@ -203,7 +199,7 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
         if (d->ep0_tog) ctrl |= CH58X_EP_T_TOG;
         EP_CTRL(base, 0) = ctrl;
         d->ep0_tog = !d->ep0_tog;
-      } else if (d->isochronous[ep]) {
+      } else if (d->isochronous[ep][TUSB_DIR_IN]) {
         ep_set_tx_response(base, ep, CH58X_EP_T_RES_TOUT);
       } else {
         ep_set_tx_response(base, ep, CH58X_EP_T_RES_ACK);
@@ -212,6 +208,7 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
       // Transfer complete
       xfer->valid = false;
       ep_set_tx_response(base, ep, CH58X_EP_T_RES_NAK);
+      if (ep == 0) d->ep0_completion_pending = true;
       dcd_event_xfer_complete(rhport, ep | TUSB_DIR_IN_MASK,
                               xfer->processed_len, XFER_RESULT_SUCCESS, in_isr);
     }
@@ -238,11 +235,13 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len, bool in_isr) {
 
     if (xfer->len == 0 || len < xfer->max_size) {
       xfer->valid = false;
+      // NAK to prevent hardware from accepting next OUT before a new xfer is queued
+      ep_set_rx_response(base, ep, CH58X_EP_R_RES_NAK);
+      if (ep == 0) d->ep0_completion_pending = true;
       dcd_event_xfer_complete(rhport, ep, xfer->processed_len,
                               XFER_RESULT_SUCCESS, in_isr);
-    }
-
-    if (ep == 0) {
+    } else if (ep == 0) {
+      // EP0 multi-packet: ensure ACK for next packet
       ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
     }
   }
@@ -262,6 +261,12 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   tu_memclr(d->xfer, sizeof(d->xfer));
   tu_memclr(d->isochronous, sizeof(d->isochronous));
   d->ep0_tog = true;
+  d->setup_pending = 0;
+  d->ep0_completion_pending = false;
+  d->pending_addr = 0;
+
+  // Reset USB control register first (SDK pattern)
+  USB_CTRL(base) = 0x00;
 
   // Init control registers
   USB_CTRL(base) = CH58X_UC_DEV_PU_EN | CH58X_UC_INT_BUSY | CH58X_UC_DMA_EN;
@@ -286,22 +291,22 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
                              CH58X_UEP6_RX_EN | CH58X_UEP6_TX_EN |
                              CH58X_UEP7_RX_EN | CH58X_UEP7_TX_EN;
 
-  // EP1-3: DMA + auto-toggle + NAK both directions
+  // EP1-3: DMA + manual toggle + NAK both directions
   for (uint8_t ep = 1; ep <= 3; ep++) {
     EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
     EP_TLEN(base, ep) = 0;
-    EP_CTRL(base, ep) = CH58X_EP_AUTO_TOG | CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
   }
 
   // EP4: no independent DMA, no auto-toggle
   EP_TLEN(base, 4) = 0;
   EP_CTRL(base, 4) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
 
-  // EP5-7: DMA + auto-toggle
+  // EP5-7: DMA + manual toggle
   for (uint8_t ep = 5; ep <= 7; ep++) {
     EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
     EP_TLEN(base, ep) = 0;
-    EP_CTRL(base, ep) = CH58X_EP_AUTO_TOG | CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
   }
 
   // Set EP0 max size
@@ -322,36 +327,33 @@ void dcd_int_handler(uint8_t rhport) {
     uint8_t ep = CH58X_INT_ST_ENDP(int_st);
     uint8_t token = CH58X_INT_ST_TOKEN(int_st);
 
-    // Check SETUP first via dedicated flag
-    if (int_st & CH58X_UIS_SETUP_ACT) {
-      // SETUP packet received on EP0
-      // After SETUP, both toggle bits must be set to DATA1 (SDK reference)
-      EP_CTRL(base, 0) = CH58X_EP_R_TOG | CH58X_EP_T_TOG |
-                         CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
-      d->ep0_tog = true;
-      dcd_event_setup_received(rhport, ep_out_buffer(d, 0), true);
-    } else {
+    // Process regular token before SETUP to avoid losing it
+    if (token != CH58X_PID_SETUP) {
       switch (token) {
         case CH58X_PID_OUT: {
           uint8_t rx_len = USB_RX_LEN(base);
           if (ep == 0) {
-            // EP0: always process (toggle managed via SETUP reset)
+            // EP0: manual toggle, always process
+            EP_CTRL(base, 0) ^= CH58X_EP_R_TOG;
             update_out(rhport, 0, rx_len, true);
           } else if (int_st & CH58X_UIS_TOG_OK) {
-            // Toggle matched: data is valid
-            if (!ep_has_auto_toggle(ep)) {
-              // EP4: manual toggle
-              EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
-            }
+            // Toggle OK: manual toggle and process
+            EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
             update_out(rhport, ep, rx_len, true);
           }
-          // else: toggle mismatch, discard packet per datasheet
+          // else: toggle mismatch, discard
           break;
         }
 
         case CH58X_PID_IN: {
-          if (!ep_has_auto_toggle(ep) && ep != 0) {
-            // Manual toggle for EP4-7
+          // Apply pending Set Address immediately after status ZLP
+          if (ep == 0 && d->pending_addr) {
+            USB_DEV_AD(base) = (USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
+                               (d->pending_addr & CH58X_USB_ADDR_MASK);
+            d->pending_addr = 0;
+          }
+          if (ep != 0) {
+            // Manual toggle for all non-EP0 endpoints
             EP_CTRL(base, ep) ^= CH58X_EP_T_TOG;
           }
           update_in(rhport, ep, false, true);
@@ -361,24 +363,61 @@ void dcd_int_handler(uint8_t rhport) {
         default:
           break;
       }
+      USB_INT_FG(base) = CH58X_UIF_TRANSFER;
+    }
+
+    // SETUP_ACT is checked separately — it persists even if token field changed
+    if (int_st & CH58X_UIS_SETUP_ACT) {
+      // Reset toggles to DATA1, NAK both directions until stack is ready
+      EP_CTRL(base, 0) = CH58X_EP_R_TOG | CH58X_EP_T_TOG |
+                         CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+      d->ep0_tog = true;
+
+      d->pending_addr = 0;
+
+      // Mark stale EP0 completion so dcd_edpt_xfer can skip it
+      d->setup_pending = d->ep0_completion_pending ? 1 : 0;
+      d->ep0_completion_pending = false;
+      d->xfer[0][TUSB_DIR_OUT].valid = false;
+      d->xfer[0][TUSB_DIR_IN].valid = false;
+
+      dcd_event_setup_received(rhport, ep_out_buffer(d, 0), true);
+      USB_INT_FG(base) = CH58X_UIF_TRANSFER;
     }
+  }
 
-    USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-  } else if (status & CH58X_UIF_BUS_RST) {
-    // Bus reset
+  // Process bus reset: reset all endpoints immediately (matching WCH SDK pattern)
+  if (status & CH58X_UIF_BUS_RST) {
     d->ep0_tog = true;
+    d->setup_pending = 0;
+    d->ep0_completion_pending = false;
+    d->pending_addr = 0;
+
+    // Reset EP0: ACK for RX (ready for SETUP), NAK for TX
+    EP_CTRL(base, 0) = CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
+    EP_TLEN(base, 0) = 0;
     d->xfer[0][TUSB_DIR_OUT].max_size = EP_BUF_SIZE;
     d->xfer[0][TUSB_DIR_IN].max_size = EP_BUF_SIZE;
 
+    // Reset EP1-7: NAK both directions, invalidate pending transfers
+    for (uint8_t ep = 1; ep < EP_MAX; ep++) {
+      d->xfer[ep][TUSB_DIR_IN].valid = false;
+      d->xfer[ep][TUSB_DIR_OUT].valid = false;
+      EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
+      EP_TLEN(base, ep) = 0;
+    }
+
     USB_DEV_AD(base) = 0x00;
-    ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
 
-    tusb_speed_t speed = (USB_MIS_ST(base) & CH58X_UMS_DM_LEVEL) ?
+    tusb_speed_t speed = (USB_CTRL(base) & CH58X_UC_LOW_SPEED) ?
                           TUSB_SPEED_LOW : TUSB_SPEED_FULL;
     dcd_event_bus_reset(rhport, speed, true);
 
     USB_INT_FG(base) = CH58X_UIF_BUS_RST;
-  } else if (status & CH58X_UIF_SUSPEND) {
+  }
+
+  // Process suspend/resume
+  if (status & CH58X_UIF_SUSPEND) {
     dcd_event_bus_signal(rhport,
       (USB_MIS_ST(base) & CH58X_UMS_SUSPEND) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME,
       true);
@@ -401,16 +440,14 @@ void dcd_int_disable(uint8_t rhport) {
 }
 
 void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
-  (void) dev_addr;
-  // Address is set in status stage complete callback
+  // Defer to ISR: apply address right after status ZLP is ACK'd
+  _dcd_data[rhport].pending_addr = dev_addr;
   dcd_edpt_xfer(rhport, 0x80, NULL, 0, false);
 }
 
 void dcd_remote_wakeup(uint8_t rhport) {
-  uint32_t base = get_usb_base(rhport);
-  USB_UDEV_CTRL(base) |= CH58X_UD_GP_BIT;
-  tusb_time_delay_ms_api(1); // 1ms resume signal per USB spec
-  USB_UDEV_CTRL(base) &= ~CH58X_UD_GP_BIT;
+  (void) rhport;
+  // TODO: not supported
 }
 
 void dcd_connect(uint8_t rhport) {
@@ -424,8 +461,6 @@ void dcd_disconnect(uint8_t rhport) {
 }
 
 void dcd_sof_enable(uint8_t rhport, bool en) {
-  // CH58x has no device-mode SOF interrupt.
-  // RB_UIE_HST_SOF (0x08) is host-mode only and has no effect in device mode.
   (void) rhport;
   (void) en;
 }
@@ -437,11 +472,20 @@ void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* req
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
       request->bRequest == TUSB_REQ_SET_ADDRESS) {
-    // Preserve GP_BIT (bit7) when setting device address
+    // Safety net: re-apply address in case ISR path was skipped
     USB_DEV_AD(base) = (USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
                        ((uint8_t)request->wValue & CH58X_USB_ADDR_MASK);
   }
-  ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
+
+  dcd_int_disable(rhport);
+  d->ep0_completion_pending = false;
+  if (d->setup_pending) {
+    // SETUP already arrived — don't override its NAK with ACK
+    d->setup_pending = 0;
+  } else {
+    ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
+  }
+  dcd_int_enable(rhport);
 }
 
 bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
@@ -451,29 +495,26 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
   uint8_t dir = tu_edpt_dir(desc_ep->bEndpointAddress);
   TU_ASSERT(ep < EP_MAX);
 
-  d->isochronous[ep] = (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
+  d->isochronous[ep][dir] = (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
   d->xfer[ep][dir].max_size = tu_edpt_packet_size(desc_ep);
 
   if (ep != 0) {
     dcd_int_disable(rhport);
     uint8_t ctrl = EP_CTRL(base, ep);
     if (dir == TUSB_DIR_OUT) {
-      if (d->isochronous[ep]) {
+      // Clear RX toggle to DATA0 per USB spec
+      ctrl &= ~CH58X_EP_R_TOG;
+      if (d->isochronous[ep][TUSB_DIR_OUT]) {
         ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_TOUT;
       } else {
         // Start with NAK; dcd_edpt_xfer will set ACK when a transfer is submitted
         ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_NAK;
       }
-      // Enable auto toggle for EP1-3
-      if (ep_has_auto_toggle(ep)) {
-        ctrl |= CH58X_EP_AUTO_TOG;
-      }
     } else {
+      // Clear TX toggle to DATA0 per USB spec
+      ctrl &= ~CH58X_EP_T_TOG;
       EP_TLEN(base, ep) = 0;
       ctrl = (ctrl & ~CH58X_EP_T_RES_MASK) | CH58X_EP_T_RES_NAK;
-      if (ep_has_auto_toggle(ep)) {
-        ctrl |= CH58X_EP_AUTO_TOG;
-      }
     }
     EP_CTRL(base, ep) = ctrl;
     dcd_int_enable(rhport);
@@ -488,7 +529,8 @@ void dcd_edpt_close_all(uint8_t rhport) {
   for (uint8_t ep = 1; ep < EP_MAX; ep++) {
     d->xfer[ep][TUSB_DIR_IN].valid = false;
     d->xfer[ep][TUSB_DIR_OUT].valid = false;
-    d->isochronous[ep] = false;
+    d->isochronous[ep][TUSB_DIR_OUT] = false;
+    d->isochronous[ep][TUSB_DIR_IN] = false;
     EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
   }
 }
@@ -515,6 +557,17 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
   struct usb_xfer* xfer = &d->xfer[ep][dir];
 
   dcd_int_disable(rhport);
+
+  // Skip stale EP0 arm if a new SETUP has already arrived
+  if (ep == 0) {
+    d->ep0_completion_pending = false;
+    if (d->setup_pending) {
+      d->setup_pending = 0;
+      dcd_int_enable(rhport);
+      return true;
+    }
+  }
+
   xfer->valid = true;
   xfer->buffer = buffer;
   xfer->len = total_bytes;
@@ -523,13 +576,11 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
   if (dir == TUSB_DIR_IN) {
     update_in(rhport, ep, true, is_isr);
   } else {
-    // For OUT direction, set endpoint to ACK to start receiving data
-    if (ep != 0) {
-      if (d->isochronous[ep]) {
-        ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_TOUT);
-      } else {
-        ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_ACK);
-      }
+
+    if (d->isochronous[ep][TUSB_DIR_OUT]) {
+      ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_TOUT);
+    } else {
+      ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_ACK);
     }
   }
   dcd_int_enable(rhport);
diff --git a/src/portable/wch/hcd_ch58x_usbfs.c b/src/portable/wch/hcd_ch58x_usbfs.c
index 8a8da9f16..2b1bd40bc 100644
--- a/src/portable/wch/hcd_ch58x_usbfs.c
+++ b/src/portable/wch/hcd_ch58x_usbfs.c
@@ -305,7 +305,7 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
 
   // Clear endpoint records
   tu_memclr(_edpt_list, sizeof(_edpt_list));
-  tu_memclr((void*)&_current_xfer, sizeof(_current_xfer));
+  _current_xfer = (const hcd_xfer_t){0};
 
   _hw_init_host(rhport, true);
 
-- 
cgit v1.3.1


From dc87bab45f8123cbfa2b4b0ac6e1831c1172651f Mon Sep 17 00:00:00 2001
From: alt-0191 <2223147307@qq.com>
Date: Fri, 13 Mar 2026 23:58:18 +0800
Subject: ch58x: code cleanup and minor fixes

---
 hw/bsp/ch58x/ch58x_it.h            |   6 +-
 hw/bsp/ch58x/debug_uart.c          |   6 +-
 hw/bsp/ch58x/debug_uart.h          |   8 ++
 hw/bsp/ch58x/system_ch58x.h        |   6 +-
 src/portable/wch/ch58x_usbfs_reg.h |   9 ++
 src/portable/wch/dcd_ch58x_usbfs.c |  30 +++---
 src/portable/wch/hcd_ch58x_usbfs.c | 203 +++++++++++++++++++------------------
 7 files changed, 147 insertions(+), 121 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/ch58x_it.h b/hw/bsp/ch58x/ch58x_it.h
index c98f732e1..18ea52bc9 100644
--- a/hw/bsp/ch58x/ch58x_it.h
+++ b/hw/bsp/ch58x/ch58x_it.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef __CH58X_IT_H
-#define __CH58X_IT_H
+#ifndef CH58X_IT_H_
+#define CH58X_IT_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -43,4 +43,4 @@ void SysTick_Handler(void);
 }
 #endif
 
-#endif /* __CH58X_IT_H */
+#endif /* CH58X_IT_H_ */
diff --git a/hw/bsp/ch58x/debug_uart.c b/hw/bsp/ch58x/debug_uart.c
index e63606f33..7dd133cb2 100644
--- a/hw/bsp/ch58x/debug_uart.c
+++ b/hw/bsp/ch58x/debug_uart.c
@@ -35,11 +35,11 @@
 #define UART_RINGBUFFER_MASK_TX  (UART_RINGBUFFER_SIZE_TX - 1)
 
 static char tx_buf[UART_RINGBUFFER_SIZE_TX];
-static unsigned int tx_produce;
-static volatile unsigned int tx_consume;
+static uint32_t tx_produce;
+static volatile uint32_t tx_consume;
 
 void uart_write(char c) {
-  unsigned int tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
+  uint32_t tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
 
   // If ring buffer is full, wait
   while (tx_produce_next == tx_consume) {}
diff --git a/hw/bsp/ch58x/debug_uart.h b/hw/bsp/ch58x/debug_uart.h
index 458d838d9..44c3e7948 100644
--- a/hw/bsp/ch58x/debug_uart.h
+++ b/hw/bsp/ch58x/debug_uart.h
@@ -29,8 +29,16 @@
 
 #include <stdint.h>
 
+#ifdef __cplusplus
+extern "C" {
+#endif
+
 void uart_write(char c);
 void uart_sync(void);
 void usart_printf_init(uint32_t baudrate);
 
+#ifdef __cplusplus
+}
+#endif
+
 #endif /* DEBUG_UART_H_ */
diff --git a/hw/bsp/ch58x/system_ch58x.h b/hw/bsp/ch58x/system_ch58x.h
index ef32e603f..e96741ee8 100644
--- a/hw/bsp/ch58x/system_ch58x.h
+++ b/hw/bsp/ch58x/system_ch58x.h
@@ -24,8 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#ifndef __SYSTEM_CH58X_H
-#define __SYSTEM_CH58X_H
+#ifndef SYSTEM_CH58X_H_
+#define SYSTEM_CH58X_H_
 
 #ifdef __cplusplus
 extern "C" {
@@ -40,4 +40,4 @@ extern void SystemCoreClockUpdate(void);
 }
 #endif
 
-#endif /* __SYSTEM_CH58X_H */
+#endif /* SYSTEM_CH58X_H_ */
diff --git a/src/portable/wch/ch58x_usbfs_reg.h b/src/portable/wch/ch58x_usbfs_reg.h
index ed9f8d0f7..67b47e0b6 100644
--- a/src/portable/wch/ch58x_usbfs_reg.h
+++ b/src/portable/wch/ch58x_usbfs_reg.h
@@ -279,4 +279,13 @@
 #define CH58X_SLP_CLK_OFF1        (*(volatile uint8_t *)0x4000100D)
 #define CH58X_SLP_CLK_USB         0x10
 
+//--------------------------------------------------------------------+
+// PFIC (Platform-level Fast Interrupt Controller)
+//--------------------------------------------------------------------+
+#define CH58X_PFIC_IENR           ((volatile uint32_t *)0xE000E100)  // interrupt enable
+#define CH58X_PFIC_IRER           ((volatile uint32_t *)0xE000E180)  // interrupt reset (disable)
+
+#define CH58X_USB_IRQn            22
+#define CH58X_USB2_IRQn           23
+
 #endif /* CH58X_USBFS_REG_H */
diff --git a/src/portable/wch/dcd_ch58x_usbfs.c b/src/portable/wch/dcd_ch58x_usbfs.c
index f994638c8..c6f10b801 100644
--- a/src/portable/wch/dcd_ch58x_usbfs.c
+++ b/src/portable/wch/dcd_ch58x_usbfs.c
@@ -84,13 +84,13 @@ static inline void ep_set_both_response(uint32_t base, uint8_t ep, uint8_t tx_re
 //--------------------------------------------------------------------+
 // Private data structures
 //--------------------------------------------------------------------+
-struct usb_xfer {
+typedef struct {
   bool valid;
   uint8_t* buffer;
   size_t len;
   size_t processed_len;
   size_t max_size;
-};
+} xfer_ctl_t;
 
 typedef struct {
   uint32_t usb_base;
@@ -99,7 +99,7 @@ typedef struct {
   volatile bool ep0_completion_pending; // EP0 XFER_COMPLETE in event queue, not yet processed
   uint8_t pending_addr;               // Address to set in ISR after Set Address status ZLP
   bool isochronous[EP_MAX][2]; // [ep][dir]
-  struct usb_xfer xfer[EP_MAX][2];  // [ep][dir]
+  xfer_ctl_t xfer[EP_MAX][2];  // [ep][dir]
 
   // EP0 + EP4 shared buffer: EP0 OUT(64) + EP4 OUT(64) + EP4 IN(64)
   TU_ATTR_ALIGNED(4) uint8_t ep0_buffer[EP_BUF_SIZE + EP_BUF_SIZE + EP_BUF_SIZE];
@@ -173,7 +173,7 @@ static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
 static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
   dcd_data_t* d = &_dcd_data[rhport];
   uint32_t base = d->usb_base;
-  struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_IN];
+  xfer_ctl_t* xfer = &d->xfer[ep][TUSB_DIR_IN];
 
   if (xfer->valid) {
     if (force || xfer->len) {
@@ -218,7 +218,7 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
 static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len, bool in_isr) {
   dcd_data_t* d = &_dcd_data[rhport];
   uint32_t base = d->usb_base;
-  struct usb_xfer* xfer = &d->xfer[ep][TUSB_DIR_OUT];
+  xfer_ctl_t* xfer = &d->xfer[ep][TUSB_DIR_OUT];
 
   if (xfer->valid) {
     size_t len = TU_MIN(xfer->max_size, TU_MIN(xfer->len, rx_len));
@@ -426,16 +426,13 @@ void dcd_int_handler(uint8_t rhport) {
 }
 
 void dcd_int_enable(uint8_t rhport) {
-  // PFIC enable: USB_IRQn=22, USB2_IRQn=23
-  volatile uint32_t* pfic_ienr = (volatile uint32_t*) 0xE000E100;
-  uint8_t irqn = (rhport == 0) ? 22 : 23;
-  pfic_ienr[irqn / 32] = (1u << (irqn % 32));
+  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
+  CH58X_PFIC_IENR[irqn / 32] = (1u << (irqn % 32));
 }
 
 void dcd_int_disable(uint8_t rhport) {
-  volatile uint32_t* pfic_irer = (volatile uint32_t*) 0xE000E180;
-  uint8_t irqn = (rhport == 0) ? 22 : 23;
-  pfic_irer[irqn / 32] = (1u << (irqn % 32));
+  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
+  CH58X_PFIC_IRER[irqn / 32] = (1u << (irqn % 32));
   __asm volatile ("fence.i");
 }
 
@@ -496,7 +493,11 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
   TU_ASSERT(ep < EP_MAX);
 
   d->isochronous[ep][dir] = (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
-  d->xfer[ep][dir].max_size = tu_edpt_packet_size(desc_ep);
+  uint16_t max_size = tu_edpt_packet_size(desc_ep);
+  if (max_size > EP_BUF_SIZE) {
+    max_size = EP_BUF_SIZE;
+  }
+  d->xfer[ep][dir].max_size = max_size;
 
   if (ep != 0) {
     dcd_int_disable(rhport);
@@ -554,7 +555,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
   uint8_t dir = tu_edpt_dir(ep_addr);
 
   dcd_data_t* d = &_dcd_data[rhport];
-  struct usb_xfer* xfer = &d->xfer[ep][dir];
+  xfer_ctl_t* xfer = &d->xfer[ep][dir];
 
   dcd_int_disable(rhport);
 
@@ -576,7 +577,6 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
   if (dir == TUSB_DIR_IN) {
     update_in(rhport, ep, true, is_isr);
   } else {
-
     if (d->isochronous[ep][TUSB_DIR_OUT]) {
       ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_TOUT);
     } else {
diff --git a/src/portable/wch/hcd_ch58x_usbfs.c b/src/portable/wch/hcd_ch58x_usbfs.c
index 2b1bd40bc..37dd08539 100644
--- a/src/portable/wch/hcd_ch58x_usbfs.c
+++ b/src/portable/wch/hcd_ch58x_usbfs.c
@@ -90,7 +90,8 @@ typedef struct {
   bool nak_pending;
 } hcd_xfer_t;
 
-static volatile hcd_xfer_t _current_xfer = {};
+// One transfer state per root port (indexed by rhport).
+static volatile hcd_xfer_t _current_xfer[2] = {};
 
 //--------------------------------------------------------------------+
 // Per-port state
@@ -98,6 +99,7 @@ static volatile hcd_xfer_t _current_xfer = {};
 typedef struct {
   uint32_t usb_base;
   bool int_enabled;
+  bool int_state_before_reset;
 } hcd_port_t;
 
 static hcd_port_t _port_data[2] = {};
@@ -208,7 +210,7 @@ static bool _hw_start_xfer(uint8_t rhport, uint8_t pid, uint8_t ep_addr, uint8_t
   LOG_CH58X_HCD("_hw_start_xfer(pid=0x%02x, ep=0x%02x, tog=%d)\r\n", pid, ep_addr, data_toggle);
 
   // Workaround: small delay for low-speed devices
-  bool is_lowspeed = tuh_speed_get(_current_xfer.dev_addr) == TUSB_SPEED_LOW;
+  bool is_lowspeed = tuh_speed_get(_current_xfer[rhport].dev_addr) == TUSB_SPEED_LOW;
   if (is_lowspeed) {
     _delay_loops(60000000 / 1000000 * 40); // ~40us at 60MHz
   }
@@ -276,20 +278,23 @@ static void _xfer_retry(void* param) {
   LOG_CH58X_HCD("_xfer_retry()\r\n");
   hcd_edpt_t* edpt = (hcd_edpt_t*)param;
 
-  if (_current_xfer.nak_pending) {
-    uint8_t rhport = _current_xfer.rhport;
-    _current_xfer.nak_pending = false;
-    edpt->is_nak_pending = false;
-
-    uint8_t dev_addr = edpt->dev_addr;
-    uint8_t ep_addr = edpt->ep_addr;
-    uint16_t buflen = edpt->buflen;
-    uint8_t* buf = edpt->buf;
-
-    // Check if endpoint is still valid
-    hcd_edpt_t* current = _get_edpt(dev_addr, ep_addr);
-    if (current) {
-      hcd_edpt_xfer(rhport, dev_addr, ep_addr, buf, buflen);
+  // Find which rhport this endpoint belongs to by checking both ports
+  for (uint8_t rp = 0; rp < 2; rp++) {
+    if (_current_xfer[rp].nak_pending) {
+      _current_xfer[rp].nak_pending = false;
+      edpt->is_nak_pending = false;
+
+      uint8_t dev_addr = edpt->dev_addr;
+      uint8_t ep_addr = edpt->ep_addr;
+      uint16_t buflen = edpt->buflen;
+      uint8_t* buf = edpt->buf;
+
+      // Check if endpoint is still valid
+      hcd_edpt_t* current = _get_edpt(dev_addr, ep_addr);
+      if (current) {
+        hcd_edpt_xfer(rp, dev_addr, ep_addr, buf, buflen);
+      }
+      break;
     }
   }
 }
@@ -303,9 +308,13 @@ bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
   _port_data[rhport].usb_base = _get_usb_base(rhport);
   _port_data[rhport].int_enabled = false;
 
-  // Clear endpoint records
-  tu_memclr(_edpt_list, sizeof(_edpt_list));
-  _current_xfer = (const hcd_xfer_t){0};
+  // Clear endpoint records only on first init to avoid wiping state of the other rhport
+  static bool _first_init = true;
+  if (_first_init) {
+    tu_memclr(_edpt_list, sizeof(_edpt_list));
+    _first_init = false;
+  }
+  _current_xfer[rhport] = (const hcd_xfer_t){0};
 
   _hw_init_host(rhport, true);
 
@@ -323,17 +332,14 @@ uint32_t hcd_frame_number(uint8_t rhport) {
 }
 
 void hcd_int_enable(uint8_t rhport) {
-  // PFIC interrupt enable
-  volatile uint32_t* pfic_ienr = (volatile uint32_t*)0xE000E100;
-  uint8_t irqn = (rhport == 0) ? 22 : 23; // USB_IRQn or USB2_IRQn
-  pfic_ienr[irqn / 32] = (1u << (irqn % 32));
+  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
+  CH58X_PFIC_IENR[irqn / 32] = (1u << (irqn % 32));
   _port_data[rhport].int_enabled = true;
 }
 
 void hcd_int_disable(uint8_t rhport) {
-  volatile uint32_t* pfic_irer = (volatile uint32_t*)0xE000E180;
-  uint8_t irqn = (rhport == 0) ? 22 : 23;
-  pfic_irer[irqn / 32] = (1u << (irqn % 32));
+  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
+  CH58X_PFIC_IRER[irqn / 32] = (1u << (irqn % 32));
   __asm volatile("fence.i");
   _port_data[rhport].int_enabled = false;
 }
@@ -347,21 +353,18 @@ bool hcd_port_connect_status(uint8_t rhport) {
 
 tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
   uint32_t base = _port_data[rhport].usb_base;
-  // DM level high = low-speed device, low = full-speed
   if (CH58X_USB_MIS_ST(base) & CH58X_UMS_DM_LEVEL) {
     return TUSB_SPEED_LOW;
   }
   return TUSB_SPEED_FULL;
 }
 
-static bool _int_state_before_reset = false;
-
 void hcd_port_reset(uint8_t rhport) {
   uint32_t base = _port_data[rhport].usb_base;
 
   LOG_CH58X_HCD("hcd_port_reset()\r\n");
 
-  _int_state_before_reset = _port_data[rhport].int_enabled;
+  _port_data[rhport].int_state_before_reset = _port_data[rhport].int_enabled;
   hcd_int_disable(rhport);
 
   _hw_set_device_addr(rhport, 0x00);
@@ -397,7 +400,7 @@ void hcd_port_reset_end(uint8_t rhport) {
   // Suppress stale detect event
   CH58X_USB_INT_FG(base) = CH58X_UIF_DETECT;
 
-  if (_int_state_before_reset) {
+  if (_port_data[rhport].int_state_before_reset) {
     hcd_int_enable(rhport);
   }
 }
@@ -423,9 +426,9 @@ bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const*
 
   // Wait for any pending transfer
   uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer.is_busy) {
+  while (_current_xfer[rhport].is_busy) {
     if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer.is_busy = false;
+      _current_xfer[rhport].is_busy = false;
       break;
     }
   }
@@ -455,27 +458,27 @@ bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr,
 
   // Wait for any pending transfer (with 200ms timeout to avoid deadlock on disconnect)
   uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer.is_busy) {
+  while (_current_xfer[rhport].is_busy) {
     if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer.is_busy = false;
+      _current_xfer[rhport].is_busy = false;
       return false;
     }
   }
-  _current_xfer.is_busy = true;
+  _current_xfer[rhport].is_busy = true;
 
   hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
   TU_ASSERT(edpt != NULL);
 
   _hw_set_addr_speed(rhport, dev_addr);
 
-  _current_xfer.rhport = rhport;
-  _current_xfer.dev_addr = dev_addr;
-  _current_xfer.ep_addr = ep_addr;
-  _current_xfer.buffer = buffer;
-  _current_xfer.bufferlen = buflen;
-  _current_xfer.start_ms = tusb_time_millis_api();
-  _current_xfer.xferred_len = 0;
-  _current_xfer.nak_pending = false;
+  _current_xfer[rhport].rhport = rhport;
+  _current_xfer[rhport].dev_addr = dev_addr;
+  _current_xfer[rhport].ep_addr = ep_addr;
+  _current_xfer[rhport].buffer = buffer;
+  _current_xfer[rhport].bufferlen = buflen;
+  _current_xfer[rhport].start_ms = tusb_time_millis_api();
+  _current_xfer[rhport].xferred_len = 0;
+  _current_xfer[rhport].nak_pending = false;
 
   if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
     // IN transfer: host receives data
@@ -503,13 +506,13 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
 
   // Wait for any pending transfer
   uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer.is_busy) {
+  while (_current_xfer[rhport].is_busy) {
     if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer.is_busy = false;
+      _current_xfer[rhport].is_busy = false;
       return false;
     }
   }
-  _current_xfer.is_busy = true;
+  _current_xfer[rhport].is_busy = true;
 
   _hw_set_addr_speed(rhport, dev_addr);
 
@@ -525,14 +528,14 @@ bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet
   memcpy(_tx_buf[rhport], setup_packet, 8);
   CH58X_UH_TX_LEN(base) = 8;
 
-  _current_xfer.rhport = rhport;
-  _current_xfer.dev_addr = dev_addr;
-  _current_xfer.ep_addr = 0x00;  // SETUP always targets EP0 OUT
-  _current_xfer.start_ms = tusb_time_millis_api();
-  _current_xfer.buffer = _tx_buf[rhport];
-  _current_xfer.bufferlen = 8;
-  _current_xfer.xferred_len = 0;
-  _current_xfer.nak_pending = false;
+  _current_xfer[rhport].rhport = rhport;
+  _current_xfer[rhport].dev_addr = dev_addr;
+  _current_xfer[rhport].ep_addr = 0x00;  // SETUP always targets EP0 OUT
+  _current_xfer[rhport].start_ms = tusb_time_millis_api();
+  _current_xfer[rhport].buffer = _tx_buf[rhport];
+  _current_xfer[rhport].bufferlen = 8;
+  _current_xfer[rhport].xferred_len = 0;
+  _current_xfer[rhport].nak_pending = false;
 
   _hw_start_xfer(rhport, CH58X_USB_PID_SETUP, 0, 0);
 
@@ -569,8 +572,8 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
     } else {
       // Stop any ongoing hardware transfer before reporting removal
       CH58X_UH_EP_PID(base) = 0x00;
-      _current_xfer.is_busy = false;
-      _current_xfer.nak_pending = false;
+      _current_xfer[rhport].is_busy = false;
+      _current_xfer[rhport].nak_pending = false;
       hcd_event_device_remove(rhport, in_isr);
     }
     return;
@@ -603,7 +606,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
     if (edpt == NULL) {
       // Unknown endpoint, discard
       LOG_CH58X_HCD("hcd_int: unknown edpt dev=0x%02x ep=0x%02x\r\n", dev_addr, ep_addr);
-      _current_xfer.is_busy = false;
+      _current_xfer[rhport].is_busy = false;
       CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
       return;
     }
@@ -616,19 +619,19 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
         case CH58X_USB_PID_SETUP:
         case CH58X_USB_PID_OUT: {
           uint8_t tx_len = CH58X_UH_TX_LEN(base);
-          _current_xfer.bufferlen -= tx_len;
-          _current_xfer.xferred_len += tx_len;
+          _current_xfer[rhport].bufferlen -= tx_len;
+          _current_xfer[rhport].xferred_len += tx_len;
 
-          if (_current_xfer.bufferlen == 0) {
-            LOG_CH58X_HCD("OUT/SETUP complete, %d bytes\r\n", _current_xfer.xferred_len);
-            _current_xfer.is_busy = false;
+          if (_current_xfer[rhport].bufferlen == 0) {
+            LOG_CH58X_HCD("OUT/SETUP complete, %d bytes\r\n", _current_xfer[rhport].xferred_len);
+            _current_xfer[rhport].is_busy = false;
             hcd_event_xfer_complete(dev_addr, ep_addr,
-                                    _current_xfer.xferred_len, XFER_RESULT_SUCCESS, in_isr);
+                                    _current_xfer[rhport].xferred_len, XFER_RESULT_SUCCESS, in_isr);
           } else {
             // Multi-packet OUT: send next chunk
-            _current_xfer.buffer += tx_len;
-            uint16_t copylen = TU_MIN(edpt->max_packet_size, _current_xfer.bufferlen);
-            memcpy(_tx_buf[rhport], _current_xfer.buffer, copylen);
+            _current_xfer[rhport].buffer += tx_len;
+            uint16_t copylen = TU_MIN(edpt->max_packet_size, _current_xfer[rhport].bufferlen);
+            memcpy(_tx_buf[rhport], _current_xfer[rhport].buffer, copylen);
             CH58X_UH_TX_LEN(base) = (uint8_t)copylen;
             _hw_start_xfer(rhport, CH58X_USB_PID_OUT, ep_addr, edpt->data_toggle);
           }
@@ -637,18 +640,18 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
 
         case CH58X_USB_PID_IN: {
           uint8_t rx_len = CH58X_USB_RX_LEN(base);
-          _current_xfer.xferred_len += rx_len;
-          uint16_t xferred = _current_xfer.xferred_len;
+          _current_xfer[rhport].xferred_len += rx_len;
+          uint16_t xferred = _current_xfer[rhport].xferred_len;
 
-          if (rx_len > 0 && _current_xfer.buffer != NULL) {
-            memcpy(_current_xfer.buffer, _rx_buf[rhport], rx_len);
-            _current_xfer.buffer += rx_len;
+          if (rx_len > 0 && _current_xfer[rhport].buffer != NULL) {
+            memcpy(_current_xfer[rhport].buffer, _rx_buf[rhport], rx_len);
+            _current_xfer[rhport].buffer += rx_len;
           }
 
-          if ((rx_len < edpt->max_packet_size) || (xferred == _current_xfer.bufferlen)) {
+          if ((rx_len < edpt->max_packet_size) || (xferred == _current_xfer[rhport].bufferlen)) {
             // Short packet or transfer complete
             LOG_CH58X_HCD("IN complete, %d bytes\r\n", xferred);
-            _current_xfer.is_busy = false;
+            _current_xfer[rhport].is_busy = false;
             hcd_event_xfer_complete(dev_addr, ep_addr, xferred,
                                     XFER_RESULT_SUCCESS, in_isr);
           } else {
@@ -660,7 +663,7 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
 
         default: {
           LOG_CH58X_HCD("unexpected PID 0x%02x\r\n", request_pid);
-          _current_xfer.is_busy = false;
+          _current_xfer[rhport].is_busy = false;
           hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
           break;
         }
@@ -670,36 +673,42 @@ void hcd_int_handler(uint8_t rhport, bool in_isr) {
       if (response_pid == CH58X_USB_PID_STALL) {
         LOG_CH58X_HCD("STALL response\r\n");
         edpt->data_toggle = 0;
-        _current_xfer.is_busy = false;
+        _current_xfer[rhport].is_busy = false;
         hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_STALLED, in_isr);
       } else if (response_pid == CH58X_USB_PID_NAK) {
         LOG_CH58X_HCD("NAK response\r\n");
-        // NAK: schedule retry via deferred callback for all endpoint types
-        // This avoids tight polling loops and allows other tasks to run
-        _current_xfer.is_busy = false;
-        _current_xfer.nak_pending = true;
-
-        edpt->is_nak_pending = true;
-        edpt->buflen = _current_xfer.bufferlen;
-        edpt->buf = _current_xfer.buffer;
-
-        hcd_event_t event = {
-          .rhport = rhport,
-          .dev_addr = dev_addr,
-          .event_id = USBH_EVENT_FUNC_CALL,
-          .func_call = {
-            .func = _xfer_retry,
-            .param = edpt
-          }
-        };
-        hcd_event_handler(&event, in_isr);
+        // For interrupt endpoints, treat NAK as a successful 0-byte poll so
+        // that upper layers can reschedule based on the endpoint interval.
+        if (edpt->xfer_type == TUSB_XFER_INTERRUPT) {
+          _current_xfer[rhport].is_busy = false;
+          hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_SUCCESS, in_isr);
+        } else {
+          // For non-interrupt endpoints, schedule retry via deferred callback.
+          _current_xfer[rhport].is_busy = false;
+          _current_xfer[rhport].nak_pending = true;
+
+          edpt->is_nak_pending = true;
+          edpt->buflen = _current_xfer[rhport].bufferlen;
+          edpt->buf = _current_xfer[rhport].buffer;
+
+          hcd_event_t event = {
+            .rhport = rhport,
+            .dev_addr = dev_addr,
+            .event_id = USBH_EVENT_FUNC_CALL,
+            .func_call = {
+              .func = _xfer_retry,
+              .param = edpt
+            }
+          };
+          hcd_event_handler(&event, in_isr);
+        }
       } else if (response_pid == CH58X_USB_PID_DATA0 || response_pid == CH58X_USB_PID_DATA1) {
         LOG_CH58X_HCD("toggle mismatch, DATA0/1 rx_len=%d\r\n", CH58X_USB_RX_LEN(base));
-        _current_xfer.is_busy = false;
+        _current_xfer[rhport].is_busy = false;
         hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
       } else {
         LOG_CH58X_HCD("unexpected response 0x%02x\r\n", response_pid);
-        _current_xfer.is_busy = false;
+        _current_xfer[rhport].is_busy = false;
         hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
       }
     }
-- 
cgit v1.3.1


From aca8c7a97c4fc93e8883cffdd0a7a22d552cbdc5 Mon Sep 17 00:00:00 2001
From: alt-0191 <56725325+alt-0191@users.noreply.github.com>
Date: Wed, 18 Mar 2026 14:26:35 +0800
Subject: Migrate time api

---
 hw/bsp/ch58x/family.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.c b/hw/bsp/ch58x/family.c
index 463ca5637..3b1382e61 100644
--- a/hw/bsp/ch58x/family.c
+++ b/hw/bsp/ch58x/family.c
@@ -70,7 +70,7 @@ __INTERRUPT __HIGH_CODE void SysTick_Handler(void) {
   system_ticks++;
 }
 
-uint32_t board_millis(void) {
+uint32_t tusb_time_millis_api(void) {
   return system_ticks;
 }
 #endif
-- 
cgit v1.3.1


From 99d70e2990a04ca7874fe6dc3ff129cfe67c9cc7 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 20 Mar 2026 18:24:42 +0700
Subject: Add dd command to MSC file explorer for sector read and speed
 reporting, adjust CLI configuration and HIL tests

---
 examples/host/msc_file_explorer/src/msc_app.c      | 75 +++++++++++++++++++++-
 .../ch32v20x/boards/ch32v203g_r0_1v0/board.cmake   |  1 +
 test/hil/hil_test.py                               | 60 ++++++++++++-----
 3 files changed, 117 insertions(+), 19 deletions(-)

(limited to 'hw')

diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index 238af5431..21ff42726 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -46,7 +46,7 @@
 #define CLI_RX_BUFFER_SIZE  16
 #define CLI_CMD_BUFFER_SIZE 64
 #define CLI_HISTORY_SIZE    32
-#define CLI_BINDING_COUNT   8
+#define CLI_BINDING_COUNT   9
 
 static EmbeddedCli *_cli;
 static CLI_UINT     cli_buffer[BYTES_TO_CLI_UINTS(CLI_BUFFER_SIZE)];
@@ -56,7 +56,11 @@ static CFG_TUH_MEM_SECTION FATFS fatfs[CFG_TUH_DEVICE_MAX]; // for simplicity on
 static volatile bool              _disk_busy[CFG_TUH_DEVICE_MAX];
 
 static CFG_TUH_MEM_SECTION FIL     file1, file2;
-static CFG_TUH_MEM_SECTION uint8_t rw_buf[512];
+
+#ifndef CFG_EXAMPLE_MSC_FILE_EXPLORER_RW_BUFSIZE
+#define CFG_EXAMPLE_MSC_FILE_EXPLORER_RW_BUFSIZE 4096
+#endif
+static CFG_TUH_MEM_SECTION uint8_t rw_buf[CFG_EXAMPLE_MSC_FILE_EXPLORER_RW_BUFSIZE];
 
 // define the buffer to be place in USB/DMA memory with correct alignment/cache line size
 CFG_TUH_MEM_SECTION static struct {
@@ -279,6 +283,7 @@ DRESULT disk_ioctl(BYTE  pdrv, /* Physical drive nmuber (0..) */
 void cli_cmd_cat(EmbeddedCli *cli, char *args, void *context);
 void cli_cmd_cd(EmbeddedCli *cli, char *args, void *context);
 void cli_cmd_cp(EmbeddedCli *cli, char *args, void *context);
+void cli_cmd_dd(EmbeddedCli *cli, char *args, void *context);
 void cli_cmd_ls(EmbeddedCli *cli, char *args, void *context);
 void cli_cmd_pwd(EmbeddedCli *cli, char *args, void *context);
 void cli_cmd_mkdir(EmbeddedCli *cli, char *args, void *context);
@@ -316,6 +321,9 @@ bool cli_init(void) {
   embeddedCliAddBinding(_cli, (CliCommandBinding){"cp", "Usage: cp SOURCE DEST\r\n\tCopy SOURCE to DEST.", true, NULL,
                                                   cli_cmd_cp});
 
+  embeddedCliAddBinding(_cli, (CliCommandBinding){"dd", "Usage: dd [COUNT]\r\n\t" "Read COUNT sectors (default 1024) and report speed.", true, NULL,
+                                                  cli_cmd_dd});
+
   embeddedCliAddBinding(_cli, (CliCommandBinding){"ls",
                                                   "Usage: ls [DIR]...\r\n\tList information about the FILEs (the "
                                                   "current directory by default).",
@@ -339,6 +347,69 @@ bool cli_init(void) {
   return true;
 }
 
+void cli_cmd_dd(EmbeddedCli *cli, char *args, void *context) {
+  (void)cli;
+  (void)context;
+
+  uint32_t count = 1024; // default sectors to read
+  if (embeddedCliGetTokenCount(args) >= 1) {
+    count = (uint32_t)atoi(embeddedCliGetToken(args, 1));
+    if (count == 0) {
+      count = 1024;
+    }
+  }
+
+  // find first mounted MSC device
+  uint8_t dev_addr = 0;
+  for (uint8_t i = 1; i <= CFG_TUH_DEVICE_MAX; i++) {
+    if (tuh_msc_mounted(i)) {
+      dev_addr = i;
+      break;
+    }
+  }
+  if (dev_addr == 0) {
+    printf("no MSC device mounted\r\n");
+    return;
+  }
+
+  const uint8_t  lun         = 0;
+  const uint32_t block_size  = tuh_msc_get_block_size(dev_addr, lun);
+  const uint32_t block_count = tuh_msc_get_block_count(dev_addr, lun);
+  if (count > block_count) {
+    count = block_count;
+  }
+
+  const uint16_t sectors_per_xfer = (uint16_t)(sizeof(rw_buf) / block_size);
+  const uint32_t xfer_count = (count + sectors_per_xfer - 1) / sectors_per_xfer;
+
+  printf("dd: reading %" PRIu32 " sectors (%" PRIu32 " bytes), %u sectors/xfer ...\r\n",
+         count, count * block_size, sectors_per_xfer);
+
+  const uint32_t start_ms = tusb_time_millis_api();
+  const uint8_t  pdrv     = dev_addr - 1;
+
+  for (uint32_t i = 0; i < count; i += sectors_per_xfer) {
+    const uint16_t n = (uint16_t)((count - i < sectors_per_xfer) ? (count - i) : sectors_per_xfer);
+    _disk_busy[pdrv] = true;
+    tuh_msc_read10(dev_addr, lun, rw_buf, i, n, disk_io_complete, 0);
+    wait_for_disk_io(pdrv);
+  }
+
+  const uint32_t elapsed_ms = tusb_time_millis_api() - start_ms;
+  const uint32_t total_data = count * block_size;
+  // each SCSI transaction has 31-byte CBW + data + 13-byte CSW
+  const uint32_t total_bus = total_data + xfer_count * (31 + 13);
+
+  if (elapsed_ms > 0) {
+    const uint32_t data_kbs = total_data / elapsed_ms; // KB/s (bytes/ms = KB/s)
+    const uint32_t bus_kbs  = total_bus / elapsed_ms;
+    printf("dd: %" PRIu32 " bytes in %" PRIu32 " ms = %" PRIu32 " KB/s (bus %" PRIu32 " KB/s)\r\n",
+           total_data, elapsed_ms, data_kbs, bus_kbs);
+  } else {
+    printf("dd: %" PRIu32 " bytes in <1 ms\r\n", total_data);
+  }
+}
+
 void cli_cmd_cat(EmbeddedCli *cli, char *args, void *context) {
   (void)cli;
   (void)context;
diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
index ecb8b378f..819a1ba1e 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.cmake
@@ -9,5 +9,6 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     SYSCLK_FREQ_144MHz_HSI=144000000
     CFG_EXAMPLE_MSC_DUAL_READONLY
+    CFG_EXAMPLE_MSC_FILE_EXPLORER_RW_BUFSIZE=1024
     )
 endfunction()
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index b3458e59d..f8b43430d 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -538,28 +538,28 @@ def test_host_cdc_msc_hid(board):
     def rand_ascii(length):
         return "".join(random.choices(string.ascii_letters + string.digits, k=length)).encode("ascii")
 
-    sizes = [8, 32, 64, 128]
-    for size in sizes:
-        test_data = rand_ascii(size)
-        ser.reset_input_buffer()
+    packet_size = 64
 
-        # Write byte-by-byte with delay to avoid UART overrun
-        for b in test_data:
-            ser.write(bytes([b]))
-            ser.flush()
-            time.sleep(0.001)
-
-        # Read echo back with timeout
+    # Echo test: 1KB random data, write random 1-packet_size chunks, only write next once echo matched
+    echo_len = 1024
+    echo_data = rand_ascii(echo_len)
+    ser.reset_input_buffer()
+    offset = 0
+    while offset < echo_len:
+        chunk_size = min(random.randint(1, packet_size), echo_len - offset)
+        ser.write(echo_data[offset:offset + chunk_size])
+        ser.flush()
+        # wait until this chunk is echoed back
         echo = b''
         t = 5.0
-        while t > 0 and len(echo) < size:
-            rd = ser.read(max(1, ser.in_waiting))
+        while t > 0 and len(echo) < chunk_size:
+            rd = ser.read(chunk_size - len(echo))
             if rd:
                 echo += rd
-            time.sleep(0.05)
-            t -= 0.05
-        assert echo == test_data, (f'CDC echo wrong data ({size} bytes):\n'
-                                   f'  expected: {test_data}\n  received: {echo}')
+        expected = echo_data[offset:offset + chunk_size]
+        assert echo == expected, (f'CDC echo mismatch at offset {offset} ({chunk_size} bytes):\n'
+                                  f'  expected: {expected}\n  received: {echo}')
+        offset += chunk_size
 
     ser.close()
 
@@ -620,6 +620,32 @@ def test_host_msc_file_explorer(board):
                                                    f'  received: {resp_text}')
     print('README.TXT matched ', end='')
 
+    # MSC throughput test: send dd command to read sectors
+    time.sleep(0.5)
+    ser.reset_input_buffer()
+    for ch in 'dd 1024\r':
+        ser.write(ch.encode())
+        ser.flush()
+        time.sleep(0.002)
+
+    # Read dd output until prompt
+    resp = b''
+    t = 30.0
+    while t > 0:
+        rd = ser.read(max(1, ser.in_waiting))
+        if rd:
+            resp += rd
+        if b'KB/s' in resp and b'>' in resp:
+            break
+        time.sleep(0.05)
+        t -= 0.05
+
+    resp_text = resp.decode('utf-8', errors='ignore')
+    for line in resp_text.splitlines():
+        if 'KB/s' in line:
+            print(f'{line.strip()} ', end='')
+            break
+
     ser.close()
 
 
-- 
cgit v1.3.1


From aeac28e5171442c6aef5ec44f9043d5e74371e41 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 25 Mar 2026 11:23:50 +0700
Subject: update hcd to handle interrupt per buf

---
 hw/bsp/rp2040/family.c                       |  6 +-
 src/portable/raspberrypi/rp2040/dcd_rp2040.c |  7 +--
 src/portable/raspberrypi/rp2040/hcd_rp2040.c | 89 ++++++++++++++--------------
 src/portable/raspberrypi/rp2040/rp2040_usb.c | 29 +++++----
 test/hil/hil_test.py                         | 57 +++++++++++++++---
 5 files changed, 116 insertions(+), 72 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index adb58449d..c64025036 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -165,7 +165,11 @@ void board_init(void)
 {
 #if (CFG_TUH_ENABLED && CFG_TUH_RPI_PIO_USB) || (CFG_TUD_ENABLED && CFG_TUD_RPI_PIO_USB)
   // Set the system clock to a multiple of 12mhz for bit-banging USB with pico-usb
-  set_sys_clock_khz(120000, true);
+  #if defined(PICO_RP2350) && PICO_RP2350 == 1
+  set_sys_clock_khz(156000, true); // rp2350 default is 150Mhz
+  #else
+  set_sys_clock_khz(120000, true); // rp2040 default is 125Mhz
+  #endif
   // set_sys_clock_khz(180000, true);
   // set_sys_clock_khz(192000, true);
   // set_sys_clock_khz(240000, true);
diff --git a/src/portable/raspberrypi/rp2040/dcd_rp2040.c b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
index ec73cafc1..0665484a0 100644
--- a/src/portable/raspberrypi/rp2040/dcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/dcd_rp2040.c
@@ -69,7 +69,7 @@ TU_ATTR_ALWAYS_INLINE static inline hw_endpoint_t *hw_endpoint_get_by_addr(uint8
   return hw_endpoint_get(num, dir);
 }
 
-TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *get_ep_ctrl(const uint8_t epnum, tusb_dir_t dir) {
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *get_ep_ctrl(uint8_t epnum, tusb_dir_t dir) {
   if (epnum == 0) {
     // EP0 has no endpoint control register because the buffer offsets are fixed and always enabled
     return NULL;
@@ -78,7 +78,7 @@ TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *get_ep_ctrl(const uint8_t epnum, t
   return (dir == TUSB_DIR_IN) ? &ep_ctrl->in : &ep_ctrl->out;
 }
 
-TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *get_buf_ctrl(const uint8_t epnum, tusb_dir_t dir) {
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *get_buf_ctrl(uint8_t epnum, tusb_dir_t dir) {
   struct usb_device_dpram_ep_buf_ctrl *buf_ctrl = &usb_dpram->ep_buf_ctrl[epnum];
   return (dir == TUSB_DIR_IN) ? &buf_ctrl->in : &buf_ctrl->out;
 }
@@ -182,6 +182,7 @@ static void __tusb_irq_path_func(handle_hw_buff_status)(void) {
     // Read which buffer to handle BEFORE clearing buf_status
     uint8_t buf_id = (usb_hw->buf_cpu_should_handle & bit) ? 1 : 0;
     usb_hw_clear->buf_status = bit;
+    buf_status &= ~bit;
 
     // IN transfer for even i, OUT transfer for odd i
     const uint8_t    epnum = i >> 1u;
@@ -205,8 +206,6 @@ static void __tusb_irq_path_func(handle_hw_buff_status)(void) {
       hw_endpoint_reset_transfer(ep);
       dcd_event_xfer_complete(0, ep->ep_addr, xferred_len, XFER_RESULT_SUCCESS, true);
     }
-
-    buf_status &= ~bit;
   }
 }
 
diff --git a/src/portable/raspberrypi/rp2040/hcd_rp2040.c b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
index 9ee15d343..4ebdf8284 100644
--- a/src/portable/raspberrypi/rp2040/hcd_rp2040.c
+++ b/src/portable/raspberrypi/rp2040/hcd_rp2040.c
@@ -94,7 +94,13 @@ static hw_endpoint_t *edpt_find(uint8_t daddr, uint8_t ep_addr) {
   return NULL;
 }
 
-// static hw_endpoint_t* epdt_find_interrupt(uint8_t )
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 *dpram_int_ep_ctrl(uint8_t int_num) {
+  return &usbh_dpram->int_ep_ctrl[int_num-1].ctrl;
+}
+
+TU_ATTR_ALWAYS_INLINE static inline io_rw_32 * dpram_int_ep_buffer_ctrl(uint8_t int_num) {
+  return &usbh_dpram->int_ep_buffer_ctrl[int_num-1].ctrl;
+}
 
 //--------------------------------------------------------------------+
 //
@@ -129,57 +135,53 @@ static void __tusb_irq_path_func(hw_xfer_complete)(hw_endpoint_t *ep, xfer_resul
   }
 }
 
-static void __tusb_irq_path_func(handle_hwbuf_status_bit)(hw_endpoint_t *ep, io_rw_32 *ep_reg, io_rw_32 *buf_reg) {
-  const bool done = hw_endpoint_xfer_continue(ep, ep_reg, buf_reg);
-  if (done) {
-    hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
-  }
-}
-
 static void __tusb_irq_path_func(handle_hwbuf_status)(void) {
-  uint32_t buf_status = usb_hw->buf_status;
   pico_trace("buf_status 0x%08lx\n", buf_status);
+  enum {
+    BUF_STATUS_EPX = 1u
+  };
 
-  // Check EPX first
-  uint32_t bit = 1u;
-  if (buf_status & bit) {
-    buf_status &= ~bit;
-    usb_hw_clear->buf_status = bit;
+  // Check EPX first (bit 0). EPX is currently single-buffered, always use buf_id=0.
+  // Double-buffered: if both buffers completed at once, buf_status re-sets
+  // immediately after clearing (datasheet Table 406). Process the second buffer too.
+  while (usb_hw->buf_status & BUF_STATUS_EPX) {
+    const uint8_t buf_id = (usb_hw->buf_cpu_should_handle & BUF_STATUS_EPX) ? 1 : 0;
+    usb_hw_clear->buf_status = 1u; // clear
 
     io_rw_32 *ep_reg  = &usbh_dpram->epx_ctrl;
     io_rw_32 *buf_reg = &usbh_dpram->epx_buf_ctrl;
-    handle_hwbuf_status_bit(epx, ep_reg, buf_reg);
+    if (hw_endpoint_xfer_continue(epx, ep_reg, buf_reg, buf_id)) {
+      hw_xfer_complete(epx, XFER_RESULT_SUCCESS);
+    }
   }
 
   // Check "interrupt" (asynchronous) endpoints for both IN and OUT
-  // TODO use clz for better efficiency
-  for (uint i = 1; i <= USB_HOST_INTERRUPT_ENDPOINTS && buf_status; i++) {
-    // EPX  IN/OUT is bit 0, 1
+  uint32_t buf_status = usb_hw->buf_status & ~1u;
+  while (buf_status) {
+    // ctz/clz is faster than loop which has only a few bit set in general
+    const uint8_t idx = (uint8_t) __builtin_ctz(buf_status);
+    const uint bit = TU_BIT(idx);
+    usb_hw_clear->buf_status = bit;
+    buf_status &= ~bit;
+
+    // IN transfer for even i, OUT transfer for odd i
+    // EPX  is bit 0. Bit 1 is not used
     // IEP1 IN/OUT is bit 2, 3
-    // IEP2 IN/OUT is bit 4, 5
-    // etc
-    for (uint j = 0; j < 2; j++) {
-      bit = 1 << (i * 2 + j);
-      if (buf_status & bit) {
-        buf_status &= ~bit;
-        usb_hw_clear->buf_status = bit;
-
-        for (uint8_t e = 0; e < USB_MAX_ENDPOINTS; e++) {
-          hw_endpoint_t *ep = &ep_pool[e];
-          if (ep->interrupt_num == i) {
-            io_rw_32 *ep_reg  = &usbh_dpram->int_ep_ctrl[ep->interrupt_num - 1].ctrl;
-            io_rw_32 *buf_reg = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num - 1].ctrl;
-            handle_hwbuf_status_bit(ep, ep_reg, buf_reg);
-            break;
-          }
+    // IEP2 IN/OUT is bit 4, 5 etc
+    const uint8_t    epnum = idx >> 1u;
+    for (size_t e = 0; e < TU_ARRAY_SIZE(ep_pool); e++) {
+      hw_endpoint_t *ep = &ep_pool[e];
+      if (ep->interrupt_num == epnum) {
+        io_rw_32 *ep_reg  = dpram_int_ep_ctrl(ep->interrupt_num);
+        io_rw_32 *buf_reg = dpram_int_ep_buffer_ctrl(ep->interrupt_num);
+        const bool done = hw_endpoint_xfer_continue(ep, ep_reg, buf_reg, 0);
+        if (done) {
+          hw_xfer_complete(ep, XFER_RESULT_SUCCESS);
         }
+        break;
       }
     }
   }
-
-  if (buf_status) {
-    panic("Unhandled buffer %d\n", buf_status);
-  }
 }
 
 // All non-interrupt endpoints use shared EPX.
@@ -491,8 +493,10 @@ void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
         usb_hw_clear->int_ep_ctrl                       = 1u << ep->interrupt_num;
         usb_hw->int_ep_addr_ctrl[ep->interrupt_num - 1] = 0;
 
-        usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num - 1].ctrl = 0;
-        usbh_dpram->int_ep_ctrl[ep->interrupt_num - 1].ctrl        = 0;
+        io_rw_32 *ep_reg  = dpram_int_ep_ctrl(ep->interrupt_num);
+        io_rw_32 *buf_reg = dpram_int_ep_buffer_ctrl(ep->interrupt_num);
+        *buf_reg = 0;
+        *ep_reg = 0;
       }
 
       ep->max_packet_size = 0; // mark as unused
@@ -547,13 +551,12 @@ TU_ATTR_ALWAYS_INLINE static inline void sie_start_xfer(uint32_t value) {
   usb_hw->sie_ctrl = value | USB_SIE_CTRL_START_TRANS_BITS;
 }
 
-// xfer using epx
 static void edpt_xfer(hw_endpoint_t *ep, uint8_t *buffer, tu_fifo_t *ff, uint16_t total_len) {
   if (ep->transfer_type == TUSB_XFER_INTERRUPT) {
     // For interrupt endpoint control and buffer is already configured
     // Note: Interrupt is single buffered only
-    io_rw_32 *ep_reg  = &usbh_dpram->int_ep_ctrl[ep->interrupt_num - 1].ctrl;
-    io_rw_32 *buf_reg = &usbh_dpram->int_ep_buffer_ctrl[ep->interrupt_num - 1].ctrl;
+    io_rw_32 *ep_reg  = dpram_int_ep_ctrl(ep->interrupt_num);
+    io_rw_32 *buf_reg = dpram_int_ep_buffer_ctrl(ep->interrupt_num);
     hw_endpoint_xfer_start(ep, ep_reg, buf_reg, buffer, ff, total_len);
   } else {
     const uint8_t    ep_num = tu_edpt_number(ep->ep_addr);
diff --git a/src/portable/raspberrypi/rp2040/rp2040_usb.c b/src/portable/raspberrypi/rp2040/rp2040_usb.c
index ac1536f5b..1e2c4f211 100644
--- a/src/portable/raspberrypi/rp2040/rp2040_usb.c
+++ b/src/portable/raspberrypi/rp2040/rp2040_usb.c
@@ -124,8 +124,10 @@ void __tusb_irq_path_func(hwbuf_ctrl_update)(io_rw_32 *buf_ctrl_reg, uint32_t an
 
       // Section 4.1.2.7.1 (rp2040) / 12.7.3.7.1 (rp2350) Concurrent access: after write to buffer control,
       // wait for USB controller to see the update before setting AVAILABLE.
-      // Host also needs this for continuation buffers in multi-packet transfers.
-      busy_wait_at_least_cycles(12);
+      // Don't need delay in host mode as host is in charge of when to start the transaction.
+      if (!is_host) {
+        busy_wait_at_least_cycles(12);
+      }
     }
   }
 
@@ -193,13 +195,13 @@ void __tusb_irq_path_func(hw_endpoint_buffer_xact)(struct hw_endpoint *ep, io_rw
     // If both complete simultaneously, buf_status re-sets on next clock (datasheet Table 406).
     uint32_t ep_ctrl = *ep_reg | EP_CTRL_INTERRUPT_PER_BUFFER;
 
-    // Since short packet on buf0 in double-buffered RX: buf1 may already contain data from the
-    // NEXT transfer (host sent it before CPU processed this IRQ). Cannot safely recover. Avoid by not using double
-    // buffering for rx transfer
-    bool force_single = is_rx;
-  #if CFG_TUH_ENABLED
-    force_single |= (is_host && ep->interrupt_num != 0); // host interrupt is single only
-  #endif
+    // For now: skip double buffered for RX e.g OUT endpoint in Device mode, since host could send < 64 bytes and cause
+    // short packet on buffer0
+    // NOTE: this could happen to Host mode IN endpoint Also, Host mode "interrupt" endpoint hardware is only single
+    // buffered,
+    // NOTE2: Currently Host bulk is implemented using "interrupt" endpoint
+    const bool force_single = (!is_host && is_rx) || (is_host && tu_edpt_number(ep->ep_addr) != 0);
+    // bool force_single = is_rx || (is_host && ep->interrupt_num != 0);
 
     if (ep->remaining_len && !force_single) {
       // Use buffer 1 (double buffered) if there is still data
@@ -318,14 +320,11 @@ bool __tusb_irq_path_func(hw_endpoint_xfer_continue)(struct hw_endpoint *ep, io_
   const bool is_rx       = is_host ? (dir == TUSB_DIR_IN) : (dir == TUSB_DIR_OUT);
   const bool is_double   = ep_reg != NULL && ((*ep_reg) & EP_CTRL_DOUBLE_BUFFERED_BITS);
 
-  const uint16_t xferred = hwbuf_sync(ep, buf_reg, is_double ? buf_id : 0, is_rx);
-  bool is_done = (ep->remaining_len == 0);
+  hwbuf_sync(ep, buf_reg, buf_id, is_rx);
+  const bool is_done = (ep->remaining_len == 0);
 
   if (is_double) {
-    if (xferred < ep->max_packet_size) {
-      // Short packet
-      is_done = true;
-    } else if (buf_id == 0) {
+    if (buf_id == 0) {
       // buf0 done: wait for buf1, don't start new buffers
       hw_endpoint_lock_update(ep, -1);
       return false;
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 4b17bed54..8b0070d40 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -155,8 +155,7 @@ def read_disk_file(uid, lun, fname):
 
 def open_mtp_dev(uid):
     mtp = MTP()
-    # MTP seems to take a while to enumerate
-    timeout = 2 * ENUM_TIMEOUT
+    timeout = ENUM_TIMEOUT
     while timeout > 0:
         # unmount gio/gvfs MTP mount which blocks libmtp from accessing the device
         subprocess.run(f"gio mount -u mtp://TinyUsb_TinyUsb_Device_{uid}/",
@@ -607,7 +606,7 @@ def test_host_msc_file_explorer(board):
     lines = data.decode('utf-8', errors='ignore').splitlines()
     check_msc_info(lines, msc_devs)
 
-    # Send "cat README.TXT" and read response
+    # Send "cat README.TXT" and check response (optional — file may not exist on all drives)
     time.sleep(1)
     ser.reset_input_buffer()
     for ch in 'cat README.TXT\r':
@@ -615,24 +614,20 @@ def test_host_msc_file_explorer(board):
         ser.flush()
         time.sleep(0.002)
 
-    # Read response
     resp = b''
     t = 10.0
     while t > 0:
         rd = ser.read(max(1, ser.in_waiting))
         if rd:
             resp += rd
-        # wait for prompt after command output
         if b'>' in resp and resp.rstrip().endswith(b'>'):
             break
         time.sleep(0.05)
         t -= 0.05
 
-    # Verify response contains README content
     resp_text = resp.decode('utf-8', errors='ignore')
-    assert MSC_README_TXT.decode() in resp_text, (f'MSC README.TXT not found in response:\n'
-                                                   f'  received: {resp_text}')
-    print('README.TXT matched ', end='')
+    if MSC_README_TXT.decode() in resp_text:
+        print('README.TXT matched ', end='')
 
     # MSC throughput test: send dd command to read sectors
     time.sleep(0.5)
@@ -740,6 +735,50 @@ def test_device_cdc_msc(board):
     data = read_disk_file(uid, 0, 'README.TXT')
     assert data == MSC_README_TXT, f'MSC wrong data in README.TXT\n expected: {MSC_README_TXT.decode()}\n received: {data.decode()}'
 
+    # MSC dd throughput test: read all sectors then write back same data
+    dev = get_disk_dev(uid, 'TinyUSB', 0)
+    timeout = ENUM_TIMEOUT
+    while timeout > 0:
+        if os.path.exists(dev):
+            break
+        time.sleep(1)
+        timeout -= 1
+    assert timeout > 0, f'Disk {dev} not found for dd test'
+
+    block_count = 16
+    block_size = 512
+    tmp_file = f'/tmp/msc_dd_{uid}.bin'
+
+    # Read: dd from device to file
+    ret = run_cmd(f'dd if={dev} of={tmp_file} bs={block_size} count={block_count} iflag=direct 2>&1')
+    assert ret.returncode == 0, f'dd read failed: {ret.stdout.decode()}'
+    dd_out = ret.stdout.decode()
+    read_speed = ''
+    for line in dd_out.splitlines():
+        m = re.search(r'(\d+[\.\d]*\s+[kMG]?B/s)', line)
+        if m:
+            read_speed = m.group(1)
+            break
+
+    # Write back the same data to avoid corrupting the disk
+    ret = run_cmd(f'dd if={tmp_file} of={dev} bs={block_size} count={block_count} oflag=direct 2>&1')
+    assert ret.returncode == 0, f'dd write failed: {ret.stdout.decode()}'
+    dd_out = ret.stdout.decode()
+    write_speed = ''
+    for line in dd_out.splitlines():
+        m = re.search(r'(\d+[\.\d]*\s+[kMG]?B/s)', line)
+        if m:
+            write_speed = m.group(1)
+            break
+
+    try:
+        os.remove(tmp_file)
+    except OSError:
+        pass
+
+    if read_speed and write_speed:
+        print(f'  dd read: {read_speed}, write: {write_speed}', end='')
+
 
 def test_device_cdc_msc_freertos(board):
     test_device_cdc_msc(board)
-- 
cgit v1.3.1


From dbfaebf6cb9841e42d131cbec65906a6bf8eb886 Mon Sep 17 00:00:00 2001
From: Tobi <info@embedded-ideas.de>
Date: Sun, 29 Mar 2026 12:43:41 +0200
Subject: fix incorrect check for NO_WARN_RWX_SEGMENTS_SUPPORTED. Use "NOT
 DEFINED" instead of "NOT VAR" to properly detect whether the variable is
 unset.

---
 hw/bsp/family_support.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 96d6993e6..2274515e4 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -141,7 +141,7 @@ if (NOT FAMILY STREQUAL rp2040)
   endif()
 endif()
 
-if (NOT NO_WARN_RWX_SEGMENTS_SUPPORTED)
+if (NOT DEFINED NO_WARN_RWX_SEGMENTS_SUPPORTED)
   set(NO_WARN_RWX_SEGMENTS_SUPPORTED 1)
 endif()
 
-- 
cgit v1.3.1


From 9271250aed4e040fbcf536617b3b9472bd70c808 Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Mon, 30 Mar 2026 12:58:21 +0000
Subject: Added weact h743 board support

---
 hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake |  11 ++
 hw/bsp/stm32h7/boards/stm32h743_weact/board.h     | 161 ++++++++++++++++++++++
 hw/bsp/stm32h7/boards/stm32h743_weact/board.mk    |  12 ++
 3 files changed, 184 insertions(+)
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.h
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/board.mk

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake b/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake
new file mode 100644
index 000000000..e08c149d4
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT stm32h743xx)
+set(JLINK_DEVICE stm32h743xi)
+
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/${MCU_VARIANT}_flash.ld)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32H743xx
+    HSE_VALUE=25000000
+    )
+endfunction()
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
new file mode 100644
index 000000000..38b224034
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -0,0 +1,161 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2021, Ha Thach (tinyusb.org)
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: STM32 H743 Eval
+   url: https://www.st.com/en/evaluation-tools/stm32h743i-eval.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// UART
+#define UART_DEV    USART3
+#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
+
+// VBUS Sense detection
+#define OTG_FS_VBUS_SENSE 1
+#define OTG_HS_VBUS_SENSE 0
+
+#define PINID_LED         0
+#define PINID_BUTTON      1
+#define PINID_UART_TX     2
+#define PINID_UART_RX     3
+
+static board_pindef_t board_pindef[] =
+  {{// LED
+    .port = GPIOE,
+    .pin_init =
+      {.Pin = GPIO_PIN_3, .Mode = GPIO_MODE_OUTPUT_PP, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0},
+    .active_state = 1},
+   {// Button
+    .port = GPIOC,
+    .pin_init =
+      {.Pin = GPIO_PIN_13, .Mode = GPIO_MODE_INPUT, .Pull = GPIO_PULLDOWN, .Speed = GPIO_SPEED_HIGH, .Alternate = 0},
+    .active_state = 1},
+   {// UART TX
+    .port         = GPIOB,
+    .pin_init     = {.Pin       = GPIO_PIN_10,
+                     .Mode      = GPIO_MODE_AF_PP,
+                     .Pull      = GPIO_PULLUP,
+                     .Speed     = GPIO_SPEED_HIGH,
+                     .Alternate = GPIO_AF7_USART3},
+    .active_state = 0},
+   {// UART RX
+    .port         = GPIOB,
+    .pin_init     = {.Pin       = GPIO_PIN_11,
+                     .Mode      = GPIO_MODE_AF_PP,
+                     .Pull      = GPIO_PULLUP,
+                     .Speed     = GPIO_SPEED_HIGH,
+                     .Alternate = GPIO_AF7_USART3},
+    .active_state = 0}};
+
+//--------------------------------------------------------------------+
+// RCC Clock
+//--------------------------------------------------------------------+
+static inline void SystemClock_Config(void) {
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Supply configuration update enable
+   */
+  HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
+
+  /** Configure the main internal regulator output voltage
+   */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+
+  while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+   * in the RCC_OscInitTypeDef structure.
+   */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
+  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM       = 1;
+  RCC_OscInitStruct.PLL.PLLN       = 100;
+  RCC_OscInitStruct.PLL.PLLP       = 2;
+  RCC_OscInitStruct.PLL.PLLQ       = 4;
+  RCC_OscInitStruct.PLL.PLLR       = 2;
+  RCC_OscInitStruct.PLL.PLLRGE     = RCC_PLL1VCIRANGE_3;
+  RCC_OscInitStruct.PLL.PLLVCOSEL  = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN   = 0;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+   */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
+                                RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider  = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider  = RCC_HCLK_DIV2;
+  RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
+  RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+    Error_Handler();
+  }
+
+  // Initialize USB clock
+  RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  PeriphClkInitStruct.PeriphClockSelection     = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.PLL3.PLL3M               = 1;
+  PeriphClkInitStruct.PLL3.PLL3N               = 24;
+  PeriphClkInitStruct.PLL3.PLL3P               = 2;
+  PeriphClkInitStruct.PLL3.PLL3Q               = 4;
+  PeriphClkInitStruct.PLL3.PLL3R               = 2;
+  PeriphClkInitStruct.PLL3.PLL3RGE             = RCC_PLL3VCIRANGE_3;
+  PeriphClkInitStruct.PLL3.PLL3FRACN           = 0;
+  PeriphClkInitStruct.UsbClockSelection        = RCC_USBCLKSOURCE_PLL3;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+    Error_Handler();
+  }
+}
+
+static inline void board_init2(void) {
+  // For this board does nothing
+}
+
+void board_vbus_set(uint8_t rhport, bool state) {
+  (void)rhport;
+  (void)state;
+}
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk b/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk
new file mode 100644
index 000000000..1779c760a
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.mk
@@ -0,0 +1,12 @@
+# STM32H743I-WEACT uses OTG_FS
+# FIXME: Reset enumerates, un/replug USB plug does not enumerate
+MCU_VARIANT = stm32h743xx
+CFLAGS += -DSTM32H743xx -DHSE_VALUE=25000000
+
+LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
+
+# For flash-jlink target
+JLINK_DEVICE = stm32h743xi
+
+# flash target using on-board stlink
+flash: flash-jlink
-- 
cgit v1.3.1


From b46cd6c21fcc2d5c24c4aa9075a5f517a2cdc2cd Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Mon, 30 Mar 2026 23:01:26 +0300
Subject: Fixed HSI launch

---
 hw/bsp/stm32h7/boards/stm32h743_weact/README.md |  7 ++
 hw/bsp/stm32h7/boards/stm32h743_weact/board.h   | 92 +++++++++++++++----------
 2 files changed, 62 insertions(+), 37 deletions(-)
 create mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/README.md

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
new file mode 100644
index 000000000..2bf463fef
--- /dev/null
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
@@ -0,0 +1,7 @@
+## How to quick setup
+
+1. python tools/get_deps.py -b stm32h743_weact
+2. cd examples/device/cdc_msc
+3. brew install --cask gcc-arm-embedded
+3. cmake -DBOARD=stm32h743_weact -B build -DCMAKE_BUILD_TYPE=Debug
+4. cmake --build build --parallel
\ No newline at end of file
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
index 38b224034..52ff12593 100644
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -41,7 +41,7 @@ extern "C" {
 #define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
 
 // VBUS Sense detection
-#define OTG_FS_VBUS_SENSE 1
+#define OTG_FS_VBUS_SENSE 0
 #define OTG_HS_VBUS_SENSE 0
 
 #define PINID_LED         0
@@ -85,64 +85,82 @@ static inline void SystemClock_Config(void) {
   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 
   /** Supply configuration update enable
-   */
+  */
   HAL_PWREx_ConfigSupply(PWR_LDO_SUPPLY);
 
   /** Configure the main internal regulator output voltage
-   */
-  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
+  */
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE0);
 
-  while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
+  while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
 
   /** Initializes the RCC Oscillators according to the specified parameters
-   * in the RCC_OscInitTypeDef structure.
-   */
-  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
-  RCC_OscInitStruct.HSEState       = RCC_HSE_BYPASS;
-  RCC_OscInitStruct.PLL.PLLState   = RCC_PLL_ON;
-  RCC_OscInitStruct.PLL.PLLSource  = RCC_PLLSOURCE_HSE;
-  RCC_OscInitStruct.PLL.PLLM       = 1;
-  RCC_OscInitStruct.PLL.PLLN       = 100;
-  RCC_OscInitStruct.PLL.PLLP       = 2;
-  RCC_OscInitStruct.PLL.PLLQ       = 4;
-  RCC_OscInitStruct.PLL.PLLR       = 2;
-  RCC_OscInitStruct.PLL.PLLRGE     = RCC_PLL1VCIRANGE_3;
-  RCC_OscInitStruct.PLL.PLLVCOSEL  = RCC_PLL1VCOWIDE;
-  RCC_OscInitStruct.PLL.PLLFRACN   = 0;
-  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI48|RCC_OSCILLATORTYPE_HSE;
+  RCC_OscInitStruct.HSEState = RCC_HSE_ON;
+  RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
+  RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
+  RCC_OscInitStruct.PLL.PLLM = 5;
+  RCC_OscInitStruct.PLL.PLLN = 192;
+  RCC_OscInitStruct.PLL.PLLP = 2;
+  RCC_OscInitStruct.PLL.PLLQ = 15;
+  RCC_OscInitStruct.PLL.PLLR = 2;
+  RCC_OscInitStruct.PLL.PLLRGE = RCC_PLL1VCIRANGE_2;
+  RCC_OscInitStruct.PLL.PLLVCOSEL = RCC_PLL1VCOWIDE;
+  RCC_OscInitStruct.PLL.PLLFRACN = 0;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
     Error_Handler();
   }
 
   /** Initializes the CPU, AHB and APB buses clocks
-   */
-  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2 |
-                                RCC_CLOCKTYPE_D3PCLK1 | RCC_CLOCKTYPE_D1PCLK1;
-  RCC_ClkInitStruct.SYSCLKSource   = RCC_SYSCLKSOURCE_PLLCLK;
-  RCC_ClkInitStruct.SYSCLKDivider  = RCC_SYSCLK_DIV1;
-  RCC_ClkInitStruct.AHBCLKDivider  = RCC_HCLK_DIV2;
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2
+                              |RCC_CLOCKTYPE_D3PCLK1|RCC_CLOCKTYPE_D1PCLK1;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
+  RCC_ClkInitStruct.SYSCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_HCLK_DIV2;
   RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
   RCC_ClkInitStruct.APB1CLKDivider = RCC_APB1_DIV2;
   RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
   RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
 
-  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
+  {
     Error_Handler();
   }
 
   // Initialize USB clock
+  // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
+  // PeriphClkInitStruct.PeriphClockSelection     = RCC_PERIPHCLK_USB;
+  // PeriphClkInitStruct.PLL3.PLL3M               = 1;
+  // PeriphClkInitStruct.PLL3.PLL3N               = 24;
+  // PeriphClkInitStruct.PLL3.PLL3P               = 2;
+  // PeriphClkInitStruct.PLL3.PLL3Q               = 4;
+  // PeriphClkInitStruct.PLL3.PLL3R               = 2;
+  // PeriphClkInitStruct.PLL3.PLL3RGE             = RCC_PLL3VCIRANGE_3;
+  // PeriphClkInitStruct.PLL3.PLL3FRACN           = 0;
+  // PeriphClkInitStruct.UsbClockSelection        = RCC_USBCLKSOURCE_PLL3;
+  // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+  //   //assert(false);
+  //   Error_Handler();
+  // }
+
+  // Initialize USB clock from internal HSI
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-  PeriphClkInitStruct.PeriphClockSelection     = RCC_PERIPHCLK_USB;
-  PeriphClkInitStruct.PLL3.PLL3M               = 1;
-  PeriphClkInitStruct.PLL3.PLL3N               = 24;
-  PeriphClkInitStruct.PLL3.PLL3P               = 2;
-  PeriphClkInitStruct.PLL3.PLL3Q               = 4;
-  PeriphClkInitStruct.PLL3.PLL3R               = 2;
-  PeriphClkInitStruct.PLL3.PLL3RGE             = RCC_PLL3VCIRANGE_3;
-  PeriphClkInitStruct.PLL3.PLL3FRACN           = 0;
-  PeriphClkInitStruct.UsbClockSelection        = RCC_USBCLKSOURCE_PLL3;
-  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
+  PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
+  PeriphClkInitStruct.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
+  if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
+  {
     Error_Handler();
   }
+
+  /** Enable USB Voltage detector
+  */
+  HAL_PWREx_EnableUSBVoltageDetector();
 }
 
 static inline void board_init2(void) {
-- 
cgit v1.3.1


From 2920f242658d0983ce8a4ea6b7518760ff24bf99 Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Mon, 30 Mar 2026 23:23:59 +0300
Subject: Dead code removal

---
 hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 16 ----------------
 1 file changed, 16 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
index 52ff12593..81cf18755 100644
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -133,22 +133,6 @@ static inline void SystemClock_Config(void) {
     Error_Handler();
   }
 
-  // Initialize USB clock
-  // RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
-  // PeriphClkInitStruct.PeriphClockSelection     = RCC_PERIPHCLK_USB;
-  // PeriphClkInitStruct.PLL3.PLL3M               = 1;
-  // PeriphClkInitStruct.PLL3.PLL3N               = 24;
-  // PeriphClkInitStruct.PLL3.PLL3P               = 2;
-  // PeriphClkInitStruct.PLL3.PLL3Q               = 4;
-  // PeriphClkInitStruct.PLL3.PLL3R               = 2;
-  // PeriphClkInitStruct.PLL3.PLL3RGE             = RCC_PLL3VCIRANGE_3;
-  // PeriphClkInitStruct.PLL3.PLL3FRACN           = 0;
-  // PeriphClkInitStruct.UsbClockSelection        = RCC_USBCLKSOURCE_PLL3;
-  // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) {
-  //   //assert(false);
-  //   Error_Handler();
-  // }
-
   // Initialize USB clock from internal HSI
   RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
   PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USB;
-- 
cgit v1.3.1


From d60816468faea7bf4081c11cabbeb2c71176be73 Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Mon, 30 Mar 2026 23:24:53 +0300
Subject: Metadata update

---
 hw/bsp/stm32h7/boards/stm32h743_weact/board.h | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
index 81cf18755..e17ddb41a 100644
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -25,8 +25,8 @@
  */
 
 /* metadata:
-   name: STM32 H743 Eval
-   url: https://www.st.com/en/evaluation-tools/stm32h743i-eval.html
+   name: STM32 H743 WeAct board
+   url: https://github.com/WeActStudio/MiniSTM32H7xx
 */
 
 #ifndef BOARD_H_
-- 
cgit v1.3.1


From f1b4f682b915ac3af485ece83138038ab33786fd Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Tue, 31 Mar 2026 12:35:18 +0300
Subject: Refreshed presets

---
 hw/bsp/BoardPresets.json | 132 +++++++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 132 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index ea6317771..5c3aaf2b4 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -118,6 +118,10 @@
       "name": "b_u585i_iot2a",
       "inherits": "default"
     },
+    {
+      "name": "ch32f205r-r0",
+      "inherits": "default"
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "inherits": "default"
@@ -254,6 +258,10 @@
       "name": "frdm_rw612",
       "inherits": "default"
     },
+    {
+      "name": "gr_citrus",
+      "inherits": "default"
+    },
     {
       "name": "hpm6750evk2",
       "inherits": "default"
@@ -422,6 +430,10 @@
       "name": "mm32f327x_pitaya_lite",
       "inherits": "default"
     },
+    {
+      "name": "mm900evxb",
+      "inherits": "default"
+    },
     {
       "name": "msp_exp430f5529lp",
       "inherits": "default"
@@ -550,6 +562,10 @@
       "name": "raspberrypi_zero2",
       "inherits": "default"
     },
+    {
+      "name": "rx65n_target",
+      "inherits": "default"
+    },
     {
       "name": "samd11_xplained",
       "inherits": "default"
@@ -718,6 +734,10 @@
       "name": "stm32h723nucleo",
       "inherits": "default"
     },
+    {
+      "name": "stm32h743_weact",
+      "inherits": "default"
+    },
     {
       "name": "stm32h743eval",
       "inherits": "default"
@@ -786,6 +806,10 @@
       "name": "stm32u083cdk",
       "inherits": "default"
     },
+    {
+      "name": "stm32u083nucleo",
+      "inherits": "default"
+    },
     {
       "name": "stm32u545nucleo",
       "inherits": "default"
@@ -1054,6 +1078,11 @@
       "description": "Build preset for the b_u585i_iot2a board",
       "configurePreset": "b_u585i_iot2a"
     },
+    {
+      "name": "ch32f205r-r0",
+      "description": "Build preset for the ch32f205r-r0 board",
+      "configurePreset": "ch32f205r-r0"
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "description": "Build preset for the ch32v103r_r1_1v0 board",
@@ -1269,6 +1298,11 @@
       "description": "Build preset for the frdm_rw612 board",
       "configurePreset": "frdm_rw612"
     },
+    {
+      "name": "gr_citrus",
+      "description": "Build preset for the gr_citrus board",
+      "configurePreset": "gr_citrus"
+    },
     {
       "name": "hpm6750evk2",
       "description": "Build preset for the hpm6750evk2 board",
@@ -1479,6 +1513,11 @@
       "description": "Build preset for the mm32f327x_pitaya_lite board",
       "configurePreset": "mm32f327x_pitaya_lite"
     },
+    {
+      "name": "mm900evxb",
+      "description": "Build preset for the mm900evxb board",
+      "configurePreset": "mm900evxb"
+    },
     {
       "name": "msp_exp430f5529lp",
       "description": "Build preset for the msp_exp430f5529lp board",
@@ -1639,6 +1678,11 @@
       "description": "Build preset for the raspberrypi_zero2 board",
       "configurePreset": "raspberrypi_zero2"
     },
+    {
+      "name": "rx65n_target",
+      "description": "Build preset for the rx65n_target board",
+      "configurePreset": "rx65n_target"
+    },
     {
       "name": "samd11_xplained",
       "description": "Build preset for the samd11_xplained board",
@@ -1849,6 +1893,11 @@
       "description": "Build preset for the stm32h723nucleo board",
       "configurePreset": "stm32h723nucleo"
     },
+    {
+      "name": "stm32h743_weact",
+      "description": "Build preset for the stm32h743_weact board",
+      "configurePreset": "stm32h743_weact"
+    },
     {
       "name": "stm32h743eval",
       "description": "Build preset for the stm32h743eval board",
@@ -1934,6 +1983,11 @@
       "description": "Build preset for the stm32u083cdk board",
       "configurePreset": "stm32u083cdk"
     },
+    {
+      "name": "stm32u083nucleo",
+      "description": "Build preset for the stm32u083nucleo board",
+      "configurePreset": "stm32u083nucleo"
+    },
     {
       "name": "stm32u545nucleo",
       "description": "Build preset for the stm32u545nucleo board",
@@ -2396,6 +2450,19 @@
         }
       ]
     },
+    {
+      "name": "ch32f205r-r0",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ch32f205r-r0"
+        },
+        {
+          "type": "build",
+          "name": "ch32f205r-r0"
+        }
+      ]
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "steps": [
@@ -2955,6 +3022,19 @@
         }
       ]
     },
+    {
+      "name": "gr_citrus",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "gr_citrus"
+        },
+        {
+          "type": "build",
+          "name": "gr_citrus"
+        }
+      ]
+    },
     {
       "name": "hpm6750evk2",
       "steps": [
@@ -3501,6 +3581,19 @@
         }
       ]
     },
+    {
+      "name": "mm900evxb",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "mm900evxb"
+        },
+        {
+          "type": "build",
+          "name": "mm900evxb"
+        }
+      ]
+    },
     {
       "name": "msp_exp430f5529lp",
       "steps": [
@@ -3917,6 +4010,19 @@
         }
       ]
     },
+    {
+      "name": "rx65n_target",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "rx65n_target"
+        },
+        {
+          "type": "build",
+          "name": "rx65n_target"
+        }
+      ]
+    },
     {
       "name": "samd11_xplained",
       "steps": [
@@ -4463,6 +4569,19 @@
         }
       ]
     },
+    {
+      "name": "stm32h743_weact",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32h743_weact"
+        },
+        {
+          "type": "build",
+          "name": "stm32h743_weact"
+        }
+      ]
+    },
     {
       "name": "stm32h743eval",
       "steps": [
@@ -4684,6 +4803,19 @@
         }
       ]
     },
+    {
+      "name": "stm32u083nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32u083nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32u083nucleo"
+        }
+      ]
+    },
     {
       "name": "stm32u545nucleo",
       "steps": [
-- 
cgit v1.3.1


From ec2d1d7cff21a1654cf9f2ebee16536fe75b5835 Mon Sep 17 00:00:00 2001
From: Valentyn Korniienko
 <25596072+ValentiWorkLearning@users.noreply.github.com>
Date: Tue, 31 Mar 2026 12:39:16 +0300
Subject: Removed readme and modified the getting started doc

---
 docs/getting_started.rst                        | 2 ++
 hw/bsp/stm32h7/boards/stm32h743_weact/README.md | 7 -------
 2 files changed, 2 insertions(+), 7 deletions(-)
 delete mode 100644 hw/bsp/stm32h7/boards/stm32h743_weact/README.md

(limited to 'hw')

diff --git a/docs/getting_started.rst b/docs/getting_started.rst
index 8442305d4..7fcc2f5d1 100644
--- a/docs/getting_started.rst
+++ b/docs/getting_started.rst
@@ -38,6 +38,8 @@ Get the Code
 
    * **rp2040**: Requires `pico-sdk <https://github.com/raspberrypi/pico-sdk>`_
    * **Espressif (esp32)**: Requires `esp-idf <https://github.com/espressif/esp-idf>`_. Only a few examples support the ESP-IDF build system. Look for ones with `src/CMakeLists.txt` that contain `idf_component_register()`, such as `cdc_msc_freertos`.
+.. note::
+   For MacOS native build with arm-none-eabi-gcc toolchain it's better to install it via brew install --cask gcc-arm-embedded
 
 Simple Device Example
 ---------------------
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md b/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
deleted file mode 100644
index 2bf463fef..000000000
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/README.md
+++ /dev/null
@@ -1,7 +0,0 @@
-## How to quick setup
-
-1. python tools/get_deps.py -b stm32h743_weact
-2. cd examples/device/cdc_msc
-3. brew install --cask gcc-arm-embedded
-3. cmake -DBOARD=stm32h743_weact -B build -DCMAKE_BUILD_TYPE=Debug
-4. cmake --build build --parallel
\ No newline at end of file
-- 
cgit v1.3.1


From ffa539256638200b2653e4cad0c6fee08b797ab8 Mon Sep 17 00:00:00 2001
From: felhub <felhub@net4us.at>
Date: Thu, 2 Apr 2026 18:58:58 +0200
Subject: fixed uart pin init for teensy

---
 hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c | 8 ++++----
 hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c | 8 ++++----
 2 files changed, 8 insertions(+), 8 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
index 4c16be993..b873e2a8b 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
+++ b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
@@ -102,10 +102,10 @@ BOARD_InitDEBUG_UARTPins:
 void BOARD_InitDEBUG_UARTPins(void) {
   CLOCK_EnableClock(kCLOCK_Iomuxc);
 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
+  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U);
+  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U);
 }
 
 
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
index 4c16be993..b873e2a8b 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
+++ b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
@@ -102,10 +102,10 @@ BOARD_InitDEBUG_UARTPins:
 void BOARD_InitDEBUG_UARTPins(void) {
   CLOCK_EnableClock(kCLOCK_Iomuxc);
 
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0U);
-  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_12_LPUART1_TX, 0x10B0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_13_LPUART1_RX, 0x10B0U);
+  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U);
+  IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U);
 }
 
 
-- 
cgit v1.3.1


From 134e14849b1864ce3454950a50d2c79d93a96cd8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 2 Apr 2026 23:30:06 +0700
Subject: fix hil host cdc echo test with imxrt and other fast mcu

---
 examples/CMakeLists.txt                          |  6 --
 examples/host/cdc_msc_hid/src/cdc_app.c          | 78 +++++++++++++-----------
 examples/host/cdc_msc_hid/src/tusb_config.h      |  5 +-
 examples/host/cdc_msc_hid_freertos/src/cdc_app.c |  4 +-
 examples/host/msc_file_explorer/src/main.c       | 33 ----------
 hw/bsp/board.c                                   | 19 ++++--
 hw/bsp/board_api.h                               |  6 +-
 hw/bsp/espressif/boards/family.c                 |  4 +-
 hw/bsp/imxrt/family.c                            | 13 +++-
 hw/bsp/rp2040/family.c                           |  4 +-
 test/hil/hil_test.py                             |  7 ++-
 11 files changed, 88 insertions(+), 91 deletions(-)

(limited to 'hw')

diff --git a/examples/CMakeLists.txt b/examples/CMakeLists.txt
index b458c9ce3..7669290a8 100644
--- a/examples/CMakeLists.txt
+++ b/examples/CMakeLists.txt
@@ -26,9 +26,3 @@ add_custom_target(tinyusb_metrics
   COMMENT "Generating average code size metrics"
   VERBATIM
   )
-
-#add_custom_command(TARGET tinyusb_metrics POST_BUILD
-#  COMMAND ${Python3_EXECUTABLE} ${CMAKE_CURRENT_SOURCE_DIR}/../tools/metrics.py compare ${TOP}/cmake-build/cmake-build-${BOARD}/metrics.json ${CMAKE_BINARY_DIR}/metrics.json
-#  COMMENT "Generating average code size metrics"
-#  VERBATIM
-#  )
diff --git a/examples/host/cdc_msc_hid/src/cdc_app.c b/examples/host/cdc_msc_hid/src/cdc_app.c
index 4c2c5e807..c897bdd06 100644
--- a/examples/host/cdc_msc_hid/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid/src/cdc_app.c
@@ -28,11 +28,13 @@
 #include "bsp/board_api.h"
 #include "app.h"
 
-static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
+static size_t console_read(uint8_t *buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
-    int ch = board_getchar();
-    if (ch <= 0) { break; }
+    const int ch = board_getchar();
+    if (ch < 0) {
+      break;
+    }
     buf[count] = (uint8_t) ch;
     count++;
   }
@@ -40,46 +42,54 @@ static size_t get_console_inputs(uint8_t* buf, size_t bufsize) {
   return count;
 }
 
-void cdc_app_task(void) {
-  uint8_t buf[64 + 1]; // +1 for extra null character
-  uint32_t const bufsize = sizeof(buf) - 1;
-
-  uint32_t count = get_console_inputs(buf, bufsize);
-  buf[count] = 0;
-
-  // loop over all mounted interfaces
-  for (uint8_t idx = 0; idx < CFG_TUH_CDC; idx++) {
-    if (tuh_cdc_mounted(idx)) {
-      // console --> cdc interfaces
-      if (count > 0) {
-        tuh_cdc_write(idx, buf, count);
-        tuh_cdc_write_flush(idx);
-      }
+static size_t console_write(const uint8_t *buf, size_t bufsize) {
+  size_t count = 0;
+  while (count < bufsize) {
+    if (board_putchar((int)buf[count]) < 0) {
+      break;
     }
+    count++;
   }
+  return count;
 }
 
-//--------------------------------------------------------------------+
-// TinyUSB callbacks
-//--------------------------------------------------------------------+
-
-// Invoked when received new data
-void tuh_cdc_rx_cb(uint8_t idx) {
-  uint8_t buf[64 + 1]; // +1 for extra null character
-  uint32_t const bufsize = sizeof(buf) - 1;
+// forward from console to usbh
+static void console_to_usbh(uint8_t idx) {
+  uint8_t buf[64];
+  size_t  count = console_read(buf, sizeof(buf));
+  if (count > 0) {
+    tuh_cdc_write(idx, buf, count);
+  }
+}
 
-  // forward cdc interfaces -> console
-  const uint32_t count = tuh_cdc_read(idx, buf, bufsize);
-  if (count) {
-    buf[count] = 0;
-    printf("%s", (char*) buf);
+void cdc_app_task(void) {
+  const uint8_t idx = 0;
 
-    #ifndef __ICCARM__     // TODO IAR doesn't support stream control ?
-    fflush(stdout);// flush right away, else nanolib will wait for newline
-    #endif
+  // Bidirectional forwarding: console <-> host cdc interfaces
+  if (!tuh_cdc_mounted(idx)) {
+    return;
   }
+
+  // usbh -> uart
+  uint8_t  buf[64];
+  uint32_t count = tuh_cdc_read(idx, buf, sizeof(buf));
+  uint32_t wr    = 0;
+
+  do {
+    // uart write is slow, while waiting forward uart -> usbh else uart rx can be overflow
+    if (count) {
+      wr += console_write(buf + wr, count);
+    }
+    console_to_usbh(idx);
+  } while (wr < count);
+
+  tuh_cdc_write_flush(idx);
 }
 
+//--------------------------------------------------------------------+
+// TinyUSB callbacks
+//--------------------------------------------------------------------+
+
 // Invoked when a device with CDC interface is mounted
 // idx is index of cdc interface in the internal pool.
 void tuh_cdc_mount_cb(uint8_t idx) {
diff --git a/examples/host/cdc_msc_hid/src/tusb_config.h b/examples/host/cdc_msc_hid/src/tusb_config.h
index 75de3511c..26fcdd1cb 100644
--- a/examples/host/cdc_msc_hid/src/tusb_config.h
+++ b/examples/host/cdc_msc_hid/src/tusb_config.h
@@ -102,8 +102,11 @@
 // Size of buffer to hold descriptors and other data used for enumeration
 #define CFG_TUH_ENUMERATION_BUFSIZE 256
 
+// Increase task event queue to handle rapid bulk transfer completions
+#define CFG_TUH_TASK_QUEUE_SZ       64
+
 #define CFG_TUH_HUB                 1 // number of supported hubs
-#define CFG_TUH_CDC                 2 // number of supported CDC devices. also activates CDC ACM
+#define CFG_TUH_CDC                 1 // number of supported CDC devices. also activates CDC ACM
 #define CFG_TUH_CDC_FTDI            1 // FTDI Serial.  FTDI is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CP210X          1 // CP210x Serial. CP210X is not part of CDC class, only to re-use CDC driver API
 #define CFG_TUH_CDC_CH34X           1 // CH340 or CH341 Serial. CH34X is not part of CDC class, only to re-use CDC driver API
diff --git a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
index 0e0105980..30baacaac 100644
--- a/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
+++ b/examples/host/cdc_msc_hid_freertos/src/cdc_app.c
@@ -53,7 +53,7 @@ void cdc_app_init(void) {
 }
 
 // helper
-static size_t get_console_inputs(uint8_t *buf, size_t bufsize) {
+static size_t console_read(uint8_t *buf, size_t bufsize) {
   size_t count = 0;
   while (count < bufsize) {
     int ch = board_getchar();
@@ -75,7 +75,7 @@ static void cdc_app_task(void* param) {
   uint32_t const bufsize = sizeof(buf) - 1;
 
   while (1) {
-    uint32_t count = get_console_inputs(buf, bufsize);
+    uint32_t count = console_read(buf, bufsize);
     buf[count] = 0;
 
     if (count) {
diff --git a/examples/host/msc_file_explorer/src/main.c b/examples/host/msc_file_explorer/src/main.c
index f6bf9a60a..07515e626 100644
--- a/examples/host/msc_file_explorer/src/main.c
+++ b/examples/host/msc_file_explorer/src/main.c
@@ -23,39 +23,6 @@
  *
  */
 
-/* Example to show how to navigate mass storage device with built-in command line.
- * Type help for list of supported commands and syntax (mostly linux commands)
-
- > help
- * help
-        Print list of commands
- * cat
-        Usage: cat [FILE]...
-        Concatenate FILE(s) to standard output..
- * cd
-        Usage: cd [DIR]...
-        Change the current directory to DIR.
- * cp
-        Usage: cp SOURCE DEST
-        Copy SOURCE to DEST.
- * ls
-        Usage: ls [DIR]...
-        List information about the FILEs (the current directory by default).
- * pwd
-        Usage: pwd
-        Print the name of the current working directory.
- * mkdir
-        Usage: mkdir DIR...
-        Create the DIRECTORY(ies), if they do not already exist..
- * mv
-        Usage: mv SOURCE DEST...
-        Rename SOURCE to DEST.
- * rm
-        Usage: rm [FILE]...
-        Remove (unlink) the FILE(s).
- */
-
-#include <stdlib.h>
 #include <string.h>
 
 #include "bsp/board_api.h"
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 71c209950..1c159189c 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -97,9 +97,17 @@ int sys_read (int fhdl, char *buf, size_t count) {
 #else
 
 // Default logging with on-board UART
+// Retry to ensure printf/log output is not lost when board_uart_write is non-blocking
 int sys_write (int fhdl, const char *buf, size_t count) {
   (void) fhdl;
-  return board_uart_write(buf, (int) count);
+  int written = 0;
+  while ((size_t)written < count) {
+    int wr = board_uart_write(buf + written, (int)(count - (size_t)written));
+    if (wr > 0) {
+      written += wr;
+    }
+  }
+  return written;
 }
 
 int sys_read (int fhdl, char *buf, size_t count) {
@@ -157,10 +165,13 @@ int board_getchar(void) {
   return (sys_read(0, &c, 1) > 0) ? (int) c : (-1);
 }
 
-void board_putchar(int c) {
-  (void) sys_write(0, (const char*)&c, 1);
+int board_putchar(int c) {
+  if (board_uart_write((const char *)&c, 1)) {
+    return c;
+  } else {
+    return -1;
+  }
 }
-
 //--------------------------------------------------------------------
 // FreeRTOS hooks
 //--------------------------------------------------------------------
diff --git a/hw/bsp/board_api.h b/hw/bsp/board_api.h
index 4487871eb..73c06078a 100644
--- a/hw/bsp/board_api.h
+++ b/hw/bsp/board_api.h
@@ -92,10 +92,10 @@ uint32_t board_button_read(void);
 // Get board unique ID for USB serial number. Return number of bytes. Note max_len is typically 16
 size_t board_get_unique_id(uint8_t id[], size_t max_len);
 
-// Get characters from UART. Return number of read bytes
+// Get characters from UART (non-blocking). Return number of read bytes.
 int board_uart_read(uint8_t *buf, int len);
 
-// Send characters to UART. Return number of sent bytes
+// Send characters to UART (non-blocking). Return number of sent bytes
 int board_uart_write(void const *buf, int len);
 
 //--------------------------------------------------------------------+
@@ -153,7 +153,7 @@ static inline void board_delay(uint32_t ms) {
 
 // stdio getchar() is blocking, this is non-blocking version
 int board_getchar(void);
-void board_putchar(int c);
+int board_putchar(int c);
 
 #ifdef __cplusplus
 }
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 04d8a4001..48b1253b6 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -162,8 +162,8 @@ int board_getchar(void) {
   return getchar();
 }
 
-void board_putchar(int c) {
-  putchar(c);
+int board_putchar(int c) {
+  return putchar(c);
 }
 
 void board_init_after_tusb(void) {
diff --git a/hw/bsp/imxrt/family.c b/hw/bsp/imxrt/family.c
index c1ee34b1a..9f3297e9a 100644
--- a/hw/bsp/imxrt/family.c
+++ b/hw/bsp/imxrt/family.c
@@ -229,8 +229,17 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-  LPUART_WriteBlocking(UART_PORT, (uint8_t const *) buf, len);
-  return len;
+  const uint8_t *p     = (const uint8_t *)buf;
+  int            count = 0;
+  while (count < len) {
+    if (LPUART_GetStatusFlags(UART_PORT) & kLPUART_TxDataRegEmptyFlag) {
+      LPUART_WriteByte(UART_PORT, p[count]);
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index c64025036..c952de03b 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -288,8 +288,8 @@ int board_getchar(void) {
   return getchar_timeout_us(0);
 }
 
-void board_putchar(int c) {
-  stdio_putchar(c);
+int board_putchar(int c) {
+  return stdio_putchar(c);
 }
 
 void board_init_after_tusb(void) {
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index cf3cff1a3..40779d1a4 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -564,7 +564,7 @@ def test_host_cdc_msc_hid(board):
         ser.flush()
         # wait until this chunk is echoed back
         echo = b''
-        t_end = time.monotonic() + 5.0
+        t_end = time.monotonic() + 1.0
         while time.monotonic() < t_end and len(echo) < chunk_size:
             rd = ser.read(chunk_size - len(echo))
             if rd:
@@ -1189,7 +1189,7 @@ def test_example(board, f1, example):
         print(f'Flashing {fw_name}.elf')
 
     # flash firmware. It may fail randomly, retry a few times
-    max_rety = 3
+    max_rety = max_retry
     start_s = time.time()
     for i in range(max_rety):
         ret = globals()[f'flash_{board["flasher"]["name"].lower()}'](board, fw_name)
@@ -1269,6 +1269,7 @@ def main():
     global verbose
     global test_only
     global build_dir
+    global max_retry
 
     duration = time.time()
 
@@ -1278,6 +1279,7 @@ def main():
     parser.add_argument('-s', '--skip', action='append', default=[], help='Skip boards from test')
     parser.add_argument('-t', '--test-only', action='append', default=[], help='Tests to run, all if not specified')
     parser.add_argument('-B', '--build', default='cmake-build', help='Build folder name (default: cmake-build)')
+    parser.add_argument('-r', '--retry', type=int, default=3, help='Retry count for failed tests (default: 3)')
     parser.add_argument('-v', '--verbose', action='store_true', help='Verbose output')
     args = parser.parse_args()
 
@@ -1287,6 +1289,7 @@ def main():
     verbose = args.verbose
     test_only = args.test_only
     build_dir = args.build
+    max_retry = args.retry
 
     # if config file is not found, try to find it in the same directory as this script
     if not os.path.exists(config_file):
-- 
cgit v1.3.1


From e82df22375ac22ffddf86234a818bb7f4d66af7c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Apr 2026 12:51:06 +0700
Subject: stm32 add uart hwfifo if supported, otherwise usb tu_fifo_t for
 receive uart in irq

---
 hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk |   1 +
 hw/bsp/stm32c0/family.c                          |  34 +++-
 hw/bsp/stm32f0/family.c                          |  86 +++++++++--
 hw/bsp/stm32f1/family.c                          |  80 ++++++++--
 hw/bsp/stm32f1/family.cmake                      |   1 +
 hw/bsp/stm32f1/family.mk                         |   1 +
 hw/bsp/stm32f2/family.c                          |  79 +++++++++-
 hw/bsp/stm32f3/family.c                          |  80 +++++++++-
 hw/bsp/stm32f4/family.c                          |  64 ++++++--
 hw/bsp/stm32f7/family.c                          | 189 ++++++++++++++---------
 hw/bsp/stm32g0/family.c                          |  33 +++-
 hw/bsp/stm32g4/family.c                          |  33 +++-
 hw/bsp/stm32h5/family.c                          |  39 +++--
 hw/bsp/stm32h7/family.c                          |  17 +-
 hw/bsp/stm32h7rs/family.c                        |  33 +++-
 hw/bsp/stm32l4/family.c                          |  37 ++++-
 hw/bsp/stm32n6/family.c                          |  33 +++-
 hw/bsp/stm32u0/family.c                          |  29 +++-
 hw/bsp/stm32u0/family.mk                         |   3 +-
 hw/bsp/stm32u5/family.c                          |  35 ++++-
 hw/bsp/stm32u5/family.mk                         |   1 +
 hw/bsp/stm32wb/family.c                          |  30 +++-
 hw/bsp/stm32wb/family.mk                         |   1 +
 hw/bsp/stm32wba/family.c                         |  27 +++-
 hw/bsp/stm32wba/family.cmake                     |   1 +
 hw/bsp/stm32wba/family.mk                        |   1 +
 26 files changed, 775 insertions(+), 193 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
index f71f53478..601e8eccd 100644
--- a/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
+++ b/hw/bsp/ch32v20x/boards/ch32v203g_r0_1v0/board.mk
@@ -4,6 +4,7 @@ CFLAGS += \
   -DSYSCLK_FREQ_144MHz_HSI=144000000 \
   -DCH32_FLASH_ENHANCE_READ_MODE=1 \
   -DCFG_EXAMPLE_MSC_DUAL_READONLY \
+  -DCFG_EXAMPLE_MSC_FILE_EXPLORER_RW_BUFSIZE=1024
 
 # 32KB zero-wait, 224KB total flash
 LDFLAGS += \
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index e20c0ee15..d99720a64 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -118,6 +118,7 @@ void board_init(void) {
     .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
   };
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 }
 
@@ -148,19 +149,38 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
-  (void) buf;
-  (void) len;
-  (void) UartHandle;
+  (void) buf; (void) len;
   return 0;
 #endif
 }
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index 5a35a3e50..a6ed8629f 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -30,6 +30,7 @@
 
 #include "stm32f0xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
@@ -42,7 +43,43 @@ void USB_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-UART_HandleTypeDef UartHandle;
+#ifdef UART_DEV
+static UART_HandleTypeDef UartHandle = {
+  .Instance = UART_DEV,
+  .Init = {
+    .BaudRate     = CFG_BOARD_UART_BAUDRATE,
+    .WordLength   = UART_WORDLENGTH_8B,
+    .StopBits     = UART_STOPBITS_1,
+    .Parity       = UART_PARITY_NONE,
+    .HwFlowCtl    = UART_HWCONTROL_NONE,
+    .Mode         = UART_MODE_TX_RX,
+    .OverSampling = UART_OVERSAMPLING_16,
+  }
+};
+
+// RX ring buffer via RXNE interrupt
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// F0 uses new USART IP (ISR/RDR/TDR/ICR) — same as F7
+static void uart_rx_isr(void) {
+  uint32_t isr = UART_DEV->ISR;
+  if (isr & USART_ISR_RXNE) {
+    uint8_t byte = (uint8_t) UART_DEV->RDR;
+    tu_fifo_write(&uart_rx_ff, &byte);
+  }
+  if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
+    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+  }
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+#endif
 
 void board_init(void) {
   board_stm32f0_clock_init();
@@ -54,9 +91,6 @@ void board_init(void) {
   __HAL_RCC_GPIOD_CLK_ENABLE();
   __HAL_RCC_GPIOF_CLK_ENABLE();
 
-  // Enable UART Clock
-  UART_CLK_EN();
-
 #if CFG_TUSB_OS == OPT_OS_NONE
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
@@ -84,6 +118,10 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
+#ifdef UART_DEV
+  // Enable UART Clock
+  UART_CLK_EN();
+
   // Uart
   GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@@ -92,15 +130,13 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance = UART_DEV;
-  UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
-  UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
-  UartHandle.Init.StopBits = UART_STOPBITS_1;
-  UartHandle.Init.Parity = UART_PARITY_NONE;
-  UartHandle.Init.HwFlowCtl = UART_HWCONTROL_NONE;
-  UartHandle.Init.Mode = UART_MODE_TX_RX;
-  UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn : USART2_IRQn;
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
+#endif
 
   // USB Pins
   // Configure USB DM and DP pins. This is optional, and maintained only for user guidance.
@@ -141,15 +177,31 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
-  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
-  buf, len, 0xffff);
-  return len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 78a425453..fa2d3b268 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -30,6 +30,7 @@
 
 #include "stm32f1xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
@@ -50,7 +51,42 @@ void USBWakeUp_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-UART_HandleTypeDef UartHandle;
+#ifdef UART_DEV
+static UART_HandleTypeDef UartHandle = {
+    .Instance        = UART_DEV,
+    .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
+    .Init.WordLength = UART_WORDLENGTH_8B,
+    .Init.StopBits   = UART_STOPBITS_1,
+    .Init.Parity     = UART_PARITY_NONE,
+    .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
+    .Init.Mode       = UART_MODE_TX_RX,
+    .Init.OverSampling = UART_OVERSAMPLING_16
+};
+
+// RX ring buffer via RXNE interrupt
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// F1 uses old USART IP (SR/DR)
+static void uart_rx_isr(void) {
+  uint32_t sr = UART_DEV->SR;
+  if (sr & USART_SR_RXNE) {
+    uint8_t byte = (uint8_t) UART_DEV->DR;
+    tu_fifo_write(&uart_rx_ff, &byte);
+  }
+  // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART3_IRQHandler(void) {
+  uart_rx_isr();
+}
+#endif
 
 void board_init(void) {
   board_stm32f1_clock_init();
@@ -112,17 +148,14 @@ void board_init(void) {
   //GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle = (UART_HandleTypeDef) {
-      .Instance        = UART_DEV,
-      .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
-      .Init.WordLength = UART_WORDLENGTH_8B,
-      .Init.StopBits   = UART_STOPBITS_1,
-      .Init.Parity     = UART_PARITY_NONE,
-      .Init.HwFlowCtl  = UART_HWCONTROL_NONE,
-      .Init.Mode       = UART_MODE_TX_RX,
-      .Init.OverSampling = UART_OVERSAMPLING_16
-  };
   HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
+                            : (UART_DEV == USART2) ? USART2_IRQn
+                                                   : USART3_IRQn;
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
 #endif
 
 #ifdef USB_CONNECT_PIN
@@ -184,14 +217,31 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
-  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
-  return len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UartHandle.Instance->SR & USART_SR_TXE) {
+      UartHandle.Instance->DR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32f1/family.cmake b/hw/bsp/stm32f1/family.cmake
index 9e94d86c6..2ee7ea06a 100644
--- a/hw/bsp/stm32f1/family.cmake
+++ b/hw/bsp/stm32f1/family.cmake
@@ -39,6 +39,7 @@ function(family_add_board BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_dma.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
     )
   target_include_directories(${BOARD_TARGET} PUBLIC
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index d4b6dfa6c..ca022c7ec 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -34,6 +34,7 @@ SRC_C += \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc.c \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_rcc_ex.c \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_gpio.c \
+  ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_dma.c \
   ${ST_HAL_DRIVER}/Src/stm32${ST_FAMILY}xx_hal_uart.c
 
 INC += \
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index f1fd4ddb2..3106fc9e3 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -30,7 +30,9 @@
 
 #include "stm32f2xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 #include "board.h"
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -38,6 +40,48 @@ void OTG_FS_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
 
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+#ifdef UART_DEV
+static UART_HandleTypeDef UartHandle = {
+  .Instance = UART_DEV,
+  .Init = {
+    .BaudRate     = CFG_BOARD_UART_BAUDRATE,
+    .WordLength   = UART_WORDLENGTH_8B,
+    .StopBits     = UART_STOPBITS_1,
+    .Parity       = UART_PARITY_NONE,
+    .HwFlowCtl    = UART_HWCONTROL_NONE,
+    .Mode         = UART_MODE_TX_RX,
+    .OverSampling = UART_OVERSAMPLING_16,
+  }
+};
+
+// RX ring buffer via RXNE interrupt
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// F2 uses old USART IP (SR/DR)
+static void uart_rx_isr(void) {
+  uint32_t sr = UART_DEV->SR;
+  if (sr & USART_SR_RXNE) {
+    uint8_t byte = (uint8_t) UART_DEV->DR;
+    tu_fifo_write(&uart_rx_ff, &byte);
+  }
+  // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART3_IRQHandler(void) {
+  uart_rx_isr();
+}
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -110,6 +154,17 @@ void board_init(void) {
   cfg.vbus_sensing = true;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
+
+#ifdef UART_DEV
+  HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
+                            : (UART_DEV == USART2) ? USART2_IRQn
+                                                   : USART3_IRQn;
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
+#endif
 }
 
 //--------------------------------------------------------------------+
@@ -126,15 +181,31 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UartHandle.Instance->SR & USART_SR_TXE) {
+      UartHandle.Instance->DR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index fde1e9f6d..8cee5f8c0 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -30,6 +30,7 @@
 
 #include "stm32f3xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 #include "board.h"
 
 //--------------------------------------------------------------------+
@@ -60,6 +61,50 @@ void USBWakeUp_RMP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+#ifdef UART_DEV
+static UART_HandleTypeDef UartHandle = {
+  .Instance = UART_DEV,
+  .Init = {
+    .BaudRate     = CFG_BOARD_UART_BAUDRATE,
+    .WordLength   = UART_WORDLENGTH_8B,
+    .StopBits     = UART_STOPBITS_1,
+    .Parity       = UART_PARITY_NONE,
+    .HwFlowCtl    = UART_HWCONTROL_NONE,
+    .Mode         = UART_MODE_TX_RX,
+    .OverSampling = UART_OVERSAMPLING_16,
+  }
+};
+
+// RX ring buffer via RXNE interrupt
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// F3 uses new USART IP (ISR/RDR/TDR/ICR) — same as F7
+static void uart_rx_isr(void) {
+  uint32_t isr = UART_DEV->ISR;
+  if (isr & USART_ISR_RXNE) {
+    uint8_t byte = (uint8_t) UART_DEV->RDR;
+    tu_fifo_write(&uart_rx_ff, &byte);
+  }
+  if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
+    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+  }
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART3_IRQHandler(void) {
+  uart_rx_isr();
+}
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
@@ -108,6 +153,17 @@ void board_init(void) {
 
   // Enable USB clock
   __HAL_RCC_USB_CLK_ENABLE();
+
+#ifdef UART_DEV
+  HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
+                            : (UART_DEV == USART2) ? USART2_IRQn
+                                                   : USART3_IRQn;
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
+#endif
 }
 
 //--------------------------------------------------------------------+
@@ -137,15 +193,31 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 665ea114a..b8784d03c 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -30,6 +30,7 @@
 
 #include "stm32f4xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 
 typedef struct {
   GPIO_TypeDef* port;
@@ -57,15 +58,39 @@ void OTG_HS_IRQHandler(void) {
 static UART_HandleTypeDef UartHandle = {
     .Instance = UART_DEV,
     .Init = {
-      .BaudRate   = CFG_BOARD_UART_BAUDRATE,
-      .WordLength = UART_WORDLENGTH_8B,
-      .StopBits   = UART_STOPBITS_1,
-      .Parity     = UART_PARITY_NONE,
-      .HwFlowCtl  = UART_HWCONTROL_NONE,
-      .Mode       = UART_MODE_TX_RX,
+      .BaudRate     = CFG_BOARD_UART_BAUDRATE,
+      .WordLength   = UART_WORDLENGTH_8B,
+      .StopBits     = UART_STOPBITS_1,
+      .Parity       = UART_PARITY_NONE,
+      .HwFlowCtl    = UART_HWCONTROL_NONE,
+      .Mode         = UART_MODE_TX_RX,
       .OverSampling = UART_OVERSAMPLING_16
     }
 };
+
+// RX ring buffer via RXNE interrupt
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// F4 uses old USART IP (SR/DR)
+static void uart_rx_isr(void) {
+  uint32_t sr = UART_DEV->SR;
+  if (sr & USART_SR_RXNE) {
+    uint8_t byte = (uint8_t) UART_DEV->DR;
+    tu_fifo_write(&uart_rx_ff, &byte);
+  }
+  // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART3_IRQHandler(void) {
+  uart_rx_isr();
+}
 #endif
 
 void board_init(void) {
@@ -113,6 +138,13 @@ void board_init(void) {
 
 #ifdef UART_DEV
   HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
+                            : (UART_DEV == USART2) ? USART2_IRQn
+                                                   : USART3_IRQn;
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
 #endif
 
   //------------- USB FS -------------//
@@ -228,15 +260,27 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UartHandle.Instance->SR & USART_SR_TXE) {
+      UartHandle.Instance->DR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index f8145cd63..e29d3d5cd 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -32,11 +32,12 @@
 
 #include "stm32f7xx_hal.h"
 #include "bsp/board_api.h"
+#include "common/tusb_fifo.h"
 
 typedef struct {
-  GPIO_TypeDef* port;
+  GPIO_TypeDef    *port;
   GPIO_InitTypeDef pin_init;
-  uint8_t active_state;
+  uint8_t          active_state;
 } board_pindef_t;
 
 #include "board.h"
@@ -46,18 +47,47 @@ typedef struct {
 //--------------------------------------------------------------------+
 
 #ifdef UART_DEV
-static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
-  .Init = {
-    .BaudRate = CFG_BOARD_UART_BAUDRATE,
-    .WordLength = UART_WORDLENGTH_8B,
-    .StopBits = UART_STOPBITS_1,
-    .Parity = UART_PARITY_NONE,
-    .HwFlowCtl = UART_HWCONTROL_NONE,
-    .Mode = UART_MODE_TX_RX,
-    .OverSampling = UART_OVERSAMPLING_16,
+static UART_HandleTypeDef UartHandle = {.Instance = UART_DEV,
+                                        .Init     = {
+                                              .BaudRate     = CFG_BOARD_UART_BAUDRATE,
+                                              .WordLength   = UART_WORDLENGTH_8B,
+                                              .StopBits     = UART_STOPBITS_1,
+                                              .Parity       = UART_PARITY_NONE,
+                                              .HwFlowCtl    = UART_HWCONTROL_NONE,
+                                              .Mode         = UART_MODE_TX_RX,
+                                              .OverSampling = UART_OVERSAMPLING_16,
+                                        }};
+
+// RX ring buffer via RXNE interrupt — no HAL IT functions used (avoid HAL state conflicts)
+static uint8_t   uart_rx_ff_buf[32];
+static tu_fifo_t uart_rx_ff;
+
+// Minimal UART RX ISR: direct register access, no HAL overhead
+static void uart_rx_isr(void) {
+  uint32_t isr = UART_DEV->ISR;
+  // Read data if available
+  if (isr & USART_ISR_RXNE) {
+    uint8_t byte = (uint8_t)UART_DEV->RDR;
+    tu_fifo_write(&uart_rx_ff, &byte);
   }
-};
+  // Clear error flags (OR, FE, NE, PE) via ICR
+  if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
+    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+  }
+}
+
+void USART1_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART2_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART3_IRQHandler(void) {
+  uart_rx_isr();
+}
+void USART6_IRQHandler(void) {
+  uart_rx_isr();
+}
 #endif
 
 //--------------------------------------------------------------------+
@@ -90,8 +120,8 @@ void board_init(void) {
   __HAL_RCC_GPIOC_CLK_ENABLE();
   __HAL_RCC_GPIOD_CLK_ENABLE();
   __HAL_RCC_GPIOG_CLK_ENABLE();
-  __HAL_RCC_GPIOH_CLK_ENABLE();  // ULPI NXT
-  __HAL_RCC_GPIOI_CLK_ENABLE();  // ULPI NXT
+  __HAL_RCC_GPIOH_CLK_ENABLE(); // ULPI NXT
+  __HAL_RCC_GPIOI_CLK_ENABLE(); // ULPI NXT
 #ifdef __HAL_RCC_GPIOJ_CLK_ENABLE
   __HAL_RCC_GPIOJ_CLK_ENABLE();
 #endif
@@ -109,48 +139,58 @@ void board_init(void) {
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
-  NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY );
+  NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
 #ifdef UART_DEV
   HAL_UART_Init(&UartHandle);
+  tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
+  // Enable RXNE interrupt via direct register (not HAL_UART_Receive_IT)
+  UART_DEV->CR1 |= USART_CR1_RXNEIE;
+  const IRQn_Type uart_irqn = (UART_DEV == USART1)   ? USART1_IRQn
+                              : (UART_DEV == USART2) ? USART2_IRQn
+                              : (UART_DEV == USART3) ? USART3_IRQn
+                                                     : USART6_IRQn;
+  // Lowest priority: UART RX ISR only writes to tu_fifo, no FreeRTOS API calls
+  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(uart_irqn);
 #endif
 
   GPIO_InitTypeDef GPIO_InitStruct;
 
   //------------- rhport0: OTG_FS -------------//
   /* Configure DM DP Pins */
-  GPIO_InitStruct.Pin = (GPIO_PIN_11 | GPIO_PIN_12);
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_HIGH;
+  GPIO_InitStruct.Pin       = (GPIO_PIN_11 | GPIO_PIN_12);
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_HIGH;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   /* Configure OTG-FS ID pin */
-  GPIO_InitStruct.Pin = GPIO_PIN_10;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
-  GPIO_InitStruct.Pull = GPIO_PULLUP;
+  GPIO_InitStruct.Pin       = GPIO_PIN_10;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_OD;
+  GPIO_InitStruct.Pull      = GPIO_PULLUP;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
 // Suppress warning caused by mcu driver
 #ifdef __GNUC__
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wshadow"
+  #pragma GCC diagnostic push
+  #pragma GCC diagnostic ignored "-Wshadow"
 #endif
 
   /* Enable USB FS Clocks */
   __HAL_RCC_USB_OTG_FS_CLK_ENABLE();
 
 #ifdef __GNUC__
-#pragma GCC diagnostic pop
+  #pragma GCC diagnostic pop
 #endif
 
 #if OTG_FS_VBUS_SENSE
   /* Configure VBUS Pin */
-  GPIO_InitStruct.Pin = GPIO_PIN_9;
+  GPIO_InitStruct.Pin  = GPIO_PIN_9;
   GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
@@ -158,7 +198,7 @@ void board_init(void) {
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0
   tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
-  cfg.vbus_sensing = OTG_FS_VBUS_SENSE;
+  cfg.vbus_sensing         = OTG_FS_VBUS_SENSE;
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -188,46 +228,46 @@ void board_init(void) {
   // MCU with external ULPI PHY
 
   /* ULPI CLK */
-  GPIO_InitStruct.Pin = GPIO_PIN_5;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin       = GPIO_PIN_5;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   /* ULPI D0 */
-  GPIO_InitStruct.Pin = GPIO_PIN_3;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
-  GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+  GPIO_InitStruct.Pin       = GPIO_PIN_3;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
+  GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
 
   /* ULPI D1 D2 D3 D4 D5 D6 D7 */
-  GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_5;
+  GPIO_InitStruct.Pin  = GPIO_PIN_0 | GPIO_PIN_1 | GPIO_PIN_10 | GPIO_PIN_11 | GPIO_PIN_12 | GPIO_PIN_13 | GPIO_PIN_5;
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
   GPIO_InitStruct.Pull = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
 
   /* ULPI STP */
-  GPIO_InitStruct.Pin = GPIO_PIN_0 | GPIO_PIN_2;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Pin       = GPIO_PIN_0 | GPIO_PIN_2;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
 
   /* NXT */
-  GPIO_InitStruct.Pin = GPIO_PIN_4;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Pin       = GPIO_PIN_4;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOH, &GPIO_InitStruct);
 
   /* ULPI DIR */
-  GPIO_InitStruct.Pin = GPIO_PIN_11;
-  GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
-  GPIO_InitStruct.Pull = GPIO_NOPULL;
+  GPIO_InitStruct.Pin       = GPIO_PIN_11;
+  GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
+  GPIO_InitStruct.Pull      = GPIO_NOPULL;
   GPIO_InitStruct.Alternate = GPIO_AF10_OTG_HS;
   HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
 #endif // USB_HS_PHYC
@@ -238,7 +278,7 @@ void board_init(void) {
 
 #if CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 1
   tud_configure_dwc2_t cfg = CFG_TUD_CONFIGURE_DWC2_DEFAULT;
-  cfg.vbus_sensing = OTG_HS_VBUS_SENSE;
+  cfg.vbus_sensing         = OTG_HS_VBUS_SENSE;
   tud_configure(1, TUD_CFGID_DWC2, &cfg);
 #endif
 
@@ -258,17 +298,17 @@ void board_init(void) {
 
 void board_led_write(bool state) {
 #ifdef PINID_LED
-  board_pindef_t* pindef = &board_pindef[PINID_LED];
-  GPIO_PinState pin_state = state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET;
+  board_pindef_t *pindef    = &board_pindef[PINID_LED];
+  GPIO_PinState   pin_state = state == pindef->active_state ? GPIO_PIN_SET : GPIO_PIN_RESET;
   HAL_GPIO_WritePin(pindef->port, pindef->pin_init.Pin, pin_state);
 #else
-  (void) state;
+  (void)state;
 #endif
 }
 
 uint32_t board_button_read(void) {
 #ifdef PINID_BUTTON
-  board_pindef_t* pindef = &board_pindef[PINID_BUTTON];
+  board_pindef_t *pindef = &board_pindef[PINID_BUTTON];
   return pindef->active_state == HAL_GPIO_ReadPin(pindef->port, pindef->pin_init.Pin);
 #else
   return 0;
@@ -276,10 +316,10 @@ uint32_t board_button_read(void) {
 }
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
-  (void) max_len;
-  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
-  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
-  uint8_t const len = 12;
+  (void)max_len;
+  volatile uint32_t *stm32_uuid = (volatile uint32_t *)UID_BASE;
+  uint32_t          *id32       = (uint32_t *)(uintptr_t)id;
+  const uint8_t      len        = 12;
 
   id32[0] = stm32_uuid[0];
   id32[1] = stm32_uuid[1];
@@ -290,14 +330,21 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 
 int board_uart_read(uint8_t *buf, int len) {
 #ifdef UART_DEV
-  int count = 0;
-  // clear overrun error if any
-  if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_ORE)) {
-    __HAL_UART_CLEAR_FLAG(&UartHandle, UART_CLEAR_OREF);
-  }
-  for (int i = 0; i < len; i++) {
-    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
-      buf[i] = (uint8_t) UartHandle.Instance->RDR;
+  return (int)tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t)len);
+#else
+  (void)buf;
+  (void)len;
+  return 0;
+#endif
+}
+
+int board_uart_write(const void *buf, int len) {
+#ifdef UART_DEV
+  const uint8_t *p     = (const uint8_t *)buf;
+  int            count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
       count++;
     } else {
       break;
@@ -305,22 +352,12 @@ int board_uart_read(uint8_t *buf, int len) {
   }
   return count;
 #else
-  (void) buf; (void) len;
+  (void)buf;
+  (void)len;
   return 0;
 #endif
 }
 
-int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
-  buf, len, 0xffff);
-  return len;
-#else
-  (void) buf; (void) len;
-  return -1;
-#endif
-}
-
 #if CFG_TUSB_OS == OPT_OS_NONE
 volatile uint32_t system_ticks = 0;
 
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index b25897264..6cdea3653 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -113,6 +113,7 @@ void board_init(void) {
     .AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT
   };
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
   // USB Pins TODO double check USB clock and pin setup
@@ -157,18 +158,38 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
-  (void) buf;
-  (void) len;
+  (void) buf; (void) len;
   return 0;
 #endif
 }
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 2e13a1d4b..b6968b8bd 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -129,6 +129,7 @@ void board_init(void) {
     .Init.OverSampling = UART_OVERSAMPLING_16
   };
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
   // USB Pins TODO double check USB clock and pin setup
@@ -187,18 +188,38 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
-  (void) buf;
-  (void) len;
+  (void) buf; (void) len;
   return 0;
 #endif
 }
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 1e8acd502..6ee9a7e2b 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -120,6 +120,7 @@ void board_init(void) {
   #ifdef UART_DEV
   UART_CLK_EN();
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
   #endif
 
   // USB Pins TODO double check USB clock and pin setup
@@ -183,20 +184,40 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const* buf, int len) {
-  #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*) (uintptr_t) buf, len, 0xffff);
-  return len;
-  #else
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
-  #endif
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index a95674217..c60706b99 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -150,6 +150,7 @@ void board_init(void) {
 #ifdef UART_DEV
   UART_CLK_EN();
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
   //------------- USB FS -------------//
@@ -298,12 +299,20 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
-  buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
-  return -1;
+  return 0;
 #endif
 }
 
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 3bf75ba97..d84c9d5f8 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -320,6 +320,7 @@ void board_init(void) {
 #ifdef UART_DEV
   UART_CLK_EN();
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
   //------------- USB FS -------------//
@@ -444,19 +445,39 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
-  buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
-  return -1;
+  return 0;
 #endif
 }
 
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index c87b643b8..1a5c59fdc 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -141,6 +141,9 @@ void board_init(void) {
   UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 
   HAL_UART_Init(&UartHandle);
+#if defined(USART_CR1_FIFOEN)
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
+#endif
 
   /* Configure USB FS GPIOs */
   /* Configure DM DP Pins */
@@ -213,14 +216,40 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
-  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
-  return len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 4354616c3..267da746e 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -157,6 +157,7 @@ void board_init(void) {
 #ifdef UART_DEV
   UART_CLK_EN();
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
 #if (CFG_TUD_ENABLED && BOARD_TUD_RHPORT == 0) || (CFG_TUH_ENABLED && BOARD_TUH_RHPORT == 0)
@@ -342,19 +343,39 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t * )(uintptr_t)
-  buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
-  return -1;
+  return 0;
 #endif
 }
 
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index af39ae398..4acbb3437 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -115,6 +115,7 @@ void board_init(void) {
   UartHandle.Init.Mode       = UART_MODE_TX_RX;
   UartHandle.Init.OverSampling = UART_OVERSAMPLING_16;
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
 #if CFG_TUSB_OS == OPT_OS_FREERTOS
@@ -154,17 +155,35 @@ uint32_t board_button_read(void) {
 
 int board_uart_read(uint8_t* buf, int len) {
 #ifdef UART_DEV
-  (void) buf; (void) len;
-  return 0;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
+  (void) buf; (void) len;
   return 0;
 #endif
 }
 
-int board_uart_write(void const * buf, int len) {
+int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
index 241323f62..9119f3652 100644
--- a/hw/bsp/stm32u0/family.mk
+++ b/hw/bsp/stm32u0/family.mk
@@ -35,7 +35,8 @@ SRC_C += \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
   $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_gpio.c \
   ${ST_HAL_DRIVER}/Src/stm32$(ST_FAMILY)xx_hal_pwr_ex.c \
-  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+  $(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 55ca25d58..27e84beb0 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -139,6 +139,7 @@ void board_init(void) {
   UartHandle.Init.ClockPrescaler = UART_PRESCALER_DIV1;
   UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 
   /* Configure USB GPIOs */
   /* Configure DM DP Pins */
@@ -252,14 +253,40 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const *buf, int len) {
-  HAL_UART_Transmit(&UartHandle, (uint8_t *) (uintptr_t) buf, len, 0xffff);
-  return len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 3dab8c610..90796836b 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -37,6 +37,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_uart_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_adc.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_adc_ex.c \
 	$(ST_HAL_DRIVER)/Src/stm32$(ST_FAMILY)xx_hal_tim.c
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index de503c072..0fdc5ca7d 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -123,6 +123,7 @@ void board_init(void) {
       .Init.OverSampling = UART_OVERSAMPLING_16
   };
   HAL_UART_Init(&UartHandle);
+  HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
 
   // USB Pins TODO double check USB clock and pin setup
@@ -151,15 +152,36 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
+#ifdef UART_DEV
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) UartHandle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
   return 0;
+#endif
 }
 
 int board_uart_write(void const* buf, int len) {
 #ifdef UART_DEV
-  HAL_UART_Transmit(&UartHandle, (uint8_t*) (uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_TXE)) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index 0b1a51cec..9397be62d 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -29,6 +29,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart_ex.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c
 
 INC += \
diff --git a/hw/bsp/stm32wba/family.c b/hw/bsp/stm32wba/family.c
index 878355b48..615a71cf5 100644
--- a/hw/bsp/stm32wba/family.c
+++ b/hw/bsp/stm32wba/family.c
@@ -117,6 +117,7 @@ static void board_uart_configuration(void) {
       .Init.OverSampling = UART_OVERSAMPLING_16
   };
   HAL_UART_Init(&uart_handle);
+  HAL_UARTEx_EnableFifoMode(&uart_handle);
 }
 
 void board_init(void) {
@@ -183,14 +184,30 @@ void board_led_write(bool state) {
 uint32_t board_button_read(void) { return HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN) == BUTTON_STATE_ACTIVE; }
 
 int board_uart_read(uint8_t *buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&uart_handle, UART_FLAG_RXNE)) {
+      buf[count] = (uint8_t) uart_handle.Instance->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 int board_uart_write(void const *buf, int len) {
-  (void) HAL_UART_Transmit(&uart_handle, (const uint8_t *) buf, len, USART_TIMEOUT_TICKS);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (__HAL_UART_GET_FLAG(&uart_handle, UART_FLAG_TXE)) {
+      uart_handle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32wba/family.cmake b/hw/bsp/stm32wba/family.cmake
index 9628913cc..37f4f9c61 100644
--- a/hw/bsp/stm32wba/family.cmake
+++ b/hw/bsp/stm32wba/family.cmake
@@ -54,6 +54,7 @@ function(family_add_board BOARD_TARGET)
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_rcc_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart.c
+    ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_uart_ex.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_gpio.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pcd.c
     ${ST_HAL_DRIVER}/Src/${ST_PREFIX}_hal_pcd_ex.c
diff --git a/hw/bsp/stm32wba/family.mk b/hw/bsp/stm32wba/family.mk
index 9b319921f..0a325323b 100644
--- a/hw/bsp/stm32wba/family.mk
+++ b/hw/bsp/stm32wba/family.mk
@@ -32,6 +32,7 @@ SRC_C += \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_rcc_ex.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart.c \
+	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_uart_ex.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_gpio.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd.c \
 	$(ST_HAL_DRIVER)/Src/${ST_PREFIX}_hal_pcd_ex.c \
-- 
cgit v1.3.1


From 2c10e6a2c7340400b080204f82932c85cec44556 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 3 Apr 2026 13:30:08 +0200
Subject: bsp/imxrt: refresh teensy config

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/imxrt/boards/teensy_40/board/clock_config.c |   4 +-
 hw/bsp/imxrt/boards/teensy_40/board/clock_config.h | 100 ++++++++++-----------
 hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c      |  18 ++--
 hw/bsp/imxrt/boards/teensy_40/board/pin_mux.h      |  11 +--
 hw/bsp/imxrt/boards/teensy_40/teensy40.mex         |  44 +++------
 hw/bsp/imxrt/boards/teensy_41/board/clock_config.c |   4 +-
 hw/bsp/imxrt/boards/teensy_41/board/clock_config.h | 100 ++++++++++-----------
 hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c      |  18 ++--
 hw/bsp/imxrt/boards/teensy_41/board/pin_mux.h      |  11 +--
 hw/bsp/imxrt/boards/teensy_41/teensy41.mex         |  44 +++------
 10 files changed, 146 insertions(+), 208 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
index c55e0135a..ef78abec2 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
+++ b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.c
@@ -15,11 +15,11 @@
 
 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Clocks v11.0
+product: Clocks v20.0
 processor: MIMXRT1062xxxxA
 package_id: MIMXRT1062DVL6A
 mcu_data: ksdk2_0
-processor_version: 13.0.2
+processor_version: 26.03.10
 board: MIMXRT1060-EVK
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
index 7ce24b6f4..2fa713c0d 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
+++ b/hw/bsp/imxrt/boards/teensy_40/board/clock_config.h
@@ -36,56 +36,56 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
 
 /* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
-#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
-#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
-#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
-#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
-#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
-#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
-#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
-#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
-#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
-#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
-#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
-#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
-#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
-#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
-#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
-#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
-#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
-#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
-#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
-#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
-#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
-#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
-#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL    /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXIO3, FLEXSPI, FLEXSPI2, GPIO6, GPIO7, GPIO8, GPIO9 */
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL     /* Clock consumers of CAN_CLK_ROOT output : CAN1, CAN2, CAN3 */
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL        /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, TSC, USB1, USB2, WDOG1, WDOG2 */
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL            /* Clock consumers of CLKO1_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL            /* Clock consumers of CLKO2_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL      /* Clock consumers of CLK_1M output : EWM, RTWDOG */
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL     /* Clock consumers of CLK_24M output : GPT1, GPT2 */
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL     /* Clock consumers of CSI_CLK_ROOT output : CSI */
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL      /* Clock consumers of ENET2_125M_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL            /* Clock consumers of ENET2_REF_CLK output : ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL            /* Clock consumers of ENET2_TX_CLK output : ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL      /* Clock consumers of ENET_125M_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL      /* Clock consumers of ENET_25M_REF_CLK output : ENET, ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL            /* Clock consumers of ENET_REF_CLK output : ENET */
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL            /* Clock consumers of ENET_TX_CLK output : ENET */
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL     /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL     /* Clock consumers of FLEXIO2_CLK_ROOT output : FLEXIO2, FLEXIO3 */
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL    /* Clock consumers of FLEXSPI2_CLK_ROOT output : FLEXSPI2 */
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL    /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL     /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL     /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL    /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CAN3, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, ENET2, EWM, FLEXIO1, FLEXIO2, FLEXIO3, FLEXRAM, FLEXSPI, FLEXSPI2, GPC, GPIO1, GPIO10, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, NVIC, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL     /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL     /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL    /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL   /* Clock consumers of LVDS1_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL     /* Clock consumers of MQS_MCLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL     /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL    /* Clock consumers of PLL7_MAIN_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL     /* Clock consumers of SAI1_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL     /* Clock consumers of SAI1_MCLK1 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL     /* Clock consumers of SAI1_MCLK2 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL     /* Clock consumers of SAI1_MCLK3 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL     /* Clock consumers of SAI2_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL     /* Clock consumers of SAI2_MCLK1 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL            /* Clock consumers of SAI2_MCLK2 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL     /* Clock consumers of SAI2_MCLK3 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL     /* Clock consumers of SAI3_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL     /* Clock consumers of SAI3_MCLK1 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL            /* Clock consumers of SAI3_MCLK2 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL     /* Clock consumers of SAI3_MCLK3 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL     /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL     /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL            /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL    /* Clock consumers of TRACE_CLK_ROOT output : ARM */
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL     /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL    /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL    /* Clock consumers of USBPHY2_CLK output : USB2 */
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL    /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL    /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
 
 /*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
  */
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
index b873e2a8b..db6da85c0 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
+++ b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.c
@@ -6,11 +6,11 @@
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Pins v13.1
+product: Pins v17.0
 processor: MIMXRT1062xxxxA
 package_id: MIMXRT1062DVL6A
 mcu_data: ksdk2_0
-processor_version: 13.0.2
+processor_version: 26.03.10
 board: MIMXRT1060-EVK
 pin_labels:
 - {pin_num: E7, pin_signal: GPIO_B0_01, label: LCDIF_ENABLE, identifier: USER_BUTTON}
@@ -80,16 +80,13 @@ void BOARD_InitPins(void) {
   IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_01_GPIO2_IO01, 0xB0B0U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitDEBUG_UARTPins:
 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
 - pin_list:
-  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
-  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
+  - {pin_num: G11, peripheral: LPUART6, signal: RX, pin_signal: GPIO_AD_B0_03, speed: MHZ_50}
+  - {pin_num: M11, peripheral: LPUART6, signal: TX, pin_signal: GPIO_AD_B0_02, speed: MHZ_50}
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  */
 
@@ -104,11 +101,10 @@ void BOARD_InitDEBUG_UARTPins(void) {
 
   IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U);
   IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x1030U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x1030U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitUSDHCPins:
@@ -142,7 +138,6 @@ void BOARD_InitUSDHCPins(void) {
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitQSPIPins:
@@ -175,7 +170,6 @@ void BOARD_InitQSPIPins(void) {
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0U);
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0U);
 }
-
 /***********************************************************************************************************************
  * EOF
  **********************************************************************************************************************/
diff --git a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.h b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.h
index f31f91598..c8b45bf57 100644
--- a/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.h
+++ b/hw/bsp/imxrt/boards/teensy_40/board/pin_mux.h
@@ -47,6 +47,7 @@ void BOARD_InitBootPins(void);
 
 /* Symbols to be used with GPIO driver */
 #define BOARD_INITPINS_USER_LED_GPIO                                       GPIO2   /*!< GPIO peripheral base pointer */
+#define BOARD_INITPINS_USER_LED_INIT_GPIO_VALUE                               0U   /*!< GPIO output initial state */
 #define BOARD_INITPINS_USER_LED_GPIO_PIN                                      3U   /*!< GPIO pin number */
 #define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK                         (1U << 3U)   /*!< GPIO pin mask */
 #define BOARD_INITPINS_USER_LED_PORT                                       GPIO2   /*!< PORT peripheral base pointer */
@@ -73,16 +74,6 @@ void BOARD_InitBootPins(void);
  */
 void BOARD_InitPins(void);
 
-/* GPIO_AD_B0_12 (coord K14), UART1_TXD */
-/* Routed pin properties */
-#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_PERIPHERAL                    LPUART1   /*!< Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_SIGNAL                             TX   /*!< Signal name */
-
-/* GPIO_AD_B0_13 (coord L14), UART1_RXD */
-/* Routed pin properties */
-#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_PERIPHERAL                    LPUART1   /*!< Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_SIGNAL                             RX   /*!< Signal name */
-
 /*!
  * @brief Configures pin routing and optionally pin electrical features.
  *
diff --git a/hw/bsp/imxrt/boards/teensy_40/teensy40.mex b/hw/bsp/imxrt/boards/teensy_40/teensy40.mex
index 1ade853ae..421ae575e 100644
--- a/hw/bsp/imxrt/boards/teensy_40/teensy40.mex
+++ b/hw/bsp/imxrt/boards/teensy_40/teensy40.mex
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding= "UTF-8" ?>
-<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
    <common>
       <processor>MIMXRT1062xxxxA</processor>
       <package>MIMXRT1062DVL6A</package>
@@ -13,19 +13,19 @@
    </common>
    <preferences>
       <validate_boot_init_only>false</validate_boot_init_only>
-      <generate_extended_information>false</generate_extended_information>
       <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
       <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
       <generate_registers_defines>false</generate_registers_defines>
    </preferences>
    <tools>
-      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
          <generated_project_files>
             <file path="board/pin_mux.c" update_enabled="true"/>
             <file path="board/pin_mux.h" update_enabled="true"/>
          </generated_project_files>
          <pins_profile>
-            <processor_version>13.0.2</processor_version>
+            <processor_version>26.03.10</processor_version>
             <pin_labels>
                <pin_label pin_num="E7" pin_signal="GPIO_B0_01" label="LCDIF_ENABLE" identifier="USER_BUTTON"/>
                <pin_label pin_num="D8" pin_signal="GPIO_B0_03" label="LCDIF_VSYNC" identifier="USER_LED"/>
@@ -41,7 +41,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -85,7 +85,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                  <dependency resourceType="Peripheral" resourceId="LPUART6" description="Peripheral LPUART6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -102,30 +102,14 @@
                   </dependency>
                </dependencies>
                <pins>
-                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                  <pin peripheral="LPUART6" signal="RX" pin_num="G11" pin_signal="GPIO_AD_B0_03">
                      <pin_features>
-                        <pin_feature name="software_input_on" value="Disable"/>
-                        <pin_feature name="hysteresis_enable" value="Disable"/>
-                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
-                        <pin_feature name="pull_keeper_select" value="Keeper"/>
-                        <pin_feature name="pull_keeper_enable" value="Enable"/>
-                        <pin_feature name="open_drain" value="Disable"/>
-                        <pin_feature name="speed" value="MHZ_100"/>
-                        <pin_feature name="drive_strength" value="R0_6"/>
-                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="speed" value="MHZ_50"/>
                      </pin_features>
                   </pin>
-                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                  <pin peripheral="LPUART6" signal="TX" pin_num="M11" pin_signal="GPIO_AD_B0_02">
                      <pin_features>
-                        <pin_feature name="software_input_on" value="Disable"/>
-                        <pin_feature name="hysteresis_enable" value="Disable"/>
-                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
-                        <pin_feature name="pull_keeper_select" value="Keeper"/>
-                        <pin_feature name="pull_keeper_enable" value="Enable"/>
-                        <pin_feature name="open_drain" value="Disable"/>
-                        <pin_feature name="speed" value="MHZ_100"/>
-                        <pin_feature name="drive_strength" value="R0_6"/>
-                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="speed" value="MHZ_50"/>
                      </pin_features>
                   </pin>
                </pins>
@@ -138,7 +122,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSDHCPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -172,7 +156,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitQSPIPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -200,13 +184,13 @@
             </function>
          </functions_list>
       </pins>
-      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+      <clocks name="Clocks" version="20.0" enabled="true" update_project_code="true">
          <generated_project_files>
             <file path="board/clock_config.c" update_enabled="true"/>
             <file path="board/clock_config.h" update_enabled="true"/>
          </generated_project_files>
          <clocks_profile>
-            <processor_version>13.0.2</processor_version>
+            <processor_version>26.03.10</processor_version>
          </clocks_profile>
          <clock_configurations>
             <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
index c55e0135a..ef78abec2 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
+++ b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.c
@@ -15,11 +15,11 @@
 
 /* TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Clocks v11.0
+product: Clocks v20.0
 processor: MIMXRT1062xxxxA
 package_id: MIMXRT1062DVL6A
 mcu_data: ksdk2_0
-processor_version: 13.0.2
+processor_version: 26.03.10
 board: MIMXRT1060-EVK
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS **********/
 
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
index 7ce24b6f4..2fa713c0d 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
+++ b/hw/bsp/imxrt/boards/teensy_41/board/clock_config.h
@@ -36,56 +36,56 @@ void BOARD_InitBootClocks(void);
 #define BOARD_BOOTCLOCKRUN_CORE_CLOCK             600000000U  /*!< Core clock frequency: 600000000Hz */
 
 /* Clock outputs (values are in Hz): */
-#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL
-#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL
-#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL
-#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL
-#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL
-#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL
-#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL
-#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL
-#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL
-#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL
-#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL
-#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL
-#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL
-#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL
-#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL
-#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL
-#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL
-#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL
-#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL
-#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL
-#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL
-#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL
-#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL
-#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL
-#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL
-#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL
-#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL
-#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL
-#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL
-#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL
-#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL
-#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL
+#define BOARD_BOOTCLOCKRUN_AHB_CLK_ROOT               600000000UL    /* Clock consumers of AHB_CLK_ROOT output : AIPSTZ1, AIPSTZ2, AIPSTZ3, AIPSTZ4, ARM, FLEXIO3, FLEXSPI, FLEXSPI2, GPIO6, GPIO7, GPIO8, GPIO9 */
+#define BOARD_BOOTCLOCKRUN_CAN_CLK_ROOT               40000000UL     /* Clock consumers of CAN_CLK_ROOT output : CAN1, CAN2, CAN3 */
+#define BOARD_BOOTCLOCKRUN_CKIL_SYNC_CLK_ROOT         32768UL        /* Clock consumers of CKIL_SYNC_CLK_ROOT output : CSU, EWM, GPT1, GPT2, KPP, PIT, RTWDOG, SNVS, SPDIF, TEMPMON, TSC, USB1, USB2, WDOG1, WDOG2 */
+#define BOARD_BOOTCLOCKRUN_CLKO1_CLK                  0UL            /* Clock consumers of CLKO1_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLKO2_CLK                  0UL            /* Clock consumers of CLKO2_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_CLK_1M                     1000000UL      /* Clock consumers of CLK_1M output : EWM, RTWDOG */
+#define BOARD_BOOTCLOCKRUN_CLK_24M                    24000000UL     /* Clock consumers of CLK_24M output : GPT1, GPT2 */
+#define BOARD_BOOTCLOCKRUN_CSI_CLK_ROOT               12000000UL     /* Clock consumers of CSI_CLK_ROOT output : CSI */
+#define BOARD_BOOTCLOCKRUN_ENET2_125M_CLK             1200000UL      /* Clock consumers of ENET2_125M_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_ENET2_REF_CLK              0UL            /* Clock consumers of ENET2_REF_CLK output : ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET2_TX_CLK               0UL            /* Clock consumers of ENET2_TX_CLK output : ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET_125M_CLK              2400000UL      /* Clock consumers of ENET_125M_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_ENET_25M_REF_CLK           1200000UL      /* Clock consumers of ENET_25M_REF_CLK output : ENET, ENET2 */
+#define BOARD_BOOTCLOCKRUN_ENET_REF_CLK               0UL            /* Clock consumers of ENET_REF_CLK output : ENET */
+#define BOARD_BOOTCLOCKRUN_ENET_TX_CLK                0UL            /* Clock consumers of ENET_TX_CLK output : ENET */
+#define BOARD_BOOTCLOCKRUN_FLEXIO1_CLK_ROOT           30000000UL     /* Clock consumers of FLEXIO1_CLK_ROOT output : FLEXIO1 */
+#define BOARD_BOOTCLOCKRUN_FLEXIO2_CLK_ROOT           30000000UL     /* Clock consumers of FLEXIO2_CLK_ROOT output : FLEXIO2, FLEXIO3 */
+#define BOARD_BOOTCLOCKRUN_FLEXSPI2_CLK_ROOT          130909090UL    /* Clock consumers of FLEXSPI2_CLK_ROOT output : FLEXSPI2 */
+#define BOARD_BOOTCLOCKRUN_FLEXSPI_CLK_ROOT           130909090UL    /* Clock consumers of FLEXSPI_CLK_ROOT output : FLEXSPI */
+#define BOARD_BOOTCLOCKRUN_GPT1_IPG_CLK_HIGHFREQ      75000000UL     /* Clock consumers of GPT1_ipg_clk_highfreq output : GPT1 */
+#define BOARD_BOOTCLOCKRUN_GPT2_IPG_CLK_HIGHFREQ      75000000UL     /* Clock consumers of GPT2_ipg_clk_highfreq output : GPT2 */
+#define BOARD_BOOTCLOCKRUN_IPG_CLK_ROOT               150000000UL    /* Clock consumers of IPG_CLK_ROOT output : ADC1, ADC2, ADC_ETC, AOI1, AOI2, ARM, BEE, CAN1, CAN2, CAN3, CCM, CMP1, CMP2, CMP3, CMP4, CSI, CSU, DCDC, DCP, DMA0, DMAMUX, ENC1, ENC2, ENC3, ENC4, ENET, ENET2, EWM, FLEXIO1, FLEXIO2, FLEXIO3, FLEXRAM, FLEXSPI, FLEXSPI2, GPC, GPIO1, GPIO10, GPIO2, GPIO3, GPIO4, GPIO5, IOMUXC, KPP, LCDIF, LPI2C1, LPI2C2, LPI2C3, LPI2C4, LPSPI1, LPSPI2, LPSPI3, LPSPI4, LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8, NVIC, OCOTP, PMU, PWM1, PWM2, PWM3, PWM4, PXP, ROMC, RTWDOG, SAI1, SAI2, SAI3, SNVS, SPDIF, SRC, TEMPMON, TMR1, TMR2, TMR3, TMR4, TRNG, TSC, USB1, USB2, USDHC1, USDHC2, WDOG1, WDOG2, XBARA1, XBARB2, XBARB3 */
+#define BOARD_BOOTCLOCKRUN_LCDIF_CLK_ROOT             67500000UL     /* Clock consumers of LCDIF_CLK_ROOT output : LCDIF */
+#define BOARD_BOOTCLOCKRUN_LPI2C_CLK_ROOT             60000000UL     /* Clock consumers of LPI2C_CLK_ROOT output : LPI2C1, LPI2C2, LPI2C3, LPI2C4 */
+#define BOARD_BOOTCLOCKRUN_LPSPI_CLK_ROOT             105600000UL    /* Clock consumers of LPSPI_CLK_ROOT output : LPSPI1, LPSPI2, LPSPI3, LPSPI4 */
+#define BOARD_BOOTCLOCKRUN_LVDS1_CLK                  1200000000UL   /* Clock consumers of LVDS1_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_MQS_MCLK                   63529411UL     /* Clock consumers of MQS_MCLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_PERCLK_CLK_ROOT            75000000UL     /* Clock consumers of PERCLK_CLK_ROOT output : GPT1, GPT2, PIT */
+#define BOARD_BOOTCLOCKRUN_PLL7_MAIN_CLK              480000000UL    /* Clock consumers of PLL7_MAIN_CLK output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI1_CLK_ROOT              63529411UL     /* Clock consumers of SAI1_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK1                 63529411UL     /* Clock consumers of SAI1_MCLK1 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK2                 63529411UL     /* Clock consumers of SAI1_MCLK2 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI1_MCLK3                 30000000UL     /* Clock consumers of SAI1_MCLK3 output : SAI1 */
+#define BOARD_BOOTCLOCKRUN_SAI2_CLK_ROOT              63529411UL     /* Clock consumers of SAI2_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK1                 63529411UL     /* Clock consumers of SAI2_MCLK1 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK2                 0UL            /* Clock consumers of SAI2_MCLK2 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI2_MCLK3                 30000000UL     /* Clock consumers of SAI2_MCLK3 output : SAI2 */
+#define BOARD_BOOTCLOCKRUN_SAI3_CLK_ROOT              63529411UL     /* Clock consumers of SAI3_CLK_ROOT output : N/A */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK1                 63529411UL     /* Clock consumers of SAI3_MCLK1 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK2                 0UL            /* Clock consumers of SAI3_MCLK2 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SAI3_MCLK3                 30000000UL     /* Clock consumers of SAI3_MCLK3 output : SAI3 */
+#define BOARD_BOOTCLOCKRUN_SEMC_CLK_ROOT              75000000UL     /* Clock consumers of SEMC_CLK_ROOT output : SEMC */
+#define BOARD_BOOTCLOCKRUN_SPDIF0_CLK_ROOT            30000000UL     /* Clock consumers of SPDIF0_CLK_ROOT output : SPDIF */
+#define BOARD_BOOTCLOCKRUN_SPDIF0_EXTCLK_OUT          0UL            /* Clock consumers of SPDIF0_EXTCLK_OUT output : SPDIF */
+#define BOARD_BOOTCLOCKRUN_TRACE_CLK_ROOT             132000000UL    /* Clock consumers of TRACE_CLK_ROOT output : ARM */
+#define BOARD_BOOTCLOCKRUN_UART_CLK_ROOT              80000000UL     /* Clock consumers of UART_CLK_ROOT output : LPUART1, LPUART2, LPUART3, LPUART4, LPUART5, LPUART6, LPUART7, LPUART8 */
+#define BOARD_BOOTCLOCKRUN_USBPHY1_CLK                480000000UL    /* Clock consumers of USBPHY1_CLK output : TEMPMON, USB1 */
+#define BOARD_BOOTCLOCKRUN_USBPHY2_CLK                480000000UL    /* Clock consumers of USBPHY2_CLK output : USB2 */
+#define BOARD_BOOTCLOCKRUN_USDHC1_CLK_ROOT            198000000UL    /* Clock consumers of USDHC1_CLK_ROOT output : USDHC1 */
+#define BOARD_BOOTCLOCKRUN_USDHC2_CLK_ROOT            198000000UL    /* Clock consumers of USDHC2_CLK_ROOT output : USDHC2 */
 
 /*! @brief Arm PLL set for BOARD_BootClockRUN configuration.
  */
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
index b873e2a8b..db6da85c0 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
+++ b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.c
@@ -6,11 +6,11 @@
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 !!GlobalInfo
-product: Pins v13.1
+product: Pins v17.0
 processor: MIMXRT1062xxxxA
 package_id: MIMXRT1062DVL6A
 mcu_data: ksdk2_0
-processor_version: 13.0.2
+processor_version: 26.03.10
 board: MIMXRT1060-EVK
 pin_labels:
 - {pin_num: E7, pin_signal: GPIO_B0_01, label: LCDIF_ENABLE, identifier: USER_BUTTON}
@@ -80,16 +80,13 @@ void BOARD_InitPins(void) {
   IOMUXC_SetPinConfig(IOMUXC_GPIO_B0_01_GPIO2_IO01, 0xB0B0U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitDEBUG_UARTPins:
 - options: {callFromInitBoot: 'true', coreID: core0, enableClock: 'true'}
 - pin_list:
-  - {pin_num: K14, peripheral: LPUART1, signal: TX, pin_signal: GPIO_AD_B0_12, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
-  - {pin_num: L14, peripheral: LPUART1, signal: RX, pin_signal: GPIO_AD_B0_13, software_input_on: Disable, hysteresis_enable: Disable, pull_up_down_config: Pull_Down_100K_Ohm,
-    pull_keeper_select: Keeper, pull_keeper_enable: Enable, open_drain: Disable, speed: MHZ_100, drive_strength: R0_6, slew_rate: Slow}
+  - {pin_num: G11, peripheral: LPUART6, signal: RX, pin_signal: GPIO_AD_B0_03, speed: MHZ_50}
+  - {pin_num: M11, peripheral: LPUART6, signal: TX, pin_signal: GPIO_AD_B0_02, speed: MHZ_50}
  * BE CAREFUL MODIFYING THIS COMMENT - IT IS YAML SETTINGS FOR TOOLS ***********
  */
 
@@ -104,11 +101,10 @@ void BOARD_InitDEBUG_UARTPins(void) {
 
   IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0U);
   IOMUXC_SetPinMux(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x10B0U);
-  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x10B0U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_02_LPUART6_TX, 0x1030U);
+  IOMUXC_SetPinConfig(IOMUXC_GPIO_AD_B0_03_LPUART6_RX, 0x1030U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitUSDHCPins:
@@ -142,7 +138,6 @@ void BOARD_InitUSDHCPins(void) {
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B0_05_USDHC1_DATA3, 0U);
 }
 
-
 /*
  * TEXT BELOW IS USED AS SETTING FOR TOOLS *************************************
 BOARD_InitQSPIPins:
@@ -175,7 +170,6 @@ void BOARD_InitQSPIPins(void) {
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_10_FLEXSPIA_DATA02, 0U);
   IOMUXC_SetPinMux(IOMUXC_GPIO_SD_B1_11_FLEXSPIA_DATA03, 0U);
 }
-
 /***********************************************************************************************************************
  * EOF
  **********************************************************************************************************************/
diff --git a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.h b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.h
index f31f91598..c8b45bf57 100644
--- a/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.h
+++ b/hw/bsp/imxrt/boards/teensy_41/board/pin_mux.h
@@ -47,6 +47,7 @@ void BOARD_InitBootPins(void);
 
 /* Symbols to be used with GPIO driver */
 #define BOARD_INITPINS_USER_LED_GPIO                                       GPIO2   /*!< GPIO peripheral base pointer */
+#define BOARD_INITPINS_USER_LED_INIT_GPIO_VALUE                               0U   /*!< GPIO output initial state */
 #define BOARD_INITPINS_USER_LED_GPIO_PIN                                      3U   /*!< GPIO pin number */
 #define BOARD_INITPINS_USER_LED_GPIO_PIN_MASK                         (1U << 3U)   /*!< GPIO pin mask */
 #define BOARD_INITPINS_USER_LED_PORT                                       GPIO2   /*!< PORT peripheral base pointer */
@@ -73,16 +74,6 @@ void BOARD_InitBootPins(void);
  */
 void BOARD_InitPins(void);
 
-/* GPIO_AD_B0_12 (coord K14), UART1_TXD */
-/* Routed pin properties */
-#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_PERIPHERAL                    LPUART1   /*!< Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_UART1_TXD_SIGNAL                             TX   /*!< Signal name */
-
-/* GPIO_AD_B0_13 (coord L14), UART1_RXD */
-/* Routed pin properties */
-#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_PERIPHERAL                    LPUART1   /*!< Peripheral name */
-#define BOARD_INITDEBUG_UARTPINS_UART1_RXD_SIGNAL                             RX   /*!< Signal name */
-
 /*!
  * @brief Configures pin routing and optionally pin electrical features.
  *
diff --git a/hw/bsp/imxrt/boards/teensy_41/teensy41.mex b/hw/bsp/imxrt/boards/teensy_41/teensy41.mex
index 1ade853ae..421ae575e 100644
--- a/hw/bsp/imxrt/boards/teensy_41/teensy41.mex
+++ b/hw/bsp/imxrt/boards/teensy_41/teensy41.mex
@@ -1,5 +1,5 @@
 <?xml version="1.0" encoding= "UTF-8" ?>
-<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_13 http://mcuxpresso.nxp.com/XSD/mex_configuration_13.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="13" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_13" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
+<configuration name="MIMXRT1060-EVK" xsi:schemaLocation="http://mcuxpresso.nxp.com/XSD/mex_configuration_19 http://mcuxpresso.nxp.com/XSD/mex_configuration_19.xsd" uuid="2174caba-38fe-48d5-8f89-42a23354d23b" version="19" xmlns="http://mcuxpresso.nxp.com/XSD/mex_configuration_19" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance">
    <common>
       <processor>MIMXRT1062xxxxA</processor>
       <package>MIMXRT1062DVL6A</package>
@@ -13,19 +13,19 @@
    </common>
    <preferences>
       <validate_boot_init_only>false</validate_boot_init_only>
-      <generate_extended_information>false</generate_extended_information>
       <generate_code_modified_registers_only>false</generate_code_modified_registers_only>
       <update_include_paths>true</update_include_paths>
+      <enable_parallel_routing>true</enable_parallel_routing>
       <generate_registers_defines>false</generate_registers_defines>
    </preferences>
    <tools>
-      <pins name="Pins" version="13.1" enabled="true" update_project_code="true">
+      <pins name="Pins" version="17.0" enabled="true" update_project_code="true">
          <generated_project_files>
             <file path="board/pin_mux.c" update_enabled="true"/>
             <file path="board/pin_mux.h" update_enabled="true"/>
          </generated_project_files>
          <pins_profile>
-            <processor_version>13.0.2</processor_version>
+            <processor_version>26.03.10</processor_version>
             <pin_labels>
                <pin_label pin_num="E7" pin_signal="GPIO_B0_01" label="LCDIF_ENABLE" identifier="USER_BUTTON"/>
                <pin_label pin_num="D8" pin_signal="GPIO_B0_03" label="LCDIF_VSYNC" identifier="USER_LED"/>
@@ -41,7 +41,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 is not initialized" problem_level="1" source="Pins:BOARD_InitPins">
+                  <dependency resourceType="Peripheral" resourceId="GPIO2" description="Peripheral GPIO2 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -85,7 +85,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="LPUART1" description="Peripheral LPUART1 is not initialized" problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
+                  <dependency resourceType="Peripheral" resourceId="LPUART6" description="Peripheral LPUART6 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitDEBUG_UARTPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -102,30 +102,14 @@
                   </dependency>
                </dependencies>
                <pins>
-                  <pin peripheral="LPUART1" signal="TX" pin_num="K14" pin_signal="GPIO_AD_B0_12">
+                  <pin peripheral="LPUART6" signal="RX" pin_num="G11" pin_signal="GPIO_AD_B0_03">
                      <pin_features>
-                        <pin_feature name="software_input_on" value="Disable"/>
-                        <pin_feature name="hysteresis_enable" value="Disable"/>
-                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
-                        <pin_feature name="pull_keeper_select" value="Keeper"/>
-                        <pin_feature name="pull_keeper_enable" value="Enable"/>
-                        <pin_feature name="open_drain" value="Disable"/>
-                        <pin_feature name="speed" value="MHZ_100"/>
-                        <pin_feature name="drive_strength" value="R0_6"/>
-                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="speed" value="MHZ_50"/>
                      </pin_features>
                   </pin>
-                  <pin peripheral="LPUART1" signal="RX" pin_num="L14" pin_signal="GPIO_AD_B0_13">
+                  <pin peripheral="LPUART6" signal="TX" pin_num="M11" pin_signal="GPIO_AD_B0_02">
                      <pin_features>
-                        <pin_feature name="software_input_on" value="Disable"/>
-                        <pin_feature name="hysteresis_enable" value="Disable"/>
-                        <pin_feature name="pull_up_down_config" value="Pull_Down_100K_Ohm"/>
-                        <pin_feature name="pull_keeper_select" value="Keeper"/>
-                        <pin_feature name="pull_keeper_enable" value="Enable"/>
-                        <pin_feature name="open_drain" value="Disable"/>
-                        <pin_feature name="speed" value="MHZ_100"/>
-                        <pin_feature name="drive_strength" value="R0_6"/>
-                        <pin_feature name="slew_rate" value="Slow"/>
+                        <pin_feature name="speed" value="MHZ_50"/>
                      </pin_features>
                   </pin>
                </pins>
@@ -138,7 +122,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 is not initialized" problem_level="1" source="Pins:BOARD_InitUSDHCPins">
+                  <dependency resourceType="Peripheral" resourceId="USDHC1" description="Peripheral USDHC1 signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitUSDHCPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -172,7 +156,7 @@
                   <enableClock>true</enableClock>
                </options>
                <dependencies>
-                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI is not initialized" problem_level="1" source="Pins:BOARD_InitQSPIPins">
+                  <dependency resourceType="Peripheral" resourceId="FLEXSPI" description="Peripheral FLEXSPI signals are routed in the Pins Tool, but the peripheral is not initialized in the Peripherals Tool." problem_level="1" source="Pins:BOARD_InitQSPIPins">
                      <feature name="initialized" evaluation="equal">
                         <data>true</data>
                      </feature>
@@ -200,13 +184,13 @@
             </function>
          </functions_list>
       </pins>
-      <clocks name="Clocks" version="11.0" enabled="true" update_project_code="true">
+      <clocks name="Clocks" version="20.0" enabled="true" update_project_code="true">
          <generated_project_files>
             <file path="board/clock_config.c" update_enabled="true"/>
             <file path="board/clock_config.h" update_enabled="true"/>
          </generated_project_files>
          <clocks_profile>
-            <processor_version>13.0.2</processor_version>
+            <processor_version>26.03.10</processor_version>
          </clocks_profile>
          <clock_configurations>
             <clock_configuration name="BOARD_BootClockRUN" id_prefix="" prefix_user_defined="false">
-- 
cgit v1.3.1


From 81efb78d1655dcab31da5e03fd7e22e91491d186 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Apr 2026 19:38:07 +0700
Subject: update stm32 to use better uart id

---
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.h     |  3 +-
 hw/bsp/stm32c0/family.c                           | 22 +++++--
 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h   |  3 +-
 hw/bsp/stm32f0/boards/stm32f072disco/board.h      |  3 +-
 hw/bsp/stm32f0/boards/stm32f072eval/board.h       |  3 +-
 hw/bsp/stm32f0/family.c                           | 48 ++++++++-------
 hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h  |  3 +-
 hw/bsp/stm32f1/family.c                           | 56 ++++++++++--------
 hw/bsp/stm32f2/family.c                           | 54 +++++++++--------
 hw/bsp/stm32f3/family.c                           | 56 ++++++++++--------
 hw/bsp/stm32f4/boards/feather_stm32f405/board.h   |  4 +-
 hw/bsp/stm32f4/boards/pyboardv11/board.h          |  4 +-
 hw/bsp/stm32f4/boards/stm32f401blackpill/board.h  |  4 +-
 hw/bsp/stm32f4/boards/stm32f407blackvet/board.h   |  4 +-
 hw/bsp/stm32f4/boards/stm32f407disco/board.h      |  4 +-
 hw/bsp/stm32f4/boards/stm32f411blackpill/board.h  |  4 +-
 hw/bsp/stm32f4/boards/stm32f411disco/board.h      |  4 +-
 hw/bsp/stm32f4/boards/stm32f412disco/board.h      |  4 +-
 hw/bsp/stm32f4/boards/stm32f412nucleo/board.h     |  4 +-
 hw/bsp/stm32f4/boards/stm32f439nucleo/board.h     |  4 +-
 hw/bsp/stm32f4/family.c                           | 60 +++++++++++--------
 hw/bsp/stm32f7/boards/stlinkv3mini/board.h        |  4 +-
 hw/bsp/stm32f7/boards/stm32f723disco/board.h      |  4 +-
 hw/bsp/stm32f7/boards/stm32f746disco/board.h      |  4 +-
 hw/bsp/stm32f7/boards/stm32f746nucleo/board.h     |  4 +-
 hw/bsp/stm32f7/boards/stm32f767nucleo/board.h     |  4 +-
 hw/bsp/stm32f7/boards/stm32f769disco/board.h      |  4 +-
 hw/bsp/stm32f7/family.c                           | 71 ++++++++++++-----------
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h     |  3 +-
 hw/bsp/stm32g0/family.c                           | 28 +++++++--
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h       |  3 +-
 hw/bsp/stm32g4/boards/stm32g474nucleo/board.h     |  3 +-
 hw/bsp/stm32g4/boards/stm32g491nucleo/board.h     |  3 +-
 hw/bsp/stm32g4/family.c                           | 28 +++++++--
 hw/bsp/stm32h5/family.c                           | 25 ++++++--
 hw/bsp/stm32h7/boards/daisyseed/board.h           |  3 +-
 hw/bsp/stm32h7/boards/stm32h723nucleo/board.h     |  3 +-
 hw/bsp/stm32h7/boards/stm32h743_weact/board.h     |  3 +-
 hw/bsp/stm32h7/boards/stm32h743eval/board.h       |  3 +-
 hw/bsp/stm32h7/boards/stm32h743nucleo/board.h     |  3 +-
 hw/bsp/stm32h7/boards/stm32h745disco/board.h      |  3 +-
 hw/bsp/stm32h7/boards/stm32h747disco/board.h      |  3 +-
 hw/bsp/stm32h7/boards/stm32h750_weact/board.h     |  3 +-
 hw/bsp/stm32h7/boards/stm32h750bdk/board.h        |  3 +-
 hw/bsp/stm32h7/boards/waveshare_openh743i/board.h |  3 +-
 hw/bsp/stm32h7/family.c                           | 28 +++++++--
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h   |  3 +-
 hw/bsp/stm32h7rs/family.c                         | 25 ++++++--
 hw/bsp/stm32l0/boards/stm32l052dap52/board.h      |  3 +-
 hw/bsp/stm32l0/family.c                           | 20 +++++--
 hw/bsp/stm32l4/boards/stm32l412nucleo/board.h     |  3 +-
 hw/bsp/stm32l4/boards/stm32l476disco/board.h      |  3 +-
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.h     |  3 +-
 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h     |  3 +-
 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h     |  3 +-
 hw/bsp/stm32l4/family.c                           | 26 +++++++--
 hw/bsp/stm32n6/boards/stm32n6570dk/board.h        |  3 +-
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h     |  3 +-
 hw/bsp/stm32n6/family.c                           | 25 ++++++--
 hw/bsp/stm32u0/boards/stm32u083cdk/board.h        |  3 +-
 hw/bsp/stm32u0/boards/stm32u083nucleo/board.h     |  3 +-
 hw/bsp/stm32u0/family.c                           | 25 ++++++--
 hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h       |  3 +-
 hw/bsp/stm32u5/boards/stm32u545nucleo/board.h     |  3 +-
 hw/bsp/stm32u5/boards/stm32u575eval/board.h       |  3 +-
 hw/bsp/stm32u5/boards/stm32u575nucleo/board.h     |  3 +-
 hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h     |  3 +-
 hw/bsp/stm32u5/family.c                           | 29 +++++++--
 hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h     |  3 +-
 hw/bsp/stm32wb/family.c                           | 24 ++++++--
 70 files changed, 481 insertions(+), 341 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
index 460b42a21..085d0d721 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
@@ -54,8 +54,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // Enable UART serial communication with the ST-Link
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF1_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index d99720a64..72af3ce7f 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -33,6 +33,16 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -49,7 +59,9 @@ void USB_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
+#endif
 
 void board_init(void) {
   HAL_Init();
@@ -93,8 +105,8 @@ void board_init(void) {
     HAL_GPIO_Init(BUTTON_PORT, &gpio_init);
   }
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   // UART
   {
     GPIO_InitTypeDef gpio_init = { 0 };
@@ -107,7 +119,7 @@ void board_init(void) {
   }
 
   UartHandle = (UART_HandleTypeDef){
-    .Instance = UART_DEV,
+    .Instance = USARTn,
     .Init.BaudRate = CFG_BOARD_UART_BAUDRATE,
     .Init.WordLength = UART_WORDLENGTH_8B,
     .Init.StopBits = UART_STOPBITS_1,
@@ -149,7 +161,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -167,7 +179,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
index 82ad309a3..5239e014f 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF1_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.h b/hw/bsp/stm32f0/boards/stm32f072disco/board.h
index 3ca1b3641..971d9bdc0 100644
--- a/hw/bsp/stm32f0/boards/stm32f072disco/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   1
 
 // UART
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF1_USART1
 #define UART_TX_PIN           GPIO_PIN_9
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.h b/hw/bsp/stm32f0/boards/stm32f072eval/board.h
index 2828000b9..32023f8ab 100644
--- a/hw/bsp/stm32f0/boards/stm32f072eval/board.h
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.h
@@ -50,8 +50,7 @@
 #define BUTTON_STATE_ACTIVE   1
 
 // UART
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOD
 #define UART_GPIO_AF          GPIO_AF0_USART2
 #define UART_TX_PIN           GPIO_PIN_5
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index a6ed8629f..f413163e5 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -33,6 +33,20 @@
 #include "common/tusb_fifo.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -43,9 +57,9 @@ void USB_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate     = CFG_BOARD_UART_BAUDRATE,
     .WordLength   = UART_WORDLENGTH_8B,
@@ -62,23 +76,16 @@ static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
 // F0 uses new USART IP (ISR/RDR/TDR/ICR) — same as F7
-static void uart_rx_isr(void) {
-  uint32_t isr = UART_DEV->ISR;
+void USARTn_IRQHandler(void) {
+  uint32_t isr = USARTn->ISR;
   if (isr & USART_ISR_RXNE) {
-    uint8_t byte = (uint8_t) UART_DEV->RDR;
+    uint8_t byte = (uint8_t) USARTn->RDR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
   if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
-    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+    USARTn->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
   }
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 void board_init(void) {
@@ -118,9 +125,9 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
+#ifdef UART_ID
   // Enable UART Clock
-  UART_CLK_EN();
+  UARTn_CLK_ENABLE();
 
   // Uart
   GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
@@ -132,10 +139,9 @@ void board_init(void) {
 
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn : USART2_IRQn;
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 
   // USB Pins
@@ -177,7 +183,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
 #else
   (void) buf; (void) len;
@@ -186,7 +192,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
index c8a74337f..3549c1d79 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   1
 
 // UART
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 #define UART_GPIO_PORT        GPIOA
 //#define UART_GPIO_AF          GPIO_AF1_USART1
 #define UART_TX_PIN           GPIO_PIN_9
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index fa2d3b268..74e0f53f2 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -33,6 +33,25 @@
 #include "common/tusb_fifo.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define USARTn_IRQn       USART3_IRQn
+    #define USARTn_IRQHandler USART3_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -51,9 +70,9 @@ void USBWakeUp_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-    .Instance        = UART_DEV,
+    .Instance        = USARTn,
     .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
     .Init.WordLength = UART_WORDLENGTH_8B,
     .Init.StopBits   = UART_STOPBITS_1,
@@ -68,24 +87,14 @@ static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
 // F1 uses old USART IP (SR/DR)
-static void uart_rx_isr(void) {
-  uint32_t sr = UART_DEV->SR;
+void USARTn_IRQHandler(void) {
+  uint32_t sr = USARTn->SR;
   if (sr & USART_SR_RXNE) {
-    uint8_t byte = (uint8_t) UART_DEV->DR;
+    uint8_t byte = (uint8_t) USARTn->DR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
   // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART3_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 void board_init(void) {
@@ -137,9 +146,9 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
+#ifdef UART_ID
   // UART
-  UART_CLK_EN();
+  UARTn_CLK_ENABLE();
 
   GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@@ -150,12 +159,9 @@ void board_init(void) {
 
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
-                            : (UART_DEV == USART2) ? USART2_IRQn
-                                                   : USART3_IRQn;
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 
 #ifdef USB_CONNECT_PIN
@@ -217,7 +223,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
 #else
   (void) buf; (void) len;
@@ -226,7 +232,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index 3106fc9e3..051a026c5 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -33,6 +33,25 @@
 #include "common/tusb_fifo.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define USARTn_IRQn       USART3_IRQn
+    #define USARTn_IRQHandler USART3_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -43,9 +62,9 @@ void OTG_FS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate     = CFG_BOARD_UART_BAUDRATE,
     .WordLength   = UART_WORDLENGTH_8B,
@@ -62,24 +81,14 @@ static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
 // F2 uses old USART IP (SR/DR)
-static void uart_rx_isr(void) {
-  uint32_t sr = UART_DEV->SR;
+void USARTn_IRQHandler(void) {
+  uint32_t sr = USARTn->SR;
   if (sr & USART_SR_RXNE) {
-    uint8_t byte = (uint8_t) UART_DEV->DR;
+    uint8_t byte = (uint8_t) USARTn->DR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
   // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART3_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 //--------------------------------------------------------------------+
@@ -155,15 +164,12 @@ void board_init(void) {
   tud_configure(0, TUD_CFGID_DWC2, &cfg);
 #endif
 
-#ifdef UART_DEV
+#ifdef UART_ID
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
-                            : (UART_DEV == USART2) ? USART2_IRQn
-                                                   : USART3_IRQn;
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 }
 
@@ -181,7 +187,7 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
 #else
   (void) buf; (void) len;
@@ -190,7 +196,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index 8cee5f8c0..0864d0fad 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -33,6 +33,25 @@
 #include "common/tusb_fifo.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define USARTn_IRQn       USART3_IRQn
+    #define USARTn_IRQHandler USART3_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -64,9 +83,9 @@ void USBWakeUp_RMP_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate     = CFG_BOARD_UART_BAUDRATE,
     .WordLength   = UART_WORDLENGTH_8B,
@@ -83,26 +102,16 @@ static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
 // F3 uses new USART IP (ISR/RDR/TDR/ICR) — same as F7
-static void uart_rx_isr(void) {
-  uint32_t isr = UART_DEV->ISR;
+void USARTn_IRQHandler(void) {
+  uint32_t isr = USARTn->ISR;
   if (isr & USART_ISR_RXNE) {
-    uint8_t byte = (uint8_t) UART_DEV->RDR;
+    uint8_t byte = (uint8_t) USARTn->RDR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
   if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
-    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+    USARTn->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
   }
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART3_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 //--------------------------------------------------------------------+
@@ -154,15 +163,12 @@ void board_init(void) {
   // Enable USB clock
   __HAL_RCC_USB_CLK_ENABLE();
 
-#ifdef UART_DEV
+#ifdef UART_ID
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
-                            : (UART_DEV == USART2) ? USART2_IRQn
-                                                   : USART3_IRQn;
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 }
 
@@ -193,7 +199,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
 #else
   (void) buf; (void) len;
@@ -202,7 +208,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
index 2db42b98a..fa3233b46 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.h
@@ -36,7 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART3
+#define UART_ID               3
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -104,8 +104,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART3_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.h b/hw/bsp/stm32f4/boards/pyboardv11/board.h
index 319d2336a..0848fb27d 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/board.h
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.h
@@ -36,7 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -104,8 +104,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
index b69ebbeaf..931087c1a 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.h
@@ -37,7 +37,7 @@
 #endif
 
 // Enable PA2 as the debug log UART
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -105,8 +105,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
index ebefeb988..f6d4a71d3 100644
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.h
@@ -37,7 +37,7 @@
 #endif
 
 // Enable PA2 as the debug log UART
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -104,8 +104,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 
-  // Enable clocks for LED, Button, Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.h b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
index bcfa6059a..8f9a8a18d 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.h
@@ -38,7 +38,7 @@
 
 // Enable PA2 as the debug log UART
 // It is not routed to the ST/Link on the Discovery board.
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -112,8 +112,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 
-  // Enable clocks Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
index 0faf6fe11..a12f47938 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.h
@@ -36,7 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -104,8 +104,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.h b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
index 1a289dfb5..291589629 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.h
@@ -36,7 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -109,8 +109,6 @@ static inline void board_clock_init(void) {
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2);
 
-  // Enable clocks for UART
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.h b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
index 0689dfe87..b7192b185 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.h
@@ -37,7 +37,7 @@
 #endif
 
 // UART Enable PA2 as the debug log UART
-#define UART_DEV              USART2
+#define UART_ID               2
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -125,8 +125,6 @@ static inline void board_clock_init(void) {
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART2_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
index be58f8ae7..77616d707 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.h
@@ -37,7 +37,7 @@
 #endif
 
 // UART Enable for STLink VCOM
-#define UART_DEV              USART3
+#define UART_ID               3
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -126,8 +126,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_3);
 
-  // Enable clocks for Uart
-  __HAL_RCC_USART3_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
index b1633b395..973ab4b8a 100644
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.h
@@ -38,7 +38,7 @@
 
 
 // UART Enable for STLink VCOM
-#define UART_DEV              USART3
+#define UART_ID               3
 
 #define PINID_LED      0
 #define PINID_BUTTON   1
@@ -115,8 +115,6 @@ static inline void board_clock_init(void)
   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2;
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_5);
 
-  // Enable clocks Uart
-  __HAL_RCC_USART3_CLK_ENABLE();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index b8784d03c..f4ef99150 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -40,6 +40,30 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define USARTn_IRQn       USART3_IRQn
+    #define USARTn_IRQHandler USART3_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 6
+    #define USARTn            USART6
+    #define USARTn_IRQn       USART6_IRQn
+    #define USARTn_IRQHandler USART6_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART6_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -54,9 +78,9 @@ void OTG_HS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-    .Instance = UART_DEV,
+    .Instance = USARTn,
     .Init = {
       .BaudRate     = CFG_BOARD_UART_BAUDRATE,
       .WordLength   = UART_WORDLENGTH_8B,
@@ -73,24 +97,14 @@ static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
 // F4 uses old USART IP (SR/DR)
-static void uart_rx_isr(void) {
-  uint32_t sr = UART_DEV->SR;
+void USARTn_IRQHandler(void) {
+  uint32_t sr = USARTn->SR;
   if (sr & USART_SR_RXNE) {
-    uint8_t byte = (uint8_t) UART_DEV->DR;
+    uint8_t byte = (uint8_t) USARTn->DR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
   // Reading DR clears RXNE. OR is cleared by reading SR then DR (already done).
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART3_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 void board_init(void) {
@@ -136,15 +150,13 @@ void board_init(void) {
 
   board_led_write(false);
 
-#ifdef UART_DEV
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1) ? USART1_IRQn
-                            : (UART_DEV == USART2) ? USART2_IRQn
-                                                   : USART3_IRQn;
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 
   //------------- USB FS -------------//
@@ -260,7 +272,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int) tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t) len);
 #else
   (void) buf; (void) len;
@@ -269,7 +281,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
index 06adb79ad..88cef9f37 100644
--- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART6
-#define UART_CLK_EN           __HAL_RCC_USART6_CLK_ENABLE
+#define UART_ID               6
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -106,7 +105,6 @@ static inline void board_clock_init(void)
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.h b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
index ca9641c68..698a1a230 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART6
-#define UART_CLK_EN           __HAL_RCC_USART6_CLK_ENABLE
+#define UART_ID               6
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -121,7 +120,6 @@ static inline void board_clock_init(void) {
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.h b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
index f57ffb317..cf70d8959 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -112,7 +111,6 @@ static inline void board_clock_init(void)
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
index b039f5543..2d3a96dee 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -111,7 +110,6 @@ static inline void board_clock_init(void)
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
index b5b3841f1..bd0963649 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -113,7 +112,6 @@ static inline void board_clock_init(void)
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.h b/hw/bsp/stm32f7/boards/stm32f769disco/board.h
index 8ac520619..ccf43a46b 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.h
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
@@ -113,7 +112,6 @@ static inline void board_clock_init(void)
 
   HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7);
 
-  UART_CLK_EN();
 }
 
 static inline void board_vbus_set(uint8_t rhport, bool state) {
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index e29d3d5cd..078e372d8 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -42,12 +42,36 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define USARTn_IRQn       USART1_IRQn
+    #define USARTn_IRQHandler USART1_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define USARTn_IRQn       USART2_IRQn
+    #define USARTn_IRQHandler USART2_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define USARTn_IRQn       USART3_IRQn
+    #define USARTn_IRQHandler USART3_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 6
+    #define USARTn            USART6
+    #define USARTn_IRQn       USART6_IRQn
+    #define USARTn_IRQHandler USART6_IRQHandler
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART6_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-#ifdef UART_DEV
-static UART_HandleTypeDef UartHandle = {.Instance = UART_DEV,
+#ifdef UART_ID
+static UART_HandleTypeDef UartHandle = {.Instance = USARTn,
                                         .Init     = {
                                               .BaudRate     = CFG_BOARD_UART_BAUDRATE,
                                               .WordLength   = UART_WORDLENGTH_8B,
@@ -62,32 +86,16 @@ static UART_HandleTypeDef UartHandle = {.Instance = UART_DEV,
 static uint8_t   uart_rx_ff_buf[32];
 static tu_fifo_t uart_rx_ff;
 
-// Minimal UART RX ISR: direct register access, no HAL overhead
-static void uart_rx_isr(void) {
-  uint32_t isr = UART_DEV->ISR;
-  // Read data if available
+void USARTn_IRQHandler(void) {
+  uint32_t isr = USARTn->ISR;
   if (isr & USART_ISR_RXNE) {
-    uint8_t byte = (uint8_t)UART_DEV->RDR;
+    uint8_t byte = (uint8_t) USARTn->RDR;
     tu_fifo_write(&uart_rx_ff, &byte);
   }
-  // Clear error flags (OR, FE, NE, PE) via ICR
   if (isr & (USART_ISR_ORE | USART_ISR_FE | USART_ISR_NE | USART_ISR_PE)) {
-    UART_DEV->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
+    USARTn->ICR = USART_ICR_ORECF | USART_ICR_FECF | USART_ICR_NCF | USART_ICR_PECF;
   }
 }
-
-void USART1_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART2_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART3_IRQHandler(void) {
-  uart_rx_isr();
-}
-void USART6_IRQHandler(void) {
-  uart_rx_isr();
-}
 #endif
 
 //--------------------------------------------------------------------+
@@ -143,18 +151,13 @@ void board_init(void) {
   NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
-#ifdef UART_DEV
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
-  // Enable RXNE interrupt via direct register (not HAL_UART_Receive_IT)
-  UART_DEV->CR1 |= USART_CR1_RXNEIE;
-  const IRQn_Type uart_irqn = (UART_DEV == USART1)   ? USART1_IRQn
-                              : (UART_DEV == USART2) ? USART2_IRQn
-                              : (UART_DEV == USART3) ? USART3_IRQn
-                                                     : USART6_IRQn;
-  // Lowest priority: UART RX ISR only writes to tu_fifo, no FreeRTOS API calls
-  NVIC_SetPriority(uart_irqn, (1 << __NVIC_PRIO_BITS) - 1);
-  NVIC_EnableIRQ(uart_irqn);
+  USARTn->CR1 |= USART_CR1_RXNEIE;
+  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
+  NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 
   GPIO_InitTypeDef GPIO_InitStruct;
@@ -329,7 +332,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   return (int)tu_fifo_read_n(&uart_rx_ff, buf, (uint16_t)len);
 #else
   (void)buf;
@@ -339,7 +342,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(const void *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p     = (const uint8_t *)buf;
   int            count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
index 14d309da1..e02256034 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.h
@@ -52,8 +52,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART Enable for STLink VCOM
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF1_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index 6cdea3653..d0ff8bac2 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -33,6 +33,22 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 4
+    #define USARTn            USART4
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART4_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -43,7 +59,7 @@ void USB_UCPD1_2_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
 #endif
 
@@ -90,8 +106,8 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
 
   // UART
   GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
@@ -102,7 +118,7 @@ void board_init(void) {
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
   UartHandle = (UART_HandleTypeDef){
-    .Instance        = UART_DEV,
+    .Instance        = USARTn,
     .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
     .Init.WordLength = UART_WORDLENGTH_8B,
     .Init.StopBits   = UART_STOPBITS_1,
@@ -158,7 +174,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -176,7 +192,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
index d569783fc..1684454fa 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.h
@@ -51,8 +51,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART Enable for STLink VCOM
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 #define UART_GPIO_PORT        GPIOC
 #define UART_GPIO_AF          GPIO_AF7_USART3
 #define UART_TX_PIN           GPIO_PIN_10
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h
index cfef1c09f..10d27f1dd 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.h
@@ -51,8 +51,7 @@
 #define BUTTON_STATE_ACTIVE   1
 
 // UART Enable for STLink VCOM
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF12_LPUART1
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32g4/boards/stm32g491nucleo/board.h b/hw/bsp/stm32g4/boards/stm32g491nucleo/board.h
index be3d44645..f4c333621 100644
--- a/hw/bsp/stm32g4/boards/stm32g491nucleo/board.h
+++ b/hw/bsp/stm32g4/boards/stm32g491nucleo/board.h
@@ -51,8 +51,7 @@
 #define BUTTON_STATE_ACTIVE   1
 
 // UART Enable for STLink VCOM
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF12_LPUART1
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index b6968b8bd..98739ffd5 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -34,6 +34,22 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 11
+    #define USARTn            LPUART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_LPUART1_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -57,7 +73,7 @@ void UCPD1_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
 #endif
 
@@ -106,8 +122,8 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
 
   // UART
   memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
@@ -119,7 +135,7 @@ void board_init(void) {
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
   UartHandle = (UART_HandleTypeDef){
-    .Instance        = UART_DEV,
+    .Instance        = USARTn,
     .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
     .Init.WordLength = UART_WORDLENGTH_8B,
     .Init.StopBits   = UART_STOPBITS_1,
@@ -188,7 +204,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -206,7 +222,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 6ee9a7e2b..234a089eb 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -54,6 +54,19 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -64,9 +77,9 @@ void USB_DRD_FS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
     .WordLength = UART_WORDLENGTH_8B,
@@ -117,8 +130,8 @@ void board_init(void) {
     HAL_GPIO_Init(board_pindef[i].port, &board_pindef[i].pin_init);
   }
 
-  #ifdef UART_DEV
-  UART_CLK_EN();
+  #ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   HAL_UARTEx_EnableFifoMode(&UartHandle);
   #endif
@@ -184,7 +197,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -202,7 +215,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.h b/hw/bsp/stm32h7/boards/daisyseed/board.h
index 300ecb8b2..d615dab6d 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.h
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.h
@@ -37,8 +37,7 @@
 #endif
 
 // UART
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
index f623149bd..937ec5e9a 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
index e17ddb41a..1d9ced3f1 100644
--- a/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743_weact/board.h
@@ -37,8 +37,7 @@ extern "C" {
 #endif
 
 // UART
-#define UART_DEV    USART3
-#define UART_CLK_EN __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID     3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE 0
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.h b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
index ea91976c8..cd1521911 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.h
@@ -39,8 +39,7 @@
 #include "mfxstm32l152.h"
 
 // Need to change jumper setting J7 and J8 from RS-232 to STLink
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
index 0277d05c7..c6b209665 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.h
@@ -36,8 +36,7 @@
  extern "C" {
 #endif
 
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.h b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
index ebdd5a17a..0536274b0 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.h
@@ -37,8 +37,7 @@
 #endif
 
 // UART
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.h b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
index 1793338f8..204eb8bc4 100644
--- a/hw/bsp/stm32h7/boards/stm32h747disco/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.h
@@ -37,8 +37,7 @@
 #endif
 
 // UART
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h750_weact/board.h b/hw/bsp/stm32h7/boards/stm32h750_weact/board.h
index e11a55103..dadcd6e86 100644
--- a/hw/bsp/stm32h7/boards/stm32h750_weact/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h750_weact/board.h
@@ -37,8 +37,7 @@
 #endif
 
 // UART
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/stm32h750bdk/board.h b/hw/bsp/stm32h7/boards/stm32h750bdk/board.h
index ac417601b..6955592ee 100644
--- a/hw/bsp/stm32h7/boards/stm32h750bdk/board.h
+++ b/hw/bsp/stm32h7/boards/stm32h750bdk/board.h
@@ -37,8 +37,7 @@
 #endif
 
 // UART
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
index bfaf42784..96f035919 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.h
@@ -76,8 +76,7 @@
 #endif
 
 // Need to change jumper setting J7 and J8 from RS-232 to STLink
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     1
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index c60706b99..b32f73754 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -44,13 +44,29 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 6
+    #define USARTn            USART6
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART6_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
     .WordLength = UART_WORDLENGTH_8B,
@@ -147,8 +163,8 @@ void board_init(void) {
 
   GPIO_InitTypeDef GPIO_InitStruct;
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
@@ -276,7 +292,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   // clear overrun error if any
   if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_ORE)) {
@@ -298,7 +314,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
index 4b8564709..b1446414e 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
@@ -40,8 +40,7 @@
 #include "stm32h7rsxx_ll_exti.h"
 #include "stm32h7rsxx_ll_system.h"
 
-#define UART_DEV              USART3
-#define UART_CLK_EN           __HAL_RCC_USART3_CLK_ENABLE
+#define UART_ID               3
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE     0
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index d84c9d5f8..7ae9e5532 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -44,13 +44,26 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
     .WordLength = UART_WORDLENGTH_8B,
@@ -317,8 +330,8 @@ void board_init(void) {
 
 
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
@@ -445,7 +458,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -463,7 +476,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
index 50bbafadb..162c62abb 100644
--- a/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
+++ b/hw/bsp/stm32l0/boards/stm32l052dap52/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF4_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 7fd076dbd..2a32ba9f5 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -32,6 +32,16 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 4
+    #define USARTn            USART4
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART4_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -42,7 +52,7 @@ void USB_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
 #endif
 
@@ -84,9 +94,9 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
+#ifdef UART_ID
   // Enable UART Clock
-  UART_CLK_EN();
+  UARTn_CLK_ENABLE();
 
   GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
@@ -95,7 +105,7 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance        = UART_DEV;
+  UartHandle.Instance        = USARTn;
   UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
   UartHandle.Init.StopBits   = UART_STOPBITS_1;
@@ -151,7 +161,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
   return len;
 #else
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
index 980e1e321..a5250eda9 100644
--- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.h
@@ -45,8 +45,7 @@
 #define BUTTON_PIN            GPIO_PIN_0
 #define BUTTON_STATE_ACTIVE   1
 
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF8_LPUART1
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.h b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
index cf84d3e66..eb0c67915 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.h
@@ -44,8 +44,7 @@
 #define BUTTON_PIN            GPIO_PIN_0
 #define BUTTON_STATE_ACTIVE   1
 
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOD
 #define UART_GPIO_AF          GPIO_AF7_USART2
 #define UART_TX_PIN           GPIO_PIN_5
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
index 3b031e00f..d22cc969c 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.h
@@ -45,8 +45,7 @@
 #define BUTTON_PIN            GPIO_PIN_13
 #define BUTTON_STATE_ACTIVE   1
 
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOG
 #define UART_GPIO_AF          GPIO_AF8_LPUART1
 #define UART_TX_PIN           GPIO_PIN_7
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
index 94978638e..b0823b08b 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.h
@@ -44,8 +44,7 @@
 #define BUTTON_PIN            GPIO_PIN_13
 #define BUTTON_STATE_ACTIVE   1
 
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOG
 #define UART_GPIO_AF          GPIO_AF8_LPUART1
 #define UART_TX_PIN           GPIO_PIN_7
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
index f603ae855..306ac8c4d 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.h
@@ -44,8 +44,7 @@
 #define BUTTON_PIN            GPIO_PIN_13
 #define BUTTON_STATE_ACTIVE   1
 
-#define UART_DEV              LPUART1
-#define UART_CLK_EN           __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID               11
 #define UART_GPIO_PORT        GPIOG
 #define UART_GPIO_AF          GPIO_AF8_LPUART1
 #define UART_TX_PIN           GPIO_PIN_7
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 1a5c59fdc..7a8acb3de 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -34,6 +34,16 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 11
+    #define USARTn            LPUART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_LPUART1_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -50,7 +60,9 @@ void USB_IRQHandler(void)
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
+#endif
 
 void board_init(void) {
   board_clock_init();
@@ -72,7 +84,9 @@ void board_init(void) {
   __HAL_RCC_GPIOG_CLK_ENABLE();
 #endif
   __HAL_RCC_GPIOH_CLK_ENABLE();
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
+#endif
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
   // 1ms tick timer
@@ -121,6 +135,7 @@ void board_init(void) {
   HAL_PWREx_EnableVddIO2();
 #endif
 
+#ifdef UART_ID
   // Uart
   GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
@@ -128,7 +143,7 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance        = UART_DEV;
+  UartHandle.Instance        = USARTn;
   UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
   UartHandle.Init.StopBits   = UART_STOPBITS_1;
@@ -141,8 +156,9 @@ void board_init(void) {
   UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
 
   HAL_UART_Init(&UartHandle);
-#if defined(USART_CR1_FIFOEN)
+  #if defined(USART_CR1_FIFOEN)
   HAL_UARTEx_EnableFifoMode(&UartHandle);
+  #endif
 #endif
 
   /* Configure USB FS GPIOs */
@@ -216,7 +232,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -234,7 +250,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
index 8c2ec66dc..4d162bbca 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
@@ -41,8 +41,7 @@ extern "C" {
 #include "stm32n6xx_ll_system.h"
 #include "tcpp0203.h"
 
-#define UART_DEV USART1
-#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID  1
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE 0
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
index 5bdbaff3c..c26367af6 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
@@ -41,8 +41,7 @@ extern "C" {
 #include "stm32n6xx_ll_system.h"
 #include "tcpp0203.h"
 
-#define UART_DEV USART1
-#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID  1
 
 // VBUS Sense detection
 #define OTG_FS_VBUS_SENSE 0
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 267da746e..95578af04 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -58,13 +58,26 @@ typedef struct {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
-#ifdef UART_DEV
+#ifdef UART_ID
 static UART_HandleTypeDef UartHandle = {
-  .Instance = UART_DEV,
+  .Instance = USARTn,
   .Init = {
     .BaudRate = CFG_BOARD_UART_BAUDRATE,
     .WordLength = UART_WORDLENGTH_8B,
@@ -154,8 +167,8 @@ void board_init(void) {
 
 
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
   HAL_UART_Init(&UartHandle);
   HAL_UARTEx_EnableFifoMode(&UartHandle);
 #endif
@@ -343,7 +356,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -361,7 +374,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32u0/boards/stm32u083cdk/board.h b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
index 278d9b695..28f9fa285 100644
--- a/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
+++ b/hw/bsp/stm32u0/boards/stm32u083cdk/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   0  // Active low (pressed = 0)
 
 // UART - using USART2 on PA2/PA3 (VCP TX/RX from CubeMX)
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF7_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
index 23fddbef9..e2177cbc8 100644
--- a/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
+++ b/hw/bsp/stm32u0/boards/stm32u083nucleo/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART: USART2 on PA2/PA3 (VCP via ST-Link)
-#define UART_DEV              USART2
-#define UART_CLK_EN           __HAL_RCC_USART2_CLK_ENABLE
+#define UART_ID               2
 #define UART_GPIO_PORT        GPIOA
 #define UART_GPIO_AF          GPIO_AF7_USART2
 #define UART_TX_PIN           GPIO_PIN_2
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index 4acbb3437..5cf6e1eb2 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -35,6 +35,19 @@ TU_ATTR_UNUSED static void Error_Handler(void) { }
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -45,7 +58,7 @@ void USB_DRD_FS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
 #endif
 
@@ -96,7 +109,7 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
+#ifdef UART_ID
   // UART
   GPIO_InitStruct.Pin       = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
@@ -105,8 +118,8 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UART_CLK_EN();
-  UartHandle.Instance        = UART_DEV;
+  UARTn_CLK_ENABLE();
+  UartHandle.Instance        = USARTn;
   UartHandle.Init.BaudRate   = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
   UartHandle.Init.StopBits   = UART_STOPBITS_1;
@@ -154,7 +167,7 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -172,7 +185,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h b/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
index c99743738..f775f3669 100644
--- a/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
+++ b/hw/bsp/stm32u5/boards/b_u585i_iot2a/board.h
@@ -48,8 +48,7 @@ extern "C"
 #define BUTTON_STATE_ACTIVE 1
 
 // UART Enable for STLink VCOM
-#define UART_DEV USART1
-#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID  1
 #define UART_GPIO_PORT GPIOA
 #define UART_GPIO_AF GPIO_AF7_USART1
 #define UART_TX_PIN GPIO_PIN_9
diff --git a/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
index eb2b63721..80e2e4b21 100644
--- a/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u545nucleo/board.h
@@ -48,8 +48,7 @@ extern "C"
 #define BUTTON_STATE_ACTIVE 1
 
 // UART Enable for STLink VCOM
-#define UART_DEV LPUART1
-#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID  11
 #define UART_GPIO_PORT GPIOA
 #define UART_GPIO_AF GPIO_AF8_LPUART1
 #define UART_TX_PIN GPIO_PIN_2
diff --git a/hw/bsp/stm32u5/boards/stm32u575eval/board.h b/hw/bsp/stm32u5/boards/stm32u575eval/board.h
index cce3e38b3..ec941a6c5 100644
--- a/hw/bsp/stm32u5/boards/stm32u575eval/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u575eval/board.h
@@ -49,8 +49,7 @@ extern "C"
 #define BUTTON_STATE_ACTIVE 1
 
 // UART Enable for STLink VCOM
-#define UART_DEV USART1
-#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID  1
 #define UART_GPIO_PORT GPIOA
 #define UART_GPIO_AF GPIO_AF7_USART1
 #define UART_TX_PIN GPIO_PIN_9
diff --git a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
index b6b60f021..6f2f7596b 100644
--- a/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u575nucleo/board.h
@@ -50,8 +50,7 @@ extern "C"
 #define BUTTON_STATE_ACTIVE 1
 
 // UART Enable for STLink VCOM
-#define UART_DEV LPUART1
-#define UART_CLK_EN __HAL_RCC_LPUART1_CLK_ENABLE
+#define UART_ID  11
 #define UART_GPIO_PORT GPIOG
 #define UART_GPIO_AF GPIO_AF8_LPUART1
 #define UART_TX_PIN GPIO_PIN_7
diff --git a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
index 15106aee6..48a9ae9fb 100644
--- a/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
+++ b/hw/bsp/stm32u5/boards/stm32u5a5nucleo/board.h
@@ -50,8 +50,7 @@ extern "C"
 #define BUTTON_STATE_ACTIVE 1
 
 // UART Enable for STLink VCOM
-#define UART_DEV USART1
-#define UART_CLK_EN __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID  1
 #define UART_GPIO_PORT GPIOA
 #define UART_GPIO_AF GPIO_AF7_USART1
 #define UART_TX_PIN GPIO_PIN_9
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 27e84beb0..41e354351 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -48,6 +48,22 @@ TU_ATTR_UNUSED static void Error_Handler(void) {
 
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #elif UART_ID == 3
+    #define USARTn            USART3
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART3_CLK_ENABLE
+  #elif UART_ID == 11
+    #define USARTn            LPUART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_LPUART1_CLK_ENABLE
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -70,7 +86,9 @@ void OTG_HS_IRQHandler(void) {
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
 
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
+#endif
 
 void board_init(void) {
   // Init clock, implemented in board.h
@@ -89,8 +107,6 @@ void board_init(void) {
   __HAL_RCC_GPIOG_CLK_ENABLE();
   __HAL_RCC_GPIOH_CLK_ENABLE();
 
-  UART_CLK_EN();
-
   /* Enable Instruction cache */
   HAL_ICACHE_Enable();
 
@@ -119,6 +135,7 @@ void board_init(void) {
   // IOSV bit MUST be set to access GPIO port G[2:15] */
   HAL_PWREx_EnableVddIO2();
 
+#ifdef UART_ID
   // Uart
   GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
   GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
@@ -127,7 +144,8 @@ void board_init(void) {
   GPIO_InitStruct.Alternate = UART_GPIO_AF;
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
-  UartHandle.Instance = UART_DEV;
+  UARTn_CLK_ENABLE();
+  UartHandle.Instance = USARTn;
   UartHandle.Init.BaudRate = CFG_BOARD_UART_BAUDRATE;
   UartHandle.Init.WordLength = UART_WORDLENGTH_8B;
   UartHandle.Init.StopBits = UART_STOPBITS_1;
@@ -140,6 +158,7 @@ void board_init(void) {
   UartHandle.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT;
   HAL_UART_Init(&UartHandle);
   HAL_UARTEx_EnableFifoMode(&UartHandle);
+#endif
 
   /* Configure USB GPIOs */
   /* Configure DM DP Pins */
@@ -253,7 +272,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -271,7 +290,7 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
diff --git a/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h b/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h
index 704592506..3829828e8 100644
--- a/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h
+++ b/hw/bsp/stm32wb/boards/stm32wb55nucleo/board.h
@@ -47,8 +47,7 @@
 #define BUTTON_STATE_ACTIVE   0
 
 // UART Enable for STLink VCOM
-#define UART_DEV              USART1
-#define UART_CLK_EN           __HAL_RCC_USART1_CLK_ENABLE
+#define UART_ID               1
 #define UART_GPIO_PORT        GPIOB
 #define UART_GPIO_AF          GPIO_AF7_USART1
 #define UART_TX_PIN           GPIO_PIN_6
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index 0fdc5ca7d..d97be2115 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -32,6 +32,18 @@
 #include "bsp/board_api.h"
 #include "board.h"
 
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define USARTn            USART1
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART1_CLK_ENABLE
+  #elif UART_ID == 2
+    #define USARTn            USART2
+    #define UARTn_CLK_ENABLE  __HAL_RCC_USART2_CLK_ENABLE
+  #else
+    #error "UART_ID not supported"
+  #endif
+#endif
+
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -46,7 +58,7 @@ void USB_LP_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_DEV
+#ifdef UART_ID
 UART_HandleTypeDef UartHandle;
 #endif
 
@@ -101,8 +113,8 @@ void board_init(void) {
   GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
   HAL_GPIO_Init(BUTTON_PORT, &GPIO_InitStruct);
 
-#ifdef UART_DEV
-  UART_CLK_EN();
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
 
   // UART
   GPIO_InitStruct.Pin = UART_TX_PIN | UART_RX_PIN;
@@ -113,7 +125,7 @@ void board_init(void) {
   HAL_GPIO_Init(UART_GPIO_PORT, &GPIO_InitStruct);
 
   UartHandle = (UART_HandleTypeDef) {
-      .Instance        = UART_DEV,
+      .Instance        = USARTn,
       .Init.BaudRate   = CFG_BOARD_UART_BAUDRATE,
       .Init.WordLength = UART_WORDLENGTH_8B,
       .Init.StopBits   = UART_STOPBITS_1,
@@ -152,7 +164,7 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   int count = 0;
   while (count < len) {
     if (__HAL_UART_GET_FLAG(&UartHandle, UART_FLAG_RXNE)) {
@@ -170,7 +182,7 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-#ifdef UART_DEV
+#ifdef UART_ID
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
-- 
cgit v1.3.1


From e01f1538b74cf3fa535e7d7f4924905b3cd35b1f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 3 Apr 2026 22:01:21 +0700
Subject: fix rp2040 uart read/write non-blocking

---
 hw/bsp/rp2040/family.c | 10 ++++++----
 1 file changed, 6 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index c952de03b..b5a1375a2 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -273,11 +273,13 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  char const *bufch = (char const *) buf;
-  for ( int i = 0; i < len; i++ ) {
-    uart_putc(uart_inst, bufch[i]);
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len && uart_is_writable(uart_inst)) {
+    uart_putc_raw(uart_inst, p[count]);
+    count++;
   }
-  return len;
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
-- 
cgit v1.3.1


From 3c6c87479be6a9fdd04240b8bb1267ef80b1a0e8 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 4 Apr 2026 13:20:58 +0700
Subject: implement board_uart_read()/write() as non-blocking for all families

---
 hw/bsp/at32f402_405/family.c                       | 24 ++++++--------
 hw/bsp/at32f403a_407/family.c                      | 21 ++++++------
 hw/bsp/at32f413/family.c                           | 21 ++++++------
 hw/bsp/at32f415/family.c                           | 21 ++++++------
 hw/bsp/at32f423/family.c                           | 21 ++++++------
 hw/bsp/at32f425/family.c                           | 21 ++++++------
 hw/bsp/at32f435_437/family.c                       | 21 ++++++------
 hw/bsp/at32f45x/family.c                           | 21 ++++++------
 hw/bsp/broadcom_32bit/family.c                     | 16 ++++-----
 hw/bsp/broadcom_64bit/family.c                     | 16 ++++-----
 hw/bsp/ch32f20x/family.c                           |  8 ++---
 hw/bsp/ch32v10x/family.c                           | 16 +++++----
 hw/bsp/ch32v20x/family.c                           | 17 ++++++----
 hw/bsp/ch32v30x/family.c                           |  8 ++---
 hw/bsp/f1c100s/family.c                            | 18 +++++++---
 hw/bsp/fomu/family.c                               | 12 ++++---
 hw/bsp/ft9xx/family.c                              | 21 +++++++-----
 hw/bsp/gd32vf103/family.c                          | 15 ++++++---
 hw/bsp/kinetis_k/family.c                          | 18 +++++++---
 hw/bsp/kinetis_k32l/family.c                       | 38 ++++++++++++----------
 hw/bsp/kinetis_kl/family.c                         | 25 +++++++++++---
 hw/bsp/lpc15/family.c                              | 12 ++++++-
 hw/bsp/lpc18/family.c                              | 14 +++++---
 hw/bsp/lpc43/family.c                              | 14 +++++---
 hw/bsp/lpc54/family.c                              | 17 +++++++++-
 hw/bsp/lpc55/family.c                              | 19 +++++++++--
 hw/bsp/maxim/family.c                              | 16 +++++----
 hw/bsp/mcx/family.c                                | 13 ++++++--
 hw/bsp/mm32/family.c                               | 17 ++++++----
 hw/bsp/msp430/family.c                             | 18 +++++-----
 hw/bsp/msp432e4/family.c                           | 13 +++++---
 hw/bsp/rw61x/family.c                              | 13 ++++++--
 .../samd5x_e5x/boards/metro_m4_express/board.cmake |  2 ++
 hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk |  2 ++
 hw/bsp/samg/family.c                               | 13 +++++---
 hw/bsp/stm32l0/family.c                            | 13 ++++++--
 hw/bsp/tm4c/family.c                               | 15 +++++----
 hw/bsp/xmc4000/family.c                            | 22 ++++++++++---
 test/hil/tinyusb.json                              |  7 ++--
 39 files changed, 397 insertions(+), 242 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index b7dbcbd98..56d4a7bea 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -205,22 +205,18 @@ int board_uart_read(uint8_t *buf, int len) {
 int board_uart_write(void const *buf, int len)
 {
   #if CFG_TUSB_OS == OPT_OS_NONE
-    int txsize = len;
-    u16 timeout = 0xffff;
-    while (txsize--)
-    {
-      while(usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET)
-      {
-        timeout--;
-        if(timeout == 0)
-        {
-          return 0;
-        }
+    uint8_t const *p = (uint8_t const *) buf;
+    int count = 0;
+    while (count < len) {
+      if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+        PRINT_UART->dt = (*p & 0x01FF);
+        p++;
+        count++;
+      } else {
+        break;
       }
-      PRINT_UART->dt = (*((uint8_t const *)buf) & 0x01FF);
-      buf++;
     }
-    return len;
+    return count;
   #else
     (void) buf;
     (void) len;
diff --git a/hw/bsp/at32f403a_407/family.c b/hw/bsp/at32f403a_407/family.c
index d4a7e446d..942e15872 100644
--- a/hw/bsp/at32f403a_407/family.c
+++ b/hw/bsp/at32f403a_407/family.c
@@ -223,19 +223,18 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f413/family.c b/hw/bsp/at32f413/family.c
index adf29e097..d9af0ae4d 100644
--- a/hw/bsp/at32f413/family.c
+++ b/hw/bsp/at32f413/family.c
@@ -223,19 +223,18 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f415/family.c b/hw/bsp/at32f415/family.c
index b592bf6c5..ca205d480 100644
--- a/hw/bsp/at32f415/family.c
+++ b/hw/bsp/at32f415/family.c
@@ -197,19 +197,18 @@ int board_uart_read(uint8_t *buf, int len) {
 // Send characters to UART. Return number of sent bytes
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f423/family.c b/hw/bsp/at32f423/family.c
index 71cb559dc..9f13dba07 100644
--- a/hw/bsp/at32f423/family.c
+++ b/hw/bsp/at32f423/family.c
@@ -224,19 +224,18 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f425/family.c b/hw/bsp/at32f425/family.c
index 7f443509e..1629ad7c0 100644
--- a/hw/bsp/at32f425/family.c
+++ b/hw/bsp/at32f425/family.c
@@ -205,19 +205,18 @@ int board_uart_read(uint8_t *buf, int len) {
 // Send characters to UART. Return number of sent bytes
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c
index 6c6bc4d72..59a4fe120 100644
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -250,19 +250,18 @@ int board_uart_read(uint8_t *buf, int len) {
 // Send characters to UART. Return number of sent bytes
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  u16 timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
index fa0c1139f..27eae861f 100644
--- a/hw/bsp/at32f45x/family.c
+++ b/hw/bsp/at32f45x/family.c
@@ -201,19 +201,18 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #if CFG_TUSB_OS == OPT_OS_NONE
-  int txsize = len;
-  uint16_t timeout = 0xffff;
-  while (txsize--) {
-    while (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) == RESET) {
-      timeout--;
-      if (timeout == 0) {
-        return 0;
-      }
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(PRINT_UART, USART_TDBE_FLAG) != RESET) {
+      PRINT_UART->dt = (*p & 0x01FF);
+      p++;
+      count++;
+    } else {
+      break;
     }
-    PRINT_UART->dt = (*((uint8_t const *) buf) & 0x01FF);
-    buf++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/broadcom_32bit/family.c b/hw/bsp/broadcom_32bit/family.c
index 399397bb4..1c7f6c7a5 100644
--- a/hw/bsp/broadcom_32bit/family.c
+++ b/hw/bsp/broadcom_32bit/family.c
@@ -125,16 +125,16 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  for (int i = 0; i < len; i++) {
-    const char* cbuf = buf;
-    while (!UART1->STAT_b.TX_READY) {}
-    if (cbuf[i] == '\n') {
-      UART1->IO = '\r';
-      while (!UART1->STAT_b.TX_READY) {}
+  const uint8_t* p = (const uint8_t*) buf;
+  int count = 0;
+  while (count < len) {
+    if (!UART1->STAT_b.TX_READY) {
+      break;
     }
-    UART1->IO = cbuf[i];
+    UART1->IO = p[count];
+    count++;
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/broadcom_64bit/family.c b/hw/bsp/broadcom_64bit/family.c
index 399397bb4..1c7f6c7a5 100644
--- a/hw/bsp/broadcom_64bit/family.c
+++ b/hw/bsp/broadcom_64bit/family.c
@@ -125,16 +125,16 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  for (int i = 0; i < len; i++) {
-    const char* cbuf = buf;
-    while (!UART1->STAT_b.TX_READY) {}
-    if (cbuf[i] == '\n') {
-      UART1->IO = '\r';
-      while (!UART1->STAT_b.TX_READY) {}
+  const uint8_t* p = (const uint8_t*) buf;
+  int count = 0;
+  while (count < len) {
+    if (!UART1->STAT_b.TX_READY) {
+      break;
     }
-    UART1->IO = cbuf[i];
+    UART1->IO = p[count];
+    count++;
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/ch32f20x/family.c b/hw/bsp/ch32f20x/family.c
index dd84b7c77..ab6a6007a 100644
--- a/hw/bsp/ch32f20x/family.c
+++ b/hw/bsp/ch32f20x/family.c
@@ -136,11 +136,9 @@ int board_uart_read(uint8_t *buf, int len)
 
 int board_uart_write(void const *buf, int len)
 {
-  int txsize = len;
-  while ( txsize-- )
-  {
-    uart_write(*(uint8_t const*) buf);
-    buf++;
+  uint8_t const *p = (uint8_t const *) buf;
+  for (int i = 0; i < len; i++) {
+    uart_write(p[i]);
   }
   return len;
 }
diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 344dcaf0b..72dae7086 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -143,11 +143,15 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-  const char *bufc = (const char *) buf;
-  for (int i = 0; i < len; i++) {
-    while (USART_GetFlagStatus(USART1, USART_FLAG_TC) == RESET);
-    USART_SendData(USART1, *bufc++);
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (USART_GetFlagStatus(USART1, USART_FLAG_TC) != RESET) {
+      USART_SendData(USART1, p[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-
-  return len;
+  return count;
 }
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index 4c22450f9..221f62107 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -207,14 +207,19 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
 #ifdef UART_DEV
-  const char *bufc = (const char *) buf;
-  for (int i = 0; i < len; i++) {
-    while (USART_GetFlagStatus(UART_DEV, USART_FLAG_TC) == RESET);
-    USART_SendData(UART_DEV, *bufc++);
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (USART_GetFlagStatus(UART_DEV, USART_FLAG_TC) != RESET) {
+      USART_SendData(UART_DEV, p[count]);
+      count++;
+    } else {
+      break;
+    }
   }
+  return count;
 #else
   (void) buf; (void) len;
+  return 0;
 #endif
-
-  return len;
 }
diff --git a/hw/bsp/ch32v30x/family.c b/hw/bsp/ch32v30x/family.c
index 6295f7723..aee4e7d4f 100644
--- a/hw/bsp/ch32v30x/family.c
+++ b/hw/bsp/ch32v30x/family.c
@@ -173,12 +173,10 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  int txsize = len;
-  const char* bufc = (const char*) buf;
-  while (txsize--) {
-    uart_write(*bufc++);
+  uint8_t const *p = (uint8_t const *) buf;
+  for (int i = 0; i < len; i++) {
+    uart_write(p[i]);
   }
-  uart_sync();
   return len;
 }
 
diff --git a/hw/bsp/f1c100s/family.c b/hw/bsp/f1c100s/family.c
index 1e71333d4..e221217ef 100644
--- a/hw/bsp/f1c100s/family.c
+++ b/hw/bsp/f1c100s/family.c
@@ -68,12 +68,20 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  int txsize = len;
-  while (txsize--) {
-    sys_uart_putc(*(uint8_t const*) buf);
-    buf++;
+  // UART0 base = 0x01c25000, USR register at +0x7c, bit 1 = TFNF (TX FIFO not full)
+  volatile uint32_t *uart_usr = (volatile uint32_t *) (0x01c25000 + 0x7c);
+  volatile uint32_t *uart_thr = (volatile uint32_t *) (0x01c25000 + 0x00);
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (*uart_usr & (1 << 1)) {
+      *uart_thr = p[count];
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/fomu/family.c b/hw/bsp/fomu/family.c
index cf04a1f6f..d3ad7a738 100644
--- a/hw/bsp/fomu/family.c
+++ b/hw/bsp/fomu/family.c
@@ -104,16 +104,18 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-  int32_t offset = 0;
   uint8_t const* buf8 = (uint8_t const*) buf;
-  for (offset = 0; offset < len; offset++)
+  int count = 0;
+  while (count < len)
   {
-    if (!(messible_status_read() & CSR_MESSIBLE_STATUS_FULL_OFFSET))
+    if (messible_status_read() & CSR_MESSIBLE_STATUS_FULL_OFFSET)
     {
-      messible_in_write(buf8[offset]);
+      break;
     }
+    messible_in_write(buf8[count]);
+    count++;
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/ft9xx/family.c b/hw/bsp/ft9xx/family.c
index ff24cfe89..5ee134eb0 100644
--- a/hw/bsp/ft9xx/family.c
+++ b/hw/bsp/ft9xx/family.c
@@ -221,16 +221,21 @@ int board_uart_read(uint8_t *buf, int len)
 // Send characters to UART
 int board_uart_write(void const *buf, int len)
 {
-    int r = 0;
-
+    int count = 0;
 #ifdef BOARD_UART
-#pragma GCC diagnostic push
-#pragma GCC diagnostic ignored "-Wcast-qual" // uart_writen does not have const for buffer parameter.
-    r = uart_writen(BOARD_UART, (uint8_t *)((const void *)buf), len);
-#pragma GCC diagnostic pop
+    uint8_t const *p = (uint8_t const *) buf;
+    while (count < len) {
+        if (BOARD_UART->LSR_ICR_XON2 & MASK_UART_LSR_THRE) {
+            BOARD_UART->RHR_THR_DLL = p[count];
+            count++;
+        } else {
+            break;
+        }
+    }
+#else
+    (void) buf; (void) len;
 #endif
-
-    return r;
+    return count;
 }
 
 // Get current milliseconds
diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c
index 4c1099317..c1dc82bda 100644
--- a/hw/bsp/gd32vf103/family.c
+++ b/hw/bsp/gd32vf103/family.c
@@ -160,12 +160,17 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
 #if defined(UART_DEV)
-  int txsize = len;
-  while (txsize--) {
-    usart_write(UART_DEV, *(uint8_t const*)buf);
-    buf++;
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (usart_flag_get(UART_DEV, USART_FLAG_TBE) != RESET) {
+      usart_data_transmit(UART_DEV, p[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
 #else
   (void)buf;
   (void)len;
diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c
index 1505defe0..8efab2762 100644
--- a/hw/bsp/kinetis_k/family.c
+++ b/hw/bsp/kinetis_k/family.c
@@ -125,13 +125,21 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-  (void) buf;
-  (void) len;
-
 #ifdef UART_DEV
-  UART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_DEV->S1 & UART_S1_TDRE_MASK) {
+      UART_DEV->D = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
+  (void) buf;
+  (void) len;
   return 0;
 #endif
 }
diff --git a/hw/bsp/kinetis_k32l/family.c b/hw/bsp/kinetis_k32l/family.c
index ec8dc6ecf..a3bd92cec 100644
--- a/hw/bsp/kinetis_k32l/family.c
+++ b/hw/bsp/kinetis_k32l/family.c
@@ -117,28 +117,30 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-#if 0 /*
-	Use this version if want the LED to blink during BOARD=board_test,
-	without having to hit a key.
-      */
-  if( 0U != (kLPUART_RxDataRegFullFlag & LPUART_GetStatusFlags( UART_PORT )) )
-    {
-      LPUART_ReadBlocking(UART_PORT, buf, len);
-      return len;
+  int count = 0;
+  while (count < len) {
+    if (UART_PORT->STAT & LPUART_STAT_RDRF_MASK) {
+      buf[count] = (uint8_t) UART_PORT->DATA;
+      count++;
+    } else {
+      break;
     }
-
-  return( 0 );
-#else /* Wait for 'len' characters to come in */
-
-  LPUART_ReadBlocking(UART_PORT, buf, len);
-  return len;
-
-#endif
+  }
+  return count;
 }
 
 int board_uart_write(void const* buf, int len) {
-  LPUART_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_PORT->STAT & LPUART_STAT_TDRE_MASK) {
+      UART_PORT->DATA = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/kinetis_kl/family.c b/hw/bsp/kinetis_kl/family.c
index f89434d06..b378b6821 100644
--- a/hw/bsp/kinetis_kl/family.c
+++ b/hw/bsp/kinetis_kl/family.c
@@ -125,14 +125,31 @@ uint32_t board_button_read(void)
 
 int board_uart_read(uint8_t* buf, int len)
 {
-  LPSCI_ReadBlocking(UART_PORT, buf, len);
-  return len;
+  int count = 0;
+  while (count < len) {
+    if (UART_PORT->S1 & UART0_S1_RDRF_MASK) {
+      buf[count] = UART_PORT->D;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 int board_uart_write(void const * buf, int len)
 {
-  LPSCI_WriteBlocking(UART_PORT, (uint8_t const*) buf, len);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_PORT->S1 & UART0_S1_TDRE_MASK) {
+      UART_PORT->D = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc15/family.c b/hw/bsp/lpc15/family.c
index 0d092d3a9..bbfee1b51 100644
--- a/hw/bsp/lpc15/family.c
+++ b/hw/bsp/lpc15/family.c
@@ -130,7 +130,17 @@ int board_uart_read(uint8_t* buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-  return Chip_UART_SendBlocking(UART_PORT, buf, len);
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (Chip_UART_GetStatus(UART_PORT) & UART_STAT_TXRDY) {
+      Chip_UART_SendByte(UART_PORT, p[count]);
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc18/family.c b/hw/bsp/lpc18/family.c
index 2043cef99..8a612d9d8 100644
--- a/hw/bsp/lpc18/family.c
+++ b/hw/bsp/lpc18/family.c
@@ -128,12 +128,16 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
   uint8_t const *buf8 = (uint8_t const *) buf;
-  for (int i = 0; i < len; i++) {
-    while ((Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0) {}
-    Chip_UART_SendByte(UART_DEV, buf8[i]);
+  int count = 0;
+  while (count < len) {
+    if (Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) {
+      Chip_UART_SendByte(UART_DEV, buf8[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc43/family.c b/hw/bsp/lpc43/family.c
index 56834a1b0..5aff49704 100644
--- a/hw/bsp/lpc43/family.c
+++ b/hw/bsp/lpc43/family.c
@@ -244,12 +244,16 @@ int board_uart_read(uint8_t *buf, int len) {
 
 int board_uart_write(void const *buf, int len) {
   uint8_t const *buf8 = (uint8_t const *) buf;
-  for ( int i = 0; i < len; i++ ) {
-    while ( (Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) == 0 ) {}
-    Chip_UART_SendByte(UART_DEV, buf8[i]);
+  int count = 0;
+  while (count < len) {
+    if (Chip_UART_ReadLineStatus(UART_DEV) & UART_LSR_THRE) {
+      Chip_UART_SendByte(UART_DEV, buf8[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 806bd53dc..129f9f0ec 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -228,8 +228,23 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  USART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_DEV->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) {
+      UART_DEV->FIFOWR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf;
+  (void) len;
   return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index b5d097234..b9d856f86 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -177,8 +177,23 @@ int board_uart_read(uint8_t* buf, int len) {
 }
 
 int board_uart_write(void const* buf, int len) {
-  USART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
-  return len;
+#ifdef UART_DEV
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_DEV->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) {
+      UART_DEV->FIFOWR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf;
+  (void) len;
+  return 0;
+#endif
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/maxim/family.c b/hw/bsp/maxim/family.c
index 6ef4c12c1..7f2a0eee6 100644
--- a/hw/bsp/maxim/family.c
+++ b/hw/bsp/maxim/family.c
@@ -186,13 +186,17 @@ int board_uart_read(uint8_t *buf, int len) {
 }
 
 int board_uart_write(void const *buf, int len) {
-  int act_len = 0;
-  const uint8_t *ch_ptr = (const uint8_t *) buf;
-  while (act_len < len) {
-    MXC_UART_WriteCharacter(ConsoleUart, *ch_ptr++);
-    act_len++;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (MXC_UART_GetTXFIFOAvailable(ConsoleUart) > 0) {
+      MXC_UART_WriteCharacterRaw(ConsoleUart, p[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index a3969c217..f50a65120 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -204,8 +204,17 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
 #ifdef UART_DEV
-  LPUART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_DEV->STAT & LPUART_STAT_TDRE_MASK) {
+      UART_DEV->DATA = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c
index 330b01f6d..651c9496e 100644
--- a/hw/bsp/mm32/family.c
+++ b/hw/bsp/mm32/family.c
@@ -153,14 +153,17 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
   #ifdef UART_DEV
-  const char* buff = buf;
-  while (len) {
-    while ((UART1->CSR & UART_IT_TXIEN) == 0);    //The loop is sent until it is finished
-    UART1->TDR = (*buff & 0xFF);
-    buff++;
-    len--;
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART1->CSR & UART_IT_TXIEN) {
+      UART1->TDR = (p[count] & 0xFF);
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
   #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/msp430/family.c b/hw/bsp/msp430/family.c
index 413ad7db6..0438f0abc 100644
--- a/hw/bsp/msp430/family.c
+++ b/hw/bsp/msp430/family.c
@@ -186,16 +186,18 @@ int board_uart_read(uint8_t * buf, int len)
 
 int board_uart_write(void const * buf, int len)
 {
-  const char * char_buf = (const char *) buf;
-
-  for(int i = 0; i < len; i++)
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  while (count < len)
   {
-    // Wait until TX buffer is empty (cleared by writing buffer).
-    while(!(UCA1IFG & UCTXIFG));
-    UCA1TXBUF = char_buf[i];
+    if (UCA1IFG & UCTXIFG) {
+      UCA1TXBUF = p[count];
+      count++;
+    } else {
+      break;
+    }
   }
-
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/msp432e4/family.c b/hw/bsp/msp432e4/family.c
index 90eb945f4..be93976a5 100644
--- a/hw/bsp/msp432e4/family.c
+++ b/hw/bsp/msp432e4/family.c
@@ -188,11 +188,16 @@ int board_uart_read(uint8_t * buf, int len)
 int board_uart_write(void const * buf, int len)
 {
   uint8_t const *p = (uint8_t const *)buf;
-  for (int i = 0; i < len; ++i) {
-    while (UART0->FR & UART_FR_TXFF) ;
-    UART0->DR = *p++;
+  int count = 0;
+  while (count < len) {
+    if (!(UART0->FR & UART_FR_TXFF)) {
+      UART0->DR = p[count];
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/rw61x/family.c b/hw/bsp/rw61x/family.c
index fcc7fb262..951c266ea 100644
--- a/hw/bsp/rw61x/family.c
+++ b/hw/bsp/rw61x/family.c
@@ -113,8 +113,17 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
 #ifdef UART_DEV
-  USART_WriteBlocking(UART_DEV, (uint8_t const*) buf, len);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UART_DEV->FIFOSTAT & USART_FIFOSTAT_TXNOTFULL_MASK) {
+      UART_DEV->FIFOWR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf; (void) len;
   return 0;
diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
index 86d12ca24..50fbe64b0 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
@@ -3,6 +3,8 @@ set(SAM_FAMILY samd51)
 set(JLINK_DEVICE ATSAMD51J19)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
 
+set(MAX3421_HOST 1)
+
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     __SAMD51J19A__
diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
index eba7070c1..f0f097c2a 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
@@ -2,6 +2,8 @@ SAM_FAMILY = samd51
 
 CFLAGS += -D__SAMD51J19A__
 
+MAX3421_HOST = 1
+
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/$(BOARD).ld
 
diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c
index b27134305..519068986 100644
--- a/hw/bsp/samg/family.c
+++ b/hw/bsp/samg/family.c
@@ -134,11 +134,16 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
   uint8_t const* buf8 = (uint8_t const*) buf;
-  for (int i = 0; i < len; i++) {
-    while (!_usart_sync_is_ready_to_send(&edbg_com)) {}
-    _usart_sync_write_byte(&edbg_com, buf8[i]);
+  int count = 0;
+  while (count < len) {
+    if (_usart_sync_is_ready_to_send(&edbg_com)) {
+      _usart_sync_write_byte(&edbg_com, buf8[count]);
+      count++;
+    } else {
+      break;
+    }
   }
-  return len;
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 2a32ba9f5..930fa2d66 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -162,8 +162,17 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
 #ifdef UART_ID
-  HAL_UART_Transmit(&UartHandle, (uint8_t*)(uintptr_t) buf, len, 0xffff);
-  return len;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (UartHandle.Instance->ISR & USART_ISR_TXE) {
+      UartHandle.Instance->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index 503d0a8c9..6988a264e 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -189,13 +189,16 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 
 int board_uart_write(void const* buf, int len) {
   uint8_t const* data = buf;
-
-  for (int i = 0; i < len; i++) {
-    while ((UART0->FR & (1 << 5)) != 0) {} // Poll until previous data was shofted out
-    UART0->DR = data[i];                   // Write UART0 DATA REGISTER
+  int count = 0;
+  while (count < len) {
+    if ((UART0->FR & (1 << 5)) == 0) { // TX FIFO not full
+      UART0->DR = data[count];
+      count++;
+    } else {
+      break;
+    }
   }
-
-  return len;
+  return count;
 }
 
 int board_uart_read(uint8_t* buf, int len) {
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index d0acd04cb..1325b784b 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -128,11 +128,25 @@ int board_uart_read(uint8_t* buf, int len) {
 
 int board_uart_write(void const* buf, int len) {
 #ifdef UART_DEV
-  char const* bufch = (char const*) buf;
-  for(int i=0;i<len;i++) {
-    XMC_UART_CH_Transmit(UART_DEV, bufch[i]);
+  uint8_t const *p = (uint8_t const *) buf;
+  int count = 0;
+  bool fifo_enabled = (UART_DEV->TBCTR & USIC_CH_TBCTR_SIZE_Msk) != 0UL;
+  while (count < len) {
+    if (fifo_enabled) {
+      if (XMC_USIC_CH_TXFIFO_IsFull(UART_DEV)) {
+        break;
+      }
+      UART_DEV->IN[0U] = p[count];
+    } else {
+      if (XMC_USIC_CH_GetTransmitBufferStatus(UART_DEV) == XMC_USIC_CH_TBUF_STATUS_BUSY) {
+        break;
+      }
+      XMC_UART_CH_ClearStatusFlag(UART_DEV, (uint32_t)XMC_UART_CH_STATUS_FLAG_TRANSMIT_BUFFER_INDICATION);
+      UART_DEV->TBUF[0U] = p[count];
+    }
+    count++;
   }
-  return len;
+  return count;
 #else
   (void) buf;
   (void) len;
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index 86ac902ce..b9c768d14 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -62,11 +62,10 @@
         {
             "name": "metro_m4_express",
             "uid": "9995AD485337433231202020FF100A34",
-            "build" : {
-                "args": ["MAX3421_HOST=1"]
-            },
             "tests": {
-                "device": true, "host": false, "dual": true,
+                "device": true,
+                "host": false,
+                "dual": true,
                 "dev_attached": [{"vid_pid": "067b_2303", "serial": "0", "is_cdc": true}],
                 "comment": "pl23x"
             },
-- 
cgit v1.3.1


From 9838a231ad9bff623a3ec819d05aad4a4087193b Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 4 Apr 2026 21:32:39 +0700
Subject: make board_uart_read()/write() return -1 when unimplemented for
 consistency across all families

---
 .claude/commands/hil.md    | 18 +++++----------
 hw/bsp/board.c             | 19 ++++++++++------
 hw/bsp/da1469x/family.c    |  4 ++--
 hw/bsp/efm32/family.c      |  4 ++--
 hw/bsp/lpc11/family.c      |  4 ++--
 hw/bsp/lpc13/family.c      |  4 ++--
 hw/bsp/lpc17/family.c      | 57 ++++++++++++++++++++++------------------------
 hw/bsp/lpc40/family.c      |  4 ++--
 hw/bsp/lpc51/family.c      |  4 ++--
 hw/bsp/lpc54/family.c      |  4 ++--
 hw/bsp/lpc55/family.c      |  4 ++--
 hw/bsp/mcx/family.c        |  4 ++--
 hw/bsp/nrf/family.c        |  2 +-
 hw/bsp/nuc100_120/family.c |  4 ++--
 hw/bsp/nuc121_125/family.c |  4 ++--
 hw/bsp/nuc126/family.c     |  4 ++--
 hw/bsp/nuc505/family.c     |  4 ++--
 hw/bsp/pic32mz/family.c    |  2 +-
 hw/bsp/ra/family.c         |  4 ++--
 hw/bsp/rw61x/family.c      |  4 ++--
 hw/bsp/samd11/family.c     |  4 ++--
 hw/bsp/samd2x_l2x/family.c |  6 ++---
 hw/bsp/samd5x_e5x/family.c |  4 ++--
 hw/bsp/same7x/family.c     |  2 +-
 test/hil/tinyusb.json      | 16 ++++++++++++-
 25 files changed, 100 insertions(+), 90 deletions(-)

(limited to 'hw')

diff --git a/.claude/commands/hil.md b/.claude/commands/hil.md
index 266321bb9..07e1a865b 100644
--- a/.claude/commands/hil.md
+++ b/.claude/commands/hil.md
@@ -7,27 +7,21 @@ Run Hardware-in-the-Loop (HIL) tests on physical boards.
 
 ## Instructions
 
-1. Determine the HIL config file:
-   ```bash
-   HIL_CONFIG=$( (systemctl list-units --type=service --state=running 2>/dev/null; systemctl --user list-units --type=service --state=running 2>/dev/null) | grep -q 'actions\.runner' && echo tinyusb.json || echo local.json )
-   ```
-   Default is `local.json` for local development.
-
-2. Parse $ARGUMENTS:
+1. Parse $ARGUMENTS:
    - If $ARGUMENTS contains `-b BOARD_NAME`, run for that specific board only.
    - If $ARGUMENTS is empty or has no `-b`, run for all boards in the config.
    - Pass through any other flags (e.g. `-v` for verbose, `-r N` for retry count) directly to the command.
 
-3. Determine whether to run **locally** or **remotely via SSH**:
+2. Determine whether to run **locally** or **remotely via SSH**:
    - **Local**: boards are attached to this machine (default when `local.json` is used)
    - **Remote (`ssh ci.lan`)**: boards are attached to the CI machine (when `tinyusb.json` is used)
 
-4. **Local execution** (boards attached to this machine):
+3. **Local execution** (boards attached to this machine):
    ```bash
    python test/hil/hil_test.py -b BOARD_NAME -B examples $HIL_CONFIG $EXTRA_ARGS
    ```
 
-5. **Remote execution** (boards attached to `ci.lan`):
+4. **Remote execution** (boards attached to `ci.lan`):
    Only copy the minimal files needed (firmware binaries + test script + config), then run remotely.
 
    ```bash
@@ -56,9 +50,9 @@ Run Hardware-in-the-Loop (HIL) tests on physical boards.
    - Flasher tools: `JLinkExe`, `openocd`, etc. as needed by the board
    - USB access to the boards (udev rules configured)
 
-6. Use a timeout of at least 20 minutes (600000ms). HIL tests take 2-5 minutes. NEVER cancel early.
+5. Use a timeout of at least 20 minutes (600000ms). HIL tests take 2-5 minutes. NEVER cancel early.
 
-7. After the test completes:
+6. After the test completes:
    - Show the test output to the user.
    - Summarize pass/fail results per board.
    - If there are failures, suggest re-running with `-v` flag for verbose output to help debug.
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 1c159189c..ae58bb5fc 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -97,17 +97,22 @@ int sys_read (int fhdl, char *buf, size_t count) {
 #else
 
 // Default logging with on-board UART
-// Retry to ensure printf/log output is not lost when board_uart_write is non-blocking
+// board_uart_write() is non-blocking, retry until all bytes sent.
+// Returns negative if UART is not available (stub), break immediately.
 int sys_write (int fhdl, const char *buf, size_t count) {
   (void) fhdl;
-  int written = 0;
-  while ((size_t)written < count) {
-    int wr = board_uart_write(buf + written, (int)(count - (size_t)written));
-    if (wr > 0) {
-      written += wr;
+  size_t written = 0;
+  while (written < count) {
+    int wr = board_uart_write(buf + written, (int)(count - written));
+    if (wr < 0) {
+      break; // UART not available
     }
+    if (wr == 0) {
+      continue; // TX busy, keep trying
+    }
+    written += (size_t) wr;
   }
-  return written;
+  return (int) written;
 }
 
 int sys_read (int fhdl, char *buf, size_t count) {
diff --git a/hw/bsp/da1469x/family.c b/hw/bsp/da1469x/family.c
index a4f7f2e8d..5f7e2d42f 100644
--- a/hw/bsp/da1469x/family.c
+++ b/hw/bsp/da1469x/family.c
@@ -123,14 +123,14 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
 
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/efm32/family.c b/hw/bsp/efm32/family.c
index d318e20d6..7a5ea6a74 100644
--- a/hw/bsp/efm32/family.c
+++ b/hw/bsp/efm32/family.c
@@ -673,13 +673,13 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/lpc11/family.c b/hw/bsp/lpc11/family.c
index 76c2bd17c..06b74bcd7 100644
--- a/hw/bsp/lpc11/family.c
+++ b/hw/bsp/lpc11/family.c
@@ -114,13 +114,13 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc13/family.c b/hw/bsp/lpc13/family.c
index 8513f4df4..e25449689 100644
--- a/hw/bsp/lpc13/family.c
+++ b/hw/bsp/lpc13/family.c
@@ -101,11 +101,11 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
diff --git a/hw/bsp/lpc17/family.c b/hw/bsp/lpc17/family.c
index f398f7e3c..6b94c1163 100644
--- a/hw/bsp/lpc17/family.c
+++ b/hw/bsp/lpc17/family.c
@@ -64,29 +64,13 @@ void board_init(void) {
   Chip_GPIO_SetPinDIROutput(LPC_GPIO, LED_PORT, LED_PIN);
   Chip_GPIO_SetPinDIRInput(LPC_GPIO, BUTTON_PORT, BUTTON_PIN);
 
-#if 0
   //------------- UART -------------//
-  PINSEL_CFG_Type PinCfg =
-  {
-      .Portnum   = 0,
-      .Pinnum    = 0, // TXD is P0.0
-      .Funcnum   = 2,
-      .OpenDrain = 0,
-      .Pinmode   = 0
-  };
-  PINSEL_ConfigPin(&PinCfg);
-
-  PinCfg.Portnum = 0;
-  PinCfg.Pinnum  = 1; // RXD is P0.1
-  PINSEL_ConfigPin(&PinCfg);
-
-  UART_CFG_Type UARTConfigStruct;
-  UART_ConfigStructInit(&UARTConfigStruct);
-  UARTConfigStruct.Baud_rate = CFG_BOARD_UART_BAUDRATE;
-
-  UART_Init(BOARD_UART_PORT, &UARTConfigStruct);
-  UART_TxCmd(BOARD_UART_PORT, ENABLE); // Enable UART Transmit
-#endif
+  // Pin muxing for UART3 (TXD3=P0.0, RXD3=P0.1) is configured in board.h pinmuxing[]
+  Chip_UART_Init(BOARD_UART_PORT);
+  Chip_UART_SetBaud(BOARD_UART_PORT, CFG_BOARD_UART_BAUDRATE);
+  Chip_UART_ConfigData(BOARD_UART_PORT, (UART_LCR_WLEN8 | UART_LCR_SBS_1BIT | UART_LCR_PARITY_DIS));
+  Chip_UART_SetupFIFOS(BOARD_UART_PORT, (UART_FCR_FIFO_EN | UART_FCR_TRG_LEV0));
+  Chip_UART_TXEnable(BOARD_UART_PORT);
 
   //------------- USB -------------//
   Chip_IOCON_SetPinMuxing(LPC_IOCON, pin_usb_mux, sizeof(pin_usb_mux) / sizeof(PINMUX_GRP_T));
@@ -125,17 +109,30 @@ uint32_t board_button_read(void) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
-//  return UART_ReceiveByte(BOARD_UART_PORT);
-  (void) buf;
-  (void) len;
-  return 0;
+  int count = 0;
+  while (count < len) {
+    if (BOARD_UART_PORT->LSR & UART_LSR_RDR) {
+      buf[count] = (uint8_t) BOARD_UART_PORT->RBR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 int board_uart_write(void const* buf, int len) {
-//  UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
-  (void) buf;
-  (void) len;
-  return 0;
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (BOARD_UART_PORT->LSR & UART_LSR_THRE) {
+      BOARD_UART_PORT->THR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc40/family.c b/hw/bsp/lpc40/family.c
index 237cd996b..d8a63576b 100644
--- a/hw/bsp/lpc40/family.c
+++ b/hw/bsp/lpc40/family.c
@@ -139,14 +139,14 @@ int board_uart_read(uint8_t *buf, int len) {
   //return UART_ReceiveByte(BOARD_UART_PORT);
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const *buf, int len) {
   //UART_Send(BOARD_UART_PORT, &c, 1, BLOCKING);
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc51/family.c b/hw/bsp/lpc51/family.c
index 847972350..57c3e26dd 100644
--- a/hw/bsp/lpc51/family.c
+++ b/hw/bsp/lpc51/family.c
@@ -106,13 +106,13 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/lpc54/family.c b/hw/bsp/lpc54/family.c
index 129f9f0ec..5a5087e56 100644
--- a/hw/bsp/lpc54/family.c
+++ b/hw/bsp/lpc54/family.c
@@ -224,7 +224,7 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
@@ -243,7 +243,7 @@ int board_uart_write(void const* buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/lpc55/family.c b/hw/bsp/lpc55/family.c
index b9d856f86..e021caf35 100644
--- a/hw/bsp/lpc55/family.c
+++ b/hw/bsp/lpc55/family.c
@@ -173,7 +173,7 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
@@ -192,7 +192,7 @@ int board_uart_write(void const* buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/mcx/family.c b/hw/bsp/mcx/family.c
index f50a65120..2facfb1e0 100644
--- a/hw/bsp/mcx/family.c
+++ b/hw/bsp/mcx/family.c
@@ -199,7 +199,7 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
@@ -217,7 +217,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 04bfbf320..f1e8b829c 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -274,7 +274,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 //  nrfx_err_t err = nrfx_uarte_rx(&_uart_id, buf, (size_t) len);
 //  return NRFX_SUCCESS == err ? len : 0;
 }
diff --git a/hw/bsp/nuc100_120/family.c b/hw/bsp/nuc100_120/family.c
index cfe60121c..4ff24aae7 100644
--- a/hw/bsp/nuc100_120/family.c
+++ b/hw/bsp/nuc100_120/family.c
@@ -120,11 +120,11 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
diff --git a/hw/bsp/nuc121_125/family.c b/hw/bsp/nuc121_125/family.c
index dce5b4d62..9dd3c71fc 100644
--- a/hw/bsp/nuc121_125/family.c
+++ b/hw/bsp/nuc121_125/family.c
@@ -109,11 +109,11 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
diff --git a/hw/bsp/nuc126/family.c b/hw/bsp/nuc126/family.c
index 3343064e5..663bffbe7 100644
--- a/hw/bsp/nuc126/family.c
+++ b/hw/bsp/nuc126/family.c
@@ -134,11 +134,11 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
diff --git a/hw/bsp/nuc505/family.c b/hw/bsp/nuc505/family.c
index f1a77e4a5..41f6017c2 100644
--- a/hw/bsp/nuc505/family.c
+++ b/hw/bsp/nuc505/family.c
@@ -117,11 +117,11 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c
index 2bfc876e1..5805e653f 100644
--- a/hw/bsp/pic32mz/family.c
+++ b/hw/bsp/pic32mz/family.c
@@ -96,7 +96,7 @@ TU_ATTR_WEAK int board_uart_read(uint8_t * buf, int len)
   (void) buf;
   (void) len;
 
-  return 0;
+  return -1;
 }
 
 TU_ATTR_WEAK int board_uart_write(void const * buf, int len)
diff --git a/hw/bsp/ra/family.c b/hw/bsp/ra/family.c
index f371e694b..c8a4d33d9 100644
--- a/hw/bsp/ra/family.c
+++ b/hw/bsp/ra/family.c
@@ -153,13 +153,13 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 int board_uart_read(uint8_t *buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const *buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/rw61x/family.c b/hw/bsp/rw61x/family.c
index 951c266ea..5d7bd4754 100644
--- a/hw/bsp/rw61x/family.c
+++ b/hw/bsp/rw61x/family.c
@@ -108,7 +108,7 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
@@ -126,7 +126,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index bccbac8ea..0c987b85a 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -137,13 +137,13 @@ uint32_t board_button_read(void)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c
index 737219b6c..11b6343cd 100644
--- a/hw/bsp/samd2x_l2x/family.c
+++ b/hw/bsp/samd2x_l2x/family.c
@@ -322,7 +322,7 @@ static inline void uart_send_str(const char* text)
 int board_uart_read(uint8_t* buf, int len)
 {
   (void) buf; (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const * buf, int len)
@@ -343,13 +343,13 @@ static void uart_init(void) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #endif
diff --git a/hw/bsp/samd5x_e5x/family.c b/hw/bsp/samd5x_e5x/family.c
index c008b9719..71ef2d6ce 100644
--- a/hw/bsp/samd5x_e5x/family.c
+++ b/hw/bsp/samd5x_e5x/family.c
@@ -194,13 +194,13 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const* buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 #if CFG_TUSB_OS == OPT_OS_NONE
diff --git a/hw/bsp/same7x/family.c b/hw/bsp/same7x/family.c
index 61c1792d1..d02e6c5f1 100644
--- a/hw/bsp/same7x/family.c
+++ b/hw/bsp/same7x/family.c
@@ -133,7 +133,7 @@ uint32_t board_button_read(void) {
 int board_uart_read(uint8_t *buf, int len) {
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 }
 
 int board_uart_write(void const *buf, int len) {
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index b9c768d14..3c03b3721 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -177,7 +177,21 @@
             "uid": "560AE75E1C7152C9",
             "tests": {
                 "device": false, "host": true, "dual": false,
-                "dev_attached": [{"vid_pid": "1a86_55d4", "serial": "52D2002694", "is_cdc": true}]
+                "dev_attached": [
+                    {
+                        "vid_pid": "1a86_55d4",
+                        "serial": "52D2002694",
+                        "is_cdc": true
+                    },
+                    {
+                        "vid_pid": "0951_1603",
+                        "serial": "820000000000000045B46338",
+                        "is_msc": true,
+                        "block_size": 512,
+                        "block_count": 3987456,
+                        "msc_inquiry": "Kingston DataTraveler 2.0 1.0"
+                    }
+                ]
             },
             "flasher": {
                 "name": "openocd",
-- 
cgit v1.3.1


From 3747355841f35cf5f1b2998c1806d8d19b167722 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 4 Apr 2026 21:35:42 +0700
Subject: move MAX3421_HOST build flag to test config for metro_m4_express

---
 hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake | 2 --
 hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk    | 2 --
 test/hil/tinyusb.json                                 | 5 +++++
 3 files changed, 5 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
index 50fbe64b0..86d12ca24 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.cmake
@@ -3,8 +3,6 @@ set(SAM_FAMILY samd51)
 set(JLINK_DEVICE ATSAMD51J19)
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/${BOARD}.ld)
 
-set(MAX3421_HOST 1)
-
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     __SAMD51J19A__
diff --git a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
index f0f097c2a..eba7070c1 100644
--- a/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
+++ b/hw/bsp/samd5x_e5x/boards/metro_m4_express/board.mk
@@ -2,8 +2,6 @@ SAM_FAMILY = samd51
 
 CFLAGS += -D__SAMD51J19A__
 
-MAX3421_HOST = 1
-
 # All source paths should be relative to the top level.
 LD_FILE = $(BOARD_PATH)/$(BOARD).ld
 
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index 3c03b3721..92b7b21b0 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -62,6 +62,11 @@
         {
             "name": "metro_m4_express",
             "uid": "9995AD485337433231202020FF100A34",
+            "build": {
+                "args": [
+                    "MAX3421_HOST=1"
+                ]
+            },
             "tests": {
                 "device": true,
                 "host": false,
-- 
cgit v1.3.1


From 4c7a9fed96e0a81cc640333c1c82fee54fa4be34 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 19 Mar 2026 22:23:47 +0700
Subject: remove IAR toolchain support from make build system

IAR is only supported with CMake. Remove all IAR-specific references
from the Make build system including toolchain files, SRC_S_IAR,
LD_FILE_IAR variables, and IAR toolchain detection.

Also fix GET_SECTOR_COUNT truncation in msc_file_explorer and
broken formatting in stm32f7 board_uart_write.

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
---
 examples/build_system/make/cpu/arm1176jzf-s.mk     |  4 --
 examples/build_system/make/cpu/arm926ej-s.mk       |  4 --
 examples/build_system/make/cpu/cortex-a53.mk       |  7 ----
 examples/build_system/make/cpu/cortex-a72.mk       |  7 ----
 examples/build_system/make/cpu/cortex-m0.mk        |  5 ---
 examples/build_system/make/cpu/cortex-m0plus.mk    |  5 ---
 examples/build_system/make/cpu/cortex-m23.mk       |  5 ---
 examples/build_system/make/cpu/cortex-m3.mk        |  5 ---
 .../build_system/make/cpu/cortex-m33-nodsp-nofp.mk |  7 ----
 examples/build_system/make/cpu/cortex-m33.mk       |  9 -----
 examples/build_system/make/cpu/cortex-m4-nofpu.mk  |  4 --
 examples/build_system/make/cpu/cortex-m4.mk        |  4 --
 examples/build_system/make/cpu/cortex-m55.mk       |  9 -----
 examples/build_system/make/cpu/cortex-m7-fpsp.mk   |  9 -----
 examples/build_system/make/cpu/cortex-m7.mk        |  9 -----
 examples/build_system/make/cpu/cortex-m85.mk       |  9 -----
 examples/build_system/make/cpu/msp430.mk           |  2 -
 examples/build_system/make/cpu/rv32i-ilp32.mk      |  2 -
 examples/build_system/make/cpu/rv32imac-ilp32.mk   |  3 --
 examples/build_system/make/toolchain/arm_iar.mk    | 13 -------
 examples/build_system/make/toolchain/gcc_rules.mk  | 11 +-----
 examples/build_system/make/toolchain/iar_rules.mk  | 44 ----------------------
 examples/device/net_lwip_webserver/Makefile        |  2 +-
 examples/dual/host_hid_to_device_cdc/Makefile      |  2 +-
 examples/dual/host_info_to_device_cdc/Makefile     |  2 +-
 examples/host/msc_file_explorer/Makefile           |  2 +-
 examples/host/msc_file_explorer/src/msc_app.c      |  2 +-
 hw/bsp/at32f402_405/family.mk                      | 10 ++---
 hw/bsp/at32f403a_407/family.mk                     | 10 ++---
 hw/bsp/at32f413/family.mk                          | 10 ++---
 hw/bsp/at32f415/family.mk                          | 10 ++---
 hw/bsp/at32f423/family.mk                          | 10 ++---
 hw/bsp/at32f425/family.mk                          | 10 ++---
 hw/bsp/at32f435_437/family.mk                      | 10 ++---
 hw/bsp/at32f45x/family.mk                          | 10 ++---
 hw/bsp/broadcom_32bit/family.mk                    |  2 +-
 hw/bsp/broadcom_64bit/family.mk                    |  2 +-
 hw/bsp/ch32v10x/family.mk                          |  2 +-
 hw/bsp/ch32v20x/family.mk                          |  2 +-
 hw/bsp/ch32v30x/family.mk                          |  2 +-
 hw/bsp/cxd56/family.mk                             |  2 +-
 hw/bsp/da1469x/family.mk                           |  2 +-
 hw/bsp/efm32/family.mk                             |  2 +-
 hw/bsp/family_support.mk                           | 12 +++---
 hw/bsp/fomu/family.mk                              |  2 +-
 hw/bsp/hpmicro/family.mk                           |  2 +-
 hw/bsp/imxrt/family.mk                             |  2 +-
 hw/bsp/kinetis_k/family.mk                         |  2 +-
 hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk  |  2 +-
 hw/bsp/kinetis_k32l/family.mk                      |  2 +-
 hw/bsp/kinetis_kl/family.mk                        |  2 +-
 hw/bsp/lpc11/family.mk                             |  2 +-
 hw/bsp/lpc13/family.mk                             |  2 +-
 hw/bsp/lpc15/family.mk                             |  4 +-
 hw/bsp/lpc17/family.mk                             |  4 +-
 hw/bsp/lpc18/family.mk                             |  4 +-
 hw/bsp/lpc40/family.mk                             |  4 +-
 hw/bsp/lpc43/family.mk                             |  4 +-
 hw/bsp/lpc51/family.mk                             |  2 +-
 hw/bsp/lpc54/family.mk                             |  2 +-
 hw/bsp/lpc55/family.mk                             |  2 +-
 hw/bsp/maxim/family.mk                             |  6 +--
 hw/bsp/mcx/family.mk                               |  2 +-
 hw/bsp/mm32/family.mk                              |  2 +-
 hw/bsp/msp432e4/family.mk                          |  2 +-
 hw/bsp/nrf/family.mk                               |  4 +-
 hw/bsp/nuc100_120/family.mk                        |  2 +-
 hw/bsp/nuc121_125/family.mk                        |  2 +-
 hw/bsp/nuc126/family.mk                            |  2 +-
 hw/bsp/nuc505/family.mk                            |  2 +-
 hw/bsp/ra/family.mk                                |  4 +-
 hw/bsp/rw61x/family.mk                             |  2 +-
 hw/bsp/rx/family.mk                                |  2 +-
 hw/bsp/samd11/family.mk                            |  2 +-
 hw/bsp/samd2x_l2x/family.mk                        |  2 +-
 hw/bsp/samd5x_e5x/family.mk                        |  2 +-
 hw/bsp/same7x/family.mk                            |  2 +-
 hw/bsp/samg/family.mk                              |  2 +-
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk     |  7 +---
 hw/bsp/stm32c0/family.mk                           |  6 +--
 hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk   |  2 +-
 hw/bsp/stm32f0/boards/stm32f072disco/board.mk      |  2 +-
 hw/bsp/stm32f0/boards/stm32f072eval/board.mk       |  2 +-
 hw/bsp/stm32f0/family.mk                           | 10 ++---
 hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk  |  3 +-
 hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk    |  3 +-
 hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk     |  3 +-
 hw/bsp/stm32f1/family.mk                           |  9 ++---
 hw/bsp/stm32f2/family.mk                           |  8 ++--
 hw/bsp/stm32f3/family.mk                           |  8 ++--
 hw/bsp/stm32f4/boards/feather_stm32f405/board.mk   |  7 +---
 hw/bsp/stm32f4/boards/pyboardv11/board.mk          |  7 +---
 hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk  |  7 +---
 hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk   |  7 +---
 hw/bsp/stm32f4/boards/stm32f407disco/board.mk      |  7 +---
 hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk  |  7 +---
 hw/bsp/stm32f4/boards/stm32f411disco/board.mk      |  7 +---
 hw/bsp/stm32f4/boards/stm32f412disco/board.mk      |  7 +---
 hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk     |  7 +---
 hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk     |  7 +---
 hw/bsp/stm32f4/family.mk                           |  6 +--
 hw/bsp/stm32f7/boards/stlinkv3mini/board.mk        |  2 +-
 hw/bsp/stm32f7/boards/stm32f723disco/board.mk      |  2 +-
 hw/bsp/stm32f7/boards/stm32f746disco/board.mk      |  2 +-
 hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk     |  2 +-
 hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk     |  2 +-
 hw/bsp/stm32f7/boards/stm32f769disco/board.mk      |  2 +-
 hw/bsp/stm32f7/family.mk                           | 10 ++---
 hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk     |  7 +---
 hw/bsp/stm32g0/family.mk                           |  6 +--
 hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk       |  2 +-
 hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk     |  2 +-
 hw/bsp/stm32g4/boards/stm32g491nucleo/board.mk     |  2 +-
 hw/bsp/stm32g4/family.mk                           | 10 ++---
 hw/bsp/stm32h5/family.mk                           | 12 +++---
 hw/bsp/stm32h7/boards/daisyseed/board.mk           |  2 +-
 hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk     |  2 +-
 hw/bsp/stm32h7/boards/stm32h743eval/board.mk       |  2 +-
 hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk     |  2 +-
 hw/bsp/stm32h7/boards/stm32h745disco/board.mk      |  3 +-
 hw/bsp/stm32h7/boards/stm32h747disco/board.mk      |  3 +-
 hw/bsp/stm32h7/boards/stm32h750_weact/board.mk     |  2 +-
 hw/bsp/stm32h7/boards/stm32h750bdk/board.mk        |  2 +-
 hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk |  2 +-
 hw/bsp/stm32h7/family.mk                           |  8 ++--
 hw/bsp/stm32h7rs/family.mk                         | 12 +++---
 hw/bsp/stm32l0/family.mk                           |  8 ++--
 hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk     |  7 +---
 hw/bsp/stm32l4/boards/stm32l476disco/board.mk      |  7 +---
 hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk     |  7 +---
 hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk     |  7 +---
 hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk     |  7 +---
 hw/bsp/stm32l4/family.mk                           |  6 +--
 hw/bsp/stm32n6/boards/stm32n6570dk/board.mk        |  2 +-
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk     |  2 +-
 hw/bsp/stm32n6/family.mk                           | 12 +++---
 hw/bsp/stm32u0/family.mk                           |  8 ++--
 hw/bsp/stm32u5/family.mk                           | 10 ++---
 hw/bsp/stm32wb/family.mk                           | 10 ++---
 hw/bsp/stm32wba/family.mk                          | 10 ++---
 hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk          |  3 +-
 hw/bsp/tm4c/family.mk                              |  2 +-
 142 files changed, 227 insertions(+), 504 deletions(-)
 delete mode 100644 examples/build_system/make/toolchain/arm_iar.mk
 delete mode 100644 examples/build_system/make/toolchain/iar_rules.mk

(limited to 'hw')

diff --git a/examples/build_system/make/cpu/arm1176jzf-s.mk b/examples/build_system/make/cpu/arm1176jzf-s.mk
index 022ccf7ad..c0cef8784 100644
--- a/examples/build_system/make/cpu/arm1176jzf-s.mk
+++ b/examples/build_system/make/cpu/arm1176jzf-s.mk
@@ -2,8 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
   CFLAGS += \
     -mcpu=arm1176jzf-s \
 
-else ifeq ($(TOOLCHAIN),iar)
-	#CFLAGS += --cpu cortex-a53
-	#ASFLAGS += --cpu cortex-a53
-
 endif
diff --git a/examples/build_system/make/cpu/arm926ej-s.mk b/examples/build_system/make/cpu/arm926ej-s.mk
index 5b84f514f..e0558eca7 100644
--- a/examples/build_system/make/cpu/arm926ej-s.mk
+++ b/examples/build_system/make/cpu/arm926ej-s.mk
@@ -2,8 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
   CFLAGS += \
     -mcpu=arm926ej-s \
 
-else ifeq ($(TOOLCHAIN),iar)
-	#CFLAGS += --cpu cortex-a53
-	#ASFLAGS += --cpu cortex-a53
-
 endif
diff --git a/examples/build_system/make/cpu/cortex-a53.mk b/examples/build_system/make/cpu/cortex-a53.mk
index 42e522ecf..20ed8f0cc 100644
--- a/examples/build_system/make/cpu/cortex-a53.mk
+++ b/examples/build_system/make/cpu/cortex-a53.mk
@@ -2,11 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
   CFLAGS += \
     -mcpu=cortex-a53 \
 
-else ifeq ($(TOOLCHAIN),iar)
-	CFLAGS += \
-		--cpu cortex-a53 \
-
-	ASFLAGS += \
-		--cpu cortex-a53 \
-
 endif
diff --git a/examples/build_system/make/cpu/cortex-a72.mk b/examples/build_system/make/cpu/cortex-a72.mk
index 1b3d8da4a..b2b3d9181 100644
--- a/examples/build_system/make/cpu/cortex-a72.mk
+++ b/examples/build_system/make/cpu/cortex-a72.mk
@@ -2,11 +2,4 @@ ifeq ($(TOOLCHAIN),gcc)
   CFLAGS += \
     -mcpu=cortex-a72 \
 
-else ifeq ($(TOOLCHAIN),iar)
-	CFLAGS += \
-		--cpu cortex-a72 \
-
-	ASFLAGS += \
-		--cpu cortex-a72 \
-
 endif
diff --git a/examples/build_system/make/cpu/cortex-m0.mk b/examples/build_system/make/cpu/cortex-m0.mk
index c2c33a2ee..1d618982e 100644
--- a/examples/build_system/make/cpu/cortex-m0.mk
+++ b/examples/build_system/make/cpu/cortex-m0.mk
@@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  --target=arm-none-eabi \
 	  -mcpu=cortex-m0 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  # IAR Flags
-  CFLAGS += --cpu cortex-m0
-  ASFLAGS += --cpu cortex-m0
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m0plus.mk b/examples/build_system/make/cpu/cortex-m0plus.mk
index fe8feb227..029ce09d1 100644
--- a/examples/build_system/make/cpu/cortex-m0plus.mk
+++ b/examples/build_system/make/cpu/cortex-m0plus.mk
@@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  --target=arm-none-eabi \
 	  -mcpu=cortex-m0plus \
 
-else ifeq ($(TOOLCHAIN),iar)
-  # IAR Flags
-  CFLAGS += --cpu cortex-m0+
-  ASFLAGS += --cpu cortex-m0+
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m23.mk b/examples/build_system/make/cpu/cortex-m23.mk
index 7ab758352..b92e24401 100644
--- a/examples/build_system/make/cpu/cortex-m23.mk
+++ b/examples/build_system/make/cpu/cortex-m23.mk
@@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  --target=arm-none-eabi \
 	  -mcpu=cortex-m23 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  # IAR Flags
-  CFLAGS += --cpu cortex-m23
-  ASFLAGS += --cpu cortex-m23
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m3.mk b/examples/build_system/make/cpu/cortex-m3.mk
index b6325313f..b58f0203b 100644
--- a/examples/build_system/make/cpu/cortex-m3.mk
+++ b/examples/build_system/make/cpu/cortex-m3.mk
@@ -9,11 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  --target=arm-none-eabi \
 	  -mcpu=cortex-m3 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  # IAR Flags
-  CFLAGS += --cpu cortex-m3
-  ASFLAGS += --cpu cortex-m3
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m33-nodsp-nofp.mk b/examples/build_system/make/cpu/cortex-m33-nodsp-nofp.mk
index 405053dd0..858a721fd 100644
--- a/examples/build_system/make/cpu/cortex-m33-nodsp-nofp.mk
+++ b/examples/build_system/make/cpu/cortex-m33-nodsp-nofp.mk
@@ -10,13 +10,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m33 \
 	  -mfpu=softvp \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-		--cpu cortex-m33+nodsp \
-
-  ASFLAGS += \
-		--cpu cortex-m33+nodsp \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m33.mk b/examples/build_system/make/cpu/cortex-m33.mk
index 47b0eaecd..5699fef7b 100644
--- a/examples/build_system/make/cpu/cortex-m33.mk
+++ b/examples/build_system/make/cpu/cortex-m33.mk
@@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m33 \
 	  -mfpu=fpv5-sp-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-		--cpu cortex-m33 \
-		--fpu VFPv5-SP \
-
-  ASFLAGS += \
-		--cpu cortex-m33 \
-		--fpu VFPv5-SP \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m4-nofpu.mk b/examples/build_system/make/cpu/cortex-m4-nofpu.mk
index ac2916005..62ab21e31 100644
--- a/examples/build_system/make/cpu/cortex-m4-nofpu.mk
+++ b/examples/build_system/make/cpu/cortex-m4-nofpu.mk
@@ -9,10 +9,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  --target=arm-none-eabi \
 	  -mcpu=cortex-m4
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += --cpu cortex-m4 --fpu none
-  ASFLAGS += --cpu cortex-m4 --fpu none
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m4.mk b/examples/build_system/make/cpu/cortex-m4.mk
index 57d6e126d..e50fe00ef 100644
--- a/examples/build_system/make/cpu/cortex-m4.mk
+++ b/examples/build_system/make/cpu/cortex-m4.mk
@@ -11,10 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m4 \
 	  -mfpu=fpv4-sp-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += --cpu cortex-m4 --fpu VFPv4-SP
-  ASFLAGS += --cpu cortex-m4 --fpu VFPv4-SP
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m55.mk b/examples/build_system/make/cpu/cortex-m55.mk
index de627caed..94cca1a5e 100644
--- a/examples/build_system/make/cpu/cortex-m55.mk
+++ b/examples/build_system/make/cpu/cortex-m55.mk
@@ -12,15 +12,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m55 \
 	  -mfpu=fpv5-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-  	--cpu cortex-m55 \
-  	--fpu VFPv5_D16 \
-
-  ASFLAGS += \
-		--cpu cortex-m55 \
-		--fpu VFPv5_D16 \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m7-fpsp.mk b/examples/build_system/make/cpu/cortex-m7-fpsp.mk
index cd42c6fb8..e79ff6d73 100644
--- a/examples/build_system/make/cpu/cortex-m7-fpsp.mk
+++ b/examples/build_system/make/cpu/cortex-m7-fpsp.mk
@@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m7 \
 	  -mfpu=fpv5-sp-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-  	--cpu cortex-m7 \
-  	--fpu VFPv5_sp \
-
-  ASFLAGS += \
-		--cpu cortex-m7 \
-		--fpu VFPv5_sp \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m7.mk b/examples/build_system/make/cpu/cortex-m7.mk
index 3e6116179..3bd5c1155 100644
--- a/examples/build_system/make/cpu/cortex-m7.mk
+++ b/examples/build_system/make/cpu/cortex-m7.mk
@@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m7 \
 	  -mfpu=fpv5-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-  	--cpu cortex-m7 \
-  	--fpu VFPv5_D16 \
-
-  ASFLAGS += \
-		--cpu cortex-m7 \
-		--fpu VFPv5_D16 \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/cortex-m85.mk b/examples/build_system/make/cpu/cortex-m85.mk
index 75e8f3aaf..d66e26418 100644
--- a/examples/build_system/make/cpu/cortex-m85.mk
+++ b/examples/build_system/make/cpu/cortex-m85.mk
@@ -11,15 +11,6 @@ else ifeq ($(TOOLCHAIN),clang)
 	  -mcpu=cortex-m85 \
 	  -mfpu=fpv5-d16 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  CFLAGS += \
-  	--cpu cortex-m85 \
-  	--fpu VFPv5_D16 \
-
-  ASFLAGS += \
-		--cpu cortex-m85 \
-		--fpu VFPv5_D16 \
-
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/msp430.mk b/examples/build_system/make/cpu/msp430.mk
index 6daa2c38d..83a35140f 100644
--- a/examples/build_system/make/cpu/msp430.mk
+++ b/examples/build_system/make/cpu/msp430.mk
@@ -2,8 +2,6 @@ ifeq ($(TOOLCHAIN),gcc)
   # nothing to add
 else ifeq ($(TOOLCHAIN),clang)
   # nothing to add
-else ifeq ($(TOOLCHAIN),iar)
-  # nothing to add
 else
   $(error "TOOLCHAIN is not supported")
 endif
diff --git a/examples/build_system/make/cpu/rv32i-ilp32.mk b/examples/build_system/make/cpu/rv32i-ilp32.mk
index af764afc5..6b2306008 100644
--- a/examples/build_system/make/cpu/rv32i-ilp32.mk
+++ b/examples/build_system/make/cpu/rv32i-ilp32.mk
@@ -8,8 +8,6 @@ else ifeq ($(TOOLCHAIN),clang)
     -march=rv32i_zicsr \
     -mabi=ilp32 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  $(error not support)
 endif
 
 # For freeRTOS port source
diff --git a/examples/build_system/make/cpu/rv32imac-ilp32.mk b/examples/build_system/make/cpu/rv32imac-ilp32.mk
index a7b2258d7..e4a3ad24f 100644
--- a/examples/build_system/make/cpu/rv32imac-ilp32.mk
+++ b/examples/build_system/make/cpu/rv32imac-ilp32.mk
@@ -8,9 +8,6 @@ else ifeq ($(TOOLCHAIN),clang)
     -march=rv32imac_zicsr_zifencei \
     -mabi=ilp32 \
 
-else ifeq ($(TOOLCHAIN),iar)
-  $(error not support)
-
 endif
 
 # For freeRTOS port source
diff --git a/examples/build_system/make/toolchain/arm_iar.mk b/examples/build_system/make/toolchain/arm_iar.mk
deleted file mode 100644
index 17967b41a..000000000
--- a/examples/build_system/make/toolchain/arm_iar.mk
+++ /dev/null
@@ -1,13 +0,0 @@
-# makefile for arm iar toolchain
-
-CC = iccarm
-AS = iasmarm
-LD = ilinkarm
-OBJCOPY = ielftool --silent
-SIZE = size
-
-# Enable extension mode (gcc compatible)
-CFLAGS += -e --debug --silent
-
-# silent mode
-ASFLAGS += -S $(addprefix -I,$(INC))
diff --git a/examples/build_system/make/toolchain/gcc_rules.mk b/examples/build_system/make/toolchain/gcc_rules.mk
index fc5225503..3463cad48 100644
--- a/examples/build_system/make/toolchain/gcc_rules.mk
+++ b/examples/build_system/make/toolchain/gcc_rules.mk
@@ -1,5 +1,3 @@
-SRC_S += $(SRC_S_GCC)
-
 # Assembly files can be name with upper case .S, convert it to .s
 SRC_S := $(SRC_S:.S=.s)
 
@@ -9,7 +7,7 @@ SRC_S := $(SRC_S:.S=.s)
 OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
 OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
 
-CFLAGS += $(CFLAGS_GCC) -MD
+CFLAGS += -MD
 
 # LTO makes it difficult to analyze map file for optimizing size purpose
 # We will run this option in ci
@@ -25,18 +23,13 @@ ifeq ($(TOOLCHAIN),clang)
 CFLAGS += $(CFLAGS_CLANG)
 LDFLAGS += $(CFLAGS) $(LDFLAGS_CLANG)
 else
-LDFLAGS += $(CFLAGS) $(LDFLAGS_GCC)
+LDFLAGS += $(CFLAGS)
 endif
 
-# TODO should be removed after all examples are updated
 ifdef LD_FILE
 LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE)
 endif
 
-ifdef LD_FILE_GCC
-LDFLAGS += -Wl,-T,$(TOP)/$(LD_FILE_GCC)
-endif
-
 ASFLAGS += $(CFLAGS)
 
 # libc
diff --git a/examples/build_system/make/toolchain/iar_rules.mk b/examples/build_system/make/toolchain/iar_rules.mk
deleted file mode 100644
index 2c066f6da..000000000
--- a/examples/build_system/make/toolchain/iar_rules.mk
+++ /dev/null
@@ -1,44 +0,0 @@
-SRC_S += $(SRC_S_IAR)
-
-# Assembly files can be name with upper case .S, convert it to .s
-SRC_S := $(SRC_S:.S=.s)
-
-# Due to GCC LTO bug https://bugs.launchpad.net/gcc-arm-embedded/+bug/1747966
-# assembly file should be placed first in linking order
-# '_asm' suffix is added to object of assembly file
-OBJ += $(addprefix $(BUILD)/obj/, $(SRC_S:.s=_asm.o))
-OBJ += $(addprefix $(BUILD)/obj/, $(SRC_C:.c=.o))
-
-# Linker script
-LDFLAGS += --config $(TOP)/$(LD_FILE_IAR)
-
-# ---------------------------------------
-# Rules
-# ---------------------------------------
-
-# Compile .c file
-$(BUILD)/obj/%.o: %.c
-	@echo CC $(notdir $@)
-	@$(CC) $(CFLAGS) -c -o $@ $<
-
-# ASM sources lower case .s
-$(BUILD)/obj/%_asm.o: %.s
-	@echo AS $(notdir $@)
-	@$(AS) $(ASFLAGS) -c -o $@ $<
-
-# ASM sources upper case .S
-$(BUILD)/obj/%_asm.o: %.S
-	@echo AS $(notdir $@)
-	@$(AS) $(ASFLAGS) -c -o $@ $<
-
-$(BUILD)/$(PROJECT).bin: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --bin $^ $@
-
-$(BUILD)/$(PROJECT).hex: $(BUILD)/$(PROJECT).elf
-	@echo CREATE $@
-	@$(OBJCOPY) --ihex $^ $@
-
-$(BUILD)/$(PROJECT).elf: $(OBJ)
-	@echo LINK $@
-	@$(LD) -o $@ $(LDFLAGS) $^
diff --git a/examples/device/net_lwip_webserver/Makefile b/examples/device/net_lwip_webserver/Makefile
index 9d8e8ec77..6002039b3 100644
--- a/examples/device/net_lwip_webserver/Makefile
+++ b/examples/device/net_lwip_webserver/Makefile
@@ -1,7 +1,7 @@
 include ../../../hw/bsp/family_support.mk
 
 # suppress warning caused by lwip
-CFLAGS_GCC += \
+CFLAGS += \
   -Wno-error=null-dereference \
   -Wno-error=unused-parameter \
   -Wno-error=unused-variable
diff --git a/examples/dual/host_hid_to_device_cdc/Makefile b/examples/dual/host_hid_to_device_cdc/Makefile
index a51251bf9..595cd7dec 100644
--- a/examples/dual/host_hid_to_device_cdc/Makefile
+++ b/examples/dual/host_hid_to_device_cdc/Makefile
@@ -8,7 +8,7 @@ INC += \
 EXAMPLE_SOURCE += $(wildcard src/*.c)
 SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-CFLAGS_GCC += -Wno-error=cast-align -Wno-error=null-dereference
+CFLAGS += -Wno-error=cast-align -Wno-error=null-dereference
 
 SRC_C += \
 	src/class/hid/hid_host.c \
diff --git a/examples/dual/host_info_to_device_cdc/Makefile b/examples/dual/host_info_to_device_cdc/Makefile
index 659cf6ff9..3a1d87f57 100644
--- a/examples/dual/host_info_to_device_cdc/Makefile
+++ b/examples/dual/host_info_to_device_cdc/Makefile
@@ -8,7 +8,7 @@ INC += \
 EXAMPLE_SOURCE += $(wildcard src/*.c)
 SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
 
-CFLAGS_GCC += -Wno-error=cast-align -Wno-error=null-dereference
+CFLAGS += -Wno-error=cast-align -Wno-error=null-dereference
 
 SRC_C += \
 	src/host/hub.c \
diff --git a/examples/host/msc_file_explorer/Makefile b/examples/host/msc_file_explorer/Makefile
index 39d00d982..8c0b012ad 100644
--- a/examples/host/msc_file_explorer/Makefile
+++ b/examples/host/msc_file_explorer/Makefile
@@ -21,6 +21,6 @@ SRC_C += \
   $(FATFS_PATH)/ffunicode.c \
 
 # suppress warning caused by fatfs
-CFLAGS_GCC += -Wno-error=cast-qual
+CFLAGS += -Wno-error=cast-qual
 
 include ../../../hw/bsp/family_rules.mk
diff --git a/examples/host/msc_file_explorer/src/msc_app.c b/examples/host/msc_file_explorer/src/msc_app.c
index c7cc366b5..3f15bb84f 100644
--- a/examples/host/msc_file_explorer/src/msc_app.c
+++ b/examples/host/msc_file_explorer/src/msc_app.c
@@ -260,7 +260,7 @@ DRESULT disk_ioctl(BYTE  pdrv, /* Physical drive nmuber (0..) */
       return RES_OK;
 
     case GET_SECTOR_COUNT:
-      *((DWORD *)buff) = (WORD)tuh_msc_get_block_count(dev_addr, lun);
+      *((DWORD *)buff) = (DWORD)tuh_msc_get_block_count(dev_addr, lun);
       return RES_OK;
 
     case GET_SECTOR_SIZE:
diff --git a/hw/bsp/at32f402_405/family.mk b/hw/bsp/at32f402_405/family.mk
index 09b2f1139..5f9f3ccbb 100644
--- a/hw/bsp/at32f402_405/family.mk
+++ b/hw/bsp/at32f402_405/family.mk
@@ -5,7 +5,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 RHPORT_SPEED ?= OPT_MODE_FULL_SPEED OPT_MODE_FULL_SPEED
@@ -35,7 +35,7 @@ CFLAGS += \
 	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
 	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -55,11 +55,9 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/at32f403a_407/family.mk b/hw/bsp/at32f403a_407/family.mk
index f458881a3..f7dde7d90 100644
--- a/hw/bsp/at32f403a_407/family.mk
+++ b/hw/bsp/at32f403a_407/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F403A_407
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -30,11 +30,9 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/at32f413/family.mk b/hw/bsp/at32f413/family.mk
index abcd15d11..86744e1dc 100644
--- a/hw/bsp/at32f413/family.mk
+++ b/hw/bsp/at32f413/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F413
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -30,11 +30,9 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 # For freeRTOS port source
 FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/ARM_CM4F
diff --git a/hw/bsp/at32f415/family.mk b/hw/bsp/at32f415/family.mk
index 73a89c543..72339b782 100644
--- a/hw/bsp/at32f415/family.mk
+++ b/hw/bsp/at32f415/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4-nofpu
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F415 \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -30,10 +30,8 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 flash: flash-atlink
diff --git a/hw/bsp/at32f423/family.mk b/hw/bsp/at32f423/family.mk
index 960f4a9a1..df531460a 100644
--- a/hw/bsp/at32f423/family.mk
+++ b/hw/bsp/at32f423/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F423 \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -31,10 +31,8 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 flash: flash-atlink
diff --git a/hw/bsp/at32f425/family.mk b/hw/bsp/at32f425/family.mk
index 0a0a74414..b659608a3 100644
--- a/hw/bsp/at32f425/family.mk
+++ b/hw/bsp/at32f425/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4-nofpu
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F425 \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -30,10 +30,8 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 flash: flash-atlink
diff --git a/hw/bsp/at32f435_437/family.mk b/hw/bsp/at32f435_437/family.mk
index ba22f5420..73777400b 100644
--- a/hw/bsp/at32f435_437/family.mk
+++ b/hw/bsp/at32f435_437/family.mk
@@ -5,7 +5,7 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
@@ -15,7 +15,7 @@ CFLAGS += \
 	-DBOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED \
 	-DBOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -36,10 +36,8 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 flash: flash-atlink
diff --git a/hw/bsp/at32f45x/family.mk b/hw/bsp/at32f45x/family.mk
index e42f27557..a9fb1a078 100644
--- a/hw/bsp/at32f45x/family.mk
+++ b/hw/bsp/at32f45x/family.mk
@@ -5,13 +5,13 @@ include $(TOP)/$(BOARD_PATH)/board.mk
 
 CPU_CORE ?= cortex-m4
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto
 
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_AT32F45X \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-flto --specs=nosys.specs -nostdlib -nostartfiles
 
 SRC_C += \
@@ -31,10 +31,8 @@ INC += \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/core_support \
 	$(TOP)/$(AT32_SDK_LIB)/cmsis/cm4/device_support
 
-SRC_S_GCC += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
-SRC_S_IAR += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/startup_${AT32_FAMILY}.s
+SRC_S += ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/startup_${AT32_FAMILY}.s
 
-LD_FILE_GCC ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
-LD_FILE_IAR ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/iar/linker/${MCU_LINKER_NAME}.icf
+LD_FILE ?= ${AT32_SDK_LIB}/cmsis/cm4/device_support/startup/gcc/linker/${MCU_LINKER_NAME}_FLASH.ld
 
 flash: flash-atlink
diff --git a/hw/bsp/broadcom_32bit/family.mk b/hw/bsp/broadcom_32bit/family.mk
index 9d4a3b76c..a282e9961 100644
--- a/hw/bsp/broadcom_32bit/family.mk
+++ b/hw/bsp/broadcom_32bit/family.mk
@@ -15,7 +15,7 @@ CFLAGS += \
 CROSS_COMPILE = arm-none-eabi-
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
 
 SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
diff --git a/hw/bsp/broadcom_64bit/family.mk b/hw/bsp/broadcom_64bit/family.mk
index 1ce80e22b..37d381f9f 100644
--- a/hw/bsp/broadcom_64bit/family.mk
+++ b/hw/bsp/broadcom_64bit/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
 CROSS_COMPILE = aarch64-none-elf-
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=cast-qual -Wno-error=redundant-decls
+CFLAGS += -Wno-error=cast-qual -Wno-error=redundant-decls
 
 SRC_C += \
 	src/portable/synopsys/dwc2/dcd_dwc2.c \
diff --git a/hw/bsp/ch32v10x/family.mk b/hw/bsp/ch32v10x/family.mk
index d96d5012e..fb699b0bb 100644
--- a/hw/bsp/ch32v10x/family.mk
+++ b/hw/bsp/ch32v10x/family.mk
@@ -26,7 +26,7 @@ CFLAGS += \
 # https://github.com/openwch/ch32v20x/pull/12
 CFLAGS += -Wno-error=strict-prototypes
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-nostdlib -nostartfiles \
 	--specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/ch32v20x/family.mk b/hw/bsp/ch32v20x/family.mk
index 7042ecbb7..1d059bcba 100644
--- a/hw/bsp/ch32v20x/family.mk
+++ b/hw/bsp/ch32v20x/family.mk
@@ -37,7 +37,7 @@ else
   CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
 endif
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-nostdlib -nostartfiles \
 	--specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/ch32v30x/family.mk b/hw/bsp/ch32v30x/family.mk
index be6813914..5ccdea8ae 100644
--- a/hw/bsp/ch32v30x/family.mk
+++ b/hw/bsp/ch32v30x/family.mk
@@ -36,7 +36,7 @@ else
   CFLAGS += -DCFG_TUD_WCH_USBIP_USBFS=1
 endif
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/cxd56/family.mk b/hw/bsp/cxd56/family.mk
index adfe9ee82..627dc6ec2 100644
--- a/hw/bsp/cxd56/family.mk
+++ b/hw/bsp/cxd56/family.mk
@@ -32,7 +32,7 @@ CPU_CORE ?= cortex-m4
 # lwip/src/core/raw.c:334:43: error: declaration of 'recv' shadows a global declaration
 CFLAGS += -Wno-error=shadow  -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 SPRESENSE_SDK = $(TOP)/hw/mcu/sony/cxd56/spresense-exported-sdk
 
diff --git a/hw/bsp/da1469x/family.mk b/hw/bsp/da1469x/family.mk
index f35fe2cb5..878442e8e 100644
--- a/hw/bsp/da1469x/family.mk
+++ b/hw/bsp/da1469x/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_DA1469X \
   -DCFG_TUD_ENDPOINT0_SIZE=8\
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/efm32/family.mk b/hw/bsp/efm32/family.mk
index f115b6bd4..f8db0cc38 100644
--- a/hw/bsp/efm32/family.mk
+++ b/hw/bsp/efm32/family.mk
@@ -16,7 +16,7 @@ CPU_CORE ?= cortex-m4
 # EFM32_FAMILY should be set by board.mk (e.g. efm32gg12b)
 SILABS_CMSIS = hw/mcu/silabs/cmsis-dfp-$(EFM32_FAMILY)/Device/SiliconLabs/$(shell echo $(EFM32_FAMILY) | tr a-z A-Z)
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # All source paths should be relative to the top level.
 LD_FILE = $(SILABS_CMSIS)/Source/GCC/$(EFM32_FAMILY).ld
diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
index 7122a7764..69aa08922 100644
--- a/hw/bsp/family_support.mk
+++ b/hw/bsp/family_support.mk
@@ -7,12 +7,10 @@ to_upper = $(subst a,A,$(subst b,B,$(subst c,C,$(subst d,D,$(subst e,E,$(subst f
 
 #-------------------------------------------------------------
 # Toolchain
-# Can be changed via TOOLCHAIN=gcc|iar or CC=arm-none-eabi-gcc|iccarm|clang
+# Can be changed via TOOLCHAIN=gcc|clang or CC=arm-none-eabi-gcc|clang
 #-------------------------------------------------------------
 ifneq (,$(findstring clang,$(CC)))
   TOOLCHAIN = clang
-else ifneq (,$(findstring iccarm,$(CC)))
-  TOOLCHAIN = iar
 else ifneq (,$(findstring gcc,$(CC)))
   TOOLCHAIN = gcc
 endif
@@ -149,7 +147,7 @@ endif
 
 #---------------------- FreeRTOS -----------------------
 FREERTOS_SRC = lib/FreeRTOS-Kernel
-FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/$(if $(findstring iar,$(TOOLCHAIN)),IAR,GCC)
+FREERTOS_PORTABLE_PATH = $(FREERTOS_SRC)/portable/GCC
 
 ifeq ($(RTOS),freertos)
 	SRC_C += \
@@ -168,13 +166,13 @@ ifeq ($(RTOS),freertos)
 	CFLAGS += -DCFG_TUSB_OS=OPT_OS_FREERTOS
 
 	# Suppress FreeRTOSConfig.h warnings
-	CFLAGS_GCC += -Wno-error=redundant-decls
+	CFLAGS += -Wno-error=redundant-decls
 
 	# Suppress FreeRTOS source warnings
-	CFLAGS_GCC += -Wno-error=cast-qual
+	CFLAGS += -Wno-error=cast-qual
 
 	# FreeRTOS (lto + Os) linker issue
-	LDFLAGS_GCC += -Wl,--undefined=vTaskSwitchContext
+	LDFLAGS += -Wl,--undefined=vTaskSwitchContext
 endif
 
 #---------------- Helper ----------------
diff --git a/hw/bsp/fomu/family.mk b/hw/bsp/fomu/family.mk
index c29b1c70f..27404efb5 100644
--- a/hw/bsp/fomu/family.mk
+++ b/hw/bsp/fomu/family.mk
@@ -7,7 +7,7 @@ CFLAGS += \
   -flto \
   -DCFG_TUSB_MCU=OPT_MCU_VALENTYUSB_EPTRI
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/hpmicro/family.mk b/hw/bsp/hpmicro/family.mk
index f8cde55eb..ea4f0c003 100644
--- a/hw/bsp/hpmicro/family.mk
+++ b/hw/bsp/hpmicro/family.mk
@@ -27,7 +27,7 @@ endif
 CFLAGS += -Wno-error=cast-align -Wno-error=double-promotion -Wno-error=discarded-qualifiers \
           -Wno-error=undef -Wno-error=unused-parameter -Wno-error=redundant-decls
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/imxrt/family.mk b/hw/bsp/imxrt/family.mk
index 59735670a..59c3aa158 100644
--- a/hw/bsp/imxrt/family.mk
+++ b/hw/bsp/imxrt/family.mk
@@ -41,7 +41,7 @@ endif
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=implicit-fallthrough -Wno-error=redundant-decls
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/kinetis_k/family.mk b/hw/bsp/kinetis_k/family.mk
index 7a51a77d8..b1e1fb3aa 100644
--- a/hw/bsp/kinetis_k/family.mk
+++ b/hw/bsp/kinetis_k/family.mk
@@ -12,7 +12,7 @@ LDFLAGS += \
   -Wl,--defsym,__stack_size__=0x400 \
   -Wl,--defsym,__heap_size__=0
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
index 513b78d66..bc6a4a1ba 100644
--- a/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
+++ b/hw/bsp/kinetis_k32l/boards/frdm_k32l2a4s/board.mk
@@ -3,7 +3,7 @@ MCU_VARIANT = K32L2A41A
 CFLAGS += -DCPU_K32L2A41VLH1A
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
+CFLAGS += -Wno-error=unused-parameter -Wno-error=redundant-decls -Wno-error=cast-qual
 
 # All source paths should be relative to the top level.
 LD_FILE = $(MCUX_DEVICES)/K32L/$(MCU_VARIANT)/gcc/K32L2A41xxxxA_flash.ld
diff --git a/hw/bsp/kinetis_k32l/family.mk b/hw/bsp/kinetis_k32l/family.mk
index 2802337d3..a99fb5dbe 100644
--- a/hw/bsp/kinetis_k32l/family.mk
+++ b/hw/bsp/kinetis_k32l/family.mk
@@ -8,7 +8,7 @@ MCUX_DEVICES = hw/mcu/nxp/mcux-devices-kinetis
 CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_KINETIS_K32L
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   -specs=nosys.specs -specs=nano.specs
 
diff --git a/hw/bsp/kinetis_kl/family.mk b/hw/bsp/kinetis_kl/family.mk
index aec53d486..201ab99dc 100644
--- a/hw/bsp/kinetis_kl/family.mk
+++ b/hw/bsp/kinetis_kl/family.mk
@@ -12,7 +12,7 @@ LDFLAGS += \
   -Wl,--defsym,__stack_size__=0x400 \
   -Wl,--defsym,__heap_size__=0
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   -specs=nosys.specs -specs=nano.specs \
 
diff --git a/hw/bsp/lpc11/family.mk b/hw/bsp/lpc11/family.mk
index a3ec33768..8ac3ecb6a 100644
--- a/hw/bsp/lpc11/family.mk
+++ b/hw/bsp/lpc11/family.mk
@@ -13,7 +13,7 @@ CFLAGS += \
 CFLAGS += \
   -Wno-error=incompatible-pointer-types \
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c \
diff --git a/hw/bsp/lpc13/family.mk b/hw/bsp/lpc13/family.mk
index 7ff2c058a..0fed67ebc 100644
--- a/hw/bsp/lpc13/family.mk
+++ b/hw/bsp/lpc13/family.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC13XX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # startup.c and lpc_types.h cause following errors
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=redundant-decls
diff --git a/hw/bsp/lpc15/family.mk b/hw/bsp/lpc15/family.mk
index 3267e973a..a42b2d9e4 100644
--- a/hw/bsp/lpc15/family.mk
+++ b/hw/bsp/lpc15/family.mk
@@ -10,10 +10,10 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC15XX \
   -DCFG_TUSB_MEM_ALIGN='__attribute__((aligned(64)))'
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
+CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=unused-variable -Wno-error=cast-qual
 
 MCU_DIR = hw/mcu/nxp/lpcopen/lpc15xx/lpc_chip_15xx
 
diff --git a/hw/bsp/lpc17/family.mk b/hw/bsp/lpc17/family.mk
index f1ed1a7d0..5d4ff54a6 100644
--- a/hw/bsp/lpc17/family.mk
+++ b/hw/bsp/lpc17/family.mk
@@ -11,12 +11,12 @@ CFLAGS += \
   -DRTC_EV_SUPPORT=0
 
 # lpc_types.h cause following errors
-CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=cast-qual
+CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
 
 # caused by freeRTOS port !!
 CFLAGS += -Wno-error=maybe-uninitialized
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/nxp/lpc17_40/dcd_lpc17_40.c \
diff --git a/hw/bsp/lpc18/family.mk b/hw/bsp/lpc18/family.mk
index 3bbafed11..5c46881e2 100644
--- a/hw/bsp/lpc18/family.mk
+++ b/hw/bsp/lpc18/family.mk
@@ -11,9 +11,9 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC18XX
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-qual
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-qual
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
diff --git a/hw/bsp/lpc40/family.mk b/hw/bsp/lpc40/family.mk
index c21923000..af8864335 100644
--- a/hw/bsp/lpc40/family.mk
+++ b/hw/bsp/lpc40/family.mk
@@ -11,9 +11,9 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC40XX
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
+CFLAGS += -Wno-error=strict-prototypes -Wno-error=unused-parameter -Wno-error=cast-qual
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 # All source paths should be relative to the top level.
 SRC_C += \
diff --git a/hw/bsp/lpc43/family.mk b/hw/bsp/lpc43/family.mk
index 39be867d1..5813dfdcc 100644
--- a/hw/bsp/lpc43/family.mk
+++ b/hw/bsp/lpc43/family.mk
@@ -9,14 +9,14 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_LPC43XX
 
 # mcu driver cause following warnings
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -nostdlib \
   -Wno-error=unused-parameter \
   -Wno-error=cast-qual \
   -Wno-error=incompatible-pointer-types \
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 SRC_C += \
 	src/portable/chipidea/ci_hs/dcd_ci_hs.c \
diff --git a/hw/bsp/lpc51/family.mk b/hw/bsp/lpc51/family.mk
index 34987d183..e295d0587 100644
--- a/hw/bsp/lpc51/family.mk
+++ b/hw/bsp/lpc51/family.mk
@@ -12,7 +12,7 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/lpc54/family.mk b/hw/bsp/lpc54/family.mk
index 94168f6b2..324b3b6f1 100644
--- a/hw/bsp/lpc54/family.mk
+++ b/hw/bsp/lpc54/family.mk
@@ -23,7 +23,7 @@ endif
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/lpc55/family.mk b/hw/bsp/lpc55/family.mk
index 2fc76ed50..a9b6f6af1 100644
--- a/hw/bsp/lpc55/family.mk
+++ b/hw/bsp/lpc55/family.mk
@@ -41,7 +41,7 @@ endif
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=float-equal
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
   -Wl,--defsym=__stack_size__=0x1000 \
diff --git a/hw/bsp/maxim/family.mk b/hw/bsp/maxim/family.mk
index 3ddf8cf39..9d66553fc 100644
--- a/hw/bsp/maxim/family.mk
+++ b/hw/bsp/maxim/family.mk
@@ -60,8 +60,8 @@ CFLAGS += \
 	-Wno-error=sign-compare \
 	-Wno-error=enum-conversion \
 
-LDFLAGS_GCC += -nostartfiles --specs=nosys.specs --specs=nano.specs
-LD_FILE_GCC ?= $(FAMILY_PATH)/linker/${MAX_DEVICE}.ld
+LDFLAGS += -nostartfiles --specs=nosys.specs --specs=nano.specs
+LD_FILE ?= $(FAMILY_PATH)/linker/${MAX_DEVICE}.ld
 
 # If the applications needs to be signed (for the MAX32651), sign it first and
 # then need to use MSDK's OpenOCD to flash it
@@ -99,7 +99,7 @@ SRC_C += \
 	${MSDK_LIB}/PeriphDrivers/Source/UART/uart_common.c \
 	${MSDK_LIB}/PeriphDrivers/Source/UART/uart_${PERIPH_SUFFIX}${PERIPH_ID}.c \
 
-SRC_S_GCC += ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S
+SRC_S += ${MSDK_LIB}/CMSIS/Device/Maxim/${MAX_DEVICE_UPPER}/Source/GCC/startup_${MAX_DEVICE}.S
 
 INC += \
 	$(TOP)/$(BOARD_PATH) \
diff --git a/hw/bsp/mcx/family.mk b/hw/bsp/mcx/family.mk
index 3d63eb238..c5dd945b9 100644
--- a/hw/bsp/mcx/family.mk
+++ b/hw/bsp/mcx/family.mk
@@ -15,7 +15,7 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   --specs=nosys.specs --specs=nano.specs \
   -Wl,--defsym=__stack_size__=0x1000 \
   -Wl,--defsym=__heap_size__=0 \
diff --git a/hw/bsp/mm32/family.mk b/hw/bsp/mm32/family.mk
index a790663ab..5e40fd09e 100644
--- a/hw/bsp/mm32/family.mk
+++ b/hw/bsp/mm32/family.mk
@@ -13,7 +13,7 @@ CFLAGS += \
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=unused-parameter -Wno-error=maybe-uninitialized -Wno-error=cast-qual
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   -specs=nosys.specs -specs=nano.specs \
 
diff --git a/hw/bsp/msp432e4/family.mk b/hw/bsp/msp432e4/family.mk
index d837f9351..7a7a17b61 100644
--- a/hw/bsp/msp432e4/family.mk
+++ b/hw/bsp/msp432e4/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=cast-qual -Wno-error=format=
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 LD_FILE = hw/mcu/ti/msp432e4/Source/${MCU_VARIANT}.ld
 
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index 2cead99db..e7e9e7d0a 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -42,7 +42,7 @@ CFLAGS += \
 #CFLAGS += -D__START=main
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=undef \
   -Wno-error=unused-parameter \
@@ -51,7 +51,7 @@ CFLAGS_GCC += \
   -Wno-error=cast-qual \
   -Wno-error=redundant-decls \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
   -L$(TOP)/${NRFX_PATH}/mdk
diff --git a/hw/bsp/nuc100_120/family.mk b/hw/bsp/nuc100_120/family.mk
index f9afb4f72..e915e3e33 100644
--- a/hw/bsp/nuc100_120/family.mk
+++ b/hw/bsp/nuc100_120/family.mk
@@ -8,7 +8,7 @@ CFLAGS += \
 
 CPU_CORE ?= cortex-m0
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # LD_FILE is defined in board.mk
 
diff --git a/hw/bsp/nuc121_125/family.mk b/hw/bsp/nuc121_125/family.mk
index f46dac6e4..979e8ac9f 100644
--- a/hw/bsp/nuc121_125/family.mk
+++ b/hw/bsp/nuc121_125/family.mk
@@ -12,7 +12,7 @@ CPU_CORE ?= cortex-m0
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=redundant-decls
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   --specs=nosys.specs --specs=nano.specs
 
 # All source paths should be relative to the top level.
diff --git a/hw/bsp/nuc126/family.mk b/hw/bsp/nuc126/family.mk
index 37df7aaab..f2f02b621 100644
--- a/hw/bsp/nuc126/family.mk
+++ b/hw/bsp/nuc126/family.mk
@@ -13,7 +13,7 @@ CPU_CORE ?= cortex-m0
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # All source paths should be relative to the top level.
 # LD_FILE is defined in board.mk
diff --git a/hw/bsp/nuc505/family.mk b/hw/bsp/nuc505/family.mk
index e1f25e2db..d776defde 100644
--- a/hw/bsp/nuc505/family.mk
+++ b/hw/bsp/nuc505/family.mk
@@ -9,7 +9,7 @@ CPU_CORE ?= cortex-m4
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # LD_FILE is defined in board.mk
 
diff --git a/hw/bsp/ra/family.mk b/hw/bsp/ra/family.mk
index 6ac7c262f..64a707ed6 100644
--- a/hw/bsp/ra/family.mk
+++ b/hw/bsp/ra/family.mk
@@ -39,7 +39,7 @@ CFLAGS += \
 	-DBOARD_TUH_RHPORT=${RHPORT_HOST} \
 	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED}
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 	-Wno-error=undef \
 	-Wno-error=strict-prototypes \
@@ -49,7 +49,7 @@ CFLAGS_GCC += \
 	-Wno-error=unused-variable \
 	-ffreestanding
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-nostartfiles -nostdlib \
   -specs=nosys.specs -specs=nano.specs
 
diff --git a/hw/bsp/rw61x/family.mk b/hw/bsp/rw61x/family.mk
index 08eafddbc..4893f717f 100644
--- a/hw/bsp/rw61x/family.mk
+++ b/hw/bsp/rw61x/family.mk
@@ -17,7 +17,7 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=unused-parameter -Wno-error=old-style-declaration -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # All source paths should be relative to the top level.
 LD_FILE ?= $(SDK_DIR)/devices/$(MCU_VARIANT)/gcc/$(MCU_CORE)_flash.ld
diff --git a/hw/bsp/rx/family.mk b/hw/bsp/rx/family.mk
index 8b23b6c46..a357460e8 100644
--- a/hw/bsp/rx/family.mk
+++ b/hw/bsp/rx/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
 # suppress warning caused by vendor mcu driver
 CFLAGS += -Wno-error=redundant-decls
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 SRC_C += \
 	src/portable/renesas/rusb2/dcd_rusb2.c \
diff --git a/hw/bsp/samd11/family.mk b/hw/bsp/samd11/family.mk
index 6f89a2d66..327ec44c2 100644
--- a/hw/bsp/samd11/family.mk
+++ b/hw/bsp/samd11/family.mk
@@ -17,7 +17,7 @@ CFLAGS += -Wno-error=redundant-decls
 # SAM driver is flooded with -Wcast-qual which slow down complication significantly
 CFLAGS_SKIP += -Wcast-qual
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 SRC_C += \
 	src/portable/microchip/samd/dcd_samd.c \
diff --git a/hw/bsp/samd2x_l2x/family.mk b/hw/bsp/samd2x_l2x/family.mk
index dca440ddd..2ff01e8b7 100644
--- a/hw/bsp/samd2x_l2x/family.mk
+++ b/hw/bsp/samd2x_l2x/family.mk
@@ -39,7 +39,7 @@ CFLAGS += -Wno-error=redundant-decls
 # SAM driver is flooded with -Wcast-qual which slow down complication significantly
 CFLAGS_SKIP += -Wcast-qual
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/samd5x_e5x/family.mk b/hw/bsp/samd5x_e5x/family.mk
index f0a4a3f00..c544508dc 100644
--- a/hw/bsp/samd5x_e5x/family.mk
+++ b/hw/bsp/samd5x_e5x/family.mk
@@ -12,7 +12,7 @@ CFLAGS += \
 # SAM driver is flooded with -Wcast-qual which slow down complication significantly
 CFLAGS_SKIP += -Wcast-qual
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/same7x/family.mk b/hw/bsp/same7x/family.mk
index 19e119625..02e940c5a 100644
--- a/hw/bsp/same7x/family.mk
+++ b/hw/bsp/same7x/family.mk
@@ -18,7 +18,7 @@ CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align -Wno-error=redundant
 # SAM driver is flooded with -Wcast-qual which slows down compilation significantly
 CFLAGS_SKIP += -Wcast-qual
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 # All source paths should be relative to the top level.
 SRC_C += \
diff --git a/hw/bsp/samg/family.mk b/hw/bsp/samg/family.mk
index d5d2e6122..037ac4709 100644
--- a/hw/bsp/samg/family.mk
+++ b/hw/bsp/samg/family.mk
@@ -13,7 +13,7 @@ CFLAGS += -Wno-error=undef -Wno-error=null-dereference -Wno-error=redundant-decl
 # SAM driver is flooded with -Wcast-qual which slow down complication significantly
 CFLAGS_SKIP += -Wcast-qual
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs \
 
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
index fd22fc8d4..f2657e8c5 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
 	-DSTM32C071xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32c071xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32c071xx.s
+LD_FILE = $(BOARD_PATH)/STM32C071RBTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32c071xx.s
-LD_FILE_IAR = $(BOARD_PATH)/stm32c071xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32c071rb
diff --git a/hw/bsp/stm32c0/family.mk b/hw/bsp/stm32c0/family.mk
index 71209bf2e..44ec2531e 100644
--- a/hw/bsp/stm32c0/family.mk
+++ b/hw/bsp/stm32c0/family.mk
@@ -13,13 +13,13 @@ CFLAGS += \
   -DCFG_EXAMPLE_VIDEO_READONLY \
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += -Wno-error=cast-align -Wno-error=unused-parameter
+CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
index 63f6a31c2..ea3cf34b4 100644
--- a/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f070rbnucleo/board.mk
@@ -3,7 +3,7 @@ MCU_VARIANT = stm32f070xb
 CFLAGS += -DSTM32F070xB -DCFG_EXAMPLE_VIDEO_READONLY
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/stm32F070rbtx_flash.ld
+LD_FILE = $(BOARD_PATH)/stm32F070rbtx_flash.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f070rb
diff --git a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
index 57c658629..e23af42e1 100644
--- a/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f072disco/board.mk
@@ -3,7 +3,7 @@ MCU_VARIANT = stm32f072xb
 CFLAGS += -DSTM32F072xB -DCFG_EXAMPLE_VIDEO_READONLY
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F072RBTx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f072rb
diff --git a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
index bab889524..fec26c7cc 100644
--- a/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
+++ b/hw/bsp/stm32f0/boards/stm32f072eval/board.mk
@@ -3,7 +3,7 @@ MCU_VARIANT = stm32f072xb
 CFLAGS += -DSTM32F072xB -DLSI_VALUE=40000 -DCFG_EXAMPLE_VIDEO_READONLY
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F072VBTx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f072vb
diff --git a/hw/bsp/stm32f0/family.mk b/hw/bsp/stm32f0/family.mk
index b5efdcb8d..ac0c4fa14 100644
--- a/hw/bsp/stm32f0/family.mk
+++ b/hw/bsp/stm32f0/family.mk
@@ -14,13 +14,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F0
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += -Wno-error=unused-parameter -Wno-error=cast-align
+CFLAGS += -Wno-error=unused-parameter -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -48,8 +48,6 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
index 6c5f34501..745a2eb8f 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
+++ b/hw/bsp/stm32f1/boards/stm32f103_bluepill/board.mk
@@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xb
 CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U -DCFG_EXAMPLE_VIDEO_READONLY
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F103X8_FLASH.ld
-LD_FILE_IAR = $(BOARD_PATH)/stm32f103x8_flash.icf
+LD_FILE = $(BOARD_PATH)/STM32F103X8_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103c8
diff --git a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
index 7e95c1fe1..2d153dd81 100644
--- a/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
+++ b/hw/bsp/stm32f1/boards/stm32f103_mini_2/board.mk
@@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xb
 CFLAGS += -DSTM32F103xB -DHSE_VALUE=8000000U
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F103XC_FLASH.ld
-LD_FILE_IAR = $(BOARD_PATH)/stm32f103xc_flash.icf
+LD_FILE = $(BOARD_PATH)/STM32F103XC_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103rc
diff --git a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
index 5b17d8036..ca4efd357 100644
--- a/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
+++ b/hw/bsp/stm32f1/boards/stm32f103ze_iar/board.mk
@@ -3,8 +3,7 @@ MCU_VARIANT = stm32f103xe
 CFLAGS += -DSTM32F103xE -DHSE_VALUE=8000000U
 
 # Linker
-LD_FILE_GCC = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
-LD_FILE_IAR = ${ST_CMSIS}/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
+LD_FILE = ${ST_CMSIS}/Source/Templates/gcc/linker/STM32F103XE_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f103ze
diff --git a/hw/bsp/stm32f1/family.mk b/hw/bsp/stm32f1/family.mk
index ca022c7ec..a096fe17a 100644
--- a/hw/bsp/stm32f1/family.mk
+++ b/hw/bsp/stm32f1/family.mk
@@ -12,13 +12,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F1
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=cast-align
+CFLAGS += -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   -specs=nosys.specs -specs=nano.specs
 
@@ -44,8 +44,7 @@ INC += \
   ${TOP}/${ST_HAL_DRIVER}/Inc
 
 # Startup
-SRC_S_GCC += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
-SRC_S_IAR += ${ST_CMSIS}/Source/Templates/iar/startup_${MCU_VARIANT}.s
+SRC_S += ${ST_CMSIS}/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 
 # flash target ROM bootloader: flash-dfu-util
 DFU_UTIL_OPTION = -a 0 --dfuse-address 0x08000000
diff --git a/hw/bsp/stm32f2/family.mk b/hw/bsp/stm32f2/family.mk
index ef14a9d67..e5a44ebba 100644
--- a/hw/bsp/stm32f2/family.mk
+++ b/hw/bsp/stm32f2/family.mk
@@ -9,11 +9,11 @@ CFLAGS += \
 	-DCFG_TUSB_MCU=OPT_MCU_STM32F2
 
 # mcu driver cause following warnings
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=sign-compare
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -35,8 +35,6 @@ INC += \
   $(TOP)/$(BOARD_PATH)
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 
 # Linker
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
diff --git a/hw/bsp/stm32f3/family.mk b/hw/bsp/stm32f3/family.mk
index eb4a4e186..ff7558b73 100644
--- a/hw/bsp/stm32f3/family.mk
+++ b/hw/bsp/stm32f3/family.mk
@@ -9,11 +9,11 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32F3
 
 # mcu driver cause following warnings
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=unused-parameter
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -34,8 +34,6 @@ INC += \
   $(TOP)/$(BOARD_PATH)
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 
 # Linker
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/${MCU_VARIANT}_flash.icf
diff --git a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
index cfd1d8b3b..1b24940fc 100644
--- a/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
+++ b/hw/bsp/stm32f4/boards/feather_stm32f405/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F405xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
+LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f405rg
diff --git a/hw/bsp/stm32f4/boards/pyboardv11/board.mk b/hw/bsp/stm32f4/boards/pyboardv11/board.mk
index 4c52e004a..8aac5c4d7 100644
--- a/hw/bsp/stm32f4/boards/pyboardv11/board.mk
+++ b/hw/bsp/stm32f4/boards/pyboardv11/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F405xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f405xx.s
+LD_FILE = $(BOARD_PATH)/STM32F405RGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f405xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f405xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f405rg
diff --git a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
index 3285bd232..e094cf012 100644
--- a/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f401blackpill/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F401xC
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f401xc.s
+LD_FILE = $(BOARD_PATH)/STM32F401VCTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f401xc.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f401xc_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f401cc
diff --git a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
index c46a78f81..db1719238 100644
--- a/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f407blackvet/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F407xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F407VETx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
+LD_FILE = $(BOARD_PATH)/STM32F407VETx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
 
 
 # For flash-jlink target
diff --git a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
index 4de656b0c..5faba55eb 100644
--- a/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f407disco/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F407xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f407xx.s
+LD_FILE = $(BOARD_PATH)/STM32F407VGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f407xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f407xx_flash.icf
 
 
 # For flash-jlink target
diff --git a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
index c45aba79b..9ff7d0fe3 100644
--- a/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f411blackpill/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F411xE -DHSE_VALUE=25000000
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
+LD_FILE = $(BOARD_PATH)/STM32F411CEUx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f411ce
diff --git a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
index 09fa50bd3..8e922e078 100644
--- a/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f411disco/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F411xE
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f411xe.s
+LD_FILE = $(BOARD_PATH)/STM32F411VETx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f411xe.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f411xe_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f411ve
diff --git a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
index f767ac6c4..e89d673e2 100644
--- a/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f412disco/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F412Zx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
+LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f412zg
diff --git a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
index f767ac6c4..e89d673e2 100644
--- a/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f412nucleo/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F412Zx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f412zx.s
+LD_FILE = $(BOARD_PATH)/STM32F412ZGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f412zx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f412zx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f412zg
diff --git a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
index 2ab32b7f3..97f4aac36 100644
--- a/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
+++ b/hw/bsp/stm32f4/boards/stm32f439nucleo/board.mk
@@ -1,12 +1,9 @@
 CFLAGS += -DSTM32F439xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32f439xx.s
+LD_FILE = $(BOARD_PATH)/STM32F439ZITX_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32f439xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32f439xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f439zi
diff --git a/hw/bsp/stm32f4/family.mk b/hw/bsp/stm32f4/family.mk
index f3e74ecea..f0f0731d9 100644
--- a/hw/bsp/stm32f4/family.mk
+++ b/hw/bsp/stm32f4/family.mk
@@ -43,13 +43,13 @@ CFLAGS += \
 	-DBOARD_TUH_MAX_SPEED=${RHPORT_HOST_SPEED} \
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += -Wno-error=cast-align
+CFLAGS += -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
index a19e455c7..8082a29d6 100644
--- a/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
+++ b/hw/bsp/stm32f7/boards/stlinkv3mini/board.mk
@@ -13,7 +13,7 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
index 9b8e7a969..b75192962 100644
--- a/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f723disco/board.mk
@@ -10,7 +10,7 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F723xE_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F723xE_FLASH.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
index c2b54406e..b652ffca4 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.mk
@@ -12,7 +12,7 @@ CFLAGS += \
   -DHSE_VALUE=25000000
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
index fe7104eca..21697a300 100644
--- a/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f746nucleo/board.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -DHSE_VALUE=8000000
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F746ZGTx_FLASH.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
index d61e0a00d..9705297cf 100644
--- a/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f767nucleo/board.mk
@@ -11,7 +11,7 @@ CFLAGS += \
 	-DHSE_VALUE=8000000 \
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F767ZITx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32f767zi
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
index e756c9727..e2566e989 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.mk
@@ -13,7 +13,7 @@ CFLAGS += \
   -DHSE_VALUE=25000000 \
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32F769ZITx_FLASH.ld
 
 JLINK_DEVICE = stm32f769ni
 
diff --git a/hw/bsp/stm32f7/family.mk b/hw/bsp/stm32f7/family.mk
index d3422e03c..ecda4caf4 100644
--- a/hw/bsp/stm32f7/family.mk
+++ b/hw/bsp/stm32f7/family.mk
@@ -56,13 +56,13 @@ CFLAGS += \
 #endif
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # mcu driver cause following warnings
-CFLAGS_GCC += -Wno-error=cast-align
+CFLAGS += -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -91,8 +91,6 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
index 6a6078d5f..9b9128e44 100644
--- a/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
+++ b/hw/bsp/stm32g0/boards/stm32g0b1nucleo/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
 	-DSTM32G0B1xx
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32g0b1xx.s
+LD_FILE = $(BOARD_PATH)/STM32G0B1RETx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32g0b1xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32g0b1xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g0b1re
diff --git a/hw/bsp/stm32g0/family.mk b/hw/bsp/stm32g0/family.mk
index e376f7f06..85ae38e37 100644
--- a/hw/bsp/stm32g0/family.mk
+++ b/hw/bsp/stm32g0/family.mk
@@ -13,13 +13,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G0
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += -Wno-error=cast-align
+CFLAGS += -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
index 6266b3ccc..a2b4dddf9 100644
--- a/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
+++ b/hw/bsp/stm32g4/boards/b_g474e_dpow1/board.mk
@@ -4,7 +4,7 @@ CFLAGS += \
 	-DSTM32G474xx \
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g474re
diff --git a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
index dc46af1d1..77178d2bc 100644
--- a/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
+++ b/hw/bsp/stm32g4/boards/stm32g474nucleo/board.mk
@@ -5,7 +5,7 @@ CFLAGS += \
 	-DHSE_VALUE=24000000
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32G474RETx_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g474re
diff --git a/hw/bsp/stm32g4/boards/stm32g491nucleo/board.mk b/hw/bsp/stm32g4/boards/stm32g491nucleo/board.mk
index c0f876331..0ef3642dd 100644
--- a/hw/bsp/stm32g4/boards/stm32g491nucleo/board.mk
+++ b/hw/bsp/stm32g4/boards/stm32g491nucleo/board.mk
@@ -5,7 +5,7 @@ CFLAGS += \
 	-DHSE_VALUE=24000000
 
 # Linker
-LD_FILE_GCC = $(BOARD_PATH)/STM32G491RETX_FLASH.ld
+LD_FILE = $(BOARD_PATH)/STM32G491RETX_FLASH.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32g491re
diff --git a/hw/bsp/stm32g4/family.mk b/hw/bsp/stm32g4/family.mk
index a153194ce..1882af43b 100644
--- a/hw/bsp/stm32g4/family.mk
+++ b/hw/bsp/stm32g4/family.mk
@@ -13,13 +13,13 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32G4
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += -Wno-error=cast-align
+CFLAGS += -Wno-error=cast-align
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -48,11 +48,9 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32h5/family.mk b/hw/bsp/stm32h5/family.mk
index e34bb513e..6f76872bc 100644
--- a/hw/bsp/stm32h5/family.mk
+++ b/hw/bsp/stm32h5/family.mk
@@ -15,11 +15,11 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32H5
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -Wno-error=cast-align \
   -Wno-error=undef \
   -Wno-error=unused-parameter \
@@ -27,7 +27,7 @@ CFLAGS_GCC += \
 CFLAGS_CLANG += \
   -Wno-error=parentheses-equality
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -59,12 +59,10 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
-LD_FILE_GCC = $(FAMILY_PATH)/linker/$(MCU_VARIANT_UPPER)_FLASH.ld
+LD_FILE = $(FAMILY_PATH)/linker/$(MCU_VARIANT_UPPER)_FLASH.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32h7/boards/daisyseed/board.mk b/hw/bsp/stm32h7/boards/daisyseed/board.mk
index bb254cfc2..5898b4b12 100644
--- a/hw/bsp/stm32h7/boards/daisyseed/board.mk
+++ b/hw/bsp/stm32h7/boards/daisyseed/board.mk
@@ -1,7 +1,7 @@
 MCU_VARIANT = stm32h750xx
 CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=16000000
 
-LD_FILE_GCC = $(BOARD_PATH)/stm32h750ibkx_flash.ld
+LD_FILE = $(BOARD_PATH)/stm32h750ibkx_flash.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h750ibk6_m7
diff --git a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
index c1a98a025..79b521e2a 100644
--- a/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h723nucleo/board.mk
@@ -1,7 +1,7 @@
 MCU_VARIANT = stm32h723xx
 CFLAGS += -DSTM32H723xx -DHSE_VALUE=8000000
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
+LD_FILE = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h723zg
diff --git a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
index 67b403932..8f27f6460 100644
--- a/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743eval/board.mk
@@ -5,7 +5,7 @@ RHPORT_SPEED = OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
 RHPORT_DEVICE ?= 1
 RHPORT_HOST ?= 0
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
+LD_FILE = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
 
 SRC_C += \
   ${ST_MFXSTM32L152}/mfxstm32l152.c \
diff --git a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
index d904de6d2..269137e61 100644
--- a/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h743nucleo/board.mk
@@ -1,7 +1,7 @@
 MCU_VARIANT = stm32h743xx
 CFLAGS += -DSTM32H743xx -DHSE_VALUE=8000000
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
+LD_FILE = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h743zi
diff --git a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
index 64003f5a9..79387f26a 100644
--- a/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h745disco/board.mk
@@ -6,8 +6,7 @@ CFLAGS += -DSTM32H745xx -DCORE_CM7 -DHSE_VALUE=25000000
 # Default is FulSpeed port
 PORT ?= 0
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash_CM7.ld
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h745xx_flash_CM7.icf
+LD_FILE = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash_CM7.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h745xi_m7
diff --git a/hw/bsp/stm32h7/boards/stm32h747disco/board.mk b/hw/bsp/stm32h7/boards/stm32h747disco/board.mk
index 4b17246e2..4fb7cfd48 100644
--- a/hw/bsp/stm32h7/boards/stm32h747disco/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h747disco/board.mk
@@ -6,8 +6,7 @@ CFLAGS += -DSTM32H747xx -DCORE_CM7 -DHSE_VALUE=25000000
 # Default is FulSpeed port
 PORT ?= 0
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash_CM7.ld
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32h747xx_flash_CM7.icf
+LD_FILE = $(FAMILY_PATH)/linker/${MCU_VARIANT}_flash_CM7.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h747xi_m7
diff --git a/hw/bsp/stm32h7/boards/stm32h750_weact/board.mk b/hw/bsp/stm32h7/boards/stm32h750_weact/board.mk
index 988fed804..87c81cb63 100644
--- a/hw/bsp/stm32h7/boards/stm32h750_weact/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h750_weact/board.mk
@@ -3,7 +3,7 @@
 MCU_VARIANT = stm32h750xx
 CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=25000000
 
-LD_FILE_GCC = $(BOARD_PATH)/stm32h750xx_flash_CM7.ld
+LD_FILE = $(BOARD_PATH)/stm32h750xx_flash_CM7.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h750vb
diff --git a/hw/bsp/stm32h7/boards/stm32h750bdk/board.mk b/hw/bsp/stm32h7/boards/stm32h750bdk/board.mk
index 6eb3eb498..dec138f92 100644
--- a/hw/bsp/stm32h7/boards/stm32h750bdk/board.mk
+++ b/hw/bsp/stm32h7/boards/stm32h750bdk/board.mk
@@ -3,7 +3,7 @@
 MCU_VARIANT = stm32h750xx
 CFLAGS += -DSTM32H750xx -DCORE_CM7 -DHSE_VALUE=25000000
 
-LD_FILE_GCC = $(BOARD_PATH)/stm32h750xx_flash_CM7.ld
+LD_FILE = $(BOARD_PATH)/stm32h750xx_flash_CM7.ld
 
 # For flash-jlink target
 JLINK_DEVICE = stm32h750xb
diff --git a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
index 5ff2f4165..65c1fff09 100644
--- a/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
+++ b/hw/bsp/stm32h7/boards/waveshare_openh743i/board.mk
@@ -5,7 +5,7 @@ RHPORT_SPEED = OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED
 RHPORT_DEVICE ?= 1
 RHPORT_HOST ?= 0
 
-LD_FILE_GCC = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
+LD_FILE = $(FAMILY_PATH)/linker/stm32h743xx_flash.ld
 
 # Use Timer module for ULPI PHY reset
 CFLAGS += -DHAL_TIM_MODULE_ENABLED
diff --git a/hw/bsp/stm32h7/family.mk b/hw/bsp/stm32h7/family.mk
index 19a085424..3978b2eb0 100644
--- a/hw/bsp/stm32h7/family.mk
+++ b/hw/bsp/stm32h7/family.mk
@@ -46,12 +46,12 @@ CFLAGS += \
 
 # GCC Flags
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=cast-align \
   -Wno-error=unused-parameter \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -84,8 +84,6 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32h7rs/family.mk b/hw/bsp/stm32h7rs/family.mk
index 7082cc900..d1336a773 100644
--- a/hw/bsp/stm32h7rs/family.mk
+++ b/hw/bsp/stm32h7rs/family.mk
@@ -47,15 +47,15 @@ CFLAGS += \
 	-DBUFFER_SIZE_UP=0x300 \
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -Wno-error=cast-align \
   -Wno-error=unused-parameter \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -87,9 +87,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_GCC ?= $(FAMILY_PATH)/linker/$(MCU_VARIANT)_flash.ld
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
+LD_FILE ?= $(FAMILY_PATH)/linker/$(MCU_VARIANT)_flash.ld
diff --git a/hw/bsp/stm32l0/family.mk b/hw/bsp/stm32l0/family.mk
index 0ae881fdf..b72e077f3 100644
--- a/hw/bsp/stm32l0/family.mk
+++ b/hw/bsp/stm32l0/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32L0
 
 # mcu driver cause following warnings
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 	-Wno-error=unused-parameter \
 	-Wno-error=redundant-decls \
@@ -21,7 +21,7 @@ CFLAGS_GCC += \
 CFLAGS_CLANG += \
   -Wno-error=parentheses-equality
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -43,8 +43,6 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 
 # Linker
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
index 87b333500..c9b2ab9fa 100644
--- a/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l412nucleo/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
   -DSTM32L412xx \
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l412xx.s
+LD_FILE = $(BOARD_PATH)/STM32L412KBUx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l412xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l412xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l412kb
diff --git a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
index 3ba9ab444..23f0966ee 100644
--- a/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l476disco/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
   -DSTM32L476xx \
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l476xx.s
+LD_FILE = $(BOARD_PATH)/STM32L476VGTx_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l476xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l476xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l476vg
diff --git a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
index bc0a63c1c..21666b026 100644
--- a/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l496nucleo/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
   -DSTM32L496xx \
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l496xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L496ZGTX_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l496xx.s
+LD_FILE = $(BOARD_PATH)/STM32L496ZGTX_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l496xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l496xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l496zg
diff --git a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
index 84f831878..09357ff4f 100644
--- a/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l4p5nucleo/board.mk
@@ -2,12 +2,9 @@ CFLAGS += \
   -DSTM32L4P5xx \
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4p5xx.s
+LD_FILE = $(BOARD_PATH)/STM32L4P5ZGTX_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4p5xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4p5xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l4p5zg
diff --git a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
index ad5bfba38..e811a6e53 100644
--- a/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
+++ b/hw/bsp/stm32l4/boards/stm32l4r5nucleo/board.mk
@@ -3,12 +3,9 @@ CFLAGS += \
   -DSTM32L4R5xx \
 
 # GCC
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
-LD_FILE_GCC = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_stm32l4r5xx.s
+LD_FILE = $(BOARD_PATH)/STM32L4RXxI_FLASH.ld
 
-# IAR
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_stm32l4r5xx.s
-LD_FILE_IAR = $(ST_CMSIS)/Source/Templates/iar/linker/stm32l4r5xx_flash.icf
 
 # For flash-jlink target
 JLINK_DEVICE = stm32l4r5zi
diff --git a/hw/bsp/stm32l4/family.mk b/hw/bsp/stm32l4/family.mk
index fd11fd226..b45884989 100644
--- a/hw/bsp/stm32l4/family.mk
+++ b/hw/bsp/stm32l4/family.mk
@@ -13,15 +13,15 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32L4
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=cast-align \
 
 ifeq ($(TOOLCHAIN),gcc)
-CFLAGS_GCC += -Wno-error=maybe-uninitialized
+CFLAGS += -Wno-error=maybe-uninitialized
 endif
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.mk b/hw/bsp/stm32n6/boards/stm32n6570dk/board.mk
index 05717699c..524ba0ca0 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.mk
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = stm32n657xx
 CFLAGS += -DSTM32N657xx
 JLINK_DEVICE = stm32n6xx
 
-LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
+LD_FILE = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
index efbb82611..d488f555e 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.mk
@@ -2,7 +2,7 @@ MCU_VARIANT = stm32n657xx
 CFLAGS += -DSTM32N657xx
 JLINK_DEVICE = stm32n657x0
 
-LD_FILE_GCC = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
+LD_FILE = $(BOARD_PATH)/STM32N657XX_AXISRAM2_fsbl.ld
 
 RHPORT_DEVICE ?= 0
 RHPORT_HOST ?= 0
diff --git a/hw/bsp/stm32n6/family.mk b/hw/bsp/stm32n6/family.mk
index 9fef533b1..408867153 100644
--- a/hw/bsp/stm32n6/family.mk
+++ b/hw/bsp/stm32n6/family.mk
@@ -36,15 +36,15 @@ CFLAGS += \
 	-DBUFFER_SIZE_UP=0x4000 \
 
 # GCC Flags
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -Wno-error=cast-align \
   -Wno-error=unused-parameter \
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -81,9 +81,7 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_fsbl.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_fsbl.s
 
 # Linker
-LD_FILE_GCC ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
+LD_FILE ?= $(ST_CMSIS)/Source/Templates/gcc/linker/$(MCU_VARIANT)_flash.ld
diff --git a/hw/bsp/stm32u0/family.mk b/hw/bsp/stm32u0/family.mk
index 9119f3652..4ced248bc 100644
--- a/hw/bsp/stm32u0/family.mk
+++ b/hw/bsp/stm32u0/family.mk
@@ -11,7 +11,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32U0
 
 # mcu driver cause following warnings
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
 	-Wno-error=unused-parameter \
 	-Wno-error=redundant-decls \
@@ -21,7 +21,7 @@ CFLAGS_GCC += \
 CFLAGS_CLANG += \
   -Wno-error=parentheses-equality
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -45,10 +45,8 @@ INC += \
   $(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_${MCU_VARIANT}.s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_${MCU_VARIANT}.s
 
 # Linker
 MCU_VARIANT_UPPER = $(subst stm32u,STM32U,$(MCU_VARIANT))
 LD_FILE ?= $(FAMILY_PATH)/linker/$(MCU_VARIANT_UPPER)_FLASH.ld
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
diff --git a/hw/bsp/stm32u5/family.mk b/hw/bsp/stm32u5/family.mk
index 90796836b..e7bc4f299 100644
--- a/hw/bsp/stm32u5/family.mk
+++ b/hw/bsp/stm32u5/family.mk
@@ -10,7 +10,7 @@ CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32U5
 
 # suppress warning caused by vendor mcu driver
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=cast-align \
   -Wno-error=undef \
@@ -19,10 +19,10 @@ CFLAGS_GCC += \
   -Wno-self-assign \
 
 ifeq ($(TOOLCHAIN),gcc)
-CFLAGS_GCC += -Wno-error=maybe-uninitialized
+CFLAGS += -Wno-error=maybe-uninitialized
 endif
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   --specs=nosys.specs --specs=nano.specs
 
@@ -61,11 +61,9 @@ INC += \
 	$(TOP)/$(BOARD_PATH)
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash.icf
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32wb/family.mk b/hw/bsp/stm32wb/family.mk
index 9397be62d..6123a65de 100644
--- a/hw/bsp/stm32wb/family.mk
+++ b/hw/bsp/stm32wb/family.mk
@@ -11,12 +11,12 @@ CPU_CORE ?= cortex-m4
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32WB
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -nostdlib -nostartfiles \
 	-Wno-error=cast-align -Wno-unused-parameter
 
-LDFLAGS_GCC += -specs=nosys.specs -specs=nano.specs
+LDFLAGS += -specs=nosys.specs -specs=nano.specs
 
 SRC_C += \
 	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
@@ -39,12 +39,10 @@ INC += \
 	$(TOP)/$(ST_HAL_DRIVER)/Inc
 
 # Startup
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_cm4.s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT)_cm4.s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT)_cm4.s
 
 # Linker
-LD_FILE_GCC ?= ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash_cm4.icf
+LD_FILE ?= ${ST_CMSIS}/Source/Templates/gcc/linker/${MCU_VARIANT}_flash_cm4.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/stm32wba/family.mk b/hw/bsp/stm32wba/family.mk
index 0a325323b..30848ac89 100644
--- a/hw/bsp/stm32wba/family.mk
+++ b/hw/bsp/stm32wba/family.mk
@@ -11,11 +11,11 @@ CPU_CORE ?= cortex-m33
 CFLAGS += \
   -DCFG_TUSB_MCU=OPT_MCU_STM32WBA
 
-CFLAGS_GCC += \
+CFLAGS += \
   -flto \
   -Wno-error=cast-align -Wno-unused-parameter
 
-LDFLAGS_GCC += \
+LDFLAGS += \
   -nostdlib -nostartfiles \
   -specs=nosys.specs -specs=nano.specs -Wl,--gc-sections
 
@@ -49,12 +49,10 @@ INC += \
 UPPERCASE_MCU_VARIANT = $(subst XX,xx,$(call to_upper,$(MCU_VARIANT)))
 
 # Startup - Manually specify lowercase version for startup file
-SRC_S_GCC += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
-SRC_S_IAR += $(ST_CMSIS)/Source/Templates/iar/startup_$(MCU_VARIANT).s
+SRC_S += $(ST_CMSIS)/Source/Templates/gcc/startup_$(MCU_VARIANT).s
 
 # Linker
-LD_FILE_GCC ?= ${FAMILY_PATH}/linker/${UPPERCASE_MCU_VARIANT}_FLASH_ns.ld
-LD_FILE_IAR ?= $(ST_CMSIS)/Source/Templates/iar/linker/$(MCU_VARIANT)_flash_ns.icf
+LD_FILE ?= ${FAMILY_PATH}/linker/${UPPERCASE_MCU_VARIANT}_FLASH_ns.ld
 
 # flash target using on-board stlink
 flash: flash-stlink
diff --git a/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
index b01977674..26aa55c05 100644
--- a/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
+++ b/hw/bsp/tm4c/boards/ek_tm4c1294xl/board.mk
@@ -2,8 +2,7 @@ MCU_SUB_VARIANT = 129
 
 CFLAGS += -DTM4C1294NCPDT
 
-LD_FILE_GCC = $(BOARD_PATH)/tm4c1294nc.ld
-LD_FILE_IAR = $(BOARD_PATH)/TM4C1294NC.icf
+LD_FILE = $(BOARD_PATH)/tm4c1294nc.ld
 
 # For flash-jlink target
 JLINK_DEVICE = TM4C1294NCPDT
diff --git a/hw/bsp/tm4c/family.mk b/hw/bsp/tm4c/family.mk
index bc966d98e..fc192c3af 100644
--- a/hw/bsp/tm4c/family.mk
+++ b/hw/bsp/tm4c/family.mk
@@ -14,7 +14,7 @@ CFLAGS += \
 # mcu driver cause following warnings
 CFLAGS += -Wno-error=strict-prototypes -Wno-error=cast-qual
 
-LDFLAGS_GCC += --specs=nosys.specs --specs=nano.specs
+LDFLAGS += --specs=nosys.specs --specs=nano.specs
 
 INC += \
 	$(TOP)/lib/CMSIS_5/CMSIS/Core/Include \
-- 
cgit v1.3.1


From a39e9cdf2c82401eb61b99dd35e73531bcd76cf1 Mon Sep 17 00:00:00 2001
From: gab-k <gabriel@koppenstein.com>
Date: Fri, 27 Mar 2026 18:34:04 +0100
Subject: Add initial board support for nRF54LM20 DK

---
 docs/reference/boards.rst                          |  1 +
 hw/bsp/BoardPresets.json                           | 22 +++++++
 hw/bsp/nrf/boards/nrf54lm20dk/board.cmake          | 11 ++++
 hw/bsp/nrf/boards/nrf54lm20dk/board.h              | 58 ++++++++++++++++++
 hw/bsp/nrf/boards/nrf54lm20dk/board.mk             |  6 ++
 hw/bsp/nrf/family.c                                | 69 ++++++++++++++++++++--
 hw/bsp/nrf/family.cmake                            | 28 ++++++---
 hw/bsp/nrf/family.mk                               | 15 ++++-
 .../nrf/linker/nrf54lm20a_enga_xxaa_application.ld | 13 ++++
 hw/bsp/nrf/nrfx_config/nrfx_config_common.h        |  3 +
 src/common/tusb_mcu.h                              |  1 +
 src/portable/synopsys/dwc2/dwc2_nrf.h              | 27 ++++++++-
 12 files changed, 238 insertions(+), 16 deletions(-)
 create mode 100644 hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
 create mode 100644 hw/bsp/nrf/boards/nrf54lm20dk/board.h
 create mode 100644 hw/bsp/nrf/boards/nrf54lm20dk/board.mk
 create mode 100644 hw/bsp/nrf/linker/nrf54lm20a_enga_xxaa_application.ld

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index ec91b343e..dbb5942ca 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -221,6 +221,7 @@ nrf52840dk                   Nordic nRF52840DK                      nrf       ht
 nrf52840dongle               Nordic nRF52840 Dongle                 nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF52840-Dongle
 nrf5340dk                    Nordic nRF5340 DK                      nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
 nrf54h20dk                   Nordic nRF54H20 DK                     nrf       https://www.nordicsemi.com/Software-and-Tools/Development-Kits/nRF5340-DK
+nrf54lm20dk                  Nordic nRF54LM20 DK                    nrf       https://www.nordicsemi.com/Products/Development-hardware/nRF54LM20-DK
 ===========================  =====================================  ========  ==============================================================================  ======
 
 Raspberry Pi
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 5c3aaf2b4..86609d075 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -470,6 +470,10 @@
       "name": "nrf54h20dk",
       "inherits": "default"
     },
+    {
+      "name": "nrf54lm20dk",
+      "inherits": "default"
+    },
     {
       "name": "nutiny_nuc126v",
       "inherits": "default"
@@ -1563,6 +1567,11 @@
       "description": "Build preset for the nrf54h20dk board",
       "configurePreset": "nrf54h20dk"
     },
+    {
+      "name": "nrf54lm20dk",
+      "description": "Build preset for the nrf54lm20dk board",
+      "configurePreset": "nrf54lm20dk"
+    },
     {
       "name": "nutiny_nuc126v",
       "description": "Build preset for the nutiny_nuc126v board",
@@ -3711,6 +3720,19 @@
         }
       ]
     },
+    {
+      "name": "nrf54lm20dk",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "nrf54lm20dk"
+        },
+        {
+          "type": "build",
+          "name": "nrf54lm20dk"
+        }
+      ]
+    },
     {
       "name": "nutiny_nuc126v",
       "steps": [
diff --git a/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
new file mode 100644
index 000000000..fb0ccdfdf
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
@@ -0,0 +1,11 @@
+set(MCU_VARIANT nrf54lm20a_enga)
+set(JLINK_DEVICE NRF54LM20A_M33)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CFG_EXAMPLE_VIDEO_READONLY
+    )
+  target_sources(${TARGET} PRIVATE
+#    ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
+    )
+endfunction()
diff --git a/hw/bsp/nrf/boards/nrf54lm20dk/board.h b/hw/bsp/nrf/boards/nrf54lm20dk/board.h
new file mode 100644
index 000000000..6bf5da891
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54lm20dk/board.h
@@ -0,0 +1,58 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2020, Ha Thach (tinyusb.org)
+ * Copyright (c) 2026, Gabriel Koppenstein
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Nordic nRF54LM20 DK
+   url: https://www.nordicsemi.com/Products/Development-hardware/nRF54LM20-DK
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+#define _PINNUM(port, pin)    ((port)*32 + (pin))
+
+// LED0 active high (MOSFET-driven)
+#define LED_PIN               _PINNUM(1, 22)
+#define LED_STATE_ON          1
+
+// Button0 active low
+#define BUTTON_PIN            _PINNUM(1, 26)
+#define BUTTON_STATE_ACTIVE   0
+
+// UART20 (VCOM via debugger)
+#define UART_TX_PIN           _PINNUM(1, 16)
+#define UART_RX_PIN           _PINNUM(1, 17)
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/nrf/boards/nrf54lm20dk/board.mk b/hw/bsp/nrf/boards/nrf54lm20dk/board.mk
new file mode 100644
index 000000000..ad0177b40
--- /dev/null
+++ b/hw/bsp/nrf/boards/nrf54lm20dk/board.mk
@@ -0,0 +1,6 @@
+MCU_VARIANT = nrf54lm20a_enga
+CFLAGS += -DNRF54LM20A_ENGA_XXAA
+
+# flash using jlink
+JLINK_DEVICE = NRF54LM20A_M33
+flash: flash-jlink
diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index f1e8b829c..10f0fc460 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -2,6 +2,7 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2026, Gabriel Koppenstein
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -45,7 +46,7 @@
 #include "nrfx.h"
 #include "hal/nrf_gpio.h"
 #include "nrfx_gpiote.h"
-#if !defined(NRF54H20_XXAA)
+#if !defined(NRF54H20_XXAA) && !defined(NRF54LM20A_ENGA_XXAA)
 #include "nrfx_power.h"
 #endif
 #include "nrfx_uarte.h"
@@ -79,13 +80,17 @@ enum {
 };
 
 // Forward USB interrupt events to TinyUSB IRQ Handler
-#if defined(NRF54H20_XXAA)
+#if defined(NRF54H20_XXAA) || defined(NRF54LM20A_ENGA_XXAA)
 #define USBD_IRQn  USBHS_IRQn
 void USBHS_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
 
+#if defined(NRF54LM20A_ENGA_XXAA)
+static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(20);
+#else
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(120);
+#endif
 
 #else
 
@@ -114,7 +119,7 @@ void USBD_IRQHandler(void) {
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
 extern void tusb_hal_nrf_power_event(uint32_t event);
 
-#if !defined(NRF54H20_XXAA)
+#if !defined(NRF54H20_XXAA) && !defined(NRF54LM20A_ENGA_XXAA)
 // nrf power callback, could be unused if SD is enabled or usb is disabled (board_test example)
 TU_ATTR_UNUSED static void power_event_handler(nrfx_power_usb_evt_t event) {
   tusb_hal_nrf_power_event((uint32_t) event);
@@ -133,7 +138,7 @@ static nrfx_gpiote_t _gpiote = NRFX_GPIOTE_INSTANCE(0);
 //--------------------------------------------------------------------+
 
 void board_init(void) {
-#if !defined(NRF54H20_XXAA)
+#if !defined(NRF54H20_XXAA) && !defined(NRF54LM20A_ENGA_XXAA)
   // stop LF clock just in case we jump from application without reset
   NRF_CLOCK->TASKS_LFCLKSTOP = 1UL;
 
@@ -186,11 +191,63 @@ void board_init(void) {
 
   //------------- USB -------------//
 #if CFG_TUD_ENABLED
+
+#if defined(NRF54LM20A_ENGA_XXAA)
+  // Start the USB voltage regulator
+  NRF_VREGUSB->TASKS_START = VREGUSB_TASKS_START_TASKS_START_Trigger;
+
+  // Request HFXO crystal clock for PCLK24M (required by USBHS core)
+  NRF_CLOCK->TASKS_XO24MSTART = CLOCK_TASKS_XO24MSTART_TASKS_XO24MSTART_Trigger;
+  while (!NRF_CLOCK->EVENTS_XO24MSTARTED) {}
+  NRF_CLOCK->EVENTS_XO24MSTARTED = 0;
+#endif
+
+#if defined(NRF54H20_XXAA)
+  // Enable the USBHS wrapper (core + PHY) before any DWC2 register access
+  NRF_USBHS->ENABLE = (USBHS_ENABLE_PHY_Enabled << USBHS_ENABLE_PHY_Pos) |
+                       (USBHS_ENABLE_CORE_Enabled << USBHS_ENABLE_CORE_Pos);
+  NRF_USBHS->TASKS_START = USBHS_TASKS_START_TASKS_START_Trigger;
+  // Brief delay for PHY PLL lock and core power-up
+  for (volatile int i = 0; i < 1000; i++) {}
+#endif
+
+#if defined(NRF54LM20A_ENGA_XXAA)
+  // Based on Zephyr usbhs_enable_core() in drivers/usb/udc/udc_dwc2_vendor_quirks.h
+  // Step 1: Power up core only (PHY not yet)
+  NRF_USBHS->ENABLE = USBHS_ENABLE_CORE_Msk;
+
+  // Step 2: Override ID=Device (bit 31), and temporarily override VBUSVALID
+  NRF_USBHS->PHY.OVERRIDEVALUES = (USBHS_PHY_OVERRIDEVALUES_ID_Device << USBHS_PHY_OVERRIDEVALUES_ID_Pos);
+  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk | USBHS_PHY_INPUTOVERRIDE_VBUSVALID_Msk;
+
+  // Step 3: Release PHY power-on reset by enabling PHY
+  NRF_USBHS->ENABLE = USBHS_ENABLE_PHY_Msk | USBHS_ENABLE_CORE_Msk;
+
+  // Step 4: Wait 45us for PHY clock to start
+  NRFX_DELAY_US(45);
+
+  // Step 5: Release DWC2 reset
+  NRF_USBHS->TASKS_START = USBHS_TASKS_START_TASKS_START_Trigger;
+
+  // Step 6: Wait for clock to start to avoid hang on too early register read
+  NRFX_DELAY_US(2);
+
+  // Step 7: Clear VBUSVALID override (keep ID=Device override)
+  // DWC2 is now in Non-Driving opmode; D+ pull-up will activate when DWC2 clears DCTL SftDiscon
+  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk;
+
+  // Barrier: USBHS wrapper (0x5005A000) and USBHSCORE (0x50020000) are separate
+  // peripheral blocks. Ensure the ENABLE/TASKS_START writes have propagated from
+  // the Cortex-M33 write buffer to hardware before anyone reads DWC2 core regs.
+  __DSB();
+
+#endif
+
   // Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice
   // 2 is highest for application
   NVIC_SetPriority(USBD_IRQn, 2);
 
-#if !defined(NRF54H20_XXAA)
+#if !defined(NRF54H20_XXAA) && !defined(NRF54LM20A_ENGA_XXAA)
   // USB power may already be ready at this time -> no event generated
   // We need to invoke the handler based on the status initially
   uint32_t usb_reg;
@@ -258,7 +315,7 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 
 #if defined(NRF54H20_XXAA)
   uintptr_t did_addr = (uintptr_t) NRF_FICR->BLE.ADDR;
-#elif defined(NRF5340_XXAA)
+#elif defined(NRF54LM20A_ENGA_XXAA) || defined(NRF5340_XXAA)
   uintptr_t did_addr = (uintptr_t) NRF_FICR->INFO.DEVICEID;
 #else
   uintptr_t did_addr = (uintptr_t) NRF_FICR->DEVICEID;
diff --git a/hw/bsp/nrf/family.cmake b/hw/bsp/nrf/family.cmake
index 3a6e7cc8b..fba5e6e69 100644
--- a/hw/bsp/nrf/family.cmake
+++ b/hw/bsp/nrf/family.cmake
@@ -10,15 +10,19 @@ if (NOT board_cmake_included)
 endif ()
 
 # toolchain set up
-if (MCU_VARIANT STREQUAL nrf5340 OR MCU_VARIANT STREQUAL nrf54h20)
+if (MCU_VARIANT STREQUAL nrf5340 OR MCU_VARIANT STREQUAL nrf54h20 OR MCU_VARIANT STREQUAL nrf54lm20a_enga)
   set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
-  set(JLINK_DEVICE ${MCU_VARIANT}_xxaa_app)
+  if (NOT DEFINED JLINK_DEVICE)
+    set(JLINK_DEVICE ${MCU_VARIANT}_xxaa_app)
+  endif ()
 else ()
   set(CMAKE_SYSTEM_CPU cortex-m4 CACHE INTERNAL "System Processor")
-  set(JLINK_DEVICE ${MCU_VARIANT}_xxaa)
+  if (NOT DEFINED JLINK_DEVICE)
+    set(JLINK_DEVICE ${MCU_VARIANT}_xxaa)
+  endif ()
 endif ()
 
-if (MCU_VARIANT STREQUAL "nrf54h20")
+if (MCU_VARIANT STREQUAL "nrf54h20" OR MCU_VARIANT STREQUAL "nrf54lm20a_enga")
   set(FAMILY_MCUS NRF54 CACHE INTERNAL "")
 else ()
   set(FAMILY_MCUS NRF5X CACHE INTERNAL "")
@@ -29,7 +33,10 @@ set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOL
 #------------------------------------
 # Startup & Linker script
 #------------------------------------
-if (MCU_VARIANT STREQUAL nrf54h20)
+if (MCU_VARIANT STREQUAL nrf54lm20a_enga)
+  set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
+  set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S)
+elseif (MCU_VARIANT STREQUAL nrf54h20)
   set(LD_FILE_GNU_DEFAULT ${CMAKE_CURRENT_LIST_DIR}/linker/${MCU_VARIANT}_xxaa_application.ld)
   set(STARTUP_FILE_GNU ${NRFX_PATH}/mdk/gcc_startup_${MCU_VARIANT}_application.S)
 elseif (MCU_VARIANT STREQUAL nrf5340)
@@ -52,13 +59,20 @@ function(family_add_board BOARD_TARGET)
   add_library(${BOARD_TARGET} STATIC
     ${NRFX_PATH}/helpers/nrfx_flag32_allocator.c
     ${NRFX_PATH}/drivers/src/nrfx_gpiote.c
-    ${NRFX_PATH}/drivers/src/nrfx_power.c
     ${NRFX_PATH}/drivers/src/nrfx_spim.c
     ${NRFX_PATH}/drivers/src/nrfx_uarte.c
     ${NRFX_PATH}/soc/nrfx_atomic.c
     )
 
-  if (MCU_VARIANT STREQUAL nrf54h20)
+  if (NOT FAMILY_MCUS STREQUAL "NRF54")
+    target_sources(${BOARD_TARGET} PRIVATE ${NRFX_PATH}/drivers/src/nrfx_power.c)
+  endif ()
+
+  if (MCU_VARIANT STREQUAL nrf54lm20a_enga)
+    target_sources(${BOARD_TARGET} PRIVATE
+      ${NRFX_PATH}/mdk/system_nrf54l.c
+    )
+  elseif (MCU_VARIANT STREQUAL nrf54h20)
     target_sources(${BOARD_TARGET} PRIVATE
       ${NRFX_PATH}/mdk/system_nrf54h.c
     )
diff --git a/hw/bsp/nrf/family.mk b/hw/bsp/nrf/family.mk
index e7e9e7d0a..0cc3c81ef 100644
--- a/hw/bsp/nrf/family.mk
+++ b/hw/bsp/nrf/family.mk
@@ -4,6 +4,15 @@ NRFX_PATH = hw/mcu/nordic/nrfx
 
 include $(TOP)/$(BOARD_PATH)/board.mk
 
+ifeq (${MCU_VARIANT},nrf54lm20a_enga)
+	CPU_CORE = cortex-m33
+	CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF54
+	LD_FILE_DEFAULT = ${FAMILY_PATH}/linker/${MCU_VARIANT}_xxaa_application.ld
+	SRC_C += ${NRFX_PATH}/mdk/system_nrf54l.c
+	SRC_S += ${NRFX_PATH}/mdk/gcc_startup_$(MCU_VARIANT)_application.S
+	JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa_app
+
+else
 ifeq (${MCU_VARIANT},nrf54h20)
 	CPU_CORE = cortex-m33
 	CFLAGS += -DCFG_TUSB_MCU=OPT_MCU_NRF54
@@ -32,6 +41,7 @@ else
 	JLINK_DEVICE ?= $(MCU_VARIANT)_xxaa
 endif
 endif
+endif
 
 CFLAGS += \
   -DNRF_APPLICATION \
@@ -70,11 +80,14 @@ SRC_C += \
 	src/portable/synopsys/dwc2/hcd_dwc2.c \
 	${NRFX_PATH}/helpers/nrfx_flag32_allocator.c \
 	${NRFX_PATH}/drivers/src/nrfx_gpiote.c \
-  ${NRFX_PATH}/drivers/src/nrfx_power.c \
   ${NRFX_PATH}/drivers/src/nrfx_spim.c \
   ${NRFX_PATH}/drivers/src/nrfx_uarte.c \
   ${NRFX_PATH}/soc/nrfx_atomic.c
 
+ifeq (,$(findstring OPT_MCU_NRF54,$(CFLAGS)))
+SRC_C += ${NRFX_PATH}/drivers/src/nrfx_power.c
+endif
+
 INC += \
   $(TOP)/$(BOARD_PATH) \
   $(TOP)/$(FAMILY_PATH)/nrfx_config \
diff --git a/hw/bsp/nrf/linker/nrf54lm20a_enga_xxaa_application.ld b/hw/bsp/nrf/linker/nrf54lm20a_enga_xxaa_application.ld
new file mode 100644
index 000000000..367cf6a89
--- /dev/null
+++ b/hw/bsp/nrf/linker/nrf54lm20a_enga_xxaa_application.ld
@@ -0,0 +1,13 @@
+/* Linker script to configure memory regions. */
+
+SEARCH_DIR(.)
+/*GROUP(-lgcc -lc) not compatible with clang*/
+
+MEMORY
+{
+  FLASH (rx) : ORIGIN = 0x00000000, LENGTH = 0x1FD000 /* Inside global RRAM0 */
+  RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x40000
+  RAM1 (rwx) : ORIGIN = 0x20040000, LENGTH = 0x40000
+}
+
+INCLUDE "nrf_common.ld"
diff --git a/hw/bsp/nrf/nrfx_config/nrfx_config_common.h b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
index a5a29bb8e..02b7390e2 100644
--- a/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
+++ b/hw/bsp/nrf/nrfx_config/nrfx_config_common.h
@@ -62,6 +62,9 @@
 #if defined(NRF54H20_XXAA)
 #define NRFX_UARTE120_ENABLED  1
 
+#elif defined(NRF54LM20A_ENGA_XXAA)
+#define NRFX_UARTE20_ENABLED   1
+
 #else
 
 #define NRFX_POWER_ENABLED   1
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index b12a3177e..77a0bbf1d 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -166,6 +166,7 @@
   #define TUP_USBIP_DWC2
   #define TUP_USBIP_DWC2_NRF
   #define TUP_DCD_ENDPOINT_MAX            16
+  #define TUP_RHPORT_HIGHSPEED            1
   #define CFG_TUH_DWC2_DMA_ENABLE_DEFAULT 0
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/synopsys/dwc2/dwc2_nrf.h b/src/portable/synopsys/dwc2/dwc2_nrf.h
index 51f2d684f..067bf39cc 100644
--- a/src/portable/synopsys/dwc2/dwc2_nrf.h
+++ b/src/portable/synopsys/dwc2/dwc2_nrf.h
@@ -2,6 +2,7 @@
  * The MIT License (MIT)
  *
  * Copyright (c) 2025 Ha Thach (tinyusb.org)
+ * Copyright (c) 2026, Gabriel Koppenstein
  *
  * Permission is hereby granted, free of charge, to any person obtaining a copy
  * of this software and associated documentation files (the "Software"), to deal
@@ -30,14 +31,25 @@
 
 #define DWC2_EP_MAX 16
 
+// Use the auto-resolving peripheral pointer (respects TrustZone secure/non-secure mapping)
+#if defined(NRF54LM20A_ENGA_XXAA)
+  #define _DWC2_NRF_REG_BASE ((uintptr_t) NRF_USBHSCORE)
+#else
+  #define _DWC2_NRF_REG_BASE ((uintptr_t) NRF_USBHSCORE0)
+#endif
+
 static const dwc2_controller_t _dwc2_controller[] = {
-  { .reg_base = NRF_USBHSCORE0_NS_BASE, .irqnum = USBHS_IRQn, .ep_count = 16, .ep_fifo_size = 12288 },
+  { .reg_base = _DWC2_NRF_REG_BASE, .irqnum = USBHS_IRQn, .ep_count = 16, .ep_fifo_size = 12160 },
 };
 
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
   (void) rhport;
   (void) role;
-  (void) enabled;
+  if (enabled) {
+    NVIC_EnableIRQ(USBHS_IRQn);
+  } else {
+    NVIC_DisableIRQ(USBHS_IRQn);
+  }
 }
 
 #define dwc2_dcd_int_enable(_rhport)  dwc2_int_set(_rhport, TUSB_ROLE_DEVICE, true)
@@ -64,4 +76,15 @@ TU_ATTR_ALWAYS_INLINE static inline void dwc2_phy_update(dwc2_regs_t* dwc2, uint
   (void)hs_phy_type;
 }
 
+// nRF54 Cortex-M33 has no D-cache, provide no-op stubs for DMA mode
+TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_clean(const void* addr, uint32_t data_size) {
+  (void)addr; (void)data_size; return true;
+}
+TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_invalidate(const void* addr, uint32_t data_size) {
+  (void)addr; (void)data_size; return true;
+}
+TU_ATTR_ALWAYS_INLINE static inline bool dwc2_dcache_clean_invalidate(const void* addr, uint32_t data_size) {
+  (void)addr; (void)data_size; return true;
+}
+
 #endif
-- 
cgit v1.3.1


From 8320d8f8f49232c25476f8efdde55e7bedec11e3 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Apr 2026 01:16:22 +0700
Subject: fix stm32h5 hard fault when reading UID with ICACHE enabled

On STM32H5, reading UID_BASE with ICACHE enabled causes a hard fault
(ST errata). Cache the unique ID at the very start of board_init(),
before any user code has a chance to enable ICACHE.

Closes: https://github.com/hathach/tinyusb/discussions/3588

Co-Authored-By: Claude Opus 4.6 (1M context) <noreply@anthropic.com>
---
 hw/bsp/stm32h5/family.c | 17 +++++++++++++----
 1 file changed, 13 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 234a089eb..8298dfaab 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -46,6 +46,10 @@
 TU_ATTR_UNUSED static void Error_Handler(void) {
 }
 
+// STM32H5 errata: reading UID_BASE with ICACHE enabled causes hard fault.
+// Cache the unique ID early in board_init() before ICACHE may be enabled.
+static uint32_t cached_uid[3];
+
 typedef struct {
   GPIO_TypeDef* port;
   GPIO_InitTypeDef pin_init;
@@ -94,6 +98,12 @@ static UART_HandleTypeDef UartHandle = {
 #endif
 
 void board_init(void) {
+  // Cache UID before ICACHE is enabled (STM32H5 errata: reading UID_BASE with ICACHE causes hard fault)
+  volatile uint32_t* stm32_uuid = (volatile uint32_t*) UID_BASE;
+  cached_uid[0] = stm32_uuid[0];
+  cached_uid[1] = stm32_uuid[1];
+  cached_uid[2] = stm32_uuid[2];
+
   HAL_Init(); // required for HAL_RCC_Osc TODO check with freeRTOS
   SystemClock_Config(); // implemented in board.h
   SystemCoreClockUpdate();
@@ -185,13 +195,12 @@ uint32_t board_button_read(void) {
 
 size_t board_get_unique_id(uint8_t id[], size_t max_len) {
   (void) max_len;
-  volatile uint32_t* stm32_uuid = (volatile uint32_t*) UID_BASE;
   uint32_t* id32 = (uint32_t*) (uintptr_t) id;
   uint8_t const len = 12;
 
-  id32[0] = stm32_uuid[0];
-  id32[1] = stm32_uuid[1];
-  id32[2] = stm32_uuid[2];
+  id32[0] = cached_uid[0];
+  id32[1] = cached_uid[1];
+  id32[2] = cached_uid[2];
 
   return len;
 }
-- 
cgit v1.3.1


From c96ff6b6d978bdcacc7cd49ad66ef00438cfb9f6 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Apr 2026 16:52:15 +0700
Subject: add dwc2_clock_init() to have nrf54 initial sequence. currently stub
 for other ports. add board_uart_read() for nrf

---
 hw/bsp/nrf/family.c                      | 131 +++++++++++++++----------------
 src/portable/synopsys/dwc2/dcd_dwc2.c    |   4 +-
 src/portable/synopsys/dwc2/dwc2_at32.h   |   6 ++
 src/portable/synopsys/dwc2/dwc2_bcm.h    |   6 ++
 src/portable/synopsys/dwc2/dwc2_common.h |  16 ++--
 src/portable/synopsys/dwc2/dwc2_efm32.h  |   6 ++
 src/portable/synopsys/dwc2/dwc2_esp32.h  |   6 ++
 src/portable/synopsys/dwc2/dwc2_gd32.h   |   6 ++
 src/portable/synopsys/dwc2/dwc2_nrf.h    |  52 ++++++++++++
 src/portable/synopsys/dwc2/dwc2_stm32.h  |   6 ++
 src/portable/synopsys/dwc2/dwc2_xmc.h    |   6 ++
 src/portable/synopsys/dwc2/hcd_dwc2.c    |   4 +-
 12 files changed, 172 insertions(+), 77 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/nrf/family.c b/hw/bsp/nrf/family.c
index 10f0fc460..31a6bac9e 100644
--- a/hw/bsp/nrf/family.c
+++ b/hw/bsp/nrf/family.c
@@ -81,39 +81,67 @@ enum {
 
 // Forward USB interrupt events to TinyUSB IRQ Handler
 #if defined(NRF54H20_XXAA) || defined(NRF54LM20A_ENGA_XXAA)
-#define USBD_IRQn  USBHS_IRQn
+  #define USBD_IRQn USBHS_IRQn
 void USBHS_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
 
-#if defined(NRF54LM20A_ENGA_XXAA)
+  #if defined(NRF54LM20A_ENGA_XXAA)
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(20);
-#else
+  #else
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(120);
-#endif
-
-#else
+  #endif
 
-#ifdef NRF5340_XXAA
-#define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_LFRC
-#define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk
-#define OUTPUTRDY_Msk USBREG_USBREGSTATUS_OUTPUTRDY_Msk
-#define GPIOTE_IRQn GPIOTE1_IRQn
 #else
-#define LFCLK_SRC_RC CLOCK_LFCLKSRC_SRC_RC
-#define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk
-#define OUTPUTRDY_Msk POWER_USBREGSTATUS_OUTPUTRDY_Msk
-#endif
+  #ifdef NRF5340_XXAA
+    #define LFCLK_SRC_RC   CLOCK_LFCLKSRC_SRC_LFRC
+    #define VBUSDETECT_Msk USBREG_USBREGSTATUS_VBUSDETECT_Msk
+    #define OUTPUTRDY_Msk  USBREG_USBREGSTATUS_OUTPUTRDY_Msk
+    #define GPIOTE_IRQn    GPIOTE1_IRQn
+  #else
+    #define LFCLK_SRC_RC   CLOCK_LFCLKSRC_SRC_RC
+    #define VBUSDETECT_Msk POWER_USBREGSTATUS_VBUSDETECT_Msk
+    #define OUTPUTRDY_Msk  POWER_USBREGSTATUS_OUTPUTRDY_Msk
+  #endif
 
-#if CFG_TUSB_OS != OPT_OS_ZEPHYR
+  #if CFG_TUSB_OS != OPT_OS_ZEPHYR
 static nrfx_uarte_t _uart_id = NRFX_UARTE_INSTANCE(0);
-#endif
+  #endif
 
 void USBD_IRQHandler(void) {
-  tud_int_handler(0);
+  tusb_int_handler(0, true);
 }
 #endif
 
+//--------------------------------------------------------------------+
+// UART RX ring buffer and event handler
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS != OPT_OS_ZEPHYR
+
+#define UART_RX_BUFSIZE 64
+
+static uint8_t rx_fifo[UART_RX_BUFSIZE];
+static volatile uint16_t rx_fifo_head = 0;
+static volatile uint16_t rx_fifo_tail = 0;
+
+static uint8_t rx_dma_buf[1]; // 1-byte DMA target for continuous RX
+
+static void uart_event_handler(nrfx_uarte_event_t const* p_event, void* p_context) {
+  (void) p_context;
+  if (p_event->type == NRFX_UARTE_EVT_RX_DONE) {
+    for (size_t i = 0; i < p_event->data.rx.length; i++) {
+      uint16_t next_head = (rx_fifo_head + 1) & (UART_RX_BUFSIZE - 1);
+      if (next_head != rx_fifo_tail) {
+        rx_fifo[rx_fifo_head] = p_event->data.rx.p_buffer[i];
+        rx_fifo_head = next_head;
+      }
+    }
+    // re-arm 1-byte RX
+    nrfx_uarte_rx(&_uart_id, rx_dma_buf, sizeof(rx_dma_buf));
+  }
+}
+
+#endif
 
 // tinyusb function that handles power event (detected, ready, removed)
 // We must call it within SD's SOC event handler, or set it as power event handler if SD is not enabled.
@@ -136,7 +164,6 @@ static nrfx_gpiote_t _gpiote = NRFX_GPIOTE_INSTANCE(0);
 //--------------------------------------------------------------------+
 //
 //--------------------------------------------------------------------+
-
 void board_init(void) {
 #if !defined(NRF54H20_XXAA) && !defined(NRF54LM20A_ENGA_XXAA)
   // stop LF clock just in case we jump from application without reset
@@ -172,12 +199,14 @@ void board_init(void) {
 
 #if CFG_TUSB_OS != OPT_OS_ZEPHYR
   // UART
+  static uint8_t uart_tx_cache[64];
   nrfx_uarte_config_t uart_cfg = {
       .txd_pin   = UART_TX_PIN,
       .rxd_pin   = UART_RX_PIN,
       .rts_pin   = NRF_UARTE_PSEL_DISCONNECTED,
       .cts_pin   = NRF_UARTE_PSEL_DISCONNECTED,
       .p_context = NULL,
+      .tx_cache  = { .p_buffer = uart_tx_cache, .length = sizeof(uart_tx_cache) },
       .baudrate  = NRF_UARTE_BAUDRATE_115200, // CFG_BOARD_UART_BAUDRATE
       .interrupt_priority = 7,
       .config = {
@@ -186,63 +215,21 @@ void board_init(void) {
       }
   };
 
-  nrfx_uarte_init(&_uart_id, &uart_cfg, NULL);
+  nrfx_uarte_init(&_uart_id, &uart_cfg, uart_event_handler);
+  // start continuous 1-byte RX
+  nrfx_uarte_rx(&_uart_id, rx_dma_buf, sizeof(rx_dma_buf));
 #endif
 
   //------------- USB -------------//
 #if CFG_TUD_ENABLED
 
 #if defined(NRF54LM20A_ENGA_XXAA)
-  // Start the USB voltage regulator
-  NRF_VREGUSB->TASKS_START = VREGUSB_TASKS_START_TASKS_START_Trigger;
-
   // Request HFXO crystal clock for PCLK24M (required by USBHS core)
   NRF_CLOCK->TASKS_XO24MSTART = CLOCK_TASKS_XO24MSTART_TASKS_XO24MSTART_Trigger;
   while (!NRF_CLOCK->EVENTS_XO24MSTARTED) {}
   NRF_CLOCK->EVENTS_XO24MSTARTED = 0;
 #endif
 
-#if defined(NRF54H20_XXAA)
-  // Enable the USBHS wrapper (core + PHY) before any DWC2 register access
-  NRF_USBHS->ENABLE = (USBHS_ENABLE_PHY_Enabled << USBHS_ENABLE_PHY_Pos) |
-                       (USBHS_ENABLE_CORE_Enabled << USBHS_ENABLE_CORE_Pos);
-  NRF_USBHS->TASKS_START = USBHS_TASKS_START_TASKS_START_Trigger;
-  // Brief delay for PHY PLL lock and core power-up
-  for (volatile int i = 0; i < 1000; i++) {}
-#endif
-
-#if defined(NRF54LM20A_ENGA_XXAA)
-  // Based on Zephyr usbhs_enable_core() in drivers/usb/udc/udc_dwc2_vendor_quirks.h
-  // Step 1: Power up core only (PHY not yet)
-  NRF_USBHS->ENABLE = USBHS_ENABLE_CORE_Msk;
-
-  // Step 2: Override ID=Device (bit 31), and temporarily override VBUSVALID
-  NRF_USBHS->PHY.OVERRIDEVALUES = (USBHS_PHY_OVERRIDEVALUES_ID_Device << USBHS_PHY_OVERRIDEVALUES_ID_Pos);
-  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk | USBHS_PHY_INPUTOVERRIDE_VBUSVALID_Msk;
-
-  // Step 3: Release PHY power-on reset by enabling PHY
-  NRF_USBHS->ENABLE = USBHS_ENABLE_PHY_Msk | USBHS_ENABLE_CORE_Msk;
-
-  // Step 4: Wait 45us for PHY clock to start
-  NRFX_DELAY_US(45);
-
-  // Step 5: Release DWC2 reset
-  NRF_USBHS->TASKS_START = USBHS_TASKS_START_TASKS_START_Trigger;
-
-  // Step 6: Wait for clock to start to avoid hang on too early register read
-  NRFX_DELAY_US(2);
-
-  // Step 7: Clear VBUSVALID override (keep ID=Device override)
-  // DWC2 is now in Non-Driving opmode; D+ pull-up will activate when DWC2 clears DCTL SftDiscon
-  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk;
-
-  // Barrier: USBHS wrapper (0x5005A000) and USBHSCORE (0x50020000) are separate
-  // peripheral blocks. Ensure the ENABLE/TASKS_START writes have propagated from
-  // the Cortex-M33 write buffer to hardware before anyone reads DWC2 core regs.
-  __DSB();
-
-#endif
-
   // Priorities 0, 1, 4 (nRF52) are reserved for SoftDevice
   // 2 is highest for application
   NVIC_SetPriority(USBD_IRQn, 2);
@@ -329,11 +316,18 @@ size_t board_get_unique_id(uint8_t id[], size_t max_len) {
 }
 
 int board_uart_read(uint8_t* buf, int len) {
+#if CFG_TUSB_OS == OPT_OS_ZEPHYR
   (void) buf;
   (void) len;
   return -1;
-//  nrfx_err_t err = nrfx_uarte_rx(&_uart_id, buf, (size_t) len);
-//  return NRFX_SUCCESS == err ? len : 0;
+#else
+  int count = 0;
+  while (count < len && rx_fifo_tail != rx_fifo_head) {
+    buf[count++] = rx_fifo[rx_fifo_tail];
+    rx_fifo_tail = (rx_fifo_tail + 1) & (UART_RX_BUFSIZE - 1);
+  }
+  return count;
+#endif
 }
 
 int board_uart_write(void const* buf, int len) {
@@ -341,7 +335,10 @@ int board_uart_write(void const* buf, int len) {
   (void) buf;
   return len;
 #else
-  nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len ,0);
+  if (nrfx_uarte_tx_in_progress(&_uart_id)) {
+    return 0;
+  }
+  nrfx_err_t err = nrfx_uarte_tx(&_uart_id, (uint8_t const*) buf, (size_t) len, 0);
   return (NRFX_SUCCESS == err) ? len : 0;
 #endif
 }
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index bdd3a59ed..da6ee894a 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -442,12 +442,12 @@ bool dcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
 }
 
 bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
-  (void) rh_init;
-  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+  dwc2_clock_init(rhport, rh_init->role);
 
   tu_memclr(&_dcd_data, sizeof(_dcd_data));
 
   // Core Initialization
+  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   const bool is_hs_phy = dwc2_core_is_highspeed_phy(dwc2, TUD_OPT_HIGH_SPEED);
   const bool is_dma = dma_device_enabled(dwc2);
   TU_ASSERT(dwc2_core_init(rhport, is_hs_phy, is_dma));
diff --git a/src/portable/synopsys/dwc2/dwc2_at32.h b/src/portable/synopsys/dwc2/dwc2_at32.h
index 594d350b7..85fa9b20b 100644
--- a/src/portable/synopsys/dwc2/dwc2_at32.h
+++ b/src/portable/synopsys/dwc2/dwc2_at32.h
@@ -79,6 +79,12 @@ static const dwc2_controller_t _dwc2_controller[] = {
 #endif
 };
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
   (void) role;
   const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
diff --git a/src/portable/synopsys/dwc2/dwc2_bcm.h b/src/portable/synopsys/dwc2/dwc2_bcm.h
index 50f3122e8..91cae821e 100644
--- a/src/portable/synopsys/dwc2/dwc2_bcm.h
+++ b/src/portable/synopsys/dwc2/dwc2_bcm.h
@@ -46,6 +46,12 @@ static const dwc2_controller_t _dwc2_controller[] =
 #define dcache_invalidate(_addr, _size)         data_invalidate(_addr, _size)
 #define dcache_clean_invalidate(_addr, _size)   data_clean_and_invalidate(_addr, _size)
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_enable(uint8_t rhport)
 {
diff --git a/src/portable/synopsys/dwc2/dwc2_common.h b/src/portable/synopsys/dwc2/dwc2_common.h
index 9f28ab2e0..5c4798d21 100644
--- a/src/portable/synopsys/dwc2/dwc2_common.h
+++ b/src/portable/synopsys/dwc2/dwc2_common.h
@@ -38,13 +38,15 @@
 #include "host/hcd.h"
 #endif
 
-// Following symbols must be defined by port header
-// - _dwc2_controller[]: array of controllers
-// - DWC2_EP_MAX: largest EP counts of all controllers
-// - dwc2_phy_init/dwc2_phy_update: phy init called before and after core reset
-// - dwc2_phy_deinit(dwc2, hs_phy_type): phy deinit to disable PHY power, only deinit the phy used by core
-// - dwc2_dcd_int_enable/dwc2_dcd_int_disable
-// - dwc2_remote_wakeup_delay
+/* Following symbols must be defined by port header
+  - _dwc2_controller[]: array of controllers
+  - DWC2_EP_MAX: largest EP counts of all controllers
+  - dwc2_clock_init(): clock init call before
+  - dwc2_phy_init/dwc2_phy_update: phy init called before and after core reset
+  - dwc2_phy_deinit(dwc2, hs_phy_type): phy deinit to disable PHY power, only deinit the phy used by core
+  - dwc2_dcd_int_enable/dwc2_dcd_int_disable
+  - dwc2_remote_wakeup_delay
+*/
 
 #if defined(TUP_USBIP_DWC2_STM32)
   #include "dwc2_stm32.h"
diff --git a/src/portable/synopsys/dwc2/dwc2_efm32.h b/src/portable/synopsys/dwc2/dwc2_efm32.h
index 167f5b4cd..063360873 100644
--- a/src/portable/synopsys/dwc2/dwc2_efm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_efm32.h
@@ -43,6 +43,12 @@ static const dwc2_controller_t _dwc2_controller[] =
   { .reg_base = DWC2_REG_BASE, .irqnum = USB_IRQn, .ep_count = DWC2_EP_MAX, .otg_dfifo_depth = 512 }
 };
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_enable(uint8_t rhport)
 {
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index 99ef9456f..6a10dc7f8 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -97,6 +97,12 @@ static void dwc2_int_handler_wrap(void* arg) {
 #endif
 }
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
   if (enabled) {
     esp_intr_alloc(_dwc2_controller[rhport].irqnum, ESP_INTR_FLAG_LOWMED,
diff --git a/src/portable/synopsys/dwc2/dwc2_gd32.h b/src/portable/synopsys/dwc2/dwc2_gd32.h
index 396d17e30..28c3fde5e 100644
--- a/src/portable/synopsys/dwc2/dwc2_gd32.h
+++ b/src/portable/synopsys/dwc2/dwc2_gd32.h
@@ -57,6 +57,12 @@ static inline void __eclic_disable_interrupt (uint32_t irq){
   *(volatile uint8_t*)(ECLIC_INTERRUPT_ENABLE_BASE + (irq * 4)) = 0;
 }
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_enable(uint8_t rhport)
 {
diff --git a/src/portable/synopsys/dwc2/dwc2_nrf.h b/src/portable/synopsys/dwc2/dwc2_nrf.h
index fc9cd18bc..a1bf692f8 100644
--- a/src/portable/synopsys/dwc2/dwc2_nrf.h
+++ b/src/portable/synopsys/dwc2/dwc2_nrf.h
@@ -29,8 +29,20 @@
 #ifndef TUSB_DWC2_NRF_H
 #define TUSB_DWC2_NRF_H
 
+// NRF is device only without OTG support
 #include "nrf.h"
 
+#ifdef __GNUC__
+#pragma GCC diagnostic push
+#pragma GCC diagnostic ignored "-Wcast-align"
+#endif
+
+#include <soc/nrfx_coredep.h>
+
+#ifdef __GNUC__
+#pragma GCC diagnostic pop
+#endif
+
 #define DWC2_EP_MAX 16
 
 // Use the auto-resolving peripheral pointer (respects TrustZone secure/non-secure mapping)
@@ -44,6 +56,46 @@ static const dwc2_controller_t _dwc2_controller[] = {
   {.reg_base = DWC2_REG_BASE, .irqnum = USBHS_IRQn, .ep_count = 16, .otg_dfifo_depth = 3072},
 };
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+
+  #if defined(NRF54LM20A_ENGA_XXAA)
+  // Start the USB voltage regulator
+  NRF_VREGUSB->TASKS_START = VREGUSB_TASKS_START_TASKS_START_Trigger;
+
+  // Based on Zephyr usbhs_enable_core() in drivers/usb/udc/udc_dwc2_vendor_quirks.h
+  // Step 1: Power up core only (PHY not yet)
+  NRF_USBHS->ENABLE = USBHS_ENABLE_CORE_Msk;
+
+  // Step 2: Override ID=Device (bit 31), and temporarily override VBUSVALID
+  NRF_USBHS->PHY.OVERRIDEVALUES = (USBHS_PHY_OVERRIDEVALUES_ID_Device << USBHS_PHY_OVERRIDEVALUES_ID_Pos);
+  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk | USBHS_PHY_INPUTOVERRIDE_VBUSVALID_Msk;
+
+  // Step 3: Release PHY power-on reset by enabling PHY
+  NRF_USBHS->ENABLE = USBHS_ENABLE_PHY_Msk | USBHS_ENABLE_CORE_Msk;
+
+  // Step 4: Wait 45us for PHY clock to start
+  nrfx_coredep_delay_us(45);
+
+  // Step 5: Release DWC2 reset
+  NRF_USBHS->TASKS_START = USBHS_TASKS_START_TASKS_START_Trigger;
+
+  // Step 6: Wait for clock to start to avoid hang on too early register read
+  nrfx_coredep_delay_us(2);
+
+  // Step 7: Clear VBUSVALID override (keep ID=Device override)
+  // DWC2 is now in Non-Driving opmode; D+ pull-up will activate when DWC2 clears DCTL SftDiscon
+  NRF_USBHS->PHY.INPUTOVERRIDE = USBHS_PHY_INPUTOVERRIDE_ID_Msk;
+
+  // Barrier: USBHS wrapper (0x5005A000) and USBHSCORE (0x50020000) are separate
+  // peripheral blocks. Ensure the ENABLE/TASKS_START writes have propagated from
+  // the Cortex-M33 write buffer to hardware before anyone reads DWC2 core regs.
+  __DSB();
+  #endif
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
   (void)rhport;
   (void)role;
diff --git a/src/portable/synopsys/dwc2/dwc2_stm32.h b/src/portable/synopsys/dwc2/dwc2_stm32.h
index 5f6e98224..e5379dfe3 100644
--- a/src/portable/synopsys/dwc2/dwc2_stm32.h
+++ b/src/portable/synopsys/dwc2/dwc2_stm32.h
@@ -162,6 +162,12 @@ static const dwc2_controller_t _dwc2_controller[] = {
 // SystemCoreClock is already included by family header
 // extern uint32_t SystemCoreClock;
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE static inline void dwc2_int_set(uint8_t rhport, tusb_role_t role, bool enabled) {
   (void) role;
   const IRQn_Type irqn = (IRQn_Type) _dwc2_controller[rhport].irqnum;
diff --git a/src/portable/synopsys/dwc2/dwc2_xmc.h b/src/portable/synopsys/dwc2/dwc2_xmc.h
index b946444ee..85b2a2633 100644
--- a/src/portable/synopsys/dwc2/dwc2_xmc.h
+++ b/src/portable/synopsys/dwc2/dwc2_xmc.h
@@ -42,6 +42,12 @@ static const dwc2_controller_t _dwc2_controller[] =
   { .reg_base = USB0_BASE, .irqnum = USB0_0_IRQn, .ep_count = DWC2_EP_MAX, .otg_dfifo_depth = 512 }
 };
 
+// MCU specific to enable dwc2 clock/power before any access to register
+TU_ATTR_ALWAYS_INLINE static inline void dwc2_clock_init(uint8_t rhport, tusb_role_t role) {
+  (void) rhport;
+  (void) role;
+}
+
 TU_ATTR_ALWAYS_INLINE
 static inline void dwc2_dcd_int_enable(uint8_t rhport)
 {
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index cd2ddf572..6098d6eaa 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -407,10 +407,12 @@ bool hcd_configure(uint8_t rhport, uint32_t cfg_id, const void* cfg_param) {
 
 // Initialize controller to host mode
 bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
-  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
+  dwc2_clock_init(rhport, rh_init->role);
+
   tu_memclr(&_hcd_data, sizeof(_hcd_data));
 
   // Core Initialization
+  dwc2_regs_t* dwc2 = DWC2_REG(rhport);
   const bool is_hs_phy = dwc2_core_is_highspeed_phy(dwc2, _tuh_cfg.use_hs_phy);
   const bool is_dma = dma_host_enabled(dwc2);
   TU_ASSERT(dwc2_core_init(rhport, is_hs_phy, is_dma));
-- 
cgit v1.3.1


From 4b0ed0b29ab967eef555c4189c9061936927ab17 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Apr 2026 17:46:41 +0700
Subject: fix nrf54 and freertos port

---
 hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h | 6 ++++++
 1 file changed, 6 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
index 0ddd536fb..b6395306f 100644
--- a/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
+++ b/hw/bsp/nrf/FreeRTOSConfig/FreeRTOSConfig.h
@@ -53,6 +53,12 @@
 #define configENABLE_TRUSTZONE                  0
 #define configMINIMAL_SECURE_STACK_SIZE         (1024)
 
+/* nRF54 runs entirely in Secure mode (SAU present but no SPE bootloader).
+ * Tell FreeRTOS CM33 NTZ port to use Secure-compatible EXC_RETURN values. */
+#if defined(NRF54H20_XXAA) || defined(NRF54LM20A_ENGA_XXAA)
+#define configRUN_FREERTOS_SECURE_ONLY          1
+#endif
+
 #define configUSE_PREEMPTION                    1
 #define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
 #define configCPU_CLOCK_HZ                      SystemCoreClock
-- 
cgit v1.3.1


From b2b498f17e403b006943ca15d9884b4f596eacfb Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 10 Apr 2026 21:17:46 +0700
Subject: clean up

---
 hw/bsp/nrf/boards/nrf54lm20dk/board.cmake | 3 ---
 src/portable/synopsys/dwc2/dwc2_info.md   | 2 +-
 src/portable/synopsys/dwc2/dwc2_info.py   | 2 +-
 3 files changed, 2 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
index fb0ccdfdf..8c2b83346 100644
--- a/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
+++ b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
@@ -5,7 +5,4 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CFG_EXAMPLE_VIDEO_READONLY
     )
-  target_sources(${TARGET} PRIVATE
-#    ${NRFX_PATH}/drivers/src/nrfx_usbreg.c
-    )
 endfunction()
diff --git a/src/portable/synopsys/dwc2/dwc2_info.md b/src/portable/synopsys/dwc2/dwc2_info.md
index 051c3ab1f..205684e4b 100644
--- a/src/portable/synopsys/dwc2/dwc2_info.md
+++ b/src/portable/synopsys/dwc2/dwc2_info.md
@@ -1,4 +1,4 @@
-|                            | AT32 F405 FS   | AT32 F405 HS   | AT32 F415   | BCM2711 (Pi4)   | EFM32GG      | ESP32-S2/S3   | ESP32-P4     | nRF54        | nRF54LM20    | ST F407/429 HS   | ST F207/F407/411/429 FS   | ST L476 FS   | ST F412/76x FS   | ST F76x HS   | ST H743/H750   | ST F723/L4P5 FS   | ST F723 HS   | ST H7RS FS   | ST U5A5/H7RS/N6 HS   | XMC4500      | GD32VF103   |
+|                            | AT32 F405 FS   | AT32 F405 HS   | AT32 F415   | BCM2711 (Pi4)   | EFM32GG      | ESP32-S2/S3   | ESP32-P4     | nRF54H20     | nRF54LM20    | ST F407/429 HS   | ST F207/F407/411/429 FS   | ST L476 FS   | ST F412/76x FS   | ST F76x HS   | ST H743/H750   | ST F723/L4P5 FS   | ST F723 HS   | ST H7RS FS   | ST U5A5/H7RS/N6 HS   | XMC4500      | GD32VF103   |
 |:---------------------------|:---------------|:---------------|:------------|:----------------|:-------------|:--------------|:-------------|:-------------|:-------------|:-----------------|:--------------------------|:-------------|:-----------------|:-------------|:---------------|:------------------|:-------------|:-------------|:---------------------|:-------------|:------------|
 | GUID                       | 0x00002000     | 0x00000000     | 0x00001000  | 0x2708A000      | 0x00000000   | 0x00000000    | 0x00000000   | 0x00000000   | 0x00000000   | 0x00001100       | 0x00001200                | 0x00002000   | 0x00002000       | 0x00002100   | 0x00002300     | 0x00003000        | 0x00003100   | 0x00004000   | 0x00005000           | 0x00AEC000   | 0x00001000  |
 | GSNPSID                    | 0x4F54400A     | 0x4F54400A     | 0x4F54400A  | 0x4F54280A      | 0x4F54330A   | 0x4F54400A    | 0x4F54400A   | 0x4F54430A   | 0x4F54500B   | 0x4F54281A       | 0x4F54281A                | 0x4F54310A   | 0x4F54320A       | 0x4F54320A   | 0x4F54330A     | 0x4F54330A        | 0x4F54330A   | 0x4F54411A   | 0x4F54411A           | 0x4F54292A   | 0x00000000  |
diff --git a/src/portable/synopsys/dwc2/dwc2_info.py b/src/portable/synopsys/dwc2/dwc2_info.py
index eab95ffe1..8ee04e179 100755
--- a/src/portable/synopsys/dwc2/dwc2_info.py
+++ b/src/portable/synopsys/dwc2/dwc2_info.py
@@ -15,7 +15,7 @@ dwc2_reg_value = {
     'EFM32GG': [0, 0x4F54330A, 0, 0x228F5910, 0x01F204E8, 0x1BF08030],
     'ESP32-S2/S3': [0, 0x4F54400A, 0, 0x224DD930, 0x0C804B5, 0xD3F0A030],
     'ESP32-P4': [0, 0x4F54400A, 0, 0x215FFFD0, 0x03805EB5, 0xDFF1A030],
-    # 'nRF54H20': [0, 0x4F54430A, 0xAA555000, 0x228BFC72, 0x0BEAC0E8, 0x1E10AA60],
+    'nRF54H20': [0, 0x4F54430A, 0xAA555000, 0x228BFC72, 0x0BEAC0E8, 0x1E10AA60], # base on Preliminary Datasheet v0.7
     'nRF54LM20': [0, 0x4F54500B, 0x00000000, 0x22AFFC52, 0x0BE0C0E8, 0x3E10AA60],
     # ST sort by GUID
     'ST F407/429 HS': [0x1100, 0x4F54281A, 0, 0x229ED590, 0x03F403E8, 0x17F00030],
-- 
cgit v1.3.1


From 44b0ee05390b0f97d006a016b25fa513699e0a96 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Apr 2026 10:51:20 +0700
Subject: get freertos working with rp2040

---
 .idea/cmake.xml                                    |  6 +-
 .../device/audio_4_channel_mic_freertos/skip.txt   |  1 -
 .../device/audio_4_channel_mic_freertos/src/main.c |  2 +-
 examples/device/audio_test_freertos/skip.txt       |  1 -
 examples/device/cdc_msc_freertos/skip.txt          |  1 -
 examples/device/cdc_msc_freertos/src/msc_disk.c    |  2 +-
 examples/device/hid_composite_freertos/skip.txt    |  1 -
 examples/device/midi_test_freertos/skip.txt        |  1 -
 examples/host/cdc_msc_hid_freertos/skip.txt        |  1 -
 hw/bsp/family_support.cmake                        | 71 ++++++++++++++++++----
 hw/bsp/rp2040/family.c                             | 14 +++++
 hw/bsp/rp2040/family.cmake                         | 48 +++++++--------
 test/hil/hil_test.py                               |  2 +
 tools/get_deps.py                                  |  5 +-
 14 files changed, 106 insertions(+), 50 deletions(-)

(limited to 'hw')

diff --git a/.idea/cmake.xml b/.idea/cmake.xml
index 6f87e2a29..14dbdfe66 100644
--- a/.idea/cmake.xml
+++ b/.idea/cmake.xml
@@ -5,9 +5,9 @@
       <configuration PROFILE_NAME="raspberrypi_zero" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero -DLOG=1" />
       <configuration PROFILE_NAME="raspberrypi_zero2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_zero2 -DLOG=1" />
       <configuration PROFILE_NAME="raspberrypi_cm4" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberrypi_cm4 -DLOG=1" />
-      <configuration PROFILE_NAME="raspberry_pi_pico" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1" />
+      <configuration PROFILE_NAME="raspberry_pi_pico" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1" />
       <configuration PROFILE_NAME="raspberry_pi_pico-pio_host" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico -DLOG=1 -DCFLAGS_CLI=&quot;-DCFG_TUH_RPI_PIO_USB=1&quot;" />
-      <configuration PROFILE_NAME="raspberry_pi_pico2" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico2 -DLOG=1" />
+      <configuration PROFILE_NAME="raspberry_pi_pico2" ENABLED="true" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico2 -DLOG=1" />
       <configuration PROFILE_NAME="raspberry_pi_pico2-pio_host" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=raspberry_pi_pico2 -DLOG=1 -DCFLAGS_CLI=&quot;-DCFG_TUH_RPI_PIO_USB=1&quot;" />
       <configuration PROFILE_NAME="feather_rp2040" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=pico_sdk -DPICO_BOARD=adafruit_feather_rp2040 -DLOG=1" />
       <configuration PROFILE_NAME="feather_rp2040_max3421" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=feather_rp2040_max3421 -DLOG=1" />
@@ -101,6 +101,8 @@
       <configuration PROFILE_NAME="nrf52840dk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf52840dk -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="nrf52840dk-zephyr" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf52840dk -DLOG=1 -DTRACE_ETM=1 -DRTOS=zephyr" BUILD_OPTIONS="-v" />
       <configuration PROFILE_NAME="nrf5340dk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf5340dk -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="nrf54h20dk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=nrf54h20dk -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
+      <configuration PROFILE_NAME="nrf54lm20dk" ENABLED="false" CONFIG_NAME="MinSizeRel" GENERATION_OPTIONS="-DBOARD=nrf54lm20dk -DLOG=0 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="metro m7 1011 sd" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011_sd -DLOG=1 -DLOGGER=RTT -DTRACE_ETM=1" />
       <configuration PROFILE_NAME="metro_m7_1011" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=metro_m7_1011 -DLOG=1 -DLOGGER=RTT" />
       <configuration PROFILE_NAME="rt1010 evk" ENABLED="false" CONFIG_NAME="Debug" GENERATION_OPTIONS="-DBOARD=mimxrt1010_evk -DLOG=1 -DLOGGER=RTT" />
diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index be44cb2c0..61a7b0605 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:FT90X
-mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
diff --git a/examples/device/audio_4_channel_mic_freertos/src/main.c b/examples/device/audio_4_channel_mic_freertos/src/main.c
index 4572bbb3c..eac66a4ef 100644
--- a/examples/device/audio_4_channel_mic_freertos/src/main.c
+++ b/examples/device/audio_4_channel_mic_freertos/src/main.c
@@ -310,7 +310,7 @@ bool tud_audio_set_req_entity_cb(uint8_t rhport, tusb_control_request_t const *p
         // Request uses format layout 2
         TU_VERIFY(p_request->wLength == sizeof(audio20_control_cur_2_t));
 
-        volume[channelNum] = ((audio20_control_cur_2_t *) pBuff)->bCur;
+        volume[channelNum] = (uint16_t) ((audio20_control_cur_2_t *) pBuff)->bCur;
         TU_LOG1("    Set Volume: %d dB of channel: %u\r\n", volume[channelNum], channelNum);
         return true;
 
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 007fece53..386a0cdfb 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:FT90X
-mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index 31d808d8e..429c62d93 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:FT90X
-mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
diff --git a/examples/device/cdc_msc_freertos/src/msc_disk.c b/examples/device/cdc_msc_freertos/src/msc_disk.c
index ff918205e..ab551c288 100644
--- a/examples/device/cdc_msc_freertos/src/msc_disk.c
+++ b/examples/device/cdc_msc_freertos/src/msc_disk.c
@@ -168,7 +168,7 @@ static void io_task(void *params) {
   while (1) {
     if (xQueueReceive(io_queue, &io_ops, portMAX_DELAY)) {
       uint8_t* addr = (uint8_t*) (uintptr_t) (msc_disk[io_ops.lba] + io_ops.offset);
-      int32_t nbytes = io_ops.bufsize;
+      int32_t nbytes = (int32_t) io_ops.bufsize;
       if (io_ops.is_read) {
         memcpy(io_ops.buffer, addr, io_ops.bufsize);
       } else {
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index 8ae238584..d2ee8d636 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:FT90X
-mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index 8ae238584..d2ee8d636 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -9,7 +9,6 @@ mcu:MCXA15
 mcu:MKL25ZXX
 mcu:MSP430x5xx
 mcu:FT90X
-mcu:RP2040
 mcu:SAMD11
 mcu:VALENTYUSB_EPTRI
 mcu:RAXXX
diff --git a/examples/host/cdc_msc_hid_freertos/skip.txt b/examples/host/cdc_msc_hid_freertos/skip.txt
index bb62547a6..f0be07d25 100644
--- a/examples/host/cdc_msc_hid_freertos/skip.txt
+++ b/examples/host/cdc_msc_hid_freertos/skip.txt
@@ -1,4 +1,3 @@
 mcu:CH32F20X
-mcu:RP2040
 board:lpcxpresso54114
 mcu:FT90X
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 2274515e4..d69884407 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -367,24 +367,66 @@ endfunction()
 # Most families use these settings except rp2040 and espressif
 #-------------------------------------------------------------
 function(family_add_board BOARD_TARGET)
-  # empty function, should be redefined in FAMILY/family.cmake
+  # empty function, should be overridden in FAMILY/family.cmake
 endfunction()
 
 # Add RTOS to example
 function(family_add_rtos TARGET RTOS)
   if (RTOS STREQUAL "freertos")
-    if (NOT TARGET freertos_config)
-      add_library(freertos_config INTERFACE)
-      target_include_directories(freertos_config INTERFACE ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig)
-      # add board definition to freertos_config mostly for SystemCoreClock
-      target_link_libraries(freertos_config INTERFACE board_${BOARD})
+    # RP2040 family uses Raspberry Pi's FreeRTOS-Kernel fork with platform-specific SMP port
+    if (FAMILY STREQUAL "rp2040")
+      if (NOT TARGET FreeRTOS-Kernel)
+        set(FREERTOS_KERNEL_PATH ${TOP}/hw/mcu/raspberry_pi/FreeRTOS-Kernel)
+        set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig)
+        if (PICO_PLATFORM STREQUAL "rp2040")
+          set(FREERTOS_PORT_PATH ${FREERTOS_KERNEL_PATH}/portable/ThirdParty/GCC/RP2040)
+        else()
+          set(FREERTOS_PORT_PATH ${FREERTOS_KERNEL_PATH}/portable/ThirdParty/GCC/RP2350_ARM_NTZ)
+        endif()
+        include(${FREERTOS_PORT_PATH}/library.cmake)
+      endif()
+      target_link_libraries(${TARGET} PUBLIC FreeRTOS-Kernel-Static)
+
+      # Suppress warnings in FreeRTOS kernel port sources
+      foreach(_ft IN ITEMS FreeRTOS-Kernel FreeRTOS-Kernel-Core FreeRTOS-Kernel-Static)
+        get_target_property(_srcs ${_ft} INTERFACE_SOURCES)
+        if (_srcs)
+          set_source_files_properties(${_srcs} PROPERTIES COMPILE_OPTIONS "-w")
+        endif()
+      endforeach()
+
+      # FreeRTOS headers use undefined macros in #if (triggers -Wundef/-Werror).
+      # Convert all FreeRTOS include dirs to SYSTEM to suppress warnings.
+      foreach(_ft IN ITEMS FreeRTOS-Kernel FreeRTOS-Kernel-Core)
+        get_target_property(_incs ${_ft} INTERFACE_INCLUDE_DIRECTORIES)
+        if (_incs)
+          set_target_properties(${_ft} PROPERTIES INTERFACE_INCLUDE_DIRECTORIES "")
+          target_include_directories(${_ft} SYSTEM INTERFACE ${_incs})
+        endif()
+      endforeach()
+    else()
+      # All other families: use upstream FreeRTOS-Kernel with add_subdirectory
+      if (NOT TARGET freertos_config)
+        add_library(freertos_config INTERFACE)
+        target_include_directories(freertos_config INTERFACE
+          ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig)
+        target_link_libraries(freertos_config INTERFACE board_${BOARD})
+      endif()
+
+      if (NOT TARGET freertos_kernel)
+        add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
+      endif ()
+
+      target_link_libraries(${TARGET} PUBLIC freertos_kernel)
     endif()
 
-    if (NOT TARGET freertos_kernel)
-      add_subdirectory(${TOP}/lib/FreeRTOS-Kernel ${CMAKE_BINARY_DIR}/lib/freertos_kernel)
-    endif ()
+    # RP2040: remove CFG_TUSB_OS=OPT_OS_PICO from tinyusb_common_base to avoid redefinition
+    if (FAMILY STREQUAL "rp2040" AND TARGET tinyusb_common_base)
+      get_target_property(_defs tinyusb_common_base INTERFACE_COMPILE_DEFINITIONS)
+      list(REMOVE_ITEM _defs "CFG_TUSB_OS=${TINYUSB_OPT_OS}")
+      set_property(TARGET tinyusb_common_base PROPERTY INTERFACE_COMPILE_DEFINITIONS ${_defs})
+    endif()
 
-    target_link_libraries(${TARGET} PUBLIC freertos_kernel)
     target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_FREERTOS)
   elseif (RTOS STREQUAL "threadx")
     if (NOT TARGET threadx)
@@ -465,7 +507,10 @@ function(family_configure_common TARGET RTOS)
     target_compile_definitions(${TARGET} PUBLIC LOGGER_UART)
   endif ()
 
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+  # rp2040 family handles warnings and linker map in its own family_configure_example
+  if (FAMILY STREQUAL "rp2040")
+    # skip - handled by rp2040_family_configure_example_warnings
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_compile_options(${TARGET} PRIVATE ${WARN_FLAGS_${CMAKE_C_COMPILER_ID}})
     target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
     if (CMAKE_C_COMPILER_ID STREQUAL "GNU" AND CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0
@@ -557,11 +602,11 @@ endfunction()
 
 #-------------------------------------------------------
 # Example Target Configure (Default rule)
-# These function can be redefined in FAMILY/family.cmake
+# These function can be overridden in FAMILY/family.cmake
 #--------------------------------------------------------
 
 function(family_configure_example TARGET RTOS)
-  # empty function, should be redefined in FAMILY/family.cmake
+  # empty function, should be overridden in FAMILY/family.cmake
 endfunction()
 
 # Configure device example with RTOS
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index b5a1375a2..a4642face 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -298,6 +298,20 @@ void board_init_after_tusb(void) {
   // nothing to do
 }
 
+//--------------------------------------------------------------------+
+// FreeRTOS hooks
+//--------------------------------------------------------------------+
+#if CFG_TUSB_OS == OPT_OS_FREERTOS
+#include "FreeRTOS.h"
+#include "task.h"
+
+void vApplicationStackOverflowHook(TaskHandle_t xTask, char *pcTaskName) {
+  (void) xTask;
+  (void) pcTaskName;
+  panic("FreeRTOS stack overflow: %s", pcTaskName);
+}
+#endif
+
 void board_reset_to_bootloader(void) {
   // not implemented
 }
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 2e2cd436a..f125caafe 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -231,36 +231,32 @@ function(family_add_default_example_warnings TARGET)
   endif()
 endfunction()
 
+function(family_add_board BOARD_TARGET)
+	add_library(${BOARD_TARGET} INTERFACE)
+endfunction()
 
-# TODO merge with family_configure_common from family_support.cmake
-function(family_configure_target TARGET RTOS)
-	if (RTOS STREQUAL noos OR RTOS STREQUAL "")
-		set(RTOS_SUFFIX "")
-	else()
-		set(RTOS_SUFFIX _${RTOS})
-	endif()
-	# export RTOS_SUFFIX to parent scope
-	set(RTOS_SUFFIX ${RTOS_SUFFIX} PARENT_SCOPE)
 
-	# compile define from command line
-	if(DEFINED CFLAGS_CLI)
-		separate_arguments(CFLAGS_CLI)
-		target_compile_options(${TARGET} PUBLIC ${CFLAGS_CLI})
+function(family_configure_example TARGET RTOS)
+	# Set OS per-target: FreeRTOS or Pico SDK
+	if (NOT DEFINED RTOS)
+		set(RTOS noos CACHE STRING "RTOS")
+	endif ()
+
+	family_configure_common(${TARGET} ${RTOS})
+
+	# Set OS for non-RTOS targets (RTOS targets get it from family_add_rtos)
+	if (NOT RTOS STREQUAL "freertos")
+		target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=${TINYUSB_OPT_OS})
 	endif()
 
 	pico_add_extra_outputs(${TARGET})
 	pico_enable_stdio_uart(${TARGET} 1)
 
-  target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_board${RTOS_SUFFIX} tinyusb_additions)
+	target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_board tinyusb_additions)
 
-  family_flash_openocd(${TARGET})
+	family_flash_openocd(${TARGET})
 	family_flash_jlink(${TARGET})
-
-	# Generate linkermap target and post build. LINKERMAP_OPTION can be set with -D to change default options
-	family_add_bloaty(${TARGET})
-  family_add_linkermap(${TARGET})
-  family_add_membrowse(${TARGET})
 endfunction()
 
 
@@ -276,8 +272,8 @@ endfunction()
 
 
 function(family_configure_device_example TARGET RTOS)
-	family_configure_target(${TARGET} ${RTOS})
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device${RTOS_SUFFIX})
+	family_configure_example(${TARGET} ${RTOS})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device)
 	rp2040_family_configure_example_warnings(${TARGET})
 endfunction()
 
@@ -298,8 +294,8 @@ function(is_compiler_supported_by_pico_pio_usb OUTVAR)
 endfunction()
 
 function(family_configure_host_example TARGET RTOS)
-	family_configure_target(${TARGET} ${RTOS})
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host${RTOS_SUFFIX})
+	family_configure_example(${TARGET} ${RTOS})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host)
 	rp2040_family_configure_example_warnings(${TARGET})
 
 	# For rp2040 enable pico-pio-usb
@@ -319,7 +315,7 @@ endfunction()
 
 
 function(family_configure_dual_usb_example TARGET RTOS)
-	family_configure_target(${TARGET} ${RTOS})
+	family_configure_example(${TARGET} ${RTOS})
 	# require tinyusb_pico_pio_usb
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb )
 	rp2040_family_configure_example_warnings(${TARGET})
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index f23e2fc22..d50a60894 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -102,6 +102,8 @@ def get_serial_dev(id, vendor_str, product_str, ifnum):
         # just use id: mostly for cp210x/ftdi flasher
         pattern = f'/dev/serial/by-id/usb-*_{id}-if*'
         port_list = glob.glob(pattern)
+        if len(port_list) == 0:
+            raise RuntimeError(f'No serial device found for {pattern}')
         return port_list[0]
 
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 23f015c0d..eb87abf6e 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -12,7 +12,7 @@ deps_mandatory = {
                   '30ca13c62615df0d2e9104ab41256985b96590c1',
                   'all'],
     'lib/FreeRTOS-Kernel': ['https://github.com/FreeRTOS/FreeRTOS-Kernel.git',
-                            'cc0e0707c0c748713485b870bb980852b210877f',
+                            '9b777ae5c5b8e9e456065a00294d1e5f5f9facf5',
                             'all'],
     'lib/lwip': ['https://github.com/lwip-tcpip/lwip.git',
                  '159e31b689577dbf69cf0683bbaffbd71fa5ee10',
@@ -82,6 +82,9 @@ deps_optional = {
     'hw/mcu/nxp/mcux-devices-rt': ['https://github.com/nxp-mcuxpresso/mcux-devices-rt',
                             'dba2b523c9df61f3330bd186242f8210a8e47c45',
                             'imxrt'],
+    'hw/mcu/raspberry_pi/FreeRTOS-Kernel': ['https://github.com/raspberrypi/FreeRTOS-Kernel.git',
+                                           '4f7299d6ea746b27a9dd19e87af568e34bd65b15',
+                                           'rp2040'],
     'hw/mcu/raspberry_pi/Pico-PIO-USB': ['https://github.com/sekigon-gonnoc/Pico-PIO-USB.git',
                                          '675543bcc9baa8170f868ab7ba316d418dbcf41f',
                                          'rp2040'],
-- 
cgit v1.3.1


From b55786e43af764397ebadf96609d77826d38bffe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Apr 2026 13:17:12 +0700
Subject: refactor rp2040 family.cmake to use family_configure_example() and
 apply WARN_FLAGS to tinyusb sources and examples sources only (skip 3rd party
 library and mcu vendor)

---
 examples/host/msc_file_explorer/CMakeLists.txt |  14 +--
 hw/bsp/family_support.cmake                    |  38 +------
 hw/bsp/rp2040/FreeRTOSConfig/FreeRTOSConfig.h  | 144 +++++++++++++++++++++++++
 hw/bsp/rp2040/family.cmake                     | 117 ++++----------------
 4 files changed, 177 insertions(+), 136 deletions(-)
 create mode 100644 hw/bsp/rp2040/FreeRTOSConfig/FreeRTOSConfig.h

(limited to 'hw')

diff --git a/examples/host/msc_file_explorer/CMakeLists.txt b/examples/host/msc_file_explorer/CMakeLists.txt
index 21703030c..3c6d3352a 100644
--- a/examples/host/msc_file_explorer/CMakeLists.txt
+++ b/examples/host/msc_file_explorer/CMakeLists.txt
@@ -23,13 +23,6 @@ target_sources(${PROJECT_NAME} PUBLIC
   ${TOP}/lib/fatfs/source/ffunicode.c
   )
 
-# Suppress warnings on fatfs
-if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
-  set_source_files_properties(${TOP}/lib/fatfs/source/ff.c PROPERTIES
-    COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual"
-    )
-endif ()
-
 # Example include
 target_include_directories(${PROJECT_NAME} PUBLIC
   ${CMAKE_CURRENT_SOURCE_DIR}/src
@@ -40,3 +33,10 @@ target_include_directories(${PROJECT_NAME} PUBLIC
 # Configure compilation flags and libraries for the example without RTOS.
 # See the corresponding function in hw/bsp/FAMILY/family.cmake for details.
 family_configure_host_example(${PROJECT_NAME} noos)
+
+# Suppress warnings on fatfs
+if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+  set_source_files_properties(${TOP}/lib/fatfs/source/ff.c PROPERTIES
+    COMPILE_OPTIONS "-Wno-conversion -Wno-cast-qual"
+    )
+endif ()
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index d69884407..cb8ec6cf8 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -378,32 +378,10 @@ function(family_add_rtos TARGET RTOS)
       if (NOT TARGET FreeRTOS-Kernel)
         set(FREERTOS_KERNEL_PATH ${TOP}/hw/mcu/raspberry_pi/FreeRTOS-Kernel)
         set(FREERTOS_CONFIG_FILE_DIRECTORY ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/${FAMILY}/FreeRTOSConfig)
-        if (PICO_PLATFORM STREQUAL "rp2040")
-          set(FREERTOS_PORT_PATH ${FREERTOS_KERNEL_PATH}/portable/ThirdParty/GCC/RP2040)
-        else()
-          set(FREERTOS_PORT_PATH ${FREERTOS_KERNEL_PATH}/portable/ThirdParty/GCC/RP2350_ARM_NTZ)
-        endif()
-        include(${FREERTOS_PORT_PATH}/library.cmake)
+        # FreeRTOS_Kernel_import.cmake auto-selects RP2040/RP2350/RISC-V port based on PICO_PLATFORM
+        include(${FREERTOS_KERNEL_PATH}/portable/ThirdParty/GCC/RP2040/FreeRTOS_Kernel_import.cmake)
       endif()
       target_link_libraries(${TARGET} PUBLIC FreeRTOS-Kernel-Static)
-
-      # Suppress warnings in FreeRTOS kernel port sources
-      foreach(_ft IN ITEMS FreeRTOS-Kernel FreeRTOS-Kernel-Core FreeRTOS-Kernel-Static)
-        get_target_property(_srcs ${_ft} INTERFACE_SOURCES)
-        if (_srcs)
-          set_source_files_properties(${_srcs} PROPERTIES COMPILE_OPTIONS "-w")
-        endif()
-      endforeach()
-
-      # FreeRTOS headers use undefined macros in #if (triggers -Wundef/-Werror).
-      # Convert all FreeRTOS include dirs to SYSTEM to suppress warnings.
-      foreach(_ft IN ITEMS FreeRTOS-Kernel FreeRTOS-Kernel-Core)
-        get_target_property(_incs ${_ft} INTERFACE_INCLUDE_DIRECTORIES)
-        if (_incs)
-          set_target_properties(${_ft} PROPERTIES INTERFACE_INCLUDE_DIRECTORIES "")
-          target_include_directories(${_ft} SYSTEM INTERFACE ${_incs})
-        endif()
-      endforeach()
     else()
       # All other families: use upstream FreeRTOS-Kernel with add_subdirectory
       if (NOT TARGET freertos_config)
@@ -420,13 +398,6 @@ function(family_add_rtos TARGET RTOS)
       target_link_libraries(${TARGET} PUBLIC freertos_kernel)
     endif()
 
-    # RP2040: remove CFG_TUSB_OS=OPT_OS_PICO from tinyusb_common_base to avoid redefinition
-    if (FAMILY STREQUAL "rp2040" AND TARGET tinyusb_common_base)
-      get_target_property(_defs tinyusb_common_base INTERFACE_COMPILE_DEFINITIONS)
-      list(REMOVE_ITEM _defs "CFG_TUSB_OS=${TINYUSB_OPT_OS}")
-      set_property(TARGET tinyusb_common_base PROPERTY INTERFACE_COMPILE_DEFINITIONS ${_defs})
-    endif()
-
     target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=OPT_OS_FREERTOS)
   elseif (RTOS STREQUAL "threadx")
     if (NOT TARGET threadx)
@@ -507,9 +478,10 @@ function(family_configure_common TARGET RTOS)
     target_compile_definitions(${TARGET} PUBLIC LOGGER_UART)
   endif ()
 
-  # rp2040 family handles warnings and linker map in its own family_configure_example
   if (FAMILY STREQUAL "rp2040")
-    # skip - handled by rp2040_family_configure_example_warnings
+    # RP2040: apply warnings per-source-file (not per-target) since Pico SDK sources
+    # are INTERFACE and would not inherit target-level warnings correctly
+    family_add_default_example_warnings(${TARGET})
   elseif (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
     target_compile_options(${TARGET} PRIVATE ${WARN_FLAGS_${CMAKE_C_COMPILER_ID}})
     target_link_options(${TARGET} PUBLIC "LINKER:-Map=$<TARGET_FILE:${TARGET}>.map")
diff --git a/hw/bsp/rp2040/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/rp2040/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..fe030e6dc
--- /dev/null
+++ b/hw/bsp/rp2040/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,144 @@
+/*
+ * FreeRTOS V202111.00
+ * Copyright (C) 2020 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/* Scheduler Related */
+#define configUSE_PREEMPTION                    1
+#define configUSE_TICKLESS_IDLE                 0
+#define configUSE_IDLE_HOOK                     0
+#define configUSE_TICK_HOOK                     0
+#define configTICK_RATE_HZ                      ( ( TickType_t ) 1000 )
+#define configMAX_PRIORITIES                    5
+#define configMINIMAL_STACK_SIZE                ( configSTACK_DEPTH_TYPE ) 128
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+
+/* Synchronization Related */
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_APPLICATION_TASK_TAG          0
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5
+
+/* System */
+#define configSTACK_DEPTH_TYPE                  uint32_t
+#define configMESSAGE_BUFFER_LENGTH_TYPE        size_t
+
+/* Memory allocation related definitions. */
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION * 4 * 1024 )
+#define configAPPLICATION_ALLOCATED_HEAP        0
+
+/* Hook function related definitions. */
+#define configCHECK_FOR_STACK_OVERFLOW          2
+#define configUSE_MALLOC_FAILED_HOOK            0
+#define configUSE_DAEMON_TASK_STARTUP_HOOK      0
+#define configCHECK_HANDLER_INSTALLATION        0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS           0
+#define configRECORD_STACK_HIGH_ADDRESS         1
+#define configUSE_TRACE_FACILITY                1
+#define configUSE_STATS_FORMATTING_FUNCTIONS    0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                   0
+#define configMAX_CO_ROUTINE_PRIORITIES         2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                        1
+#define configTIMER_TASK_PRIORITY               ( configMAX_PRIORITIES - 2 )
+#define configTIMER_QUEUE_LENGTH                32
+#define configTIMER_TASK_STACK_DEPTH            configMINIMAL_STACK_SIZE
+
+/* SMP port configuration (set by the RP2xxx SMP port of FreeRTOS) */
+#if FREE_RTOS_KERNEL_SMP
+#ifndef configNUMBER_OF_CORES
+#define configNUMBER_OF_CORES                   1
+#endif
+#define configNUM_CORES                         configNUMBER_OF_CORES
+#define configTICK_CORE                         0
+#define configRUN_MULTIPLE_PRIORITIES           1
+#if configNUMBER_OF_CORES > 1
+#define configUSE_CORE_AFFINITY                 1
+#endif
+#define configUSE_PASSIVE_IDLE_HOOK             0
+#endif
+
+/* RP2040/RP2350 specific */
+#define configSUPPORT_PICO_SYNC_INTEROP         1
+#define configSUPPORT_PICO_TIME_INTEROP         1
+#define configUSE_DYNAMIC_EXCEPTION_HANDLERS    0
+
+/* Macros used in #if without #ifdef guards in port headers,
+ * must be explicitly defined to avoid -Wundef warnings. */
+#ifndef PICO_DIVIDER_DISABLE_INTERRUPTS
+#define PICO_DIVIDER_DISABLE_INTERRUPTS         0
+#endif
+#define portARMV8M_MINOR_VERSION                0
+
+#if defined(PICO_RP2350) && PICO_RP2350
+/* Cortex-M33 port configuration (RP2350). */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_MVE                        0
+#define configENABLE_TRUSTZONE                  0
+#define configRUN_FREERTOS_SECURE_ONLY          1
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY    16
+#endif
+
+#include <assert.h>
+#define configASSERT(x)                         assert(x)
+
+/* Set the following definitions to 1 to include the API function, or zero
+to exclude the API function. */
+#define INCLUDE_vTaskPrioritySet                0
+#define INCLUDE_uxTaskPriorityGet               0
+#define INCLUDE_vTaskDelete                     0
+#define INCLUDE_vTaskSuspend                    1 // required for portMAX_DELAY
+#define INCLUDE_xResumeFromISR                  0
+#define INCLUDE_vTaskDelayUntil                 1
+#define INCLUDE_vTaskDelay                      1
+#define INCLUDE_xTaskGetSchedulerState          0
+#define INCLUDE_xTaskGetCurrentTaskHandle       1
+#define INCLUDE_uxTaskGetStackHighWaterMark     0
+#define INCLUDE_xTaskGetIdleTaskHandle          0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle  0
+#define INCLUDE_pcTaskGetTaskName               0
+#define INCLUDE_eTaskGetState                   0
+#define INCLUDE_xEventGroupSetBitFromISR        1
+#define INCLUDE_xTimerPendFunctionCall          1
+
+#endif /* FREERTOS_CONFIG_H */
diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index f125caafe..1e49c7194 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -194,41 +194,27 @@ endif()
 # Functions
 #------------------------------------
 function(family_add_default_example_warnings TARGET)
+	if (DEFINED PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
+		return()
+	endif ()
+
   # Apply warnings to all TinyUSB interface library sources as well as examples sources
   # we cannot set compile options for target since it will not propagate to INTERFACE sources then picosdk files
+	get_target_property(EXAMPLE_SOURCES ${TARGET} SOURCES)
+	set_source_files_properties(${EXAMPLE_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
+
   foreach(TINYUSB_TARGET IN ITEMS tinyusb_common_base tinyusb_device_base tinyusb_host_base tinyusb_host_max3421 tinyusb_bsp)
     get_target_property(TINYUSB_SOURCES ${TINYUSB_TARGET} INTERFACE_SOURCES)
     set_source_files_properties(${TINYUSB_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
-  endforeach()
-
-  # Also apply to example sources, but filter out any source files from lib/ (e.g. fatfs)
-  get_target_property(EXAMPLE_SOURCES ${TARGET} SOURCES)
-  set(FILTERED_SOURCES "")
-  foreach(SOURCE_FILE IN LISTS EXAMPLE_SOURCES)
-    string(FIND "${SOURCE_FILE}" "${TOP}/lib" FOUND_POS)
-    if(FOUND_POS EQUAL -1)
-      list(APPEND FILTERED_SOURCES ${SOURCE_FILE})
-    endif()
-  endforeach()
-  set_source_files_properties(${FILTERED_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
+	endforeach()
 
   if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
     if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 12.0 AND NO_WARN_RWX_SEGMENTS_SUPPORTED)
       target_link_options(${TARGET} PRIVATE "LINKER:--no-warn-rwx-segments")
     endif()
-
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 10.0)
-      target_compile_options(${TARGET} PRIVATE -Wconversion)
-    endif()
-
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 8.0)
-      target_compile_options(${TARGET} PRIVATE -Wcast-function-type -Wstrict-overflow)
-    endif()
-
-    if (CMAKE_C_COMPILER_VERSION VERSION_GREATER_EQUAL 6.0)
-      target_compile_options(${TARGET} PRIVATE -Wno-strict-aliasing)
-    endif()
-  endif()
+	elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+		target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code)
+	endif ()
 endfunction()
 
 function(family_add_board BOARD_TARGET)
@@ -239,16 +225,21 @@ endfunction()
 function(family_configure_example TARGET RTOS)
 	# Set OS per-target: FreeRTOS or Pico SDK
 	if (NOT DEFINED RTOS)
-		set(RTOS noos CACHE STRING "RTOS")
+		set(RTOS noos)
 	endif ()
 
-	family_configure_common(${TARGET} ${RTOS})
-
 	# Set OS for non-RTOS targets (RTOS targets get it from family_add_rtos)
-	if (NOT RTOS STREQUAL "freertos")
+	if (RTOS STREQUAL noos)
 		target_compile_definitions(${TARGET} PUBLIC CFG_TUSB_OS=${TINYUSB_OPT_OS})
+	else ()
+		# remove CFG_TUSB_OS=OPT_OS_PICO from tinyusb_common_base to avoid redefinition
+		# NOTE: cannot remove it from interface declaration as pico-sdk use that
+		get_target_property(_defs tinyusb_common_base INTERFACE_COMPILE_DEFINITIONS)
+		list(REMOVE_ITEM _defs "CFG_TUSB_OS=${TINYUSB_OPT_OS}")
+		set_property(TARGET tinyusb_common_base PROPERTY INTERFACE_COMPILE_DEFINITIONS ${_defs})
 	endif()
 
+	family_configure_common(${TARGET} ${RTOS})
 	pico_add_extra_outputs(${TARGET})
 	pico_enable_stdio_uart(${TARGET} 1)
 
@@ -260,21 +251,9 @@ function(family_configure_example TARGET RTOS)
 endfunction()
 
 
-function(rp2040_family_configure_example_warnings TARGET)
-	if (NOT PICO_TINYUSB_NO_EXAMPLE_WARNINGS)
-		family_add_default_example_warnings(${TARGET})
-	endif()
-	if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
-		target_compile_options(${TARGET} PRIVATE -Wno-unreachable-code)
-	endif()
-	suppress_tinyusb_warnings()
-endfunction()
-
-
 function(family_configure_device_example TARGET RTOS)
 	family_configure_example(${TARGET} ${RTOS})
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device)
-	rp2040_family_configure_example_warnings(${TARGET})
 endfunction()
 
 
@@ -296,7 +275,6 @@ endfunction()
 function(family_configure_host_example TARGET RTOS)
 	family_configure_example(${TARGET} ${RTOS})
 	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_host)
-	rp2040_family_configure_example_warnings(${TARGET})
 
 	# For rp2040 enable pico-pio-usb
 	if (TARGET tinyusb_pico_pio_usb)
@@ -317,8 +295,7 @@ endfunction()
 function(family_configure_dual_usb_example TARGET RTOS)
 	family_configure_example(${TARGET} ${RTOS})
 	# require tinyusb_pico_pio_usb
-	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb )
-	rp2040_family_configure_example_warnings(${TARGET})
+	target_link_libraries(${TARGET} PUBLIC pico_stdlib tinyusb_device tinyusb_host tinyusb_pico_pio_usb)
 endfunction()
 
 
@@ -329,7 +306,6 @@ function(check_and_add_pico_pio_usb_support)
 		#------------------------------------
 		# PIO USB for both host and device
 		#------------------------------------
-
 		if (NOT DEFINED PICO_PIO_USB_PATH)
 			set(PICO_PIO_USB_PATH "${TOP}/hw/mcu/raspberry_pi/Pico-PIO-USB")
 		endif()
@@ -385,54 +361,3 @@ function(family_initialize_project PROJECT DIR)
 	# now re-check for adding Pico-PIO_USB support now SDK is definitely available
 	check_and_add_pico_pio_usb_support()
 endfunction()
-
-
-# This method must be called from the project scope to suppress known warnings in TinyUSB source files
-function(suppress_tinyusb_warnings)
-	# some of these are pretty silly warnings only occurring in some older GCC versions 9 or prior
-	if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-		if (CMAKE_C_COMPILER_VERSION VERSION_LESS 10.0)
-			set(CONVERSION_WARNING_FILES
-				${PICO_TINYUSB_PATH}/src/tusb.c
-				${PICO_TINYUSB_PATH}/src/common/tusb_fifo.c
-				${PICO_TINYUSB_PATH}/src/device/usbd.c
-				${PICO_TINYUSB_PATH}/src/device/usbd_control.c
-				${PICO_TINYUSB_PATH}/src/host/usbh.c
-				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
-				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
-				${PICO_TINYUSB_PATH}/src/class/hid/hid_device.c
-				${PICO_TINYUSB_PATH}/src/class/hid/hid_host.c
-				${PICO_TINYUSB_PATH}/src/class/audio/audio_device.c
-				${PICO_TINYUSB_PATH}/src/class/dfu/dfu_device.c
-				${PICO_TINYUSB_PATH}/src/class/dfu/dfu_rt_device.c
-				${PICO_TINYUSB_PATH}/src/class/midi/midi_device.c
-				${PICO_TINYUSB_PATH}/src/class/usbtmc/usbtmc_device.c
-				${PICO_TINYUSB_PATH}/src/portable/raspberrypi/rp2040/hcd_rp2040.c
-				)
-			foreach(SOURCE_FILE IN LISTS CONVERSION_WARNING_FILES)
-				set_source_files_properties(${SOURCE_FILE} PROPERTIES COMPILE_FLAGS "-Wno-conversion")
-			endforeach()
-		endif()
-
-		if (TARGET tinyusb_pico_pio_usb)
-			set_source_files_properties(
-					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_device.c
-					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb.c
-					${PICO_TINYUSB_PATH}/hw/mcu/raspberry_pi/Pico-PIO-USB/src/pio_usb_host.c
-					${PICO_TINYUSB_PATH}/src/portable/raspberrypi/pio_usb/hcd_pio_usb.c
-					PROPERTIES
-					COMPILE_FLAGS "-Wno-conversion -Wno-cast-qual -Wno-attributes")
-		endif()
-	elseif(CMAKE_C_COMPILER_ID STREQUAL "Clang")
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_device.c
-				COMPILE_FLAGS "-Wno-unreachable-code")
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/src/class/cdc/cdc_host.c
-				COMPILE_FLAGS "-Wno-unreachable-code-fallthrough")
-		set_source_files_properties(
-				${PICO_TINYUSB_PATH}/lib/fatfs/source/ff.c
-				PROPERTIES
-				COMPILE_FLAGS "-Wno-cast-qual")
-	endif()
-endfunction()
-- 
cgit v1.3.1


From e32a510ce610507717d940d329169d8939c10eab Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Apr 2026 19:14:05 +0700
Subject: remove -Werror from example sources to prevent build examples

---
 hw/bsp/rp2040/family.cmake | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 1e49c7194..6e88b9fa1 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -200,8 +200,13 @@ function(family_add_default_example_warnings TARGET)
 
   # Apply warnings to all TinyUSB interface library sources as well as examples sources
   # we cannot set compile options for target since it will not propagate to INTERFACE sources then picosdk files
+	# Remove -Werror from example sources so per-file warning suppressions can work.
+	# -Werror is kept on TinyUSB sources to catch real issues.
+	set(example_warn_flags ${WARN_FLAGS_${CMAKE_C_COMPILER_ID}})
+	list(REMOVE_ITEM example_warn_flags -Werror)
+
 	get_target_property(EXAMPLE_SOURCES ${TARGET} SOURCES)
-	set_source_files_properties(${EXAMPLE_SOURCES} PROPERTIES COMPILE_OPTIONS "${WARN_FLAGS_${CMAKE_C_COMPILER_ID}}")
+	set_source_files_properties(${EXAMPLE_SOURCES} PROPERTIES COMPILE_OPTIONS "${example_warn_flags}")
 
   foreach(TINYUSB_TARGET IN ITEMS tinyusb_common_base tinyusb_device_base tinyusb_host_base tinyusb_host_max3421 tinyusb_bsp)
     get_target_property(TINYUSB_SOURCES ${TINYUSB_TARGET} INTERFACE_SOURCES)
-- 
cgit v1.3.1


From e7642cf753b67bcfee21983e2caa292c2722ba4c Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 14 Apr 2026 20:06:26 +0700
Subject: suppress null-dereference warnings in FreeRTOS builds

---
 hw/bsp/family_support.mk | 1 +
 1 file changed, 1 insertion(+)

(limited to 'hw')

diff --git a/hw/bsp/family_support.mk b/hw/bsp/family_support.mk
index 69aa08922..6b08f6e88 100644
--- a/hw/bsp/family_support.mk
+++ b/hw/bsp/family_support.mk
@@ -170,6 +170,7 @@ ifeq ($(RTOS),freertos)
 
 	# Suppress FreeRTOS source warnings
 	CFLAGS += -Wno-error=cast-qual
+	CFLAGS += -Wno-error=null-dereference
 
 	# FreeRTOS (lto + Os) linker issue
 	LDFLAGS += -Wl,--undefined=vTaskSwitchContext
-- 
cgit v1.3.1


From c1e6b2635f9b89313dca86b31287176949c68380 Mon Sep 17 00:00:00 2001
From: StefanOroel <=>
Date: Thu, 16 Apr 2026 10:40:42 +0200
Subject: fix(docs): update URL for STM32C071 Nucleo board documentation

---
 docs/reference/boards.rst                     | 2 +-
 hw/bsp/stm32c0/boards/stm32c071nucleo/board.h | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index dbb5942ca..e61c4f98b 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -265,7 +265,7 @@ STMicroelectronics
 ===================  =================================  =========  =================================================================  ======
 Board                Name                               Family     URL                                                                Note
 ===================  =================================  =========  =================================================================  ======
-stm32c071nucleo      STM32C071 Nucleo                   stm32c0    https://www.st.com/en/evaluation-tools/nucleo-g071rb.html
+stm32c071nucleo      STM32C071 Nucleo                   stm32c0    https://www.st.com/en/evaluation-tools/nucleo-c071rb.html
 stm32f070rbnucleo    STM32 F070 Nucleo                  stm32f0    https://www.st.com/en/evaluation-tools/nucleo-f070rb.html
 stm32f072disco       STM32 F072 Discovery               stm32f0    https://www.st.com/en/evaluation-tools/32f072bdiscovery.html
 stm32f072eval        STM32 F072 Eval                    stm32f0    https://www.st.com/en/evaluation-tools/stm32072b-eval.html
diff --git a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
index 085d0d721..b62fc3a2a 100644
--- a/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
+++ b/hw/bsp/stm32c0/boards/stm32c071nucleo/board.h
@@ -27,7 +27,7 @@
 
 /* metadata:
    name: STM32C071 Nucleo
-   url: https://www.st.com/en/evaluation-tools/nucleo-g071rb.html
+   url: https://www.st.com/en/evaluation-tools/nucleo-c071rb.html
 */
 
 #ifndef BOARD_H_
-- 
cgit v1.3.1


From a6dcc3f089bd4468949ea9e138fea9f80025577e Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Fri, 17 Apr 2026 00:10:44 +0700
Subject: fix some Wconversion warnings

---
 .gitignore                                    |  1 +
 hw/bsp/board.c                                |  4 +--
 hw/bsp/mm32/family.c                          |  6 ++--
 hw/bsp/samd11/family.c                        |  4 ++-
 hw/bsp/samd2x_l2x/family.c                    |  2 +-
 hw/bsp/samg/family.c                          |  4 ++-
 hw/bsp/tm4c/family.c                          |  2 +-
 src/common/tusb_fifo.c                        |  8 ++---
 src/common/tusb_types.h                       |  4 +--
 src/portable/chipidea/ci_fs/dcd_ci_fs.c       | 14 ++++-----
 src/portable/dialog/da146xx/dcd_da146xx.c     | 42 +++++++++++++++------------
 src/portable/mentor/musb/dcd_musb.c           | 22 +++++++-------
 src/portable/mentor/musb/musb_type.h          |  2 +-
 src/portable/microchip/samg/dcd_samg.c        |  4 +--
 src/portable/nordic/nrf5x/dcd_nrf5x.c         |  4 ++-
 src/portable/nuvoton/nuc120/dcd_nuc120.c      |  8 ++---
 src/portable/nuvoton/nuc121/dcd_nuc121.c      |  8 +++--
 src/portable/nuvoton/nuc505/dcd_nuc505.c      |  6 ++--
 src/portable/nxp/lpc17_40/dcd_lpc17_40.c      |  4 +--
 src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c  | 10 +++----
 src/portable/renesas/rusb2/dcd_rusb2.c        | 34 ++++++++++++----------
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c | 18 ++++++------
 src/portable/st/stm32_fsdev/fsdev_common.c    |  4 +--
 src/portable/st/stm32_fsdev/fsdev_common.h    |  4 +--
 src/portable/synopsys/dwc2/dcd_dwc2.c         |  6 ++--
 25 files changed, 122 insertions(+), 103 deletions(-)

(limited to 'hw')

diff --git a/.gitignore b/.gitignore
index 162f9a019..b833191f8 100644
--- a/.gitignore
+++ b/.gitignore
@@ -55,3 +55,4 @@ Release
 BrowseInfo
 .cmake_build
 README_processed.rst
+.worktrees
diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index ae58bb5fc..65b44e5f2 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -51,12 +51,12 @@ int sys_read(int fhdl, char *buf, size_t count) TU_ATTR_USED;
 
 int sys_write(int fhdl, const char *buf, size_t count) {
   (void) fhdl;
-  return (int) SEGGER_RTT_Write(0, buf, (int) count);
+  return (int) SEGGER_RTT_Write(0, buf, (unsigned) count);
 }
 
 int sys_read(int fhdl, char *buf, size_t count) {
   (void) fhdl;
-  int rd = (int) SEGGER_RTT_Read(0, buf, count);
+  int rd = (int) SEGGER_RTT_Read(0, buf, (unsigned) count);
   return (rd > 0) ? rd : -1;
 }
 #endif
diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c
index 651c9496e..14a17f6c5 100644
--- a/hw/bsp/mm32/family.c
+++ b/hw/bsp/mm32/family.c
@@ -59,11 +59,11 @@ void OTG_FS_IRQHandler(void) {
 void USB_DeviceClockInit(void) {
   /* Select USBCLK source */
   //  RCC_USBCLKConfig(RCC_USBCLKSource_PLLCLK_Div1);
-  RCC->CFGR &= ~(0x3 << 22);
-  RCC->CFGR |= (0x1 << 22);
+  RCC->CFGR &= ~(0x3U << 22);
+  RCC->CFGR |= (0x1U << 22);
 
   /* Enable USB clock */
-  RCC->AHB2ENR |= 0x1 << 7;
+  RCC->AHB2ENR |= 0x1U << 7;
 }
 
 void board_init(void) {
diff --git a/hw/bsp/samd11/family.c b/hw/bsp/samd11/family.c
index 0c987b85a..0864aa3dd 100644
--- a/hw/bsp/samd11/family.c
+++ b/hw/bsp/samd11/family.c
@@ -34,6 +34,8 @@
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wcast-qual"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wsign-conversion"
 #endif
 
 #include "hal/include/hal_gpio.h"
@@ -66,7 +68,7 @@ void USB_Handler(void)
 //--------------------------------------------------------------------+
 
 /* Referenced GCLKs, should be initialized firstly */
-#define _GCLK_INIT_1ST (1 << 0 | 1 << 1)
+#define _GCLK_INIT_1ST (1u << 0 | 1u << 1)
 
 /* Not referenced GCLKs, initialized last */
 #define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
diff --git a/hw/bsp/samd2x_l2x/family.c b/hw/bsp/samd2x_l2x/family.c
index 11b6343cd..306ea2308 100644
--- a/hw/bsp/samd2x_l2x/family.c
+++ b/hw/bsp/samd2x_l2x/family.c
@@ -79,7 +79,7 @@
 
 #ifdef SAMD21_FAMILY
 /* Referenced GCLKs, should be initialized firstly */
-#define _GCLK_INIT_1ST (1 << 0 | 1 << 1)
+#define _GCLK_INIT_1ST (1u << 0 | 1u << 1)
 /* Not referenced GCLKs, initialized last */
 #define _GCLK_INIT_LAST (~_GCLK_INIT_1ST)
 #endif
diff --git a/hw/bsp/samg/family.c b/hw/bsp/samg/family.c
index 519068986..9edc43b51 100644
--- a/hw/bsp/samg/family.c
+++ b/hw/bsp/samg/family.c
@@ -27,15 +27,17 @@
    manufacturer: Microchip
 */
 
-#include "sam.h"
 
 // Suppress warning caused by mcu driver
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wcast-qual"
 #pragma GCC diagnostic ignored "-Wredundant-decls"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wsign-conversion"
 #endif
 
+#include "sam.h"
 #include "peripheral_clk_config.h"
 #include "hal/include/hal_init.h"
 #include "hal/include/hpl_usart_sync.h"
diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index 6988a264e..fe4737e50 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -36,7 +36,7 @@ static void board_uart_init(void) {
   // BAUDRATE = 115200, with SystemCoreClock = 50 Mhz refer manual for calculation
   //  - BRDI = SystemCoreClock / (16* baud)
   //  - BRDF = int(fraction*64 + 0.5)
-  UART0->CTL &= ~(1 << 0);                     // Disable UART0 by clearing UARTEN bit in the UARTCTL register
+  UART0->CTL &= ~(1U << 0);                     // Disable UART0 by clearing UARTEN bit in the UARTCTL register
   UART0->IBRD = 27;                            // Write the integer portion of the BRD to the UARTIRD register
   UART0->FBRD = 8;                             // Write the fractional portion of the BRD to the UARTFBRD registerer
 
diff --git a/src/common/tusb_fifo.c b/src/common/tusb_fifo.c
index 06d25d131..a8ac99fd2 100644
--- a/src/common/tusb_fifo.c
+++ b/src/common/tusb_fifo.c
@@ -281,14 +281,14 @@ static void hwff_push_n(const tu_fifo_t *f, const void *app_buf, uint16_t n, uin
     // Write full words to the linear part of the buffer
     const uint8_t  data_stride = access_mode->data_stride;
     const uint32_t odd_mask    = data_stride - 1;
-    uint16_t       lin_even    = lin_bytes & ~odd_mask;
+    uint16_t       lin_even    = (uint16_t)(lin_bytes & ~odd_mask);
     tu_hwfifo_read(hwfifo, ff_buf, lin_even, access_mode);
     HWFIFO_ADDR_NEXT_N(hwfifo, const, lin_even * HWFIFO_ADDR_DATA_RATIO);
     ff_buf += lin_even;
 
     // There could be an odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
     // combine it with the wrapped part to form a full word for data stride
-    const uint8_t lin_odd = lin_bytes & odd_mask;
+    const uint8_t lin_odd = (uint8_t)(lin_bytes & odd_mask);
     if (lin_odd > 0) {
       const uint8_t wrap_odd = (uint8_t)tu_min16(wrap_bytes, data_stride - lin_odd);
       uint8_t       buf_temp[4];
@@ -338,13 +338,13 @@ static void hwff_pull_n(const tu_fifo_t *f, void *app_buf, uint16_t n, uint16_t
     // Read full words from linear part
     const uint8_t  data_stride = access_mode->data_stride;
     const uint32_t odd_mask    = data_stride - 1;
-    uint16_t       lin_even    = lin_bytes & ~odd_mask;
+    uint16_t       lin_even    = (uint16_t)(lin_bytes & ~odd_mask);
     tu_hwfifo_write(hwfifo, ff_buf, lin_even, access_mode);
     HWFIFO_ADDR_NEXT_N(hwfifo, , lin_even * HWFIFO_ADDR_DATA_RATIO);
     ff_buf += lin_even;
 
     // There could be odd 1 byte (16bit) or 1-3 bytes (32bit) before the wrap-around boundary
-    const uint8_t lin_odd = lin_bytes & odd_mask;
+    const uint8_t lin_odd = (uint8_t)(lin_bytes & odd_mask);
     if (lin_odd > 0) {
       const uint8_t wrap_odd = (uint8_t)tu_min16(wrap_bytes, data_stride - lin_odd);
 
diff --git a/src/common/tusb_types.h b/src/common/tusb_types.h
index a18f9feb7..d8b6a8823 100644
--- a/src/common/tusb_types.h
+++ b/src/common/tusb_types.h
@@ -100,8 +100,8 @@ typedef enum {
 } tusb_xfer_type_t;
 
 typedef enum {
-  TUSB_DIR_OUT = 0,
-  TUSB_DIR_IN  = 1,
+  TUSB_DIR_OUT = 0u,
+  TUSB_DIR_IN  = 1u,
 
   TUSB_EPNUM_MASK = 0x0F,
   TUSB_DIR_IN_MASK = 0x80
diff --git a/src/portable/chipidea/ci_fs/dcd_ci_fs.c b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
index 312a98299..62df1a6d5 100644
--- a/src/portable/chipidea/ci_fs/dcd_ci_fs.c
+++ b/src/portable/chipidea/ci_fs/dcd_ci_fs.c
@@ -360,7 +360,7 @@ static bool edpt_open(uint8_t rhport, uint8_t ep_addr, uint16_t max_packet_size,
   unsigned val = USB_ENDPT_EPCTLDIS_MASK;
   val |= (xfer != TUSB_XFER_ISOCHRONOUS) ? USB_ENDPT_EPHSHK_MASK : 0;
   val |= dir ? USB_ENDPT_EPTXEN_MASK : USB_ENDPT_EPRXEN_MASK;
-  CI_REG->EP[epn].CTL |= val;
+  CI_REG->EP[epn].CTL |= (uint8_t)val;
 
   if (xfer != TUSB_XFER_ISOCHRONOUS) {
     bd[odd].dts      = 1;
@@ -434,11 +434,11 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t * buffer, uint16_t t
     buffer_descriptor_t *next = ep->odd ? bd - 1: bd + 1;
     /* When total_bytes is greater than the max packet size,
      * it prepares to the next transfer to avoid NAK in advance. */
-    next->bc   = total_bytes >= 2 * mps ? mps: total_bytes - mps;
+    next->bc   = (total_bytes >= 2 * mps) ? mps : (total_bytes - mps);
     next->addr = buffer + mps;
     next->own  = 1;
   }
-  bd->bc   = total_bytes >= mps ? mps: total_bytes;
+  bd->bc   = (total_bytes >= mps ? mps : total_bytes);
   bd->addr = buffer;
   __DSB();
   bd->own  = 1; /* This bit must be set last */
@@ -506,16 +506,16 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
 //--------------------------------------------------------------------+
 void dcd_int_handler(uint8_t rhport)
 {
-  uint32_t is  = CI_REG->INT_STAT;
-  uint32_t msk = CI_REG->INT_EN;
+  uint8_t is  = CI_REG->INT_STAT;
+  uint8_t msk = CI_REG->INT_EN;
 
   // clear non-enabled interrupts
-  CI_REG->INT_STAT = is & ~msk;
+  CI_REG->INT_STAT = (uint8_t)(is & ~msk);
   is &= msk;
 
   if (is & USB_ISTAT_ERROR_MASK) {
     /* TODO: */
-    uint32_t es = CI_REG->ERR_STAT;
+    uint8_t es = CI_REG->ERR_STAT;
     CI_REG->ERR_STAT = es;
     CI_REG->INT_STAT = is; /* discard any pending events */
   }
diff --git a/src/portable/dialog/da146xx/dcd_da146xx.c b/src/portable/dialog/da146xx/dcd_da146xx.c
index a283c8362..7d90b1f94 100644
--- a/src/portable/dialog/da146xx/dcd_da146xx.c
+++ b/src/portable/dialog/da146xx/dcd_da146xx.c
@@ -148,8 +148,8 @@ typedef struct
 #ifndef TU_DA146XX_DMA_RX_CHANNEL
 #define TU_DA146XX_DMA_RX_CHANNEL 6
 #endif
-#define DA146XX_DMA_USB_MUX       (0x6 << (TU_DA146XX_DMA_RX_CHANNEL * 2))
-#define DA146XX_DMA_USB_MUX_MASK  (0xF << (TU_DA146XX_DMA_RX_CHANNEL * 2))
+#define DA146XX_DMA_USB_MUX       (0x6u << (TU_DA146XX_DMA_RX_CHANNEL * 2))
+#define DA146XX_DMA_USB_MUX_MASK  (0xFu << (TU_DA146XX_DMA_RX_CHANNEL * 2))
 
 typedef struct
 {
@@ -311,12 +311,12 @@ static void fill_tx_fifo(xfer_ctl_t * xfer)
       // Max packet size is set to value greater then FIFO. Enable fifo level warning
       // to handle larger packets.
       regs->txc |= (3 << USB_USB_TXC1_REG_USB_TFWL_Pos);
-      USB->USB_FWMSK_REG |= 1 << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_TXWARN31_Pos);
+      USB->USB_FWMSK_REG |= 1u << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_TXWARN31_Pos);
     }
     else
     {
       regs->txc &= ~USB_USB_TXC1_REG_USB_TFWL_Msk;
-      USB->USB_FWMSK_REG &= ~(1 << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_TXWARN31_Pos));
+      USB->USB_FWMSK_REG &= ~(1u << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_TXWARN31_Pos));
       // Whole packet already in fifo, no need to refill it later.  Mark last.
       regs->txc |= USB_USB_TXC1_REG_USB_LAST_Msk;
     }
@@ -371,14 +371,14 @@ static void start_rx_packet(xfer_ctl_t *xfer)
       // For endpoint size greater than FIFO size enable FIFO level warning interrupt
       // when FIFO has less than 17 bytes free.
       regs->rxc |= USB_USB_RXC1_REG_USB_RFWL_Msk;
-      USB->USB_FWMSK_REG |= 1 << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_RXWARN31_Pos);
+      USB->USB_FWMSK_REG |= 1u << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_RXWARN31_Pos);
     }
   }
   else if (epnum != 0)
   {
     // If max_packet_size would fit in FIFO no need for FIFO level warning interrupt.
     regs->rxc &= ~USB_USB_RXC1_REG_USB_RFWL_Msk;
-    USB->USB_FWMSK_REG &= ~(1 << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_RXWARN31_Pos));
+    USB->USB_FWMSK_REG &= ~(1u << (epnum - 1 + USB_USB_FWMSK_REG_USB_M_RXWARN31_Pos));
   }
   regs->rxc |= USB_USB_RXC1_REG_USB_RX_EN_Msk;
 }
@@ -388,7 +388,7 @@ static void start_tx_dma(void *src, volatile void *dst, uint16_t size)
   // Setup SRC and DST registers
   TX_DMA_REGS->DMAx_A_START_REG = (uint32_t)src;
   TX_DMA_REGS->DMAx_B_START_REG = (uint32_t)dst;
-  // Interrupt not needed
+  // Interrupt is not needed
   TX_DMA_REGS->DMAx_INT_REG = size;
   TX_DMA_REGS->DMAx_LEN_REG = size - 1;
   TX_DMA_REGS->DMAx_CTRL_REG = TX_DMA_START;
@@ -430,7 +430,9 @@ static uint16_t read_rx_fifo(xfer_ctl_t *xfer, uint16_t bytes_in_fifo)
 
   uint8_t *buf = xfer->buffer + xfer->transferred + xfer->last_packet_size;
 
-  for (int i = 0; i < receive_this_time; ++i) buf[i] = regs->rxd;
+  for (int i = 0; i < receive_this_time; ++i) {
+    buf[i] = (uint8_t)regs->rxd;
+  }
 
   xfer->last_packet_size += receive_this_time;
 
@@ -449,7 +451,9 @@ static void handle_ep0_rx(void)
   {
     xfer_ctl_t *xfer_in = XFER_CTL_BASE(0, TUSB_DIR_IN);
     // Setup packet is in
-    for (int i = 0; i < fifo_bytes; ++i) _setup_packet[i] = USB->USB_RXD0_REG;
+    for (int i = 0; i < fifo_bytes; ++i) {
+      _setup_packet[i] = (uint8_t)USB->USB_RXD0_REG;
+    }
 
     xfer->stall = 0;
     xfer->data1 = 1;
@@ -469,7 +473,7 @@ static void handle_ep0_rx(void)
     }
     else
     {
-      read_rx_fifo(xfer, fifo_bytes);
+      read_rx_fifo(xfer, (uint16_t)fifo_bytes);
       if (rxs0 & USB_USB_RXS0_REG_USB_RX_LAST_Msk)
       {
         xfer->transferred += xfer->last_packet_size;
@@ -553,7 +557,7 @@ static void handle_epx_rx_ev(uint8_t ep)
       {
         // Disable DMA and update last_packet_size with what DMA reported.
         RX_DMA_REGS->DMAx_CTRL_REG &= ~DMA_DMA0_CTRL_REG_DMA_ON_Msk;
-        xfer->last_packet_size = RX_DMA_REGS->DMAx_IDX_REG;
+        xfer->last_packet_size = (uint16_t)RX_DMA_REGS->DMAx_IDX_REG;
         // When DMA did not finished (packet was smaller then MPS), DMAx_IDX_REG holds exact number of bytes transmitted.
         // When DMA finished value in DMAx_IDX_REG is one less then actual number of transmitted bytes.
         if (xfer->last_packet_size == RX_DMA_REGS->DMAx_LEN_REG) xfer->last_packet_size++;
@@ -564,7 +568,7 @@ static void handle_epx_rx_ev(uint8_t ep)
       // FIFO maybe empty if DMA read it before or it's final iteration and function already read all that was to read.
       if (fifo_bytes > 0)
       {
-        fifo_bytes = read_rx_fifo(xfer, fifo_bytes);
+        fifo_bytes = read_rx_fifo(xfer, (uint16_t)fifo_bytes);
       }
       if (GET_BIT(rxs, USB_USB_RXS1_REG_USB_RX_LAST))
       {
@@ -624,7 +628,7 @@ static void handle_epx_tx_ev(xfer_ctl_t *xfer)
     {
       // Disable DMA and update last_packet_size with what DMA reported.
       TX_DMA_REGS->DMAx_CTRL_REG &= ~DMA_DMA1_CTRL_REG_DMA_ON_Msk;
-      xfer->last_packet_size = TX_DMA_REGS->DMAx_IDX_REG + 1;
+      xfer->last_packet_size = (uint16_t)(TX_DMA_REGS->DMAx_IDX_REG + 1);
       // Release DMA to used by other endpoints.
       _dcd.dma_ep[TUSB_DIR_IN] = 0;
     }
@@ -954,13 +958,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * desc_edpt)
     if (dir == TUSB_DIR_OUT)
     {
       regs->epc_out = epnum | USB_USB_EPC1_REG_USB_EP_EN_Msk | iso_mask;
-      USB->USB_RXMSK_REG |= 0x11 << (epnum - 1);
+      USB->USB_RXMSK_REG |= 0x11u << (epnum - 1);
       REG_SET_BIT(USB_MAMSK_REG, USB_M_RX_EV);
     }
     else
     {
       regs->epc_in = epnum | USB_USB_EPC1_REG_USB_EP_EN_Msk | iso_mask;
-      USB->USB_TXMSK_REG |= 0x11 << (epnum - 1);
+      USB->USB_TXMSK_REG |= 0x11u << (epnum - 1);
       REG_SET_BIT(USB_MAMSK_REG, USB_M_TX_EV);
     }
   }
@@ -974,8 +978,8 @@ void dcd_edpt_close_all (uint8_t rhport)
 
   for (int epnum = 1; epnum < EP_MAX; ++epnum)
   {
-    dcd_edpt_close(0, epnum | TUSB_DIR_OUT);
-    dcd_edpt_close(0, epnum | TUSB_DIR_IN);
+    dcd_edpt_close(0, (uint8_t)(epnum | TUSB_DIR_OUT));
+    dcd_edpt_close(0, (uint8_t)(epnum | TUSB_DIR_IN));
   }
 }
 
@@ -1001,7 +1005,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
     {
       regs->rxc = USB_USB_RXC1_REG_USB_FLUSH_Msk;
       regs->epc_out = 0;
-      USB->USB_RXMSK_REG &= ~(0x11 << (epnum - 1));
+      USB->USB_RXMSK_REG &= ~(0x11u << (epnum - 1));
       // Release DMA if needed
       if (_dcd.dma_ep[TUSB_DIR_OUT] == epnum)
       {
@@ -1013,7 +1017,7 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
     {
       regs->txc = USB_USB_TXC1_REG_USB_FLUSH_Msk;
       regs->epc_in = 0;
-      USB->USB_TXMSK_REG &= ~(0x11 << (epnum - 1));
+      USB->USB_TXMSK_REG &= ~(0x11u << (epnum - 1));
       // Release DMA if needed
       if (_dcd.dma_ep[TUSB_DIR_IN] == epnum)
       {
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 339048473..3111f6185 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -111,8 +111,8 @@ TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigne
 TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned is_rx, unsigned mps,
                                                        bool double_packet) {
   (void) epnum;
-  uint8_t ffsize = hwfifo_byte2size(mps);
-  mps = 8 << ffsize; // round up to the next power of 2
+  uint8_t ffsize = hwfifo_byte2size((uint16_t)mps);
+  mps = 8u << ffsize; // round up to the next power of 2
 
   if (double_packet) {
     ffsize |= MUSB_FIFOSZ_DOUBLE_PACKET;
@@ -120,7 +120,7 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
   }
 
   TU_ASSERT(alloced_fifo_bytes + mps <= MUSB_CFG_DYNAMIC_FIFO_SIZE);
-  musb->fifo_addr[is_rx] = alloced_fifo_bytes / 8;
+  musb->fifo_addr[is_rx] = (uint16_t)(alloced_fifo_bytes / 8);
   musb->fifo_size[is_rx] = ffsize;
 
   alloced_fifo_bytes += mps;
@@ -157,12 +157,12 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
 // Flush FIFO and clear data toggle
 TU_ATTR_ALWAYS_INLINE static inline void hwfifo_flush(musb_regs_t* musb, unsigned epnum, unsigned is_rx, bool clear_dtog) {
   (void) epnum;
-  const uint8_t csrl_dtog = clear_dtog ? MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx) : 0;
+  const uint8_t csrl_dtog = clear_dtog ? (uint8_t)MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx) : 0;
   musb_ep_maxp_csr_t* maxp_csr = &musb->indexed_csr.maxp_csr[is_rx];
   // may need to flush twice for double packet
   for (unsigned i=0; i<2; i++) {
     if (maxp_csr->csrl & MUSB_CSRL_PACKET_READY(is_rx)) {
-      maxp_csr->csrl = MUSB_CSRL_FLUSH_FIFO(is_rx) | csrl_dtog;
+      maxp_csr->csrl = (uint8_t)(MUSB_CSRL_FLUSH_FIFO(is_rx) | csrl_dtog);
     }
   }
 }
@@ -180,7 +180,7 @@ static void process_setup_packet(uint8_t rhport) {
   dcd_event_setup_received(rhport, (const uint8_t*)(uintptr_t)&_dcd.setup_packet, true);
 
   const unsigned len    = _dcd.setup_packet.wLength;
-  _dcd.remaining_ctrl   = len;
+  _dcd.remaining_ctrl   = (uint16_t)len;
   const unsigned dir_in = tu_edpt_dir(_dcd.setup_packet.bmRequestType);
   /* Clear RX FIFO and reverse the transaction direction */
   if (len && dir_in) {
@@ -441,14 +441,14 @@ static void process_edpt_n(uint8_t rhport, uint_fast8_t ep_addr)
   if (dir_in) {
     // TU_LOG1(" TX CSRL%d = %x\r\n", epn, ep_csr->tx_csrl);
     if (ep_csr->tx_csrl & MUSB_TXCSRL1_STALLED) {
-      ep_csr->tx_csrl &= ~(MUSB_TXCSRL1_STALLED | MUSB_TXCSRL1_UNDRN);
+      ep_csr->tx_csrl = (uint8_t)(ep_csr->tx_csrl & ~(MUSB_TXCSRL1_STALLED | MUSB_TXCSRL1_UNDRN));
       return;
     }
     completed = handle_xfer_in(rhport, ep_addr);
   } else {
     // TU_LOG1(" RX CSRL%d = %x\r\n", epn, ep_csr->rx_csrl);
     if (ep_csr->rx_csrl & MUSB_RXCSRL1_STALLED) {
-      ep_csr->rx_csrl &= ~(MUSB_RXCSRL1_STALLED | MUSB_RXCSRL1_OVER);
+      ep_csr->rx_csrl = (uint8_t)(ep_csr->rx_csrl & ~(MUSB_RXCSRL1_STALLED | MUSB_RXCSRL1_OVER));
       return;
     }
     completed = handle_xfer_out(rhport, ep_addr);
@@ -778,7 +778,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
   musb_ep_csr_t* ep_csr = get_ep_csr(musb_regs, epn);
   const uint8_t is_rx = 1 - tu_edpt_dir(ep_addr);
 
-  ep_csr->maxp_csr[is_rx].csrl = MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
+  ep_csr->maxp_csr[is_rx].csrl = (uint8_t)MUSB_CSRL_CLEAR_DATA_TOGGLE(is_rx);
 
   if (ie) musb_dcd_int_enable(rhport);
 }
@@ -794,8 +794,8 @@ void dcd_int_handler(uint8_t rhport) {
   musb_dcd_int_handler_enter(rhport);
 
   uint_fast8_t intr_usb = musb_regs->intr_usb; // a read will clear this interrupt status
-  uint_fast8_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
-  uint_fast8_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
+  uint_fast16_t intr_tx = musb_regs->intr_tx; // a read will clear this interrupt status
+  uint_fast16_t intr_rx = musb_regs->intr_rx; // a read will clear this interrupt status
   // TU_LOG1("D%2x T%2x R%2x\r\n", is, txis, rxis);
 
   intr_usb &= musb_regs->intr_usben; /* Clear disabled interrupts */
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index b2f6492fa..176504a2f 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -300,7 +300,7 @@ TU_VERIFY_STATIC(sizeof(musb_regs_t) == 0x350, "size is not correct");
 // Helper
 //--------------------------------------------------------------------+
 TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_regs, unsigned epnum) {
-  musb_regs->index = epnum;
+  musb_regs->index = (uint8_t)epnum;
   return &musb_regs->indexed_csr;
 }
 
diff --git a/src/portable/microchip/samg/dcd_samg.c b/src/portable/microchip/samg/dcd_samg.c
index 4115eecc5..f8980b775 100644
--- a/src/portable/microchip/samg/dcd_samg.c
+++ b/src/portable/microchip/samg/dcd_samg.c
@@ -352,8 +352,8 @@ void dcd_edpt_clear_stall (uint8_t rhport, uint8_t ep_addr)
   csr_clear(epnum, UDP_CSR_FORCESTALL_Msk);
 
   // must also reset EP to clear data toggle
-  UDP->UDP_RST_EP |= (1 << epnum);
-  UDP->UDP_RST_EP &= ~(1 << epnum);
+  UDP->UDP_RST_EP |= (1u << epnum);
+  UDP->UDP_RST_EP &= ~(1u << epnum);
 }
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/nordic/nrf5x/dcd_nrf5x.c b/src/portable/nordic/nrf5x/dcd_nrf5x.c
index 8a41c4790..6ed5fde8e 100644
--- a/src/portable/nordic/nrf5x/dcd_nrf5x.c
+++ b/src/portable/nordic/nrf5x/dcd_nrf5x.c
@@ -36,6 +36,8 @@
 #pragma GCC diagnostic ignored "-Wcast-qual"
 #pragma GCC diagnostic ignored "-Wcast-align"
 #pragma GCC diagnostic ignored "-Wunused-parameter"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wsign-conversion"
 #endif
 
 #include "nrf.h"
@@ -461,7 +463,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer, uint16_t to
   xfer->actual_len = 0;
 
   // Control endpoint with zero-length packet and opposite direction to 1st request byte --> status stage
-  bool const control_status = (epnum == 0 && total_bytes == 0 && dir != tu_edpt_dir(NRF_USBD->BMREQUESTTYPE));
+  bool const control_status = (epnum == 0 && total_bytes == 0 && dir != tu_edpt_dir((uint8_t)NRF_USBD->BMREQUESTTYPE));
 
   if (control_status) {
     // The nRF doesn't interrupt on status transmit so we queue up a success response.
diff --git a/src/portable/nuvoton/nuc120/dcd_nuc120.c b/src/portable/nuvoton/nuc120/dcd_nuc120.c
index d9a0e3fa8..2edb1bc7a 100644
--- a/src/portable/nuvoton/nuc120/dcd_nuc120.c
+++ b/src/portable/nuvoton/nuc120/dcd_nuc120.c
@@ -253,13 +253,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 
   /* mine the data for the information we need */
   int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  int const size = tu_edpt_packet_size(p_endpoint_desc);
+  uint16_t const size = tu_edpt_packet_size(p_endpoint_desc);
   tusb_xfer_type_t const type = (tusb_xfer_type_t) p_endpoint_desc->bmAttributes.xfer;
   struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
 
   /* allocate buffer from USB RAM */
   ep->BUFSEG = bufseg_addr;
-  bufseg_addr += size;
+  bufseg_addr += (uint32_t)size;
   TU_ASSERT(bufseg_addr <= USBD_BUF_SIZE);
 
   /* construct USB Configuration Register value and then write it */
@@ -435,7 +435,7 @@ void dcd_int_handler(uint8_t rhport)
       /* given ACK from host has happened, we can now set the address (if not already done) */
       if((USBD->FADDR != assigned_address) && (USBD->FADDR == 0)) USBD->FADDR = assigned_address;
 
-      uint16_t const available_bytes = USBD->EP[PERIPH_EP0].MXPLD;
+      uint16_t const available_bytes = (uint16_t)USBD->EP[PERIPH_EP0].MXPLD;
 
       active_ep0_xfer = (available_bytes == xfer_table[PERIPH_EP0].max_packet_size);
 
@@ -453,7 +453,7 @@ void dcd_int_handler(uint8_t rhport)
       {
         USBD->INTSTS = mask;
 
-        uint16_t const available_bytes = ep->MXPLD;
+        uint16_t const available_bytes = (uint16_t)ep->MXPLD;
         uint8_t const ep_addr = decode_ep_addr(ep);
         bool const out_ep = !(ep_addr & TUSB_DIR_IN_MASK);
 
diff --git a/src/portable/nuvoton/nuc121/dcd_nuc121.c b/src/portable/nuvoton/nuc121/dcd_nuc121.c
index 42fb58a0a..008c9df6b 100644
--- a/src/portable/nuvoton/nuc121/dcd_nuc121.c
+++ b/src/portable/nuvoton/nuc121/dcd_nuc121.c
@@ -42,6 +42,8 @@
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wredundant-decls"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wsign-conversion"
 #endif
 
 #include "NuMicro.h"
@@ -291,7 +293,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 
   /* mine the data for the information we need */
   int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  int const size = tu_edpt_packet_size(p_endpoint_desc);
+  uint16_t const size = tu_edpt_packet_size(p_endpoint_desc);
   tusb_xfer_type_t const type = (tusb_xfer_type_t) p_endpoint_desc->bmAttributes.xfer;
   struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
 
@@ -478,7 +480,7 @@ void dcd_int_handler(uint8_t rhport)
   {
     if (status & USBD_INTSTS_EPEVT0_Msk) /* PERIPH_EP0 (EP0_IN) event: this is treated separately from the rest */
     {
-      uint16_t const available_bytes = USBD->EP[PERIPH_EP0].MXPLD;
+      uint16_t const available_bytes = (uint16_t)USBD->EP[PERIPH_EP0].MXPLD;
 
       active_ep0_xfer = (available_bytes == xfer_table[PERIPH_EP0].max_packet_size);
 
@@ -496,7 +498,7 @@ void dcd_int_handler(uint8_t rhport)
       {
         USBD->INTSTS = mask;
 
-        uint16_t const available_bytes = ep->MXPLD;
+        uint16_t const available_bytes = (uint16_t)ep->MXPLD;
         uint8_t const ep_addr = decode_ep_addr(ep);
         bool const out_ep = !(ep_addr & TUSB_DIR_IN_MASK);
 
diff --git a/src/portable/nuvoton/nuc505/dcd_nuc505.c b/src/portable/nuvoton/nuc505/dcd_nuc505.c
index ca17d6251..a0f3d4c3f 100644
--- a/src/portable/nuvoton/nuc505/dcd_nuc505.c
+++ b/src/portable/nuvoton/nuc505/dcd_nuc505.c
@@ -42,6 +42,8 @@
 #ifdef __GNUC__
 #pragma GCC diagnostic push
 #pragma GCC diagnostic ignored "-Wredundant-decls"
+#pragma GCC diagnostic ignored "-Wconversion"
+#pragma GCC diagnostic ignored "-Wsign-conversion"
 #endif
 
 #include "NUC505Series.h"
@@ -338,13 +340,13 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * p_endpoint_desc)
 
   /* mine the data for the information we need */
   int const dir = tu_edpt_dir(p_endpoint_desc->bEndpointAddress);
-  int const size = tu_edpt_packet_size(p_endpoint_desc);
+  uint16_t const size = tu_edpt_packet_size(p_endpoint_desc);
   tusb_xfer_type_t const type = p_endpoint_desc->bmAttributes.xfer;
   struct xfer_ctl_t *xfer = &xfer_table[ep - USBD->EP];
 
   /* allocate buffer from USB RAM */
   ep->EPBUFSTART = bufseg_addr;
-  bufseg_addr += size;
+  bufseg_addr += (uint32_t)size;
   ep->EPBUFEND = bufseg_addr - 1;
   TU_ASSERT(bufseg_addr <= USBD_BUF_SIZE);
 
diff --git a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
index 349229c8d..2840c6d5e 100644
--- a/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
+++ b/src/portable/nxp/lpc17_40/dcd_lpc17_40.c
@@ -131,7 +131,7 @@ static uint8_t sie_read (uint8_t cmd_code)
 //--------------------------------------------------------------------+
 static inline uint8_t ep_addr2idx(uint8_t ep_addr)
 {
-  return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0);
+  return (uint8_t)(2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0));
 }
 
 static void set_ep_size(uint8_t ep_id, uint16_t max_packet_size)
@@ -243,7 +243,7 @@ void dcd_sof_enable(uint8_t rhport, bool en)
 //--------------------------------------------------------------------+
 static inline uint8_t byte2dword(uint8_t bytes)
 {
-  return (bytes + 3) / 4; // length in dwords
+  return (uint8_t)((bytes + 3) / 4); // length in dwords
 }
 
 static void control_ep_write(void const * buffer, uint8_t len)
diff --git a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
index 5f4a441dc..8adf0f840 100644
--- a/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
+++ b/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
@@ -243,7 +243,7 @@ TU_ATTR_ALWAYS_INLINE static inline uint16_t get_buf_offset(void const * buffer)
 }
 
 TU_ATTR_ALWAYS_INLINE static inline uint8_t ep_addr2id(uint8_t ep_addr) {
-  return 2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0);
+  return (uint8_t)(2*(ep_addr & 0x0F) + ((ep_addr & TUSB_DIR_IN_MASK) ? 1 : 0));
 }
 
 TU_ATTR_ALWAYS_INLINE static inline bool ep_is_iso(ep_cmd_sts_t* ep_cs, bool is_highspeed) {
@@ -539,8 +539,8 @@ static void process_xfer_isr(uint8_t rhport, uint32_t int_status) {
       uint16_t buf_nbytes;
 
       if ( rhport_is_highspeed(rhport) ) {
-        buf_offset = ep_cs->buffer_hs.offset;
-        buf_nbytes = ep_cs->buffer_hs.nbytes;
+        buf_offset = (uint16_t)ep_cs->buffer_hs.offset;
+        buf_nbytes = (uint16_t)ep_cs->buffer_hs.nbytes;
 
         #if TU_CHECK_MCU(OPT_MCU_LPC54)
         // LPC54 Errata USB.2: In USB high-speed device mode, the NBytes field is not correct after BULK IN transfer
@@ -550,8 +550,8 @@ static void process_xfer_isr(uint8_t rhport, uint32_t int_status) {
         }
         #endif
       } else {
-        buf_offset = ep_cs->buffer_fs.offset;
-        buf_nbytes = ep_cs->buffer_fs.nbytes;
+        buf_offset = (uint16_t)ep_cs->buffer_fs.offset;
+        buf_nbytes = (uint16_t)ep_cs->buffer_fs.nbytes;
       }
 
       xfer_dma->xferred_bytes += xfer_dma->nbytes - buf_nbytes;
diff --git a/src/portable/renesas/rusb2/dcd_rusb2.c b/src/portable/renesas/rusb2/dcd_rusb2.c
index e2a51a5ca..adbb53787 100644
--- a/src/portable/renesas/rusb2/dcd_rusb2.c
+++ b/src/portable/renesas/rusb2/dcd_rusb2.c
@@ -93,7 +93,9 @@ static unsigned find_pipe(unsigned xfer_type) {
   const uint8_t idx_last  = pipe_idx_arr[xfer_type][1];
 
   for (int i = idx_last; i >= idx_first; i--) {
-    if (0 == _dcd.pipe[i].ep) return i;
+    if (0 == _dcd.pipe[i].ep) {
+      return (unsigned)i;
+    }
   }
 
   return 0;
@@ -117,10 +119,10 @@ static volatile reg_pipetre_t* get_pipetre(rusb2_reg_t *rusb, unsigned num) {
 
 static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) {
   rusb2_reg_t *rusb = RUSB2_REG(rhport);
-  const unsigned epn = tu_edpt_number(ep_addr);
+  const unsigned epn = tu_edpt_number((uint8_t)ep_addr);
 
   if (epn) {
-    const unsigned dir = tu_edpt_dir(ep_addr);
+    const unsigned dir = tu_edpt_dir((uint8_t)ep_addr);
     const unsigned num = _dcd.ep[dir][epn];
     return get_pipectr(rusb, num);
   } else {
@@ -129,11 +131,11 @@ static volatile uint16_t* ep_addr_to_pipectr(uint8_t rhport, unsigned ep_addr) {
 }
 
 static uint16_t edpt0_max_packet_size(rusb2_reg_t* rusb) {
-  return rusb->DCPMAXP_b.MXPS;
+  return (uint16_t)rusb->DCPMAXP_b.MXPS;
 }
 
 static uint16_t edpt_max_packet_size(rusb2_reg_t *rusb, unsigned num) {
-  rusb->PIPESEL = num;
+  rusb->PIPESEL = (uint16_t)num;
   return rusb->PIPEMAXP;
 }
 
@@ -285,7 +287,7 @@ static bool pipe_xfer_out(rusb2_reg_t* rusb, unsigned num)
   const uint16_t mps = edpt_max_packet_size(rusb, num);
   pipe_wait_for_ready(rusb, num);
 
-  const uint16_t vld  = rusb->D0FIFOCTR_b.DTLN;
+  const uint16_t vld  = (uint16_t)rusb->D0FIFOCTR_b.DTLN;
   const uint16_t len  = tu_min16(tu_min16(rem, mps), vld);
   void          *buf  = pipe->buf;
 
@@ -498,7 +500,7 @@ static void process_bus_reset(uint8_t rhport)
   volatile uint16_t *ctr = (volatile uint16_t*)((uintptr_t) (&rusb->PIPE_CTR[0]));
   volatile uint16_t *tre = (volatile uint16_t*)((uintptr_t) (&rusb->PIPE_TR[0].E));
 
-  for (int i = 1; i <= 5; ++i) {
+  for (uint16_t i = 1; i <= 5; ++i) {
     rusb->PIPESEL = i;
     rusb->PIPECFG = 0;
     *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
@@ -508,7 +510,7 @@ static void process_bus_reset(uint8_t rhport)
     tre += 2;
   }
 
-  for (int i = 6; i <= 9; ++i) {
+  for (uint16_t i = 6; i <= 9; ++i) {
     rusb->PIPESEL = i;
     rusb->PIPECFG = 0;
     *ctr = RUSB2_PIPE_CTR_ACLRM_Msk;
@@ -542,7 +544,7 @@ static void process_bus_reset(uint8_t rhport)
 static void process_set_address(uint8_t rhport)
 {
   rusb2_reg_t* rusb = RUSB2_REG(rhport);
-  const uint16_t addr = rusb->USBADDR_b.USBADDR;
+  const uint16_t addr = (uint16_t)rusb->USBADDR_b.USBADDR;
   if (!addr) {
     return;
   }
@@ -706,7 +708,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc)
   (void)rhport;
 
   rusb2_reg_t * rusb = RUSB2_REG(rhport);
-  const unsigned ep_addr = ep_desc->bEndpointAddress;
+  const uint8_t  ep_addr = ep_desc->bEndpointAddress;
   const unsigned epn     = tu_edpt_number(ep_addr);
   const unsigned dir     = tu_edpt_dir(ep_addr);
   const unsigned xfer    = ep_desc->bmAttributes.xfer;
@@ -770,8 +772,10 @@ void dcd_edpt_close_all(uint8_t rhport)
   dcd_int_disable(rhport);
   while (--i) { /* Close all pipes except 0 */
     const unsigned ep_addr = _dcd.pipe[i].ep;
-    if (!ep_addr) continue;
-    dcd_edpt_close(rhport, ep_addr);
+    if (!ep_addr) {
+      continue;
+    }
+    dcd_edpt_close(rhport, (uint8_t)ep_addr);
   }
   dcd_int_enable(rhport);
 }
@@ -783,10 +787,10 @@ void dcd_edpt_close(uint8_t rhport, uint8_t ep_addr)
   const unsigned dir = tu_edpt_dir(ep_addr);
   const unsigned num = _dcd.ep[dir][epn];
 
-  rusb->BRDYENB &= ~TU_BIT(num);
+  rusb->BRDYENB &= (uint16_t)~TU_BIT(num);
   volatile uint16_t *ctr = get_pipectr(rusb, num);
   *ctr = 0;
-  rusb->PIPESEL = num;
+  rusb->PIPESEL = (uint16_t)num;
   rusb->PIPECFG = 0;
   _dcd.pipe[num].ep = 0;
   _dcd.ep[dir][epn] = 0;
@@ -860,7 +864,7 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr)
     *ctr = RUSB2_PIPE_CTR_PID_BUF;
   } else {
     const unsigned num = _dcd.ep[0][tu_edpt_number(ep_addr)];
-    rusb->PIPESEL = num;
+    rusb->PIPESEL = (uint16_t)num;
     if (rusb->PIPECFG_b.TYPE != 1) {
       *ctr = RUSB2_PIPE_CTR_PID_BUF;
     }
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 8b4719b21..135b4e8f6 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -259,7 +259,7 @@ static void handle_ctr_tx(uint32_t ep_id) {
   }
 
   if (xfer->total_len != xfer->queued_len) {
-    dcd_transmit_packet(xfer, ep_id);
+    dcd_transmit_packet(xfer, (uint16_t)ep_id);
   } else {
     dcd_event_xfer_complete(0, ep_num | TUSB_DIR_IN_MASK, xfer->queued_len, XFER_RESULT_SUCCESS, true);
   }
@@ -267,7 +267,7 @@ static void handle_ctr_tx(uint32_t ep_id) {
 
 static void handle_ctr_setup(uint32_t ep_id) {
   uint16_t rx_count = btable_get_count(ep_id, BTABLE_BUF_RX);
-  uint16_t rx_addr  = btable_get_addr(ep_id, BTABLE_BUF_RX);
+  uint16_t rx_addr  = (uint16_t)btable_get_addr(ep_id, BTABLE_BUF_RX);
   uint8_t  setup_packet[8] TU_ATTR_ALIGNED(4);
 
   tu_hwfifo_read(PMA_BUF_AT(rx_addr), setup_packet, rx_count, NULL);
@@ -531,8 +531,8 @@ void edpt0_open(uint8_t rhport) {
   xfer_status[0][1].max_packet_size = CFG_TUD_ENDPOINT0_SIZE;
   xfer_status[0][1].ep_idx          = 0;
 
-  uint16_t pma_addr0 = dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
-  uint16_t pma_addr1 = dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
+  uint16_t pma_addr0 = (uint16_t)dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
+  uint16_t pma_addr1 = (uint16_t)dcd_pma_alloc(CFG_TUD_ENDPOINT0_SIZE, false);
 
   btable_set_addr(0, BTABLE_BUF_RX, pma_addr0);
   btable_set_addr(0, BTABLE_BUF_TX, pma_addr1);
@@ -574,7 +574,7 @@ bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
   }
 
   /* Create a packet memory buffer area. */
-  uint16_t pma_addr = dcd_pma_alloc(packet_size, false);
+  uint16_t pma_addr = (uint16_t)dcd_pma_alloc(packet_size, false);
   btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
 
   xfer_ctl_t *xfer      = xfer_ctl_ptr(ep_num, dir);
@@ -624,17 +624,17 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 
   #if CFG_TUD_FSDEV_DOUBLE_BUFFERED_ISO_EP != 0
   uint32_t pma_addr  = dcd_pma_alloc(largest_packet_size, true);
-  uint16_t pma_addr2 = pma_addr >> 16;
+  uint16_t pma_addr2 = (uint16_t)(pma_addr >> 16);
   #else
   uint32_t pma_addr  = dcd_pma_alloc(largest_packet_size, false);
-  uint16_t pma_addr2 = pma_addr;
+  uint16_t pma_addr2 = (uint16_t)pma_addr;
   #endif
 
   #if FSDEV_USE_SBUF_ISO == 0
-  btable_set_addr(ep_idx, 0, pma_addr);
+  btable_set_addr(ep_idx, 0, (uint16_t)pma_addr);
   btable_set_addr(ep_idx, 1, pma_addr2);
   #else
-  btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, pma_addr);
+  btable_set_addr(ep_idx, dir == TUSB_DIR_IN ? BTABLE_BUF_TX : BTABLE_BUF_RX, (uint16_t)pma_addr);
   (void)pma_addr2;
   #endif
 
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.c b/src/portable/st/stm32_fsdev/fsdev_common.c
index 003bcd069..7c4572a1e 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.c
+++ b/src/portable/st/stm32_fsdev/fsdev_common.c
@@ -81,11 +81,11 @@ uint16_t pma_align_buffer_size(uint16_t size, uint8_t* blsize, uint8_t* num_bloc
   if (size > 62) {
     block_in_bytes = 32;
     *blsize = 1;
-    *num_block = tu_div_ceil(size, 32);
+    *num_block = (uint8_t)tu_div_ceil(size, 32);
   } else {
     block_in_bytes = 2;
     *blsize = 0;
-    *num_block = tu_div_ceil(size, 2);
+    *num_block = (uint8_t)tu_div_ceil(size, 2);
   }
 
   return (*num_block) * block_in_bytes;
diff --git a/src/portable/st/stm32_fsdev/fsdev_common.h b/src/portable/st/stm32_fsdev/fsdev_common.h
index 140ff1d61..af84b8b97 100644
--- a/src/portable/st/stm32_fsdev/fsdev_common.h
+++ b/src/portable/st/stm32_fsdev/fsdev_common.h
@@ -345,7 +345,7 @@ TU_ATTR_ALWAYS_INLINE static inline void ep_write_clear_ctr(uint32_t ep_id, tusb
   uint32_t reg = FSDEV_REG->ep[ep_id].reg;
   reg |= U_EP_CTR_TX | U_EP_CTR_RX;
   reg &= U_EPREG_MASK;
-  reg &= ~(1 << (U_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0 : 8)));
+  reg &= ~(1u << (U_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 0u : 8u)));
   ep_write(ep_id, reg, false);
 }
 
@@ -378,7 +378,7 @@ TU_ATTR_ALWAYS_INLINE static inline void ch_write_clear_ctr(uint32_t ch_id, tusb
   uint32_t reg = FSDEV_REG->ep[ch_id].reg;
   reg |= U_EP_CTR_TX | U_EP_CTR_RX;
   reg &= U_EPREG_MASK;
-  reg &= ~(1 << (U_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 8 : 0)));
+  reg &= ~(1u << (U_EP_CTR_TX_Pos + (dir == TUSB_DIR_IN ? 8u : 0u)));
   ep_write(ch_id, reg, false);
 }
 
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 9a9c734a0..2e5a56d08 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -191,7 +191,7 @@ static void dma_setup_prepare(uint8_t rhport) {
 */
 
 TU_ATTR_ALWAYS_INLINE static inline uint16_t calc_device_grxfsiz(uint16_t largest_ep_size, uint8_t ep_count) {
-  return 13 + 1 + 2 * ((largest_ep_size / 4) + 1) + 2 * ep_count;
+  return (uint16_t)(13 + 1 + 2 * ((largest_ep_size / 4) + 1) + 2 * ep_count);
 }
 
 static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size, bool is_bulk) {
@@ -203,7 +203,7 @@ static bool dfifo_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t packet_size, b
 
   TU_ASSERT(epnum < ep_count);
 
-  uint16_t fifo_size = tu_div_ceil(packet_size, 4);
+  uint16_t fifo_size = (uint16_t)tu_div_ceil(packet_size, 4);
   if (dir == TUSB_DIR_OUT) {
     // Calculate required size of RX FIFO
     const uint16_t new_sz = calc_device_grxfsiz(4 * fifo_size, ep_count);
@@ -371,7 +371,7 @@ static void edpt_schedule_packets(uint8_t rhport, const uint8_t epnum, const uin
     num_packets = 1;
   } else {
     total_bytes = xfer->total_len;
-    num_packets = tu_div_ceil(total_bytes, xfer->max_size);
+    num_packets = (uint16_t)tu_div_ceil(total_bytes, xfer->max_size);
     if (num_packets == 0) {
       num_packets = 1; // zero length packet still count as 1
     }
-- 
cgit v1.3.1


From d0c550cadceff3fdf30060f4ac0ebf919e5934a1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Tue, 21 Apr 2026 19:44:10 +0700
Subject: enable double buffer for tm4c

---
 hw/bsp/tm4c/family.c                 |  8 +++++++
 src/portable/mentor/musb/dcd_musb.c  | 43 ++++++++++++++++++++++++++----------
 src/portable/mentor/musb/musb_type.h |  2 +-
 test/hil/hil_test.py                 |  2 +-
 4 files changed, 41 insertions(+), 14 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/tm4c/family.c b/hw/bsp/tm4c/family.c
index 6988a264e..c5e4bd64e 100644
--- a/hw/bsp/tm4c/family.c
+++ b/hw/bsp/tm4c/family.c
@@ -58,6 +58,14 @@ static void board_button_init(GPIOA_Type* port, uint8_t PinMsk) {
 
   /* Set direction */
   port->DIR &= ~PinMsk;
+
+  /* Enable internal pull so the idle state is deterministic. LaunchPad buttons
+   * connect the pin to GND when pressed (active-low) and require a pull-up. */
+#if BUTTON_STATE_ACTIVE == 0
+  port->PUR |= PinMsk;
+#else
+  port->PDR |= PinMsk;
+#endif
 }
 
 static void board_led_init(GPIOA_Type* port, uint8_t PinMsk, uint8_t dirmsk) {
diff --git a/src/portable/mentor/musb/dcd_musb.c b/src/portable/mentor/musb/dcd_musb.c
index 283d8b257..02d9c2f66 100644
--- a/src/portable/mentor/musb/dcd_musb.c
+++ b/src/portable/mentor/musb/dcd_musb.c
@@ -140,7 +140,6 @@ TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigne
 
 TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned is_rx, unsigned mps,
                                                        bool double_packet) {
-  (void) epnum;
   uint8_t ffsize = hwfifo_byte2size(mps);
   mps = 8 << ffsize; // round up to the next power of 2
 
@@ -153,6 +152,13 @@ TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsign
   musb->fifo_addr[is_rx] = alloced_fifo_bytes / 8;
   musb->fifo_size[is_rx] = ffsize;
 
+  volatile uint16_t* dp_disable = is_rx ? &musb->rx_doulbe_packet_disable : &musb->tx_double_packet_disable;
+  if (double_packet) {
+    *dp_disable &= ~(1u << epnum);
+  } else {
+    *dp_disable |= (1u << epnum);
+  }
+
   alloced_fifo_bytes += mps;
   return true;
 }
@@ -167,17 +173,22 @@ TU_ATTR_ALWAYS_INLINE static inline void hwfifo_reset(musb_regs_t* musb, unsigne
 TU_ATTR_ALWAYS_INLINE static inline bool hwfifo_config(musb_regs_t* musb, unsigned epnum, unsigned is_rx, unsigned mps,
                                                        bool double_packet) {
   (void) epnum; (void) mps;
-  if (!double_packet) {
-    #if defined(TUP_USBIP_MUSB_ADI)
-    musb->indexed_csr.maxp_csr[is_rx].csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET(is_rx);
-    #else
-    if (is_rx) {
-      musb->rx_doulbe_packet_disable |= 1u << epnum;
-    } else {
-      musb->tx_double_packet_disable |= 1u << epnum;
-    }
-    #endif
+
+  #if defined(TUP_USBIP_MUSB_ADI)
+  volatile uint8_t* csrh = &musb->indexed_csr.maxp_csr[is_rx].csrh;
+  if (double_packet) {
+    *csrh &= ~MUSB_CSRH_DISABLE_DOUBLE_PACKET;
+  } else {
+    *csrh |= MUSB_CSRH_DISABLE_DOUBLE_PACKET;
   }
+  #else
+  volatile uint16_t* dp_disable = is_rx ? &musb->rx_doulbe_packet_disable : &musb->tx_double_packet_disable;
+  if (double_packet) {
+    *dp_disable &= ~(1u << epnum);
+  } else {
+    *dp_disable |= (1u << epnum);
+  }
+  #endif
 
   return true;
 }
@@ -250,6 +261,14 @@ static void process_epin(uint8_t rhport, musb_regs_t *musb_regs, uint8_t epnum)
 
   pipe_state_t* pipe = pipe_get(epnum, TUSB_DIR_IN);
   if (pipe->remaining == 0) {
+    // All bytes have been loaded into the FIFO. With double-packet buffering a
+    // second packet may still be waiting in the FIFO when this IRQ fires (the
+    // hardware signals TXRDY clear as soon as a slot frees, not when the wire
+    // transfer finishes). Defer completion until FIFONE == 0 so we don't emit
+    // a duplicate xfer_complete before the final packet has been sent.
+    if (ep_csr->tx_csrl & MUSB_TXCSRL1_FIFONE) {
+      return;
+    }
     const uint16_t xferred_len = pipe->length;
     pipe->buf = NULL;
     pipe->armed = false;
@@ -649,7 +668,7 @@ bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const * ep_desc) {
 
   hwfifo_flush(musb, epn, is_rx, true);
 
-  TU_ASSERT(hwfifo_config(musb, epn, is_rx, mps, false));
+  TU_ASSERT(hwfifo_config(musb, epn, is_rx, mps, ep_desc->bmAttributes.xfer == TUSB_XFER_BULK));
   musb->intren_ep[is_rx] |= TU_BIT(epn);
 
   return true;
diff --git a/src/portable/mentor/musb/musb_type.h b/src/portable/mentor/musb/musb_type.h
index b2f6492fa..6a85d2ca8 100644
--- a/src/portable/mentor/musb/musb_type.h
+++ b/src/portable/mentor/musb/musb_type.h
@@ -336,7 +336,7 @@ TU_ATTR_ALWAYS_INLINE static inline musb_ep_csr_t* get_ep_csr(musb_regs_t* musb_
 #define MUSB_CSRL_CLEAR_DATA_TOGGLE(_rx) (1u << ((_rx) ? 7 : 6))
 
 // 0x13, 0x17: TX/RX CSRH
-#define MUSB_CSRH_DISABLE_DOUBLE_PACKET(_rx) (1u << 1)
+#define MUSB_CSRH_DISABLE_DOUBLE_PACKET      (1u << 1)
 #define MUSB_CSRH_TX_MODE                    (1u << 5) // 1 = TX, 0 = RX. only relevant for SHARED FIFO
 #define MUSB_CSRH_ISO                        (1u << 6)
 
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index dfe09bf23..58116fb67 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -1209,7 +1209,7 @@ device_tests = [
     'device/printer_to_cdc',
     'device/midi_test',
     'device/mtp',
-    # 'device/net_lwip_webserver'
+    'device/net_lwip_webserver'
 ]
 
 dual_tests = [
-- 
cgit v1.3.1


From 776f613dbf9ebb14e7dab6529db96a273157a943 Mon Sep 17 00:00:00 2001
From: "igor.masar" <igor.masar@espressif.com>
Date: Wed, 22 Apr 2026 14:22:23 +0200
Subject: Add ESP32-S31 as a supported MCU in TinyUSB

---
 README.rst                              |  2 ++
 hw/bsp/espressif/boards/family.c        |  8 ++------
 hw/bsp/espressif/family.cmake           | 17 ++++++++++++++---
 src/common/tusb_mcu.h                   | 18 +++++++++++++++++-
 src/portable/synopsys/dwc2/dcd_dwc2.c   | 10 ++++++----
 src/portable/synopsys/dwc2/dwc2_esp32.h | 12 ++++++++++++
 src/tusb_option.h                       |  1 +
 7 files changed, 54 insertions(+), 14 deletions(-)

(limited to 'hw')

diff --git a/README.rst b/README.rst
index 6be9d4873..04998abaa 100644
--- a/README.rst
+++ b/README.rst
@@ -157,6 +157,8 @@ Supported CPUs
 | Espressif    | S2, S3, H4                  | ✔      | ✔    | ✖         | dwc2                   |                    |
 | ESP32        +-----------------------------+--------+------+-----------+------------------------+--------------------+
 |              | P4                          | ✔      | ✔    | ✔         | dwc2                   |                    |
+|              +-----------------------------+--------+------+-----------+------------------------+--------------------+
+|              | S31                         | ✔      | ✔    | ✔         | dwc2                   |                    |
 +--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
 | GigaDevice   | GD32VF103                   | ✔      |      | ✖         | dwc2                   |                    |
 +--------------+-----------------------------+--------+------+-----------+------------------------+--------------------+
diff --git a/hw/bsp/espressif/boards/family.c b/hw/bsp/espressif/boards/family.c
index 48b1253b6..4b28cecf2 100644
--- a/hw/bsp/espressif/boards/family.c
+++ b/hw/bsp/espressif/boards/family.c
@@ -49,7 +49,7 @@ static led_strip_handle_t led_strip;
 static void max3421_init(void);
 #endif
 
-#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4, OPT_MCU_ESP32P4)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4, OPT_MCU_ESP32P4, OPT_MCU_ESP32S31)
 static bool usb_init(uint8_t rhport, bool is_host);
 #endif
 
@@ -111,10 +111,6 @@ void board_init(void) {
 #endif
 }
 
-#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4)
-
-#endif
-
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
@@ -178,7 +174,7 @@ void board_reset_to_bootloader(void) {
 // PHY Init
 //--------------------------------------------------------------------
 
-#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4, OPT_MCU_ESP32P4)
+#if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3, OPT_MCU_ESP32H4, OPT_MCU_ESP32P4, OPT_MCU_ESP32S31)
 #if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(5, 3, 0)
 
 #include "esp_private/usb_phy.h"
diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake
index ca9eadaf6..30d5a6ac9 100644
--- a/hw/bsp/espressif/family.cmake
+++ b/hw/bsp/espressif/family.cmake
@@ -2,7 +2,10 @@
 include("${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake")
 string(TOUPPER ${IDF_TARGET} FAMILY_MCUS)
 
-# Device port default to Port1 for P4 (highspeed), Port0 for others (fullspeed)
+# Device/host port defaults:
+# - ESP32-P4 uses Port1 (highspeed)
+# - ESP32-S31 uses Port0 (highspeed)
+# - Other targets use Port0 and derive the default speed from RHPORT_SPEED
 set(RHPORT_SPEED OPT_MODE_FULL_SPEED OPT_MODE_HIGH_SPEED)
 
 if (NOT DEFINED RHPORT_DEVICE)
@@ -22,10 +25,18 @@ if (NOT DEFINED RHPORT_HOST)
 endif()
 
 if (NOT DEFINED RHPORT_DEVICE_SPEED)
-  list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+  if (IDF_TARGET STREQUAL "esp32s31")
+    set(RHPORT_DEVICE_SPEED OPT_MODE_HIGH_SPEED)
+  else ()
+    list(GET RHPORT_SPEED ${RHPORT_DEVICE} RHPORT_DEVICE_SPEED)
+  endif ()
 endif ()
 if (NOT DEFINED RHPORT_HOST_SPEED)
-  list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+  if (IDF_TARGET STREQUAL "esp32s31")
+    set(RHPORT_HOST_SPEED OPT_MODE_HIGH_SPEED)
+  else ()
+    list(GET RHPORT_SPEED ${RHPORT_HOST} RHPORT_HOST_SPEED)
+  endif ()
 endif ()
 
 # Add example src and bsp directories
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 77a0bbf1d..a17c76a3b 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -455,7 +455,7 @@
   #define CFG_TUSB_OS_INC_PATH_DEFAULT freertos/
   // clang-format on
 
-  #if CFG_TUSB_MCU == OPT_MCU_ESP32S3
+  #if CFG_TUSB_MCU == OPT_MCU_ESP32S3 || CFG_TUSB_MCU == OPT_MCU_ESP32H4
     #define TUP_MCU_MULTIPLE_CORE 1
   #endif
 
@@ -476,6 +476,22 @@
   #define CFG_TUH_MEM_DCACHE_ENABLE_DEFAULT     CFG_TUH_DWC2_DMA_ENABLE
   #define CFG_TUSB_MEM_DCACHE_LINE_SIZE_DEFAULT 64
 
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S31)
+  #define TUP_USBIP_DWC2
+  #define TUP_USBIP_DWC2_ESP32
+  #define TUP_RHPORT_HIGHSPEED                  1
+  #define TUP_DCD_ENDPOINT_MAX                  16
+
+  // clang-format off
+  #define CFG_TUSB_OS_INC_PATH_DEFAULT          freertos/
+  // clang-format on
+
+  #define TUP_MCU_MULTIPLE_CORE                 1
+
+  // Disable slave if DMA is enabled
+  #define CFG_TUD_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUD_DWC2_DMA_ENABLE
+  #define CFG_TUH_DWC2_SLAVE_ENABLE_DEFAULT     !CFG_TUH_DWC2_DMA_ENABLE
+
 #elif TU_CHECK_MCU(OPT_MCU_ESP32, OPT_MCU_ESP32C2, OPT_MCU_ESP32C3, OPT_MCU_ESP32C5, OPT_MCU_ESP32C6, \
                    OPT_MCU_ESP32C61, OPT_MCU_ESP32H2)
   #if (CFG_TUD_ENABLED || !(defined(CFG_TUH_MAX3421) && CFG_TUH_MAX3421))
diff --git a/src/portable/synopsys/dwc2/dcd_dwc2.c b/src/portable/synopsys/dwc2/dcd_dwc2.c
index 9a9c734a0..c30af6196 100644
--- a/src/portable/synopsys/dwc2/dcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/dcd_dwc2.c
@@ -541,8 +541,9 @@ void dcd_remote_wakeup(uint8_t rhport) {
 void dcd_connect(uint8_t rhport) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
 
-#ifdef TUP_USBIP_DWC2_ESP32
-  // On ESP32-P4 HS PHY, do not write to USB_WRAP register which belongs to FS PHY
+#if defined(TUP_USBIP_DWC2_ESP32) && !TU_CHECK_MCU(OPT_MCU_ESP32S31)
+  // S31 is excluded at compile time (no USB_WRAP peripheral).
+  // On P4, the HS PHY (port 1) must not touch USB_WRAP which belongs to the FS PHY.
   if (rhport == 0) {
     usb_wrap_otg_conf_reg_t conf = USB_WRAP.otg_conf;
     conf.pad_pull_override = 0;
@@ -560,8 +561,9 @@ void dcd_connect(uint8_t rhport) {
 void dcd_disconnect(uint8_t rhport) {
   dwc2_regs_t* dwc2 = DWC2_REG(rhport);
 
-#ifdef TUP_USBIP_DWC2_ESP32
-  // On ESP32-P4 HS PHY, do not write to USB_WRAP register which belongs to FS PHY
+#if defined(TUP_USBIP_DWC2_ESP32) && !TU_CHECK_MCU(OPT_MCU_ESP32S31)
+  // S31 is excluded at compile time (no USB_WRAP peripheral).
+  // On P4, the HS PHY (port 1) must not touch USB_WRAP which belongs to the FS PHY.
   if (rhport == 0) {
     usb_wrap_otg_conf_reg_t conf = USB_WRAP.otg_conf;
     conf.pad_pull_override = 1;
diff --git a/src/portable/synopsys/dwc2/dwc2_esp32.h b/src/portable/synopsys/dwc2/dwc2_esp32.h
index 6a10dc7f8..436f8dc30 100644
--- a/src/portable/synopsys/dwc2/dwc2_esp32.h
+++ b/src/portable/synopsys/dwc2/dwc2_esp32.h
@@ -37,7 +37,11 @@
 
 #include "esp_intr_alloc.h"
 #include "soc/periph_defs.h"
+
+// ESP32-S31 does not have USB_WRAP peripheral (HS-only with UTMI PHY)
+#if !TU_CHECK_MCU(OPT_MCU_ESP32S31)
 #include "soc/usb_wrap_struct.h"
+#endif
 
 #if TU_CHECK_MCU(OPT_MCU_ESP32S2, OPT_MCU_ESP32S3)
 #define DWC2_FS_REG_BASE   0x60080000UL
@@ -75,6 +79,14 @@ static const dwc2_controller_t _dwc2_controller[] = {
   { .reg_base = DWC2_FS_REG_BASE, .irqnum = ETS_USB_OTG11_CH0_INTR_SOURCE, .ep_count = 7, .ep_in_count = 5, .otg_dfifo_depth = 256 },
   { .reg_base = DWC2_HS_REG_BASE, .irqnum = ETS_USB_OTG_INTR_SOURCE, .ep_count = 16, .ep_in_count = 8, .otg_dfifo_depth = 1024 }
 };
+
+#elif TU_CHECK_MCU(OPT_MCU_ESP32S31)
+#define DWC2_HS_REG_BASE   0x20300000UL
+#define DWC2_EP_MAX        16
+
+static const dwc2_controller_t _dwc2_controller[] = {
+  { .reg_base = DWC2_HS_REG_BASE, .irqnum = ETS_USB_OTGHS_INTR_SOURCE, .ep_count = 16, .ep_in_count = 8, .otg_dfifo_depth = 1024 }
+};
 #endif
 
 //--------------------------------------------------------------------+
diff --git a/src/tusb_option.h b/src/tusb_option.h
index dd7af76f6..154f8e2a4 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -134,6 +134,7 @@
 #define OPT_MCU_ESP32C5           908 ///< Espressif ESP32-C5
 #define OPT_MCU_ESP32C61          909 ///< Espressif ESP32-C61
 #define OPT_MCU_ESP32H4           910 ///< Espressif ESP32-H4
+#define OPT_MCU_ESP32S31          911 ///< Espressif ESP32-S31
 
 // Dialog
 #define OPT_MCU_DA1469X          1000 ///< Dialog Semiconductor DA1469x
-- 
cgit v1.3.1


From b62ac586501c43c61f21c0fca67dca437ff3a9dc Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 26 Apr 2026 20:35:54 +0800
Subject: Fix CH32V103 hardfault on startup

---
 hw/bsp/ch32v10x/family.c | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 72dae7086..9943bf856 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -67,7 +67,10 @@ uint32_t tusb_time_millis_api(void) {
 #endif
 
 void board_init(void) {
-  __disable_irq();
+  /* __disable_irq() in CH32V103 EVT attempts to call
+   * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
+   * Disable this to avoid hard-fault. */
+  //__disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
@@ -123,7 +126,7 @@ void board_init(void) {
   USART_Init(USART1, &usart);
   USART_Cmd(USART1, ENABLE);
 
-  __enable_irq();
+  //__enable_irq();
 
   board_led_write(true);
 }
-- 
cgit v1.3.1


From 2eb1599b4d5e773b71135d82d71e9b422935a410 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 26 Apr 2026 20:36:55 +0800
Subject: Add ch32v103c_bluepill board

---
 .../ch32v10x/boards/ch32v103c_bluepill/board.cmake |  8 +++++++
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h  | 27 ++++++++++++++++++++++
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk |  5 ++++
 3 files changed, 40 insertions(+)
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
 create mode 100644 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
new file mode 100644
index 000000000..f6e47ba30
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.cmake
@@ -0,0 +1,8 @@
+set(LD_FLASH_SIZE 64K)
+set(LD_RAM_SIZE 20K)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    CFG_EXAMPLE_MSC_DUAL_READONLY
+    )
+endfunction()
diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
new file mode 100644
index 000000000..02558b953
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
@@ -0,0 +1,27 @@
+/* Some chinese manufactors use CH32V103C8T6 to make Bluepill boards
+ */
+/* metadata:
+   name: CH32V103C8T6-Bluepill
+   url: https://stm32-base.org/boards/STM32F103C8T6-Blue-Pill
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define LED_PORT            GPIOC
+#define LED_PIN             GPIO_Pin_13
+#define LED_STATE_ON        0
+
+#define BUTTON_PORT         GPIOA
+#define BUTTON_PIN          GPIO_Pin_1
+#define BUTTON_STATE_ACTIVE 1
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk
new file mode 100644
index 000000000..e594f42a7
--- /dev/null
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.mk
@@ -0,0 +1,5 @@
+CFLAGS += -DCFG_EXAMPLE_MSC_DUAL_READONLY
+
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=64K \
+  -Wl,--defsym=__RAM_SIZE=20K \
-- 
cgit v1.3.1


From 9d3ad336bfad062fa1e6f6d63feb97a9851cc9e1 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 29 Apr 2026 17:27:59 +0700
Subject: deprecated `usbd_control.c` and merge its functionality into `usbd.c`

---
 hw/bsp/rp2040/family.cmake    |   1 -
 src/CMakeLists.txt            |   1 -
 src/device/usbd.c             | 173 ++++++++++++++++++++++++++++++++++--
 src/device/usbd_control.c     | 199 ++----------------------------------------
 src/tinyusb.mk                |   1 -
 test/fuzz/rules.mk            |   1 -
 test/unit-test/CMakeLists.txt |   4 +-
 7 files changed, 172 insertions(+), 208 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 6e88b9fa1..075582554 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -93,7 +93,6 @@ target_sources(tinyusb_device_base INTERFACE
 		${TOP}/src/portable/raspberrypi/rp2040/dcd_rp2040.c
 		${TOP}/src/portable/raspberrypi/rp2040/rp2040_usb.c
 		${TOP}/src/device/usbd.c
-		${TOP}/src/device/usbd_control.c
 		${TOP}/src/class/audio/audio_device.c
 		${TOP}/src/class/cdc/cdc_device.c
 		${TOP}/src/class/dfu/dfu_device.c
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index 00f466007..c7a5184c5 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -8,7 +8,6 @@ function(tinyusb_sources_get OUTPUT_VAR)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/common/tusb_fifo.c
     # device
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/device/usbd_control.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/audio/audio_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_device.c
diff --git a/src/device/usbd.c b/src/device/usbd.c
index da0ffb4c6..acf808bf6 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -419,11 +419,10 @@ static bool process_test_mode_cb(uint8_t rhport, uint8_t stage, tusb_control_req
 }
 #endif
 
-// from usbd_control.c
-void usbd_control_reset(void);
-void usbd_control_set_request(tusb_control_request_t const *request);
-void usbd_control_set_complete_callback( usbd_control_xfer_cb_t fp );
-bool usbd_control_xfer_cb (uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t xferred_bytes);
+// Control Endpoint
+static void usbd_control_reset(void);
+static void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp);
+static bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
 
 //--------------------------------------------------------------------+
 // Weak stubs: invoked if no strong implementation is available
@@ -808,6 +807,157 @@ void tud_task_ext(uint32_t timeout_ms, bool in_isr) {
   }
 }
 
+//--------------------------------------------------------------------+
+// Control Endpoint
+//--------------------------------------------------------------------+
+
+// Weak hook: invoked when the control transfer's status stage completes
+TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, const tusb_control_request_t* request) {
+  (void) rhport;
+  (void) request;
+}
+
+typedef struct {
+  tusb_control_request_t request;
+  uint8_t* buffer;
+  uint16_t data_len;
+  uint16_t total_xferred;
+  usbd_control_xfer_cb_t complete_cb;
+} usbd_control_xfer_t;
+
+static usbd_control_xfer_t _ctrl_xfer;
+
+CFG_TUD_MEM_SECTION static struct {
+  TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_BUFSIZE);
+} _ctrl_epbuf;
+
+uint8_t* usbd_get_ctrl_buf(void) {
+  return _ctrl_epbuf.buf;
+}
+
+// Endpoint used for the Status stage of a control transfer.
+// Per USB 2.0 §9.3.1, when wLength == 0 the Direction bit is ignored and the Status
+// stage is always IN. Otherwise the Status stage is opposite of the Data stage direction.
+TU_ATTR_ALWAYS_INLINE static inline uint8_t status_stage_ep(const tusb_control_request_t* request) {
+  return (request->wLength != 0 && request->bmRequestType_bit.direction) ? TU_EP0_OUT : TU_EP0_IN;
+}
+
+// Queue ZLP status transaction
+TU_ATTR_ALWAYS_INLINE static inline bool status_stage_xact(uint8_t rhport, uint8_t ep_status) {
+  return usbd_edpt_xfer(rhport, ep_status, NULL, 0, false);
+}
+
+// Queue a transaction in Data Stage. Each transaction has up to Endpoint0's max
+// packet size. This function can also transfer a zero-length packet.
+static bool data_stage_xact(uint8_t rhport) {
+  const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_BUFSIZE);
+  uint8_t ep_addr = TU_EP0_OUT;
+
+  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
+    ep_addr = TU_EP0_IN;
+    if (0u != xact_len && _ctrl_xfer.buffer != _ctrl_epbuf.buf) {
+      TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
+    }
+  }
+
+  return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _ctrl_epbuf.buf : NULL, xact_len, false);
+}
+
+// Status phase
+bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) {
+  // _ctrl_xfer fields are pre-initialized at process_control_request entry
+  (void) request;
+  return status_stage_xact(rhport, status_stage_ep(&_ctrl_xfer.request));
+}
+
+// Transmit data to/from the control endpoint. If wLength is zero, a status packet is sent instead.
+bool tud_control_xfer(uint8_t rhport, const tusb_control_request_t* request, void* buffer, uint16_t len) {
+  // _ctrl_xfer.request and reset fields are pre-initialized at process_control_request entry
+  (void) request;
+  _ctrl_xfer.buffer = (uint8_t*) buffer;
+  _ctrl_xfer.data_len = tu_min16(len, _ctrl_xfer.request.wLength);
+
+  if (_ctrl_xfer.request.wLength > 0U) {
+    if (_ctrl_xfer.data_len > 0U) {
+      TU_ASSERT(buffer);
+    }
+    TU_ASSERT(data_stage_xact(rhport));
+  } else {
+    // wLength == 0: Status stage is always IN per USB 2.0 §9.3.1
+    TU_ASSERT(status_stage_xact(rhport, TU_EP0_IN));
+  }
+
+  return true;
+}
+
+static void usbd_control_reset(void) {
+  tu_varclr(&_ctrl_xfer);
+}
+
+static void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp) {
+  _ctrl_xfer.complete_cb = fp;
+}
+
+// Callback when a transaction completes on the DATA stage or Status stage of EP0
+static bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
+  (void) result;
+
+  // Status Stage complete: ep_addr matches the resolved Status stage endpoint
+  uint8_t const ep_status = status_stage_ep(&_ctrl_xfer.request);
+  if (ep_addr == ep_status) {
+    TU_ASSERT(0 == xferred_bytes);
+
+    // invoke optional dcd hook if available
+    dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request);
+
+    if (NULL != _ctrl_xfer.complete_cb) {
+      // TODO refactor with usbd_driver_print_control_complete_name
+      _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_ACK, &_ctrl_xfer.request);
+    }
+
+    return true;
+  }
+
+  // Data stage progress
+  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT) {
+    TU_VERIFY(_ctrl_xfer.buffer);
+    if (_ctrl_xfer.buffer != _ctrl_epbuf.buf) {
+      memcpy(_ctrl_xfer.buffer, _ctrl_epbuf.buf, xferred_bytes);
+    }
+    TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2);
+  }
+
+  _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes;
+  _ctrl_xfer.buffer += xferred_bytes;
+
+  // Data Stage complete when wLength reached or short packet (incl. ZLP) seen
+  if ((_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) ||
+      (xferred_bytes < CFG_TUD_ENDPOINT0_BUFSIZE)) {
+    bool is_ok = true;
+
+    if (NULL != _ctrl_xfer.complete_cb) {
+      #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
+      usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
+      #endif
+      // Callback can still stall control in status phase, e.g. OUT data doesn't make sense
+      is_ok = _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_DATA, &_ctrl_xfer.request);
+    }
+
+    if (is_ok) {
+      TU_ASSERT(status_stage_xact(rhport, ep_status));
+    } else {
+      // Stall both IN and OUT control endpoint
+      dcd_edpt_stall(rhport, TU_EP0_OUT);
+      dcd_edpt_stall(rhport, TU_EP0_IN);
+    }
+  } else {
+    // More data to transfer
+    TU_ASSERT(data_stage_xact(rhport));
+  }
+
+  return true;
+}
+
 //--------------------------------------------------------------------+
 // Control Request Parser & Handling
 //--------------------------------------------------------------------+
@@ -822,7 +972,14 @@ static bool invoke_class_control(uint8_t rhport, usbd_class_driver_t const * dri
 // This handles the actual request and its response.
 // Returns false if unable to complete the request, causing caller to stall control endpoints.
 static bool process_control_request(uint8_t rhport, tusb_control_request_t const * p_request) {
-  usbd_control_set_complete_callback(NULL);
+  // Initialize control transfer state for this request. The request copy must be
+  // visible to usbd_control_xfer_cb when the (asynchronous) status ZLP completes,
+  // since the SETUP packet event has already gone out of scope by then.
+  _ctrl_xfer.request = *p_request;
+  _ctrl_xfer.buffer = NULL;
+  _ctrl_xfer.total_xferred = 0;
+  _ctrl_xfer.data_len = 0;
+  _ctrl_xfer.complete_cb = NULL;
   TU_ASSERT(p_request->bmRequestType_bit.type < TUSB_REQ_TYPE_INVALID);
 
   // Vendor request
@@ -865,9 +1022,9 @@ static bool process_control_request(uint8_t rhport, tusb_control_request_t const
           // Depending on mcu, status phase could be sent either before or after changing device address,
           // or even require stack to not response with status at all
           // Therefore DCD must take full responsibility to response and include zlp status packet if needed.
-          usbd_control_set_request(p_request); // set request since DCD has no access to tud_control_status() API
+          // _ctrl_xfer.request was already populated at process_control_request() entry, so the
+          // status ZLP that the DCD queues will be recognized by usbd_control_xfer_cb().
           dcd_set_address(rhport, (uint8_t) p_request->wValue);
-          // skip tud_control_status()
           _usbd_dev.addressed = 1;
         break;
 
diff --git a/src/device/usbd_control.c b/src/device/usbd_control.c
index b14d08a9c..38dcc6a82 100644
--- a/src/device/usbd_control.c
+++ b/src/device/usbd_control.c
@@ -24,197 +24,8 @@
  * This file is part of the TinyUSB stack.
  */
 
-#include "tusb_option.h"
-
-#if CFG_TUD_ENABLED
-
-#include "dcd.h"
-#include "tusb.h"
-#include "device/usbd_pvt.h"
-
-//--------------------------------------------------------------------+
-// Callback weak stubs (called if application does not provide)
-//--------------------------------------------------------------------+
-TU_ATTR_WEAK void dcd_edpt0_status_complete(uint8_t rhport, const tusb_control_request_t* request) {
-  (void) rhport;
-  (void) request;
-}
-
-//--------------------------------------------------------------------+
-// MACRO CONSTANT TYPEDEF
-//--------------------------------------------------------------------+
-
-
-typedef struct {
-  tusb_control_request_t request;
-  uint8_t* buffer;
-  uint16_t data_len;
-  uint16_t total_xferred;
-  usbd_control_xfer_cb_t complete_cb;
-} usbd_control_xfer_t;
-
-static usbd_control_xfer_t _ctrl_xfer;
-
-CFG_TUD_MEM_SECTION static struct {
-  TUD_EPBUF_DEF(buf, CFG_TUD_ENDPOINT0_BUFSIZE);
-} _ctrl_epbuf;
-
-uint8_t* usbd_get_ctrl_buf(void) {
-  return _ctrl_epbuf.buf;
-}
-
-//--------------------------------------------------------------------+
-// Application API
-//--------------------------------------------------------------------+
-
-// Endpoint used for the Status stage of a control transfer.
-// Per USB 2.0 §9.3.1, when wLength == 0 the Direction bit is ignored and the Status stage
-// is always IN. Otherwise the Status stage is opposite to the Data stage direction.
-TU_ATTR_ALWAYS_INLINE static inline uint8_t status_stage_ep(const tusb_control_request_t* request) {
-  return (request->wLength != 0 && request->bmRequestType_bit.direction) ? TU_EP0_OUT : TU_EP0_IN;
-}
-
-// Queue ZLP status transaction
-TU_ATTR_ALWAYS_INLINE static inline  bool status_stage_xact(uint8_t rhport, uint8_t ep_status) {
-  return usbd_edpt_xfer(rhport, ep_status, NULL, 0, false);
-}
-
-// Status phase
-bool tud_control_status(uint8_t rhport, const tusb_control_request_t* request) {
-  _ctrl_xfer.request = (*request);
-  _ctrl_xfer.buffer = NULL;
-  _ctrl_xfer.total_xferred = 0;
-  _ctrl_xfer.data_len = 0;
-
-  return status_stage_xact(rhport, status_stage_ep(request));
-}
-
-// Queue a transaction in Data Stage
-// Each transaction has up to Endpoint0's max packet size.
-// This function can also transfer an zero-length packet
-static bool data_stage_xact(uint8_t rhport) {
-  const uint16_t xact_len = tu_min16(_ctrl_xfer.data_len - _ctrl_xfer.total_xferred, CFG_TUD_ENDPOINT0_BUFSIZE);
-  uint8_t ep_addr = TU_EP0_OUT;
-
-  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_IN) {
-    ep_addr = TU_EP0_IN;
-    if (0u != xact_len && _ctrl_xfer.buffer != _ctrl_epbuf.buf) {
-      TU_VERIFY(0 == tu_memcpy_s(_ctrl_epbuf.buf, CFG_TUD_ENDPOINT0_BUFSIZE, _ctrl_xfer.buffer, xact_len));
-    }
-  }
-
-  return usbd_edpt_xfer(rhport, ep_addr, xact_len ? _ctrl_epbuf.buf : NULL, xact_len, false);
-}
-
-// Transmit data to/from the control endpoint.
-// If the request's wLength is zero, a status packet is sent instead.
-bool tud_control_xfer(uint8_t rhport, const tusb_control_request_t* request, void* buffer, uint16_t len) {
-  _ctrl_xfer.request = (*request);
-  _ctrl_xfer.buffer = (uint8_t*) buffer;
-  _ctrl_xfer.total_xferred = 0U;
-  _ctrl_xfer.data_len = tu_min16(len, request->wLength);
-
-  if (request->wLength > 0U) {
-    if (_ctrl_xfer.data_len > 0U) {
-      TU_ASSERT(buffer);
-    }
-    TU_ASSERT(data_stage_xact(rhport));
-  } else {
-    TU_ASSERT(status_stage_xact(rhport, TU_EP0_IN));
-  }
-
-  return true;
-}
-
-//--------------------------------------------------------------------+
-// USBD API
-//--------------------------------------------------------------------+
-void usbd_control_reset(void);
-void usbd_control_set_request(const tusb_control_request_t* request);
-void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp);
-bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
-
-void usbd_control_reset(void) {
-  tu_varclr(&_ctrl_xfer);
-}
-
-// Set complete callback
-void usbd_control_set_complete_callback(usbd_control_xfer_cb_t fp) {
-  _ctrl_xfer.complete_cb = fp;
-}
-
-// for dcd_set_address where DCD is responsible for status response
-void usbd_control_set_request(const tusb_control_request_t* request) {
-  _ctrl_xfer.request = (*request);
-  _ctrl_xfer.buffer = NULL;
-  _ctrl_xfer.total_xferred = 0;
-  _ctrl_xfer.data_len = 0;
-}
-
-// callback when a transaction complete on
-// - DATA stage of control endpoint or
-// - Status stage
-bool usbd_control_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
-  (void) result;
-
-  // Status Stage complete: endpoint matches the Status stage endpoint
-  uint8_t const ep_status = status_stage_ep(&_ctrl_xfer.request);
-  if (ep_addr == ep_status) {
-    TU_ASSERT(0 == xferred_bytes);
-
-    // invoke optional dcd hook if available
-    dcd_edpt0_status_complete(rhport, &_ctrl_xfer.request);
-
-    if (NULL != _ctrl_xfer.complete_cb) {
-      // TODO refactor with usbd_driver_print_control_complete_name
-      _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_ACK, &_ctrl_xfer.request);
-    }
-
-    return true;
-  }
-
-  // Data stage complete
-  if (_ctrl_xfer.request.bmRequestType_bit.direction == TUSB_DIR_OUT) {
-    TU_VERIFY(_ctrl_xfer.buffer);
-    if (_ctrl_xfer.buffer != _ctrl_epbuf.buf) {
-      memcpy(_ctrl_xfer.buffer, _ctrl_epbuf.buf, xferred_bytes);
-    }
-    TU_LOG_MEM(CFG_TUD_LOG_LEVEL, _ctrl_xfer.buffer, xferred_bytes, 2);
-  }
-
-  _ctrl_xfer.total_xferred += (uint16_t) xferred_bytes;
-  _ctrl_xfer.buffer += xferred_bytes;
-
-  // Data Stage is complete when all request's length are transferred or
-  // a short packet is sent including zero-length packet.
-  if ((_ctrl_xfer.request.wLength == _ctrl_xfer.total_xferred) ||
-      (xferred_bytes < CFG_TUD_ENDPOINT0_BUFSIZE)) {
-    // DATA stage is complete
-    bool is_ok = true;
-
-    // invoke complete callback if set
-    // callback can still stall control in status phase e.g out data does not make sense
-    if (NULL != _ctrl_xfer.complete_cb) {
-      #if CFG_TUSB_DEBUG >= CFG_TUD_LOG_LEVEL
-      usbd_driver_print_control_complete_name(_ctrl_xfer.complete_cb);
-      #endif
-
-      is_ok = _ctrl_xfer.complete_cb(rhport, CONTROL_STAGE_DATA, &_ctrl_xfer.request);
-    }
-
-    if (is_ok) {
-      TU_ASSERT(status_stage_xact(rhport, ep_status));
-    } else {
-      // Stall both IN and OUT control endpoint
-      dcd_edpt_stall(rhport, TU_EP0_OUT);
-      dcd_edpt_stall(rhport, TU_EP0_IN);
-    }
-  } else {
-    // More data to transfer
-    TU_ASSERT(data_stage_xact(rhport));
-  }
-
-  return true;
-}
-
-#endif
+// The usbd control function that used to live in this file has been merged
+// into src/device/usbd.c. This translation unit is intentionally empty and is
+// kept only so external/vendor build systems that still reference the path
+// keep resolving. Drop usbd_control.c from your build to silence the warning.
+#warning "src/device/usbd_control.c is deprecated and now empty; remove it from your build (its content lives in src/device/usbd.c)."
diff --git a/src/tinyusb.mk b/src/tinyusb.mk
index 169098016..e3ef35dcf 100644
--- a/src/tinyusb.mk
+++ b/src/tinyusb.mk
@@ -3,7 +3,6 @@ TINYUSB_SRC_C += \
 	src/tusb.c \
 	src/common/tusb_fifo.c \
 	src/device/usbd.c \
-	src/device/usbd_control.c \
 	src/typec/usbc.c \
 	src/class/audio/audio_device.c \
 	src/class/cdc/cdc_device.c \
diff --git a/test/fuzz/rules.mk b/test/fuzz/rules.mk
index 329dcce11..c14330312 100644
--- a/test/fuzz/rules.mk
+++ b/test/fuzz/rules.mk
@@ -23,7 +23,6 @@ SRC_C += \
 	src/tusb.c \
 	src/common/tusb_fifo.c \
 	src/device/usbd.c \
-	src/device/usbd_control.c \
 	src/class/audio/audio_device.c \
 	src/class/cdc/cdc_device.c \
 	src/class/dfu/dfu_device.c \
diff --git a/test/unit-test/CMakeLists.txt b/test/unit-test/CMakeLists.txt
index b44a91d57..a33af4563 100644
--- a/test/unit-test/CMakeLists.txt
+++ b/test/unit-test/CMakeLists.txt
@@ -117,14 +117,14 @@ add_ceedling_test(
 add_ceedling_test(
   test_usbd
   ${CEEDLING_WORKDIR}/test/device/usbd/test_usbd.c
-  "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/device/usbd_control.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c"
+  "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c"
   "${CEEDLING_BUILD_DIR}/test/mocks/test_usbd/mock_dcd.c;${CEEDLING_BUILD_DIR}/test/mocks/test_usbd/mock_msc_device.c"
   )
 
 add_ceedling_test(
   test_msc_device
   ${CEEDLING_WORKDIR}/test/device/msc/test_msc_device.c
-  "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/device/usbd_control.c;${CEEDLING_WORKDIR}/../../src/class/msc/msc_device.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c"
+  "${CEEDLING_WORKDIR}/../../src/tusb.c;${CEEDLING_WORKDIR}/../../src/device/usbd.c;${CEEDLING_WORKDIR}/../../src/class/msc/msc_device.c;${CEEDLING_WORKDIR}/../../src/common/tusb_fifo.c"
   "${CEEDLING_BUILD_DIR}/test/mocks/test_msc_device/mock_dcd.c"
   )
 
-- 
cgit v1.3.1


From 4722252558d4b2a5d77fff7a59ab9c9e51befe47 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 29 Apr 2026 22:00:05 +0200
Subject: ensure board_uart_write return -1 on default

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/at32f402_405/family.c  | 2 +-
 hw/bsp/at32f403a_407/family.c | 2 +-
 hw/bsp/at32f413/family.c      | 2 +-
 hw/bsp/at32f415/family.c      | 2 +-
 hw/bsp/at32f423/family.c      | 2 +-
 hw/bsp/at32f425/family.c      | 2 +-
 hw/bsp/at32f435_437/family.c  | 2 +-
 hw/bsp/at32f45x/family.c      | 2 +-
 hw/bsp/ch32v20x/family.c      | 2 +-
 hw/bsp/ft9xx/family.c         | 3 ++-
 hw/bsp/gd32vf103/family.c     | 2 +-
 hw/bsp/kinetis_k/family.c     | 2 +-
 hw/bsp/mm32/family.c          | 2 +-
 hw/bsp/pic32mz/family.c       | 4 +++-
 hw/bsp/rp2040/family.c        | 2 +-
 hw/bsp/stm32c0/family.c       | 2 +-
 hw/bsp/stm32f0/family.c       | 2 +-
 hw/bsp/stm32f1/family.c       | 2 +-
 hw/bsp/stm32f2/family.c       | 2 +-
 hw/bsp/stm32f3/family.c       | 2 +-
 hw/bsp/stm32f4/family.c       | 2 +-
 hw/bsp/stm32f7/family.c       | 2 +-
 hw/bsp/stm32g0/family.c       | 2 +-
 hw/bsp/stm32g4/family.c       | 2 +-
 hw/bsp/stm32h5/family.c       | 2 +-
 hw/bsp/stm32h7/family.c       | 2 +-
 hw/bsp/stm32h7rs/family.c     | 2 +-
 hw/bsp/stm32l0/family.c       | 2 +-
 hw/bsp/stm32l4/family.c       | 2 +-
 hw/bsp/stm32n6/family.c       | 2 +-
 hw/bsp/stm32u0/family.c       | 2 +-
 hw/bsp/stm32u5/family.c       | 2 +-
 hw/bsp/stm32wb/family.c       | 2 +-
 hw/bsp/xmc4000/family.c       | 2 +-
 34 files changed, 37 insertions(+), 34 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/at32f402_405/family.c b/hw/bsp/at32f402_405/family.c
index 56d4a7bea..aa1a5b484 100644
--- a/hw/bsp/at32f402_405/family.c
+++ b/hw/bsp/at32f402_405/family.c
@@ -220,7 +220,7 @@ int board_uart_write(void const *buf, int len)
   #else
     (void) buf;
     (void) len;
-    return 0;
+    return -1;
   #endif
 }
 
diff --git a/hw/bsp/at32f403a_407/family.c b/hw/bsp/at32f403a_407/family.c
index 942e15872..cf15ba83a 100644
--- a/hw/bsp/at32f403a_407/family.c
+++ b/hw/bsp/at32f403a_407/family.c
@@ -238,7 +238,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f413/family.c b/hw/bsp/at32f413/family.c
index d9af0ae4d..69591b2ba 100644
--- a/hw/bsp/at32f413/family.c
+++ b/hw/bsp/at32f413/family.c
@@ -238,7 +238,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f415/family.c b/hw/bsp/at32f415/family.c
index ca205d480..132e0db31 100644
--- a/hw/bsp/at32f415/family.c
+++ b/hw/bsp/at32f415/family.c
@@ -212,7 +212,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f423/family.c b/hw/bsp/at32f423/family.c
index 9f13dba07..79ac3fcca 100644
--- a/hw/bsp/at32f423/family.c
+++ b/hw/bsp/at32f423/family.c
@@ -239,7 +239,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f425/family.c b/hw/bsp/at32f425/family.c
index 1629ad7c0..75e53b1f7 100644
--- a/hw/bsp/at32f425/family.c
+++ b/hw/bsp/at32f425/family.c
@@ -220,7 +220,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f435_437/family.c b/hw/bsp/at32f435_437/family.c
index 59a4fe120..80e200363 100644
--- a/hw/bsp/at32f435_437/family.c
+++ b/hw/bsp/at32f435_437/family.c
@@ -265,7 +265,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/at32f45x/family.c b/hw/bsp/at32f45x/family.c
index 27eae861f..42b688b87 100644
--- a/hw/bsp/at32f45x/family.c
+++ b/hw/bsp/at32f45x/family.c
@@ -216,7 +216,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/ch32v20x/family.c b/hw/bsp/ch32v20x/family.c
index 221f62107..76024cfde 100644
--- a/hw/bsp/ch32v20x/family.c
+++ b/hw/bsp/ch32v20x/family.c
@@ -220,6 +220,6 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
diff --git a/hw/bsp/ft9xx/family.c b/hw/bsp/ft9xx/family.c
index 5ee134eb0..a1c50e1b7 100644
--- a/hw/bsp/ft9xx/family.c
+++ b/hw/bsp/ft9xx/family.c
@@ -232,10 +232,11 @@ int board_uart_write(void const *buf, int len)
             break;
         }
     }
+    return count;
 #else
     (void) buf; (void) len;
+    return -1;
 #endif
-    return count;
 }
 
 // Get current milliseconds
diff --git a/hw/bsp/gd32vf103/family.c b/hw/bsp/gd32vf103/family.c
index c1dc82bda..8f82b3ada 100644
--- a/hw/bsp/gd32vf103/family.c
+++ b/hw/bsp/gd32vf103/family.c
@@ -174,7 +174,7 @@ int board_uart_write(void const* buf, int len) {
 #else
   (void)buf;
   (void)len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/kinetis_k/family.c b/hw/bsp/kinetis_k/family.c
index 8efab2762..a5af83931 100644
--- a/hw/bsp/kinetis_k/family.c
+++ b/hw/bsp/kinetis_k/family.c
@@ -140,7 +140,7 @@ int board_uart_write(void const *buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/mm32/family.c b/hw/bsp/mm32/family.c
index 14a17f6c5..1538181dc 100644
--- a/hw/bsp/mm32/family.c
+++ b/hw/bsp/mm32/family.c
@@ -167,7 +167,7 @@ int board_uart_write(void const* buf, int len) {
   #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
   #endif
 }
 
diff --git a/hw/bsp/pic32mz/family.c b/hw/bsp/pic32mz/family.c
index 5805e653f..98038b4f7 100644
--- a/hw/bsp/pic32mz/family.c
+++ b/hw/bsp/pic32mz/family.c
@@ -102,7 +102,9 @@ TU_ATTR_WEAK int board_uart_read(uint8_t * buf, int len)
 TU_ATTR_WEAK int board_uart_write(void const * buf, int len)
 {
   (void) buf;
-  return len;
+  (void) len;
+
+  return -1;
 }
 
 #if CFG_TUSB_OS  == OPT_OS_NONE
diff --git a/hw/bsp/rp2040/family.c b/hw/bsp/rp2040/family.c
index a4642face..55feec159 100644
--- a/hw/bsp/rp2040/family.c
+++ b/hw/bsp/rp2040/family.c
@@ -282,7 +282,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32c0/family.c b/hw/bsp/stm32c0/family.c
index 72af3ce7f..ac37045fb 100644
--- a/hw/bsp/stm32c0/family.c
+++ b/hw/bsp/stm32c0/family.c
@@ -193,7 +193,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f0/family.c b/hw/bsp/stm32f0/family.c
index f413163e5..c77ef4008 100644
--- a/hw/bsp/stm32f0/family.c
+++ b/hw/bsp/stm32f0/family.c
@@ -206,7 +206,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index 74e0f53f2..abde44d21 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -246,7 +246,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f2/family.c b/hw/bsp/stm32f2/family.c
index 051a026c5..260e5e067 100644
--- a/hw/bsp/stm32f2/family.c
+++ b/hw/bsp/stm32f2/family.c
@@ -210,7 +210,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index 0864d0fad..35e1852e8 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -222,7 +222,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index f4ef99150..4eea5c7a8 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -295,7 +295,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 078e372d8..7a322591b 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -357,7 +357,7 @@ int board_uart_write(const void *buf, int len) {
 #else
   (void)buf;
   (void)len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32g0/family.c b/hw/bsp/stm32g0/family.c
index d0ff8bac2..cb674ccc9 100644
--- a/hw/bsp/stm32g0/family.c
+++ b/hw/bsp/stm32g0/family.c
@@ -206,7 +206,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 98739ffd5..433f74e2a 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -236,7 +236,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32h5/family.c b/hw/bsp/stm32h5/family.c
index 8298dfaab..f52f94f32 100644
--- a/hw/bsp/stm32h5/family.c
+++ b/hw/bsp/stm32h5/family.c
@@ -238,7 +238,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32h7/family.c b/hw/bsp/stm32h7/family.c
index b32f73754..5173c5401 100644
--- a/hw/bsp/stm32h7/family.c
+++ b/hw/bsp/stm32h7/family.c
@@ -328,7 +328,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32h7rs/family.c b/hw/bsp/stm32h7rs/family.c
index 7ae9e5532..b0841c947 100644
--- a/hw/bsp/stm32h7rs/family.c
+++ b/hw/bsp/stm32h7rs/family.c
@@ -490,7 +490,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32l0/family.c b/hw/bsp/stm32l0/family.c
index 930fa2d66..a4a0ebbfe 100644
--- a/hw/bsp/stm32l0/family.c
+++ b/hw/bsp/stm32l0/family.c
@@ -176,7 +176,7 @@ int board_uart_write(void const* buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32l4/family.c b/hw/bsp/stm32l4/family.c
index 7a8acb3de..96de82bd5 100644
--- a/hw/bsp/stm32l4/family.c
+++ b/hw/bsp/stm32l4/family.c
@@ -264,7 +264,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32n6/family.c b/hw/bsp/stm32n6/family.c
index 95578af04..80de20c6a 100644
--- a/hw/bsp/stm32n6/family.c
+++ b/hw/bsp/stm32n6/family.c
@@ -388,7 +388,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index 5cf6e1eb2..7bd99fba6 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -199,7 +199,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32u5/family.c b/hw/bsp/stm32u5/family.c
index 41e354351..7969b1c70 100644
--- a/hw/bsp/stm32u5/family.c
+++ b/hw/bsp/stm32u5/family.c
@@ -304,7 +304,7 @@ int board_uart_write(void const *buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/stm32wb/family.c b/hw/bsp/stm32wb/family.c
index d97be2115..1f1da2271 100644
--- a/hw/bsp/stm32wb/family.c
+++ b/hw/bsp/stm32wb/family.c
@@ -196,7 +196,7 @@ int board_uart_write(void const* buf, int len) {
   return count;
 #else
   (void) buf; (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
diff --git a/hw/bsp/xmc4000/family.c b/hw/bsp/xmc4000/family.c
index 1325b784b..7e224d092 100644
--- a/hw/bsp/xmc4000/family.c
+++ b/hw/bsp/xmc4000/family.c
@@ -150,7 +150,7 @@ int board_uart_write(void const* buf, int len) {
 #else
   (void) buf;
   (void) len;
-  return 0;
+  return -1;
 #endif
 }
 
-- 
cgit v1.3.1


From 4e7db9c60d9ff77b3e0de14ecdfeb372813c46b7 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 29 Apr 2026 22:11:36 +0200
Subject: fixup

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/board.c        | 2 +-
 hw/bsp/ft9xx/family.c | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/board.c b/hw/bsp/board.c
index 65b44e5f2..5093382d9 100644
--- a/hw/bsp/board.c
+++ b/hw/bsp/board.c
@@ -171,7 +171,7 @@ int board_getchar(void) {
 }
 
 int board_putchar(int c) {
-  if (board_uart_write((const char *)&c, 1)) {
+  if (board_uart_write((const char *)&c, 1) > 0) {
     return c;
   } else {
     return -1;
diff --git a/hw/bsp/ft9xx/family.c b/hw/bsp/ft9xx/family.c
index a1c50e1b7..0ca2663ac 100644
--- a/hw/bsp/ft9xx/family.c
+++ b/hw/bsp/ft9xx/family.c
@@ -221,8 +221,8 @@ int board_uart_read(uint8_t *buf, int len)
 // Send characters to UART
 int board_uart_write(void const *buf, int len)
 {
-    int count = 0;
 #ifdef BOARD_UART
+    int count = 0;
     uint8_t const *p = (uint8_t const *) buf;
     while (count < len) {
         if (BOARD_UART->LSR_ICR_XON2 & MASK_UART_LSR_THRE) {
-- 
cgit v1.3.1


From 076fd79b4c16b7435060585c0337bc69133e073f Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 4 May 2026 22:13:14 +0700
Subject: Adjust RAM configuration for nrf54h20 to optimize memory usage in
 video examples

---
 hw/bsp/nrf/boards/nrf54h20dk/board.cmake  | 3 ++-
 hw/bsp/nrf/boards/nrf54h20dk/board.mk     | 5 +++++
 hw/bsp/nrf/boards/nrf54lm20dk/board.cmake | 5 ++---
 3 files changed, 9 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.cmake b/hw/bsp/nrf/boards/nrf54h20dk/board.cmake
index fca7a56d2..8095b59fe 100644
--- a/hw/bsp/nrf/boards/nrf54h20dk/board.cmake
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.cmake
@@ -1,7 +1,8 @@
 set(MCU_VARIANT nrf54h20)
 
 function(update_board TARGET)
-  # temporarily, 54h20 has multiple sram sections
+  # 32 KB primary RAM is too tight for memory-heavy examples (e.g. video YUY2
+  # framebuf). TODO: route static .bss to RAM00 (512 KB) and drop this.
   target_compile_definitions(${TARGET} PUBLIC
     CFG_EXAMPLE_VIDEO_READONLY
     )
diff --git a/hw/bsp/nrf/boards/nrf54h20dk/board.mk b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
index c49b605e8..3333a76f1 100644
--- a/hw/bsp/nrf/boards/nrf54h20dk/board.mk
+++ b/hw/bsp/nrf/boards/nrf54h20dk/board.mk
@@ -1,6 +1,11 @@
 MCU_VARIANT = nrf54h20
 CFLAGS += -DNRF54H20_XXAA
 
+# 32 KB primary RAM is too tight for memory-heavy examples (e.g. video YUY2
+# framebuf). Match the CMake build (board.cmake) — TODO: route static .bss to
+# RAM00 (512 KB) and drop this.
+CFLAGS += -DCFG_EXAMPLE_VIDEO_READONLY
+
 # enable max3421 host driver for this board
 MAX3421_HOST = 1
 
diff --git a/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
index 8c2b83346..e97b8822c 100644
--- a/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
+++ b/hw/bsp/nrf/boards/nrf54lm20dk/board.cmake
@@ -2,7 +2,6 @@ set(MCU_VARIANT nrf54lm20a_enga)
 set(JLINK_DEVICE NRF54LM20A_M33)
 
 function(update_board TARGET)
-  target_compile_definitions(${TARGET} PUBLIC
-    CFG_EXAMPLE_VIDEO_READONLY
-    )
+  # No board-specific overrides needed — primary 256 KB RAM is plenty for
+  # memory-heavy examples (video YUY2 framebuf etc.).
 endfunction()
-- 
cgit v1.3.1


From 216d7c43f1ea7cf3ae3fe667bdf725631596f17d Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 8 May 2026 18:16:04 +0200
Subject: lpc55 works with net_lwip

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/device/net_lwip_webserver/skip.txt     | 2 +-
 hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake | 1 -
 2 files changed, 1 insertion(+), 2 deletions(-)

(limited to 'hw')

diff --git a/examples/device/net_lwip_webserver/skip.txt b/examples/device/net_lwip_webserver/skip.txt
index ecb9eb7ec..5e5562087 100644
--- a/examples/device/net_lwip_webserver/skip.txt
+++ b/examples/device/net_lwip_webserver/skip.txt
@@ -19,6 +19,6 @@ board:at_start_f425
 board:curiosity_nano
 board:frdm_kl25z
 # lpc55 has weird error 'ncm_interface' causes a section type conflict with 'ntb_parameters'
-family:lpc55
+#family:lpc55
 family:nuc126
 family:nuc100_120
diff --git a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
index 59f7d6329..ef20d7601 100644
--- a/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
+++ b/hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake
@@ -2,7 +2,6 @@ set(MCU_VARIANT LPC55S69)
 set(MCU_CORE LPC55S69_cm33_core0)
 
 set(JLINK_DEVICE LPC55S69_M33_0)
-set(JLINK_OPTION "-USB 000727648789")
 
 set(PYOCD_TARGET LPC55S69)
 set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
-- 
cgit v1.3.1


From 040ee395d4f7287c434bfb371c31370a091a33e2 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 8 May 2026 18:37:45 +0200
Subject: reduce NTM size

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/device/net_lwip_webserver/src/tusb_config.h | 2 +-
 hw/bsp/imxrt/boards/metro_m7_1011/board.cmake        | 1 +
 hw/bsp/imxrt/boards/metro_m7_1011/board.mk           | 2 +-
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake       | 1 +
 hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk          | 2 +-
 hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake       | 1 +
 hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk          | 2 +-
 7 files changed, 7 insertions(+), 4 deletions(-)

(limited to 'hw')

diff --git a/examples/device/net_lwip_webserver/src/tusb_config.h b/examples/device/net_lwip_webserver/src/tusb_config.h
index 74ffeb469..aff75866d 100644
--- a/examples/device/net_lwip_webserver/src/tusb_config.h
+++ b/examples/device/net_lwip_webserver/src/tusb_config.h
@@ -124,7 +124,7 @@ extern "C" {
 #define CFG_TUD_NCM_IN_NTB_MAX_SIZE 2048
 
 #if LWIP_HIGH_THROUGHPUT
-  #define CFG_TUD_NCM_OUT_NTB_MAX_SIZE 6144
+  #define CFG_TUD_NCM_OUT_NTB_MAX_SIZE 4096
 #else
   #define CFG_TUD_NCM_OUT_NTB_MAX_SIZE 2048
 #endif
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
index 63b2a120a..5edf6cc91 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.cmake
@@ -12,5 +12,6 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_MIMXRT1011DAE5A
     CFG_EXAMPLE_VIDEO_READONLY
+    LWIP_HIGH_THROUGHPUT=0
     )
 endfunction()
diff --git a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
index 229b5c18c..fadb760b3 100644
--- a/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
+++ b/hw/bsp/imxrt/boards/metro_m7_1011/board.mk
@@ -1,4 +1,4 @@
-CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
+CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY -DLWIP_HIGH_THROUGHPUT=0
 MCU_FAMILY = RT1010
 MCU_VARIANT = MIMXRT1011
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
index 63b2a120a..5edf6cc91 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.cmake
@@ -12,5 +12,6 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_MIMXRT1011DAE5A
     CFG_EXAMPLE_VIDEO_READONLY
+    LWIP_HIGH_THROUGHPUT=0
     )
 endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
index c5521faf5..81ec74d70 100644
--- a/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1010_evk/board.mk
@@ -1,4 +1,4 @@
-CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY
+CFLAGS += -DCPU_MIMXRT1011DAE5A -DCFG_EXAMPLE_VIDEO_READONLY -DLWIP_HIGH_THROUGHPUT=0
 MCU_FAMILY = RT1010
 MCU_VARIANT = MIMXRT1011
 
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
index 5661bb3e6..fe74b8d33 100644
--- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.cmake
@@ -12,5 +12,6 @@ function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
     CPU_MIMXRT1015DAF5A
     CFG_EXAMPLE_VIDEO_READONLY
+    LWIP_HIGH_THROUGHPUT=0
     )
 endfunction()
diff --git a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
index 062929902..a84263a81 100644
--- a/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
+++ b/hw/bsp/imxrt/boards/mimxrt1015_evk/board.mk
@@ -1,4 +1,4 @@
-CFLAGS += -DCPU_MIMXRT1015DAF5A -DCFG_EXAMPLE_VIDEO_READONLY
+CFLAGS += -DCPU_MIMXRT1015DAF5A -DCFG_EXAMPLE_VIDEO_READONLY -DLWIP_HIGH_THROUGHPUT=0
 MCU_FAMILY = RT1015
 MCU_VARIANT = MIMXRT1015
 
-- 
cgit v1.3.1


From 5ea1979e290ed80430a5b65b56534373ecbdd56f Mon Sep 17 00:00:00 2001
From: HiFiPHile <admin@hifiphile.com>
Date: Sun, 10 May 2026 01:47:21 +0200
Subject: add stm32c5 support

Signed-off-by: HiFiPHile <admin@hifiphile.com>
---
 .github/workflows/ci_set_matrix.py                 |   1 +
 README.rst                                         |   2 +-
 docs/reference/boards.rst                          |   1 +
 docs/reference/dependencies.rst                    |   4 +-
 .../device/cdc_msc_throughput/CMakePresets.json    |   6 +
 examples/device/printer_to_cdc/CMakePresets.json   |   6 +
 examples/dual/dynamic_switch/only.txt              |   1 +
 examples/host/bare_api/only.txt                    |   1 +
 examples/host/cdc_msc_hid/only.txt                 |   1 +
 examples/host/cdc_msc_hid_freertos/only.txt        |   1 +
 examples/host/device_info/only.txt                 |   1 +
 examples/host/midi_rx/only.txt                     |   1 +
 examples/host/msc_file_explorer/only.txt           |   1 +
 hw/bsp/BoardPresets.json                           |  22 +
 hw/bsp/stm32c5/FreeRTOSConfig/FreeRTOSConfig.h     | 165 +++++
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake  |  13 +
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.h      |  83 +++
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk     |  13 +
 hw/bsp/stm32c5/family.c                            | 237 +++++++
 hw/bsp/stm32c5/family.cmake                        | 111 ++++
 hw/bsp/stm32c5/family.mk                           |  52 ++
 hw/bsp/stm32c5/stm32c5xx_hal_conf.h                | 684 +++++++++++++++++++++
 src/common/tusb_mcu.h                              |   6 +
 src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c      |   1 +
 src/portable/st/stm32_fsdev/fsdev_stm32.h          |   8 +-
 src/tusb_option.h                                  |   1 +
 tools/get_deps.py                                  |   8 +-
 27 files changed, 1427 insertions(+), 4 deletions(-)
 create mode 100644 examples/device/cdc_msc_throughput/CMakePresets.json
 create mode 100644 examples/device/printer_to_cdc/CMakePresets.json
 create mode 100644 hw/bsp/stm32c5/FreeRTOSConfig/FreeRTOSConfig.h
 create mode 100644 hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
 create mode 100644 hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
 create mode 100644 hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
 create mode 100644 hw/bsp/stm32c5/family.c
 create mode 100644 hw/bsp/stm32c5/family.cmake
 create mode 100644 hw/bsp/stm32c5/family.mk
 create mode 100644 hw/bsp/stm32c5/stm32c5xx_hal_conf.h

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 1d35f15dd..f4d25fd37 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -68,6 +68,7 @@ family_list = {
     "samd5x_e5x": ["arm-gcc", "arm-clang"],
     "samg": ["arm-gcc", "arm-clang"],
     "stm32c0": ["arm-gcc", "arm-clang", "arm-iar"],
+    "stm32c5": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f0": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f1": ["arm-gcc", "arm-clang", "arm-iar"],
     "stm32f2": ["arm-gcc", "arm-clang", "arm-iar"],
diff --git a/README.rst b/README.rst
index 04998abaa..1c56a6ba0 100644
--- a/README.rst
+++ b/README.rst
@@ -238,7 +238,7 @@ Supported CPUs
 |              +----+------------------------+--------+------+-----------+------------------------+--------------------+
 |              | F2, F4, F7, H7, H7RS        | ✔      | ✔    | ✔         | dwc2                   |                    |
 |              +-----------------------------+--------+------+-----------+------------------------+--------------------+
-|              | C0, G0, H5, U3              | ✔      | ✔    | ✖         | stm32_fsdev            | 2KB USB RAM        |
+|              | C0, C5, G0, H5, U3          | ✔      | ✔    | ✖         | stm32_fsdev            | 2KB USB RAM        |
 |              +-----------------------------+--------+------+-----------+------------------------+--------------------+
 |              | G4                          | ✔      | ✖    | ✖         | stm32_fsdev            | 1KB USB RAM        |
 |              +----+------------------------+--------+------+-----------+------------------------+--------------------+
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index e61c4f98b..b0e8bffaa 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -266,6 +266,7 @@ STMicroelectronics
 Board                Name                               Family     URL                                                                Note
 ===================  =================================  =========  =================================================================  ======
 stm32c071nucleo      STM32C071 Nucleo                   stm32c0    https://www.st.com/en/evaluation-tools/nucleo-c071rb.html
+stm32c542nucleo      STM32C542 Nucleo                   stm32c5    https://www.st.com/en/evaluation-tools/nucleo-c542rc.html
 stm32f070rbnucleo    STM32 F070 Nucleo                  stm32f0    https://www.st.com/en/evaluation-tools/nucleo-f070rb.html
 stm32f072disco       STM32 F072 Discovery               stm32f0    https://www.st.com/en/evaluation-tools/32f072bdiscovery.html
 stm32f072eval        STM32 F072 Eval                    stm32f0    https://www.st.com/en/evaluation-tools/stm32072b-eval.html
diff --git a/docs/reference/dependencies.rst b/docs/reference/dependencies.rst
index c5b755577..d281e912a 100644
--- a/docs/reference/dependencies.rst
+++ b/docs/reference/dependencies.rst
@@ -59,6 +59,7 @@ hw/mcu/st/cmsis_device_l5                 https://github.com/STMicroelectronics/
 hw/mcu/st/cmsis_device_n6                 https://github.com/STMicroelectronics/cmsis-device-n6.git         7bcdc944fbf7cf5928d3c1d14054ca13261d33ec  stm32n6
 hw/mcu/st/cmsis_device_u5                 https://github.com/STMicroelectronics/cmsis_device_u5.git         6e67187dec98035893692ab2923914cb5f4e0117  stm32u5
 hw/mcu/st/cmsis_device_wb                 https://github.com/STMicroelectronics/cmsis_device_wb.git         cda2cb9fc4a5232ab18efece0bb06b0b60910083  stm32wb
+hw/mcu/st/stm32c5xx-dfp                   https://github.com/STMicroelectronics/stm32c5xx-dfp.git           6d0940882511d9430f83af9bd3da6bcb77f79239  stm32c5
 hw/mcu/st/stm32-mfxstm32l152              https://github.com/STMicroelectronics/stm32-mfxstm32l152.git      7f4389efee9c6a655b55e5df3fceef5586b35f9b  stm32h7
 hw/mcu/st/stm32-tcpp0203                  https://github.com/STMicroelectronics/stm32-tcpp0203.git          9918655bff176ac3046ccf378b5c7bbbc6a38d15  stm32h5 stm32h7rs stm32n6
 hw/mcu/st/stm32c0xx_hal_driver            https://github.com/STMicroelectronics/stm32c0xx_hal_driver.git    c283b143bef6bdaacf64240ee6f15eb61dad6125  stm32c0
@@ -82,13 +83,14 @@ hw/mcu/st/stm32u0xx_hal_driver            https://github.com/STMicroelectronics/
 hw/mcu/st/stm32u5xx_hal_driver            https://github.com/STMicroelectronics/stm32u5xx_hal_driver.git    2c5e2568fbdb1900a13ca3b2901fdd302cac3444  stm32u5
 hw/mcu/st/stm32wbaxx_hal_driver           https://github.com/STMicroelectronics/stm32wbaxx_hal_driver.git   9442fbb71f855ff2e64fbf662b7726beba511a24  stm32wba
 hw/mcu/st/stm32wbxx_hal_driver            https://github.com/STMicroelectronics/stm32wbxx_hal_driver.git    d60dd46996876506f1d2e9abd6b1cc110c8004cd  stm32wb
+hw/mcu/st/stm32c5xx-drivers               https://github.com/STMicroelectronics/stm32c5xx-drivers.git       79b901285a7efeaf87c4c25db81d24cb5d8c9465  stm32c5
 hw/mcu/ti                                 https://github.com/hathach/ti_driver.git                          083944907e7d08fcb1f614b47598ce45935b8da1  msp430 msp432e4 tm4c
 hw/mcu/wch/ch32f20x                       https://github.com/openwch/ch32f20x.git                           77c4095087e5ed2c548ec9058e655d0b8757663b  ch32f20x
 hw/mcu/wch/ch32v103                       https://github.com/openwch/ch32v103.git                           7578cae0b21f86dd053a1f781b2fc6ab99d0ec17  ch32v10x
 hw/mcu/wch/ch32v20x                       https://github.com/openwch/ch32v20x.git                           c4c38f507e258a4e69b059ccc2dc27dde33cea1b  ch32v20x
 hw/mcu/wch/ch32v307                       https://github.com/openwch/ch32v307.git                           184f21b852cb95eed58e86e901837bc9fff68775  ch32v30x
 lib/CMSIS_5                               https://github.com/ARM-software/CMSIS_5.git                       2b7495b8535bdcb306dac29b9ded4cfb679d7e5c  kinetis_k kinetis_kl lpc54 rw61x mm32 msp432e4 nrf samd2x_l2x lpc11 lpc13 lpc15 lpc17 lpc18 lpc40 lpc43 stm32c0 stm32f0 stm32f1 stm32f2 stm32f3 stm32f4 stm32f7 stm32g0 stm32g4 stm32h5 stm32h7 stm32h7rs stm32l0 stm32l1 stm32l4 stm32l5 stm32u0 stm32u5 stm32wb stm32wba sam3x samd11 samd21 samd51 samd5x_e5x same5x same7x samg tm4c
-lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx
+lib/CMSIS_6                               https://github.com/ARM-software/CMSIS_6.git                       6f0a58d01aa9bd2feba212097f9afe7acd991d52  imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx stm32c5
 lib/FreeRTOS-Kernel                       https://github.com/FreeRTOS/FreeRTOS-Kernel.git                   cc0e0707c0c748713485b870bb980852b210877f  all
 lib/lwip                                  https://github.com/lwip-tcpip/lwip.git                            159e31b689577dbf69cf0683bbaffbd71fa5ee10  all
 lib/sct_neopixel                          https://github.com/gsteiert/sct_neopixel.git                      e73e04ca63495672d955f9268e003cffe168fcd8  lpc55
diff --git a/examples/device/cdc_msc_throughput/CMakePresets.json b/examples/device/cdc_msc_throughput/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/cdc_msc_throughput/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/device/printer_to_cdc/CMakePresets.json b/examples/device/printer_to_cdc/CMakePresets.json
new file mode 100644
index 000000000..5cd8971e9
--- /dev/null
+++ b/examples/device/printer_to_cdc/CMakePresets.json
@@ -0,0 +1,6 @@
+{
+  "version": 6,
+  "include": [
+    "../../../hw/bsp/BoardPresets.json"
+  ]
+}
diff --git a/examples/dual/dynamic_switch/only.txt b/examples/dual/dynamic_switch/only.txt
index 70be49b28..e1038f9d4 100644
--- a/examples/dual/dynamic_switch/only.txt
+++ b/examples/dual/dynamic_switch/only.txt
@@ -2,6 +2,7 @@ family:espressif
 mcu:LPC43XX
 mcu:MIMXRT1XXX
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32G0
 mcu:STM32H5
 mcu:STM32F2
diff --git a/examples/host/bare_api/only.txt b/examples/host/bare_api/only.txt
index 1ddfc2b5c..a2ff93be5 100644
--- a/examples/host/bare_api/only.txt
+++ b/examples/host/bare_api/only.txt
@@ -20,6 +20,7 @@ mcu:RP2040
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/examples/host/cdc_msc_hid/only.txt b/examples/host/cdc_msc_hid/only.txt
index 1ddfc2b5c..a2ff93be5 100644
--- a/examples/host/cdc_msc_hid/only.txt
+++ b/examples/host/cdc_msc_hid/only.txt
@@ -20,6 +20,7 @@ mcu:RP2040
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/examples/host/cdc_msc_hid_freertos/only.txt b/examples/host/cdc_msc_hid_freertos/only.txt
index 753fa7cd3..4ab8a906e 100644
--- a/examples/host/cdc_msc_hid_freertos/only.txt
+++ b/examples/host/cdc_msc_hid_freertos/only.txt
@@ -16,6 +16,7 @@ mcu:MSP432E4
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/examples/host/device_info/only.txt b/examples/host/device_info/only.txt
index 742935dcf..4c2cb0f35 100644
--- a/examples/host/device_info/only.txt
+++ b/examples/host/device_info/only.txt
@@ -21,6 +21,7 @@ mcu:RP2040
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/examples/host/midi_rx/only.txt b/examples/host/midi_rx/only.txt
index c71aacd87..65ef8fac9 100644
--- a/examples/host/midi_rx/only.txt
+++ b/examples/host/midi_rx/only.txt
@@ -23,6 +23,7 @@ mcu:RP2040
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/examples/host/msc_file_explorer/only.txt b/examples/host/msc_file_explorer/only.txt
index 1ddfc2b5c..a2ff93be5 100644
--- a/examples/host/msc_file_explorer/only.txt
+++ b/examples/host/msc_file_explorer/only.txt
@@ -20,6 +20,7 @@ mcu:RP2040
 mcu:RW61X
 mcu:RX65X
 mcu:STM32C0
+mcu:STM32C5
 mcu:STM32F4
 mcu:STM32F7
 mcu:STM32G0
diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 86609d075..1ff29f99d 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -626,6 +626,10 @@
       "name": "stm32c071nucleo",
       "inherits": "default"
     },
+    {
+      "name": "stm32c542nucleo",
+      "inherits": "default"
+    },
     {
       "name": "stm32f070rbnucleo",
       "inherits": "default"
@@ -1762,6 +1766,11 @@
       "description": "Build preset for the stm32c071nucleo board",
       "configurePreset": "stm32c071nucleo"
     },
+    {
+      "name": "stm32c542nucleo",
+      "description": "Build preset for the stm32c542nucleo board",
+      "configurePreset": "stm32c542nucleo"
+    },
     {
       "name": "stm32f070rbnucleo",
       "description": "Build preset for the stm32f070rbnucleo board",
@@ -4227,6 +4236,19 @@
         }
       ]
     },
+    {
+      "name": "stm32c542nucleo",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "stm32c542nucleo"
+        },
+        {
+          "type": "build",
+          "name": "stm32c542nucleo"
+        }
+      ]
+    },
     {
       "name": "stm32f070rbnucleo",
       "steps": [
diff --git a/hw/bsp/stm32c5/FreeRTOSConfig/FreeRTOSConfig.h b/hw/bsp/stm32c5/FreeRTOSConfig/FreeRTOSConfig.h
new file mode 100644
index 000000000..732d9a5cf
--- /dev/null
+++ b/hw/bsp/stm32c5/FreeRTOSConfig/FreeRTOSConfig.h
@@ -0,0 +1,165 @@
+/*
+ * FreeRTOS Kernel V10.0.0
+ * Copyright (C) 2017 Amazon.com, Inc. or its affiliates.  All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy of
+ * this software and associated documentation files (the "Software"), to deal in
+ * the Software without restriction, including without limitation the rights to
+ * use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
+ * the Software, and to permit persons to whom the Software is furnished to do so,
+ * subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in all
+ * copies or substantial portions of the Software. If you wish to use our Amazon
+ * FreeRTOS name, please do so in a fair use way that does not cause confusion.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
+ * FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
+ * COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * http://www.FreeRTOS.org
+ * http://aws.amazon.com/freertos
+ *
+ * 1 tab == 4 spaces!
+ */
+
+
+#ifndef FREERTOS_CONFIG_H
+#define FREERTOS_CONFIG_H
+
+/*-----------------------------------------------------------
+ * Application specific definitions.
+ *
+ * These definitions should be adjusted for your particular hardware and
+ * application requirements.
+ *
+ * THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
+ * FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
+ *
+ * See http://www.freertos.org/a00110.html.
+ *----------------------------------------------------------*/
+
+// skip if included from IAR assembler
+#ifndef __IASMARM__
+  #include "stm32c5xx.h"
+#endif
+
+/* Cortex M23/M33 port configuration. */
+#define configENABLE_MPU                        0
+#define configENABLE_FPU                        1
+#define configENABLE_TRUSTZONE                  0
+#define configMINIMAL_SECURE_STACK_SIZE         (1024)
+
+#define configUSE_PREEMPTION                    1
+#define configUSE_PORT_OPTIMISED_TASK_SELECTION 0
+#define configCPU_CLOCK_HZ                      SystemCoreClock
+#define configTICK_RATE_HZ                      ( 1000 )
+#define configMAX_PRIORITIES                    ( 5 )
+#define configMINIMAL_STACK_SIZE                ( 200 )
+#define configTOTAL_HEAP_SIZE                   ( configSUPPORT_DYNAMIC_ALLOCATION*4*1024 )
+#define configMAX_TASK_NAME_LEN                 16
+#define configUSE_16_BIT_TICKS                  0
+#define configIDLE_SHOULD_YIELD                 1
+#define configUSE_MUTEXES                       1
+#define configUSE_RECURSIVE_MUTEXES             1
+#define configUSE_COUNTING_SEMAPHORES           1
+#define configQUEUE_REGISTRY_SIZE               4
+#define configUSE_QUEUE_SETS                    0
+#define configUSE_TIME_SLICING                  0
+#define configUSE_NEWLIB_REENTRANT              0
+#define configENABLE_BACKWARD_COMPATIBILITY     1
+#define configSTACK_ALLOCATION_FROM_SEPARATE_HEAP   0
+
+#define configSUPPORT_STATIC_ALLOCATION         1
+#define configSUPPORT_DYNAMIC_ALLOCATION        0
+
+/* Hook function related definitions. */
+#define configUSE_IDLE_HOOK                    0
+#define configUSE_TICK_HOOK                    0
+#define configUSE_MALLOC_FAILED_HOOK           0 // cause nested extern warning
+#define configCHECK_FOR_STACK_OVERFLOW         2
+#define configCHECK_HANDLER_INSTALLATION       0
+
+/* Run time and task stats gathering related definitions. */
+#define configGENERATE_RUN_TIME_STATS          0
+#define configRECORD_STACK_HIGH_ADDRESS        1
+#define configUSE_TRACE_FACILITY               1 // legacy trace
+#define configUSE_STATS_FORMATTING_FUNCTIONS   0
+
+/* Co-routine definitions. */
+#define configUSE_CO_ROUTINES                  0
+#define configMAX_CO_ROUTINE_PRIORITIES        2
+
+/* Software timer related definitions. */
+#define configUSE_TIMERS                       1
+#define configTIMER_TASK_PRIORITY              (configMAX_PRIORITIES-2)
+#define configTIMER_QUEUE_LENGTH               32
+#define configTIMER_TASK_STACK_DEPTH           configMINIMAL_STACK_SIZE
+
+/* Optional functions - most linkers will remove unused functions anyway. */
+#define INCLUDE_vTaskPrioritySet               0
+#define INCLUDE_uxTaskPriorityGet              0
+#define INCLUDE_vTaskDelete                    0
+#define INCLUDE_vTaskSuspend                   1 // required for queue, semaphore, mutex to be blocked indefinitely with portMAX_DELAY
+#define INCLUDE_xResumeFromISR                 0
+#define INCLUDE_vTaskDelayUntil                1
+#define INCLUDE_vTaskDelay                     1
+#define INCLUDE_xTaskGetSchedulerState         0
+#define INCLUDE_xTaskGetCurrentTaskHandle      1
+#define INCLUDE_uxTaskGetStackHighWaterMark    0
+#define INCLUDE_xTaskGetIdleTaskHandle         0
+#define INCLUDE_xTimerGetTimerDaemonTaskHandle 0
+#define INCLUDE_pcTaskGetTaskName              0
+#define INCLUDE_eTaskGetState                  0
+#define INCLUDE_xEventGroupSetBitFromISR       0
+#define INCLUDE_xTimerPendFunctionCall         0
+
+/* Define to trap errors during development. */
+// Halt CPU (breakpoint) when hitting error, only apply for Cortex M3, M4, M7
+#if defined(__ARM_ARCH_7M__) || defined (__ARM_ARCH_7EM__) || defined(__ARM_ARCH_8M_MAIN__) || defined(__ARM_ARCH_8_1M_MAIN__) || \
+    defined(__ARM7M__) || defined (__ARM7EM__) || defined(__ARM8M_MAINLINE__) || defined(__ARM8EM_MAINLINE__)
+  #define configASSERT(_exp) \
+    do {\
+      if ( !(_exp) ) { \
+        volatile uint32_t* ARM_CM_DHCSR =  ((volatile uint32_t*) 0xE000EDF0UL); /* Cortex M CoreDebug->DHCSR */ \
+        if ( (*ARM_CM_DHCSR) & 1UL ) {  /* Only halt mcu if debugger is attached */ \
+          taskDISABLE_INTERRUPTS(); \
+           __asm("BKPT #0\n"); \
+        }\
+      }\
+    } while(0)
+#endif
+
+/* FreeRTOS hooks to NVIC vectors */
+#define xPortPendSVHandler    PendSV_Handler
+#define xPortSysTickHandler   SysTick_Handler
+#define vPortSVCHandler       SVC_Handler
+
+//--------------------------------------------------------------------+
+// Interrupt nesting behavior configuration.
+//--------------------------------------------------------------------+
+
+// For Cortex-M specific: __NVIC_PRIO_BITS is defined in mcu header
+#define configPRIO_BITS       4
+
+/* The lowest interrupt priority that can be used in a call to a "set priority" function. */
+#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY       ((1<<configPRIO_BITS) - 1)
+
+/* The highest interrupt priority that can be used by any interrupt service
+routine that makes calls to interrupt safe FreeRTOS API functions.  DO NOT CALL
+INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
+PRIORITY THAN THIS! (higher priorities are lower numeric values. */
+#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY  2
+
+/* Interrupt priorities used by the kernel port layer itself.  These are generic
+to all Cortex-M ports, and do not rely on any particular library functions. */
+#define configKERNEL_INTERRUPT_PRIORITY               ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
+See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
+#define configMAX_SYSCALL_INTERRUPT_PRIORITY          ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
+
+#endif
diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
new file mode 100644
index 000000000..456cf8e79
--- /dev/null
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
@@ -0,0 +1,13 @@
+set(MCU_VARIANT stm32c542xx)
+set(JLINK_DEVICE stm32c542rc)
+
+set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/stm32c542xc_flash.ld)
+set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32c542xc_flash.icf)
+
+function(update_board TARGET)
+  target_compile_definitions(${TARGET} PUBLIC
+    STM32C542xx
+    HSE_VALUE=24000000
+    HSE_STARTUP_TIMEOUT=100
+    )
+endfunction()
diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
new file mode 100644
index 000000000..d7e5e7e13
--- /dev/null
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
@@ -0,0 +1,83 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026, HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: STM32C542 Nucleo
+   url: https://www.st.com/en/evaluation-tools/nucleo-c542rc.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+// LED
+#define LED_PORT         HAL_GPIOA
+#define LED_PIN          HAL_GPIO_PIN_5
+
+// Button
+#define BUTTON_PORT           HAL_GPIOC
+#define BUTTON_PIN            HAL_GPIO_PIN_13
+#define BUTTON_STATE_ACTIVE   0
+
+// Enable UART serial communication with the ST-Link
+#define UART_ID               2
+#define UART_GPIO_PORT        HAL_GPIOA
+#define UART_GPIO_AF          HAL_GPIO_AF_7
+#define UART_TX_PIN           HAL_GPIO_PIN_2
+#define UART_RX_PIN           HAL_GPIO_PIN_3
+
+static inline void board_clock_init(void) {
+  HAL_RCC_HSE_Enable(HAL_RCC_HSE_ON);
+
+  hal_rcc_psi_config_t config_psi;
+  config_psi.psi_source = HAL_RCC_PSI_SRC_HSE;
+  config_psi.psi_ref = HAL_RCC_PSI_REF_24MHZ;
+  config_psi.psi_out = HAL_RCC_PSI_OUT_144MHZ;
+  HAL_RCC_PSI_SetConfig(&config_psi);
+  HAL_RCC_PSIS_Enable();
+
+  /** Initializes the CPU, AHB and APB busses clocks */
+  hal_rcc_bus_clk_config_t config_bus;
+  config_bus.hclk_prescaler  = HAL_RCC_HCLK_PRESCALER1;
+  config_bus.pclk1_prescaler = HAL_RCC_PCLK_PRESCALER1;
+  config_bus.pclk2_prescaler = HAL_RCC_PCLK_PRESCALER1;
+  config_bus.pclk3_prescaler = HAL_RCC_PCLK_PRESCALER1;
+  HAL_RCC_SetBusClockConfig(&config_bus);
+
+  /** Frequency will be increased */
+  HAL_FLASH_ITF_SetLatency(HAL_FLASH, HAL_FLASH_ITF_LATENCY_4);
+
+  HAL_RCC_SetSYSCLKSource(HAL_RCC_SYSCLK_SRC_PSIS);
+
+  HAL_FLASH_ITF_SetProgrammingDelay(HAL_FLASH, HAL_FLASH_ITF_PROGRAM_DELAY_2);
+
+  HAL_UpdateCoreClock();
+
+  HAL_RCC_USART2_SetKernelClkSource(HAL_RCC_USART2_CLK_SRC_PCLK1);
+
+  HAL_RCC_PSIDIV3_Enable();
+  HAL_RCC_CK48_SetKernelClkSource(HAL_RCC_CK48_CLK_SRC_PSIDIV3);
+}
+#endif /* BOARD_H_ */
diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
new file mode 100644
index 000000000..cea82567b
--- /dev/null
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
@@ -0,0 +1,13 @@
+MCU_VARIANT = stm32c542xx
+
+CFLAGS += \
+	-DSTM32C542xx \
+	-DHSE_VALUE=24000000 \
+	-DHSE_STARTUP_TIMEOUT=100
+
+# GCC
+LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32c542xc_flash.ld
+
+
+# For flash-jlink target
+JLINK_DEVICE = stm32c542rc
diff --git a/hw/bsp/stm32c5/family.c b/hw/bsp/stm32c5/family.c
new file mode 100644
index 000000000..a40a2a4ee
--- /dev/null
+++ b/hw/bsp/stm32c5/family.c
@@ -0,0 +1,237 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2019 Ha Thach (tinyusb.org)
+ * Copyright (c) 2023 HiFiPhile
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: STMicroelectronics
+*/
+
+#include "stm32_hal.h"
+#include "bsp/board_api.h"
+#include "board.h"
+
+#ifdef UART_ID
+  #if UART_ID == 1
+    #define UARTn             HAL_UART1
+    #define UARTn_CLK_ENABLE   HAL_RCC_USART1_EnableClock
+  #elif UART_ID == 2
+    #define UARTn             HAL_UART2
+    #define UARTn_CLK_ENABLE   HAL_RCC_USART2_EnableClock
+  #endif
+#endif
+
+#ifndef UART_GET_INSTANCE
+  #define UART_GET_INSTANCE(handle)   ((USART_TypeDef *)((uint32_t)(handle)->instance))
+#endif
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+void USB_DRD_FS_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+//--------------------------------------------------------------------+
+// MACRO TYPEDEF CONSTANT ENUM
+//--------------------------------------------------------------------+
+#ifdef UART_ID
+static hal_uart_handle_t hUSART;
+#endif
+
+void board_init(void) {
+  HAL_Init();
+  board_clock_init();
+
+  // Enable peripheral clocks.
+  HAL_RCC_GPIOA_EnableClock();
+  HAL_RCC_GPIOB_EnableClock();
+  HAL_RCC_GPIOC_EnableClock();
+  HAL_RCC_GPIOD_EnableClock();
+  HAL_RCC_USB_EnableClock();
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  // 1ms tick timer
+  SysTick_Config(SystemCoreClock / 1000);
+#elif CFG_TUSB_OS == OPT_OS_FREERTOS
+  // Explicitly disable systick to prevent its ISR from running before scheduler start
+  SysTick->CTRL &= ~1U;
+
+  // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
+  NVIC_SetPriority(USB_DRD_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+#endif
+
+  // LED
+  {
+    hal_gpio_config_t gpio_config;
+    gpio_config.mode = HAL_GPIO_MODE_OUTPUT;
+    gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
+    gpio_config.pull = HAL_GPIO_PULL_NO;
+    gpio_config.output_type = HAL_GPIO_OUTPUT_PUSHPULL;
+    gpio_config.init_state = HAL_GPIO_PIN_RESET;
+
+    HAL_GPIO_Init(LED_PORT, LED_PIN, &gpio_config);
+  }
+
+  // Button
+  {
+    hal_gpio_config_t gpio_config;
+    gpio_config.mode = HAL_GPIO_MODE_INPUT;
+    gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
+    gpio_config.pull = BUTTON_STATE_ACTIVE ? HAL_GPIO_PULL_DOWN : HAL_GPIO_PULL_UP;
+    HAL_GPIO_Init(BUTTON_PORT, BUTTON_PIN, &gpio_config);
+  }
+
+#ifdef UART_ID
+  UARTn_CLK_ENABLE();
+  // UART
+  {
+    hal_gpio_config_t  gpio_config;
+    gpio_config.mode = HAL_GPIO_MODE_ALTERNATE;
+    gpio_config.output_type = HAL_GPIO_OUTPUT_PUSHPULL;
+    gpio_config.pull = HAL_GPIO_PULL_NO;
+    gpio_config.speed = HAL_GPIO_SPEED_FREQ_LOW;
+    gpio_config.alternate = UART_GPIO_AF;
+    HAL_GPIO_Init(UART_GPIO_PORT, UART_TX_PIN | UART_RX_PIN, &gpio_config);
+  }
+
+  hal_uart_config_t uart_config;
+  HAL_UART_Init(&hUSART, UARTn);
+  uart_config.baud_rate = 115200;
+  uart_config.clock_prescaler = HAL_UART_PRESCALER_DIV1;
+  uart_config.word_length = HAL_UART_WORD_LENGTH_8_BIT;
+  uart_config.stop_bits = HAL_UART_STOP_BIT_1;
+  uart_config.parity = HAL_UART_PARITY_NONE;
+  uart_config.direction = HAL_UART_DIRECTION_TX_RX;
+  uart_config.hw_flow_ctl = HAL_UART_HW_CONTROL_NONE;
+  uart_config.oversampling = HAL_UART_OVERSAMPLING_16;
+  uart_config.one_bit_sampling = HAL_UART_ONE_BIT_SAMPLE_DISABLE;
+
+  HAL_UART_SetConfig(&hUSART, &uart_config);
+
+  /* Fifo configuration */
+  HAL_UART_SetTxFifoThreshold(&hUSART, HAL_UART_FIFO_THRESHOLD_1_8);
+  HAL_UART_SetRxFifoThreshold(&hUSART, HAL_UART_FIFO_THRESHOLD_1_8);
+  HAL_UART_EnableFifoMode(&hUSART);
+
+  LL_USART_Enable(UART_GET_INSTANCE(&hUSART));
+#endif
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+  hal_gpio_pin_state_t pin_state = state ? HAL_GPIO_PIN_SET : HAL_GPIO_PIN_RESET;
+  HAL_GPIO_WritePin(LED_PORT, LED_PIN, pin_state);
+}
+
+uint32_t board_button_read(void) {
+  return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
+}
+
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t * stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t* id32 = (uint32_t*) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
+int board_uart_read(uint8_t *buf, int len) {
+#ifdef UART_ID
+  int count = 0;
+  while (count < len) {
+    if (LL_USART_IsActiveFlag_RXNE_RXFNE(UART_GET_INSTANCE(&hUSART))) {
+      buf[count] = (uint8_t) UART_GET_INSTANCE(&hUSART)->RDR;
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return -1;
+#endif
+}
+
+int board_uart_write(void const *buf, int len) {
+#ifdef UART_ID
+  const uint8_t *p = (const uint8_t *) buf;
+  int count = 0;
+  while (count < len) {
+    if (LL_USART_IsActiveFlag_TXE_TXFNF(UART_GET_INSTANCE(&hUSART))) {
+      UART_GET_INSTANCE(&hUSART)->TDR = p[count];
+      count++;
+    } else {
+      break;
+    }
+  }
+  return count;
+#else
+  (void) buf; (void) len;
+  return 0;
+#endif
+}
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+void SysTick_Handler(void) {
+  system_ticks++;
+  HAL_IncTick();
+}
+
+uint32_t tusb_time_millis_api(void) {
+  return system_ticks;
+}
+#endif
+
+void HardFault_Handler(void) {
+  __asm("BKPT #0\n");
+}
+
+#ifndef __ICCARM__
+// Implement _start() since we use linker flag '-nostartfiles'.
+extern int main(void);
+TU_ATTR_UNUSED void _start(void) {
+  // called by startup code
+  main();
+  while (1) {}
+}
+#endif
+
+// Required by __libc_init_array in startup code if we are compiling using
+// -nostdlib/-nostartfiles.
+void _init(void) {
+
+}
diff --git a/hw/bsp/stm32c5/family.cmake b/hw/bsp/stm32c5/family.cmake
new file mode 100644
index 000000000..5b63b1ce4
--- /dev/null
+++ b/hw/bsp/stm32c5/family.cmake
@@ -0,0 +1,111 @@
+include_guard()
+
+set(ST_FAMILY c5)
+set(ST_PREFIX stm32${ST_FAMILY}xx)
+
+set(ST_DRIVER ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx-drivers)
+set(ST_CMSIS ${TOP}/hw/mcu/st/stm32${ST_FAMILY}xx-dfp)
+set(CMSIS_6 ${TOP}/lib/CMSIS_6)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU cortex-m33 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS STM32C5 CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f interface/stlink.cfg -f target/stm32c5x.cfg")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+set(STARTUP_FILE ${ST_CMSIS}/Source/startup_${MCU_VARIANT}.c)
+set(LD_FILE_Clang ${LD_FILE_GNU})
+
+#------------------------------------
+# BOARD_TARGET
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${ST_CMSIS}/Source/Templates/system_${ST_PREFIX}.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_cortex.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_flash_itf.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_pwr.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_rcc.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_gpio.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_uart.c
+    ${ST_DRIVER}/hal/${ST_PREFIX}_hal_dma.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMSIS_6}/CMSIS/Core/Include
+    ${ST_CMSIS}/Include
+    ${ST_DRIVER}/hal
+    ${ST_DRIVER}/ll
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_compile_options(${BOARD_TARGET} PUBLIC -Wno-redundant-decls)
+  endif ()
+
+  if(CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_compile_definitions(${BOARD_TARGET} PUBLIC
+      __STACK_LIMIT=__StackLimit
+      __INITIAL_SP=__StackTop
+    )
+  endif ()
+
+  update_board(${BOARD_TARGET})
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_STM32C5)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c
+    ${TOP}/src/portable/st/stm32_fsdev/fsdev_common.c
+    ${STARTUP_FILE}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_GNU}"
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--script=${LD_FILE_Clang}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
+    target_link_options(${TARGET} PUBLIC
+      "LINKER:--config=${LD_FILE_IAR}"
+      )
+  endif ()
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU" OR CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    set_source_files_properties(${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c PROPERTIES COMPILE_FLAGS "-Wno-missing-prototypes")
+  endif ()
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_jlink(${TARGET})
+  family_flash_stlink(${TARGET})
+  #family_flash_openocd(${TARGET})
+endfunction()
diff --git a/hw/bsp/stm32c5/family.mk b/hw/bsp/stm32c5/family.mk
new file mode 100644
index 000000000..165ad4ad5
--- /dev/null
+++ b/hw/bsp/stm32c5/family.mk
@@ -0,0 +1,52 @@
+ST_FAMILY = c5
+ST_CMSIS = hw/mcu/st/stm32$(ST_FAMILY)xx-dfp
+ST_DRIVER = hw/mcu/st/stm32$(ST_FAMILY)xx-drivers
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= cortex-m33
+
+# --------------
+# Compiler Flags
+# --------------
+CFLAGS += \
+	-DCFG_TUSB_MCU=OPT_MCU_STM32C5 \
+
+# GCC Flags
+CFLAGS += \
+  -flto \
+
+# suppress warnings caused by vendor mcu driver
+CFLAGS += -Wno-error=cast-align -Wno-error=unused-parameter -Wno-error=redundant-decls
+
+LDFLAGS += \
+  -nostdlib -nostartfiles \
+  --specs=nosys.specs --specs=nano.specs
+
+# -----------------
+# Sources & Include
+# -----------------
+
+SRC_C += \
+	src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/hcd_stm32_fsdev.c \
+	src/portable/st/stm32_fsdev/fsdev_common.c \
+	$(ST_CMSIS)/Source/Templates/system_stm32$(ST_FAMILY)xx.c \
+	$(ST_CMSIS)/Source/startup_$(MCU_VARIANT).c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_cortex.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_flash_itf.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_pwr.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_rcc.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_gpio.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_uart.c \
+	$(ST_DRIVER)/hal/stm32$(ST_FAMILY)xx_hal_dma.c
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/lib/CMSIS_6/CMSIS/Core/Include \
+	$(TOP)/$(ST_CMSIS)/Include \
+	$(TOP)/$(ST_DRIVER)/hal \
+	$(TOP)/$(ST_DRIVER)/ll
+
+# flash target using on-board stlink
+flash: flash-stlink
diff --git a/hw/bsp/stm32c5/stm32c5xx_hal_conf.h b/hw/bsp/stm32c5/stm32c5xx_hal_conf.h
new file mode 100644
index 000000000..0833fa3dd
--- /dev/null
+++ b/hw/bsp/stm32c5/stm32c5xx_hal_conf.h
@@ -0,0 +1,684 @@
+/**
+  ******************************************************************************
+  * @file    stm32c5xx_hal_conf.h
+  * @brief   HAL configuration file.
+  ******************************************************************************
+  * @attention
+  *
+  * Copyright (c) 2026 STMicroelectronics.
+  * All rights reserved.
+  *
+  * This software is licensed under terms that can be found in the mx_stm32c5xx_hal_drivers_license.md file
+  * in the same directory as the generated code.
+  * If no mx_stm32c5xx_hal_drivers_license.md file comes with this software, it is provided AS-IS.
+  *
+  ******************************************************************************
+  */
+
+/* Define to prevent recursive inclusion -------------------------------------*/
+#ifndef  STM32C5XX_HAL_CONF_H
+#define  STM32C5XX_HAL_CONF_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif /* __cplusplus */
+
+/* Exported types ------------------------------------------------------------*/
+/* Exported constants --------------------------------------------------------*/
+
+/** @defgroup HAL_Conf_How_To_Use HAL Conf How to Use
+  * @{
+  - The STM32 HAL configuration file, stm32tnxx_hal_conf.h, is designed to customize the behaviour of the HAL modules.
+  - The users can utilize the provided file as-is, where all HAL modules are enabled with their default settings.
+  - Alternatively, users have the flexibility to customize the file based on their application's requirements.
+  - For example, they can enable only the necessary HAL modules or modify the predefined settings to achieve
+    the desired functionality.
+  */
+
+/**
+  * @}
+  */
+
+/** @defgroup HAL_Conf_Exported_Constants HAL Conf Constants
+  * @{
+  */
+
+/** @defgroup HAL_System_Configuration HAL System Configuration
+  * @{
+  */
+
+/* ########################### System Configuration ############################# */
+/**
+  * @brief This is the HAL system configuration section
+  */
+#define  USE_HAL_TICK_INT_PRIORITY              15U     /*!< tick interrupt priority */
+#define  USE_HAL_FLASH_PREFETCH                 1U     /*!< Enable FLASH prefetch */
+/**
+  * @}
+  */
+
+/** @defgroup HAL_MUTEX_Usage_Activation HAL MUTEX Usage Activation
+  * @{
+  */
+/* ########################## HAL MUTEX usage activation  ####################### */
+/**
+  * @brief Used by the HAL PPP Acquire/Release APIs when the define USE_HAL_MUTEX is set to 1
+  */
+#define USE_HAL_MUTEX                           0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_API_Parameters_Check HAL API Parameters Check
+  * @{
+  */
+/* ########################## HAL API parameters check  ##################### */
+/**
+  * @brief Run time parameter check activation
+  */
+#define USE_HAL_CHECK_PARAM                     0U
+#define USE_HAL_SECURE_CHECK_PARAM              0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_State_Transition HAL State Transition
+  * @{
+  */
+/* ########################## State transition   ################################ */
+/**
+  * @brief Enable protection of state transition in thread safe
+  */
+#define USE_HAL_CHECK_PROCESS_STATE             0U
+/**
+  * @}
+  */
+
+/* ########################## Peripheral configuration  ######################### */
+
+/** @defgroup HAL_ADC_Config HAL ADC Configuration
+  * @{
+  */
+/* ########################## HAL_ADC Config #################################### */
+#define USE_HAL_ADC_MODULE                      0U
+#define USE_HAL_ADC_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_ADC_REGISTER_CALLBACKS          0U
+#define USE_HAL_ADC_USER_DATA                   0U
+#define USE_HAL_ADC_GET_LAST_ERRORS             0U
+#define USE_HAL_ADC_DMA                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_AES_Config HAL AES Configuration
+  * @{
+  */
+/* ########################## HAL_AES Config #################################### */
+#define USE_HAL_AES_MODULE                      0U
+#define USE_HAL_AES_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_AES_REGISTER_CALLBACKS          0U
+#define USE_HAL_AES_USER_DATA                   0U
+#define USE_HAL_AES_GET_LAST_ERRORS             0U
+#define USE_HAL_AES_DMA                         0U
+#define USE_HAL_AES_ECB_CBC_ALGO                0U
+#define USE_HAL_AES_CTR_ALGO                    0U
+#define USE_HAL_AES_GCM_GMAC_ALGO               0U
+#define USE_HAL_AES_CCM_ALGO                    0U
+#define USE_HAL_AES_SUSPEND_RESUME              0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_CCB_Config HAL CCB Configuration
+  * @{
+  */
+/* ########################## HAL_CCB Config #################################### */
+#define USE_HAL_CCB_MODULE                      0U
+#define USE_HAL_CCB_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_CCB_USER_DATA                   0U
+#define USE_HAL_CCB_GET_LAST_ERRORS             0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_COMP_Config HAL COMP Configuration
+  * @{
+  */
+/* ########################## HAL_COMP Config ################################### */
+#define USE_HAL_COMP_MODULE                     0U
+#define USE_HAL_COMP_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+#define USE_HAL_COMP_REGISTER_CALLBACKS         0U
+#define USE_HAL_COMP_USER_DATA                  0U
+/* Use comparator with EXTI (needed to generate system wake-up event and CPU event) */
+#define USE_HAL_COMP_EXTI                       0U
+/* Use comparators window mode feature */
+#define USE_HAL_COMP_WINDOW_MODE                0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_CORDIC_Config HAL CORDIC Configuration
+  * @{
+  */
+/* ########################## HAL_CORDIC Config ################################# */
+#define USE_HAL_CORDIC_MODULE                   0U
+#define USE_HAL_CORDIC_CLK_ENABLE_MODEL         HAL_CLK_ENABLE_NO
+#define USE_HAL_CORDIC_REGISTER_CALLBACKS       0U
+#define USE_HAL_CORDIC_USER_DATA                0U
+#define USE_HAL_CORDIC_GET_LAST_ERRORS          0U
+#define USE_HAL_CORDIC_DMA                      0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_CORTEX_Config HAL CORTEX Configuration
+  * @{
+  */
+/* ########################## HAL_CORTEX Config ################################# */
+#define USE_HAL_CORTEX_MODULE                   1U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_CRC_Config HAL CRC Configuration
+  * @{
+  */
+/* ########################## HAL_CRC Config #################################### */
+#define USE_HAL_CRC_MODULE                      0U
+#define USE_HAL_CRC_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_CRC_USER_DATA                   0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_CRS_Config HAL CRS Configuration
+  * @{
+  */
+/* ########################## HAL_CRS Config #################################### */
+#define USE_HAL_CRS_MODULE                      0U
+#define USE_HAL_CRS_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_CRS_REGISTER_CALLBACKS          0U
+#define USE_HAL_CRS_USER_DATA                   0U
+#define USE_HAL_CRS_GET_LAST_ERRORS             0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_DAC_Config HAL DAC Configuration
+  * @{
+  */
+/* ########################## HAL_DAC Config #################################### */
+#define USE_HAL_DAC_MODULE                      0U
+#define USE_HAL_DAC_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_DAC_REGISTER_CALLBACKS          0U
+#define USE_HAL_DAC_USER_DATA                   0U
+#define USE_HAL_DAC_GET_LAST_ERRORS             0U
+#define USE_HAL_DAC_DMA                         0U
+#define USE_HAL_DAC_DUAL_CHANNEL                0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_DBGMCU_Config HAL DBGMCU Configuration
+  * @{
+  */
+/* ########################## HAL_DBGMCU Config ################################# */
+#define USE_HAL_DBGMCU_MODULE                   0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_DMA_Config HAL DMA Configuration
+  * @{
+  */
+/* ########################## HAL_DMA Config #################################### */
+#define USE_HAL_DMA_MODULE                      1U
+#define USE_HAL_DMA_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_DMA_USER_DATA                   0U
+#define USE_HAL_DMA_GET_LAST_ERRORS             0U
+#define USE_HAL_DMA_LINKEDLIST                  0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_ETH_Config HAL ETH Configuration
+  * @{
+  */
+/* ########################## HAL_ETH Config #################################### */
+#define USE_HAL_ETH_MODULE                      0U
+#define USE_HAL_ETH_REGISTER_CALLBACKS          0U
+#define USE_HAL_ETH_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_ETH_USER_DATA                   0U
+#define USE_HAL_ETH_GET_LAST_ERRORS             0U
+#define USE_HAL_ETH_ATOMIC_CHANNEL_LOCK         0U
+#define USE_HAL_ETH_MAX_TX_CH_NB                1U
+#define USE_HAL_ETH_MAX_RX_CH_NB                1U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_EXTI_Config HAL EXTI Configuration
+  * @{
+  */
+/* ########################## HAL_EXTI Config ################################### */
+#define USE_HAL_EXTI_MODULE                     0U
+#define USE_HAL_EXTI_REGISTER_CALLBACKS         0U
+#define USE_HAL_EXTI_USER_DATA                  0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_FDCAN_Config HAL FDCAN Configuration
+  * @{
+  */
+/* ########################## HAL_FDCAN Config ################################## */
+#define USE_HAL_FDCAN_MODULE                    0U
+#define USE_HAL_FDCAN_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_FDCAN_REGISTER_CALLBACKS        0U
+#define USE_HAL_FDCAN_USER_DATA                 0U
+#define USE_HAL_FDCAN_GET_LAST_ERRORS           0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_FLASH_Config HAL FLASH Configuration
+  * @{
+  */
+/* ########################## HAL_FLASH Config ################################## */
+#define USE_HAL_FLASH_MODULE                    1U
+#define USE_HAL_FLASH_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_FLASH_REGISTER_CALLBACKS        0U
+#define USE_HAL_FLASH_USER_DATA                 0U
+#define USE_HAL_FLASH_GET_LAST_ERRORS           0U
+/* Use the FLASH program by address feature */
+#define USE_HAL_FLASH_PROGRAM_BY_ADDR           0U
+/* Use the FLASH erase by address feature */
+#define USE_HAL_FLASH_ERASE_BY_ADDR             0U
+/* Use the FLASH erase by PAGE feature */
+#define USE_HAL_FLASH_ERASE_PAGE                0U
+/* Use the FLASH bank erase feature */
+#define USE_HAL_FLASH_ERASE_BANK                0U
+/* Use the FLASH mass erase feature */
+#define USE_HAL_FLASH_MASS_ERASE                0U
+/* Use ECC errors handling APIs */
+#define USE_HAL_FLASH_ECC                       0U
+/* Use FLASH HAL API for EDATA */
+#define USE_HAL_FLASH_OB_EDATA                  0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_GPIO_Config HAL GPIO Configuration
+  * @{
+  */
+/* ########################## HAL_GPIO Config ################################### */
+#define USE_HAL_GPIO_MODULE                     1U
+#define USE_HAL_GPIO_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+/**
+  * @}
+  */
+
+/** @defgroup HAL_HASH_Config HAL HASH Configuration
+  * @{
+  */
+/* ########################## HAL_HASH Config ################################### */
+#define USE_HAL_HASH_MODULE                     0U
+#define USE_HAL_HASH_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+#define USE_HAL_HASH_REGISTER_CALLBACKS         0U
+#define USE_HAL_HASH_USER_DATA                  0U
+#define USE_HAL_HASH_GET_LAST_ERRORS            0U
+#define USE_HAL_HASH_DMA                        0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_HCD_Config HAL HCD Configuration
+  * @{
+  */
+/* ########################## HAL_HCD Config #################################### */
+#define USE_HAL_HCD_MODULE                      0U
+#define USE_HAL_HCD_REGISTER_CALLBACKS          0U
+#define USE_HAL_HCD_USER_DATA                   0U
+#define USE_HAL_HCD_GET_LAST_ERRORS             0U
+#define USE_HAL_HCD_USB_DOUBLE_BUFFER           0U
+#define USE_HAL_HCD_USB_EP_TYPE_ISOC            0U
+#define USE_HAL_HCD_MAX_CHANNEL_NB              16U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_I2C_Config HAL I2C Configuration
+  * @{
+  */
+/* ########################## HAL_I2C Config #################################### */
+#define USE_HAL_I2C_MODULE                      0U
+#define USE_HAL_I2C_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_I2C_REGISTER_CALLBACKS          0U
+#define USE_HAL_I2C_USER_DATA                   0U
+#define USE_HAL_I2C_GET_LAST_ERRORS             0U
+#define USE_HAL_I2C_DMA                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_I3C_Config HAL I3C Configuration
+  * @{
+  */
+/* ########################## HAL_I3C Config #################################### */
+#define USE_HAL_I3C_MODULE                      0U
+#define USE_HAL_I3C_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_I3C_REGISTER_CALLBACKS          0U
+#define USE_HAL_I3C_USER_DATA                   0U
+#define USE_HAL_I3C_GET_LAST_ERRORS             0U
+#define USE_HAL_I3C_DMA                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_I2S_Config HAL I2S Configuration
+  * @{
+  */
+/* ########################## HAL_I2S Config #################################### */
+#define USE_HAL_I2S_MODULE                      0U
+#define USE_HAL_I2S_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_I2S_REGISTER_CALLBACKS          0U
+#define USE_HAL_I2S_USER_DATA                   0U
+#define USE_HAL_I2S_GET_LAST_ERRORS             0U
+#define USE_HAL_I2S_OVR_UDR_ERRORS              0U
+#define USE_HAL_I2S_DMA                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_ICACHE_Config HAL ICACHE Configuration
+  * @{
+  */
+/* ########################## HAL_ICACHE Config ################################# */
+#define USE_HAL_ICACHE_MODULE                   1U
+#define USE_HAL_ICACHE_REGISTER_CALLBACKS       0U
+#define USE_HAL_ICACHE_USER_DATA                0U
+#define USE_HAL_ICACHE_GET_LAST_ERRORS          0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_IWDG_Config HAL IWDG Configuration
+  * @{
+  */
+/* ########################## HAL_IWDG Config ################################### */
+#define USE_HAL_IWDG_MODULE                     0U
+#define USE_HAL_IWDG_REGISTER_CALLBACKS         0U
+#define USE_HAL_IWDG_USER_DATA                  0U
+/* IWDG time unit configuration */
+#define USE_HAL_IWDG_TIME_UNIT                  HAL_IWDG_TIME_UNIT_MS
+/* IWDG hardware start configuration
+   warning: In case of starting IWDG in Hardware mode, make sure that
+   USE_HAL_IWDG_HARDWARE_START is aligned with OB activated set for IWDG */
+#define USE_HAL_IWDG_HARDWARE_START             0U
+/* User can choose the value of the LSI frequency with the USE_HAL_IWDG_LSI_FREQ define:
+  - 0U : Dynamic LSI to be computed and set by the user.
+  - LSI_VALUE : LSI value of 32KHz.
+  - (LSI_VALUE / 128U): LSI value of 250Hz */
+#define USE_HAL_IWDG_LSI_FREQ                      LSI_VALUE
+/**
+  * @}
+  */
+
+/** @defgroup HAL_LPTIM_Config HAL LPTIM Configuration
+  * @{
+  */
+/* ########################## HAL_LPTIM Config ################################## */
+#define USE_HAL_LPTIM_MODULE                    0U
+#define USE_HAL_LPTIM_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_LPTIM_REGISTER_CALLBACKS        0U
+#define USE_HAL_LPTIM_USER_DATA                 0U
+#define USE_HAL_LPTIM_GET_LAST_ERRORS           0U
+#define USE_HAL_LPTIM_DMA                       0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_OPAMP_Config HAL OPAMP Configuration
+  * @{
+  */
+/* ########################## HAL_OPAMP Config ################################## */
+#define USE_HAL_OPAMP_MODULE                    0U
+#define USE_HAL_OPAMP_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_OPAMP_USER_DATA                 0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_PCD_Config HAL PCD Configuration
+  * @{
+  */
+/* ########################## HAL_PCD Config #################################### */
+#define USE_HAL_PCD_MODULE                      1U
+#define USE_HAL_PCD_REGISTER_CALLBACKS          0U
+#define USE_HAL_PCD_USER_DATA                   0U
+#define USE_HAL_PCD_GET_LAST_ERRORS             0U
+#define USE_HAL_PCD_USB_DOUBLE_BUFFER           0U
+#define USE_HAL_PCD_USB_LPM                     0U
+#define USE_HAL_PCD_USB_BCD                     0U
+#define USE_HAL_PCD_USB_EP_TYPE_ISOC            0U
+#define USE_HAL_PCD_MAX_ENDPOINT_NB             8U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_PKA_Config HAL PKA Configuration
+  * @{
+  */
+/* ########################## HAL_PKA Config #################################### */
+#define USE_HAL_PKA_MODULE                      0U
+#define USE_HAL_PKA_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_PKA_REGISTER_CALLBACKS          0U
+#define USE_HAL_PKA_USER_DATA                   0U
+#define USE_HAL_PKA_GET_LAST_ERRORS             0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_PWR_Config HAL PWR Configuration
+  * @{
+  */
+/* ########################## HAL_PWR Config #################################### */
+#define USE_HAL_PWR_MODULE                      1U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_RAMCFG_Config HAL RAMCFG Configuration
+  * @{
+  */
+/* ########################## HAL_RAMCFG Config ################################# */
+#define USE_HAL_RAMCFG_MODULE                   0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_RCC_Config HAL RCC Configuration
+  * @{
+  */
+/* ########################## HAL_RCC Config #################################### */
+#define USE_HAL_RCC_MODULE                      1U
+/* Use RCC HAL API for Reset function */
+#define USE_HAL_RCC_RESET_PERIPH_CLOCK_MANAGEMENT 0U
+#define USE_HAL_RCC_RESET_RTC_DOMAIN              0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_RNG_Config HAL RNG Configuration
+  * @{
+  */
+/* ########################## HAL_RNG Config #################################### */
+#define USE_HAL_RNG_MODULE                      0U
+#define USE_HAL_RNG_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_RNG_REGISTER_CALLBACKS          0U
+#define USE_HAL_RNG_USER_DATA                   0U
+#define USE_HAL_RNG_GET_LAST_ERRORS             0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_RTC_Config HAL RTC Configuration
+  * @{
+  */
+/* ########################## HAL_RTC Config #################################### */
+#define USE_HAL_RTC_MODULE                      0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_SBS_Config HAL SBS Configuration
+  * @{
+  */
+/* ########################## HAL_SBS Config #################################### */
+#define USE_HAL_SBS_MODULE                      0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_SMARTCARD_Config HAL SMARTCARD Configuration
+  * @{
+  */
+/* ########################## HAL_SMARTCARD Config ############################## */
+#define USE_HAL_SMARTCARD_MODULE                0U
+#define USE_HAL_SMARTCARD_CLK_ENABLE_MODEL      HAL_CLK_ENABLE_NO
+#define USE_HAL_SMARTCARD_REGISTER_CALLBACKS    0U
+#define USE_HAL_SMARTCARD_USER_DATA             0U
+#define USE_HAL_SMARTCARD_GET_LAST_ERRORS       0U
+#define USE_HAL_SMARTCARD_DMA                   0U
+/* #################### SMARTCARD FIFO configuration ######################## */
+#define USE_HAL_SMARTCARD_FIFO                  0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_SMBUS_Config HAL SMBUS Configuration
+  * @{
+  */
+/* ########################## HAL_SMBUS Config ################################## */
+#define USE_HAL_SMBUS_MODULE                    0U
+#define USE_HAL_SMBUS_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_SMBUS_REGISTER_CALLBACKS        0U
+#define USE_HAL_SMBUS_USER_DATA                 0U
+#define USE_HAL_SMBUS_GET_LAST_ERRORS           0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_SPI_Config HAL SPI Configuration
+  * @{
+  */
+/* ########################## HAL_SPI Config #################################### */
+#define USE_HAL_SPI_MODULE                      0U
+#define USE_HAL_SPI_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_SPI_REGISTER_CALLBACKS          0U
+#define USE_HAL_SPI_USER_DATA                   0U
+#define USE_HAL_SPI_GET_LAST_ERRORS             0U
+#define USE_HAL_SPI_DMA                         0U
+/* CRC FEATURE: Use to activate CRC feature inside HAL SPI Driver
+ * Activated: CRC code is present inside driver
+ * Deactivated: CRC code cleaned from driver
+ */
+#define USE_HAL_SPI_CRC                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_TAMP_Config HAL TAMP Configuration
+  * @{
+  */
+/* ########################## HAL_TAMP Config ################################### */
+#define USE_HAL_TAMP_MODULE                     0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_TIM_Config HAL TIM Configuration
+  * @{
+  */
+/* ########################## HAL_TIM Config #################################### */
+#define USE_HAL_TIM_MODULE                      0U
+#define USE_HAL_TIM_CLK_ENABLE_MODEL            HAL_CLK_ENABLE_NO
+#define USE_HAL_TIM_REGISTER_CALLBACKS          0U
+#define USE_HAL_TIM_USER_DATA                   0U
+#define USE_HAL_TIM_GET_LAST_ERRORS             0U
+#define USE_HAL_TIM_DMA                         0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_UART_Config HAL UART Configuration
+  * @{
+  */
+/* ########################## HAL_UART Config ################################### */
+#define USE_HAL_UART_MODULE                     1U
+#define USE_HAL_UART_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+#define USE_HAL_UART_REGISTER_CALLBACKS         0U
+#define USE_HAL_UART_USER_DATA                  0U
+#define USE_HAL_UART_GET_LAST_ERRORS            0U
+#define USE_HAL_UART_DMA                        0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_USART_Config HAL USART Configuration
+  * @{
+  */
+/* ########################## HAL_USART Config ################################## */
+#define USE_HAL_USART_MODULE                    0U
+#define USE_HAL_USART_CLK_ENABLE_MODEL          HAL_CLK_ENABLE_NO
+#define USE_HAL_USART_REGISTER_CALLBACKS        0U
+#define USE_HAL_USART_USER_DATA                 0U
+#define USE_HAL_USART_GET_LAST_ERRORS           0U
+#define USE_HAL_USART_DMA                       0U
+#define USE_HAL_USART_FIFO                      0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_WWDG_Config HAL WWDG Configuration
+  * @{
+  */
+/* ########################## HAL_WWDG Config ################################### */
+#define USE_HAL_WWDG_MODULE                     0U
+#define USE_HAL_WWDG_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+#define USE_HAL_WWDG_REGISTER_CALLBACKS         0U
+#define USE_HAL_WWDG_USER_DATA                  0U
+/* WWDG time unit configuration */
+#define USE_HAL_WWDG_TIME_UNIT                  HAL_WWDG_TIME_UNIT_MS
+/* WWDG hardware start configuration
+   warning: In case of starting WWDG in Hardware mode, make sure that
+   USE_HAL_WWDG_HARDWARE_START is aligned with OB activated set for WWDG */
+#define USE_HAL_WWDG_HARDWARE_START             0U
+/**
+  * @}
+  */
+
+/** @defgroup HAL_XSPI_Config HAL XSPI Configuration
+  * @{
+  */
+/* ########################## HAL_XSPI Config ################################### */
+#define USE_HAL_XSPI_MODULE                     0U
+#define USE_HAL_XSPI_CLK_ENABLE_MODEL           HAL_CLK_ENABLE_NO
+#define USE_HAL_XSPI_REGISTER_CALLBACKS         0U
+#define USE_HAL_XSPI_USER_DATA                  0U
+#define USE_HAL_XSPI_GET_LAST_ERRORS            0U
+#define USE_HAL_XSPI_DMA                        0U
+#define USE_HAL_XSPI_HYPERBUS                   0U
+/**
+  * @}
+  */
+
+/**
+  * @}
+  */
+
+#ifdef __cplusplus
+}
+#endif /* __cplusplus */
+
+#endif /*  STM32C5XX_HAL_CONF_H */
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c85ade4d0..cd9b3dc27 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -206,6 +206,12 @@
   #define TUP_USBIP_FSDEV_DRD
   #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
 
+#elif TU_CHECK_MCU(OPT_MCU_STM32C5)
+  #define TUP_USBIP_FSDEV
+  #define TUP_USBIP_FSDEV_STM32
+  #define TUP_USBIP_FSDEV_DRD
+  #define CFG_TUSB_FSDEV_PMA_SIZE 2048u
+
 #elif TU_CHECK_MCU(OPT_MCU_STM32F0)
   #define TUP_USBIP_FSDEV
   #define TUP_USBIP_FSDEV_STM32
diff --git a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
index 41da3ddd0..4dfd04fb4 100644
--- a/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
+++ b/src/portable/st/stm32_fsdev/dcd_stm32_fsdev.c
@@ -41,6 +41,7 @@
  * F302xB/C, F303xB/C, F373        512 byte buffer; no internal D+ pull-up
  * F302x6/8, F302xD/E2, F303xD/E  1024 byte buffer; no internal D+ pull-up
  * C0                             2048 byte buffer; 32-bit bus; host mode
+ * C5                             2048 byte buffer; 32-bit bus; host mode
  * G0                             2048 byte buffer; 32-bit bus; host mode
  * G4                             1024 byte buffer
  * H5                             2048 byte buffer; 32-bit bus; host mode
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index 070aa00ec..74cc9d0a4 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -36,6 +36,10 @@
   #include "stm32c0xx.h"
   #define FSDEV_HAS_SBUF_ISO 1
 
+#elif CFG_TUSB_MCU == OPT_MCU_STM32C5
+  #include "stm32c5xx.h"
+  #define FSDEV_HAS_SBUF_ISO 1
+
 #elif CFG_TUSB_MCU == OPT_MCU_STM32F0
   #include "stm32f0xx.h"
   #define FSDEV_HAS_SBUF_ISO 0
@@ -177,7 +181,7 @@ static const IRQn_Type fsdev_irq[] = {
     USB_IRQn,
   #elif TU_CHECK_MCU(OPT_MCU_STM32L5, OPT_MCU_STM32U3)
     USB_FS_IRQn,
-  #elif TU_CHECK_MCU(OPT_MCU_STM32C0, OPT_MCU_STM32H5, OPT_MCU_STM32U0)
+  #elif TU_CHECK_MCU(OPT_MCU_STM32C0, OPT_MCU_STM32C5, OPT_MCU_STM32H5, OPT_MCU_STM32U0)
     USB_DRD_FS_IRQn,
   #elif CFG_TUSB_MCU == OPT_MCU_STM32G0
     #ifdef STM32G0B0xx
@@ -276,6 +280,8 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   #define FSDEV_STM32_CPU_MHZ 64U
 #elif CFG_TUSB_MCU == OPT_MCU_STM32C0
   #define FSDEV_STM32_CPU_MHZ 48U
+#elif CFG_TUSB_MCU == OPT_MCU_STM32C5
+  #define FSDEV_STM32_CPU_MHZ 144U
 #endif
 
 #ifndef CFG_TUSB_FSDEV_BTABLE_FS_DELAY_COUNT
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 154f8e2a4..83b6d3e51 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -98,6 +98,7 @@
 #define OPT_MCU_STM32N6           319 ///< ST N6
 #define OPT_MCU_STM32WBA          320 ///< ST WBA
 #define OPT_MCU_STM32U3           321 ///< ST U3
+#define OPT_MCU_STM32C5           322 ///< ST C5
 
 // Sony
 #define OPT_MCU_CXD56             400 ///< SONY CXD56
diff --git a/tools/get_deps.py b/tools/get_deps.py
index eb87abf6e..50497fc71 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -163,6 +163,9 @@ deps_optional = {
     'hw/mcu/st/cmsis-device-wba': ['https://github.com/STMicroelectronics/cmsis-device-wba.git',
                                    '647d8522e5fd15049e9a1cc30ed19d85e5911eaf',
                                    'stm32wba'],
+    'hw/mcu/st/stm32c5xx-dfp': ['https://github.com/STMicroelectronics/stm32c5xx-dfp.git',
+                                  '6d0940882511d9430f83af9bd3da6bcb77f79239',
+                                  'stm32c5'],
     'hw/mcu/st/stm32-mfxstm32l152': ['https://github.com/STMicroelectronics/stm32-mfxstm32l152.git',
                                      '7f4389efee9c6a655b55e5df3fceef5586b35f9b',
                                      'stm32h7'],
@@ -232,6 +235,9 @@ deps_optional = {
     'hw/mcu/st/stm32wbaxx_hal_driver': ['https://github.com/STMicroelectronics/stm32wbaxx_hal_driver.git',
                                        '9442fbb71f855ff2e64fbf662b7726beba511a24',
                                        'stm32wba'],
+    'hw/mcu/st/stm32c5xx-drivers': ['https://github.com/STMicroelectronics/stm32c5xx-drivers.git',
+                                       '79b901285a7efeaf87c4c25db81d24cb5d8c9465',
+                                       'stm32c5'],
     'hw/mcu/ti': ['https://github.com/hathach/ti_driver.git',
                   '083944907e7d08fcb1f614b47598ce45935b8da1',
                   'msp430 msp432e4 tm4c'],
@@ -284,7 +290,7 @@ deps_optional = {
                     'tm4c '],
     'lib/CMSIS_6': ['https://github.com/ARM-software/CMSIS_6.git',
                     '6f0a58d01aa9bd2feba212097f9afe7acd991d52',
-                    'imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx'],
+                    'imxrt kinetis_k32l ra stm32n6 lpc51 lpc55 mcx stm32c5'],
     'lib/sct_neopixel': ['https://github.com/gsteiert/sct_neopixel.git',
                          'e73e04ca63495672d955f9268e003cffe168fcd8',
                          'lpc55'],
-- 
cgit v1.3.1


From 7eb806c6073279c4fd791f542a7230aeab582b2c Mon Sep 17 00:00:00 2001
From: HiFiPHile <admin@hifiphile.com>
Date: Sun, 10 May 2026 14:45:21 +0200
Subject: use local linker

Signed-off-by: HiFiPHile <admin@hifiphile.com>
---
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake |   4 +-
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk    |   2 +-
 hw/bsp/stm32c5/linker/stm32c542xc_flash.icf       |  46 ++++++
 hw/bsp/stm32c5/linker/stm32c542xc_flash.ld        | 185 ++++++++++++++++++++++
 4 files changed, 234 insertions(+), 3 deletions(-)
 create mode 100644 hw/bsp/stm32c5/linker/stm32c542xc_flash.icf
 create mode 100644 hw/bsp/stm32c5/linker/stm32c542xc_flash.ld

(limited to 'hw')

diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
index 456cf8e79..563a47ba2 100644
--- a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.cmake
@@ -1,8 +1,8 @@
 set(MCU_VARIANT stm32c542xx)
 set(JLINK_DEVICE stm32c542rc)
 
-set(LD_FILE_GNU ${ST_CMSIS}/Source/Templates/gcc/linker/stm32c542xc_flash.ld)
-set(LD_FILE_IAR ${ST_CMSIS}/Source/Templates/iar/linker/stm32c542xc_flash.icf)
+set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/../../linker/stm32c542xc_flash.ld)
+set(LD_FILE_IAR ${CMAKE_CURRENT_LIST_DIR}/../../linker/stm32c542xc_flash.icf)
 
 function(update_board TARGET)
   target_compile_definitions(${TARGET} PUBLIC
diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
index cea82567b..b3da64713 100644
--- a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.mk
@@ -6,7 +6,7 @@ CFLAGS += \
 	-DHSE_STARTUP_TIMEOUT=100
 
 # GCC
-LD_FILE = $(ST_CMSIS)/Source/Templates/gcc/linker/stm32c542xc_flash.ld
+LD_FILE = $(FAMILY_PATH)/linker/stm32c542xc_flash.ld
 
 
 # For flash-jlink target
diff --git a/hw/bsp/stm32c5/linker/stm32c542xc_flash.icf b/hw/bsp/stm32c5/linker/stm32c542xc_flash.icf
new file mode 100644
index 000000000..ea826ba8e
--- /dev/null
+++ b/hw/bsp/stm32c5/linker/stm32c542xc_flash.icf
@@ -0,0 +1,46 @@
+/**
+******************************************************************************
+* @file    stm32c542xc_flash.icf
+* @brief   Linker File
+******************************************************************************
+* @attention
+*
+* Copyright (c) 2026 STMicroelectronics.
+* All rights reserved.
+*
+* This software is licensed under terms that can be found in the LICENSE file
+* in the root directory of this software component.
+* If no LICENSE file comes with this software, it is provided AS-IS.
+*
+******************************************************************************
+*/
+
+define memory mem with size = 4G;
+define region ROM = mem:[from 0x8000000 size 0x40000];
+define region RAM = mem:[from 0x20000000 size 0x10000];
+
+/* define blocks */
+define block HEAP with alignment = 8, size = 0x200 { };
+define block CSTACK with alignment = 8, size = 0x1000 { };
+
+/* setup initialization strategies */
+initialize by copy {
+  readwrite
+};
+
+do not initialize {
+  section .noinit
+};
+
+place at start of ROM { readonly section .intvec } ;
+
+/* sections placements */
+place in ROM {
+  readonly
+};
+
+place in RAM {
+  readwrite,
+  block HEAP,
+  block CSTACK
+};
diff --git a/hw/bsp/stm32c5/linker/stm32c542xc_flash.ld b/hw/bsp/stm32c5/linker/stm32c542xc_flash.ld
new file mode 100644
index 000000000..34e2bf660
--- /dev/null
+++ b/hw/bsp/stm32c5/linker/stm32c542xc_flash.ld
@@ -0,0 +1,185 @@
+/**
+******************************************************************************
+* @file    stm32c542xc_flash.ld
+* @brief   Linker File
+******************************************************************************
+* @attention
+*
+* Copyright (c) 2026 STMicroelectronics.
+* All rights reserved.
+*
+* This software is licensed under terms that can be found in the LICENSE file
+* in the root directory of this software component.
+* If no LICENSE file comes with this software, it is provided AS-IS.
+*
+******************************************************************************
+*/
+
+/* Entry Point */
+ENTRY(Reset_Handler)
+
+HEAP_SIZE = 0x200;
+STACK_SIZE = 0x1000;
+
+
+MEMORY
+{
+  ROM (rx) : org = 0x8000000, len = 0x40000
+  RAM (xrw) : org = 0x20000000, len = 0x10000
+}
+
+SECTIONS
+{
+  .vectors :
+  {
+    . = ALIGN(8);
+    KEEP(*(.vectors));
+    . = ALIGN(8);
+  } > ROM
+
+  .text :
+  {
+    . = ALIGN(8);
+    *(.text);
+    *(.text*);
+    *(.glue_7);
+    *(.glue_7t);
+    *(.eh_frame);
+    KEEP (*(.init));
+    KEEP (*(.fini));
+    . = ALIGN(8);
+    _etext = .;
+  } > ROM
+
+  .rodata :
+  {
+    . = ALIGN(8);
+    *(.rodata);
+    *(.rodata*);
+    . = ALIGN(8);
+  } > ROM
+
+  .ARM.extab : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    *(.ARM.extab* .gnu.linkonce.armextab.*)
+    . = ALIGN(8);
+  } > ROM
+
+  .ARM : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    __exidx_start = .;
+    *(.ARM.exidx*);
+    __exidx_end = .;
+    . = ALIGN(8);
+  } > ROM
+
+  .preinit_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array*));
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .init_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT(.init_array.*)));
+    KEEP (*(.init_array*));
+    PROVIDE_HIDDEN (__init_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .fini_array : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT(.fini_array.*)));
+    KEEP (*(.fini_array*));
+    PROVIDE_HIDDEN (__fini_array_end = .);
+    . = ALIGN(8);
+  } > ROM
+
+  .copy.table : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    __copy_table_start__ = .;
+    LONG(LOADADDR(.data));
+    LONG (ADDR(.data));
+    LONG (SIZEOF(.data) / 4);
+    __copy_table_end__ = .;
+  } > ROM
+
+  .zero.table : /* The READONLY keyword is only supported in GCC11 and later, remove it if using GCC10 or earlier. */
+  {
+    . = ALIGN(8);
+    __zero_table_start__ = .;
+    LONG (ADDR(.bss));
+    LONG (SIZEOF(.bss) / 4);
+    __zero_table_end__ = .;
+  } > ROM
+
+  .data :
+  {
+    . = ALIGN(8);
+    _sidata = LOADADDR(.data);
+    __data_start__ = .;
+    _sdata = .;
+    *(.data);
+    *(.data*);
+    . = ALIGN(8);
+    _edata = .;
+  } > RAM AT> ROM
+
+  .bss :
+  {
+    . = ALIGN(8);
+    _sbss = .;
+    __bss_start__ = _sbss;
+    *(.bss);
+    *(.bss*);
+    *(COMMON);
+    . = ALIGN(8);
+    _ebss = .;
+    __bss_end__ = _ebss;
+  } > RAM
+
+  .heap (NOLOAD) :
+  {
+    . = ALIGN(8);
+    __end__ = .;
+    PROVIDE (end = .);
+    _heap_start = .;
+    . += HEAP_SIZE;
+    . = ALIGN(8);
+    _heap_end = .;
+    __HeapLimit = .;
+  } > RAM
+
+  .stack (NOLOAD) :
+  {
+    . = ALIGN(8);
+    __StackLimit = .;
+    . += STACK_SIZE;
+    . = ALIGN(8);
+    __StackTop = .;
+    _estack = .;
+    __stack = .;
+  } > RAM
+
+  /DISCARD/ :
+  {
+    libc.a ( * )
+    libm.a ( * )
+    libgcc.a ( * )
+  }
+
+  .ARM.attributes 0 :
+  {
+    *(.ARM.attributes)
+  }
+}
-- 
cgit v1.3.1


From bc8ce76ae800b312b4d3ef591cc42e8726e68d7f Mon Sep 17 00:00:00 2001
From: Saulo Veríssimo <sauloverissimo@gmail.com>
Date: Tue, 24 Mar 2026 23:37:48 -0300
Subject: feat: add MIDI 2.0 Device class driver (USB-MIDI 2.0)

Add native USB-MIDI 2.0 Device class driver to TinyUSB. Implements the
USB-MIDI 2.0 specification with both Alt Setting 0 (MIDI 1.0 fallback)
and Alt Setting 1 (UMP native) descriptor support.

Driver features:
- UMP (Universal MIDI Packet) read/write with atomic message framing
- Protocol negotiation: Endpoint Discovery, Config Request/Notify,
  Function Block Discovery (embedded in driver)
- Group Terminal Block descriptor via GET_DESCRIPTOR
- Alt Setting switch handler with endpoint re-arm
- Static allocation, no dynamic memory, ISR-safe

Build system:
- Register midi2d_* in usbd.c driver table
- Add TUD_MIDI2_DESCRIPTOR macros to usbd.h
- Add config defaults (CFG_TUD_MIDI2_*) to tusb_option.h
- Add midi2_ump_word_count() to midi.h (shared by Device and Host)
- Add midi2_device.c/h to family.cmake and CMakeLists.txt
- Add midi2_device.h include to tusb.h

All changes guarded by #if CFG_TUD_MIDI2 (default 0). Zero impact on
existing drivers and examples.

Tested: Raspberry Pi Pico (RP2040), Linux ALSA, Windows MIDI Services
---
 hw/bsp/rp2040/family.cmake    |   2 +
 src/CMakeLists.txt            |   2 +
 src/class/midi/midi.h         |  18 ++
 src/class/midi/midi2_device.c | 604 ++++++++++++++++++++++++++++++++++++++++++
 src/class/midi/midi2_device.h | 125 +++++++++
 src/device/usbd.c             |  14 +
 src/device/usbd.h             |  37 +++
 src/tusb.h                    |   8 +
 src/tusb_option.h             |  52 ++++
 9 files changed, 862 insertions(+)
 create mode 100644 src/class/midi/midi2_device.c
 create mode 100644 src/class/midi/midi2_device.h

(limited to 'hw')

diff --git a/hw/bsp/rp2040/family.cmake b/hw/bsp/rp2040/family.cmake
index 075582554..aab9a4fae 100644
--- a/hw/bsp/rp2040/family.cmake
+++ b/hw/bsp/rp2040/family.cmake
@@ -99,6 +99,7 @@ target_sources(tinyusb_device_base INTERFACE
 		${TOP}/src/class/dfu/dfu_rt_device.c
 		${TOP}/src/class/hid/hid_device.c
 		${TOP}/src/class/midi/midi_device.c
+		${TOP}/src/class/midi/midi2_device.c
 		${TOP}/src/class/msc/msc_device.c
 		${TOP}/src/class/mtp/mtp_device.c
 		${TOP}/src/class/net/ecm_rndis_device.c
@@ -121,6 +122,7 @@ target_sources(tinyusb_host_base INTERFACE
 		${TOP}/src/class/cdc/cdc_host.c
 		${TOP}/src/class/hid/hid_host.c
 		${TOP}/src/class/midi/midi_host.c
+		${TOP}/src/class/midi/midi2_host.c
 		${TOP}/src/class/msc/msc_host.c
 		${TOP}/src/class/vendor/vendor_host.c
 		)
diff --git a/src/CMakeLists.txt b/src/CMakeLists.txt
index c7a5184c5..b3e05f60f 100644
--- a/src/CMakeLists.txt
+++ b/src/CMakeLists.txt
@@ -14,6 +14,7 @@ function(tinyusb_sources_get OUTPUT_VAR)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/dfu/dfu_rt_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_device.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi2_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/mtp/mtp_device.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/net/ecm_rndis_device.c
@@ -28,6 +29,7 @@ function(tinyusb_sources_get OUTPUT_VAR)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/cdc/cdc_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/hid/hid_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi_host.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/midi/midi2_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/msc/msc_host.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/class/vendor/vendor_host.c
     # typec
diff --git a/src/class/midi/midi.h b/src/class/midi/midi.h
index cd67640e4..8121ec016 100644
--- a/src/class/midi/midi.h
+++ b/src/class/midi/midi.h
@@ -185,6 +185,24 @@ typedef midi_desc_cs_endpoint_n_t(1) midi_desc_cs_endpoint_1jack_t;
 
 TU_VERIFY_STATIC(sizeof(midi_desc_cs_endpoint_1jack_t) == 4+1, "size is not correct");
 
+//--------------------------------------------------------------------+
+// MIDI 2.0 UMP Helpers
+//--------------------------------------------------------------------+
+
+// Return the number of 32-bit words for a UMP message given its Message Type
+static inline uint8_t midi2_ump_word_count(uint8_t mt) {
+  switch (mt) {
+    case 0x0: case 0x1: case 0x2: case 0x6: case 0x7:
+      return 1;
+    case 0x3: case 0x4: case 0x8: case 0x9: case 0xA:
+      return 2;
+    case 0xB: case 0xC:
+      return 3;
+    default: // 0x5, 0xD, 0xE, 0xF
+      return 4;
+  }
+}
+
 //--------------------------------------------------------------------+
 // For Internal Driver Use
 //--------------------------------------------------------------------+
diff --git a/src/class/midi/midi2_device.c b/src/class/midi/midi2_device.c
new file mode 100644
index 000000000..9363aac11
--- /dev/null
+++ b/src/class/midi/midi2_device.c
@@ -0,0 +1,604 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "tusb_option.h"
+
+#if CFG_TUD_ENABLED && CFG_TUD_MIDI2
+
+#include <string.h>
+
+#include "device/usbd.h"
+#include "device/usbd_pvt.h"
+#include "midi2_device.h"
+
+//--------------------------------------------------------------------+
+// Weak stubs
+//--------------------------------------------------------------------+
+TU_ATTR_WEAK void tud_midi2_rx_cb(uint8_t itf) { (void) itf; }
+TU_ATTR_WEAK void tud_midi2_set_itf_cb(uint8_t itf, uint8_t alt) { (void) itf; (void) alt; }
+TU_ATTR_WEAK bool tud_midi2_get_req_itf_cb(uint8_t rhport, const tusb_control_request_t* request) {
+  (void) rhport; (void) request; return false;
+}
+
+//--------------------------------------------------------------------+
+// UMP Stream Message Constants
+//--------------------------------------------------------------------+
+// UMP Message Type for Stream messages (bits 31:28)
+enum {
+  MT_STREAM                 = 0x0F,
+};
+
+// UMP Stream Status values (10-bit, bits 25:16)
+enum {
+  STREAM_ENDPOINT_DISCOVERY = 0x000,
+  STREAM_ENDPOINT_INFO      = 0x001,
+  STREAM_EP_NAME            = 0x003,
+  STREAM_PROD_INSTANCE_ID   = 0x004,
+  STREAM_CONFIG_REQUEST     = 0x005,
+  STREAM_CONFIG_NOTIFY      = 0x006,
+  STREAM_FB_DISCOVERY       = 0x010,
+  STREAM_FB_INFO            = 0x011,
+};
+
+// MIDI Protocol values (per USB-MIDI 2.0 spec)
+enum {
+  MIDI_PROTOCOL_MIDI1       = 0x01,
+  MIDI_PROTOCOL_MIDI2       = 0x02,
+};
+
+enum {
+  UMP_VER_MAJOR = 1,
+  UMP_VER_MINOR = 1,
+};
+
+// Group Terminal Block descriptor types (USB-MIDI 2.0)
+enum {
+  MIDI2_CS_GRP_TRM_BLOCK      = 0x26,
+  MIDI2_GRP_TRM_BLOCK_HEADER  = 0x01,
+  MIDI2_GRP_TRM_BLOCK_ENTRY   = 0x02,
+};
+
+//--------------------------------------------------------------------+
+// MACRO CONSTANT TYPEDEF
+//--------------------------------------------------------------------+
+typedef struct {
+  uint8_t rhport;
+  uint8_t itf_num;
+  uint8_t alt_setting;
+  uint8_t protocol;
+  bool    negotiated;
+
+  /*------------- From this point, data is not cleared by bus reset -------------*/
+  struct {
+    tu_edpt_stream_t tx;
+    tu_edpt_stream_t rx;
+
+    uint8_t rx_ff_buf[CFG_TUD_MIDI2_RX_BUFSIZE];
+    uint8_t tx_ff_buf[CFG_TUD_MIDI2_TX_BUFSIZE];
+  } ep_stream;
+} midi2d_interface_t;
+
+TU_VERIFY_STATIC(CFG_TUD_MIDI2_NUM_GROUPS >= 1 && CFG_TUD_MIDI2_NUM_GROUPS <= 16,
+                 "CFG_TUD_MIDI2_NUM_GROUPS must be 1..16");
+TU_VERIFY_STATIC(CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS >= 1 && CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS <= 32,
+                 "CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS must be 1..32");
+
+#define ITF_MEM_RESET_SIZE offsetof(midi2d_interface_t, ep_stream)
+
+static midi2d_interface_t _midi2d_itf[CFG_TUD_MIDI2];
+
+#if CFG_TUD_EDPT_DEDICATED_HWFIFO == 0
+typedef struct {
+  TUD_EPBUF_DEF(epin, CFG_TUD_MIDI2_TX_EPSIZE);
+  TUD_EPBUF_DEF(epout, CFG_TUD_MIDI2_RX_EPSIZE);
+} midi2d_epbuf_t;
+
+CFG_TUD_MEM_SECTION static midi2d_epbuf_t _midi2d_epbuf[CFG_TUD_MIDI2];
+#endif
+
+// Default Group Terminal Block descriptor (USB-MIDI 2.0 spec, Table 5-5/5-6)
+static const uint8_t _default_gtb_desc[] = {
+  // GTB Header (5 bytes)
+  5,                                        // bLength
+  MIDI2_CS_GRP_TRM_BLOCK,                   // bDescriptorType
+  MIDI2_GRP_TRM_BLOCK_HEADER,               // bDescriptorSubtype
+  U16_TO_U8S_LE(18),                        // wTotalLength (5 + 13 = 18)
+
+  // GTB Entry (13 bytes)
+  13,                                       // bLength
+  MIDI2_CS_GRP_TRM_BLOCK,                   // bDescriptorType
+  MIDI2_GRP_TRM_BLOCK_ENTRY,                // bDescriptorSubtype
+  1,                                        // bGrpTrmBlkID
+  0x00,                                     // bGrpTrmBlkType: bidirectional
+  0x00,                                     // nGroupTrm: first group (0)
+  CFG_TUD_MIDI2_NUM_GROUPS,                 // nNumGroupTrm
+  0,                                        // iBlockItem: no string
+  0x00,                                     // bMIDIProtocol: unknown/not fixed
+  0, 0,                                     // wMaxInputBandwidth: unknown
+  0, 0                                      // wMaxOutputBandwidth: unknown
+};
+
+//--------------------------------------------------------------------+
+// Protocol Negotiation
+//--------------------------------------------------------------------+
+static void _nego_send_ump(midi2d_interface_t* p_midi, const uint32_t* words, uint8_t count) {
+  tu_edpt_stream_t* ep_tx = &p_midi->ep_stream.tx;
+  if (!tu_edpt_stream_is_opened(ep_tx)) return;
+  if (tu_edpt_stream_write_available(ep_tx) < count * 4) return;
+  tu_edpt_stream_write(ep_tx, words, count * 4);
+  tu_edpt_stream_write_xfer(ep_tx);
+}
+
+static void _nego_send_endpoint_info(midi2d_interface_t* p_midi) {
+  uint32_t msg[4] = {0};
+  msg[0] = ((uint32_t) MT_STREAM << 28)
+         | ((uint32_t) STREAM_ENDPOINT_INFO << 16)
+         | ((uint32_t) UMP_VER_MAJOR << 8)
+         | (uint32_t) UMP_VER_MINOR;
+  msg[1] = (1u << 31)  // Static Function Blocks flag
+         | ((uint32_t)(CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS & 0x7F) << 24)
+         | (1u << 9)   // MIDI 2.0 Protocol capability
+         | (1u << 8);  // MIDI 1.0 Protocol capability
+  _nego_send_ump(p_midi, msg, 4);
+}
+
+static void _nego_send_stream_text(midi2d_interface_t* p_midi, uint16_t status, const char* str) {
+  if (!str || str[0] == '\0') return;
+
+  uint16_t total_len = (uint16_t) strlen(str);
+  uint16_t offset = 0;
+
+  while (offset < total_len) {
+    uint16_t remaining = total_len - offset;
+    uint8_t n = (uint8_t)((remaining > 14) ? 14 : remaining);
+    bool is_first = (offset == 0);
+    bool is_last  = (remaining <= 14);
+
+    uint8_t form;
+    if (is_first && is_last) form = 0;
+    else if (is_first)       form = 1;
+    else if (is_last)        form = 3;
+    else                     form = 2;
+
+    uint32_t msg[4] = {0};
+    msg[0] = ((uint32_t) MT_STREAM << 28)
+           | ((uint32_t) form << 26)
+           | ((uint32_t) status << 16);
+
+    const char* p = str + offset;
+    if (n > 0) msg[0] |= ((uint32_t)(uint8_t) p[0] << 8);
+    if (n > 1) msg[0] |= (uint32_t)(uint8_t) p[1];
+    for (uint8_t i = 2; i < n; i++) {
+      uint8_t word_idx = (uint8_t)(1 + (i - 2) / 4);
+      uint8_t shift    = (uint8_t)(24 - ((i - 2) % 4) * 8);
+      msg[word_idx] |= ((uint32_t)(uint8_t) p[i] << shift);
+    }
+
+    _nego_send_ump(p_midi, msg, 4);
+    offset += n;
+  }
+}
+
+static void _nego_send_config_notify(midi2d_interface_t* p_midi, uint8_t protocol) {
+  uint32_t msg[4] = {0};
+  msg[0] = ((uint32_t) MT_STREAM << 28)
+         | ((uint32_t) STREAM_CONFIG_NOTIFY << 16)
+         | ((uint32_t) protocol << 8);
+  _nego_send_ump(p_midi, msg, 4);
+}
+
+static void _nego_send_fb_info(midi2d_interface_t* p_midi, uint8_t fb_idx) {
+  uint32_t msg[4] = {0};
+  msg[0] = ((uint32_t) MT_STREAM << 28)
+         | ((uint32_t) STREAM_FB_INFO << 16)
+         | (1u << 15)
+         | ((uint32_t) fb_idx << 8)
+         | 0x02;  // bDirection: bidirectional
+  msg[1] = ((uint32_t) 0 << 24)  // bFirstGroup
+         | ((uint32_t) CFG_TUD_MIDI2_NUM_GROUPS << 16);
+  _nego_send_ump(p_midi, msg, 4);
+}
+
+static void _nego_handle_stream_msg(midi2d_interface_t* p_midi, const uint32_t* words) {
+  uint16_t status = (words[0] >> 16) & 0x3FF;
+
+  switch (status) {
+    case STREAM_ENDPOINT_DISCOVERY:
+      _nego_send_endpoint_info(p_midi);
+      _nego_send_stream_text(p_midi, STREAM_EP_NAME, CFG_TUD_MIDI2_EP_NAME);
+      _nego_send_stream_text(p_midi, STREAM_PROD_INSTANCE_ID, CFG_TUD_MIDI2_PRODUCT_ID);
+      break;
+
+    case STREAM_CONFIG_REQUEST: {
+      uint8_t req_proto = (words[0] >> 8) & 0xFF;
+      if (req_proto == MIDI_PROTOCOL_MIDI1 || req_proto == MIDI_PROTOCOL_MIDI2) {
+        p_midi->protocol = req_proto;
+      }
+      _nego_send_config_notify(p_midi, p_midi->protocol);
+      p_midi->negotiated = true;
+      break;
+    }
+
+    case STREAM_FB_DISCOVERY: {
+      uint8_t fb_idx = (words[0] >> 8) & 0xFF;
+      if (fb_idx == 0xFF) {
+        for (uint8_t f = 0; f < CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS; f++) {
+          _nego_send_fb_info(p_midi, f);
+        }
+      } else if (fb_idx < CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS) {
+        _nego_send_fb_info(p_midi, fb_idx);
+      }
+      break;
+    }
+
+    default:
+      break;
+  }
+}
+
+static void _nego_process_rx(midi2d_interface_t* p_midi) {
+  tu_edpt_stream_t* ep_rx = &p_midi->ep_stream.rx;
+  uint8_t first_byte;
+
+  while (tu_edpt_stream_peek(ep_rx, &first_byte)) {
+    uint8_t mt = (first_byte >> 4) & 0x0F;
+    uint8_t pkt_words = midi2_ump_word_count(mt);
+    uint32_t pkt_bytes = (uint32_t)pkt_words * 4;
+
+    if (mt != MT_STREAM) break;
+    if (tu_edpt_stream_read_available(ep_rx) < pkt_bytes) break;
+
+    uint32_t buf[4] = {0};
+    tu_edpt_stream_read(ep_rx, buf, pkt_bytes);
+    _nego_handle_stream_msg(p_midi, buf);
+  }
+}
+
+//--------------------------------------------------------------------+
+// READ API
+//--------------------------------------------------------------------+
+bool tud_midi2_n_mounted(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, false);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  return tu_edpt_stream_is_opened(&p_midi->ep_stream.tx) &&
+         tu_edpt_stream_is_opened(&p_midi->ep_stream.rx);
+}
+
+uint32_t tud_midi2_n_available(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, 0);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  return tu_edpt_stream_read_available(&p_midi->ep_stream.rx) / 4;
+}
+
+uint32_t tud_midi2_n_ump_read(uint8_t itf, uint32_t* words, uint32_t max_words) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2 && words != NULL && max_words > 0, 0);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  tu_edpt_stream_t* ep_rx = &p_midi->ep_stream.rx;
+
+  uint32_t total_read = 0;
+  while (total_read < max_words) {
+    uint8_t first_byte;
+    if (!tu_edpt_stream_peek(ep_rx, &first_byte)) break;
+
+    uint8_t mt = (first_byte >> 4) & 0x0F;
+    uint8_t pkt_words = midi2_ump_word_count(mt);
+
+    if (total_read + pkt_words > max_words) break;
+    if (tu_edpt_stream_read_available(ep_rx) < (uint32_t)pkt_words * 4) break;
+
+    tu_edpt_stream_read(ep_rx, &words[total_read], pkt_words * 4);
+    total_read += pkt_words;
+  }
+
+  return total_read;
+}
+
+bool tud_midi2_n_packet_read(uint8_t itf, uint8_t packet[4]) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, false);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  return 4 == tu_edpt_stream_read(&p_midi->ep_stream.rx, packet, 4);
+}
+
+//--------------------------------------------------------------------+
+// WRITE API
+//--------------------------------------------------------------------+
+uint32_t tud_midi2_n_ump_write(uint8_t itf, const uint32_t* words, uint32_t count) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2 && words != NULL && count > 0, 0);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  tu_edpt_stream_t* ep_tx = &p_midi->ep_stream.tx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_tx), 0);
+
+  uint32_t written = 0;
+  while (written < count) {
+    uint8_t mt = (uint8_t)((words[written] >> 28) & 0x0F);
+    uint8_t pkt_words = midi2_ump_word_count(mt);
+
+    if (written + pkt_words > count) break;
+    if (tu_edpt_stream_write_available(ep_tx) < pkt_words * 4) break;
+
+    tu_edpt_stream_write(ep_tx, &words[written], pkt_words * 4);
+    written += pkt_words;
+  }
+
+  (void) tu_edpt_stream_write_xfer(ep_tx);
+  return written;
+}
+
+bool tud_midi2_n_packet_write(uint8_t itf, const uint8_t packet[4]) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, false);
+  midi2d_interface_t* p_midi = &_midi2d_itf[itf];
+  tu_edpt_stream_t* ep_tx = &p_midi->ep_stream.tx;
+  TU_VERIFY(tu_edpt_stream_is_opened(ep_tx), false);
+  TU_VERIFY(tu_edpt_stream_write_available(ep_tx) >= 4, false);
+  TU_VERIFY(tu_edpt_stream_write(ep_tx, packet, 4) > 0, false);
+  (void) tu_edpt_stream_write_xfer(ep_tx);
+  return true;
+}
+
+//--------------------------------------------------------------------+
+// STATE GETTERS
+//--------------------------------------------------------------------+
+uint8_t tud_midi2_n_alt_setting(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, 0);
+  return _midi2d_itf[itf].alt_setting;
+}
+
+bool tud_midi2_n_negotiated(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, false);
+  return _midi2d_itf[itf].negotiated;
+}
+
+uint8_t tud_midi2_n_protocol(uint8_t itf) {
+  TU_VERIFY(itf < CFG_TUD_MIDI2, 0);
+  return _midi2d_itf[itf].protocol;
+}
+
+//--------------------------------------------------------------------+
+// USBD Driver API
+//--------------------------------------------------------------------+
+void midi2d_init(void) {
+  tu_memclr(_midi2d_itf, sizeof(_midi2d_itf));
+  for (uint8_t i = 0; i < CFG_TUD_MIDI2; i++) {
+    midi2d_interface_t* p_midi = &_midi2d_itf[i];
+    p_midi->protocol = MIDI_PROTOCOL_MIDI2;
+
+  #if CFG_TUD_EDPT_DEDICATED_HWFIFO
+    uint8_t* epout_buf = NULL;
+    uint8_t* epin_buf  = NULL;
+  #else
+    midi2d_epbuf_t* p_epbuf = &_midi2d_epbuf[i];
+    uint8_t* epout_buf = p_epbuf->epout;
+    uint8_t* epin_buf  = p_epbuf->epin;
+  #endif
+
+    tu_edpt_stream_init(&p_midi->ep_stream.rx, false, false, false,
+                        p_midi->ep_stream.rx_ff_buf, CFG_TUD_MIDI2_RX_BUFSIZE, epout_buf);
+    tu_edpt_stream_init(&p_midi->ep_stream.tx, false, true, false,
+                        p_midi->ep_stream.tx_ff_buf, CFG_TUD_MIDI2_TX_BUFSIZE, epin_buf);
+  }
+}
+
+bool midi2d_deinit(void) {
+  for (uint8_t i = 0; i < CFG_TUD_MIDI2; i++) {
+    midi2d_interface_t* p_midi = &_midi2d_itf[i];
+    tu_edpt_stream_deinit(&p_midi->ep_stream.rx);
+    tu_edpt_stream_deinit(&p_midi->ep_stream.tx);
+  }
+  return true;
+}
+
+void midi2d_reset(uint8_t rhport) {
+  (void) rhport;
+  for (uint8_t i = 0; i < CFG_TUD_MIDI2; i++) {
+    midi2d_interface_t* p_midi = &_midi2d_itf[i];
+    tu_memclr(p_midi, ITF_MEM_RESET_SIZE);
+
+    tu_edpt_stream_clear(&p_midi->ep_stream.rx);
+    tu_edpt_stream_close(&p_midi->ep_stream.rx);
+
+    tu_edpt_stream_clear(&p_midi->ep_stream.tx);
+    tu_edpt_stream_close(&p_midi->ep_stream.tx);
+  }
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t find_midi2_itf(uint8_t ep_addr) {
+  for (uint8_t idx = 0; idx < CFG_TUD_MIDI2; idx++) {
+    const midi2d_interface_t* p_midi = &_midi2d_itf[idx];
+    if (ep_addr == p_midi->ep_stream.rx.ep_addr || ep_addr == p_midi->ep_stream.tx.ep_addr) {
+      return idx;
+    }
+  }
+  return TUSB_INDEX_INVALID_8;
+}
+
+static uint8_t find_midi2_itf_by_num(uint8_t itf_num) {
+  for (uint8_t idx = 0; idx < CFG_TUD_MIDI2; idx++) {
+    if (_midi2d_itf[idx].itf_num == itf_num) return idx;
+  }
+  return TUSB_INDEX_INVALID_8;
+}
+
+uint16_t midi2d_open(uint8_t rhport, const tusb_desc_interface_t* desc_itf, uint16_t max_len) {
+  const uint8_t* p_desc   = (const uint8_t*) desc_itf;
+  const uint8_t* desc_end = p_desc + max_len;
+
+  // 1st Interface: Audio Control v1 (optional)
+  if (TUSB_CLASS_AUDIO               == desc_itf->bInterfaceClass    &&
+      AUDIO_SUBCLASS_CONTROL         == desc_itf->bInterfaceSubClass &&
+      AUDIO_FUNC_PROTOCOL_CODE_UNDEF == desc_itf->bInterfaceProtocol) {
+    p_desc = tu_desc_next(desc_itf);
+    while (tu_desc_in_bounds(p_desc, desc_end) && TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) {
+      p_desc = tu_desc_next(p_desc);
+    }
+  }
+
+  // 2nd Interface: MIDI Streaming
+  TU_VERIFY(TUSB_DESC_INTERFACE == tu_desc_type(p_desc), 0);
+  const tusb_desc_interface_t* desc_midi = (const tusb_desc_interface_t*) p_desc;
+
+  TU_VERIFY(TUSB_CLASS_AUDIO              == desc_midi->bInterfaceClass &&
+            AUDIO_SUBCLASS_MIDI_STREAMING == desc_midi->bInterfaceSubClass &&
+            AUDIO_FUNC_PROTOCOL_CODE_UNDEF == desc_midi->bInterfaceProtocol,
+            0);
+
+  uint8_t idx = find_midi2_itf(0);
+  TU_ASSERT(idx < CFG_TUD_MIDI2, 0);
+  midi2d_interface_t* p_midi = &_midi2d_itf[idx];
+
+  p_midi->rhport      = rhport;
+  p_midi->itf_num     = desc_midi->bInterfaceNumber;
+  p_midi->alt_setting = 0;
+  p_midi->protocol    = MIDI_PROTOCOL_MIDI2;
+  p_midi->negotiated  = false;
+
+  p_desc = tu_desc_next(p_desc);
+
+  // Skip class-specific descriptors
+  while (tu_desc_in_bounds(p_desc, desc_end) && TUSB_DESC_CS_INTERFACE == tu_desc_type(p_desc)) {
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  // Find and open endpoint descriptors
+  uint8_t found_ep = 0;
+  while ((found_ep < desc_midi->bNumEndpoints) && tu_desc_in_bounds(p_desc, desc_end)) {
+    if (TUSB_DESC_ENDPOINT == tu_desc_type(p_desc)) {
+      const tusb_desc_endpoint_t* desc_ep = (const tusb_desc_endpoint_t*) p_desc;
+      TU_ASSERT(usbd_edpt_open(rhport, desc_ep), 0);
+      const uint8_t ep_addr = desc_ep->bEndpointAddress;
+
+      if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
+        tu_edpt_stream_open(&p_midi->ep_stream.tx, rhport, desc_ep, CFG_TUD_MIDI2_TX_EPSIZE);
+        tu_edpt_stream_clear(&p_midi->ep_stream.tx);
+      } else {
+        tu_edpt_stream_open(&p_midi->ep_stream.rx, rhport, desc_ep, tu_edpt_packet_size(desc_ep));
+        tu_edpt_stream_clear(&p_midi->ep_stream.rx);
+        TU_ASSERT(tu_edpt_stream_read_xfer(&p_midi->ep_stream.rx) > 0, 0);
+      }
+
+      found_ep++;
+    }
+
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  // Skip remaining descriptors (alt setting 1, CS endpoints, GTB)
+  while (tu_desc_in_bounds(p_desc, desc_end)) {
+    uint8_t dtype = tu_desc_type(p_desc);
+    if (dtype != TUSB_DESC_CS_INTERFACE && dtype != TUSB_DESC_CS_ENDPOINT &&
+        dtype != TUSB_DESC_INTERFACE && dtype != TUSB_DESC_ENDPOINT) {
+      break;
+    }
+    p_desc = tu_desc_next(p_desc);
+  }
+
+  return (uint16_t)(p_desc - (const uint8_t*) desc_itf);
+}
+
+bool midi2d_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t* request) {
+  TU_LOG2("MIDI2 ctrl: stage=%u bRequest=0x%02X wValue=0x%04X wIndex=0x%04X wLength=%u\r\n",
+          stage, request->bRequest, request->wValue, request->wIndex, request->wLength);
+
+  if (stage != CONTROL_STAGE_SETUP) return true;
+
+  switch (request->bRequest) {
+    case TUSB_REQ_SET_INTERFACE: {
+      uint8_t itf_num = tu_u16_low(request->wIndex);
+      uint8_t alt     = tu_u16_low(request->wValue);
+
+      uint8_t idx = find_midi2_itf_by_num(itf_num);
+      if (idx >= CFG_TUD_MIDI2) return false;
+
+      midi2d_interface_t* p_midi = &_midi2d_itf[idx];
+      p_midi->alt_setting = alt;
+
+      tu_edpt_stream_clear(&p_midi->ep_stream.rx);
+      tu_edpt_stream_clear(&p_midi->ep_stream.tx);
+
+      if (alt == 1) {
+        p_midi->negotiated = false;
+        p_midi->protocol   = MIDI_PROTOCOL_MIDI2;
+      }
+
+      // Re-arm RX endpoint for receiving data after alt setting change
+      tu_edpt_stream_read_xfer(&p_midi->ep_stream.rx);
+
+      tud_midi2_set_itf_cb(idx, alt);
+      tud_control_status(rhport, request);
+      return true;
+    }
+
+    case TUSB_REQ_GET_DESCRIPTOR: {
+      // wValue: descriptor type (high) | index (low)
+      // 0x26 = CS_GRP_TRM_BLOCK, index 0x01
+      if (request->wValue == ((uint16_t)MIDI2_CS_GRP_TRM_BLOCK << 8 | 0x01)) {
+        if (tud_midi2_get_req_itf_cb(rhport, request)) return true;
+
+        uint16_t len = request->wLength;
+        if (len > sizeof(_default_gtb_desc)) {
+          len = sizeof(_default_gtb_desc);
+        }
+        tud_control_xfer(rhport, request, (void*)(uintptr_t) _default_gtb_desc, len);
+        return true;
+      }
+      return false;
+    }
+
+    default:
+      return false;
+  }
+}
+
+bool midi2d_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes) {
+  (void) rhport;
+
+  uint8_t idx = find_midi2_itf(ep_addr);
+  TU_ASSERT(idx < CFG_TUD_MIDI2);
+  midi2d_interface_t* p_midi = &_midi2d_itf[idx];
+
+  tu_edpt_stream_t* ep_rx = &p_midi->ep_stream.rx;
+  tu_edpt_stream_t* ep_tx = &p_midi->ep_stream.tx;
+
+  if (ep_addr == ep_rx->ep_addr) {
+    if (result == XFER_RESULT_SUCCESS) {
+      tu_edpt_stream_read_xfer_complete(ep_rx, xferred_bytes);
+      if (p_midi->alt_setting == 1) {
+        _nego_process_rx(p_midi);
+      }
+      tud_midi2_rx_cb(idx);
+    }
+    tu_edpt_stream_read_xfer(ep_rx);
+  } else if (ep_addr == ep_tx->ep_addr && result == XFER_RESULT_SUCCESS) {
+    if (0 == tu_edpt_stream_write_xfer(ep_tx)) {
+      (void) tu_edpt_stream_write_zlp_if_needed(ep_tx, xferred_bytes);
+    }
+  } else {
+    return false;
+  }
+
+  return true;
+}
+
+#endif
diff --git a/src/class/midi/midi2_device.h b/src/class/midi/midi2_device.h
new file mode 100644
index 000000000..dac1f0124
--- /dev/null
+++ b/src/class/midi/midi2_device.h
@@ -0,0 +1,125 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef TUSB_MIDI2_DEVICE_H_
+#define TUSB_MIDI2_DEVICE_H_
+
+#include "class/audio/audio.h"
+#include "midi.h"
+
+//--------------------------------------------------------------------+
+// Class Driver Configuration
+//--------------------------------------------------------------------+
+
+// Config defaults are in tusb_option.h:
+//   CFG_TUD_MIDI2_RX_EPSIZE, CFG_TUD_MIDI2_TX_EPSIZE,
+//   CFG_TUD_MIDI2_RX_BUFSIZE, CFG_TUD_MIDI2_TX_BUFSIZE,
+//   CFG_TUD_MIDI2_NUM_GROUPS, CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS,
+//   CFG_TUD_MIDI2_EP_NAME, CFG_TUD_MIDI2_PRODUCT_ID
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// Application Callback API (weak, optional)
+//--------------------------------------------------------------------+
+void tud_midi2_rx_cb(uint8_t itf);
+void tud_midi2_set_itf_cb(uint8_t itf, uint8_t alt);
+bool tud_midi2_get_req_itf_cb(uint8_t rhport, const tusb_control_request_t* request);
+
+//--------------------------------------------------------------------+
+// Application API (Multiple Interfaces)
+//--------------------------------------------------------------------+
+
+bool     tud_midi2_n_mounted(uint8_t itf);
+uint32_t tud_midi2_n_available(uint8_t itf);
+uint8_t  tud_midi2_n_alt_setting(uint8_t itf);
+bool     tud_midi2_n_negotiated(uint8_t itf);
+uint8_t  tud_midi2_n_protocol(uint8_t itf);
+
+uint32_t tud_midi2_n_ump_read(uint8_t itf, uint32_t* words, uint32_t max_words);
+uint32_t tud_midi2_n_ump_write(uint8_t itf, const uint32_t* words, uint32_t count);
+
+bool     tud_midi2_n_packet_read(uint8_t itf, uint8_t packet[4]);
+bool     tud_midi2_n_packet_write(uint8_t itf, const uint8_t packet[4]);
+
+//--------------------------------------------------------------------+
+// Application API (Single Interface)
+//--------------------------------------------------------------------+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi2_mounted(void) {
+  return tud_midi2_n_mounted(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t tud_midi2_available(void) {
+  return tud_midi2_n_available(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_midi2_alt_setting(void) {
+  return tud_midi2_n_alt_setting(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi2_negotiated(void) {
+  return tud_midi2_n_negotiated(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint8_t tud_midi2_protocol(void) {
+  return tud_midi2_n_protocol(0);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t
+tud_midi2_ump_read(uint32_t* words, uint32_t max_words) {
+  return tud_midi2_n_ump_read(0, words, max_words);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline uint32_t
+tud_midi2_ump_write(const uint32_t* words, uint32_t count) {
+  return tud_midi2_n_ump_write(0, words, count);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi2_packet_read(uint8_t packet[4]) {
+  return tud_midi2_n_packet_read(0, packet);
+}
+
+TU_ATTR_ALWAYS_INLINE static inline bool tud_midi2_packet_write(const uint8_t packet[4]) {
+  return tud_midi2_n_packet_write(0, packet);
+}
+
+//--------------------------------------------------------------------+
+// Internal Class Driver API
+//--------------------------------------------------------------------+
+void     midi2d_init(void);
+bool     midi2d_deinit(void);
+void     midi2d_reset(uint8_t rhport);
+uint16_t midi2d_open(uint8_t rhport, const tusb_desc_interface_t* itf_desc, uint16_t max_len);
+bool     midi2d_control_xfer_cb(uint8_t rhport, uint8_t stage, const tusb_control_request_t* request);
+bool     midi2d_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t result, uint32_t xferred_bytes);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/src/device/usbd.c b/src/device/usbd.c
index 0e58f70bf..55ad330c1 100644
--- a/src/device/usbd.c
+++ b/src/device/usbd.c
@@ -254,6 +254,20 @@ static const usbd_class_driver_t _usbd_driver[] = {
     },
     #endif
 
+    #if CFG_TUD_MIDI2
+    {
+        .name             = DRIVER_NAME("MIDI2"),
+        .init             = midi2d_init,
+        .deinit           = midi2d_deinit,
+        .open             = midi2d_open,
+        .reset            = midi2d_reset,
+        .control_xfer_cb  = midi2d_control_xfer_cb,
+        .xfer_cb          = midi2d_xfer_cb,
+        .xfer_isr         = NULL,
+        .sof              = NULL
+    },
+    #endif
+
     #if CFG_TUD_VENDOR
     {
         .name             = DRIVER_NAME("VENDOR"),
diff --git a/src/device/usbd.h b/src/device/usbd.h
index 473e697ac..af37eff56 100644
--- a/src/device/usbd.h
+++ b/src/device/usbd.h
@@ -424,6 +424,43 @@ bool tud_vendor_control_xfer_cb(uint8_t rhport, uint8_t stage, tusb_control_requ
   TUD_MIDI_DESC_EP(_epin, _epsize, 1),\
   TUD_MIDI_JACKID_OUT_EMB(1)
 
+//--------------------------------------------------------------------+
+// MIDI 2.0 Descriptor Templates (USB-MIDI 2.0)
+//--------------------------------------------------------------------+
+
+// Alt Setting 1: MS Interface + MS Header (bcdMSC=0x0200)
+#define TUD_MIDI2_DESC_ALT1_HEAD_LEN (9 + 7)
+#define TUD_MIDI2_DESC_ALT1_HEAD(_itfnum, _stridx) \
+  /* MIDI Streaming Interface, Alt Setting 1 */\
+  9, TUSB_DESC_INTERFACE, (uint8_t)((_itfnum) + 1), 1, 2, TUSB_CLASS_AUDIO, AUDIO_SUBCLASS_MIDI_STREAMING, AUDIO_FUNC_PROTOCOL_CODE_UNDEF, _stridx,\
+  /* MS Header (MIDI 2.0) */\
+  7, TUSB_DESC_CS_INTERFACE, MIDI_CS_INTERFACE_HEADER, U16_TO_U8S_LE(0x0200), U16_TO_U8S_LE(7)
+
+// Alt Setting 1: Standard USB Endpoint (7 bytes) + CS Endpoint (subtype 0x02)
+#define TUD_MIDI2_DESC_ALT1_EP_LEN(_numgtbs) (7 + 4 + (_numgtbs))
+#define TUD_MIDI2_DESC_ALT1_EP(_ep, _epsize, _numgtbs) \
+  7, TUSB_DESC_ENDPOINT, _ep, TUSB_XFER_BULK, U16_TO_U8S_LE(_epsize), 0, \
+  (uint8_t)(4 + (_numgtbs)), TUSB_DESC_CS_ENDPOINT, MIDI_CS_ENDPOINT_GENERAL_2_0, _numgtbs
+
+// Total length: Alt 0 (MIDI 1.0) + Alt 1 (UMP)
+#define TUD_MIDI2_DESC_LEN (TUD_MIDI_DESC_LEN + TUD_MIDI2_DESC_ALT1_HEAD_LEN + TUD_MIDI2_DESC_ALT1_EP_LEN(1) * 2)
+
+// Complete MIDI 2.0 descriptor with both alternate settings (single cable/GTB)
+#define TUD_MIDI2_DESCRIPTOR(_itfnum, _stridx, _epout, _epin, _epsize) \
+  /* Alt Setting 0 (MIDI 1.0) */\
+  TUD_MIDI_DESC_HEAD(_itfnum, _stridx, 1),\
+  TUD_MIDI_DESC_JACK_DESC(1, 0),\
+  TUD_MIDI_DESC_EP(_epout, _epsize, 1),\
+  TUD_MIDI_JACKID_IN_EMB(1),\
+  TUD_MIDI_DESC_EP(_epin, _epsize, 1),\
+  TUD_MIDI_JACKID_OUT_EMB(1),\
+  /* Alt Setting 1 (UMP) */\
+  TUD_MIDI2_DESC_ALT1_HEAD(_itfnum, _stridx),\
+  TUD_MIDI2_DESC_ALT1_EP(_epout, _epsize, 1),\
+  1, /* bAssoGrpTrmBlkID = 1 */\
+  TUD_MIDI2_DESC_ALT1_EP(_epin, _epsize, 1),\
+  1  /* bAssoGrpTrmBlkID = 1 */
+
 //--------------------------------------------------------------------+
 // Audio Descriptor Templates
 //--------------------------------------------------------------------+
diff --git a/src/tusb.h b/src/tusb.h
index c80c8433c..aa6b461e5 100644
--- a/src/tusb.h
+++ b/src/tusb.h
@@ -63,6 +63,10 @@
     #include "class/midi/midi_host.h"
   #endif
 
+  #if CFG_TUH_MIDI2
+    #include "class/midi/midi2_host.h"
+  #endif
+
   #if CFG_TUH_VENDOR
     #include "class/vendor/vendor_host.h"
   #endif
@@ -108,6 +112,10 @@
     #include "class/midi/midi_device.h"
   #endif
 
+  #if CFG_TUD_MIDI2
+    #include "class/midi/midi2_device.h"
+  #endif
+
   #if CFG_TUD_VENDOR
     #include "class/vendor/vendor_device.h"
   #endif
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 154f8e2a4..4483c2200 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -646,6 +646,42 @@
   #define CFG_TUD_MIDI            0
 #endif
 
+#ifndef CFG_TUD_MIDI2
+  #define CFG_TUD_MIDI2           0
+#endif
+
+#ifndef CFG_TUD_MIDI2_TX_BUFSIZE
+  #define CFG_TUD_MIDI2_TX_BUFSIZE  256
+#endif
+
+#ifndef CFG_TUD_MIDI2_RX_BUFSIZE
+  #define CFG_TUD_MIDI2_RX_BUFSIZE  256
+#endif
+
+#ifndef CFG_TUD_MIDI2_TX_EPSIZE
+  #define CFG_TUD_MIDI2_TX_EPSIZE   64
+#endif
+
+#ifndef CFG_TUD_MIDI2_RX_EPSIZE
+  #define CFG_TUD_MIDI2_RX_EPSIZE   64
+#endif
+
+#ifndef CFG_TUD_MIDI2_NUM_GROUPS
+  #define CFG_TUD_MIDI2_NUM_GROUPS  1
+#endif
+
+#ifndef CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS
+  #define CFG_TUD_MIDI2_NUM_FUNCTION_BLOCKS 1
+#endif
+
+#ifndef CFG_TUD_MIDI2_EP_NAME
+  #define CFG_TUD_MIDI2_EP_NAME     "TinyUSB MIDI 2.0"
+#endif
+
+#ifndef CFG_TUD_MIDI2_PRODUCT_ID
+  #define CFG_TUD_MIDI2_PRODUCT_ID  "TinyUSB-MIDI2"
+#endif
+
 #ifndef CFG_TUD_VENDOR
   #define CFG_TUD_VENDOR          0
 #endif
@@ -815,6 +851,22 @@
   #define CFG_TUH_MIDI   0
 #endif
 
+#ifndef CFG_TUH_MIDI2
+  #define CFG_TUH_MIDI2  0
+#endif
+
+#ifndef CFG_TUH_MIDI2_RX_BUFSIZE
+  #define CFG_TUH_MIDI2_RX_BUFSIZE (4 * TUH_EPSIZE_BULK_MAX)
+#endif
+
+#ifndef CFG_TUH_MIDI2_TX_BUFSIZE
+  #define CFG_TUH_MIDI2_TX_BUFSIZE (4 * TUH_EPSIZE_BULK_MAX)
+#endif
+
+#ifndef CFG_TUH_MIDI2_LOG_LEVEL
+  #define CFG_TUH_MIDI2_LOG_LEVEL CFG_TUH_LOG_LEVEL
+#endif
+
 #ifndef CFG_TUH_MSC
   #define CFG_TUH_MSC    0
 #endif
-- 
cgit v1.3.1


From d5c5ac586bfdbf53e18a8cdbb11b978f53b6d059 Mon Sep 17 00:00:00 2001
From: Saulo Veríssimo <sauloverissimo@gmail.com>
Date: Tue, 24 Mar 2026 23:38:36 -0300
Subject: example: add MIDI 2.0 Host example with display (midi2_host)

Add Host example that receives UMP from a MIDI 2.0 Device via PIO-USB
and displays received messages on a SSD1306 OLED (I2C, 128x64).

Features:
- Boot checklist on display (PWR, TinyUSB, USB bus, Device, Descriptor,
  Alt Setting UMP, Mount, Receiving)
- Decode and display all MIDI 2.0 Channel Voice messages
- PIO-USB Host on rhport 1 (GP12/GP13 for Waveshare RP2350-USB-A)
- SSD1306 display via I2C0 (GP4=SDA, GP5=SCL)

Also add board definition for Waveshare RP2350-USB-A.

Tested: Waveshare RP2350-USB-A (Host) receiving UMP from Raspberry Pi
Pico (Device) via USB cable, notes displayed on SSD1306 OLED
---
 examples/host/CMakeLists.txt                       |   1 +
 examples/host/midi2_host/CMakeLists.txt            |  37 +++
 examples/host/midi2_host/src/display.c             | 220 ++++++++++++++
 examples/host/midi2_host/src/display.h             |  54 ++++
 examples/host/midi2_host/src/font5x7.h             | 107 +++++++
 examples/host/midi2_host/src/main.c                | 326 +++++++++++++++++++++
 examples/host/midi2_host/src/tusb_config.h         |  91 ++++++
 .../boards/waveshare_rp2350_usb_a/board.cmake      |   2 +
 .../rp2040/boards/waveshare_rp2350_usb_a/board.h   |  49 ++++
 9 files changed, 887 insertions(+)
 create mode 100644 examples/host/midi2_host/CMakeLists.txt
 create mode 100644 examples/host/midi2_host/src/display.c
 create mode 100644 examples/host/midi2_host/src/display.h
 create mode 100644 examples/host/midi2_host/src/font5x7.h
 create mode 100644 examples/host/midi2_host/src/main.c
 create mode 100644 examples/host/midi2_host/src/tusb_config.h
 create mode 100644 hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
 create mode 100644 hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h

(limited to 'hw')

diff --git a/examples/host/CMakeLists.txt b/examples/host/CMakeLists.txt
index 70e0427ab..7c74e3c73 100644
--- a/examples/host/CMakeLists.txt
+++ b/examples/host/CMakeLists.txt
@@ -13,6 +13,7 @@ set(EXAMPLE_LIST
   device_info
   hid_controller
   midi_rx
+  midi2_host
   msc_file_explorer
   msc_file_explorer_freertos
   )
diff --git a/examples/host/midi2_host/CMakeLists.txt b/examples/host/midi2_host/CMakeLists.txt
new file mode 100644
index 000000000..221de7adf
--- /dev/null
+++ b/examples/host/midi2_host/CMakeLists.txt
@@ -0,0 +1,37 @@
+cmake_minimum_required(VERSION 3.20)
+
+include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
+
+project(midi2_host C CXX ASM)
+
+family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
+
+if(FAMILY STREQUAL "espressif")
+  return()
+endif()
+
+add_executable(${PROJECT_NAME})
+
+target_sources(${PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
+  ${CMAKE_CURRENT_SOURCE_DIR}/src/display.c
+)
+
+target_include_directories(${PROJECT_NAME} PUBLIC
+  ${CMAKE_CURRENT_SOURCE_DIR}/src
+)
+
+family_configure_host_example(${PROJECT_NAME} noos)
+
+# Waveshare RP2350-USB-A: PIO-USB on GP12/GP13
+target_compile_definitions(${PROJECT_NAME} PRIVATE
+  PIO_USB_DP_PIN_DEFAULT=12
+)
+target_compile_options(${PROJECT_NAME} PRIVATE
+  -Wno-type-limits
+)
+
+# SSD1306 display (I2C)
+target_link_libraries(${PROJECT_NAME} PUBLIC
+  hardware_i2c
+)
diff --git a/examples/host/midi2_host/src/display.c b/examples/host/midi2_host/src/display.c
new file mode 100644
index 000000000..6d81bcd5c
--- /dev/null
+++ b/examples/host/midi2_host/src/display.c
@@ -0,0 +1,220 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// SSD1306 OLED display driver (128x64, I2C) for MIDI 2.0 Host example.
+// Minimal text-only implementation, no graphics library.
+// I2C0: SDA = GP4, SCL = GP5, Address = 0x3C
+
+#include "display.h"
+#include <stdio.h>
+#include <string.h>
+#include "pico/stdlib.h"
+#include "hardware/i2c.h"
+#include "hardware/gpio.h"
+
+#define I2C_PORT     i2c0
+#define I2C_SDA      4
+#define I2C_SCL      5
+#define I2C_FREQ     400000
+#define SSD1306_ADDR 0x3C
+
+#define SCR_W        128
+#define SCR_H        64
+#define PAGES        (SCR_H / 8)   // 8 pages
+#define CHARS_PER_LINE 21          // 128 / 6 = 21 chars
+
+// Framebuffer
+static uint8_t fb[SCR_W * PAGES];
+
+// Log buffer
+#define LOG_LINES    3
+static char log_lines[LOG_LINES][CHARS_PER_LINE + 1];
+static int log_count = 0;
+
+// Status line
+static char status_text[CHARS_PER_LINE + 1] = "";
+
+//--------------------------------------------------------------------+
+// Minimal 5x7 font (ASCII 32-126)
+//--------------------------------------------------------------------+
+#include "font5x7.h"
+
+//--------------------------------------------------------------------+
+// SSD1306 I2C commands
+//--------------------------------------------------------------------+
+
+static void ssd_cmd(uint8_t cmd) {
+  uint8_t buf[2] = { 0x00, cmd };  // Co=0, D/C=0
+  i2c_write_blocking(I2C_PORT, SSD1306_ADDR, buf, 2, false);
+}
+
+static void ssd_data(const uint8_t* data, size_t len) {
+  uint8_t buf[SCR_W + 1];
+  buf[0] = 0x40;  // Co=0, D/C=1
+  size_t chunk = (len > SCR_W) ? SCR_W : len;
+  memcpy(buf + 1, data, chunk);
+  i2c_write_blocking(I2C_PORT, SSD1306_ADDR, buf, chunk + 1, false);
+}
+
+static void ssd_flush(void) {
+  ssd_cmd(0x21); ssd_cmd(0); ssd_cmd(127);  // Column range
+  ssd_cmd(0x22); ssd_cmd(0); ssd_cmd(7);    // Page range
+  for (int page = 0; page < PAGES; page++) {
+    ssd_data(&fb[page * SCR_W], SCR_W);
+  }
+}
+
+//--------------------------------------------------------------------+
+// Framebuffer drawing
+//--------------------------------------------------------------------+
+
+static void fb_clear(void) {
+  memset(fb, 0, sizeof(fb));
+}
+
+static void fb_char(int x, int y, char c) {
+  if (c < 32 || c > 126) c = '?';
+  const uint8_t* glyph = font5x7 + (c - 32) * 5;
+  int page = y / 8;
+  int bit_offset = y % 8;
+
+  if (page >= PAGES || x + 5 > SCR_W) return;
+
+  for (int col = 0; col < 5; col++) {
+    uint8_t column_data = glyph[col];
+    fb[(page * SCR_W) + x + col] |= (uint8_t)(column_data << bit_offset);
+    if (bit_offset > 0 && page + 1 < PAGES) {
+      fb[((page + 1) * SCR_W) + x + col] |= (uint8_t)(column_data >> (8 - bit_offset));
+    }
+  }
+}
+
+static void fb_string(int x, int y, const char* str) {
+  while (*str) {
+    fb_char(x, y, *str);
+    x += 6;
+    if (x + 6 > SCR_W) break;
+    str++;
+  }
+}
+
+//--------------------------------------------------------------------+
+// Display API
+//--------------------------------------------------------------------+
+
+void display_init(void) {
+  i2c_init(I2C_PORT, I2C_FREQ);
+  gpio_set_function(I2C_SDA, GPIO_FUNC_I2C);
+  gpio_set_function(I2C_SCL, GPIO_FUNC_I2C);
+  gpio_pull_up(I2C_SDA);
+  gpio_pull_up(I2C_SCL);
+
+  sleep_ms(100);
+
+  // SSD1306 init sequence
+  ssd_cmd(0xAE);        // Display off
+  ssd_cmd(0xD5); ssd_cmd(0x80);  // Clock div
+  ssd_cmd(0xA8); ssd_cmd(0x3F);  // Multiplex 64
+  ssd_cmd(0xD3); ssd_cmd(0x00);  // Display offset
+  ssd_cmd(0x40);        // Start line 0
+  ssd_cmd(0x8D); ssd_cmd(0x14);  // Charge pump on
+  ssd_cmd(0x20); ssd_cmd(0x00);  // Horizontal addressing
+  ssd_cmd(0xA1);        // Segment remap
+  ssd_cmd(0xC8);        // COM scan direction
+  ssd_cmd(0xDA); ssd_cmd(0x12);  // COM pins
+  ssd_cmd(0x81); ssd_cmd(0xCF);  // Contrast
+  ssd_cmd(0xD9); ssd_cmd(0xF1);  // Pre-charge
+  ssd_cmd(0xDB); ssd_cmd(0x40);  // VCOMH deselect
+  ssd_cmd(0xA4);        // Display from RAM
+  ssd_cmd(0xA6);        // Normal display
+  ssd_cmd(0xAF);        // Display on
+
+  fb_clear();
+  fb_string(0, 0, "MIDI 2.0 Host");
+  ssd_flush();
+}
+
+void display_checklist_update(const checklist_t* ck) {
+  struct { const char* label; bool ok; } items[] = {
+    { "PWR",       ck->pwr_on },
+    { "TinyUSB",   ck->tusb_init },
+    { "USB bus",   ck->bus_active },
+    { "Device",    ck->device_connected },
+    { "Descript",  ck->descriptor_parsed },
+    { "Alt1 UMP",  ck->alt_setting_ok },
+    { "Mount",     ck->mounted },
+    { "RX UMP",    ck->receiving },
+  };
+
+  // Clear checklist area (lines 1-4, two columns)
+  for (int p = 1; p <= 4; p++) {
+    memset(&fb[p * SCR_W], 0, SCR_W);
+  }
+
+  for (int i = 0; i < 8; i++) {
+    int col = (i < 4) ? 0 : 64;
+    int row = (i < 4) ? i : i - 4;
+    int y = 9 + row * 8;
+    char line[12];
+    snprintf(line, sizeof(line), "%s %s", items[i].ok ? "OK" : "..", items[i].label);
+    fb_string(col, y, line);
+  }
+
+  ssd_flush();
+}
+
+void display_log(const char* text, uint16_t color) {
+  (void)color;  // SSD1306 is monochrome
+
+  if (log_count >= LOG_LINES) {
+    for (int i = 0; i < LOG_LINES - 1; i++) {
+      strncpy(log_lines[i], log_lines[i + 1], CHARS_PER_LINE);
+    }
+    log_count = LOG_LINES - 1;
+  }
+
+  strncpy(log_lines[log_count], text, CHARS_PER_LINE);
+  log_lines[log_count][CHARS_PER_LINE] = '\0';
+  log_count++;
+
+  // Draw log area (pages 5-6, y=40-55)
+  memset(&fb[5 * SCR_W], 0, SCR_W);
+  memset(&fb[6 * SCR_W], 0, SCR_W);
+
+  for (int i = 0; i < log_count && i < LOG_LINES; i++) {
+    fb_string(0, 41 + i * 8, log_lines[i]);
+  }
+
+  ssd_flush();
+}
+
+void display_status(const char* text) {
+  strncpy(status_text, text, CHARS_PER_LINE);
+  status_text[CHARS_PER_LINE] = '\0';
+
+  // Status on last page (y=56)
+  memset(&fb[7 * SCR_W], 0, SCR_W);
+  fb_string(0, 56, status_text);
+  ssd_flush();
+}
diff --git a/examples/host/midi2_host/src/display.h b/examples/host/midi2_host/src/display.h
new file mode 100644
index 000000000..a8b0a4b5e
--- /dev/null
+++ b/examples/host/midi2_host/src/display.h
@@ -0,0 +1,54 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef DISPLAY_H_
+#define DISPLAY_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+typedef struct {
+  bool pwr_on;
+  bool tusb_init;
+  bool bus_active;
+  bool device_connected;
+  bool descriptor_parsed;
+  bool alt_setting_ok;
+  bool mounted;
+  bool receiving;
+} checklist_t;
+
+// Initialize SSD1306 display (I2C on GP4/GP5)
+void display_init(void);
+
+// Redraw the checklist area (top portion)
+void display_checklist_update(const checklist_t* ck);
+
+// Add a line to the scrolling log area
+void display_log(const char* text, uint16_t color);
+
+// Update the status bar (bottom line)
+void display_status(const char* text);
+
+#endif
diff --git a/examples/host/midi2_host/src/font5x7.h b/examples/host/midi2_host/src/font5x7.h
new file mode 100644
index 000000000..e515faac1
--- /dev/null
+++ b/examples/host/midi2_host/src/font5x7.h
@@ -0,0 +1,107 @@
+// Minimal 5x7 font, ASCII 32-126. Public domain.
+// 5 bytes per character (5 columns, 7 rows, LSB=top row)
+
+#ifndef FONT5X7_H_
+#define FONT5X7_H_
+
+#include <stdint.h>
+
+static const uint8_t font5x7[] = {
+  0x00,0x00,0x00,0x00,0x00, // 32 (space)
+  0x00,0x00,0x5F,0x00,0x00, // 33 !
+  0x00,0x07,0x00,0x07,0x00, // 34 "
+  0x14,0x7F,0x14,0x7F,0x14, // 35 #
+  0x24,0x2A,0x7F,0x2A,0x12, // 36 $
+  0x23,0x13,0x08,0x64,0x62, // 37 %
+  0x36,0x49,0x55,0x22,0x50, // 38 &
+  0x00,0x05,0x03,0x00,0x00, // 39 '
+  0x00,0x1C,0x22,0x41,0x00, // 40 (
+  0x00,0x41,0x22,0x1C,0x00, // 41 )
+  0x08,0x2A,0x1C,0x2A,0x08, // 42 *
+  0x08,0x08,0x3E,0x08,0x08, // 43 +
+  0x00,0x50,0x30,0x00,0x00, // 44 ,
+  0x08,0x08,0x08,0x08,0x08, // 45 -
+  0x00,0x60,0x60,0x00,0x00, // 46 .
+  0x20,0x10,0x08,0x04,0x02, // 47 /
+  0x3E,0x51,0x49,0x45,0x3E, // 48 0
+  0x00,0x42,0x7F,0x40,0x00, // 49 1
+  0x42,0x61,0x51,0x49,0x46, // 50 2
+  0x21,0x41,0x45,0x4B,0x31, // 51 3
+  0x18,0x14,0x12,0x7F,0x10, // 52 4
+  0x27,0x45,0x45,0x45,0x39, // 53 5
+  0x3C,0x4A,0x49,0x49,0x30, // 54 6
+  0x01,0x71,0x09,0x05,0x03, // 55 7
+  0x36,0x49,0x49,0x49,0x36, // 56 8
+  0x06,0x49,0x49,0x29,0x1E, // 57 9
+  0x00,0x36,0x36,0x00,0x00, // 58 :
+  0x00,0x56,0x36,0x00,0x00, // 59 ;
+  0x00,0x08,0x14,0x22,0x41, // 60 <
+  0x14,0x14,0x14,0x14,0x14, // 61 =
+  0x41,0x22,0x14,0x08,0x00, // 62 >
+  0x02,0x01,0x51,0x09,0x06, // 63 ?
+  0x32,0x49,0x79,0x41,0x3E, // 64 @
+  0x7E,0x11,0x11,0x11,0x7E, // 65 A
+  0x7F,0x49,0x49,0x49,0x36, // 66 B
+  0x3E,0x41,0x41,0x41,0x22, // 67 C
+  0x7F,0x41,0x41,0x22,0x1C, // 68 D
+  0x7F,0x49,0x49,0x49,0x41, // 69 E
+  0x7F,0x09,0x09,0x01,0x01, // 70 F
+  0x3E,0x41,0x41,0x51,0x32, // 71 G
+  0x7F,0x08,0x08,0x08,0x7F, // 72 H
+  0x00,0x41,0x7F,0x41,0x00, // 73 I
+  0x20,0x40,0x41,0x3F,0x01, // 74 J
+  0x7F,0x08,0x14,0x22,0x41, // 75 K
+  0x7F,0x40,0x40,0x40,0x40, // 76 L
+  0x7F,0x02,0x04,0x02,0x7F, // 77 M
+  0x7F,0x04,0x08,0x10,0x7F, // 78 N
+  0x3E,0x41,0x41,0x41,0x3E, // 79 O
+  0x7F,0x09,0x09,0x09,0x06, // 80 P
+  0x3E,0x41,0x51,0x21,0x5E, // 81 Q
+  0x7F,0x09,0x19,0x29,0x46, // 82 R
+  0x46,0x49,0x49,0x49,0x31, // 83 S
+  0x01,0x01,0x7F,0x01,0x01, // 84 T
+  0x3F,0x40,0x40,0x40,0x3F, // 85 U
+  0x1F,0x20,0x40,0x20,0x1F, // 86 V
+  0x7F,0x20,0x18,0x20,0x7F, // 87 W
+  0x63,0x14,0x08,0x14,0x63, // 88 X
+  0x03,0x04,0x78,0x04,0x03, // 89 Y
+  0x61,0x51,0x49,0x45,0x43, // 90 Z
+  0x00,0x00,0x7F,0x41,0x41, // 91 [
+  0x02,0x04,0x08,0x10,0x20, // 92 backslash
+  0x41,0x41,0x7F,0x00,0x00, // 93 ]
+  0x04,0x02,0x01,0x02,0x04, // 94 ^
+  0x40,0x40,0x40,0x40,0x40, // 95 _
+  0x00,0x01,0x02,0x04,0x00, // 96 `
+  0x20,0x54,0x54,0x54,0x78, // 97 a
+  0x7F,0x48,0x44,0x44,0x38, // 98 b
+  0x38,0x44,0x44,0x44,0x20, // 99 c
+  0x38,0x44,0x44,0x48,0x7F, // 100 d
+  0x38,0x54,0x54,0x54,0x18, // 101 e
+  0x08,0x7E,0x09,0x01,0x02, // 102 f
+  0x08,0x14,0x54,0x54,0x3C, // 103 g
+  0x7F,0x08,0x04,0x04,0x78, // 104 h
+  0x00,0x44,0x7D,0x40,0x00, // 105 i
+  0x20,0x40,0x44,0x3D,0x00, // 106 j
+  0x00,0x7F,0x10,0x28,0x44, // 107 k
+  0x00,0x41,0x7F,0x40,0x00, // 108 l
+  0x7C,0x04,0x18,0x04,0x78, // 109 m
+  0x7C,0x08,0x04,0x04,0x78, // 110 n
+  0x38,0x44,0x44,0x44,0x38, // 111 o
+  0x7C,0x14,0x14,0x14,0x08, // 112 p
+  0x08,0x14,0x14,0x18,0x7C, // 113 q
+  0x7C,0x08,0x04,0x04,0x08, // 114 r
+  0x48,0x54,0x54,0x54,0x20, // 115 s
+  0x04,0x3F,0x44,0x40,0x20, // 116 t
+  0x3C,0x40,0x40,0x20,0x7C, // 117 u
+  0x1C,0x20,0x40,0x20,0x1C, // 118 v
+  0x3C,0x40,0x30,0x40,0x3C, // 119 w
+  0x44,0x28,0x10,0x28,0x44, // 120 x
+  0x0C,0x50,0x50,0x50,0x3C, // 121 y
+  0x44,0x64,0x54,0x4C,0x44, // 122 z
+  0x00,0x08,0x36,0x41,0x00, // 123 {
+  0x00,0x00,0x7F,0x00,0x00, // 124 |
+  0x00,0x41,0x36,0x08,0x00, // 125 }
+  0x10,0x08,0x08,0x10,0x08, // 126 ~
+};
+
+#endif
diff --git a/examples/host/midi2_host/src/main.c b/examples/host/midi2_host/src/main.c
new file mode 100644
index 000000000..e23fbfc87
--- /dev/null
+++ b/examples/host/midi2_host/src/main.c
@@ -0,0 +1,326 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+// MIDI 2.0 Host Receiver Example
+//
+// Receives UMP from a MIDI 2.0 Device via PIO-USB Host.
+// SSD1306 OLED (I2C, 128x64) shows boot checklist then received UMP messages.
+
+#include <stdio.h>
+#include <string.h>
+#include "bsp/board_api.h"
+#include "tusb.h"
+#include "class/midi/midi2_host.h"
+#include "class/midi/midi.h"
+#include "display.h"
+
+//--------------------------------------------------------------------+
+// Checklist state
+//--------------------------------------------------------------------+
+
+static checklist_t ck = { 0 };
+static uint32_t note_count = 0;
+static uint8_t  midi2_idx = 0xFF;  // invalid until mount
+
+//--------------------------------------------------------------------+
+// Note name helper
+//--------------------------------------------------------------------+
+
+static const char* NOTE_NAMES[] = {
+  "C", "C#", "D", "D#", "E", "F", "F#", "G", "G#", "A", "A#", "B"
+};
+
+static void note_name(uint8_t pitch, char* buf, size_t len) {
+  int octave = (pitch / 12) - 1;
+  snprintf(buf, len, "%s%d", NOTE_NAMES[pitch % 12], octave);
+}
+
+//--------------------------------------------------------------------+
+// UMP Message Type names
+//--------------------------------------------------------------------+
+
+static const char* mt_name(uint8_t mt) {
+  switch (mt) {
+    case 0x0: return "Utility";
+    case 0x1: return "System";
+    case 0x2: return "M1 CVM";
+    case 0x3: return "SysEx7";
+    case 0x4: return "M2 CVM";
+    case 0x5: return "SysEx8";
+    case 0xD: return "Flex";
+    case 0xF: return "Stream";
+    default:  return "?";
+  }
+}
+
+//--------------------------------------------------------------------+
+// UMP decoder - extract and display MIDI 2.0 messages
+//--------------------------------------------------------------------+
+
+static void decode_ump(const uint32_t* words, uint8_t word_count) {
+  uint8_t mt = (uint8_t)((words[0] >> 28) & 0x0F);
+  char line[64];
+
+  if (mt == 0x4 && word_count >= 2) {
+    // MIDI 2.0 Channel Voice Message
+    uint8_t status  = (uint8_t)((words[0] >> 20) & 0x0F);
+    uint8_t channel = (uint8_t)((words[0] >> 16) & 0x0F);
+
+    switch (status) {
+      case 0x9: { // Note On
+        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
+        uint16_t vel  = (uint16_t)((words[1] >> 16) & 0xFFFF);
+        char nn[6];
+        note_name(pitch, nn, sizeof(nn));
+        snprintf(line, sizeof(line), "NoteOn  %s ch%u vel=0x%04X", nn, channel, vel);
+        display_log(line, 0x07E0); // green
+        note_count++;
+        break;
+      }
+      case 0x8: { // Note Off
+        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
+        char nn[6];
+        note_name(pitch, nn, sizeof(nn));
+        snprintf(line, sizeof(line), "NoteOff %s ch%u", nn, channel);
+        display_log(line, 0x8410); // grey
+        break;
+      }
+      case 0xB: { // CC
+        uint8_t idx = (uint8_t)((words[0] >> 8) & 0x7F);
+        snprintf(line, sizeof(line), "CC%-3u = 0x%08lX", idx, (unsigned long)words[1]);
+        display_log(line, 0x001F); // blue
+        break;
+      }
+      case 0xC: { // Program Change
+        uint8_t prog = (uint8_t)((words[1] >> 24) & 0x7F);
+        snprintf(line, sizeof(line), "ProgChg %u", prog);
+        display_log(line, 0xFFE0); // yellow
+        break;
+      }
+      case 0xE: { // Pitch Bend
+        snprintf(line, sizeof(line), "PBend = 0x%08lX", (unsigned long)words[1]);
+        display_log(line, 0xF81F); // magenta
+        break;
+      }
+      case 0xD: { // Channel Pressure
+        snprintf(line, sizeof(line), "CPress = 0x%08lX", (unsigned long)words[1]);
+        display_log(line, 0xFC10); // orange
+        break;
+      }
+      case 0xA: { // Poly Pressure
+        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
+        char nn[6];
+        note_name(pitch, nn, sizeof(nn));
+        snprintf(line, sizeof(line), "PolyP %s = 0x%08lX", nn, (unsigned long)words[1]);
+        display_log(line, 0xFC10);
+        break;
+      }
+      case 0xF: { // Per-Note Management
+        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
+        uint8_t flags = (uint8_t)(words[0] & 0xFF);
+        snprintf(line, sizeof(line), "PN-Mgmt note=%u flags=0x%02X", pitch, flags);
+        display_log(line, 0x07FF); // cyan
+        break;
+      }
+      default: {
+        snprintf(line, sizeof(line), "M2CVM status=0x%X", status);
+        display_log(line, 0xFFFF);
+        break;
+      }
+    }
+  } else if (mt == 0x0) {
+    // Utility (JR Timestamp, NOOP)
+    uint8_t status = (uint8_t)((words[0] >> 20) & 0x0F);
+    if (status == 0x2) {
+      uint16_t ts = words[0] & 0xFFFF;
+      snprintf(line, sizeof(line), "JR-TS = 0x%04X", ts);
+      display_log(line, 0x8410);
+    }
+  } else {
+    snprintf(line, sizeof(line), "MT=0x%X (%s) w0=0x%08lX",
+             mt, mt_name(mt), (unsigned long)words[0]);
+    display_log(line, 0xFFFF);
+  }
+}
+
+//--------------------------------------------------------------------+
+// MIDI 2.0 Host Callbacks
+//--------------------------------------------------------------------+
+
+void tuh_midi2_descriptor_cb(uint8_t idx, const tuh_midi2_descriptor_cb_t* d) {
+  (void)idx;
+  ck.descriptor_parsed = true;
+  char line[48];
+
+  snprintf(line, sizeof(line), "bcdMSC=0x%02X%02X proto=%s",
+           d->bcdMSC_hi, d->bcdMSC_lo,
+           d->protocol_version ? "MIDI2" : "MIDI1");
+  display_log(line, 0x07E0);
+
+  snprintf(line, sizeof(line), "Cables: RX=%u TX=%u",
+           d->rx_cable_count, d->tx_cable_count);
+  display_log(line, 0x07E0);
+
+  display_checklist_update(&ck);
+}
+
+void tuh_midi2_mount_cb(uint8_t idx, const tuh_midi2_mount_cb_t* m) {
+  midi2_idx = idx;
+  ck.alt_setting_ok = true;
+  ck.mounted = true;
+
+  char line[48];
+  snprintf(line, sizeof(line), "Mounted addr=%u alt=%u",
+           m->daddr, m->alt_setting_active);
+  display_log(line, 0x07E0);
+
+  if (m->protocol_version) {
+    display_log("MIDI 2.0 ready", 0x07E0);
+  } else {
+    display_log("MIDI 1.0 only", 0xFFE0);
+  }
+
+  display_checklist_update(&ck);
+}
+
+void tuh_midi2_rx_cb(uint8_t idx, uint32_t xferred_bytes) {
+  (void)xferred_bytes;
+  if (!ck.receiving) {
+    ck.receiving = true;
+    display_checklist_update(&ck);
+  }
+
+  uint32_t words[16];
+  while (1) {
+    uint32_t n = tuh_midi2_ump_read(idx, words, 16);
+    if (n == 0) break;
+
+    // Decode complete UMP messages
+    uint32_t i = 0;
+    while (i < n) {
+      uint8_t mt = (uint8_t)((words[i] >> 28) & 0x0F);
+      uint8_t wc = midi2_ump_word_count(mt);
+      if (i + wc > n) break;
+      decode_ump(&words[i], wc);
+      i += wc;
+    }
+  }
+}
+
+void tuh_midi2_tx_cb(uint8_t idx, uint32_t xferred_bytes) {
+  (void)idx; (void)xferred_bytes;
+}
+
+void tuh_midi2_umount_cb(uint8_t idx) {
+  (void)idx;
+  midi2_idx = 0xFF;
+  ck.device_connected = false;
+  ck.descriptor_parsed = false;
+  ck.alt_setting_ok = false;
+  ck.mounted = false;
+  ck.receiving = false;
+  note_count = 0;
+
+  display_log("Device disconnected", 0xF800);
+  display_checklist_update(&ck);
+}
+
+//--------------------------------------------------------------------+
+// Main
+//--------------------------------------------------------------------+
+
+int main(void) {
+  board_init();
+
+  display_init();
+
+  ck.pwr_on = true;
+  display_checklist_update(&ck);
+
+  // Init TinyUSB Host (BSP handles PIO-USB configuration via tuh_configure)
+  tusb_rhport_init_t host_init = {
+    .role = TUSB_ROLE_HOST,
+    .speed = TUSB_SPEED_FULL,
+  };
+  tusb_init(BOARD_TUH_RHPORT, &host_init);
+
+  ck.tusb_init = true;
+  ck.bus_active = true;
+  display_checklist_update(&ck);
+
+  char dbg[40];
+  snprintf(dbg, sizeof(dbg), "RHPORT=%u PIO_USB=%u",
+           BOARD_TUH_RHPORT, CFG_TUH_RPI_PIO_USB);
+  display_log(dbg, 0xFFE0);  // yellow
+  display_status("Waiting for device...");
+
+  uint32_t last_status_ms = 0;
+  static uint32_t loop_count = 0;
+
+  while (1) {
+    tuh_task();
+    loop_count++;
+
+    // Update status every 2 seconds
+    uint32_t now = tusb_time_millis_api();
+    if (now - last_status_ms > 2000) {
+      last_status_ms = now;
+      char line[22];
+      if (ck.receiving) {
+        snprintf(line, sizeof(line), "Notes:%lu", (unsigned long)note_count);
+      } else if (ck.mounted) {
+        snprintf(line, sizeof(line), "Mounted OK!");
+      } else if (ck.device_connected) {
+        snprintf(line, sizeof(line), "Dev found, mounting..");
+      } else {
+        snprintf(line, sizeof(line), "Wait.. t=%lu", (unsigned long)(now/1000));
+      }
+      display_status(line);
+    }
+  }
+
+  return 0;
+}
+
+// Generic USB device mount/unmount (any class)
+void tuh_mount_cb(uint8_t daddr) {
+  char line[32];
+  uint16_t vid, pid;
+  tuh_vid_pid_get(daddr, &vid, &pid);
+  snprintf(line, sizeof(line), "USB %04X:%04X a%u", vid, pid, daddr);
+  display_log(line, 0x07E0);
+  ck.device_connected = true;
+  display_checklist_update(&ck);
+}
+
+void tuh_umount_cb(uint8_t daddr) {
+  (void)daddr;
+  display_log("USB disconnected", 0xF800);
+  ck.device_connected = false;
+  ck.descriptor_parsed = false;
+  ck.alt_setting_ok = false;
+  ck.mounted = false;
+  ck.receiving = false;
+  display_checklist_update(&ck);
+}
diff --git a/examples/host/midi2_host/src/tusb_config.h b/examples/host/midi2_host/src/tusb_config.h
new file mode 100644
index 000000000..650df97e1
--- /dev/null
+++ b/examples/host/midi2_host/src/tusb_config.h
@@ -0,0 +1,91 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+#ifndef TUSB_CONFIG_H_
+#define TUSB_CONFIG_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//--------------------------------------------------------------------
+// Common Configuration
+//--------------------------------------------------------------------
+
+#ifndef CFG_TUSB_MCU
+#error CFG_TUSB_MCU must be defined
+#endif
+
+#ifndef CFG_TUSB_OS
+#define CFG_TUSB_OS           OPT_OS_NONE
+#endif
+
+#ifndef CFG_TUSB_DEBUG
+#define CFG_TUSB_DEBUG        0
+#endif
+
+#ifndef CFG_TUH_MEM_SECTION
+#define CFG_TUH_MEM_SECTION
+#endif
+
+#ifndef CFG_TUH_MEM_ALIGN
+#define CFG_TUH_MEM_ALIGN     __attribute__ ((aligned(4)))
+#endif
+
+//--------------------------------------------------------------------
+// Host Configuration
+// Waveshare RP2350-USB-A: PIO-USB on GP12/GP13 (USB-A Host port)
+//--------------------------------------------------------------------
+
+#define CFG_TUH_ENABLED       1
+
+// PIO-USB Host on rhport 1 (USB-A connector on GP12/GP13)
+#define CFG_TUH_RPI_PIO_USB   1
+#define BOARD_TUH_RHPORT      1
+
+#ifndef BOARD_TUH_MAX_SPEED
+#define BOARD_TUH_MAX_SPEED   OPT_MODE_FULL_SPEED
+#endif
+
+#define CFG_TUH_MAX_SPEED     BOARD_TUH_MAX_SPEED
+
+//--------------------------------------------------------------------
+// Driver Configuration
+//--------------------------------------------------------------------
+
+#define CFG_TUH_ENUMERATION_BUFSIZE 256
+
+#define CFG_TUH_HUB                0
+#define CFG_TUH_DEVICE_MAX         1
+
+// MIDI 2.0 Host
+#define CFG_TUH_MIDI2              1
+#define CFG_TUH_MIDI2_RX_BUFSIZE   512
+#define CFG_TUH_MIDI2_TX_BUFSIZE   512
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
new file mode 100644
index 000000000..e888c7fb3
--- /dev/null
+++ b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
@@ -0,0 +1,2 @@
+set(PICO_PLATFORM rp2350-arm-s)
+set(PICO_BOARD waveshare_rp2350_usb_a)
diff --git a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h
new file mode 100644
index 000000000..0af8a695f
--- /dev/null
+++ b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h
@@ -0,0 +1,49 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2026 Saulo Verissimo
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   name: Waveshare RP2350-USB-A
+   url: https://www.waveshare.com/wiki/RP2350-USB-A
+*/
+
+#ifndef TUSB_BOARD_H
+#define TUSB_BOARD_H
+
+#ifdef __cplusplus
+ extern "C" {
+#endif
+
+//--------------------------------------------------------------------+
+// PIO_USB
+//--------------------------------------------------------------------+
+// Waveshare RP2350-USB-A: PIO-USB on GP12 (D+) / GP13 (D-)
+// PICO_DEFAULT_PIO_USB_DP_PIN already defined in SDK board header
+
+#ifdef __cplusplus
+ }
+#endif
+
+#endif
-- 
cgit v1.3.1


From b4880761bcadbee86d047e0a3b329859926caad5 Mon Sep 17 00:00:00 2001
From: Saulo Veríssimo <sauloverissimo@gmail.com>
Date: Tue, 7 Apr 2026 23:46:10 -0300
Subject: refactor: replace midi2_host (Waveshare) with midi2_host_feather

Remove the Waveshare RP2350-USB-A host example and board definition.
The Feather RP2040 USB Host is the TinyUSB reference board for
PIO-USB host and does not require the CFG_TUSB_DEBUG workaround
needed by the Waveshare (R13 pull-up issue).

One host example is sufficient for the PR. The Feather variant has
an improved display with splash, spinner, and 6-line live view.
---
 examples/host/CMakeLists.txt                       |   2 +-
 examples/host/midi2_host/CMakeLists.txt            |  38 ---
 examples/host/midi2_host/Makefile                  |  27 --
 examples/host/midi2_host/src/display.c             | 221 --------------
 examples/host/midi2_host/src/display.h             |  54 ----
 examples/host/midi2_host/src/font5x7.h             | 107 -------
 examples/host/midi2_host/src/main.c                | 326 ---------------------
 examples/host/midi2_host/src/tusb_config.h         |  91 ------
 .../boards/waveshare_rp2350_usb_a/board.cmake      |   2 -
 .../rp2040/boards/waveshare_rp2350_usb_a/board.h   |  49 ----
 10 files changed, 1 insertion(+), 916 deletions(-)
 delete mode 100644 examples/host/midi2_host/CMakeLists.txt
 delete mode 100644 examples/host/midi2_host/Makefile
 delete mode 100644 examples/host/midi2_host/src/display.c
 delete mode 100644 examples/host/midi2_host/src/display.h
 delete mode 100644 examples/host/midi2_host/src/font5x7.h
 delete mode 100644 examples/host/midi2_host/src/main.c
 delete mode 100644 examples/host/midi2_host/src/tusb_config.h
 delete mode 100644 hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
 delete mode 100644 hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h

(limited to 'hw')

diff --git a/examples/host/CMakeLists.txt b/examples/host/CMakeLists.txt
index 7c74e3c73..2cf2c10af 100644
--- a/examples/host/CMakeLists.txt
+++ b/examples/host/CMakeLists.txt
@@ -13,7 +13,7 @@ set(EXAMPLE_LIST
   device_info
   hid_controller
   midi_rx
-  midi2_host
+  midi2_host_feather
   msc_file_explorer
   msc_file_explorer_freertos
   )
diff --git a/examples/host/midi2_host/CMakeLists.txt b/examples/host/midi2_host/CMakeLists.txt
deleted file mode 100644
index cd70d122a..000000000
--- a/examples/host/midi2_host/CMakeLists.txt
+++ /dev/null
@@ -1,38 +0,0 @@
-cmake_minimum_required(VERSION 3.20)
-
-include(${CMAKE_CURRENT_SOURCE_DIR}/../../../hw/bsp/family_support.cmake)
-
-project(midi2_host C CXX ASM)
-
-family_initialize_project(${PROJECT_NAME} ${CMAKE_CURRENT_LIST_DIR})
-
-# This example requires PIO-USB and Pico SDK (I2C, SSD1306 display)
-if(NOT FAMILY STREQUAL "rp2040")
-  return()
-endif()
-
-add_executable(${PROJECT_NAME})
-
-target_sources(${PROJECT_NAME} PUBLIC
-  ${CMAKE_CURRENT_SOURCE_DIR}/src/main.c
-  ${CMAKE_CURRENT_SOURCE_DIR}/src/display.c
-)
-
-target_include_directories(${PROJECT_NAME} PUBLIC
-  ${CMAKE_CURRENT_SOURCE_DIR}/src
-)
-
-family_configure_host_example(${PROJECT_NAME} noos)
-
-# Waveshare RP2350-USB-A: PIO-USB on GP12/GP13
-target_compile_definitions(${PROJECT_NAME} PRIVATE
-  PIO_USB_DP_PIN_DEFAULT=12
-)
-target_compile_options(${PROJECT_NAME} PRIVATE
-  -Wno-type-limits
-)
-
-# SSD1306 display (I2C)
-target_link_libraries(${PROJECT_NAME} PUBLIC
-  hardware_i2c
-)
diff --git a/examples/host/midi2_host/Makefile b/examples/host/midi2_host/Makefile
deleted file mode 100644
index 2b4660516..000000000
--- a/examples/host/midi2_host/Makefile
+++ /dev/null
@@ -1,27 +0,0 @@
-# This example requires RP2040/RP2350 (PIO-USB, Pico SDK I2C, SSD1306 display)
-ifeq (,$(findstring rp2040,$(FAMILY)))
-$(info Skipping midi2_host: requires FAMILY=rp2040)
-all:
-	@:
-.DEFAULT:
-	@:
-else
-
-include ../../../hw/bsp/family_support.mk
-
-INC += \
-	src \
-
-# Example source
-EXAMPLE_SOURCE += \
-  src/main.c \
-  src/display.c \
-
-SRC_C += $(addprefix $(EXAMPLE_PATH)/, $(EXAMPLE_SOURCE))
-
-# Suppress pre-existing warning
-CFLAGS_GCC += -Wno-type-limits
-
-include ../../../hw/bsp/family_rules.mk
-
-endif
diff --git a/examples/host/midi2_host/src/display.c b/examples/host/midi2_host/src/display.c
deleted file mode 100644
index 4745c2961..000000000
--- a/examples/host/midi2_host/src/display.c
+++ /dev/null
@@ -1,221 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2026 Saulo Verissimo
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-// SSD1306 OLED display driver (128x64, I2C) for MIDI 2.0 Host example.
-// Minimal text-only implementation, no graphics library.
-// I2C0: SDA = GP4, SCL = GP5, Address = 0x3C
-
-#include "display.h"
-#include <stdio.h>
-#include <string.h>
-#include "pico/stdlib.h"
-#include "hardware/i2c.h"
-#include "hardware/gpio.h"
-
-#define I2C_PORT     i2c0
-#define I2C_SDA      4
-#define I2C_SCL      5
-#define I2C_FREQ     400000
-#define SSD1306_ADDR 0x3C
-
-#define SCR_W        128
-#define SCR_H        64
-#define PAGES        (SCR_H / 8)   // 8 pages
-#define CHARS_PER_LINE 21          // 128 / 6 = 21 chars
-
-// Framebuffer
-static uint8_t fb[SCR_W * PAGES];
-
-// Log buffer
-#define LOG_LINES    3
-static char log_lines[LOG_LINES][CHARS_PER_LINE + 1];
-static int log_count = 0;
-
-// Status line
-static char status_text[CHARS_PER_LINE + 1] = "";
-
-//--------------------------------------------------------------------+
-// Minimal 5x7 font (ASCII 32-126)
-//--------------------------------------------------------------------+
-#include "font5x7.h"
-
-//--------------------------------------------------------------------+
-// SSD1306 I2C commands
-//--------------------------------------------------------------------+
-
-static void ssd_cmd(uint8_t cmd) {
-  uint8_t buf[2] = { 0x00, cmd };  // Co=0, D/C=0
-  i2c_write_blocking(I2C_PORT, SSD1306_ADDR, buf, 2, false);
-}
-
-static void ssd_data(const uint8_t* data, size_t len) {
-  uint8_t buf[SCR_W + 1];
-  buf[0] = 0x40;  // Co=0, D/C=1
-  size_t chunk = (len > SCR_W) ? SCR_W : len;
-  memcpy(buf + 1, data, chunk);
-  i2c_write_blocking(I2C_PORT, SSD1306_ADDR, buf, chunk + 1, false);
-}
-
-static void ssd_flush(void) {
-  ssd_cmd(0x21); ssd_cmd(0); ssd_cmd(127);  // Column range
-  ssd_cmd(0x22); ssd_cmd(0); ssd_cmd(7);    // Page range
-  for (int page = 0; page < PAGES; page++) {
-    ssd_data(&fb[page * SCR_W], SCR_W);
-  }
-}
-
-//--------------------------------------------------------------------+
-// Framebuffer drawing
-//--------------------------------------------------------------------+
-
-static void fb_clear(void) {
-  memset(fb, 0, sizeof(fb));
-}
-
-static void fb_char(int x, int y, char c) {
-  if (c < 32 || c > 126) c = '?';
-  const uint8_t* glyph = font5x7 + (c - 32) * 5;
-  int page = y / 8;
-  int bit_offset = y % 8;
-
-  if (page >= PAGES || x + 5 > SCR_W) return;
-
-  for (int col = 0; col < 5; col++) {
-    uint8_t column_data = glyph[col];
-    fb[(page * SCR_W) + x + col] |= (uint8_t)(column_data << bit_offset);
-    if (bit_offset > 0 && page + 1 < PAGES) {
-      fb[((page + 1) * SCR_W) + x + col] |= (uint8_t)(column_data >> (8 - bit_offset));
-    }
-  }
-}
-
-static void fb_string(int x, int y, const char* str) {
-  while (*str) {
-    fb_char(x, y, *str);
-    x += 6;
-    if (x + 6 > SCR_W) break;
-    str++;
-  }
-}
-
-//--------------------------------------------------------------------+
-// Display API
-//--------------------------------------------------------------------+
-
-void display_init(void) {
-  i2c_init(I2C_PORT, I2C_FREQ);
-  gpio_set_function(I2C_SDA, GPIO_FUNC_I2C);
-  gpio_set_function(I2C_SCL, GPIO_FUNC_I2C);
-  gpio_pull_up(I2C_SDA);
-  gpio_pull_up(I2C_SCL);
-
-  sleep_ms(100);
-
-  // SSD1306 init sequence
-  ssd_cmd(0xAE);        // Display off
-  ssd_cmd(0xD5); ssd_cmd(0x80);  // Clock div
-  ssd_cmd(0xA8); ssd_cmd(0x3F);  // Multiplex 64
-  ssd_cmd(0xD3); ssd_cmd(0x00);  // Display offset
-  ssd_cmd(0x40);        // Start line 0
-  ssd_cmd(0x8D); ssd_cmd(0x14);  // Charge pump on
-  ssd_cmd(0x20); ssd_cmd(0x00);  // Horizontal addressing
-  ssd_cmd(0xA1);        // Segment remap
-  ssd_cmd(0xC8);        // COM scan direction
-  ssd_cmd(0xDA); ssd_cmd(0x12);  // COM pins
-  ssd_cmd(0x81); ssd_cmd(0xCF);  // Contrast
-  ssd_cmd(0xD9); ssd_cmd(0xF1);  // Pre-charge
-  ssd_cmd(0xDB); ssd_cmd(0x40);  // VCOMH deselect
-  ssd_cmd(0xA4);        // Display from RAM
-  ssd_cmd(0xA6);        // Normal display
-  ssd_cmd(0xAF);        // Display on
-
-  fb_clear();
-  fb_string(0, 0, "MIDI 2.0 Host");
-  ssd_flush();
-}
-
-void display_checklist_update(const checklist_t* ck) {
-  struct { const char* label; bool ok; } items[] = {
-    { "PWR",       ck->pwr_on },
-    { "TinyUSB",   ck->tusb_init },
-    { "USB bus",   ck->bus_active },
-    { "Device",    ck->device_connected },
-    { "Descript",  ck->descriptor_parsed },
-    { "Alt1 UMP",  ck->alt_setting_ok },
-    { "Mount",     ck->mounted },
-    { "RX UMP",    ck->receiving },
-  };
-
-  // Clear checklist area (lines 1-4, two columns)
-  for (int p = 1; p <= 4; p++) {
-    memset(&fb[p * SCR_W], 0, SCR_W);
-  }
-
-  for (int i = 0; i < 8; i++) {
-    int col = (i < 4) ? 0 : 64;
-    int row = (i < 4) ? i : i - 4;
-    int y = 9 + row * 8;
-    char line[12];
-    snprintf(line, sizeof(line), "%s %s", items[i].ok ? "OK" : "..", items[i].label);
-    fb_string(col, y, line);
-  }
-
-  ssd_flush();
-}
-
-void display_log(const char* text, uint16_t color) {
-  (void)color;  // SSD1306 is monochrome
-
-  if (log_count >= LOG_LINES) {
-    for (int i = 0; i < LOG_LINES - 1; i++) {
-      strncpy(log_lines[i], log_lines[i + 1], CHARS_PER_LINE);
-      log_lines[i][CHARS_PER_LINE] = '\0';
-    }
-    log_count = LOG_LINES - 1;
-  }
-
-  strncpy(log_lines[log_count], text, CHARS_PER_LINE);
-  log_lines[log_count][CHARS_PER_LINE] = '\0';
-  log_count++;
-
-  // Draw log area (pages 5-6, y=40-55)
-  memset(&fb[5 * SCR_W], 0, SCR_W);
-  memset(&fb[6 * SCR_W], 0, SCR_W);
-
-  for (int i = 0; i < log_count && i < LOG_LINES; i++) {
-    fb_string(0, 41 + i * 8, log_lines[i]);
-  }
-
-  ssd_flush();
-}
-
-void display_status(const char* text) {
-  strncpy(status_text, text, CHARS_PER_LINE);
-  status_text[CHARS_PER_LINE] = '\0';
-
-  // Status on last page (y=56)
-  memset(&fb[7 * SCR_W], 0, SCR_W);
-  fb_string(0, 56, status_text);
-  ssd_flush();
-}
diff --git a/examples/host/midi2_host/src/display.h b/examples/host/midi2_host/src/display.h
deleted file mode 100644
index a8b0a4b5e..000000000
--- a/examples/host/midi2_host/src/display.h
+++ /dev/null
@@ -1,54 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2026 Saulo Verissimo
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef DISPLAY_H_
-#define DISPLAY_H_
-
-#include <stdint.h>
-#include <stdbool.h>
-
-typedef struct {
-  bool pwr_on;
-  bool tusb_init;
-  bool bus_active;
-  bool device_connected;
-  bool descriptor_parsed;
-  bool alt_setting_ok;
-  bool mounted;
-  bool receiving;
-} checklist_t;
-
-// Initialize SSD1306 display (I2C on GP4/GP5)
-void display_init(void);
-
-// Redraw the checklist area (top portion)
-void display_checklist_update(const checklist_t* ck);
-
-// Add a line to the scrolling log area
-void display_log(const char* text, uint16_t color);
-
-// Update the status bar (bottom line)
-void display_status(const char* text);
-
-#endif
diff --git a/examples/host/midi2_host/src/font5x7.h b/examples/host/midi2_host/src/font5x7.h
deleted file mode 100644
index e515faac1..000000000
--- a/examples/host/midi2_host/src/font5x7.h
+++ /dev/null
@@ -1,107 +0,0 @@
-// Minimal 5x7 font, ASCII 32-126. Public domain.
-// 5 bytes per character (5 columns, 7 rows, LSB=top row)
-
-#ifndef FONT5X7_H_
-#define FONT5X7_H_
-
-#include <stdint.h>
-
-static const uint8_t font5x7[] = {
-  0x00,0x00,0x00,0x00,0x00, // 32 (space)
-  0x00,0x00,0x5F,0x00,0x00, // 33 !
-  0x00,0x07,0x00,0x07,0x00, // 34 "
-  0x14,0x7F,0x14,0x7F,0x14, // 35 #
-  0x24,0x2A,0x7F,0x2A,0x12, // 36 $
-  0x23,0x13,0x08,0x64,0x62, // 37 %
-  0x36,0x49,0x55,0x22,0x50, // 38 &
-  0x00,0x05,0x03,0x00,0x00, // 39 '
-  0x00,0x1C,0x22,0x41,0x00, // 40 (
-  0x00,0x41,0x22,0x1C,0x00, // 41 )
-  0x08,0x2A,0x1C,0x2A,0x08, // 42 *
-  0x08,0x08,0x3E,0x08,0x08, // 43 +
-  0x00,0x50,0x30,0x00,0x00, // 44 ,
-  0x08,0x08,0x08,0x08,0x08, // 45 -
-  0x00,0x60,0x60,0x00,0x00, // 46 .
-  0x20,0x10,0x08,0x04,0x02, // 47 /
-  0x3E,0x51,0x49,0x45,0x3E, // 48 0
-  0x00,0x42,0x7F,0x40,0x00, // 49 1
-  0x42,0x61,0x51,0x49,0x46, // 50 2
-  0x21,0x41,0x45,0x4B,0x31, // 51 3
-  0x18,0x14,0x12,0x7F,0x10, // 52 4
-  0x27,0x45,0x45,0x45,0x39, // 53 5
-  0x3C,0x4A,0x49,0x49,0x30, // 54 6
-  0x01,0x71,0x09,0x05,0x03, // 55 7
-  0x36,0x49,0x49,0x49,0x36, // 56 8
-  0x06,0x49,0x49,0x29,0x1E, // 57 9
-  0x00,0x36,0x36,0x00,0x00, // 58 :
-  0x00,0x56,0x36,0x00,0x00, // 59 ;
-  0x00,0x08,0x14,0x22,0x41, // 60 <
-  0x14,0x14,0x14,0x14,0x14, // 61 =
-  0x41,0x22,0x14,0x08,0x00, // 62 >
-  0x02,0x01,0x51,0x09,0x06, // 63 ?
-  0x32,0x49,0x79,0x41,0x3E, // 64 @
-  0x7E,0x11,0x11,0x11,0x7E, // 65 A
-  0x7F,0x49,0x49,0x49,0x36, // 66 B
-  0x3E,0x41,0x41,0x41,0x22, // 67 C
-  0x7F,0x41,0x41,0x22,0x1C, // 68 D
-  0x7F,0x49,0x49,0x49,0x41, // 69 E
-  0x7F,0x09,0x09,0x01,0x01, // 70 F
-  0x3E,0x41,0x41,0x51,0x32, // 71 G
-  0x7F,0x08,0x08,0x08,0x7F, // 72 H
-  0x00,0x41,0x7F,0x41,0x00, // 73 I
-  0x20,0x40,0x41,0x3F,0x01, // 74 J
-  0x7F,0x08,0x14,0x22,0x41, // 75 K
-  0x7F,0x40,0x40,0x40,0x40, // 76 L
-  0x7F,0x02,0x04,0x02,0x7F, // 77 M
-  0x7F,0x04,0x08,0x10,0x7F, // 78 N
-  0x3E,0x41,0x41,0x41,0x3E, // 79 O
-  0x7F,0x09,0x09,0x09,0x06, // 80 P
-  0x3E,0x41,0x51,0x21,0x5E, // 81 Q
-  0x7F,0x09,0x19,0x29,0x46, // 82 R
-  0x46,0x49,0x49,0x49,0x31, // 83 S
-  0x01,0x01,0x7F,0x01,0x01, // 84 T
-  0x3F,0x40,0x40,0x40,0x3F, // 85 U
-  0x1F,0x20,0x40,0x20,0x1F, // 86 V
-  0x7F,0x20,0x18,0x20,0x7F, // 87 W
-  0x63,0x14,0x08,0x14,0x63, // 88 X
-  0x03,0x04,0x78,0x04,0x03, // 89 Y
-  0x61,0x51,0x49,0x45,0x43, // 90 Z
-  0x00,0x00,0x7F,0x41,0x41, // 91 [
-  0x02,0x04,0x08,0x10,0x20, // 92 backslash
-  0x41,0x41,0x7F,0x00,0x00, // 93 ]
-  0x04,0x02,0x01,0x02,0x04, // 94 ^
-  0x40,0x40,0x40,0x40,0x40, // 95 _
-  0x00,0x01,0x02,0x04,0x00, // 96 `
-  0x20,0x54,0x54,0x54,0x78, // 97 a
-  0x7F,0x48,0x44,0x44,0x38, // 98 b
-  0x38,0x44,0x44,0x44,0x20, // 99 c
-  0x38,0x44,0x44,0x48,0x7F, // 100 d
-  0x38,0x54,0x54,0x54,0x18, // 101 e
-  0x08,0x7E,0x09,0x01,0x02, // 102 f
-  0x08,0x14,0x54,0x54,0x3C, // 103 g
-  0x7F,0x08,0x04,0x04,0x78, // 104 h
-  0x00,0x44,0x7D,0x40,0x00, // 105 i
-  0x20,0x40,0x44,0x3D,0x00, // 106 j
-  0x00,0x7F,0x10,0x28,0x44, // 107 k
-  0x00,0x41,0x7F,0x40,0x00, // 108 l
-  0x7C,0x04,0x18,0x04,0x78, // 109 m
-  0x7C,0x08,0x04,0x04,0x78, // 110 n
-  0x38,0x44,0x44,0x44,0x38, // 111 o
-  0x7C,0x14,0x14,0x14,0x08, // 112 p
-  0x08,0x14,0x14,0x18,0x7C, // 113 q
-  0x7C,0x08,0x04,0x04,0x08, // 114 r
-  0x48,0x54,0x54,0x54,0x20, // 115 s
-  0x04,0x3F,0x44,0x40,0x20, // 116 t
-  0x3C,0x40,0x40,0x20,0x7C, // 117 u
-  0x1C,0x20,0x40,0x20,0x1C, // 118 v
-  0x3C,0x40,0x30,0x40,0x3C, // 119 w
-  0x44,0x28,0x10,0x28,0x44, // 120 x
-  0x0C,0x50,0x50,0x50,0x3C, // 121 y
-  0x44,0x64,0x54,0x4C,0x44, // 122 z
-  0x00,0x08,0x36,0x41,0x00, // 123 {
-  0x00,0x00,0x7F,0x00,0x00, // 124 |
-  0x00,0x41,0x36,0x08,0x00, // 125 }
-  0x10,0x08,0x08,0x10,0x08, // 126 ~
-};
-
-#endif
diff --git a/examples/host/midi2_host/src/main.c b/examples/host/midi2_host/src/main.c
deleted file mode 100644
index e23fbfc87..000000000
--- a/examples/host/midi2_host/src/main.c
+++ /dev/null
@@ -1,326 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2026 Saulo Verissimo
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-// MIDI 2.0 Host Receiver Example
-//
-// Receives UMP from a MIDI 2.0 Device via PIO-USB Host.
-// SSD1306 OLED (I2C, 128x64) shows boot checklist then received UMP messages.
-
-#include <stdio.h>
-#include <string.h>
-#include "bsp/board_api.h"
-#include "tusb.h"
-#include "class/midi/midi2_host.h"
-#include "class/midi/midi.h"
-#include "display.h"
-
-//--------------------------------------------------------------------+
-// Checklist state
-//--------------------------------------------------------------------+
-
-static checklist_t ck = { 0 };
-static uint32_t note_count = 0;
-static uint8_t  midi2_idx = 0xFF;  // invalid until mount
-
-//--------------------------------------------------------------------+
-// Note name helper
-//--------------------------------------------------------------------+
-
-static const char* NOTE_NAMES[] = {
-  "C", "C#", "D", "D#", "E", "F", "F#", "G", "G#", "A", "A#", "B"
-};
-
-static void note_name(uint8_t pitch, char* buf, size_t len) {
-  int octave = (pitch / 12) - 1;
-  snprintf(buf, len, "%s%d", NOTE_NAMES[pitch % 12], octave);
-}
-
-//--------------------------------------------------------------------+
-// UMP Message Type names
-//--------------------------------------------------------------------+
-
-static const char* mt_name(uint8_t mt) {
-  switch (mt) {
-    case 0x0: return "Utility";
-    case 0x1: return "System";
-    case 0x2: return "M1 CVM";
-    case 0x3: return "SysEx7";
-    case 0x4: return "M2 CVM";
-    case 0x5: return "SysEx8";
-    case 0xD: return "Flex";
-    case 0xF: return "Stream";
-    default:  return "?";
-  }
-}
-
-//--------------------------------------------------------------------+
-// UMP decoder - extract and display MIDI 2.0 messages
-//--------------------------------------------------------------------+
-
-static void decode_ump(const uint32_t* words, uint8_t word_count) {
-  uint8_t mt = (uint8_t)((words[0] >> 28) & 0x0F);
-  char line[64];
-
-  if (mt == 0x4 && word_count >= 2) {
-    // MIDI 2.0 Channel Voice Message
-    uint8_t status  = (uint8_t)((words[0] >> 20) & 0x0F);
-    uint8_t channel = (uint8_t)((words[0] >> 16) & 0x0F);
-
-    switch (status) {
-      case 0x9: { // Note On
-        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
-        uint16_t vel  = (uint16_t)((words[1] >> 16) & 0xFFFF);
-        char nn[6];
-        note_name(pitch, nn, sizeof(nn));
-        snprintf(line, sizeof(line), "NoteOn  %s ch%u vel=0x%04X", nn, channel, vel);
-        display_log(line, 0x07E0); // green
-        note_count++;
-        break;
-      }
-      case 0x8: { // Note Off
-        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
-        char nn[6];
-        note_name(pitch, nn, sizeof(nn));
-        snprintf(line, sizeof(line), "NoteOff %s ch%u", nn, channel);
-        display_log(line, 0x8410); // grey
-        break;
-      }
-      case 0xB: { // CC
-        uint8_t idx = (uint8_t)((words[0] >> 8) & 0x7F);
-        snprintf(line, sizeof(line), "CC%-3u = 0x%08lX", idx, (unsigned long)words[1]);
-        display_log(line, 0x001F); // blue
-        break;
-      }
-      case 0xC: { // Program Change
-        uint8_t prog = (uint8_t)((words[1] >> 24) & 0x7F);
-        snprintf(line, sizeof(line), "ProgChg %u", prog);
-        display_log(line, 0xFFE0); // yellow
-        break;
-      }
-      case 0xE: { // Pitch Bend
-        snprintf(line, sizeof(line), "PBend = 0x%08lX", (unsigned long)words[1]);
-        display_log(line, 0xF81F); // magenta
-        break;
-      }
-      case 0xD: { // Channel Pressure
-        snprintf(line, sizeof(line), "CPress = 0x%08lX", (unsigned long)words[1]);
-        display_log(line, 0xFC10); // orange
-        break;
-      }
-      case 0xA: { // Poly Pressure
-        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
-        char nn[6];
-        note_name(pitch, nn, sizeof(nn));
-        snprintf(line, sizeof(line), "PolyP %s = 0x%08lX", nn, (unsigned long)words[1]);
-        display_log(line, 0xFC10);
-        break;
-      }
-      case 0xF: { // Per-Note Management
-        uint8_t pitch = (uint8_t)((words[0] >> 8) & 0x7F);
-        uint8_t flags = (uint8_t)(words[0] & 0xFF);
-        snprintf(line, sizeof(line), "PN-Mgmt note=%u flags=0x%02X", pitch, flags);
-        display_log(line, 0x07FF); // cyan
-        break;
-      }
-      default: {
-        snprintf(line, sizeof(line), "M2CVM status=0x%X", status);
-        display_log(line, 0xFFFF);
-        break;
-      }
-    }
-  } else if (mt == 0x0) {
-    // Utility (JR Timestamp, NOOP)
-    uint8_t status = (uint8_t)((words[0] >> 20) & 0x0F);
-    if (status == 0x2) {
-      uint16_t ts = words[0] & 0xFFFF;
-      snprintf(line, sizeof(line), "JR-TS = 0x%04X", ts);
-      display_log(line, 0x8410);
-    }
-  } else {
-    snprintf(line, sizeof(line), "MT=0x%X (%s) w0=0x%08lX",
-             mt, mt_name(mt), (unsigned long)words[0]);
-    display_log(line, 0xFFFF);
-  }
-}
-
-//--------------------------------------------------------------------+
-// MIDI 2.0 Host Callbacks
-//--------------------------------------------------------------------+
-
-void tuh_midi2_descriptor_cb(uint8_t idx, const tuh_midi2_descriptor_cb_t* d) {
-  (void)idx;
-  ck.descriptor_parsed = true;
-  char line[48];
-
-  snprintf(line, sizeof(line), "bcdMSC=0x%02X%02X proto=%s",
-           d->bcdMSC_hi, d->bcdMSC_lo,
-           d->protocol_version ? "MIDI2" : "MIDI1");
-  display_log(line, 0x07E0);
-
-  snprintf(line, sizeof(line), "Cables: RX=%u TX=%u",
-           d->rx_cable_count, d->tx_cable_count);
-  display_log(line, 0x07E0);
-
-  display_checklist_update(&ck);
-}
-
-void tuh_midi2_mount_cb(uint8_t idx, const tuh_midi2_mount_cb_t* m) {
-  midi2_idx = idx;
-  ck.alt_setting_ok = true;
-  ck.mounted = true;
-
-  char line[48];
-  snprintf(line, sizeof(line), "Mounted addr=%u alt=%u",
-           m->daddr, m->alt_setting_active);
-  display_log(line, 0x07E0);
-
-  if (m->protocol_version) {
-    display_log("MIDI 2.0 ready", 0x07E0);
-  } else {
-    display_log("MIDI 1.0 only", 0xFFE0);
-  }
-
-  display_checklist_update(&ck);
-}
-
-void tuh_midi2_rx_cb(uint8_t idx, uint32_t xferred_bytes) {
-  (void)xferred_bytes;
-  if (!ck.receiving) {
-    ck.receiving = true;
-    display_checklist_update(&ck);
-  }
-
-  uint32_t words[16];
-  while (1) {
-    uint32_t n = tuh_midi2_ump_read(idx, words, 16);
-    if (n == 0) break;
-
-    // Decode complete UMP messages
-    uint32_t i = 0;
-    while (i < n) {
-      uint8_t mt = (uint8_t)((words[i] >> 28) & 0x0F);
-      uint8_t wc = midi2_ump_word_count(mt);
-      if (i + wc > n) break;
-      decode_ump(&words[i], wc);
-      i += wc;
-    }
-  }
-}
-
-void tuh_midi2_tx_cb(uint8_t idx, uint32_t xferred_bytes) {
-  (void)idx; (void)xferred_bytes;
-}
-
-void tuh_midi2_umount_cb(uint8_t idx) {
-  (void)idx;
-  midi2_idx = 0xFF;
-  ck.device_connected = false;
-  ck.descriptor_parsed = false;
-  ck.alt_setting_ok = false;
-  ck.mounted = false;
-  ck.receiving = false;
-  note_count = 0;
-
-  display_log("Device disconnected", 0xF800);
-  display_checklist_update(&ck);
-}
-
-//--------------------------------------------------------------------+
-// Main
-//--------------------------------------------------------------------+
-
-int main(void) {
-  board_init();
-
-  display_init();
-
-  ck.pwr_on = true;
-  display_checklist_update(&ck);
-
-  // Init TinyUSB Host (BSP handles PIO-USB configuration via tuh_configure)
-  tusb_rhport_init_t host_init = {
-    .role = TUSB_ROLE_HOST,
-    .speed = TUSB_SPEED_FULL,
-  };
-  tusb_init(BOARD_TUH_RHPORT, &host_init);
-
-  ck.tusb_init = true;
-  ck.bus_active = true;
-  display_checklist_update(&ck);
-
-  char dbg[40];
-  snprintf(dbg, sizeof(dbg), "RHPORT=%u PIO_USB=%u",
-           BOARD_TUH_RHPORT, CFG_TUH_RPI_PIO_USB);
-  display_log(dbg, 0xFFE0);  // yellow
-  display_status("Waiting for device...");
-
-  uint32_t last_status_ms = 0;
-  static uint32_t loop_count = 0;
-
-  while (1) {
-    tuh_task();
-    loop_count++;
-
-    // Update status every 2 seconds
-    uint32_t now = tusb_time_millis_api();
-    if (now - last_status_ms > 2000) {
-      last_status_ms = now;
-      char line[22];
-      if (ck.receiving) {
-        snprintf(line, sizeof(line), "Notes:%lu", (unsigned long)note_count);
-      } else if (ck.mounted) {
-        snprintf(line, sizeof(line), "Mounted OK!");
-      } else if (ck.device_connected) {
-        snprintf(line, sizeof(line), "Dev found, mounting..");
-      } else {
-        snprintf(line, sizeof(line), "Wait.. t=%lu", (unsigned long)(now/1000));
-      }
-      display_status(line);
-    }
-  }
-
-  return 0;
-}
-
-// Generic USB device mount/unmount (any class)
-void tuh_mount_cb(uint8_t daddr) {
-  char line[32];
-  uint16_t vid, pid;
-  tuh_vid_pid_get(daddr, &vid, &pid);
-  snprintf(line, sizeof(line), "USB %04X:%04X a%u", vid, pid, daddr);
-  display_log(line, 0x07E0);
-  ck.device_connected = true;
-  display_checklist_update(&ck);
-}
-
-void tuh_umount_cb(uint8_t daddr) {
-  (void)daddr;
-  display_log("USB disconnected", 0xF800);
-  ck.device_connected = false;
-  ck.descriptor_parsed = false;
-  ck.alt_setting_ok = false;
-  ck.mounted = false;
-  ck.receiving = false;
-  display_checklist_update(&ck);
-}
diff --git a/examples/host/midi2_host/src/tusb_config.h b/examples/host/midi2_host/src/tusb_config.h
deleted file mode 100644
index 650df97e1..000000000
--- a/examples/host/midi2_host/src/tusb_config.h
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2026 Saulo Verissimo
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-#ifndef TUSB_CONFIG_H_
-#define TUSB_CONFIG_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-//--------------------------------------------------------------------
-// Common Configuration
-//--------------------------------------------------------------------
-
-#ifndef CFG_TUSB_MCU
-#error CFG_TUSB_MCU must be defined
-#endif
-
-#ifndef CFG_TUSB_OS
-#define CFG_TUSB_OS           OPT_OS_NONE
-#endif
-
-#ifndef CFG_TUSB_DEBUG
-#define CFG_TUSB_DEBUG        0
-#endif
-
-#ifndef CFG_TUH_MEM_SECTION
-#define CFG_TUH_MEM_SECTION
-#endif
-
-#ifndef CFG_TUH_MEM_ALIGN
-#define CFG_TUH_MEM_ALIGN     __attribute__ ((aligned(4)))
-#endif
-
-//--------------------------------------------------------------------
-// Host Configuration
-// Waveshare RP2350-USB-A: PIO-USB on GP12/GP13 (USB-A Host port)
-//--------------------------------------------------------------------
-
-#define CFG_TUH_ENABLED       1
-
-// PIO-USB Host on rhport 1 (USB-A connector on GP12/GP13)
-#define CFG_TUH_RPI_PIO_USB   1
-#define BOARD_TUH_RHPORT      1
-
-#ifndef BOARD_TUH_MAX_SPEED
-#define BOARD_TUH_MAX_SPEED   OPT_MODE_FULL_SPEED
-#endif
-
-#define CFG_TUH_MAX_SPEED     BOARD_TUH_MAX_SPEED
-
-//--------------------------------------------------------------------
-// Driver Configuration
-//--------------------------------------------------------------------
-
-#define CFG_TUH_ENUMERATION_BUFSIZE 256
-
-#define CFG_TUH_HUB                0
-#define CFG_TUH_DEVICE_MAX         1
-
-// MIDI 2.0 Host
-#define CFG_TUH_MIDI2              1
-#define CFG_TUH_MIDI2_RX_BUFSIZE   512
-#define CFG_TUH_MIDI2_TX_BUFSIZE   512
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
deleted file mode 100644
index e888c7fb3..000000000
--- a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.cmake
+++ /dev/null
@@ -1,2 +0,0 @@
-set(PICO_PLATFORM rp2350-arm-s)
-set(PICO_BOARD waveshare_rp2350_usb_a)
diff --git a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h b/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h
deleted file mode 100644
index 0af8a695f..000000000
--- a/hw/bsp/rp2040/boards/waveshare_rp2350_usb_a/board.h
+++ /dev/null
@@ -1,49 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2026 Saulo Verissimo
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   name: Waveshare RP2350-USB-A
-   url: https://www.waveshare.com/wiki/RP2350-USB-A
-*/
-
-#ifndef TUSB_BOARD_H
-#define TUSB_BOARD_H
-
-#ifdef __cplusplus
- extern "C" {
-#endif
-
-//--------------------------------------------------------------------+
-// PIO_USB
-//--------------------------------------------------------------------+
-// Waveshare RP2350-USB-A: PIO-USB on GP12 (D+) / GP13 (D-)
-// PICO_DEFAULT_PIO_USB_DP_PIN already defined in SDK board header
-
-#ifdef __cplusplus
- }
-#endif
-
-#endif
-- 
cgit v1.3.1


From 0a18f30a6ec8b89ad51afceaf3e80c1e1e59780a Mon Sep 17 00:00:00 2001
From: Michael Rogov Papernov <michael@membrowse.com>
Date: Tue, 12 May 2026 17:12:41 +0100
Subject: support map files

---
 .github/workflows/build.yml | 2 +-
 hw/bsp/family_support.cmake | 6 ++++--
 2 files changed, 5 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build.yml b/.github/workflows/build.yml
index a83a997c2..af0191149 100644
--- a/.github/workflows/build.yml
+++ b/.github/workflows/build.yml
@@ -9,7 +9,7 @@ on:
     types: [ published ]
 
 concurrency:
-  group: ${{ github.workflow }}-${{ github.ref }}
+  group: ${{ github.workflow }}-${{ github.event_name == 'push' && github.sha || github.ref }}
   cancel-in-progress: ${{ github.ref != 'refs/heads/master' }}
 
 jobs:
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index cb8ec6cf8..2468ac43c 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -326,10 +326,12 @@ ld_defs=\"$(echo \"$ld_defs\" | xargs)\"")
       "if [ -f \"${TARGET_ELF_PATH}\" ]; then \
   ${MEMBROWSE_LD_SCRIPTS_CMD}; \
   ${MEMBROWSE_LD_DEFS_CMD}; \
+  map_arg=\"\"; \
+  if [ -f \"${TARGET_ELF_PATH}.map\" ]; then map_arg=\"--map-file \\\"${TARGET_ELF_PATH}.map\\\"\"; fi; \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs --upload --github --target-name ${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs $map_arg --upload --github --target-name ${BOARD}/${TARGET} --api-key $ENV{MEMBROWSE_API_KEY}\"; \
   else \
-    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs\"; \
+    MEMBROWSE_CMD=\"${MEMBROWSE_EXE} report ${OPTION} \\\"${TARGET_ELF_PATH}\\\" \\\"$ld_scripts\\\" $ld_defs $map_arg\"; \
   fi; \
 else \
   if [ \"$MEMBROWSE_UPLOAD\" = \"1\" ]; then \
-- 
cgit v1.3.1


From 3da2464a30b5903619acd76d3daff5c848ce2fe9 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Thu, 14 May 2026 14:08:57 +0200
Subject: rework bsp

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32c5/boards/stm32c542nucleo/board.h |  2 +-
 hw/bsp/stm32c5/family.c                       | 79 ++++++++++++++++-----------
 2 files changed, 47 insertions(+), 34 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
index d7e5e7e13..b64fad243 100644
--- a/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
+++ b/hw/bsp/stm32c5/boards/stm32c542nucleo/board.h
@@ -39,7 +39,7 @@
 // Button
 #define BUTTON_PORT           HAL_GPIOC
 #define BUTTON_PIN            HAL_GPIO_PIN_13
-#define BUTTON_STATE_ACTIVE   0
+#define BUTTON_STATE_ACTIVE   1
 
 // Enable UART serial communication with the ST-Link
 #define UART_ID               2
diff --git a/hw/bsp/stm32c5/family.c b/hw/bsp/stm32c5/family.c
index a40a2a4ee..40b86fc55 100644
--- a/hw/bsp/stm32c5/family.c
+++ b/hw/bsp/stm32c5/family.c
@@ -35,18 +35,14 @@
 
 #ifdef UART_ID
   #if UART_ID == 1
-    #define UARTn             HAL_UART1
+    #define UARTn              USART1
     #define UARTn_CLK_ENABLE   HAL_RCC_USART1_EnableClock
   #elif UART_ID == 2
-    #define UARTn             HAL_UART2
+    #define UARTn              USART2
     #define UARTn_CLK_ENABLE   HAL_RCC_USART2_EnableClock
   #endif
 #endif
 
-#ifndef UART_GET_INSTANCE
-  #define UART_GET_INSTANCE(handle)   ((USART_TypeDef *)((uint32_t)(handle)->instance))
-#endif
-
 //--------------------------------------------------------------------+
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
@@ -57,11 +53,12 @@ void USB_DRD_FS_IRQHandler(void) {
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
 //--------------------------------------------------------------------+
-#ifdef UART_ID
-static hal_uart_handle_t hUSART;
-#endif
+static void mpu_init(void);
 
 void board_init(void) {
+  mpu_init();
+  LL_ICACHE_Enable(ICACHE);
+
   HAL_Init();
   board_clock_init();
 
@@ -117,29 +114,45 @@ void board_init(void) {
     HAL_GPIO_Init(UART_GPIO_PORT, UART_TX_PIN | UART_RX_PIN, &gpio_config);
   }
 
-  hal_uart_config_t uart_config;
-  HAL_UART_Init(&hUSART, UARTn);
-  uart_config.baud_rate = 115200;
-  uart_config.clock_prescaler = HAL_UART_PRESCALER_DIV1;
-  uart_config.word_length = HAL_UART_WORD_LENGTH_8_BIT;
-  uart_config.stop_bits = HAL_UART_STOP_BIT_1;
-  uart_config.parity = HAL_UART_PARITY_NONE;
-  uart_config.direction = HAL_UART_DIRECTION_TX_RX;
-  uart_config.hw_flow_ctl = HAL_UART_HW_CONTROL_NONE;
-  uart_config.oversampling = HAL_UART_OVERSAMPLING_16;
-  uart_config.one_bit_sampling = HAL_UART_ONE_BIT_SAMPLE_DISABLE;
-
-  HAL_UART_SetConfig(&hUSART, &uart_config);
-
-  /* Fifo configuration */
-  HAL_UART_SetTxFifoThreshold(&hUSART, HAL_UART_FIFO_THRESHOLD_1_8);
-  HAL_UART_SetRxFifoThreshold(&hUSART, HAL_UART_FIFO_THRESHOLD_1_8);
-  HAL_UART_EnableFifoMode(&hUSART);
-
-  LL_USART_Enable(UART_GET_INSTANCE(&hUSART));
+  LL_USART_ConfigAsyncMode(UARTn);
+  uint32_t reg_temp = (LL_USART_DATAWIDTH_8_BIT | LL_USART_PARITY_NONE
+                     | LL_USART_DIRECTION_TX_RX | LL_USART_OVERSAMPLING_16);
+  LL_USART_ConfigXfer(UARTn, reg_temp, LL_USART_STOP_BIT_1);
+  LL_USART_SetBaudRate(UARTn, SystemCoreClock, LL_USART_PRESCALER_DIV1, LL_USART_OVERSAMPLING_16,
+                       115200);
+  LL_USART_EnableFIFO(UARTn);
+  LL_USART_Enable(UARTn);
 #endif
 }
 
+static void mpu_init(void)
+{
+  /* Disables the MPU */
+  HAL_CORTEX_MPU_Disable();
+
+  /*
+     Initializes and configures the MPU attributes
+  */
+  HAL_CORTEX_MPU_SetCacheMemAttr(HAL_CORTEX_MPU_MEM_ATTR_0, HAL_CORTEX_MPU_NORMAL_MEM_NCACHEABLE);
+
+  /*
+     Initializes and configures the MPU Region
+  */
+  hal_cortex_mpu_region_config_t p_region_config = {0};
+
+  p_region_config.base_addr = 0x8FFE000;
+  p_region_config.limit_addr = 0x8FFFFFF;
+  p_region_config.access_attr = HAL_CORTEX_MPU_REGION_ALL_RO;
+  p_region_config.exec_attr = HAL_CORTEX_MPU_EXECUTION_ATTR_DISABLE;
+  p_region_config.attr_idx = HAL_CORTEX_MPU_MEM_ATTR_0;
+  HAL_CORTEX_MPU_SetConfigRegion(HAL_CORTEX_MPU_REGION_0, &p_region_config);
+
+  HAL_CORTEX_MPU_EnableRegion(HAL_CORTEX_MPU_REGION_0);
+
+  /* Enables the MPU */
+  HAL_CORTEX_MPU_Enable(HAL_CORTEX_MPU_HARDFAULT_NMI_DISABLE, HAL_CORTEX_MPU_ACCESS_FAULT_ONLY_PRIV);
+}
+
 //--------------------------------------------------------------------+
 // Board porting API
 //--------------------------------------------------------------------+
@@ -170,8 +183,8 @@ int board_uart_read(uint8_t *buf, int len) {
 #ifdef UART_ID
   int count = 0;
   while (count < len) {
-    if (LL_USART_IsActiveFlag_RXNE_RXFNE(UART_GET_INSTANCE(&hUSART))) {
-      buf[count] = (uint8_t) UART_GET_INSTANCE(&hUSART)->RDR;
+    if (LL_USART_IsActiveFlag_RXNE_RXFNE(UARTn)) {
+      buf[count] = LL_USART_ReceiveData8(UARTn);
       count++;
     } else {
       break;
@@ -189,8 +202,8 @@ int board_uart_write(void const *buf, int len) {
   const uint8_t *p = (const uint8_t *) buf;
   int count = 0;
   while (count < len) {
-    if (LL_USART_IsActiveFlag_TXE_TXFNF(UART_GET_INSTANCE(&hUSART))) {
-      UART_GET_INSTANCE(&hUSART)->TDR = p[count];
+    if (LL_USART_IsActiveFlag_TXE_TXFNF(UARTn)) {
+      LL_USART_TransmitData8(UARTn, p[count]);
       count++;
     } else {
       break;
-- 
cgit v1.3.1


From 116395a1b24f2cb1787b4110a8c3749a0435f1ee Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Sun, 17 May 2026 14:05:03 +0200
Subject: bsp: fix tcpp0203 lto uninit error

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 examples/device/midi2_device/skip.txt           | 4 ----
 examples/host/midi2_host/skip.txt               | 4 ----
 hw/bsp/stm32h5/boards/stm32h573i_dk/board.h     | 5 +++++
 hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h | 5 +++++
 hw/bsp/stm32n6/boards/stm32n6570dk/board.h      | 5 +++++
 hw/bsp/stm32n6/boards/stm32n657nucleo/board.h   | 5 +++++
 6 files changed, 20 insertions(+), 8 deletions(-)

(limited to 'hw')

diff --git a/examples/device/midi2_device/skip.txt b/examples/device/midi2_device/skip.txt
index 4cabba2fb..eadb6e74a 100644
--- a/examples/device/midi2_device/skip.txt
+++ b/examples/device/midi2_device/skip.txt
@@ -1,5 +1 @@
 mcu:SAMD11
-board:stm32h7s3nucleo
-board:stm32h573i_dk
-board:stm32n657nucleo
-board:stm32n6570dk
diff --git a/examples/host/midi2_host/skip.txt b/examples/host/midi2_host/skip.txt
index 0f96db3e9..308796869 100644
--- a/examples/host/midi2_host/skip.txt
+++ b/examples/host/midi2_host/skip.txt
@@ -1,5 +1 @@
 board:lpcxpresso54114
-board:stm32h7s3nucleo
-board:stm32h573i_dk
-board:stm32n657nucleo
-board:stm32n6570dk
diff --git a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
index 5788837ab..e9c406486 100644
--- a/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
+++ b/hw/bsp/stm32h5/boards/stm32h573i_dk/board.h
@@ -204,6 +204,10 @@ int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Le
   return 0;
 }
 
+static int32_t i2c_get_tick(void) {
+  return (int32_t) HAL_GetTick();
+}
+
 static inline void board_init2(void) {
   TCPP0203_IO_t            io_ctx;
 
@@ -212,6 +216,7 @@ static inline void board_init2(void) {
   io_ctx.DeInit      = board_tcpp0203_deinit;
   io_ctx.ReadReg     = i2c_readreg;
   io_ctx.WriteReg    = i2c_writereg;
+  io_ctx.GetTick     = i2c_get_tick;
 
   TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
 
diff --git a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
index b1446414e..996eb1515 100644
--- a/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
+++ b/hw/bsp/stm32h7rs/boards/stm32h7s3nucleo/board.h
@@ -223,6 +223,10 @@ int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Le
   return 0;
 }
 
+static int32_t i2c_get_tick(void) {
+  return (int32_t) HAL_GetTick();
+}
+
 static inline void board_init2(void) {
   TCPP0203_IO_t            io_ctx;
 
@@ -231,6 +235,7 @@ static inline void board_init2(void) {
   io_ctx.DeInit      = board_tcpp0203_deinit;
   io_ctx.ReadReg     = i2c_readreg;
   io_ctx.WriteReg    = i2c_writereg;
+  io_ctx.GetTick     = i2c_get_tick;
 
   TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
 
diff --git a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
index 4d162bbca..0cba5e1f9 100644
--- a/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n6570dk/board.h
@@ -244,6 +244,10 @@ static int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint
   return 0;
 }
 
+static int32_t i2c_get_tick(void) {
+  return (int32_t) HAL_GetTick();
+}
+
 static inline void board_init2(void) {
   TCPP0203_IO_t io_ctx;
 
@@ -252,6 +256,7 @@ static inline void board_init2(void) {
   io_ctx.DeInit = board_tcpp0203_deinit;
   io_ctx.ReadReg = i2c_readreg;
   io_ctx.WriteReg = i2c_writereg;
+  io_ctx.GetTick = i2c_get_tick;
 
   TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
 
diff --git a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
index c26367af6..be9ea7a31 100644
--- a/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
+++ b/hw/bsp/stm32n6/boards/stm32n657nucleo/board.h
@@ -239,6 +239,10 @@ int32_t i2c_writereg(uint16_t DevAddr, uint16_t Reg, uint8_t *pData, uint16_t Le
   return 0;
 }
 
+static int32_t i2c_get_tick(void) {
+  return (int32_t) HAL_GetTick();
+}
+
 static inline void board_init2(void) {
   TCPP0203_IO_t io_ctx;
 
@@ -247,6 +251,7 @@ static inline void board_init2(void) {
   io_ctx.DeInit = board_tcpp0203_deinit;
   io_ctx.ReadReg = i2c_readreg;
   io_ctx.WriteReg = i2c_writereg;
+  io_ctx.GetTick = i2c_get_tick;
 
   TU_ASSERT(TCPP0203_RegisterBusIO(&tcpp0203_obj, &io_ctx) == TCPP0203_OK, );
 
-- 
cgit v1.3.1


From 052452f4413c5e821d3effde9cfb857646815466 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 22 May 2026 15:25:24 +0200
Subject: bsp/ch32: fix linker report 100% RAM usage

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/ch32v10x/linker/ch32v10x.ld | 23 ++++++++++++-----------
 hw/bsp/ch32v20x/linker/ch32v20x.ld | 23 ++++++++++++-----------
 hw/bsp/ch32v30x/linker/ch32v30x.ld | 24 ++++++++++++------------
 3 files changed, 36 insertions(+), 34 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/linker/ch32v10x.ld b/hw/bsp/ch32v10x/linker/ch32v10x.ld
index cd5c8dc17..a2de3c25f 100644
--- a/hw/bsp/ch32v10x/linker/ch32v10x.ld
+++ b/hw/bsp/ch32v10x/linker/ch32v10x.ld
@@ -13,6 +13,7 @@ ENTRY( _start )
 __stack_size = 2048;
 
 PROVIDE( _stack_size = __stack_size );
+_estack = ORIGIN(RAM) + LENGTH(RAM);
 
 SECTIONS
 {
@@ -150,16 +151,16 @@ SECTIONS
 		PROVIDE( _ebss = .);
 	} >RAM AT>FLASH
 
-	PROVIDE( _end = _ebss);
-	PROVIDE( end = . );
-
-    .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
-    {
-        PROVIDE( _heap_end = . );
-        . = ALIGN(4);
-        PROVIDE(_susrstack = . );
-        . = . + __stack_size;
-        PROVIDE( _eusrstack = .);
-    } >RAM
+	._user_heap_stack :
+	{
+		. = ALIGN(8);
+		PROVIDE( end = . );
+		PROVIDE( _end = . );
+		. = . + __stack_size;
+		. = ALIGN(8);
+	} >RAM
 
+	PROVIDE( _heap_end = ORIGIN(RAM) + LENGTH(RAM) - __stack_size );
+	PROVIDE( _susrstack = _heap_end );
+	PROVIDE( _eusrstack = ORIGIN(RAM) + LENGTH(RAM) );
 }
diff --git a/hw/bsp/ch32v20x/linker/ch32v20x.ld b/hw/bsp/ch32v20x/linker/ch32v20x.ld
index f84808b0d..bfa9a8436 100644
--- a/hw/bsp/ch32v20x/linker/ch32v20x.ld
+++ b/hw/bsp/ch32v20x/linker/ch32v20x.ld
@@ -12,6 +12,7 @@ MEMORY
 ENTRY( _start )
 
 PROVIDE( _stack_size = __stack_size );
+_estack = ORIGIN(RAM) + LENGTH(RAM);
 
 SECTIONS
 {
@@ -149,16 +150,16 @@ SECTIONS
 		PROVIDE( _ebss = .);
 	} >RAM AT>FLASH
 
-	PROVIDE( _end = _ebss);
-	PROVIDE( end = . );
-
-    .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
-    {
-        PROVIDE( _heap_end = . );
-        . = ALIGN(4);
-        PROVIDE(_susrstack = . );
-        . = . + __stack_size;
-        PROVIDE( _eusrstack = .);
-    } >RAM
+	._user_heap_stack :
+	{
+		. = ALIGN(8);
+		PROVIDE( end = . );
+		PROVIDE( _end = . );
+		. = . + __stack_size;
+		. = ALIGN(8);
+	} >RAM
 
+	PROVIDE( _heap_end = ORIGIN(RAM) + LENGTH(RAM) - __stack_size );
+	PROVIDE( _susrstack = _heap_end );
+	PROVIDE( _eusrstack = ORIGIN(RAM) + LENGTH(RAM) );
 }
diff --git a/hw/bsp/ch32v30x/linker/ch32v30x.ld b/hw/bsp/ch32v30x/linker/ch32v30x.ld
index 6dd5d344a..2941c41a0 100644
--- a/hw/bsp/ch32v30x/linker/ch32v30x.ld
+++ b/hw/bsp/ch32v30x/linker/ch32v30x.ld
@@ -12,6 +12,7 @@ MEMORY
 ENTRY( _start )
 
 PROVIDE( _stack_size = __stack_size );
+_estack = ORIGIN(RAM) + LENGTH(RAM);
 
 SECTIONS
 {
@@ -151,17 +152,16 @@ SECTIONS
 		PROVIDE( _ebss = .);
 	} >RAM AT>FLASH
 
-	PROVIDE( _end = _ebss);
-	PROVIDE( end = . );
-
-    .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
-    {
-        PROVIDE( _heap_end = . );
-        . = ALIGN(4);
-        PROVIDE(_susrstack = . );
-        . = . + __stack_size;
-        PROVIDE( _eusrstack = .);
-        __freertos_irq_stack_top = .;
-    } >RAM
+	._user_heap_stack :
+	{
+		. = ALIGN(8);
+		PROVIDE( end = . );
+		PROVIDE( _end = . );
+		. = . + __stack_size;
+		. = ALIGN(8);
+	} >RAM
 
+	PROVIDE( _heap_end = ORIGIN(RAM) + LENGTH(RAM) - __stack_size );
+	PROVIDE( _susrstack = _heap_end );
+	PROVIDE( _eusrstack = ORIGIN(RAM) + LENGTH(RAM) );
 }
-- 
cgit v1.3.1


From 2267046fadd8c40086c66c10abc99153b95d25bf Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 22 May 2026 15:30:51 +0200
Subject: ch32v20x: fix port1 IP selection

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/ch32v20x/family.cmake |  3 ++-
 src/common/tusb_mcu.h        | 10 ++++++----
 2 files changed, 8 insertions(+), 5 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v20x/family.cmake b/hw/bsp/ch32v20x/family.cmake
index 59a96f70d..785f5ee35 100644
--- a/hw/bsp/ch32v20x/family.cmake
+++ b/hw/bsp/ch32v20x/family.cmake
@@ -61,8 +61,9 @@ function(family_add_board BOARD_TARGET)
 
   if (RHPORT_DEVICE EQUAL 0)
     target_compile_definitions(${BOARD_TARGET} PUBLIC CFG_TUD_WCH_USBIP_FSDEV=1)
+    target_compile_definitions(${BOARD_TARGET} PUBLIC CFG_TUH_WCH_USBIP_FSDEV=1)
   elseif (RHPORT_DEVICE EQUAL 1)
-    target_compile_definitions(${BOARD_TARGET} PUBLIC CFG_TUH_WCH_USBIP_USBFS=1)
+    target_compile_definitions(${BOARD_TARGET} PUBLIC CFG_TUD_WCH_USBIP_USBFS=1)
   else()
     message(FATAL_ERROR "Invalid RHPORT_DEVICE ${RHPORT_DEVICE}")
   endif()
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index c85ade4d0..413ac4850 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -616,10 +616,6 @@
     #define CFG_TUH_WCH_USBIP_USBFS 1
   #endif
 
-  #define TUP_USBIP_FSDEV
-  #define TUP_USBIP_FSDEV_CH32
-  #define CFG_TUSB_FSDEV_PMA_SIZE 512u
-
   // default to FSDEV for device
   #if !defined(CFG_TUD_WCH_USBIP_USBFS)
     #define CFG_TUD_WCH_USBIP_USBFS 0
@@ -629,6 +625,12 @@
     #define CFG_TUD_WCH_USBIP_FSDEV (CFG_TUD_WCH_USBIP_USBFS ? 0 : 1)
   #endif
 
+  #if CFG_TUD_WCH_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV
+    #define TUP_USBIP_FSDEV_CH32
+    #define CFG_TUSB_FSDEV_PMA_SIZE 512u
+  #endif
+
   #define TUP_DCD_ENDPOINT_MAX 8
 
 #elif TU_CHECK_MCU(OPT_MCU_CH32V307)
-- 
cgit v1.3.1


From 3adb63e62a6c7dbc854a72049aa23537a51fabc5 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 09:27:32 +0800
Subject: Fix typo found by Copilot

chinese -> Chinese
manufactors -> manufacturers

Co-authored-by: Copilot Autofix powered by AI <175728472+Copilot@users.noreply.github.com>
---
 hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
index 02558b953..3a97b44d6 100644
--- a/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
+++ b/hw/bsp/ch32v10x/boards/ch32v103c_bluepill/board.h
@@ -1,4 +1,4 @@
-/* Some chinese manufactors use CH32V103C8T6 to make Bluepill boards
+/* Some Chinese manufacturers use CH32V103C8T6 to make Bluepill boards
  */
 /* metadata:
    name: CH32V103C8T6-Bluepill
-- 
cgit v1.3.1


From 972670aed49d3efd31b6211aa40c33d550cfa3ad Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 10:00:06 +0800
Subject: use vendor-specific CSR 0x800 to toggle IRQ

---
 hw/bsp/ch32v10x/family.c | 19 +++++++++++++++++--
 1 file changed, 17 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 9943bf856..6d52227d5 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -66,11 +66,26 @@ uint32_t tusb_time_millis_api(void) {
 }
 #endif
 
+// 0x800 CSR register is writable in U-mode
+// according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
+__attribute__((always_inline)) RV_STATIC_INLINE
+void __wch_vendor_enable_irq()
+{
+  __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
+}
+
+__attribute__((always_inline)) RV_STATIC_INLINE
+void __wch_vendor_disable_irq()
+{
+  __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
+  __asm volatile ("fence.i");
+}
+
 void board_init(void) {
   /* __disable_irq() in CH32V103 EVT attempts to call
    * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
    * Disable this to avoid hard-fault. */
-  //__disable_irq();
+  __wch_vendor_disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
@@ -126,7 +141,7 @@ void board_init(void) {
   USART_Init(USART1, &usart);
   USART_Cmd(USART1, ENABLE);
 
-  //__enable_irq();
+  __wch_vendor_enable_irq();
 
   board_led_write(true);
 }
-- 
cgit v1.3.1


From e7d59fba3506d2ae0d60f4c019153e1d9d349262 Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Sun, 24 May 2026 10:21:41 +0800
Subject: Fix missing prototype in ch32v10x bsp

---
 hw/bsp/ch32v10x/family.c | 6 +++---
 1 file changed, 3 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 6d52227d5..8eec9f4a1 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -69,13 +69,13 @@ uint32_t tusb_time_millis_api(void) {
 // 0x800 CSR register is writable in U-mode
 // according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
 __attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_enable_irq()
+void __wch_vendor_enable_irq(void)
 {
   __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
 }
 
 __attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_disable_irq()
+void __wch_vendor_disable_irq(void)
 {
   __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
   __asm volatile ("fence.i");
@@ -84,7 +84,7 @@ void __wch_vendor_disable_irq()
 void board_init(void) {
   /* __disable_irq() in CH32V103 EVT attempts to call
    * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
-   * Disable this to avoid hard-fault. */
+   * Replace this with CSR 0x800 to avoid hard-fault. */
   __wch_vendor_disable_irq();
 
 #if CFG_TUSB_OS == OPT_OS_NONE
-- 
cgit v1.3.1


From 97d84e0fd597b2d9362e47897c98c9b5ed9c6fdc Mon Sep 17 00:00:00 2001
From: UMRnInside <30196401+UMRnInside@users.noreply.github.com>
Date: Tue, 26 May 2026 22:52:30 +0800
Subject: Enable GPIOC for CH32V103 bluepill boards

---
 hw/bsp/ch32v10x/family.c | 1 +
 1 file changed, 1 insertion(+)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 8eec9f4a1..9f5dc5572 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -92,6 +92,7 @@ void board_init(void) {
 #endif
 
   RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA, ENABLE);
+  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOC, ENABLE);
 
   EXTEN->EXTEN_CTR |= EXTEN_USBFS_IO_EN;
   uint8_t usb_div;
-- 
cgit v1.3.1


From d85ddd2f8a93f2bfcedfb0365fa6826f1ab86fca Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Fri, 29 May 2026 00:39:19 +0200
Subject: bsp/stm32f7: fix f746disco jlink device

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32f7/boards/stm32f746disco/board.cmake | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
index bc26c6ef4..5f46365f4 100644
--- a/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
+++ b/hw/bsp/stm32f7/boards/stm32f746disco/board.cmake
@@ -1,5 +1,5 @@
 set(MCU_VARIANT stm32f746xx)
-set(JLINK_DEVICE stm32f746xx)
+set(JLINK_DEVICE stm32f746ng)
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F746ZGTx_FLASH.ld)
 
-- 
cgit v1.3.1


From 33f151a43b39de4207bcdc49ea1e9e8dd8a5d248 Mon Sep 17 00:00:00 2001
From: HiFiPhile <admin@hifiphile.com>
Date: Wed, 27 May 2026 20:44:04 +0200
Subject: bsp/stm32f4: enable flash cache

Signed-off-by: HiFiPhile <admin@hifiphile.com>
---
 hw/bsp/stm32f4/family.c | 5 +++++
 1 file changed, 5 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/stm32f4/family.c b/hw/bsp/stm32f4/family.c
index 4eea5c7a8..3a323e673 100644
--- a/hw/bsp/stm32f4/family.c
+++ b/hw/bsp/stm32f4/family.c
@@ -109,6 +109,11 @@ void USARTn_IRQHandler(void) {
 
 void board_init(void) {
   board_clock_init();
+
+  __HAL_FLASH_INSTRUCTION_CACHE_ENABLE();
+  __HAL_FLASH_DATA_CACHE_ENABLE();
+  __HAL_FLASH_PREFETCH_BUFFER_ENABLE();
+
   //SystemCoreClockUpdate();
 
   // Enable All GPIOs clocks
-- 
cgit v1.3.1


From a6098c38ac3390716a6cf3046a87b13dd85fecca Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Wed, 3 Jun 2026 21:46:11 +0700
Subject: refactor(cmake): comment out unused target folder properties

---
 hw/bsp/family_support.cmake                      | 36 ++++++++++++------------
 hw/bsp/stm32f7/boards/stm32f769disco/board.cmake |  1 +
 src/class/mtp/mtp_device.c                       | 11 +++-----
 3 files changed, 23 insertions(+), 25 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 2468ac43c..07d693d77 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -244,7 +244,7 @@ function(family_add_bloaty TARGET)
     COMMAND ${BLOATY_EXE} ${OPTION_LIST} $<TARGET_FILE:${TARGET}>
     VERBATIM)
 
-  set_property(TARGET ${TARGET}-bloaty PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-bloaty PROPERTY FOLDER ${TARGET}-group)
   # post build
   #  add_custom_command(TARGET ${TARGET} POST_BUILD
   #    COMMAND ${BLOATY_EXE} --csv ${OPTION_LIST} $<TARGET_FILE:${TARGET}> > ${CMAKE_CURRENT_BINARY_DIR}/${TARGET}_bloaty.csv
@@ -265,7 +265,7 @@ function(family_add_linkermap TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-linkermap PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-linkermap PROPERTY FOLDER ${TARGET}-group)
 
   # post build
   add_custom_command(TARGET ${TARGET} POST_BUILD
@@ -347,7 +347,7 @@ echo \"$MEMBROWSE_CMD\"")
       COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=0 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
       VERBATIM
       )
-    set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET}-group)
+    #set_property(TARGET ${TARGET}-membrowse PROPERTY FOLDER ${TARGET}-group)
 
     add_custom_target(${TARGET}-membrowse-upload
       COMMAND ${CMAKE_COMMAND} -E env MEMBROWSE_UPLOAD=1 bash -lc "${MEMBROWSE_PREPARE_CMD}; eval \"$MEMBROWSE_CMD\""
@@ -359,7 +359,7 @@ echo \"$MEMBROWSE_CMD\"")
     endif ()
     add_dependencies(examples-membrowse-upload ${TARGET}-membrowse-upload)
 
-    set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET}-group)
+    #set_property(TARGET ${TARGET}-membrowse-upload PROPERTY FOLDER ${TARGET}-group)
   endif ()
 endfunction()
 
@@ -648,7 +648,7 @@ exit"
     VERBATIM
     )
 
-  set_property(TARGET ${NAME_TARGET}-jlink PROPERTY FOLDER ${TARGET}-group)
+#  set_property(TARGET ${NAME_TARGET}-jlink PROPERTY FOLDER ${NAME_TARGET}-group)
 endfunction()
 
 
@@ -663,7 +663,7 @@ function(family_flash_stlink TARGET)
     COMMAND ${STM32_PROGRAMMER_CLI} --connect port=swd --write $<TARGET_FILE:${TARGET}> --go
     )
 
-  set_property(TARGET ${TARGET}-stlink PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-stlink PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -678,7 +678,7 @@ function(family_flash_stflash TARGET)
     COMMAND ${ST_FLASH} write $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin 0x8000000
     )
 
-  set_property(TARGET ${TARGET}-stflash PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-stflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -706,7 +706,7 @@ function(family_flash_openocd TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-openocd PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-openocd PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -769,7 +769,7 @@ function(family_flash_wlink_rs TARGET)
     COMMAND ${WLINK_RS} flash $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-wlink-rs PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-wlink-rs PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -784,7 +784,7 @@ function(family_flash_pyocd TARGET)
     COMMAND ${PYOCD} flash -t ${PYOCD_TARGET} $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-pyocd PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-pyocd PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -794,7 +794,7 @@ function(family_flash_uf2 TARGET FAMILY_ID)
     DEPENDS ${TARGET}
     COMMAND python ${UF2CONV_PY} -f ${FAMILY_ID} --deploy $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.uf2
     )
-  set_property(TARGET ${TARGET}-uf2 PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-uf2 PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -810,7 +810,7 @@ function(family_flash_teensy TARGET)
     COMMAND ${TEENSY_CLI} --mcu=${TEENSY_MCU} -w -s $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex
     )
 
-  set_property(TARGET ${TARGET}-teensy PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-teensy PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -830,7 +830,7 @@ function(family_flash_nxplink TARGET)
     COMMAND ${LINKSERVER_PATH} flash ${NXPLINK_DEVICE} load $<TARGET_FILE:${TARGET}>
     )
 
-  set_property(TARGET ${TARGET}-nxplink PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-nxplink PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -845,7 +845,7 @@ function(family_flash_dfu_util TARGET OPTION)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-dfu-util PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-dfu-util PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 function(family_flash_msp430flasher TARGET)
@@ -862,7 +862,7 @@ function(family_flash_msp430flasher TARGET)
             ${MSP430FLASHER} -w $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.hex -z [VCC]
     )
 
-  set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-msp430flasher PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 function(family_flash_rfp TARGET)
@@ -880,7 +880,7 @@ function(family_flash_rfp TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-rfp PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-rfp PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 
@@ -897,7 +897,7 @@ function(family_flash_uniflash TARGET)
     VERBATIM
     )
 
-  set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 # Add flash ft9xx target need to remove kernal's ftdi_sio and bind D2XX drivers
@@ -912,7 +912,7 @@ function(family_flash_ft9xx TARGET)
     COMMAND ${FT9XXPROG} -f $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
     )
 
-  set_property(TARGET ${TARGET}-ft9xx PROPERTY FOLDER ${TARGET}-group)
+  #set_property(TARGET ${TARGET}-ft9xx PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
 #----------------------------------
diff --git a/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
index 2335b869e..dbdd07e4d 100644
--- a/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
+++ b/hw/bsp/stm32f7/boards/stm32f769disco/board.cmake
@@ -1,5 +1,6 @@
 set(MCU_VARIANT stm32f769xx)
 set(JLINK_DEVICE stm32f769ni)
+#set(JLINK_OPTION "-USB 000778170924")
 
 set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/STM32F769ZITx_FLASH.ld)
 
diff --git a/src/class/mtp/mtp_device.c b/src/class/mtp/mtp_device.c
index fd06b4601..1f76dfcc7 100644
--- a/src/class/mtp/mtp_device.c
+++ b/src/class/mtp/mtp_device.c
@@ -443,15 +443,12 @@ bool mtpd_xfer_cb(uint8_t rhport, uint8_t ep_addr, xfer_result_t event, uint32_t
 
       // Check completion for IN and OUT separately
       bool is_complete;
-
-      if (is_data_in)
-      {
+      if (is_data_in) {
         // IN completion: short packet, ZLP, or reaching total_len
         is_complete = (xferred_bytes == 0 || xferred_bytes < threshold || p_mtp->xferred_len >= p_mtp->total_len);
-      }
-      else
-      {
-        // OUT completion: reaching total_len or ZLP
+      } else {
+        // OUT completion: reaching total_len or ZLP only. A short packet does NOT end the phase
+        // (an early short packet before total_len is the cancel case, not normal completion).
         is_complete = (p_mtp->xferred_len >= p_mtp->total_len) || ((xferred_bytes == 0 && p_mtp->xferred_len > 0));
       }
 
-- 
cgit v1.3.1


From 1009b14b02232adc70a0a5a5ed4a3a06118fef0d Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Fri, 5 Jun 2026 21:23:40 +0700
Subject: add tm4c123x evk to hill pool (#3676)

* add ek_tm4c123gxl to the hil pool, flashing with lm4flash
---
 hw/bsp/family_support.cmake | 20 ++++++++++++++++++++
 hw/bsp/tm4c/family.cmake    |  4 ++--
 test/hil/hil_test.py        | 13 +++++++++++++
 test/hil/tinyusb.json       | 14 ++++++++++++++
 4 files changed, 49 insertions(+), 2 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index 07d693d77..af2716b28 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -900,6 +900,26 @@ function(family_flash_uniflash TARGET)
   #set_property(TARGET ${TARGET}-uniflash PROPERTY FOLDER ${TARGET}-group)
 endfunction()
 
+# Add flash lm4flash target (lightweight flasher for TI Tiva-C/Stellaris ICDI boards)
+function(family_flash_lm4flash TARGET)
+  if (NOT DEFINED LM4FLASH)
+    set(LM4FLASH lm4flash)
+  endif ()
+
+  if (NOT DEFINED LM4FLASH_OPTION)
+    set(LM4FLASH_OPTION "")
+  endif ()
+  separate_arguments(OPTION_LIST UNIX_COMMAND ${LM4FLASH_OPTION})
+
+  add_custom_target(${TARGET}-lm4flash
+    DEPENDS ${TARGET}
+    COMMAND ${LM4FLASH} ${OPTION_LIST} $<TARGET_FILE_DIR:${TARGET}>/${TARGET}.bin
+    VERBATIM
+    )
+
+  #set_property(TARGET ${TARGET}-lm4flash PROPERTY FOLDER ${TARGET}-group)
+endfunction()
+
 # Add flash ft9xx target need to remove kernal's ftdi_sio and bind D2XX drivers
 # sudo rmmod ftdi_sio && for i in 0 1 2 3; do sudo sh -c "echo 3-3.4:1.$i > /sys/bus/usb/drivers/ftdi_sio/unbind" 2>/dev/null; done
 function(family_flash_ft9xx TARGET)
diff --git a/hw/bsp/tm4c/family.cmake b/hw/bsp/tm4c/family.cmake
index 41b8a597a..ce7c62409 100644
--- a/hw/bsp/tm4c/family.cmake
+++ b/hw/bsp/tm4c/family.cmake
@@ -79,6 +79,6 @@ function(family_configure_example TARGET RTOS)
   # Flashing
   family_add_bin_hex(${TARGET})
   family_flash_jlink(${TARGET})
-  family_flash_openocd(${TARGET})
-  family_flash_uniflash(${TARGET})
+  family_flash_lm4flash(${TARGET})
+  # family_flash_uniflash(${TARGET})
 endfunction()
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index b0b3fc17e..609199d1b 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -496,6 +496,19 @@ def reset_uniflash(board):
     return subprocess.CompletedProcess(args=['dummy'], returncode=0)
 
 
+def flash_lm4flash(board, firmware):
+    # TI Tiva-C / Stellaris ICDI: lightweight lm4flash, resets and runs after write
+    flasher = board['flasher']
+    ret = run_cmd(f'lm4flash -s {flasher["uid"]} {flasher["args"]} {firmware}.bin')
+    return ret
+
+
+def reset_lm4flash(board):
+    # lm4flash has no reset-only mode; it resets+runs on flash, so reset is a no-op
+    flasher = board['flasher']
+    return subprocess.CompletedProcess(args=['dummy'], returncode=0)
+
+
 # -------------------------------------------------------------
 # Tests: dual
 # -------------------------------------------------------------
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index 467b7378a..79b2645c7 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -1,5 +1,19 @@
 {
     "boards": [
+        {
+            "name": "ek_tm4c123gxl",
+            "uid": "010105186C60A110",
+            "tests": {
+                "device": true,
+                "host": false,
+                "dual": false
+            },
+            "flasher": {
+                "name": "lm4flash",
+                "uid": "0E205D19",
+                "args": "-v"
+            }
+        },
         {
             "name": "espressif_p4_function_ev",
             "uid": "6055F9F98715",
-- 
cgit v1.3.1


From 97480bad2ce5ddbb38be6bfe00491c49b6ea2afe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 Jun 2026 14:34:47 +0700
Subject: stm32u0: implement board_get_unique_id from UID_BASE

Previously stm32u0 had no board_get_unique_id(), so it fell back to the
weak default in hw/bsp/board.c and every board reported the placeholder
USB serial 0123456789ABCDEF. HIL identifies boards by USB serial, so a
non-unique serial collides on a multi-board rig. Read the 96-bit unique
ID from UID_BASE, mirroring stm32u5. Verified on stm32u083nucleo: now
enumerates as 300044000D5036394E373620.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/stm32u0/family.c | 13 +++++++++++++
 1 file changed, 13 insertions(+)

(limited to 'hw')

diff --git a/hw/bsp/stm32u0/family.c b/hw/bsp/stm32u0/family.c
index 7bd99fba6..0d20ba43f 100644
--- a/hw/bsp/stm32u0/family.c
+++ b/hw/bsp/stm32u0/family.c
@@ -166,6 +166,19 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == HAL_GPIO_ReadPin(BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t *stm32_uuid = (volatile uint32_t *) UID_BASE;
+  uint32_t *id32 = (uint32_t *) (uintptr_t) id;
+  uint8_t const len = 12;
+
+  id32[0] = stm32_uuid[0];
+  id32[1] = stm32_uuid[1];
+  id32[2] = stm32_uuid[2];
+
+  return len;
+}
+
 int board_uart_read(uint8_t* buf, int len) {
 #ifdef UART_ID
   int count = 0;
-- 
cgit v1.3.1


From bfaa3b6c4f9a0d64641155dc4e4f4e258a1f5eb5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 Jun 2026 14:34:57 +0700
Subject: tools/gen_presets: build into cmake-build-<board> with single-config
 Ninja

Change the default configure preset binaryDir from build/<board> to
cmake-build-<board> (the dir name HIL expects) and switch the generator
from Ninja Multi-Config to single-config Ninja. Multi-Config nests
binaries under a RelWithDebInfo/ subdir, which hil_test.py does not look
in; single-config emits device/<ex>/<ex>.elf so preset-built firmware is
directly consumable by `hil_test.py -B examples`.

Regenerated BoardPresets.json (also picks up the tracked ch32v103c_bluepill
board that was missing from presets).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/BoardPresets.json | 30 ++++++++++++++++++++++++++----
 tools/gen_presets.py     |  8 ++++----
 2 files changed, 30 insertions(+), 8 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index 86609d075..a700e7309 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -5,10 +5,10 @@
       "name": "default",
       "hidden": true,
       "description": "Configure preset for the ${presetName} board",
-      "generator": "Ninja Multi-Config",
-      "binaryDir": "${sourceDir}/build/${presetName}",
+      "generator": "Ninja",
+      "binaryDir": "${sourceDir}/cmake-build-${presetName}",
       "cacheVariables": {
-        "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo",
+        "CMAKE_BUILD_TYPE": "RelWithDebInfo",
         "BOARD": "${presetName}"
       }
     },
@@ -17,7 +17,7 @@
       "hidden": true,
       "description": "Configure preset for the ${presetName} board",
       "generator": "Ninja",
-      "binaryDir": "${sourceDir}/build/${presetName}",
+      "binaryDir": "${sourceDir}/cmake-build-${presetName}",
       "cacheVariables": {
         "BOARD": "${presetName}"
       }
@@ -122,6 +122,10 @@
       "name": "ch32f205r-r0",
       "inherits": "default"
     },
+    {
+      "name": "ch32v103c_bluepill",
+      "inherits": "default"
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "inherits": "default"
@@ -1087,6 +1091,11 @@
       "description": "Build preset for the ch32f205r-r0 board",
       "configurePreset": "ch32f205r-r0"
     },
+    {
+      "name": "ch32v103c_bluepill",
+      "description": "Build preset for the ch32v103c_bluepill board",
+      "configurePreset": "ch32v103c_bluepill"
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "description": "Build preset for the ch32v103r_r1_1v0 board",
@@ -2472,6 +2481,19 @@
         }
       ]
     },
+    {
+      "name": "ch32v103c_bluepill",
+      "steps": [
+        {
+          "type": "configure",
+          "name": "ch32v103c_bluepill"
+        },
+        {
+          "type": "build",
+          "name": "ch32v103c_bluepill"
+        }
+      ]
+    },
     {
       "name": "ch32v103r_r1_1v0",
       "steps": [
diff --git a/tools/gen_presets.py b/tools/gen_presets.py
index 94a9361db..60404a5a7 100755
--- a/tools/gen_presets.py
+++ b/tools/gen_presets.py
@@ -31,17 +31,17 @@ def main():
         {"name": "default",
          "hidden": True,
          "description": r"Configure preset for the ${presetName} board",
-         "generator": "Ninja Multi-Config",
-         "binaryDir": r"${sourceDir}/build/${presetName}",
+         "generator": "Ninja",
+         "binaryDir": r"${sourceDir}/cmake-build-${presetName}",
          "cacheVariables": {
-             "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo",
+             "CMAKE_BUILD_TYPE": "RelWithDebInfo",
              "BOARD": r"${presetName}"
          }},
          {"name": "default single config",
          "hidden": True,
          "description": r"Configure preset for the ${presetName} board",
          "generator": "Ninja",
-         "binaryDir": r"${sourceDir}/build/${presetName}",
+         "binaryDir": r"${sourceDir}/cmake-build-${presetName}",
          "cacheVariables": {
              "BOARD": r"${presetName}"
          }}]
-- 
cgit v1.3.1


From 46aded44af947e1be32426edcd6ff2c0596f1765 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 8 Jun 2026 15:42:00 +0700
Subject: presets,hil: keep Ninja Multi-Config; make HIL find its output

Per review (HiFiPhile): Ninja Multi-Config is needed for IAR, otherwise the
optimization level can't be lowered to none for debug. Revert gen_presets.py
back to Ninja Multi-Config (keeping only the cmake-build-<board> binaryDir
change), and instead teach hil_test.py to locate <ex>.elf whether it sits
directly in the example dir (single-config) or under a per-config subdir like
RelWithDebInfo/ (multi-config).

Verified: stm32u083nucleo passes 13/13 remote HIL with a multi-config preset
build (rsync preserves the RelWithDebInfo/ subdir; the resolver finds it).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/BoardPresets.json |  4 ++--
 test/hil/hil_test.py     | 14 ++++++++++++--
 tools/gen_presets.py     |  4 ++--
 3 files changed, 16 insertions(+), 6 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/BoardPresets.json b/hw/bsp/BoardPresets.json
index a700e7309..09a9ef18f 100644
--- a/hw/bsp/BoardPresets.json
+++ b/hw/bsp/BoardPresets.json
@@ -5,10 +5,10 @@
       "name": "default",
       "hidden": true,
       "description": "Configure preset for the ${presetName} board",
-      "generator": "Ninja",
+      "generator": "Ninja Multi-Config",
       "binaryDir": "${sourceDir}/cmake-build-${presetName}",
       "cacheVariables": {
-        "CMAKE_BUILD_TYPE": "RelWithDebInfo",
+        "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo",
         "BOARD": "${presetName}"
       }
     },
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 2fb5f6b3f..2758d093c 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -1516,10 +1516,20 @@ def test_example(board: Board, f1: str, example: str) -> tuple[int, str]:
     f1_str = f1_suffix(f1)
 
     fw_dir = TINYUSB_ROOT / build_dir / f'cmake-build-{name}{f1_str}' / example
-    fw_name = fw_dir / Path(example).name
+    base = Path(example).name
     test_name = f'{name+f1_str:40} {example:30} ...'
 
-    if not fw_dir.exists() or not ((fw_name.with_suffix('.elf')).exists() or (fw_name.with_suffix('.bin')).exists()):
+    # firmware sits directly in the example dir (single-config Ninja) or under a
+    # per-config subdir like RelWithDebInfo/ (Ninja Multi-Config); accept either.
+    fw_name = None
+    if fw_dir.is_dir():
+        for cand in [fw_dir / base, fw_dir / 'RelWithDebInfo' / base,
+                     *(p.with_suffix('') for p in sorted(fw_dir.glob(f'*/{base}.elf')))]:
+            if cand.with_suffix('.elf').exists() or cand.with_suffix('.bin').exists():
+                fw_name = cand
+                break
+
+    if fw_name is None:
         log_line(f'{test_name} Skip (no binary)')
         return 0, 'skip'
 
diff --git a/tools/gen_presets.py b/tools/gen_presets.py
index 60404a5a7..6f32976a7 100755
--- a/tools/gen_presets.py
+++ b/tools/gen_presets.py
@@ -31,10 +31,10 @@ def main():
         {"name": "default",
          "hidden": True,
          "description": r"Configure preset for the ${presetName} board",
-         "generator": "Ninja",
+         "generator": "Ninja Multi-Config",
          "binaryDir": r"${sourceDir}/cmake-build-${presetName}",
          "cacheVariables": {
-             "CMAKE_BUILD_TYPE": "RelWithDebInfo",
+             "CMAKE_DEFAULT_BUILD_TYPE": "RelWithDebInfo",
              "BOARD": r"${presetName}"
          }},
          {"name": "default single config",
-- 
cgit v1.3.1


From 575a8fbcd0e5880791ea5f834649149a8f787d95 Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Wed, 10 Jun 2026 18:04:54 +0700
Subject: Merge pull request #3690 from hathach/claude/board-test-idle-park

hil: park boards with idle board_test instead of erasing flash
---
 .github/workflows/build_util.yml      |   2 +-
 examples/device/board_test/src/main.c |  34 +++++++++--
 hw/bsp/espressif/family.cmake         |   7 +++
 hw/bsp/family_support.cmake           |   6 ++
 test/hil/hil_test.py                  | 105 ++--------------------------------
 5 files changed, 48 insertions(+), 106 deletions(-)

(limited to 'hw')

diff --git a/.github/workflows/build_util.yml b/.github/workflows/build_util.yml
index 69b6f28d5..2532caebe 100644
--- a/.github/workflows/build_util.yml
+++ b/.github/workflows/build_util.yml
@@ -67,7 +67,7 @@ jobs:
           IAR_LMS_BEARER_TOKEN: ${{ secrets.IAR_LMS_BEARER_TOKEN }}
         run: |
           if [ "${{ inputs.toolchain }}" == "esp-idf" ]; then
-            docker run --rm -e MEMBROWSE_API_KEY="$MEMBROWSE_API_KEY" -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py --target all ${{ matrix.arg }}
+            docker run --rm -e MEMBROWSE_API_KEY="$MEMBROWSE_API_KEY" -e CI="$CI" -v $PWD:/project -w /project espressif/idf:tinyusb python tools/build.py --target all ${{ matrix.arg }}
           else
             BUILD_PY_ARGS="-s ${{ inputs.build-system }} ${{ steps.setup-toolchain.outputs.build_option }} ${{ inputs.build-options }} --target all"
             if [ "${{ inputs.upload-metrics }}" = "true" ]; then
diff --git a/examples/device/board_test/src/main.c b/examples/device/board_test/src/main.c
index 71e7e1da7..3d8cf9979 100644
--- a/examples/device/board_test/src/main.c
+++ b/examples/device/board_test/src/main.c
@@ -54,6 +54,11 @@ void tusb_time_delay_ms_api(uint32_t ms) {
 //
 //--------------------------------------------------------------------+
 
+// CI_BUILD (defined for all CI builds, see hw/bsp/family_support.cmake) skips the
+// blink/echo loop below: after HIL tests, this firmware is flashed to park the
+// board in a quiet, low-power idle state (no USB, LED, or UART activity).
+#ifndef CI_BUILD
+
 // Task parameter type: ULONG for ThreadX, void* for FreeRTOS and noos
 #if CFG_TUSB_OS == OPT_OS_THREADX
   #define RTOS_PARAM ULONG
@@ -107,19 +112,37 @@ static void board_test_loop(RTOS_PARAM param) {
   }
 }
 
+#endif // CI_BUILD
+
 int main(void) {
+#ifdef CI_BUILD
+  // Park the board in a quiet, low-power idle loop. board_init() is intentionally
+  // skipped: no clocks, peripherals, USB, LED, or UART are brought up, so the MCU
+  // just idles after CI flashes this over a board's previous test firmware.
+  while (1) {
+    #if defined(ESP_PLATFORM)
+    vTaskDelay(portMAX_DELAY); // ESP runs FreeRTOS: yield this task indefinitely
+    #elif defined(__ARM_ARCH) || defined(__arm__)
+    __asm volatile("wfe");     // Cortex-M: sleep until an event
+    #else
+    // other architectures (e.g. RISC-V): spin
+    #endif
+  }
+  // no return: the loop never exits (an unreachable return trips IAR's Pe111)
+#else
   board_init();
   board_led_write(true);
 
-#if CFG_TUSB_OS == OPT_OS_FREERTOS
+  #if CFG_TUSB_OS == OPT_OS_FREERTOS
   freertos_init();
-#elif CFG_TUSB_OS == OPT_OS_THREADX
+  #elif CFG_TUSB_OS == OPT_OS_THREADX
   tx_kernel_enter();
-#else
+  #else
   board_test_loop(NULL);
-#endif
+  #endif
 
   return 0;
+#endif
 }
 
 #ifdef ESP_PLATFORM
@@ -128,6 +151,7 @@ void app_main(void) {
 }
 #endif
 
+#ifndef CI_BUILD
 //--------------------------------------------------------------------+
 // FreeRTOS
 //--------------------------------------------------------------------+
@@ -173,3 +197,5 @@ void tx_application_define(void *first_unused_memory) {
                    1, 1, TX_NO_TIME_SLICE, TX_AUTO_START);
 }
 #endif
+
+#endif // CI_BUILD
diff --git a/hw/bsp/espressif/family.cmake b/hw/bsp/espressif/family.cmake
index 30d5a6ac9..b3bda4ad8 100644
--- a/hw/bsp/espressif/family.cmake
+++ b/hw/bsp/espressif/family.cmake
@@ -44,3 +44,10 @@ set(EXTRA_COMPONENT_DIRS "src" "${CMAKE_CURRENT_LIST_DIR}/boards" "${CMAKE_CURRE
 set(SDKCONFIG ${CMAKE_BINARY_DIR}/sdkconfig)
 
 include($ENV{IDF_PATH}/tools/cmake/project.cmake)
+
+# CI_BUILD marks firmware built in CI (GitHub Actions sets CI). Mirrors the
+# non-espressif define added in family_configure_common(); applied build-wide
+# here since espressif examples return before that function runs.
+if(DEFINED ENV{CI})
+  idf_build_set_property(COMPILE_DEFINITIONS "CI_BUILD=1" APPEND)
+endif()
diff --git a/hw/bsp/family_support.cmake b/hw/bsp/family_support.cmake
index af2716b28..1f3952205 100644
--- a/hw/bsp/family_support.cmake
+++ b/hw/bsp/family_support.cmake
@@ -454,6 +454,12 @@ function(family_configure_common TARGET RTOS)
     BOARD_${BOARD_UPPER}
   )
 
+  # CI_BUILD marks firmware built in CI (GitHub Actions sets CI). Examples can use
+  # it to alter behavior under test, e.g. board_test idles to park HIL boards.
+  if(DEFINED ENV{CI})
+    target_compile_definitions(${TARGET} PUBLIC CI_BUILD=1)
+  endif()
+
   # compile define from command line
   if(DEFINED CFLAGS_CLI)
     separate_arguments(CFLAGS_CLI)
diff --git a/test/hil/hil_test.py b/test/hil/hil_test.py
index 226e97780..45bad7a45 100755
--- a/test/hil/hil_test.py
+++ b/test/hil/hil_test.py
@@ -40,7 +40,6 @@ import os
 import random
 import re
 import select
-import struct
 import sys
 import time
 import signal
@@ -514,80 +513,6 @@ def reset_lm4flash(board):
     return subprocess.CompletedProcess(args=['dummy'], returncode=0)
 
 
-# -------------------------------------------------------------
-# Erase: wipe the first flash sector (vector table) after a board's tests so the
-# MCU faults to an idle state — no USB, lower power, and faster than programming
-# device/board_test. Same (board, firmware) signature as flash_*; `firmware` is
-# only used to find the flash origin (jlink) or the esp flash metadata.
-# -------------------------------------------------------------
-def elf_flash_origin(elf_path: str) -> int:
-    """Flash base address (first PT_LOAD segment physical address) of a
-    little-endian ELF32 firmware — i.e. where the vector table is programmed."""
-    data = Path(elf_path).read_bytes()
-    if data[:4] != b'\x7fELF':
-        raise ValueError(f'not an ELF: {elf_path}')
-    e_phoff = struct.unpack_from('<I', data, 0x1c)[0]
-    e_phentsize = struct.unpack_from('<H', data, 0x2a)[0]
-    e_phnum = struct.unpack_from('<H', data, 0x2c)[0]
-    for i in range(e_phnum):
-        p_type, _off, _vaddr, p_paddr = struct.unpack_from('<IIII', data, e_phoff + i * e_phentsize)
-        if p_type == 1:  # PT_LOAD
-            return p_paddr
-    raise ValueError(f'no PT_LOAD segment in {elf_path}')
-
-
-def erase_jlink(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    flasher = board['flasher']
-    origin = elf_flash_origin(f'{firmware}.elf')
-    script = ['halt', f'erase 0x{origin:x} 0x{origin + 4:x}', 'exit']
-    f_jlink = Path(f'{board["name"]}_erase.jlink')
-    with f_jlink.open('w') as f:
-        f.writelines(f'{s}\n' for s in script)
-    ret = run_cmd(f'JLinkExe -USB {flasher["uid"]} {flasher["args"]} -if swd -JTAGConf -1,-1 -speed auto -NoGui 1 -ExitOnError 1 -CommandFile {f_jlink}')
-    f_jlink.unlink(missing_ok=True)
-    return ret
-
-
-def erase_stlink(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    flasher = board['flasher']
-    return run_cmd(f'STM32_Programmer_CLI --connect port=swd sn={flasher["uid"]} --erase 0')
-
-
-def erase_openocd(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    flasher = board['flasher']
-    return run_cmd(f'openocd -c "tcl_port disabled" -c "gdb_port disabled" -c "adapter serial {flasher["uid"]}" '
-                   f'{flasher["args"]} -c "init; reset halt; flash erase_sector 0 0 0; exit"')
-
-
-def erase_openocd_adi(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    flasher = board['flasher']
-    openocd = OPENCOD_ADI_PATH / 'src' / 'openocd'
-    tcl_dir = OPENCOD_ADI_PATH / 'tcl'
-    return run_cmd(f'{openocd} -c "adapter serial {flasher["uid"]}" -s {tcl_dir} '
-                   f'{flasher["args"]} -c "init; reset halt; flash erase_sector 0 0 0; exit"')
-
-
-def erase_esptool(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    flasher = board['flasher']
-    port = get_serial_dev(flasher["uid"], None, None, 0)
-    fw_dir = Path(f'{firmware}.bin').parent
-    with (fw_dir / 'config.env').open() as f:
-        idf_target = json.load(f)['IDF_TARGET']
-    return run_cmd(f'esptool --chip {idf_target} -p {port} {flasher["args"]} erase_region 0x0 0x4000',
-                   cwd=str(fw_dir))
-
-
-def erase_lm4flash(board: Board, firmware: str) -> subprocess.CompletedProcess:
-    # lm4flash has no erase command, but it erases the sectors it programs — so
-    # writing a blank (all-0xFF) image leaves the first sector erased.
-    flasher = board['flasher']
-    blank = Path(f'{board["name"]}_blank.bin')
-    blank.write_bytes(b'\xff' * 4096)
-    ret = run_cmd(f'lm4flash -s {flasher["uid"]} {flasher["args"]} {blank}')
-    blank.unlink(missing_ok=True)
-    return ret
-
-
 # -------------------------------------------------------------
 # Tests: dual
 # -------------------------------------------------------------
@@ -1718,28 +1643,6 @@ def build_board(board: Board) -> tuple[str, int]:
     return name, failed
 
 
-def disable_board(board: Board, f1: str):
-    """Quiesce the board after its tests so it stops drawing power / enumerating
-    USB: erase the first flash sector (vector table) where the flasher supports
-    it, otherwise flash device/board_test. Skipped when --skip-flash is set.
-    Returns (report_key, status) or None."""
-    if skip_flash:
-        return None
-    name = board['name']
-    erase_fn = globals().get(f'erase_{board["flasher"]["name"].lower()}')
-    fw = find_firmware(name, f1, 'device/board_test')
-    if erase_fn and fw is not None:
-        start_s = time.time()
-        ret = erase_fn(board, str(fw))
-        status = 'pass' if ret.returncode == 0 else 'fail'
-        st = STATUS_OK if status == 'pass' else STATUS_FAILED
-        log_line(f'{name:40} {"erase (disable)":30} ...  {st}  in {time.time() - start_s:.1f}s')
-        return 'erase', status
-    # flasher has no erase support (or board_test not built): flash board_test
-    _ec, status, _ = test_example(board, f1, 'device/board_test')
-    return 'device/board_test', status
-
-
 def test_board(board: Board) -> tuple[str, int, list[str], list]:
     name = board['name']
     flasher = board['flasher']
@@ -1796,10 +1699,10 @@ def test_board(board: Board) -> tuple[str, int, list[str], list]:
                 failed_tests.append(test)
         rows.append((name + f1_suffix(f1), cells))
 
-    # disable the board's usb after its tests (erase first flash sector, or flash
-    # board_test where the flasher can't erase); skipped when --skip-flash is set.
-    # This is teardown, not a test — not recorded in the report.
-    disable_board(board, flags_on_list[0])
+    # flash board_test last to disable board's usb (skipped when --skip-flash is set);
+    # this is teardown/park, not a test — not recorded in the report
+    if not skip_flash:
+        test_example(board, flags_on_list[0], 'device/board_test')
 
     return name, err_count, sorted(set(failed_tests)), rows
 
-- 
cgit v1.3.1


From dffc57135846a4b00aca06b2f588daa6d13b67ef Mon Sep 17 00:00:00 2001
From: Ha Thach <thach@tinyusb.org>
Date: Thu, 11 Jun 2026 10:17:28 +0700
Subject: Fix stm32f723disco host/cdc_msc_hid HIL: UART RX starvation + DWC2
 DMA split-IN NAK storm (#3677)
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

Fix stm32f723disco host HIL: UART RX starvation + DWC2 split bulk NAK/XactErr handling (#3677)
stm32f7 BSP — UART RX starvation
- The host console USART shared interrupt priority with the USB OTG ISR, so a long
  OTG interrupt could starve RXNE and drop received bytes. Raise the USART RX IRQ
  above OTG_FS/OTG_HS in both the bare-metal and FreeRTOS init paths, guarded by
  #ifdef UART_ID so boards without a UART console keep the default OTG priority.

dwc2 host — split NAK/XactErr handling
- Slave mode: a persistently-NAKing split bulk/control IN poll re-armed the
  start-split immediately, storming the ISR and starving task context. Throttle by
  disabling the channel and re-arming on the resulting halt (no frame deferral).
- Buffer-DMA mode: a pure split bulk-OUT NAK was unhandled, leaving the channel
  halted and stalling the transfer — the dominant cause of CDC echo truncation.
  Handle it by rewinding the buffer pointers and retrying the start-split
  (Programming Guide v4.20a 5.1.4.2).
- Buffer-DMA mode: a split bulk-OUT XactErr was retried immediately, exhausting
  HCD_XFER_ERROR_MAX before the transient cleared. Throttle via channel_disable +
  re-arm to give the hub TT a recovery gap, mirroring slave mode.
- All three are scoped to split transfers (hcsplt.split_en); non-split NAK/XactErr
  keep the core-handled / immediate-retry behavior. The OUT XactErr throttle also
  excludes periodic split, where channel_disable() is a no-op and would wedge the
  channel. The nak_disabled flag is generalized to retry_disabled and honors
  xfer->closing so an endpoint close during a throttled retry tears down cleanly.

Verified on stm32f723disco HIL (slave + CFG_TUH_DWC2_DMA_ENABLE): host/cdc_msc_hid,
msc_file_explorer, and device_info all pass on both variants; DMA CDC echo went
from ~15-25% raw failure to 10/10 clean.
---
 AGENTS.md                             |  4 +--
 hw/bsp/stm32f7/family.c               | 21 +++++++++++----
 src/portable/synopsys/dwc2/hcd_dwc2.c | 51 +++++++++++++++++++++++++++++++----
 tools/codespell/ignore-words.txt      |  1 +
 4 files changed, 65 insertions(+), 12 deletions(-)

(limited to 'hw')

diff --git a/AGENTS.md b/AGENTS.md
index 5c9908d19..93faa6332 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -18,7 +18,7 @@ Bias toward caution over speed. For trivial tasks, use judgment.
 - **Language/style:** C99, 2-space indent (no tabs), snake_case helpers, `UPPER_CASE` macros. Public APIs use `tud_`/`tuh_`; macros use `TU_`. Headers self-contained with `#if CFG_TUSB_MCU` guards.
 - **Safety:** no dynamic allocation; defer ISR work to task context; use `TU_ASSERT()` for error checks; always check return values; include order: C stdlib → tusb common → drivers → classes.
 - **Layout:** `src/` core, `hw/{mcu,bsp}/` MCU+BSP, `examples/{device,host,dual}/`, `test/{unit-test,fuzz,hil}/`, `docs/`, `tools/`.
-- **Commits/PRs:** imperative mood, scoped changes, link issues, include test/build evidence.
+- **Commits/PRs:** imperative mood, scoped changes, link issues, include test/build evidence. After opening a PR, monitor it and drive it to green: address automated review comments (Copilot/Codex/Claude) and fix any failing CI builds, pushing follow-up commits until checks pass and review threads are resolved. Useful: `gh pr checks <num> --watch`, `gh pr view <num> --comments`.
 - **Formatting/lint:** `clang-format` (`.clang-format`), `codespell` (`.codespellrc`), run `pre-commit run --all-files` before submitting.
 
 ## Bootstrap
@@ -204,7 +204,7 @@ Device examples need real hardware to validate runtime behavior; must at least b
 
 ## References
 
-- MCU reference manuals, datasheets, schematics: `$HOME/Documents/Calibre Library`.
+- MCU reference manuals, datasheets, schematics: `$HOME/Documents/calibre-library`.
 - Supported MCUs/boards: `hw/bsp/` and `docs/reference/boards.rst`.
 - USB classes: `src/class/{cdc,hid,msc,audio,…}/` — each has `*_device.c` and `*_host.c`.
 - Key files: `src/tusb.h`, `src/tusb_config.h`, `tools/get_deps.py`, `tools/build.py`, `test/unit-test/project.yml`.
diff --git a/hw/bsp/stm32f7/family.c b/hw/bsp/stm32f7/family.c
index 7a322591b..9427ac4a6 100644
--- a/hw/bsp/stm32f7/family.c
+++ b/hw/bsp/stm32f7/family.c
@@ -82,8 +82,9 @@ static UART_HandleTypeDef UartHandle = {.Instance = USARTn,
                                               .OverSampling = UART_OVERSAMPLING_16,
                                         }};
 
-// RX ring buffer via RXNE interrupt — no HAL IT functions used (avoid HAL state conflicts)
-static uint8_t   uart_rx_ff_buf[32];
+// RX ring buffer via RXNE interrupt — no HAL IT functions used (avoid HAL state conflicts).
+// Sized to absorb a full host-forwarding burst (>64B) when the main loop briefly stalls.
+static uint8_t   uart_rx_ff_buf[256];
 static tu_fifo_t uart_rx_ff;
 
 void USARTn_IRQHandler(void) {
@@ -142,13 +143,24 @@ void board_init(void) {
   // 1ms tick timer
   SysTick_Config(SystemCoreClock / 1000);
 
+  // Set UART interrupt higher priority than USB OTG since the F7 USART has no hardware RX FIFO, so a host example's
+  // UART RX must not be starved by the frequent USB host interrupts or incoming bytes overrun (ORE) and dropped.
+  NVIC_SetPriority(OTG_FS_IRQn, 1);
+  NVIC_SetPriority(OTG_HS_IRQn, 1);
+  #ifdef UART_ID
+  NVIC_SetPriority(USARTn_IRQn, 0);
+  #endif
+
 #elif CFG_TUSB_OS == OPT_OS_FREERTOS
   // Explicitly disable systick to prevent its ISR from running before scheduler start
   SysTick->CTRL &= ~1U;
 
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
-  NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  NVIC_SetPriority(OTG_FS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1);
+  NVIC_SetPriority(OTG_HS_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY + 1);
+  #ifdef UART_ID
+  NVIC_SetPriority(USARTn_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  #endif
 #endif
 
 #ifdef UART_ID
@@ -156,7 +168,6 @@ void board_init(void) {
   HAL_UART_Init(&UartHandle);
   tu_fifo_config(&uart_rx_ff, uart_rx_ff_buf, sizeof(uart_rx_ff_buf), false);
   USARTn->CR1 |= USART_CR1_RXNEIE;
-  NVIC_SetPriority(USARTn_IRQn, (1 << __NVIC_PRIO_BITS) - 1);
   NVIC_EnableIRQ(USARTn_IRQn);
 #endif
 
diff --git a/src/portable/synopsys/dwc2/hcd_dwc2.c b/src/portable/synopsys/dwc2/hcd_dwc2.c
index 9ea5f33c5..84a0c6afd 100644
--- a/src/portable/synopsys/dwc2/hcd_dwc2.c
+++ b/src/portable/synopsys/dwc2/hcd_dwc2.c
@@ -104,6 +104,7 @@ typedef struct {
   uint16_t xferred_bytes;  // bytes that accumulate transferred though USB bus for the whole hcd_edpt_xfer(), which can
                            // be composed of multiple channel_xfer_start() (retry with NAK/NYET)
   uint16_t fifo_bytes;     // bytes written/read from/to FIFO (may not be transferred on USB bus).
+  uint8_t  retry_disabled; // 1: channel was disabled to throttle a split retry (NAK in / XactErr out); re-arm on its halt
 } hcd_xfer_t;
 
 typedef struct {
@@ -1137,7 +1138,16 @@ static bool handle_channel_in_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
   // TU_LOG1("in  hcint = %02lX\r\n", hcint);
 
   if (hcint & HCINT_HALTED) {
-    if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL | HCINT_BABBLE_ERR)) {
+    if (xfer->retry_disabled) {
+      // Halt from our split-NAK throttle disable (below): re-arm the start-split, or let teardown finish
+      // if the endpoint is closing. Programming Guide 3.5 "Halting a Channel" (p73).
+      xfer->retry_disabled = 0;
+      if (xfer->closing) {
+        is_done = true;
+      } else {
+        channel_send_in_token(dwc2, channel);
+      }
+    } else if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL | HCINT_BABBLE_ERR)) {
       const uint16_t remain_bytes = (uint16_t) hctsiz.xfer_size;
       const uint16_t remain_packets = hctsiz.packet_count;
       const uint16_t actual_len = edpt->buflen - remain_bytes;
@@ -1203,7 +1213,15 @@ static bool handle_channel_in_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hci
       channel->hcintmsk &= ~(HCINT_NAK | HCINT_DATATOGGLE_ERR);
       hcsplt.split_compl = 0; // restart with start-split
       channel->hcsplt = hcsplt.value;
-      channel_xfer_in_retry(dwc2, ch_id, hcint);
+      // Persistent split bulk/control IN NAK (e.g. idle polled endpoint): re-enabling immediately storms
+      // the ISR and starves the task. Disable + re-arm on the resulting halt to throttle (like the slave
+      // path); no frame deferral. Programming Guide 3.5 (p73) Note permits disable on NAK/FrmOvrn splits.
+      if ((hcint & HCINT_NAK) && hcsplt.split_en && !channel_is_periodic(channel->hcchar)) {
+        xfer->retry_disabled = 1;
+        channel_disable(dwc2, channel);
+      } else {
+        channel_xfer_in_retry(dwc2, ch_id, hcint);
+      }
     } else if (hcint & HCINT_FARME_OVERRUN) {
       // retry start-split in next binterval
       channel_xfer_in_retry(dwc2, ch_id, hcint);
@@ -1228,7 +1246,16 @@ static bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hc
   // TU_LOG1("out hcint = %02lX\r\n", hcint);
 
   if (hcint & HCINT_HALTED) {
-    if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL)) {
+    if (xfer->retry_disabled) {
+      // Halt from our split-XactErr throttle disable (below): re-issue the start-split (pointers already
+      // rewound), giving the hub TT a recovery gap. Programming Guide 3.5 "Halting a Channel" (p73).
+      xfer->retry_disabled = 0;
+      if (xfer->closing) {
+        is_done = true;
+      } else {
+        channel_xfer_start(dwc2, ch_id);
+      }
+    } else if (hcint & (HCINT_XFER_COMPLETE | HCINT_STALL)) {
       is_done = true;
       xfer->err_count = 0;
       if (hcint & HCINT_XFER_COMPLETE) {
@@ -1251,9 +1278,17 @@ static bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hc
          xfer->result = XFER_RESULT_FAILED;
          is_done = true;
        } else {
-         // clean up transfer so far and start again
+         // Rewind, then retry the start-split. Non-periodic SPLIT throttles via channel_disable + re-arm on
+         // the halt (immediate re-fire exhausts the retry budget; the disable gives the hub TT a recovery
+         // gap, like slave). Periodic split is excluded: channel_disable() is a no-op for it, so the halt
+         // never fires and the channel would wedge. Non-split re-inits immediately (Programming Guide 5.1.2.3).
          channel_xfer_out_wrapup(dwc2, ch_id);
-         channel_xfer_start(dwc2, ch_id);
+         if (hcsplt.split_en && !channel_is_periodic(channel->hcchar)) {
+           xfer->retry_disabled = 1;
+           channel_disable(dwc2, channel);
+         } else {
+           channel_xfer_start(dwc2, ch_id);
+         }
        }
      }
     } else if (hcint & HCINT_NYET) {
@@ -1271,6 +1306,12 @@ static bool handle_channel_out_dma(dwc2_regs_t* dwc2, uint8_t ch_id, uint32_t hc
         channel->hcsplt = hcsplt.value;
         channel->hcchar |= HCCHAR_CHENA;
       }
+    } else if ((hcint & HCINT_NAK) && hcsplt.split_en) {
+      // Split OUT NAK: rewind + retry the start-split, else the channel stalls (Programming Guide 5.1.4.2).
+      // Non-split OUT NAK is core-handled (5.1.2.2), so this is split-only.
+      xfer->err_count = 0;
+      channel_xfer_out_wrapup(dwc2, ch_id);
+      channel_xfer_start(dwc2, ch_id);
     }
 
     if (xfer->closing == 1) {
diff --git a/tools/codespell/ignore-words.txt b/tools/codespell/ignore-words.txt
index 7ce778fab..0b1aa284a 100644
--- a/tools/codespell/ignore-words.txt
+++ b/tools/codespell/ignore-words.txt
@@ -6,6 +6,7 @@ fro
 hsi
 inout
 mot
+ore
 pris
 ptd
 ser
-- 
cgit v1.3.1


From ad8cbc4668ab8d92e2eebb834c230e9d18ad8e57 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jun 2026 10:58:58 +0700
Subject: dcd/ch32_usbfs: support CH32V103 combined endpoint control register

CH32V103 uses the older USBFS IP: a single combined UEPn_CTRL register per
endpoint (IN response in bits [1:0], OUT response in [3:2], shared auto-toggle,
separate IN/OUT toggles) instead of the separate UEPn_TX_CTRL/UEPn_RX_CTRL
bytes of the newer IP (CH32V20x/V307). The shared driver was written for the
newer IP, so EP0 control transfers never worked on V103: the OUT response was
written to a reserved byte and the IN write clobbered the OUT bits.

- ch32_usbfs_reg.h: annotate the V103 register struct with byte offsets and add
  a union exposing the combined UEPn_CTRL at the UEPn_TX_CTRL offset; define
  CH32_USBFS_EP_CTRL_COMBINED and the combined-register bit positions.
- dcd_ch32_usbfs.c: abstract EP control access behind ep_tx/rx_ctrl_set() (full
  write) and ep_tx/rx_set_response() (response-only RMW). The newer-IP path is
  unchanged; the combined path read-modify-writes the single register and arms
  the post-SETUP data stage at DATA1.
- bsp/ch32v10x: implement board_get_unique_id() (real chip UID) and drop the
  CSR 0x800 writes that corrupted the QingKe V3 interrupt config and left all
  interrupts disabled (the USB ISR never ran).

Verified on ch32v103r_r1_1v0: enumerates and passes HIL for cdc_msc, hid,
msc, midi, mtp, dfu, etc.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/ch32v10x/family.c          |  39 +++++------
 src/portable/wch/ch32_usbfs_reg.h | 140 +++++++++++++++++++++++++-------------
 src/portable/wch/dcd_ch32_usbfs.c |  95 +++++++++++++++++++-------
 3 files changed, 181 insertions(+), 93 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch32v10x/family.c b/hw/bsp/ch32v10x/family.c
index 9f5dc5572..aa709b0d8 100644
--- a/hw/bsp/ch32v10x/family.c
+++ b/hw/bsp/ch32v10x/family.c
@@ -66,26 +66,14 @@ uint32_t tusb_time_millis_api(void) {
 }
 #endif
 
-// 0x800 CSR register is writable in U-mode
-// according to manual: https://www.wch-ic.com/downloads/QingKeV3_Processor_Manual_PDF.html
-__attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_enable_irq(void)
-{
-  __asm volatile ("csrs 0x800, %0" : : "r" (0x88) );
-}
-
-__attribute__((always_inline)) RV_STATIC_INLINE
-void __wch_vendor_disable_irq(void)
-{
-  __asm volatile ("csrc 0x800, %0" : : "r" (0x88) );
-  __asm volatile ("fence.i");
-}
-
 void board_init(void) {
-  /* __disable_irq() in CH32V103 EVT attempts to call
-   * `csrc mstatus, 0x88` in U-mode, which is allowed ONLY in M-mode.
-   * Replace this with CSR 0x800 to avoid hard-fault. */
-  __wch_vendor_disable_irq();
+  /* Do NOT toggle the global interrupt enable here.
+   * CH32V103 startup enters U-mode (mret with mstatus.MPP=0), so:
+   *  - the SDK __disable_irq()/__enable_irq() write mstatus, which faults in U-mode;
+   *  - writing CSR 0x800 (INTSYSCR) corrupts the QingKe V3 interrupt-mode config,
+   *    which made the USB interrupt vector to a bad address (PC=0) and hang.
+   * The startup already leaves interrupts correctly configured, and machine-mode
+   * interrupts are globally enabled while running in U-mode regardless of mstatus.MIE. */
 
 #if CFG_TUSB_OS == OPT_OS_NONE
   SysTick_Config(SystemCoreClock / 1000);
@@ -142,8 +130,6 @@ void board_init(void) {
   USART_Init(USART1, &usart);
   USART_Cmd(USART1, ENABLE);
 
-  __wch_vendor_enable_irq();
-
   board_led_write(true);
 }
 
@@ -155,6 +141,17 @@ uint32_t board_button_read(void) {
   return BUTTON_STATE_ACTIVE == GPIO_ReadInputDataBit(BUTTON_PORT, BUTTON_PIN);
 }
 
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  (void) max_len;
+  volatile uint32_t* ch32_uuid = ((volatile uint32_t*) 0x1FFFF7E8UL);
+  uint32_t* serial_32 = (uint32_t*) (uintptr_t) id;
+  serial_32[0] = ch32_uuid[0];
+  serial_32[1] = ch32_uuid[1];
+  serial_32[2] = ch32_uuid[2];
+
+  return 12;
+}
+
 int board_uart_read(uint8_t *buf, int len) {
   (void) buf;
   (void) len;
diff --git a/src/portable/wch/ch32_usbfs_reg.h b/src/portable/wch/ch32_usbfs_reg.h
index 68be64f5e..7ffdc6cef 100644
--- a/src/portable/wch/ch32_usbfs_reg.h
+++ b/src/portable/wch/ch32_usbfs_reg.h
@@ -39,59 +39,92 @@
   #include <ch32f20x.h>
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V103
   #include <ch32v10x.h>
+  // Newer-IP layout (separate UEPn_TX_CTRL/UEPn_RX_CTRL). The older IP (CH32V103) has a single
+  // combined control register at the UEPn_TX_CTRL offset, with UEPn_RX_CTRL reserved; the union
+  // exposes that same byte as UEPn_CTRL. Offsets are byte offsets from the peripheral base.
+  // TODO unify into a single struct shared by all WCH USBFS parts.
   typedef struct
   {
-    __IO uint8_t  BASE_CTRL;
-    __IO uint8_t  UDEV_CTRL;
-    __IO uint8_t  INT_EN;
-    __IO uint8_t  DEV_ADDR;
-    __IO uint8_t  Reserve0;
-    __IO uint8_t  MIS_ST;
-    __IO uint8_t  INT_FG;
-    __IO uint8_t  INT_ST;
-    __IO uint32_t RX_LEN;
-    __IO uint8_t  UEP4_1_MOD;
-    __IO uint8_t  UEP2_3_MOD;
-    __IO uint8_t  UEP5_6_MOD;
-    __IO uint8_t  UEP7_MOD;
-    __IO uint32_t UEP0_DMA;
-    __IO uint32_t UEP1_DMA;
-    __IO uint32_t UEP2_DMA;
-    __IO uint32_t UEP3_DMA;
-    __IO uint32_t UEP4_DMA;
-    __IO uint32_t UEP5_DMA;
-    __IO uint32_t UEP6_DMA;
-    __IO uint32_t UEP7_DMA;
-    __IO uint16_t UEP0_TX_LEN;
-    __IO uint8_t  UEP0_TX_CTRL;
-    __IO uint8_t  UEP0_RX_CTRL;
-    __IO uint16_t UEP1_TX_LEN;
-    __IO uint8_t  UEP1_TX_CTRL;
-    __IO uint8_t  UEP1_RX_CTRL;
-    __IO uint16_t UEP2_TX_LEN;
-    __IO uint8_t  UEP2_TX_CTRL;
-    __IO uint8_t  UEP2_RX_CTRL;
-    __IO uint16_t UEP3_TX_LEN;
-    __IO uint8_t  UEP3_TX_CTRL;
-    __IO uint8_t  UEP3_RX_CTRL;
-    __IO uint16_t UEP4_TX_LEN;
-    __IO uint8_t  UEP4_TX_CTRL;
-    __IO uint8_t  UEP4_RX_CTRL;
-    __IO uint16_t UEP5_TX_LEN;
-    __IO uint8_t  UEP5_TX_CTRL;
-    __IO uint8_t  UEP5_RX_CTRL;
-    __IO uint16_t UEP6_TX_LEN;
-    __IO uint8_t  UEP6_TX_CTRL;
-    __IO uint8_t  UEP6_RX_CTRL;
-    __IO uint16_t UEP7_TX_LEN;
-    __IO uint8_t  UEP7_TX_CTRL;
-    __IO uint8_t  UEP7_RX_CTRL;
-    __IO uint32_t Reserve1;
-    __IO uint32_t OTG_CR;
-    __IO uint32_t OTG_SR;
+    __IO uint8_t  BASE_CTRL;        // 0x00
+    __IO uint8_t  UDEV_CTRL;        // 0x01
+    __IO uint8_t  INT_EN;           // 0x02
+    __IO uint8_t  DEV_ADDR;         // 0x03
+    __IO uint8_t  Reserve0;         // 0x04
+    __IO uint8_t  MIS_ST;           // 0x05
+    __IO uint8_t  INT_FG;           // 0x06
+    __IO uint8_t  INT_ST;           // 0x07
+    __IO uint32_t RX_LEN;           // 0x08
+    __IO uint8_t  UEP4_1_MOD;       // 0x0C
+    __IO uint8_t  UEP2_3_MOD;       // 0x0D
+    __IO uint8_t  UEP5_6_MOD;       // 0x0E
+    __IO uint8_t  UEP7_MOD;         // 0x0F
+    __IO uint32_t UEP0_DMA;         // 0x10
+    __IO uint32_t UEP1_DMA;         // 0x14
+    __IO uint32_t UEP2_DMA;         // 0x18
+    __IO uint32_t UEP3_DMA;         // 0x1C
+    __IO uint32_t UEP4_DMA;         // 0x20
+    __IO uint32_t UEP5_DMA;         // 0x24
+    __IO uint32_t UEP6_DMA;         // 0x28
+    __IO uint32_t UEP7_DMA;         // 0x2C
+    __IO uint16_t UEP0_TX_LEN;      // 0x30
+    union {
+      __IO uint8_t UEP0_TX_CTRL;
+      __IO uint8_t UEP0_CTRL;
+    };                              // 0x32 (TX_CTRL: IN | CTRL: combined)
+    __IO uint8_t  UEP0_RX_CTRL;     // 0x33 (OUT ctrl; reserved on combined IP)
+    __IO uint16_t UEP1_TX_LEN;      // 0x34
+    union {
+      __IO uint8_t UEP1_TX_CTRL;
+      __IO uint8_t UEP1_CTRL;
+    };                              // 0x36
+    __IO uint8_t  UEP1_RX_CTRL;     // 0x37
+    __IO uint16_t UEP2_TX_LEN;      // 0x38
+    union {
+      __IO uint8_t UEP2_TX_CTRL;
+      __IO uint8_t UEP2_CTRL;
+    };                              // 0x3A
+    __IO uint8_t  UEP2_RX_CTRL;     // 0x3B
+    __IO uint16_t UEP3_TX_LEN;      // 0x3C
+    union {
+      __IO uint8_t UEP3_TX_CTRL;
+      __IO uint8_t UEP3_CTRL;
+    };                              // 0x3E
+    __IO uint8_t  UEP3_RX_CTRL;     // 0x3F
+    __IO uint16_t UEP4_TX_LEN;      // 0x40
+    union {
+      __IO uint8_t UEP4_TX_CTRL;
+      __IO uint8_t UEP4_CTRL;
+    };                              // 0x42
+    __IO uint8_t  UEP4_RX_CTRL;     // 0x43
+    __IO uint16_t UEP5_TX_LEN;      // 0x44
+    union {
+      __IO uint8_t UEP5_TX_CTRL;
+      __IO uint8_t UEP5_CTRL;
+    };                              // 0x46
+    __IO uint8_t  UEP5_RX_CTRL;     // 0x47
+    __IO uint16_t UEP6_TX_LEN;      // 0x48
+    union {
+      __IO uint8_t UEP6_TX_CTRL;
+      __IO uint8_t UEP6_CTRL;
+    };                              // 0x4A
+    __IO uint8_t  UEP6_RX_CTRL;     // 0x4B
+    __IO uint16_t UEP7_TX_LEN;      // 0x4C
+    union {
+      __IO uint8_t UEP7_TX_CTRL;
+      __IO uint8_t UEP7_CTRL;
+    };                              // 0x4E
+    __IO uint8_t  UEP7_RX_CTRL;     // 0x4F
+    __IO uint32_t Reserve1;         // 0x50
+    __IO uint32_t OTG_CR;           // 0x54
+    __IO uint32_t OTG_SR;           // 0x58
   } USBOTG_FS_TypeDef;
 
   #define USBOTG_FS ((USBOTG_FS_TypeDef *) 0x40023400)
+
+  // CH32V103 has the older USBFS IP: a single combined control register per endpoint
+  // (UEPn_CTRL) instead of separate TX_CTRL/RX_CTRL bytes. The struct's UEPn_TX_CTRL field
+  // aliases that combined register (same address); UEPn_RX_CTRL maps to unused padding.
+  #define CH32_USBFS_EP_CTRL_COMBINED 1
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V20X
   #include <ch32v20x.h>
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V307
@@ -166,6 +199,17 @@
 #define USBFS_EP_R_RES_NAK   (2 << 0)
 #define USBFS_EP_R_RES_STALL (3 << 0)
 
+#ifdef CH32_USBFS_EP_CTRL_COMBINED
+// Combined per-endpoint control register (older IP, e.g. CH32V103): IN response in
+// bits [1:0], OUT response in bits [3:2], shared auto-toggle, separate IN/OUT toggle.
+#define USBFS_EPC_T_RES_MASK  0x03
+#define USBFS_EPC_R_RES_MASK  0x0C
+#define USBFS_EPC_R_RES_SHIFT 2
+#define USBFS_EPC_AUTO_TOG    0x10
+#define USBFS_EPC_T_TOG       0x40
+#define USBFS_EPC_R_TOG       0x80
+#endif
+
 // token PID
 #define PID_OUT   0
 #define PID_SOF   1
diff --git a/src/portable/wch/dcd_ch32_usbfs.c b/src/portable/wch/dcd_ch32_usbfs.c
index af0f17785..dae31da91 100644
--- a/src/portable/wch/dcd_ch32_usbfs.c
+++ b/src/portable/wch/dcd_ch32_usbfs.c
@@ -40,6 +40,52 @@
   #define EP_TX_CTRL(ep) ((&USBOTG_FS->UEP0_TX_CTRL)[4 * ep])
   #define EP_RX_CTRL(ep) ((&USBOTG_FS->UEP0_RX_CTRL)[4 * ep])
 
+// Endpoint control register access. The newer USBFS IP (CH32V20x/V307/X035) has separate
+// TX_CTRL and RX_CTRL bytes per endpoint; the older IP (CH32V103) has a single combined
+// UEPn_CTRL register. These helpers hide the difference so the rest of the driver is shared.
+// Values use the newer-IP encoding (USBFS_EP_T_*/USBFS_EP_R_*); the combined path remaps them.
+#ifdef CH32_USBFS_EP_CTRL_COMBINED
+  #define EP_CTRL(ep) EP_TX_CTRL(ep) // UEPn_TX_CTRL field aliases the combined UEPn_CTRL register
+
+  static inline uint8_t ep_tx_to_comb(uint8_t v) {
+    uint8_t c = v & USBFS_EP_T_RES_MASK; // IN response: bits [1:0] in both encodings
+    if (v & USBFS_EP_T_TOG)      { c |= USBFS_EPC_T_TOG; }
+    if (v & USBFS_EP_T_AUTO_TOG) { c |= USBFS_EPC_AUTO_TOG; }
+    return c;
+  }
+  static inline uint8_t ep_rx_to_comb(uint8_t v) {
+    uint8_t c = (uint8_t) ((v & USBFS_EP_R_RES_MASK) << USBFS_EPC_R_RES_SHIFT); // OUT response -> bits [3:2]
+    if (v & USBFS_EP_R_TOG)      { c |= USBFS_EPC_R_TOG; }
+    if (v & USBFS_EP_R_AUTO_TOG) { c |= USBFS_EPC_AUTO_TOG; }
+    return c;
+  }
+  // Set IN side (response/toggle/auto-tog), preserving the OUT response + OUT toggle.
+  static inline void ep_tx_ctrl_set(uint8_t ep, uint8_t v) {
+    EP_CTRL(ep) = (uint8_t) ((EP_CTRL(ep) & (USBFS_EPC_R_RES_MASK | USBFS_EPC_R_TOG)) | ep_tx_to_comb(v));
+  }
+  // Set OUT side, preserving the IN response + IN toggle.
+  static inline void ep_rx_ctrl_set(uint8_t ep, uint8_t v) {
+    EP_CTRL(ep) = (uint8_t) ((EP_CTRL(ep) & (USBFS_EPC_T_RES_MASK | USBFS_EPC_T_TOG)) | ep_rx_to_comb(v));
+  }
+  static inline void ep_tx_set_response(uint8_t ep, uint8_t res) {
+    EP_CTRL(ep) = (uint8_t) ((EP_CTRL(ep) & ~USBFS_EPC_T_RES_MASK) | (res & USBFS_EP_T_RES_MASK));
+  }
+  static inline void ep_rx_set_response(uint8_t ep, uint8_t res) {
+    EP_CTRL(ep) = (uint8_t) ((EP_CTRL(ep) & ~USBFS_EPC_R_RES_MASK) | ((res & USBFS_EP_R_RES_MASK) << USBFS_EPC_R_RES_SHIFT));
+  }
+  #define EP0_SETUP_RX_TOG USBFS_EP_R_TOG // combined IP: data/status stage after SETUP is DATA1
+#else
+  static inline void ep_tx_ctrl_set(uint8_t ep, uint8_t v) { EP_TX_CTRL(ep) = v; }
+  static inline void ep_rx_ctrl_set(uint8_t ep, uint8_t v) { EP_RX_CTRL(ep) = v; }
+  static inline void ep_tx_set_response(uint8_t ep, uint8_t res) {
+    EP_TX_CTRL(ep) = (uint8_t) ((EP_TX_CTRL(ep) & ~USBFS_EP_T_RES_MASK) | res);
+  }
+  static inline void ep_rx_set_response(uint8_t ep, uint8_t res) {
+    EP_RX_CTRL(ep) = (uint8_t) ((EP_RX_CTRL(ep) & ~USBFS_EP_R_RES_MASK) | res);
+  }
+  #define EP0_SETUP_RX_TOG 0
+#endif
+
 /* private data */
 struct usb_xfer {
   bool     valid;
@@ -81,19 +127,19 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force) {
 
       EP_TX_LEN(ep) = len;
       if (ep == 0) {
-        EP_TX_CTRL(0) = USBFS_EP_T_RES_ACK | (data.ep0_tog ? USBFS_EP_T_TOG : 0);
+        ep_tx_ctrl_set(0, USBFS_EP_T_RES_ACK | (data.ep0_tog ? USBFS_EP_T_TOG : 0));
         data.ep0_tog  = !data.ep0_tog;
       } else if (data.isochronous[ep]) {
-        EP_TX_CTRL(ep) = (EP_TX_CTRL(ep) & ~(USBFS_EP_T_RES_MASK)) | USBFS_EP_T_RES_NYET;
+        ep_tx_set_response(ep, USBFS_EP_T_RES_NYET);
       } else {
-        EP_TX_CTRL(ep) = (EP_TX_CTRL(ep) & ~(USBFS_EP_T_RES_MASK)) | USBFS_EP_T_RES_ACK;
+        ep_tx_set_response(ep, USBFS_EP_T_RES_ACK);
       }
     } else {
       xfer->valid = false;
       if (ep == 0) {
-        EP_TX_CTRL(0) = USBFS_EP_T_RES_NAK | (data.ep0_tog ? USBFS_EP_T_TOG : 0);
+        ep_tx_ctrl_set(0, USBFS_EP_T_RES_NAK | (data.ep0_tog ? USBFS_EP_T_TOG : 0));
       } else if (!data.isochronous[ep]) {
-        EP_TX_CTRL(ep) = (EP_TX_CTRL(ep) & ~(USBFS_EP_T_RES_MASK)) | USBFS_EP_T_RES_NAK;
+        ep_tx_set_response(ep, USBFS_EP_T_RES_NAK);
       }
       dcd_event_xfer_complete(rhport, ep | TUSB_DIR_IN_MASK, xfer->processed_len, XFER_RESULT_SUCCESS, true);
     }
@@ -119,11 +165,11 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
     }
 
     if (ep == 0) {
-      EP_RX_CTRL(0) = USBFS_EP_R_RES_NAK;
+      ep_rx_set_response(0, USBFS_EP_R_RES_NAK);
     } else {
       uint8_t rx_res =
         data.isochronous[ep] ? USBFS_EP_R_RES_NYET : (xfer->valid ? USBFS_EP_R_RES_ACK : USBFS_EP_R_RES_NAK);
-      EP_RX_CTRL(ep) = (EP_RX_CTRL(ep) & ~USBFS_EP_R_RES_MASK) | rx_res;
+      ep_rx_set_response(ep, rx_res);
     }
   }
 }
@@ -132,8 +178,8 @@ static void reset_ep_ctrls(void) {
   for (uint8_t ep = 1; ep < EP_MAX; ep++) {
     EP_DMA(ep)     = (uint32_t)&data.buffer[ep][0];
     EP_TX_LEN(ep)  = 0;
-    EP_TX_CTRL(ep) = USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NYET;
-    EP_RX_CTRL(ep) = USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NYET;
+    ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NYET);
+    ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NYET);
   }
   EP_DMA(3) = (uint32_t)&data.ep3_buffer.out[0];
 }
@@ -152,8 +198,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   // setup endpoint 0
   EP_DMA(0)     = (uint32_t)&data.buffer[0][0];
   EP_TX_LEN(0)  = 0;
-  EP_TX_CTRL(0) = USBFS_EP_T_RES_NAK;
-  EP_RX_CTRL(0) = USBFS_EP_R_RES_ACK;
+  ep_tx_ctrl_set(0, USBFS_EP_T_RES_NAK);
+  ep_rx_ctrl_set(0, USBFS_EP_R_RES_ACK);
 
   // enable other endpoints but NAK everything
   USBOTG_FS->UEP4_1_MOD = 0xCC;
@@ -188,11 +234,12 @@ void dcd_int_handler(uint8_t rhport) {
 
       case PID_SETUP:
         // setup clears stall
-        EP_TX_CTRL(0) = USBFS_EP_T_RES_NAK;
+        ep_tx_ctrl_set(0, USBFS_EP_T_RES_NAK);
         data.ep0_tog  = true;
 
         const tusb_control_request_t *setup = (const tusb_control_request_t *)&data.buffer[0][TUSB_DIR_OUT][0];
-        EP_RX_CTRL(0)                       = (setup->wLength == 0) ? USBFS_EP_R_RES_ACK : USBFS_EP_R_RES_NAK;
+        // EP0_SETUP_RX_TOG arms the data/status stage at DATA1 on the combined-control IP
+        ep_rx_ctrl_set(0, ((setup->wLength == 0) ? USBFS_EP_R_RES_ACK : USBFS_EP_R_RES_NAK) | EP0_SETUP_RX_TOG);
 
         dcd_event_setup_received(rhport, &data.buffer[0][TUSB_DIR_OUT][0], true);
         break;
@@ -210,7 +257,7 @@ void dcd_int_handler(uint8_t rhport) {
                         true);
 
     USBOTG_FS->DEV_ADDR = 0x00;
-    EP_RX_CTRL(0)       = USBFS_EP_R_RES_ACK;
+    ep_rx_ctrl_set(0, USBFS_EP_R_RES_ACK);
 
     reset_ep_ctrls();
 
@@ -277,9 +324,9 @@ bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
 
   if (ep != 0) {
     if (dir == TUSB_DIR_OUT) {
-      EP_RX_CTRL(ep) = USBFS_EP_R_AUTO_TOG | USBFS_EP_T_RES_NAK;
+      ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
     } else {
-      EP_TX_CTRL(ep) = USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK;
+      ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
     }
   }
   return true;
@@ -326,7 +373,7 @@ bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t *buffer, uint16_t to
     update_in(rhport, ep, true);
   } else {
     uint8_t rx_res = data.isochronous[ep] ? USBFS_EP_R_RES_NYET : USBFS_EP_R_RES_ACK;
-    EP_RX_CTRL(ep) = (EP_RX_CTRL(ep) & ~USBFS_EP_R_RES_MASK) | rx_res;
+    ep_rx_set_response(ep, rx_res);
   }
   return true;
 }
@@ -337,16 +384,16 @@ void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
   uint8_t dir = tu_edpt_dir(ep_addr);
   if (ep == 0) {
     if (dir == TUSB_DIR_OUT) {
-      EP_RX_CTRL(0) = USBFS_EP_R_RES_STALL;
+      ep_rx_ctrl_set(0, USBFS_EP_R_RES_STALL);
     } else {
       EP_TX_LEN(0)  = 0;
-      EP_TX_CTRL(0) = USBFS_EP_T_RES_STALL;
+      ep_tx_ctrl_set(0, USBFS_EP_T_RES_STALL);
     }
   } else {
     if (dir == TUSB_DIR_OUT) {
-      EP_RX_CTRL(ep) = (EP_RX_CTRL(ep) & ~USBFS_EP_R_RES_MASK) | USBFS_EP_R_RES_STALL;
+      ep_rx_set_response(ep, USBFS_EP_R_RES_STALL);
     } else {
-      EP_TX_CTRL(ep) = (EP_TX_CTRL(ep) & ~USBFS_EP_T_RES_MASK) | USBFS_EP_T_RES_STALL;
+      ep_tx_set_response(ep, USBFS_EP_T_RES_STALL);
     }
   }
 }
@@ -357,13 +404,13 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
   uint8_t dir = tu_edpt_dir(ep_addr);
   if (ep == 0) {
     if (dir == TUSB_DIR_OUT) {
-      EP_RX_CTRL(0) = USBFS_EP_R_RES_ACK;
+      ep_rx_ctrl_set(0, USBFS_EP_R_RES_ACK);
     }
   } else {
     if (dir == TUSB_DIR_OUT) {
-      EP_RX_CTRL(ep) = USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK;
+      ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
     } else {
-      EP_TX_CTRL(ep) = USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK;
+      ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
     }
   }
 }
-- 
cgit v1.3.1


From ea5b8d677f22f4bd1574f864fd0487dfd329c090 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jun 2026 17:59:30 +0700
Subject: dcd/ch58x: drive CH582/583 with shared dcd_ch32_usbfs.c

Replace PR #3515's separate dcd_ch58x_usbfs.c / hcd_ch58x_usbfs.c with the
shared WCH USBFS device driver (combined per-endpoint control, like CH32V103),
adding two CH58x-specific behaviors guarded so CH32V103/V20x/V307 are unchanged:

- CH32_USBFS_EP_MANUAL_TOG: CH58x's hardware AUTO_TOG does not stay in sync, so
  the ISR toggles DATA0/DATA1 manually and discards toggle-mismatched OUT
  packets. Fixes multi-packet bulk-IN (e.g. MSC READ10) that otherwise hung.
- CH32_USBFS_EP4_SHARES_EP0: EP4 has no DMA register and overlays EP0's region
  (EP0[0:63] + EP4 OUT[64:127] + EP4 IN[128:191]); add a 192-byte shared buffer
  and buffer-pointer helpers (transparent for the other parts). Fixes
  cdc_dual_ports (Port1 is on EP4).

Add the ch582m_evt board. Device only on USB0 (rhport 0): the shared
hcd_ch32_usbfs.c is CH32V20x-specific and cannot drive CH58x, so host / USB2
(rhport 1) is left commented out in the BSP for easy re-add.

Verified on ch582m_evt via local HIL: all device examples pass.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/ch58x/boards/ch582m_evt/board.cmake |   5 +
 hw/bsp/ch58x/boards/ch582m_evt/board.h     |  61 +++
 hw/bsp/ch58x/boards/ch582m_evt/board.mk    |   3 +
 hw/bsp/ch58x/boards/yd-ch582m/board.h      |  10 +-
 hw/bsp/ch58x/ch58x_it.h                    |   2 +-
 hw/bsp/ch58x/family.c                      |  27 +-
 hw/bsp/ch58x/family.cmake                  |   3 +-
 hw/bsp/ch58x/family.mk                     |   3 +-
 src/common/tusb_mcu.h                      |  11 +-
 src/portable/wch/ch32_usbfs_reg.h          |  48 ++
 src/portable/wch/ch58x_usbfs_reg.h         | 291 ------------
 src/portable/wch/dcd_ch32_usbfs.c          | 125 +++--
 src/portable/wch/dcd_ch58x_usbfs.c         | 636 -------------------------
 src/portable/wch/hcd_ch58x_usbfs.c         | 721 -----------------------------
 14 files changed, 244 insertions(+), 1702 deletions(-)
 create mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.cmake
 create mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.h
 create mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.mk
 delete mode 100644 src/portable/wch/ch58x_usbfs_reg.h
 delete mode 100644 src/portable/wch/dcd_ch58x_usbfs.c
 delete mode 100644 src/portable/wch/hcd_ch58x_usbfs.c

(limited to 'hw')

diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.cmake b/hw/bsp/ch58x/boards/ch582m_evt/board.cmake
new file mode 100644
index 000000000..4129c4550
--- /dev/null
+++ b/hw/bsp/ch58x/boards/ch582m_evt/board.cmake
@@ -0,0 +1,5 @@
+set(LD_FLASH_SIZE 448K)
+set(LD_RAM_SIZE 32K)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.h b/hw/bsp/ch58x/boards/ch582m_evt/board.h
new file mode 100644
index 000000000..c3483bf17
--- /dev/null
+++ b/hw/bsp/ch58x/boards/ch582m_evt/board.h
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* metadata:
+   name: CH582M-EVT evaluation board
+   url: https://www.wch-ic.com/products/CH582.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED: PB4 on CH582M-EVT
+#define LED_PIN               GPIO_Pin_4
+#define LED_STATE_ON          0
+
+// Directly reuse BOOT pin as user button
+#define BUTTON_PIN            GPIO_Pin_22
+#define BUTTON_STATE_ACTIVE   0
+
+// UART: UART1 TX=PA9, RX=PA8
+#define CFG_BOARD_UART_BAUDRATE   115200
+
+// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
+// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT  0
+#endif
+// #ifndef BOARD_TUH_RHPORT
+// #define BOARD_TUH_RHPORT  1
+// #endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.mk b/hw/bsp/ch58x/boards/ch582m_evt/board.mk
new file mode 100644
index 000000000..a13979799
--- /dev/null
+++ b/hw/bsp/ch58x/boards/ch582m_evt/board.mk
@@ -0,0 +1,3 @@
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=448K \
+  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.h b/hw/bsp/ch58x/boards/yd-ch582m/board.h
index a14ffd198..0da5747bc 100644
--- a/hw/bsp/ch58x/boards/yd-ch582m/board.h
+++ b/hw/bsp/ch58x/boards/yd-ch582m/board.h
@@ -45,14 +45,14 @@ extern "C" {
 // UART: UART1 TX=PA9, RX=PA8
 #define CFG_BOARD_UART_BAUDRATE   115200
 
-// Dual-port: USB1 (rhport 0) = Device, USB2 (rhport 1) = Host
-// Swap these two if you want the opposite assignment
+// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
+// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
 #ifndef BOARD_TUD_RHPORT
 #define BOARD_TUD_RHPORT  0
 #endif
-#ifndef BOARD_TUH_RHPORT
-#define BOARD_TUH_RHPORT  1
-#endif
+// #ifndef BOARD_TUH_RHPORT
+// #define BOARD_TUH_RHPORT  1
+// #endif
 
 #ifdef __cplusplus
 }
diff --git a/hw/bsp/ch58x/ch58x_it.h b/hw/bsp/ch58x/ch58x_it.h
index 18ea52bc9..3e050344d 100644
--- a/hw/bsp/ch58x/ch58x_it.h
+++ b/hw/bsp/ch58x/ch58x_it.h
@@ -36,7 +36,7 @@ extern "C" {
 void NMI_Handler(void);
 void HardFault_Handler(void);
 void USB_IRQHandler(void);
-void USB2_IRQHandler(void);
+// void USB2_IRQHandler(void); // host on USB2 (rhport 1) — re-add together with the host driver
 void SysTick_Handler(void);
 
 #ifdef __cplusplus
diff --git a/hw/bsp/ch58x/family.c b/hw/bsp/ch58x/family.c
index 3b1382e61..8e5f2826b 100644
--- a/hw/bsp/ch58x/family.c
+++ b/hw/bsp/ch58x/family.c
@@ -50,13 +50,16 @@
 // Forward USB interrupt events to TinyUSB IRQ Handler
 //--------------------------------------------------------------------+
 
+// Device only: the shared dcd_ch32_usbfs.c drives USB0 (rhport 0). CH58x's second controller
+// (USB2 / rhport 1) was driven by the now-removed ch58x host driver; its handler is kept
+// commented out below to ease re-adding host support.
 __INTERRUPT __HIGH_CODE void USB_IRQHandler(void) {
   tusb_int_handler(0, true);
 }
 
-__INTERRUPT __HIGH_CODE void USB2_IRQHandler(void) {
-  tusb_int_handler(1, true);
-}
+// __INTERRUPT __HIGH_CODE void USB2_IRQHandler(void) {
+//   tusb_int_handler(1, true);
+// }
 
 //--------------------------------------------------------------------+
 // SysTick
@@ -111,16 +114,12 @@ void board_init(void) {
   #endif
 #endif
 
-  // USB pin enable: enable analog function for USB1 and USB2 D+/D-
-  R16_PIN_ANALOG_IE |= RB_PIN_USB_IE | RB_PIN_USB2_IE;
-
-  // D+ pull-up is only needed for the device-role port
+  // Device only on USB0 (rhport 0): enable analog function for USB1 D+/D- and assert its D+
+  // pull-up. The shared dcd_ch32_usbfs.c drives USB0; CH58x host / USB2 (rhport 1) is unsupported
+  // here — to re-add host, also OR in RB_PIN_USB2_IE below.
+  R16_PIN_ANALOG_IE |= RB_PIN_USB_IE; // | RB_PIN_USB2_IE  (re-add for host on USB2)
 #if CFG_TUD_ENABLED
-  #if BOARD_TUD_RHPORT == 0
-    R16_PIN_ANALOG_IE |= RB_PIN_USB_DP_PU;
-  #else
-    R16_PIN_ANALOG_IE |= RB_PIN_USB2_DP_PU;
-  #endif
+  R16_PIN_ANALOG_IE |= RB_PIN_USB_DP_PU;
 #endif
 
   // Keep USB clock active during sleep
@@ -164,6 +163,10 @@ uint32_t board_button_read(void) {
 #endif
 }
 
+// Note: CH58x exposes no memory-mapped unique-ID register (unlike ch32v10x/v20x at
+// 0x1FFFF7E8), and the SDK's GET_UNIQUE_ID() is a BootROM stub not present in
+// libISP583.a. So board_get_unique_id() falls back to the fixed default in board.c.
+
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
   (void) len;
diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index b4835cb41..cbe1ffe72 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -77,8 +77,7 @@ function(family_configure_example TARGET RTOS)
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
     ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    ${TOP}/src/portable/wch/dcd_ch58x_usbfs.c
-    ${TOP}/src/portable/wch/hcd_ch58x_usbfs.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
     ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
     )
   target_include_directories(${TARGET} PUBLIC
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 71c2cada6..2ef90a8c3 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -33,8 +33,7 @@ LDFLAGS_GCC += \
 LIBS += $(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/libISP583.a
 
 SRC_C += \
-	src/portable/wch/dcd_ch58x_usbfs.c \
-	src/portable/wch/hcd_ch58x_usbfs.c \
+	src/portable/wch/dcd_ch32_usbfs.c \
 	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_gpio.c \
 	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_clk.c \
 	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_uart1.c \
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index 8408d3ae0..f2a2d92a5 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -660,17 +660,16 @@
   #endif
 
 #elif TU_CHECK_MCU(OPT_MCU_CH58X)
-  // CH582/583 has 2 independent USBFS controllers with merged EP registers, FS only.
-  #define TUP_USBIP_WCH_CH58X
+  // CH582/583 USBFS: older WCH USBFS IP with a single combined per-endpoint control register
+  // (like CH32V103), driven by the shared dcd_ch32_usbfs.c on USB0 (rhport 0). Device only:
+  // the shared hcd_ch32_usbfs.c is CH32V20x-specific and does not support CH58x, so host /
+  // USB2 (rhport 1) is not provided here.
+  #define TUP_USBIP_WCH_USBFS
 
   #ifndef CFG_TUD_WCH_USBIP_USBFS
     #define CFG_TUD_WCH_USBIP_USBFS 1
   #endif
 
-  #ifndef CFG_TUH_WCH_USBIP_USBFS
-    #define CFG_TUH_WCH_USBIP_USBFS 1
-  #endif
-
   #define TUP_DCD_ENDPOINT_MAX 8
 
 //--------------------------------------------------------------------+
diff --git a/src/portable/wch/ch32_usbfs_reg.h b/src/portable/wch/ch32_usbfs_reg.h
index 7ffdc6cef..0d61e183c 100644
--- a/src/portable/wch/ch32_usbfs_reg.h
+++ b/src/portable/wch/ch32_usbfs_reg.h
@@ -130,6 +130,53 @@
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V307
   #include <ch32v30x.h>
   #define USBHD_IRQn OTG_FS_IRQn
+#elif CFG_TUSB_MCU == OPT_MCU_CH58X
+  #include "CH58x_common.h"
+  // CH582/583 USBFS device controller: same combined per-endpoint control register as
+  // CH32V103 (IN response bits[1:0], OUT response bits[3:2]) but a different register map -
+  // the EP control/length block sits lower (EP0_CTRL @ +0x22), EP5-7 are split out, EP4
+  // shares EP0's DMA buffer, and EP5/6/7 mode bits live in one UEP567_MOD. The control/status
+  // block matches CH32. Two FS controllers exist (USB @ 0x40008000, USB2 @ 0x40008400); the
+  // device uses USB0. EP registers are accessed via the CH58X macros below (not the struct).
+  #define CH58X_USBFS_BASE  0x40008000u
+  typedef struct {
+    __IO uint8_t  BASE_CTRL;        // 0x00
+    __IO uint8_t  UDEV_CTRL;        // 0x01
+    __IO uint8_t  INT_EN;           // 0x02
+    __IO uint8_t  DEV_ADDR;         // 0x03
+    __IO uint8_t  Reserve0;         // 0x04
+    __IO uint8_t  MIS_ST;           // 0x05
+    __IO uint8_t  INT_FG;           // 0x06
+    __IO uint8_t  INT_ST;           // 0x07
+    __IO uint8_t  RX_LEN;           // 0x08 (8-bit on CH58X)
+    __IO uint8_t  Reserve1[3];      // 0x09..0x0B
+    __IO uint8_t  UEP4_1_MOD;       // 0x0C
+    __IO uint8_t  UEP2_3_MOD;       // 0x0D
+    __IO uint8_t  UEP567_MOD;       // 0x0E
+  } USBOTG_FS_TypeDef;
+  #define USBOTG_FS  ((USBOTG_FS_TypeDef *) CH58X_USBFS_BASE)
+
+  #define CH32_USBFS_EP_CTRL_COMBINED 1
+  #define CH32_USBFS_EP_REGS_CUSTOM   1   // EP register macros provided here, not by the driver
+  // CH58x's hardware AUTO_TOG does not stay in sync (notably across clear-stall and multi-packet
+  // bulk transfers), causing data-toggle mismatch and bus resets. Drive the toggle manually in
+  // the ISR instead. CH32V103/V20x/V307 keep AUTO_TOG (this macro is undefined for them).
+  #define CH32_USBFS_EP_MANUAL_TOG    1
+  // CH58x EP4 has no DMA register of its own: it overlays EP0's DMA region as
+  // EP0[0:63] + EP4_OUT[64:127] + EP4_IN[128:191], so EP0 needs a 192-byte buffer.
+  #define CH32_USBFS_EP4_SHARES_EP0   1
+  #define USBHD_IRQn USB_IRQn
+  #ifndef NVIC_EnableIRQ
+    #define NVIC_EnableIRQ(n)  PFIC_EnableIRQ(n)
+    #define NVIC_DisableIRQ(n) PFIC_DisableIRQ(n)
+  #endif
+
+  // EP register access. EP0-4: T_LEN @ +0x20+ep*4, CTRL @ +0x22+ep*4. EP5-7 split: T_LEN @
+  // +0x64, CTRL @ +0x66. DMA: EP0-3 @ +0x10+ep*4, EP5-7 @ +0x54; EP4 shares EP0's buffer
+  // (no own DMA reg) so its slot points at a reserved word.
+  #define EP_TX_LEN(ep)  (*(volatile uint8_t  *)(CH58X_USBFS_BASE + ((ep) <= 4u ? 0x20u + (ep)*4u : 0x64u + ((ep)-5u)*4u)))
+  #define EP_CTRL(ep)    (*(volatile uint8_t  *)(CH58X_USBFS_BASE + ((ep) <= 4u ? 0x22u + (ep)*4u : 0x66u + ((ep)-5u)*4u)))
+  #define EP_DMA(ep)     (*(volatile uint16_t *)(CH58X_USBFS_BASE + ((ep) <= 3u ? 0x10u + (ep)*4u : (ep) == 4u ? 0x40u : 0x54u + ((ep)-5u)*4u)))
 #endif
 
 #ifdef __GNUC__
@@ -170,6 +217,7 @@
 // INT_ST
 #define USBFS_INT_ST_MASK_UIS_ENDP(x)  (((x) >> 0) & 0x0F)
 #define USBFS_INT_ST_MASK_UIS_TOKEN(x) (((x) >> 4) & 0x03)
+#define USBFS_INT_ST_TOG_OK            (1 << 6)  // received packet's data toggle matched expectation
 
 // UDEV_CTRL
 #define USBFS_UDEV_CTRL_PORT_EN   (1 << 0)
diff --git a/src/portable/wch/ch58x_usbfs_reg.h b/src/portable/wch/ch58x_usbfs_reg.h
deleted file mode 100644
index 67b47e0b6..000000000
--- a/src/portable/wch/ch58x_usbfs_reg.h
+++ /dev/null
@@ -1,291 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef CH58X_USBFS_REG_H
-#define CH58X_USBFS_REG_H
-
-#include <stdint.h>
-
-//--------------------------------------------------------------------+
-// USB Base Addresses
-//--------------------------------------------------------------------+
-#define CH58X_USB_BASE   0x40008000u
-#define CH58X_USB2_BASE  0x40008400u
-
-//--------------------------------------------------------------------+
-// Global Control / Status Registers
-//--------------------------------------------------------------------+
-#define CH58X_USB_CTRL(base)     (*(volatile uint8_t  *)((base) + 0x00))
-#define CH58X_UDEV_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x01))
-#define CH58X_USB_INT_EN(base)  (*(volatile uint8_t  *)((base) + 0x02))
-#define CH58X_USB_DEV_AD(base)  (*(volatile uint8_t  *)((base) + 0x03))
-#define CH58X_USB_MIS_ST(base)  (*(volatile uint8_t  *)((base) + 0x05))
-#define CH58X_USB_INT_FG(base)  (*(volatile uint8_t  *)((base) + 0x06))
-#define CH58X_USB_INT_ST(base)  (*(volatile uint8_t  *)((base) + 0x07))
-#define CH58X_USB_RX_LEN(base)  (*(volatile uint8_t  *)((base) + 0x08))
-
-//--------------------------------------------------------------------+
-// Endpoint Mode Registers
-//--------------------------------------------------------------------+
-#define CH58X_UEP4_1_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0C))
-#define CH58X_UEP2_3_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0D))
-#define CH58X_UEP567_MOD(base)  (*(volatile uint8_t  *)((base) + 0x0E))
-
-//--------------------------------------------------------------------+
-// Endpoint DMA / T_LEN / CTRL register accessors
-//--------------------------------------------------------------------+
-
-// EP DMA is 16-bit (only low 16 bits of RAM address, high bits implied 0x2000), EP4 shares EP0's DMA register (no independent DMA), so ep==4 maps to base+0x10
-#define CH58X_EP_DMA(base, ep)   (*(volatile uint16_t *)((base) + ((ep) <= 3 ? (0x10u + (ep)*4u) : ((ep) == 4 ? 0x10u : (0x54u + ((ep)-5u)*4u)))))
-#define CH58X_EP_TLEN(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x20u + (ep)*4u) : (0x64u + ((ep)-5u)*4u))))
-#define CH58X_EP_CTRL(base, ep)  (*(volatile uint8_t  *)((base) + ((ep) <= 4 ? (0x22u + (ep)*4u) : (0x66u + ((ep)-5u)*4u))))
-
-//--------------------------------------------------------------------+
-// USB_CTRL (R8_USB_CTRL) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UC_DMA_EN       0x01
-#define CH58X_UC_CLR_ALL      0x02
-#define CH58X_UC_RESET_SIE    0x04
-#define CH58X_UC_INT_BUSY     0x08
-#define CH58X_UC_SYS_CTRL     0x10
-#define CH58X_UC_DEV_PU_EN    0x20
-#define CH58X_UC_LOW_SPEED    0x40
-#define CH58X_UC_HOST_MODE    0x80
-
-//--------------------------------------------------------------------+
-// UDEV_CTRL (R8_UDEV_CTRL) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UD_PORT_EN      0x01
-#define CH58X_UD_GP_BIT       0x02
-#define CH58X_UD_LOW_SPEED    0x04
-#define CH58X_UD_PD_DIS       0x80
-
-//--------------------------------------------------------------------+
-// INT_EN (R8_USB_INT_EN) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UIE_BUS_RST     0x01
-#define CH58X_UIE_DETECT      0x01  /* host mode alias */
-#define CH58X_UIE_TRANSFER    0x02
-#define CH58X_UIE_SUSPEND     0x04
-#define CH58X_UIE_HST_SOF     0x08
-#define CH58X_UIE_FIFO_OV     0x10
-
-//--------------------------------------------------------------------+
-// INT_FG (R8_USB_INT_FG) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UIF_BUS_RST     0x01
-#define CH58X_UIF_DETECT      0x01  /* host mode alias */
-#define CH58X_UIF_TRANSFER    0x02
-#define CH58X_UIF_SUSPEND     0x04
-#define CH58X_UIF_HST_SOF     0x08
-#define CH58X_UIF_FIFO_OV     0x10
-#define CH58X_U_SIE_FREE      0x20
-#define CH58X_U_TOG_OK        0x40
-#define CH58X_U_IS_NAK        0x80
-
-//--------------------------------------------------------------------+
-// INT_ST (R8_USB_INT_ST) parsing
-//--------------------------------------------------------------------+
-#define CH58X_INT_ST_ENDP(x)    (((x) >> 0) & 0x0F)
-#define CH58X_INT_ST_TOKEN(x)   (((x) >> 4) & 0x03)
-#define CH58X_UIS_TOG_OK         0x40  // toggle match flag (device and host)
-#define CH58X_UIS_SETUP_ACT     0x80
-
-// Token PID values
-#define CH58X_PID_OUT    0
-#define CH58X_PID_SOF    1
-#define CH58X_PID_IN     2
-#define CH58X_PID_SETUP  3
-
-//--------------------------------------------------------------------+
-// MIS_ST (R8_USB_MIS_ST) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UMS_DEV_ATTACH  0x01
-#define CH58X_UMS_DM_LEVEL    0x02
-#define CH58X_UMS_SUSPEND     0x04
-#define CH58X_UMS_BUS_RESET   0x08
-#define CH58X_UMS_R_FIFO_RDY  0x10
-#define CH58X_UMS_SIE_FREE    0x20
-#define CH58X_UMS_SOF_ACT     0x40
-#define CH58X_UMS_SOF_PRES    0x80
-
-//--------------------------------------------------------------------+
-// EP CTRL register bit definitions (merged TX+RX in single 8-bit reg)
-//
-//  Bit 7: RB_UEP_R_TOG    RX data toggle
-//  Bit 6: RB_UEP_T_TOG    TX data toggle
-//  Bit 5: (reserved)
-//  Bit 4: RB_UEP_AUTO_TOG auto toggle (EP1/2/3/5/6/7, not EP0/EP4)
-//  Bit 3: R_RES1           RX response high
-//  Bit 2: R_RES0           RX response low
-//  Bit 1: T_RES1           TX response high
-//  Bit 0: T_RES0           TX response low
-//--------------------------------------------------------------------+
-
-// TX response bits[1:0]
-#define CH58X_EP_T_RES_MASK    0x03
-#define CH58X_EP_T_RES_ACK     0x00
-#define CH58X_EP_T_RES_TOUT    0x01  /* ISO: no handshake */
-#define CH58X_EP_T_RES_NAK     0x02
-#define CH58X_EP_T_RES_STALL   0x03
-
-// RX response bits[3:2]
-#define CH58X_EP_R_RES_MASK    0x0C
-#define CH58X_EP_R_RES_ACK     0x00
-#define CH58X_EP_R_RES_TOUT    0x04  /* ISO: no handshake */
-#define CH58X_EP_R_RES_NAK     0x08
-#define CH58X_EP_R_RES_STALL   0x0C
-
-// Toggle and auto-toggle
-#define CH58X_EP_AUTO_TOG      0x10  /* bit 4, shared TX/RX */
-#define CH58X_EP_T_TOG         0x40  /* bit 6, TX DATA toggle */
-#define CH58X_EP_R_TOG         0x80  /* bit 7, RX DATA toggle */
-
-//--------------------------------------------------------------------+
-// EP Mode register (UEP4_1_MOD) bit definitions
-//--------------------------------------------------------------------+
-// R8_UEP4_1_MOD: EP4 in bits[3:2], EP1 in bits[7:4]
-#define CH58X_UEP1_BUF_MOD    0x10
-#define CH58X_UEP1_TX_EN      0x40
-#define CH58X_UEP1_RX_EN      0x80
-#define CH58X_UEP4_TX_EN      0x04
-#define CH58X_UEP4_RX_EN      0x08
-
-// R8_UEP2_3_MOD: EP3 in bits[7:4], EP2 in bits[3:0]
-#define CH58X_UEP2_BUF_MOD    0x01
-#define CH58X_UEP2_TX_EN      0x04
-#define CH58X_UEP2_RX_EN      0x08
-#define CH58X_UEP3_BUF_MOD    0x10
-#define CH58X_UEP3_TX_EN      0x40
-#define CH58X_UEP3_RX_EN      0x80
-
-// R8_UEP567_MOD
-#define CH58X_UEP5_TX_EN      0x01
-#define CH58X_UEP5_RX_EN      0x02
-#define CH58X_UEP6_TX_EN      0x04
-#define CH58X_UEP6_RX_EN      0x08
-#define CH58X_UEP7_TX_EN      0x10
-#define CH58X_UEP7_RX_EN      0x20
-
-//--------------------------------------------------------------------+
-// Host-mode Register Aliases
-// In host mode: EP2 -> RX, EP3 -> TX, EP1_CTRL -> SETUP
-//--------------------------------------------------------------------+
-#define CH58X_UHOST_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x01))  // = UDEV_CTRL
-#define CH58X_UH_EP_MOD(base)    (*(volatile uint8_t  *)((base) + 0x0D))  // = UEP2_3_MOD
-#define CH58X_UH_RX_DMA(base)    (*(volatile uint16_t *)((base) + 0x18))  // = UEP2_DMA
-#define CH58X_UH_TX_DMA(base)    (*(volatile uint16_t *)((base) + 0x1C))  // = UEP3_DMA
-#define CH58X_UH_SETUP(base)     (*(volatile uint8_t  *)((base) + 0x26))  // = UEP1_CTRL
-#define CH58X_UH_EP_PID(base)    (*(volatile uint8_t  *)((base) + 0x28))  // = UEP2_T_LEN
-#define CH58X_UH_RX_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x2A))  // = UEP2_CTRL
-#define CH58X_UH_TX_LEN(base)    (*(volatile uint8_t  *)((base) + 0x2C))  // = UEP3_T_LEN
-#define CH58X_UH_TX_CTRL(base)   (*(volatile uint8_t  *)((base) + 0x2E))  // = UEP3_CTRL
-
-//--------------------------------------------------------------------+
-// UHOST_CTRL (R8_UHOST_CTRL) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UH_PD_DIS           0x80
-#define CH58X_UH_LOW_SPEED        0x04
-#define CH58X_UH_BUS_RESET        0x02
-#define CH58X_UH_PORT_EN          0x01
-
-//--------------------------------------------------------------------+
-// UH_EP_MOD (R8_UH_EP_MOD) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UH_EP_TX_EN         0x40
-#define CH58X_UH_EP_TBUF_MOD      0x10
-#define CH58X_UH_EP_RX_EN         0x08
-#define CH58X_UH_EP_RBUF_MOD      0x01
-
-//--------------------------------------------------------------------+
-// UH_SETUP (R8_UH_SETUP) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UH_PRE_PID_EN       0x80
-#define CH58X_UH_SOF_EN           0x40
-
-//--------------------------------------------------------------------+
-// UH_RX_CTRL (R8_UH_RX_CTRL) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UH_R_TOG            0x80
-#define CH58X_UH_R_AUTO_TOG       0x10
-#define CH58X_UH_R_RES            0x04
-
-//--------------------------------------------------------------------+
-// UH_TX_CTRL (R8_UH_TX_CTRL) bit definitions
-//--------------------------------------------------------------------+
-#define CH58X_UH_T_TOG            0x40
-#define CH58X_UH_T_AUTO_TOG       0x10
-#define CH58X_UH_T_RES            0x01
-
-//--------------------------------------------------------------------+
-// USB_INT_ST host-mode bits
-//--------------------------------------------------------------------+
-#define CH58X_UIS_H_RES_MASK      0x0F
-
-//--------------------------------------------------------------------+
-// USB_DEV_AD bits
-//--------------------------------------------------------------------+
-#define CH58X_UDA_GP_BIT          0x80
-#define CH58X_USB_ADDR_MASK       0x7F
-
-//--------------------------------------------------------------------+
-// Standard USB PID values (for host token and response)
-//--------------------------------------------------------------------+
-#define CH58X_USB_PID_OUT         0x01
-#define CH58X_USB_PID_IN          0x09
-#define CH58X_USB_PID_SOF         0x05
-#define CH58X_USB_PID_SETUP       0x0D
-#define CH58X_USB_PID_DATA0       0x03
-#define CH58X_USB_PID_DATA1       0x0B
-#define CH58X_USB_PID_ACK         0x02
-#define CH58X_USB_PID_NAK         0x0A
-#define CH58X_USB_PID_STALL       0x0E
-
-//--------------------------------------------------------------------+
-// PIN_ANALOG_IE register
-//--------------------------------------------------------------------+
-#define CH58X_PIN_ANALOG_IE       (*(volatile uint16_t *)0x4000101A)
-#define CH58X_PIN_USB_DP_PU       0x40
-#define CH58X_PIN_USB_IE          0x80
-#define CH58X_PIN_USB2_DP_PU      0x10
-#define CH58X_PIN_USB2_IE         0x20
-
-//--------------------------------------------------------------------+
-// Sleep clock control
-//--------------------------------------------------------------------+
-#define CH58X_SLP_CLK_OFF1        (*(volatile uint8_t *)0x4000100D)
-#define CH58X_SLP_CLK_USB         0x10
-
-//--------------------------------------------------------------------+
-// PFIC (Platform-level Fast Interrupt Controller)
-//--------------------------------------------------------------------+
-#define CH58X_PFIC_IENR           ((volatile uint32_t *)0xE000E100)  // interrupt enable
-#define CH58X_PFIC_IRER           ((volatile uint32_t *)0xE000E180)  // interrupt reset (disable)
-
-#define CH58X_USB_IRQn            22
-#define CH58X_USB2_IRQn           23
-
-#endif /* CH58X_USBFS_REG_H */
diff --git a/src/portable/wch/dcd_ch32_usbfs.c b/src/portable/wch/dcd_ch32_usbfs.c
index dae31da91..7beb91e16 100644
--- a/src/portable/wch/dcd_ch32_usbfs.c
+++ b/src/portable/wch/dcd_ch32_usbfs.c
@@ -35,17 +35,23 @@
   /* private defines */
   #define EP_MAX         (8)
 
+  // Struct-based EP register access (uniform layout). Some parts (e.g. CH58X) have a different
+  // register map and define EP_DMA/EP_TX_LEN/EP_CTRL themselves in ch32_usbfs_reg.h.
+  #ifndef CH32_USBFS_EP_REGS_CUSTOM
   #define EP_DMA(ep)     ((&USBOTG_FS->UEP0_DMA)[ep])
   #define EP_TX_LEN(ep)  ((&USBOTG_FS->UEP0_TX_LEN)[2 * ep])
   #define EP_TX_CTRL(ep) ((&USBOTG_FS->UEP0_TX_CTRL)[4 * ep])
   #define EP_RX_CTRL(ep) ((&USBOTG_FS->UEP0_RX_CTRL)[4 * ep])
+  #endif
 
 // Endpoint control register access. The newer USBFS IP (CH32V20x/V307/X035) has separate
 // TX_CTRL and RX_CTRL bytes per endpoint; the older IP (CH32V103) has a single combined
 // UEPn_CTRL register. These helpers hide the difference so the rest of the driver is shared.
 // Values use the newer-IP encoding (USBFS_EP_T_*/USBFS_EP_R_*); the combined path remaps them.
 #ifdef CH32_USBFS_EP_CTRL_COMBINED
+  #ifndef EP_CTRL // parts with a custom register map (CH58X) define EP_CTRL directly in reg.h
   #define EP_CTRL(ep) EP_TX_CTRL(ep) // UEPn_TX_CTRL field aliases the combined UEPn_CTRL register
+  #endif
 
   static inline uint8_t ep_tx_to_comb(uint8_t v) {
     uint8_t c = v & USBFS_EP_T_RES_MASK; // IN response: bits [1:0] in both encodings
@@ -86,6 +92,17 @@
   #define EP0_SETUP_RX_TOG 0
 #endif
 
+// Hardware auto data-toggle flag. Parts whose AUTO_TOG is reliable OR it into the EP setup so the
+// controller flips DATA0/DATA1 itself; CH58x (CH32_USBFS_EP_MANUAL_TOG) leaves it clear and the
+// ISR flips the toggle bit after each packet instead.
+#ifdef CH32_USBFS_EP_MANUAL_TOG
+  #define EP_T_AUTO_TOG 0
+  #define EP_R_AUTO_TOG 0
+#else
+  #define EP_T_AUTO_TOG USBFS_EP_T_AUTO_TOG
+  #define EP_R_AUTO_TOG USBFS_EP_R_AUTO_TOG
+#endif
+
 /* private data */
 struct usb_xfer {
   bool     valid;
@@ -100,6 +117,12 @@ static struct {
   bool            isochronous[EP_MAX];
   struct usb_xfer xfer[EP_MAX][2];
   TU_ATTR_ALIGNED(4) uint8_t buffer[EP_MAX][2][64];
+#ifdef CH32_USBFS_EP4_SHARES_EP0
+  // CH58X: EP0 and EP4 share one DMA region (EP4 has no DMA register). Layout:
+  // EP0 [0:63] (half-duplex, OUT+IN) + EP4 OUT [64:127] + EP4 IN [128:191]. buffer[0]/buffer[4]
+  // are left unused for this part.
+  TU_ATTR_ALIGNED(4) uint8_t ep0_ep4_buffer[3 * 64];
+#endif
   TU_ATTR_ALIGNED(4) struct {
     // OUT transfers >64 bytes will overwrite queued IN data!
     uint8_t out[64];
@@ -108,19 +131,50 @@ static struct {
   } ep3_buffer;
 } data;
 
+// DMA / copy buffer pointers per endpoint. The WCH USBFS buffer holds OUT (RX) at offset 0 and
+// IN (TX) at +64; EP0 is half-duplex and reuses its OUT chunk for IN; EP3 has an enlarged IN
+// buffer for throughput. On CH58X, EP4 overlays EP0's region (see ep0_ep4_buffer above).
+static inline uint32_t ep_dma_addr(uint8_t ep) {
+#ifdef CH32_USBFS_EP4_SHARES_EP0
+  if (ep == 0) { return (uint32_t) &data.ep0_ep4_buffer[0]; }
+#endif
+  if (ep == 3) { return (uint32_t) &data.ep3_buffer.out[0]; }
+  return (uint32_t) &data.buffer[ep][0];
+}
+static inline uint8_t* ep_out_buf(uint8_t ep) {
+#ifdef CH32_USBFS_EP4_SHARES_EP0
+  if (ep == 0) { return &data.ep0_ep4_buffer[0]; }
+  if (ep == 4) { return &data.ep0_ep4_buffer[64]; }
+#endif
+  if (ep == 3) { return data.ep3_buffer.out; }
+  return data.buffer[ep][TUSB_DIR_OUT];
+}
+static inline uint8_t* ep_in_buf(uint8_t ep) {
+#ifdef CH32_USBFS_EP4_SHARES_EP0
+  if (ep == 0) { return &data.ep0_ep4_buffer[0]; } // EP0 half-duplex: IN reuses OUT chunk
+  if (ep == 4) { return &data.ep0_ep4_buffer[128]; }
+#endif
+  if (ep == 0) { return data.buffer[0][TUSB_DIR_OUT]; } // EP0 half-duplex: IN reuses OUT chunk
+  if (ep == 3) { return data.ep3_buffer.in; }
+  return data.buffer[ep][TUSB_DIR_IN];
+}
+// EP4 on CH58X has no DMA register (shares EP0's); skip its EP_DMA() write.
+static inline bool ep_shares_ep0_dma(uint8_t ep) {
+#ifdef CH32_USBFS_EP4_SHARES_EP0
+  return ep == 4;
+#else
+  (void) ep;
+  return false;
+#endif
+}
+
 /* private helpers */
 static void update_in(uint8_t rhport, uint8_t ep, bool force) {
   struct usb_xfer *xfer = &data.xfer[ep][TUSB_DIR_IN];
   if (xfer->valid) {
     if (force || xfer->len) {
       size_t len = TU_MIN(xfer->max_size, xfer->len);
-      if (ep == 0) {
-        memcpy(data.buffer[ep][TUSB_DIR_OUT], xfer->buffer, len); // ep0 uses same chunk
-      } else if (ep == 3) {
-        memcpy(data.ep3_buffer.in, xfer->buffer, len);
-      } else {
-        memcpy(data.buffer[ep][TUSB_DIR_IN], xfer->buffer, len);
-      }
+      memcpy(ep_in_buf(ep), xfer->buffer, len);
       xfer->buffer += len;
       xfer->len -= len;
       xfer->processed_len += len;
@@ -150,11 +204,7 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
   struct usb_xfer *xfer = &data.xfer[ep][TUSB_DIR_OUT];
   if (xfer->valid) {
     size_t len = TU_MIN(xfer->max_size, TU_MIN(xfer->len, rx_len));
-    if (ep == 3) {
-      memcpy(xfer->buffer, data.ep3_buffer.out, len);
-    } else {
-      memcpy(xfer->buffer, data.buffer[ep][TUSB_DIR_OUT], len);
-    }
+    memcpy(xfer->buffer, ep_out_buf(ep), len);
     xfer->buffer += len;
     xfer->len -= len;
     xfer->processed_len += len;
@@ -176,12 +226,11 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
 
 static void reset_ep_ctrls(void) {
   for (uint8_t ep = 1; ep < EP_MAX; ep++) {
-    EP_DMA(ep)     = (uint32_t)&data.buffer[ep][0];
+    if (!ep_shares_ep0_dma(ep)) { EP_DMA(ep) = ep_dma_addr(ep); }
     EP_TX_LEN(ep)  = 0;
-    ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NYET);
-    ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NYET);
+    ep_tx_ctrl_set(ep, EP_T_AUTO_TOG | USBFS_EP_T_RES_NYET);
+    ep_rx_ctrl_set(ep, EP_R_AUTO_TOG | USBFS_EP_R_RES_NYET);
   }
-  EP_DMA(3) = (uint32_t)&data.ep3_buffer.out[0];
 }
 
 /* public functions */
@@ -195,8 +244,8 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   USBOTG_FS->INT_FG = 0xFF;
   USBOTG_FS->INT_EN = USBFS_INT_EN_BUS_RST | USBFS_INT_EN_TRANSFER | USBFS_INT_EN_SUSPEND;
 
-  // setup endpoint 0
-  EP_DMA(0)     = (uint32_t)&data.buffer[0][0];
+  // setup endpoint 0 (also backs EP4's buffer on CH58X via the shared DMA region)
+  EP_DMA(0)     = ep_dma_addr(0);
   EP_TX_LEN(0)  = 0;
   ep_tx_ctrl_set(0, USBFS_EP_T_RES_NAK);
   ep_rx_ctrl_set(0, USBFS_EP_R_RES_ACK);
@@ -204,8 +253,14 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   // enable other endpoints but NAK everything
   USBOTG_FS->UEP4_1_MOD = 0xCC;
   USBOTG_FS->UEP2_3_MOD = 0xCC;
+#ifdef CH32_USBFS_EP_REGS_CUSTOM
+  // CH58X: a single mode register enables EP5/6/7 RX+TX (different bit layout than CH32).
+  USBOTG_FS->UEP567_MOD = RB_UEP5_RX_EN | RB_UEP5_TX_EN | RB_UEP6_RX_EN | RB_UEP6_TX_EN |
+                          RB_UEP7_RX_EN | RB_UEP7_TX_EN;
+#else
   USBOTG_FS->UEP5_6_MOD = 0xCC;
   USBOTG_FS->UEP7_MOD   = 0x0C;
+#endif
 
   reset_ep_ctrls();
 
@@ -218,17 +273,31 @@ void dcd_int_handler(uint8_t rhport) {
   (void)rhport;
   uint8_t status = USBOTG_FS->INT_FG;
   if (status & USBFS_INT_FG_TRANSFER) {
-    uint8_t  ep       = USBFS_INT_ST_MASK_UIS_ENDP(USBOTG_FS->INT_ST);
-    uint8_t  token    = USBFS_INT_ST_MASK_UIS_TOKEN(USBOTG_FS->INT_ST);
+    uint8_t  int_st   = USBOTG_FS->INT_ST;
+    uint8_t  ep       = USBFS_INT_ST_MASK_UIS_ENDP(int_st);
+    uint8_t  token    = USBFS_INT_ST_MASK_UIS_TOKEN(int_st);
     uint16_t rx_len   = USBOTG_FS->RX_LEN;
 
     switch (token) {
       case PID_OUT: {
+#ifdef CH32_USBFS_EP_MANUAL_TOG
+        // Manual toggle: drop OUT packets whose data toggle doesn't match (host retransmit),
+        // otherwise flip the expected RX toggle for the next packet. EP0 is driven by the
+        // SETUP/status flow below, so its toggle is left to that path.
+        if (ep != 0) {
+          if (!(int_st & USBFS_INT_ST_TOG_OK)) { break; }
+          EP_CTRL(ep) ^= USBFS_EPC_R_TOG;
+        }
+#endif
         update_out(rhport, ep, rx_len);
         break;
       }
 
       case PID_IN:
+#ifdef CH32_USBFS_EP_MANUAL_TOG
+        // Manual toggle: flip the TX toggle after each ACK'd IN packet (EP0 manages its own).
+        if (ep != 0) { EP_CTRL(ep) ^= USBFS_EPC_T_TOG; }
+#endif
         update_in(rhport, ep, false);
         break;
 
@@ -237,11 +306,12 @@ void dcd_int_handler(uint8_t rhport) {
         ep_tx_ctrl_set(0, USBFS_EP_T_RES_NAK);
         data.ep0_tog  = true;
 
-        const tusb_control_request_t *setup = (const tusb_control_request_t *)&data.buffer[0][TUSB_DIR_OUT][0];
+        uint8_t *ep0_out = ep_out_buf(0);
+        const tusb_control_request_t *setup = (const tusb_control_request_t *)ep0_out;
         // EP0_SETUP_RX_TOG arms the data/status stage at DATA1 on the combined-control IP
         ep_rx_ctrl_set(0, ((setup->wLength == 0) ? USBFS_EP_R_RES_ACK : USBFS_EP_R_RES_NAK) | EP0_SETUP_RX_TOG);
 
-        dcd_event_setup_received(rhport, &data.buffer[0][TUSB_DIR_OUT][0], true);
+        dcd_event_setup_received(rhport, ep0_out, true);
         break;
     }
 
@@ -323,10 +393,12 @@ bool dcd_edpt_open(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
   data.xfer[ep][dir].max_size = tu_edpt_packet_size(desc_ep);
 
   if (ep != 0) {
+    // Opening clears the toggle to DATA0 (ep_*_ctrl_set writes the toggle bit clear since v has no
+    // R/T_TOG); with manual toggle EP_*_AUTO_TOG is 0 so the ISR owns subsequent toggling.
     if (dir == TUSB_DIR_OUT) {
-      ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
+      ep_rx_ctrl_set(ep, EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
     } else {
-      ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
+      ep_tx_ctrl_set(ep, EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
     }
   }
   return true;
@@ -407,10 +479,11 @@ void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
       ep_rx_ctrl_set(0, USBFS_EP_R_RES_ACK);
     }
   } else {
+    // clear-stall resets the toggle to DATA0 (USB spec); manual-toggle parts then re-sync via ISR
     if (dir == TUSB_DIR_OUT) {
-      ep_rx_ctrl_set(ep, USBFS_EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
+      ep_rx_ctrl_set(ep, EP_R_AUTO_TOG | USBFS_EP_R_RES_NAK);
     } else {
-      ep_tx_ctrl_set(ep, USBFS_EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
+      ep_tx_ctrl_set(ep, EP_T_AUTO_TOG | USBFS_EP_T_RES_NAK);
     }
   }
 }
diff --git a/src/portable/wch/dcd_ch58x_usbfs.c b/src/portable/wch/dcd_ch58x_usbfs.c
deleted file mode 100644
index c6f10b801..000000000
--- a/src/portable/wch/dcd_ch58x_usbfs.c
+++ /dev/null
@@ -1,636 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if CFG_TUD_ENABLED && defined(TUP_USBIP_WCH_CH58X) && CFG_TUD_WCH_USBIP_USBFS
-
-#include "device/dcd.h"
-#include "ch58x_usbfs_reg.h"
-
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
-#define EP_MAX       8
-#define EP_BUF_SIZE  64
-
-//--------------------------------------------------------------------+
-// USB base address selection by rhport
-//--------------------------------------------------------------------+
-static inline uint32_t get_usb_base(uint8_t rhport) {
-  return (rhport == 0) ? CH58X_USB_BASE : CH58X_USB2_BASE;
-}
-
-//--------------------------------------------------------------------+
-// Register access helpers using base address
-//--------------------------------------------------------------------+
-#define USB_CTRL(base)     CH58X_USB_CTRL(base)
-#define USB_UDEV_CTRL(base) CH58X_UDEV_CTRL(base)
-#define USB_INT_EN(base)   CH58X_USB_INT_EN(base)
-#define USB_DEV_AD(base)   CH58X_USB_DEV_AD(base)
-#define USB_MIS_ST(base)   CH58X_USB_MIS_ST(base)
-#define USB_INT_FG(base)   CH58X_USB_INT_FG(base)
-#define USB_INT_ST(base)   CH58X_USB_INT_ST(base)
-#define USB_RX_LEN(base)   CH58X_USB_RX_LEN(base)
-
-#define EP_DMA(base, ep)   CH58X_EP_DMA(base, ep)
-#define EP_TLEN(base, ep)  CH58X_EP_TLEN(base, ep)
-#define EP_CTRL(base, ep)  CH58X_EP_CTRL(base, ep)
-
-//--------------------------------------------------------------------+
-// Inline helpers for merged EP CTRL register
-//--------------------------------------------------------------------+
-static inline void ep_set_tx_response(uint32_t base, uint8_t ep, uint8_t resp) {
-  uint8_t ctrl = EP_CTRL(base, ep);
-  ctrl = (ctrl & ~CH58X_EP_T_RES_MASK) | resp;
-  EP_CTRL(base, ep) = ctrl;
-}
-
-static inline void ep_set_rx_response(uint32_t base, uint8_t ep, uint8_t resp) {
-  uint8_t ctrl = EP_CTRL(base, ep);
-  ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | resp;
-  EP_CTRL(base, ep) = ctrl;
-}
-
-static inline void ep_set_both_response(uint32_t base, uint8_t ep, uint8_t tx_resp, uint8_t rx_resp) {
-  uint8_t ctrl = EP_CTRL(base, ep);
-  ctrl = (ctrl & ~(CH58X_EP_T_RES_MASK | CH58X_EP_R_RES_MASK)) | tx_resp | rx_resp;
-  EP_CTRL(base, ep) = ctrl;
-}
-
-//--------------------------------------------------------------------+
-// Private data structures
-//--------------------------------------------------------------------+
-typedef struct {
-  bool valid;
-  uint8_t* buffer;
-  size_t len;
-  size_t processed_len;
-  size_t max_size;
-} xfer_ctl_t;
-
-typedef struct {
-  uint32_t usb_base;
-  bool ep0_tog;
-  volatile uint8_t setup_pending;     // SETUP arrived while EP0 completion pending in queue
-  volatile bool ep0_completion_pending; // EP0 XFER_COMPLETE in event queue, not yet processed
-  uint8_t pending_addr;               // Address to set in ISR after Set Address status ZLP
-  bool isochronous[EP_MAX][2]; // [ep][dir]
-  xfer_ctl_t xfer[EP_MAX][2];  // [ep][dir]
-
-  // EP0 + EP4 shared buffer: EP0 OUT(64) + EP4 OUT(64) + EP4 IN(64)
-  TU_ATTR_ALIGNED(4) uint8_t ep0_buffer[EP_BUF_SIZE + EP_BUF_SIZE + EP_BUF_SIZE];
-
-  // EP1-EP3: OUT(64) + IN(64)
-  TU_ATTR_ALIGNED(4) uint8_t ep1_buffer[2][EP_BUF_SIZE];
-  TU_ATTR_ALIGNED(4) uint8_t ep2_buffer[2][EP_BUF_SIZE];
-  TU_ATTR_ALIGNED(4) uint8_t ep3_buffer[2][EP_BUF_SIZE];
-
-  // EP5-EP7: OUT(64) + IN(64)
-  TU_ATTR_ALIGNED(4) uint8_t ep5_buffer[2][EP_BUF_SIZE];
-  TU_ATTR_ALIGNED(4) uint8_t ep6_buffer[2][EP_BUF_SIZE];
-  TU_ATTR_ALIGNED(4) uint8_t ep7_buffer[2][EP_BUF_SIZE];
-} dcd_data_t;
-
-// Per-port data (support up to 2 USB ports)
-static dcd_data_t _dcd_data[2];
-
-//--------------------------------------------------------------------+
-// Buffer address helpers
-//--------------------------------------------------------------------+
-static uint8_t* ep_out_buffer(dcd_data_t* d, uint8_t ep) {
-  switch (ep) {
-    case 0: return &d->ep0_buffer[0];
-    case 1: return d->ep1_buffer[0];
-    case 2: return d->ep2_buffer[0];
-    case 3: return d->ep3_buffer[0];
-    case 4: return &d->ep0_buffer[EP_BUF_SIZE];
-    case 5: return d->ep5_buffer[0];
-    case 6: return d->ep6_buffer[0];
-    case 7: return d->ep7_buffer[0];
-    default: return NULL;
-  }
-}
-
-static uint8_t* ep_in_buffer(dcd_data_t* d, uint8_t ep) {
-  switch (ep) {
-    case 0: return &d->ep0_buffer[0]; // EP0 IN uses same buffer as OUT
-    case 1: return d->ep1_buffer[1];
-    case 2: return d->ep2_buffer[1];
-    case 3: return d->ep3_buffer[1];
-    case 4: return &d->ep0_buffer[2 * EP_BUF_SIZE];
-    case 5: return d->ep5_buffer[1];
-    case 6: return d->ep6_buffer[1];
-    case 7: return d->ep7_buffer[1];
-    default: return NULL;
-  }
-}
-
-// DMA base pointer (EP4 shares with EP0)
-static uint8_t* ep_dma_buffer(dcd_data_t* d, uint8_t ep) {
-  switch (ep) {
-    case 0: case 4: return &d->ep0_buffer[0];
-    case 1: return d->ep1_buffer[0];
-    case 2: return d->ep2_buffer[0];
-    case 3: return d->ep3_buffer[0];
-    case 5: return d->ep5_buffer[0];
-    case 6: return d->ep6_buffer[0];
-    case 7: return d->ep7_buffer[0];
-    default: return NULL;
-  }
-}
-
-// AUTO_TOG is not used (EP1-3/5-7 support it). When clear-stall resets T_TOG/
-// R_TOG to DATA0, the hardware internal toggle doesn't sync, causing mismatch
-// and bus resets. Use manual toggle (EP_CTRL ^= TOG) in ISR instead.
-
-//--------------------------------------------------------------------+
-// Private transfer helpers
-//--------------------------------------------------------------------+
-static void update_in(uint8_t rhport, uint8_t ep, bool force, bool in_isr) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  xfer_ctl_t* xfer = &d->xfer[ep][TUSB_DIR_IN];
-
-  if (xfer->valid) {
-    if (force || xfer->len) {
-      size_t len = TU_MIN(xfer->max_size, xfer->len);
-
-      // Copy data to IN buffer
-      uint8_t* buf = ep_in_buffer(d, ep);
-      if (len > 0 && xfer->buffer != NULL) {
-        memcpy(buf, xfer->buffer, len);
-      }
-
-      xfer->buffer += len;
-      xfer->len -= len;
-      xfer->processed_len += len;
-
-      EP_TLEN(base, ep) = (uint8_t) len;
-
-      if (ep == 0) {
-        // EP0: manual toggle
-        uint8_t ctrl = EP_CTRL(base, 0);
-        ctrl = (ctrl & ~(CH58X_EP_T_RES_MASK | CH58X_EP_T_TOG));
-        ctrl |= CH58X_EP_T_RES_ACK;
-        if (d->ep0_tog) ctrl |= CH58X_EP_T_TOG;
-        EP_CTRL(base, 0) = ctrl;
-        d->ep0_tog = !d->ep0_tog;
-      } else if (d->isochronous[ep][TUSB_DIR_IN]) {
-        ep_set_tx_response(base, ep, CH58X_EP_T_RES_TOUT);
-      } else {
-        ep_set_tx_response(base, ep, CH58X_EP_T_RES_ACK);
-      }
-    } else {
-      // Transfer complete
-      xfer->valid = false;
-      ep_set_tx_response(base, ep, CH58X_EP_T_RES_NAK);
-      if (ep == 0) d->ep0_completion_pending = true;
-      dcd_event_xfer_complete(rhport, ep | TUSB_DIR_IN_MASK,
-                              xfer->processed_len, XFER_RESULT_SUCCESS, in_isr);
-    }
-  }
-}
-
-static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len, bool in_isr) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  xfer_ctl_t* xfer = &d->xfer[ep][TUSB_DIR_OUT];
-
-  if (xfer->valid) {
-    size_t len = TU_MIN(xfer->max_size, TU_MIN(xfer->len, rx_len));
-
-    // Copy from OUT buffer
-    if (len > 0 && xfer->buffer != NULL) {
-      uint8_t* buf = ep_out_buffer(d, ep);
-      memcpy(xfer->buffer, buf, len);
-    }
-
-    xfer->buffer += len;
-    xfer->len -= len;
-    xfer->processed_len += len;
-
-    if (xfer->len == 0 || len < xfer->max_size) {
-      xfer->valid = false;
-      // NAK to prevent hardware from accepting next OUT before a new xfer is queued
-      ep_set_rx_response(base, ep, CH58X_EP_R_RES_NAK);
-      if (ep == 0) d->ep0_completion_pending = true;
-      dcd_event_xfer_complete(rhport, ep, xfer->processed_len,
-                              XFER_RESULT_SUCCESS, in_isr);
-    } else if (ep == 0) {
-      // EP0 multi-packet: ensure ACK for next packet
-      ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
-    }
-  }
-}
-
-//--------------------------------------------------------------------+
-// DCD API Implementation
-//--------------------------------------------------------------------+
-
-bool dcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
-  (void) rh_init;
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = get_usb_base(rhport);
-  d->usb_base = base;
-
-  // Clear state
-  tu_memclr(d->xfer, sizeof(d->xfer));
-  tu_memclr(d->isochronous, sizeof(d->isochronous));
-  d->ep0_tog = true;
-  d->setup_pending = 0;
-  d->ep0_completion_pending = false;
-  d->pending_addr = 0;
-
-  // Reset USB control register first (SDK pattern)
-  USB_CTRL(base) = 0x00;
-
-  // Init control registers
-  USB_CTRL(base) = CH58X_UC_DEV_PU_EN | CH58X_UC_INT_BUSY | CH58X_UC_DMA_EN;
-  USB_UDEV_CTRL(base) = CH58X_UD_PD_DIS | CH58X_UD_PORT_EN;
-  USB_DEV_AD(base) = 0x00;
-
-  // Clear all interrupt flags, then enable interrupts
-  USB_INT_FG(base) = 0xFF;
-  USB_INT_EN(base) = CH58X_UIE_BUS_RST | CH58X_UIE_TRANSFER | CH58X_UIE_SUSPEND;
-
-  // EP0 setup (also sets EP4 DMA since they share)
-  EP_DMA(base, 0) = (uint16_t)(uint32_t) &d->ep0_buffer[0];
-  EP_TLEN(base, 0) = 0;
-  EP_CTRL(base, 0) = CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
-
-  // Enable all endpoints TX+RX
-  CH58X_UEP4_1_MOD(base) = CH58X_UEP1_RX_EN | CH58X_UEP1_TX_EN |
-                             CH58X_UEP4_RX_EN | CH58X_UEP4_TX_EN;
-  CH58X_UEP2_3_MOD(base) = CH58X_UEP2_RX_EN | CH58X_UEP2_TX_EN |
-                             CH58X_UEP3_RX_EN | CH58X_UEP3_TX_EN;
-  CH58X_UEP567_MOD(base) = CH58X_UEP5_RX_EN | CH58X_UEP5_TX_EN |
-                             CH58X_UEP6_RX_EN | CH58X_UEP6_TX_EN |
-                             CH58X_UEP7_RX_EN | CH58X_UEP7_TX_EN;
-
-  // EP1-3: DMA + manual toggle + NAK both directions
-  for (uint8_t ep = 1; ep <= 3; ep++) {
-    EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
-    EP_TLEN(base, ep) = 0;
-    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-  }
-
-  // EP4: no independent DMA, no auto-toggle
-  EP_TLEN(base, 4) = 0;
-  EP_CTRL(base, 4) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-
-  // EP5-7: DMA + manual toggle
-  for (uint8_t ep = 5; ep <= 7; ep++) {
-    EP_DMA(base, ep) = (uint16_t)(uint32_t) ep_dma_buffer(d, ep);
-    EP_TLEN(base, ep) = 0;
-    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-  }
-
-  // Set EP0 max size
-  d->xfer[0][TUSB_DIR_OUT].max_size = EP_BUF_SIZE;
-  d->xfer[0][TUSB_DIR_IN].max_size = EP_BUF_SIZE;
-
-  dcd_connect(rhport);
-  return true;
-}
-
-void dcd_int_handler(uint8_t rhport) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  uint8_t status = USB_INT_FG(base);
-
-  if (status & CH58X_UIF_TRANSFER) {
-    uint8_t int_st = USB_INT_ST(base);
-    uint8_t ep = CH58X_INT_ST_ENDP(int_st);
-    uint8_t token = CH58X_INT_ST_TOKEN(int_st);
-
-    // Process regular token before SETUP to avoid losing it
-    if (token != CH58X_PID_SETUP) {
-      switch (token) {
-        case CH58X_PID_OUT: {
-          uint8_t rx_len = USB_RX_LEN(base);
-          if (ep == 0) {
-            // EP0: manual toggle, always process
-            EP_CTRL(base, 0) ^= CH58X_EP_R_TOG;
-            update_out(rhport, 0, rx_len, true);
-          } else if (int_st & CH58X_UIS_TOG_OK) {
-            // Toggle OK: manual toggle and process
-            EP_CTRL(base, ep) ^= CH58X_EP_R_TOG;
-            update_out(rhport, ep, rx_len, true);
-          }
-          // else: toggle mismatch, discard
-          break;
-        }
-
-        case CH58X_PID_IN: {
-          // Apply pending Set Address immediately after status ZLP
-          if (ep == 0 && d->pending_addr) {
-            USB_DEV_AD(base) = (USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
-                               (d->pending_addr & CH58X_USB_ADDR_MASK);
-            d->pending_addr = 0;
-          }
-          if (ep != 0) {
-            // Manual toggle for all non-EP0 endpoints
-            EP_CTRL(base, ep) ^= CH58X_EP_T_TOG;
-          }
-          update_in(rhport, ep, false, true);
-          break;
-        }
-
-        default:
-          break;
-      }
-      USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-    }
-
-    // SETUP_ACT is checked separately — it persists even if token field changed
-    if (int_st & CH58X_UIS_SETUP_ACT) {
-      // Reset toggles to DATA1, NAK both directions until stack is ready
-      EP_CTRL(base, 0) = CH58X_EP_R_TOG | CH58X_EP_T_TOG |
-                         CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-      d->ep0_tog = true;
-
-      d->pending_addr = 0;
-
-      // Mark stale EP0 completion so dcd_edpt_xfer can skip it
-      d->setup_pending = d->ep0_completion_pending ? 1 : 0;
-      d->ep0_completion_pending = false;
-      d->xfer[0][TUSB_DIR_OUT].valid = false;
-      d->xfer[0][TUSB_DIR_IN].valid = false;
-
-      dcd_event_setup_received(rhport, ep_out_buffer(d, 0), true);
-      USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-    }
-  }
-
-  // Process bus reset: reset all endpoints immediately (matching WCH SDK pattern)
-  if (status & CH58X_UIF_BUS_RST) {
-    d->ep0_tog = true;
-    d->setup_pending = 0;
-    d->ep0_completion_pending = false;
-    d->pending_addr = 0;
-
-    // Reset EP0: ACK for RX (ready for SETUP), NAK for TX
-    EP_CTRL(base, 0) = CH58X_EP_R_RES_ACK | CH58X_EP_T_RES_NAK;
-    EP_TLEN(base, 0) = 0;
-    d->xfer[0][TUSB_DIR_OUT].max_size = EP_BUF_SIZE;
-    d->xfer[0][TUSB_DIR_IN].max_size = EP_BUF_SIZE;
-
-    // Reset EP1-7: NAK both directions, invalidate pending transfers
-    for (uint8_t ep = 1; ep < EP_MAX; ep++) {
-      d->xfer[ep][TUSB_DIR_IN].valid = false;
-      d->xfer[ep][TUSB_DIR_OUT].valid = false;
-      EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-      EP_TLEN(base, ep) = 0;
-    }
-
-    USB_DEV_AD(base) = 0x00;
-
-    tusb_speed_t speed = (USB_CTRL(base) & CH58X_UC_LOW_SPEED) ?
-                          TUSB_SPEED_LOW : TUSB_SPEED_FULL;
-    dcd_event_bus_reset(rhport, speed, true);
-
-    USB_INT_FG(base) = CH58X_UIF_BUS_RST;
-  }
-
-  // Process suspend/resume
-  if (status & CH58X_UIF_SUSPEND) {
-    dcd_event_bus_signal(rhport,
-      (USB_MIS_ST(base) & CH58X_UMS_SUSPEND) ? DCD_EVENT_SUSPEND : DCD_EVENT_RESUME,
-      true);
-    USB_INT_FG(base) = CH58X_UIF_SUSPEND;
-  }
-}
-
-void dcd_int_enable(uint8_t rhport) {
-  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
-  CH58X_PFIC_IENR[irqn / 32] = (1u << (irqn % 32));
-}
-
-void dcd_int_disable(uint8_t rhport) {
-  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
-  CH58X_PFIC_IRER[irqn / 32] = (1u << (irqn % 32));
-  __asm volatile ("fence.i");
-}
-
-void dcd_set_address(uint8_t rhport, uint8_t dev_addr) {
-  // Defer to ISR: apply address right after status ZLP is ACK'd
-  _dcd_data[rhport].pending_addr = dev_addr;
-  dcd_edpt_xfer(rhport, 0x80, NULL, 0, false);
-}
-
-void dcd_remote_wakeup(uint8_t rhport) {
-  (void) rhport;
-  // TODO: not supported
-}
-
-void dcd_connect(uint8_t rhport) {
-  uint32_t base = get_usb_base(rhport);
-  USB_CTRL(base) |= CH58X_UC_DEV_PU_EN;
-}
-
-void dcd_disconnect(uint8_t rhport) {
-  uint32_t base = get_usb_base(rhport);
-  USB_CTRL(base) &= ~CH58X_UC_DEV_PU_EN;
-}
-
-void dcd_sof_enable(uint8_t rhport, bool en) {
-  (void) rhport;
-  (void) en;
-}
-
-void dcd_edpt0_status_complete(uint8_t rhport, tusb_control_request_t const* request) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-
-  if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
-      request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD &&
-      request->bRequest == TUSB_REQ_SET_ADDRESS) {
-    // Safety net: re-apply address in case ISR path was skipped
-    USB_DEV_AD(base) = (USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
-                       ((uint8_t)request->wValue & CH58X_USB_ADDR_MASK);
-  }
-
-  dcd_int_disable(rhport);
-  d->ep0_completion_pending = false;
-  if (d->setup_pending) {
-    // SETUP already arrived — don't override its NAK with ACK
-    d->setup_pending = 0;
-  } else {
-    ep_set_both_response(base, 0, CH58X_EP_T_RES_NAK, CH58X_EP_R_RES_ACK);
-  }
-  dcd_int_enable(rhport);
-}
-
-bool dcd_edpt_open(uint8_t rhport, tusb_desc_endpoint_t const* desc_ep) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  uint8_t ep = tu_edpt_number(desc_ep->bEndpointAddress);
-  uint8_t dir = tu_edpt_dir(desc_ep->bEndpointAddress);
-  TU_ASSERT(ep < EP_MAX);
-
-  d->isochronous[ep][dir] = (desc_ep->bmAttributes.xfer == TUSB_XFER_ISOCHRONOUS);
-  uint16_t max_size = tu_edpt_packet_size(desc_ep);
-  if (max_size > EP_BUF_SIZE) {
-    max_size = EP_BUF_SIZE;
-  }
-  d->xfer[ep][dir].max_size = max_size;
-
-  if (ep != 0) {
-    dcd_int_disable(rhport);
-    uint8_t ctrl = EP_CTRL(base, ep);
-    if (dir == TUSB_DIR_OUT) {
-      // Clear RX toggle to DATA0 per USB spec
-      ctrl &= ~CH58X_EP_R_TOG;
-      if (d->isochronous[ep][TUSB_DIR_OUT]) {
-        ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_TOUT;
-      } else {
-        // Start with NAK; dcd_edpt_xfer will set ACK when a transfer is submitted
-        ctrl = (ctrl & ~CH58X_EP_R_RES_MASK) | CH58X_EP_R_RES_NAK;
-      }
-    } else {
-      // Clear TX toggle to DATA0 per USB spec
-      ctrl &= ~CH58X_EP_T_TOG;
-      EP_TLEN(base, ep) = 0;
-      ctrl = (ctrl & ~CH58X_EP_T_RES_MASK) | CH58X_EP_T_RES_NAK;
-    }
-    EP_CTRL(base, ep) = ctrl;
-    dcd_int_enable(rhport);
-  }
-  return true;
-}
-
-void dcd_edpt_close_all(uint8_t rhport) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-
-  for (uint8_t ep = 1; ep < EP_MAX; ep++) {
-    d->xfer[ep][TUSB_DIR_IN].valid = false;
-    d->xfer[ep][TUSB_DIR_OUT].valid = false;
-    d->isochronous[ep][TUSB_DIR_OUT] = false;
-    d->isochronous[ep][TUSB_DIR_IN] = false;
-    EP_CTRL(base, ep) = CH58X_EP_R_RES_NAK | CH58X_EP_T_RES_NAK;
-  }
-}
-
-bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet_size) {
-  (void) rhport;
-  (void) ep_addr;
-  (void) largest_packet_size;
-  return false;
-}
-
-bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t* desc_ep) {
-  (void) rhport;
-  (void) desc_ep;
-  return false;
-}
-
-bool dcd_edpt_xfer(uint8_t rhport, uint8_t ep_addr, uint8_t* buffer,
-                   uint16_t total_bytes, bool is_isr) {
-  uint8_t ep = tu_edpt_number(ep_addr);
-  uint8_t dir = tu_edpt_dir(ep_addr);
-
-  dcd_data_t* d = &_dcd_data[rhport];
-  xfer_ctl_t* xfer = &d->xfer[ep][dir];
-
-  dcd_int_disable(rhport);
-
-  // Skip stale EP0 arm if a new SETUP has already arrived
-  if (ep == 0) {
-    d->ep0_completion_pending = false;
-    if (d->setup_pending) {
-      d->setup_pending = 0;
-      dcd_int_enable(rhport);
-      return true;
-    }
-  }
-
-  xfer->valid = true;
-  xfer->buffer = buffer;
-  xfer->len = total_bytes;
-  xfer->processed_len = 0;
-
-  if (dir == TUSB_DIR_IN) {
-    update_in(rhport, ep, true, is_isr);
-  } else {
-    if (d->isochronous[ep][TUSB_DIR_OUT]) {
-      ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_TOUT);
-    } else {
-      ep_set_rx_response(d->usb_base, ep, CH58X_EP_R_RES_ACK);
-    }
-  }
-  dcd_int_enable(rhport);
-  return true;
-}
-
-void dcd_edpt_stall(uint8_t rhport, uint8_t ep_addr) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  uint8_t ep = tu_edpt_number(ep_addr);
-  uint8_t dir = tu_edpt_dir(ep_addr);
-
-  dcd_int_disable(rhport);
-  if (ep == 0) {
-    // EP0: stall both directions
-    EP_CTRL(base, 0) = CH58X_EP_R_RES_STALL | CH58X_EP_T_RES_STALL |
-                        CH58X_EP_R_TOG | CH58X_EP_T_TOG;
-  } else {
-    if (dir == TUSB_DIR_OUT) {
-      ep_set_rx_response(base, ep, CH58X_EP_R_RES_STALL);
-    } else {
-      ep_set_tx_response(base, ep, CH58X_EP_T_RES_STALL);
-    }
-  }
-  dcd_int_enable(rhport);
-}
-
-void dcd_edpt_clear_stall(uint8_t rhport, uint8_t ep_addr) {
-  dcd_data_t* d = &_dcd_data[rhport];
-  uint32_t base = d->usb_base;
-  uint8_t ep = tu_edpt_number(ep_addr);
-  uint8_t dir = tu_edpt_dir(ep_addr);
-
-  dcd_int_disable(rhport);
-  if (ep == 0) {
-    if (dir == TUSB_DIR_OUT) {
-      ep_set_rx_response(base, 0, CH58X_EP_R_RES_ACK);
-    }
-  } else {
-    uint8_t ctrl = EP_CTRL(base, ep);
-    if (dir == TUSB_DIR_OUT) {
-      ctrl &= ~(CH58X_EP_R_RES_MASK | CH58X_EP_R_TOG);
-      ctrl |= CH58X_EP_R_RES_ACK;
-    } else {
-      ctrl &= ~(CH58X_EP_T_RES_MASK | CH58X_EP_T_TOG);
-      ctrl |= CH58X_EP_T_RES_NAK;
-    }
-    EP_CTRL(base, ep) = ctrl;
-  }
-  dcd_int_enable(rhport);
-}
-
-#endif /* CFG_TUD_ENABLED && TUP_USBIP_WCH_CH58X */
diff --git a/src/portable/wch/hcd_ch58x_usbfs.c b/src/portable/wch/hcd_ch58x_usbfs.c
deleted file mode 100644
index 37dd08539..000000000
--- a/src/portable/wch/hcd_ch58x_usbfs.c
+++ /dev/null
@@ -1,721 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "tusb_option.h"
-
-#if CFG_TUH_ENABLED && defined(TUP_USBIP_WCH_CH58X) && \
-    defined(CFG_TUH_WCH_USBIP_USBFS) && CFG_TUH_WCH_USBIP_USBFS
-
-#include <string.h>
-
-#include "host/hcd.h"
-#include "host/usbh.h"
-#include "host/usbh_pvt.h"
-
-#include "ch58x_usbfs_reg.h"
-
-//--------------------------------------------------------------------+
-// Configuration
-//--------------------------------------------------------------------+
-#define USBFS_MAX_PACKET_SIZE  64
-
-#define LOG_CH58X_HCD(...)  TU_LOG3(__VA_ARGS__)
-
-//--------------------------------------------------------------------+
-// RX/TX buffers (must be 4-byte aligned and in lower 64KB of RAM)
-// Separate buffers for each USB port to avoid DMA conflicts
-//--------------------------------------------------------------------+
-TU_ATTR_ALIGNED(4) static uint8_t _rx_buf[2][USBFS_MAX_PACKET_SIZE];
-TU_ATTR_ALIGNED(4) static uint8_t _tx_buf[2][USBFS_MAX_PACKET_SIZE];
-
-//--------------------------------------------------------------------+
-// USB base address selection by rhport
-//--------------------------------------------------------------------+
-static inline uint32_t _get_usb_base(uint8_t rhport) {
-  return (rhport == 0) ? CH58X_USB_BASE : CH58X_USB2_BASE;
-}
-
-//--------------------------------------------------------------------+
-// Endpoint record
-//--------------------------------------------------------------------+
-typedef struct {
-  bool configured;
-  uint8_t dev_addr;
-  uint8_t ep_addr;
-  uint8_t max_packet_size;
-  uint8_t xfer_type;
-  uint8_t data_toggle;   // 0=DATA0, 1=DATA1
-  bool is_nak_pending;
-  uint16_t buflen;
-  uint8_t* buf;
-} hcd_edpt_t;
-
-static hcd_edpt_t _edpt_list[CFG_TUH_DEVICE_MAX * 6] = {};
-
-//--------------------------------------------------------------------+
-// Current transfer state (only one transfer at a time per root port)
-//--------------------------------------------------------------------+
-typedef struct {
-  volatile bool is_busy;
-  uint8_t rhport;
-  uint8_t dev_addr;
-  uint8_t ep_addr;
-  uint32_t start_ms;
-  uint8_t* buffer;
-  uint16_t bufferlen;
-  uint16_t xferred_len;
-  bool nak_pending;
-} hcd_xfer_t;
-
-// One transfer state per root port (indexed by rhport).
-static volatile hcd_xfer_t _current_xfer[2] = {};
-
-//--------------------------------------------------------------------+
-// Per-port state
-//--------------------------------------------------------------------+
-typedef struct {
-  uint32_t usb_base;
-  bool int_enabled;
-  bool int_state_before_reset;
-} hcd_port_t;
-
-static hcd_port_t _port_data[2] = {};
-
-//--------------------------------------------------------------------+
-// Endpoint record management
-//--------------------------------------------------------------------+
-static hcd_edpt_t* _get_edpt(uint8_t dev_addr, uint8_t ep_addr) {
-  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
-    hcd_edpt_t* e = &_edpt_list[i];
-    if (e->configured && e->dev_addr == dev_addr && e->ep_addr == ep_addr) {
-      return e;
-    }
-  }
-  return NULL;
-}
-
-static hcd_edpt_t* _alloc_edpt(void) {
-  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
-    if (!_edpt_list[i].configured) {
-      return &_edpt_list[i];
-    }
-  }
-  return NULL;
-}
-
-static hcd_edpt_t* _add_edpt(uint8_t dev_addr, uint8_t ep_addr,
-                              uint16_t max_packet_size, uint8_t xfer_type) {
-  hcd_edpt_t* e = _alloc_edpt();
-  TU_ASSERT(e != NULL, NULL);
-
-  e->dev_addr = dev_addr;
-  e->ep_addr = ep_addr;
-  e->max_packet_size = (uint8_t) TU_MIN(max_packet_size, USBFS_MAX_PACKET_SIZE);
-  e->xfer_type = xfer_type;
-  e->data_toggle = 0;
-  e->is_nak_pending = false;
-  e->buflen = 0;
-  e->buf = NULL;
-  e->configured = true;
-
-  return e;
-}
-
-static hcd_edpt_t* _get_or_add_edpt(uint8_t dev_addr, uint8_t ep_addr,
-                                     uint16_t max_packet_size, uint8_t xfer_type) {
-  hcd_edpt_t* e = _get_edpt(dev_addr, ep_addr);
-  if (e != NULL) return e;
-  return _add_edpt(dev_addr, ep_addr, max_packet_size, xfer_type);
-}
-
-static void _remove_edpts_for_device(uint8_t dev_addr) {
-  for (size_t i = 0; i < TU_ARRAY_SIZE(_edpt_list); i++) {
-    if (_edpt_list[i].configured && _edpt_list[i].dev_addr == dev_addr) {
-      _edpt_list[i].configured = false;
-    }
-  }
-}
-
-//--------------------------------------------------------------------+
-// Low-level hardware helpers
-//--------------------------------------------------------------------+
-
-// Busywait delay (approximate microseconds at ~60MHz)
-TU_ATTR_ALWAYS_INLINE static inline void _delay_loops(uint32_t count) {
-  volatile uint32_t c = count / 3;
-  if (c == 0) return;
-  while (c-- != 0) {}
-}
-
-static void _hw_init_host(uint8_t rhport, bool enabled) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  if (!enabled) {
-    // Reset SIE when disabling
-    CH58X_USB_CTRL(base) = CH58X_UC_RESET_SIE | CH58X_UC_CLR_ALL;
-    _delay_loops(600); // ~10us at 60MHz
-    CH58X_USB_CTRL(base) = 0;
-    return;
-  }
-
-  // host mode, pull-down enabled, clear addr
-  CH58X_USB_CTRL(base) = CH58X_UC_HOST_MODE;
-  while (!(CH58X_USB_CTRL(base) & CH58X_UC_HOST_MODE)) {}
-  CH58X_UHOST_CTRL(base) = 0;
-  CH58X_USB_DEV_AD(base) = 0x00;
-
-  // EP2 RX (IN), EP3 TX (OUT/SETUP)
-  CH58X_UH_EP_MOD(base) = CH58X_UH_EP_TX_EN | CH58X_UH_EP_RX_EN;
-
-  // DMA: 16-bit address, lower 64KB only
-  CH58X_UH_RX_DMA(base) = (uint16_t)(uint32_t)_rx_buf[rhport];
-  CH58X_UH_TX_DMA(base) = (uint16_t)(uint32_t)_tx_buf[rhport];
-
-  CH58X_UH_RX_CTRL(base) = 0x00;
-  CH58X_UH_TX_CTRL(base) = 0x00;
-
-  CH58X_USB_CTRL(base) = CH58X_UC_HOST_MODE | CH58X_UC_INT_BUSY | CH58X_UC_DMA_EN;
-  CH58X_UH_SETUP(base) = CH58X_UH_SOF_EN;
-
-  CH58X_USB_INT_FG(base) = 0xFF; // clear all flags
-  CH58X_USB_INT_EN(base) = CH58X_UIE_TRANSFER | CH58X_UIE_DETECT;
-}
-
-static bool _hw_start_xfer(uint8_t rhport, uint8_t pid, uint8_t ep_addr, uint8_t data_toggle) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("_hw_start_xfer(pid=0x%02x, ep=0x%02x, tog=%d)\r\n", pid, ep_addr, data_toggle);
-
-  // Workaround: small delay for low-speed devices
-  bool is_lowspeed = tuh_speed_get(_current_xfer[rhport].dev_addr) == TUSB_SPEED_LOW;
-  if (is_lowspeed) {
-    _delay_loops(60000000 / 1000000 * 40); // ~40us at 60MHz
-  }
-
-  // Set toggle controls (same as SDK: R8_UH_RX_CTRL = R8_UH_TX_CTRL = tog)
-  uint8_t tog_ctrl = (data_toggle != 0) ? CH58X_UH_T_TOG : 0;
-  CH58X_UH_TX_CTRL(base) = tog_ctrl;
-  CH58X_UH_RX_CTRL(base) = (data_toggle != 0) ? CH58X_UH_R_TOG : 0;
-
-  uint8_t pid_endp = (pid << 4) | (tu_edpt_number(ep_addr) & 0x0F);
-
-  // clear flag, enable int, then set PID to start transfer
-  CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-  CH58X_USB_INT_EN(base) |= CH58X_UIE_TRANSFER;
-  CH58X_UH_EP_PID(base) = pid_endp;
-
-  return true;
-}
-
-static void _hw_set_device_addr(uint8_t rhport, uint8_t dev_addr) {
-  uint32_t base = _port_data[rhport].usb_base;
-  CH58X_USB_DEV_AD(base) = (CH58X_USB_DEV_AD(base) & CH58X_UDA_GP_BIT) |
-                            (dev_addr & CH58X_USB_ADDR_MASK);
-}
-
-static void _hw_set_speed(uint8_t rhport, tusb_speed_t speed) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("_hw_set_speed(%s)\r\n",
-                speed == TUSB_SPEED_FULL ? "Full" : "Low");
-
-  if (speed == TUSB_SPEED_LOW) {
-    CH58X_USB_CTRL(base) |= CH58X_UC_LOW_SPEED;
-    CH58X_UHOST_CTRL(base) |= CH58X_UH_LOW_SPEED;
-  } else {
-    CH58X_USB_CTRL(base) &= ~CH58X_UC_LOW_SPEED;
-    CH58X_UHOST_CTRL(base) &= ~CH58X_UH_LOW_SPEED;
-    CH58X_UH_SETUP(base) &= ~CH58X_UH_PRE_PID_EN;
-  }
-}
-
-static void _hw_set_addr_speed(uint8_t rhport, uint8_t dev_addr) {
-  _hw_set_device_addr(rhport, dev_addr);
-
-  tusb_speed_t rhport_speed = hcd_port_speed_get(rhport);
-  tusb_speed_t dev_speed = tuh_speed_get(dev_addr);
-  _hw_set_speed(rhport, dev_speed);
-
-  // FS root + LS device: hub uses PRE PID, clear LS on host ctrl
-  if (rhport_speed == TUSB_SPEED_FULL && dev_speed == TUSB_SPEED_LOW) {
-    uint32_t base = _port_data[rhport].usb_base;
-    CH58X_UHOST_CTRL(base) &= ~CH58X_UH_LOW_SPEED;
-  }
-}
-
-static bool _hw_device_attached(uint8_t rhport) {
-  uint32_t base = _port_data[rhport].usb_base;
-  return (CH58X_USB_MIS_ST(base) & CH58X_UMS_DEV_ATTACH) != 0;
-}
-
-//--------------------------------------------------------------------+
-// NAK retry callback
-//--------------------------------------------------------------------+
-static void _xfer_retry(void* param) {
-  LOG_CH58X_HCD("_xfer_retry()\r\n");
-  hcd_edpt_t* edpt = (hcd_edpt_t*)param;
-
-  // Find which rhport this endpoint belongs to by checking both ports
-  for (uint8_t rp = 0; rp < 2; rp++) {
-    if (_current_xfer[rp].nak_pending) {
-      _current_xfer[rp].nak_pending = false;
-      edpt->is_nak_pending = false;
-
-      uint8_t dev_addr = edpt->dev_addr;
-      uint8_t ep_addr = edpt->ep_addr;
-      uint16_t buflen = edpt->buflen;
-      uint8_t* buf = edpt->buf;
-
-      // Check if endpoint is still valid
-      hcd_edpt_t* current = _get_edpt(dev_addr, ep_addr);
-      if (current) {
-        hcd_edpt_xfer(rp, dev_addr, ep_addr, buf, buflen);
-      }
-      break;
-    }
-  }
-}
-
-//--------------------------------------------------------------------+
-// HCD API: Controller
-//--------------------------------------------------------------------+
-bool hcd_init(uint8_t rhport, const tusb_rhport_init_t* rh_init) {
-  (void)rh_init;
-
-  _port_data[rhport].usb_base = _get_usb_base(rhport);
-  _port_data[rhport].int_enabled = false;
-
-  // Clear endpoint records only on first init to avoid wiping state of the other rhport
-  static bool _first_init = true;
-  if (_first_init) {
-    tu_memclr(_edpt_list, sizeof(_edpt_list));
-    _first_init = false;
-  }
-  _current_xfer[rhport] = (const hcd_xfer_t){0};
-
-  _hw_init_host(rhport, true);
-
-  return true;
-}
-
-bool hcd_deinit(uint8_t rhport) {
-  _hw_init_host(rhport, false);
-  return true;
-}
-
-uint32_t hcd_frame_number(uint8_t rhport) {
-  (void)rhport;
-  return tusb_time_millis_api();
-}
-
-void hcd_int_enable(uint8_t rhport) {
-  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
-  CH58X_PFIC_IENR[irqn / 32] = (1u << (irqn % 32));
-  _port_data[rhport].int_enabled = true;
-}
-
-void hcd_int_disable(uint8_t rhport) {
-  uint8_t irqn = (rhport == 0) ? CH58X_USB_IRQn : CH58X_USB2_IRQn;
-  CH58X_PFIC_IRER[irqn / 32] = (1u << (irqn % 32));
-  __asm volatile("fence.i");
-  _port_data[rhport].int_enabled = false;
-}
-
-//--------------------------------------------------------------------+
-// HCD API: Port
-//--------------------------------------------------------------------+
-bool hcd_port_connect_status(uint8_t rhport) {
-  return _hw_device_attached(rhport);
-}
-
-tusb_speed_t hcd_port_speed_get(uint8_t rhport) {
-  uint32_t base = _port_data[rhport].usb_base;
-  if (CH58X_USB_MIS_ST(base) & CH58X_UMS_DM_LEVEL) {
-    return TUSB_SPEED_LOW;
-  }
-  return TUSB_SPEED_FULL;
-}
-
-void hcd_port_reset(uint8_t rhport) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("hcd_port_reset()\r\n");
-
-  _port_data[rhport].int_state_before_reset = _port_data[rhport].int_enabled;
-  hcd_int_disable(rhport);
-
-  _hw_set_device_addr(rhport, 0x00);
-
-  // Disable port and default to full-speed before reset (matches SDK ResetRootHubPort)
-  CH58X_UHOST_CTRL(base) &= ~CH58X_UH_PORT_EN;
-  _hw_set_speed(rhport, TUSB_SPEED_FULL);
-
-  // Start bus reset (clear low-speed bit simultaneously)
-  CH58X_UHOST_CTRL(base) = (CH58X_UHOST_CTRL(base) & ~CH58X_UH_LOW_SPEED) | CH58X_UH_BUS_RESET;
-}
-
-void hcd_port_reset_end(uint8_t rhport) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("hcd_port_reset_end()\r\n");
-
-  // End bus reset
-  CH58X_UHOST_CTRL(base) &= ~CH58X_UH_BUS_RESET;
-  tusb_time_delay_ms_api(2);
-
-  // Detect speed and configure
-  if ((CH58X_UHOST_CTRL(base) & CH58X_UH_PORT_EN) == 0) {
-    if (hcd_port_speed_get(rhport) == TUSB_SPEED_LOW) {
-      _hw_set_speed(rhport, TUSB_SPEED_LOW);
-    }
-  }
-
-  // Enable port and SOF
-  CH58X_UHOST_CTRL(base) |= CH58X_UH_PORT_EN;
-  CH58X_UH_SETUP(base) |= CH58X_UH_SOF_EN;
-
-  // Suppress stale detect event
-  CH58X_USB_INT_FG(base) = CH58X_UIF_DETECT;
-
-  if (_port_data[rhport].int_state_before_reset) {
-    hcd_int_enable(rhport);
-  }
-}
-
-void hcd_device_close(uint8_t rhport, uint8_t dev_addr) {
-  (void)rhport;
-  LOG_CH58X_HCD("hcd_device_close(dev=0x%02x)\r\n", dev_addr);
-  _remove_edpts_for_device(dev_addr);
-}
-
-//--------------------------------------------------------------------+
-// HCD API: Endpoint
-//--------------------------------------------------------------------+
-bool hcd_edpt_open(uint8_t rhport, uint8_t dev_addr, tusb_desc_endpoint_t const* ep_desc) {
-  uint8_t ep_addr = ep_desc->bEndpointAddress;
-  uint8_t ep_num = tu_edpt_number(ep_addr);
-  uint16_t max_packet_size = ep_desc->wMaxPacketSize;
-  uint8_t xfer_type = ep_desc->bmAttributes.xfer;
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("hcd_edpt_open(dev=0x%02x, ep=0x%02x, mps=%d, type=%d)\r\n",
-                dev_addr, ep_addr, max_packet_size, xfer_type);
-
-  // Wait for any pending transfer
-  uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer[rhport].is_busy) {
-    if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer[rhport].is_busy = false;
-      break;
-    }
-  }
-
-  if (ep_num == 0) {
-    TU_ASSERT(_get_or_add_edpt(dev_addr, 0x00, max_packet_size, xfer_type) != NULL, false);
-    TU_ASSERT(_get_or_add_edpt(dev_addr, 0x80, max_packet_size, xfer_type) != NULL, false);
-  } else {
-    TU_ASSERT(_get_or_add_edpt(dev_addr, ep_addr, max_packet_size, xfer_type) != NULL, false);
-  }
-
-  // Ensure port is enabled with SOF
-  CH58X_UHOST_CTRL(base) |= CH58X_UH_PORT_EN;
-  CH58X_UH_SETUP(base) |= CH58X_UH_SOF_EN;
-
-  _hw_set_addr_speed(rhport, dev_addr);
-
-  return true;
-}
-
-bool hcd_edpt_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr,
-                   uint8_t* buffer, uint16_t buflen) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("hcd_edpt_xfer(dev=0x%02x, ep=0x%02x, len=%d)\r\n",
-                dev_addr, ep_addr, buflen);
-
-  // Wait for any pending transfer (with 200ms timeout to avoid deadlock on disconnect)
-  uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer[rhport].is_busy) {
-    if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer[rhport].is_busy = false;
-      return false;
-    }
-  }
-  _current_xfer[rhport].is_busy = true;
-
-  hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
-  TU_ASSERT(edpt != NULL);
-
-  _hw_set_addr_speed(rhport, dev_addr);
-
-  _current_xfer[rhport].rhport = rhport;
-  _current_xfer[rhport].dev_addr = dev_addr;
-  _current_xfer[rhport].ep_addr = ep_addr;
-  _current_xfer[rhport].buffer = buffer;
-  _current_xfer[rhport].bufferlen = buflen;
-  _current_xfer[rhport].start_ms = tusb_time_millis_api();
-  _current_xfer[rhport].xferred_len = 0;
-  _current_xfer[rhport].nak_pending = false;
-
-  if (tu_edpt_dir(ep_addr) == TUSB_DIR_IN) {
-    // IN transfer: host receives data
-    return _hw_start_xfer(rhport, CH58X_USB_PID_IN, ep_addr, edpt->data_toggle);
-  } else {
-    // OUT transfer: host sends data
-    uint16_t copylen = TU_MIN(edpt->max_packet_size, buflen);
-    CH58X_UH_TX_LEN(base) = (uint8_t)copylen;
-    memcpy(_tx_buf[rhport], buffer, copylen);
-    return _hw_start_xfer(rhport, CH58X_USB_PID_OUT, ep_addr, edpt->data_toggle);
-  }
-}
-
-bool hcd_edpt_abort_xfer(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
-  (void)rhport;
-  (void)dev_addr;
-  (void)ep_addr;
-  return false;
-}
-
-bool hcd_setup_send(uint8_t rhport, uint8_t dev_addr, uint8_t const setup_packet[8]) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  LOG_CH58X_HCD("hcd_setup_send(dev=0x%02x)\r\n", dev_addr);
-
-  // Wait for any pending transfer
-  uint32_t t0 = tusb_time_millis_api();
-  while (_current_xfer[rhport].is_busy) {
-    if (tusb_time_millis_api() - t0 > 200) {
-      _current_xfer[rhport].is_busy = false;
-      return false;
-    }
-  }
-  _current_xfer[rhport].is_busy = true;
-
-  _hw_set_addr_speed(rhport, dev_addr);
-
-  hcd_edpt_t* edpt_tx = _get_edpt(dev_addr, 0x00);
-  hcd_edpt_t* edpt_rx = _get_edpt(dev_addr, 0x80);
-  TU_ASSERT(edpt_tx != NULL, false);
-  TU_ASSERT(edpt_rx != NULL, false);
-
-  // SETUP always starts with DATA0; after SETUP, IN data starts with DATA1
-  edpt_tx->data_toggle = 0;
-  edpt_rx->data_toggle = 1;
-
-  memcpy(_tx_buf[rhport], setup_packet, 8);
-  CH58X_UH_TX_LEN(base) = 8;
-
-  _current_xfer[rhport].rhport = rhport;
-  _current_xfer[rhport].dev_addr = dev_addr;
-  _current_xfer[rhport].ep_addr = 0x00;  // SETUP always targets EP0 OUT
-  _current_xfer[rhport].start_ms = tusb_time_millis_api();
-  _current_xfer[rhport].buffer = _tx_buf[rhport];
-  _current_xfer[rhport].bufferlen = 8;
-  _current_xfer[rhport].xferred_len = 0;
-  _current_xfer[rhport].nak_pending = false;
-
-  _hw_start_xfer(rhport, CH58X_USB_PID_SETUP, 0, 0);
-
-  return true;
-}
-
-bool hcd_edpt_clear_stall(uint8_t rhport, uint8_t dev_addr, uint8_t ep_addr) {
-  (void) rhport;
-
-  LOG_CH58X_HCD("hcd_edpt_clear_stall(dev=0x%02x, ep=0x%02x)\r\n", dev_addr, ep_addr);
-  hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
-  if (edpt != NULL) {
-    edpt->data_toggle = 0;
-  }
-
-  return true;
-}
-
-//--------------------------------------------------------------------+
-// Interrupt Handler
-//--------------------------------------------------------------------+
-void hcd_int_handler(uint8_t rhport, bool in_isr) {
-  uint32_t base = _port_data[rhport].usb_base;
-
-  //-- Device attach/detach detection --
-  if (CH58X_USB_INT_FG(base) & CH58X_UIF_DETECT) {
-    CH58X_USB_INT_FG(base) = CH58X_UIF_DETECT;
-
-    bool attached = _hw_device_attached(rhport);
-    LOG_CH58X_HCD("hcd_int: detect, attached=%d\r\n", attached);
-
-    if (attached) {
-      hcd_event_device_attach(rhport, in_isr);
-    } else {
-      // Stop any ongoing hardware transfer before reporting removal
-      CH58X_UH_EP_PID(base) = 0x00;
-      _current_xfer[rhport].is_busy = false;
-      _current_xfer[rhport].nak_pending = false;
-      hcd_event_device_remove(rhport, in_isr);
-    }
-    return;
-  }
-
-  //-- Transfer complete --
-  if (CH58X_USB_INT_FG(base) & CH58X_UIF_TRANSFER) {
-    // Read PID/endpoint before stopping (must read first!)
-    uint8_t pid_endp = CH58X_UH_EP_PID(base);
-    uint8_t int_st = CH58X_USB_INT_ST(base);
-    uint8_t dev_addr = CH58X_USB_DEV_AD(base) & CH58X_USB_ADDR_MASK;
-
-    // Stop USB transaction immediately (SDK: R8_UH_EP_PID = 0x00)
-    CH58X_UH_EP_PID(base) = 0x00;
-
-    // Disable transfer interrupt (re-enabled when next transfer starts)
-    CH58X_USB_INT_EN(base) &= ~CH58X_UIE_TRANSFER;
-
-    uint8_t request_pid = pid_endp >> 4;
-    uint8_t response_pid = int_st & CH58X_UIS_H_RES_MASK;
-    uint8_t ep_addr = pid_endp & 0x0F;
-    if (request_pid == CH58X_USB_PID_IN) {
-      ep_addr |= 0x80;
-    }
-
-    LOG_CH58X_HCD("hcd_int: xfer pid=0x%02x ep=0x%02x resp=0x%02x\r\n",
-                  request_pid, ep_addr, response_pid);
-
-    hcd_edpt_t* edpt = _get_edpt(dev_addr, ep_addr);
-    if (edpt == NULL) {
-      // Unknown endpoint, discard
-      LOG_CH58X_HCD("hcd_int: unknown edpt dev=0x%02x ep=0x%02x\r\n", dev_addr, ep_addr);
-      _current_xfer[rhport].is_busy = false;
-      CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-      return;
-    }
-
-    // Check toggle match - SDK uses R8_USB_INT_ST & RB_UIS_TOG_OK
-    if (int_st & CH58X_UIS_TOG_OK) {
-      edpt->data_toggle ^= 0x01;
-
-      switch (request_pid) {
-        case CH58X_USB_PID_SETUP:
-        case CH58X_USB_PID_OUT: {
-          uint8_t tx_len = CH58X_UH_TX_LEN(base);
-          _current_xfer[rhport].bufferlen -= tx_len;
-          _current_xfer[rhport].xferred_len += tx_len;
-
-          if (_current_xfer[rhport].bufferlen == 0) {
-            LOG_CH58X_HCD("OUT/SETUP complete, %d bytes\r\n", _current_xfer[rhport].xferred_len);
-            _current_xfer[rhport].is_busy = false;
-            hcd_event_xfer_complete(dev_addr, ep_addr,
-                                    _current_xfer[rhport].xferred_len, XFER_RESULT_SUCCESS, in_isr);
-          } else {
-            // Multi-packet OUT: send next chunk
-            _current_xfer[rhport].buffer += tx_len;
-            uint16_t copylen = TU_MIN(edpt->max_packet_size, _current_xfer[rhport].bufferlen);
-            memcpy(_tx_buf[rhport], _current_xfer[rhport].buffer, copylen);
-            CH58X_UH_TX_LEN(base) = (uint8_t)copylen;
-            _hw_start_xfer(rhport, CH58X_USB_PID_OUT, ep_addr, edpt->data_toggle);
-          }
-          break;
-        }
-
-        case CH58X_USB_PID_IN: {
-          uint8_t rx_len = CH58X_USB_RX_LEN(base);
-          _current_xfer[rhport].xferred_len += rx_len;
-          uint16_t xferred = _current_xfer[rhport].xferred_len;
-
-          if (rx_len > 0 && _current_xfer[rhport].buffer != NULL) {
-            memcpy(_current_xfer[rhport].buffer, _rx_buf[rhport], rx_len);
-            _current_xfer[rhport].buffer += rx_len;
-          }
-
-          if ((rx_len < edpt->max_packet_size) || (xferred == _current_xfer[rhport].bufferlen)) {
-            // Short packet or transfer complete
-            LOG_CH58X_HCD("IN complete, %d bytes\r\n", xferred);
-            _current_xfer[rhport].is_busy = false;
-            hcd_event_xfer_complete(dev_addr, ep_addr, xferred,
-                                    XFER_RESULT_SUCCESS, in_isr);
-          } else {
-            // More data expected
-            _hw_start_xfer(rhport, CH58X_USB_PID_IN, ep_addr, edpt->data_toggle);
-          }
-          break;
-        }
-
-        default: {
-          LOG_CH58X_HCD("unexpected PID 0x%02x\r\n", request_pid);
-          _current_xfer[rhport].is_busy = false;
-          hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
-          break;
-        }
-      }
-    } else {
-      // Toggle mismatch, check response PID
-      if (response_pid == CH58X_USB_PID_STALL) {
-        LOG_CH58X_HCD("STALL response\r\n");
-        edpt->data_toggle = 0;
-        _current_xfer[rhport].is_busy = false;
-        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_STALLED, in_isr);
-      } else if (response_pid == CH58X_USB_PID_NAK) {
-        LOG_CH58X_HCD("NAK response\r\n");
-        // For interrupt endpoints, treat NAK as a successful 0-byte poll so
-        // that upper layers can reschedule based on the endpoint interval.
-        if (edpt->xfer_type == TUSB_XFER_INTERRUPT) {
-          _current_xfer[rhport].is_busy = false;
-          hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_SUCCESS, in_isr);
-        } else {
-          // For non-interrupt endpoints, schedule retry via deferred callback.
-          _current_xfer[rhport].is_busy = false;
-          _current_xfer[rhport].nak_pending = true;
-
-          edpt->is_nak_pending = true;
-          edpt->buflen = _current_xfer[rhport].bufferlen;
-          edpt->buf = _current_xfer[rhport].buffer;
-
-          hcd_event_t event = {
-            .rhport = rhport,
-            .dev_addr = dev_addr,
-            .event_id = USBH_EVENT_FUNC_CALL,
-            .func_call = {
-              .func = _xfer_retry,
-              .param = edpt
-            }
-          };
-          hcd_event_handler(&event, in_isr);
-        }
-      } else if (response_pid == CH58X_USB_PID_DATA0 || response_pid == CH58X_USB_PID_DATA1) {
-        LOG_CH58X_HCD("toggle mismatch, DATA0/1 rx_len=%d\r\n", CH58X_USB_RX_LEN(base));
-        _current_xfer[rhport].is_busy = false;
-        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
-      } else {
-        LOG_CH58X_HCD("unexpected response 0x%02x\r\n", response_pid);
-        _current_xfer[rhport].is_busy = false;
-        hcd_event_xfer_complete(dev_addr, ep_addr, 0, XFER_RESULT_FAILED, in_isr);
-      }
-    }
-
-    // Clear transfer flag
-    CH58X_USB_INT_FG(base) = CH58X_UIF_TRANSFER;
-  }
-}
-
-#endif /* CFG_TUH_ENABLED && TUP_USBIP_WCH_CH58X */
-- 
cgit v1.3.1


From d0e51346cdc691624bc10da89a775a82ef86d92a Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Thu, 18 Jun 2026 17:44:16 +0700
Subject: fix(stm32_fsdev): don't enable the unused USB wakeup EXTI IRQ
 (F1/F3/G4/L1)

The classic-USB STM32 fsdev driver enabled the EXTI-line USB wakeup interrupt
(USBWakeUp_IRQn, and USBWakeUp_RMP_IRQn on the F3 remap path) in the NVIC, but
never uses it: resume is serviced in-band via ISTR.WKUP in the USB_LP/HP ISR,
and the driver never arms or clears that EXTI line. The wakeup EXTI interrupt is
only needed to wake the core from STOP mode, which TinyUSB does not implement.
Leaving its NVIC vector enabled lets it fire spuriously into an unhandled or
looping vector -- the freeze reported in #3696 on STM32G473.

USBWakeUp_IRQn is a valid, dedicated USB-wakeup-via-EXTI interrupt (e.g.
stm32g473xx.h: =42 "USB Wakeup through EXTI line"), not an "unrelated
interrupt"; it is simply unused here.

- Comment out USBWakeUp_IRQn for F1/F3/G4/L1 and USBWakeUp_RMP_IRQn on the F3
  remap path, kept in place so STOP-mode wakeup is a one-line re-enable.
- Keep the STM32L1 USBWakeUp_IRQn -> USB_FS_WKUP_IRQn alias for that re-enable.
- Document the rationale in fsdev_stm32.h with a TODO.
- Comment out the matching USBWakeUp(_RMP)_IRQHandler in the F1/F3/G4 BSPs, and
  the FreeRTOS NVIC_SetPriority(USBWakeUp_IRQn) on F1/G4.

Fixes #3696

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/stm32f1/family.c                   | 10 ++++++----
 hw/bsp/stm32f3/family.c                   |  7 ++++---
 hw/bsp/stm32g4/family.c                   | 10 ++++++----
 src/portable/st/stm32_fsdev/fsdev_stm32.h | 22 +++++++++++++---------
 4 files changed, 29 insertions(+), 20 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/stm32f1/family.c b/hw/bsp/stm32f1/family.c
index abde44d21..67427da1f 100644
--- a/hw/bsp/stm32f1/family.c
+++ b/hw/bsp/stm32f1/family.c
@@ -63,9 +63,11 @@ void USB_LP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USBWakeUp_IRQHandler(void) {
-  tud_int_handler(0);
-}
+// USB wakeup EXTI IRQ is not enabled by the fsdev driver (see fsdev_stm32.h);
+// restore when STOP-mode wakeup is implemented.
+//void USBWakeUp_IRQHandler(void) {
+//  tud_int_handler(0);
+//}
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
@@ -128,7 +130,7 @@ void board_init(void) {
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_HP_CAN1_TX_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USB_LP_CAN1_RX0_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  //NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
   // LED
diff --git a/hw/bsp/stm32f3/family.c b/hw/bsp/stm32f3/family.c
index 35e1852e8..bddf224d2 100644
--- a/hw/bsp/stm32f3/family.c
+++ b/hw/bsp/stm32f3/family.c
@@ -76,9 +76,10 @@ void USB_LP_IRQHandler(void) {
 
 // USB wakeup interrupt (Channel 76): Triggered by the wakeup event from the USB
 // Suspend mode.
-void USBWakeUp_RMP_IRQHandler(void) {
-  tud_int_handler(0);
-}
+// Not enabled by the fsdev driver (see fsdev_stm32.h); restore for STOP-mode wakeup.
+//void USBWakeUp_RMP_IRQHandler(void) {
+//  tud_int_handler(0);
+//}
 
 //--------------------------------------------------------------------+
 // MACRO TYPEDEF CONSTANT ENUM
diff --git a/hw/bsp/stm32g4/family.c b/hw/bsp/stm32g4/family.c
index 433f74e2a..cf7d4329b 100644
--- a/hw/bsp/stm32g4/family.c
+++ b/hw/bsp/stm32g4/family.c
@@ -61,9 +61,11 @@ void USB_LP_IRQHandler(void) {
   tud_int_handler(0);
 }
 
-void USBWakeUp_IRQHandler(void) {
-  tud_int_handler(0);
-}
+// USB wakeup EXTI IRQ is not enabled by the fsdev driver (see fsdev_stm32.h);
+// restore when STOP-mode wakeup is implemented.
+//void USBWakeUp_IRQHandler(void) {
+//  tud_int_handler(0);
+//}
 
 // USB PD
 void UCPD1_IRQHandler(void) {
@@ -99,7 +101,7 @@ void board_init(void) {
   // If freeRTOS is used, IRQ priority is limit by max syscall ( smaller is higher )
   NVIC_SetPriority(USB_HP_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
   NVIC_SetPriority(USB_LP_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
-  NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
+  //NVIC_SetPriority(USBWakeUp_IRQn, configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY);
 #endif
 
   GPIO_InitTypeDef GPIO_InitStruct;
diff --git a/src/portable/st/stm32_fsdev/fsdev_stm32.h b/src/portable/st/stm32_fsdev/fsdev_stm32.h
index b15c95302..93cdac808 100644
--- a/src/portable/st/stm32_fsdev/fsdev_stm32.h
+++ b/src/portable/st/stm32_fsdev/fsdev_stm32.h
@@ -168,14 +168,18 @@
   #define FSDEV_USE_SBUF_ISO 0
 #endif
 
-//--------------------------------------------------------------------+
-//
-//--------------------------------------------------------------------+
-
+// STM32L1 calls it USB_FS_WKUP_IRQn; alias so the commented USBWakeUp_IRQn below
+// can be uncommented as-is.
 #if TU_CHECK_MCU(OPT_MCU_STM32L1) && !defined(USBWakeUp_IRQn)
   #define USBWakeUp_IRQn USB_FS_WKUP_IRQn
 #endif
 
+// USB interrupt vectors to enable in NVIC. The EXTI-line USB wakeup interrupt
+// (USBWakeUp_IRQn, and USBWakeUp_RMP_IRQn on F3) is left commented out: resume is
+// handled in-band via ISTR.WKUP in the USB_LP/HP ISR; the EXTI line is only needed to
+// wake the core from STOP mode, which this driver does not implement (it never arms or
+// clears that EXTI line, so enabling its NVIC vector can only spuriously fire/freeze).
+// TODO: uncomment USBWakeUp_IRQn (+ arm/clear its EXTI line) when adding STOP-mode wakeup.
 static const IRQn_Type fsdev_irq[] = {
   #if TU_CHECK_MCU(OPT_MCU_STM32F0, OPT_MCU_STM32L0, OPT_MCU_STM32L4, OPT_MCU_STM32U5)
     USB_IRQn,
@@ -192,15 +196,15 @@ static const IRQn_Type fsdev_irq[] = {
   #elif CFG_TUSB_MCU == OPT_MCU_STM32F1
     USB_HP_CAN1_TX_IRQn,
     USB_LP_CAN1_RX0_IRQn,
-    USBWakeUp_IRQn,
+    //USBWakeUp_IRQn,
   #elif CFG_TUSB_MCU == OPT_MCU_STM32F3
     USB_HP_CAN_TX_IRQn,
     USB_LP_CAN_RX0_IRQn,
-    USBWakeUp_IRQn,
+    //USBWakeUp_IRQn,
   #elif TU_CHECK_MCU(OPT_MCU_STM32G4, OPT_MCU_STM32L1)
     USB_HP_IRQn,
     USB_LP_IRQn,
-    USBWakeUp_IRQn,
+    //USBWakeUp_IRQn,
   #elif CFG_TUSB_MCU == OPT_MCU_STM32WB
     USB_HP_IRQn,
     USB_LP_IRQn,
@@ -223,7 +227,7 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_enable(uint8_t rhport) {
   if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
     NVIC_EnableIRQ(USB_HP_IRQn);
     NVIC_EnableIRQ(USB_LP_IRQn);
-    NVIC_EnableIRQ(USBWakeUp_RMP_IRQn);
+    //NVIC_EnableIRQ(USBWakeUp_RMP_IRQn);
   } else
   #endif
   {
@@ -243,7 +247,7 @@ TU_ATTR_ALWAYS_INLINE static inline void fsdev_int_disable(uint8_t rhport) {
   if (SYSCFG->CFGR1 & SYSCFG_CFGR1_USB_IT_RMP) {
     NVIC_DisableIRQ(USB_HP_IRQn);
     NVIC_DisableIRQ(USB_LP_IRQn);
-    NVIC_DisableIRQ(USBWakeUp_RMP_IRQn);
+    //NVIC_DisableIRQ(USBWakeUp_RMP_IRQn);
   } else
   #endif
   {
-- 
cgit v1.3.1


From 2b205526d3a07aac19364f00165f491b83146d17 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 20 Jun 2026 00:03:18 +0700
Subject: hw/mcu/wch: rename ch58x SDK dir to ch583 to match the openwch repo

The dependency is fetched from https://github.com/openwch/ch583.git but lived at
hw/mcu/wch/ch58x. Rename the local path to hw/mcu/wch/ch583 so it matches the
upstream repo name. Updates the get_deps.py path key and the ch58x BSP SDK_DIR
(family.mk + family.cmake); the BSP family stays "ch58x" (covers CH582 and CH583).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/ch58x/family.cmake | 2 +-
 hw/bsp/ch58x/family.mk    | 2 +-
 tools/get_deps.py         | 2 +-
 3 files changed, 3 insertions(+), 3 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
index cbe1ffe72..a52309276 100644
--- a/hw/bsp/ch58x/family.cmake
+++ b/hw/bsp/ch58x/family.cmake
@@ -1,6 +1,6 @@
 include_guard()
 
-set(SDK_DIR ${TOP}/hw/mcu/wch/ch58x)
+set(SDK_DIR ${TOP}/hw/mcu/wch/ch583)
 set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
 
 # include board specific
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 2ef90a8c3..36ce254fc 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -7,7 +7,7 @@
 # Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
 CROSS_COMPILE ?= riscv-none-elf-
 
-SDK_DIR = hw/mcu/wch/ch58x
+SDK_DIR = hw/mcu/wch/ch583
 SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
 
 include $(TOP)/$(BOARD_PATH)/board.mk
diff --git a/tools/get_deps.py b/tools/get_deps.py
index 6d7b91a76..b31f8a0cb 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -253,7 +253,7 @@ deps_optional = {
     'hw/mcu/wch/ch32f20x': ['https://github.com/openwch/ch32f20x.git',
                             '77c4095087e5ed2c548ec9058e655d0b8757663b',
                             'ch32f20x'],
-    'hw/mcu/wch/ch58x': ['https://github.com/openwch/ch583.git',
+    'hw/mcu/wch/ch583': ['https://github.com/openwch/ch583.git',
                          'bd508ad7ceed48377619837051412a651952857f',
                          'ch58x'],
     'hw/mcu/artery/at32f403a_407': ['https://github.com/ArteryTek/AT32F403A_407_Firmware_Library.git',
-- 
cgit v1.3.1


From 6b2845beba3938dd350a889f8d918f7473f8c6ff Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 20 Jun 2026 08:22:45 +0700
Subject: hw/bsp/ch58x: put linker flags in LDFLAGS so the make build links

family.mk listed -nostartfiles and the nano/nosys specs under LDFLAGS_GCC, a variable
the make build system never reads (only LDFLAGS / LDFLAGS_CLANG are consumed by
gcc_rules.mk). So the make build linked the toolchain's crt0.o alongside the SDK's
startup_CH583.S and failed with "multiple definition of _start" + an undefined
__bss_start, and also pulled in full newlib (RAM blew up). Rename it to LDFLAGS,
matching ch32v20x/family.mk. The cmake build was unaffected (it sets these via
target_link_options). Fixes the CircleCI one-random-make-ch58x build.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/ch58x/family.mk | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index 36ce254fc..ccdaa7268 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -26,7 +26,7 @@ CFLAGS += \
 	-DINT_SOFT \
 	-Wno-error=strict-prototypes
 
-LDFLAGS_GCC += \
+LDFLAGS += \
 	-nostartfiles \
 	--specs=nosys.specs --specs=nano.specs \
 
-- 
cgit v1.3.1


From ea5c6fa165649cfa36d704b1852babf19d5e6bb5 Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Sat, 20 Jun 2026 23:06:07 +0700
Subject: hw/bsp/ch58x: address review feedback and read the real chip unique
 id

Fold in the CH58x BSP review fixes:

- family.mk: drop stray trailing backslashes on the last LDFLAGS/SRC_C entries
  (harmless -- GNU Make ends the list at the blank line -- but misleading).
- debug_uart.c: uart_write() spun on a full ring buffer with nothing to drain it
  (only uart_sync() advances tx_consume), so a burst larger than the buffer
  deadlocked. Drain the FIFO while waiting, like uart_sync() does.
- wch-riscv.cfg: move the OpenOCD work area from 0x80000000 (unmapped) to the
  0x20000000 SRAM, sized to 32 KB, matching ch32v20x/wch-riscv.cfg.
- family.c: implement board_get_unique_id() from the factory MAC. CH58x is a BLE
  part, so a unique 6-byte MAC lives in FlashROM at ROM_CFG_MAC_ADDR; GetMACAddress()
  reads it via FLASH_EEPROM_CMD (in libISP583.a), so no extra source file is needed.
  The read buffer is TU_ATTR_ALIGNED(4) and 8 bytes, per the SDK's documented
  4-byte-aligned, word-granular buffer contract (CH58x_flash.c).
- test/hil/tinyusb.json: key ch582m_evt off this board's actual MAC (D443627B5450)
  instead of the fixed placeholder, like every other board.

Verified on ci.lan HIL: ch582m_evt enumerates with serial D443627B5450 and all
device examples pass.

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 hw/bsp/ch58x/debug_uart.c  | 10 ++++++++--
 hw/bsp/ch58x/family.c      | 16 +++++++++++++---
 hw/bsp/ch58x/family.mk     |  4 ++--
 hw/bsp/ch58x/wch-riscv.cfg |  2 +-
 test/hil/tinyusb.json      |  2 +-
 5 files changed, 25 insertions(+), 9 deletions(-)

(limited to 'hw')

diff --git a/hw/bsp/ch58x/debug_uart.c b/hw/bsp/ch58x/debug_uart.c
index 7dd133cb2..850e40718 100644
--- a/hw/bsp/ch58x/debug_uart.c
+++ b/hw/bsp/ch58x/debug_uart.c
@@ -41,8 +41,14 @@ static volatile uint32_t tx_consume;
 void uart_write(char c) {
   uint32_t tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
 
-  // If ring buffer is full, wait
-  while (tx_produce_next == tx_consume) {}
+  // If the ring buffer is full, drain it here as the FIFO frees up: nothing else advances
+  // tx_consume between uart_write() calls, so a plain spin would deadlock on a >buffer-size burst.
+  while (tx_produce_next == tx_consume) {
+    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
+      R8_UART1_THR = tx_buf[tx_consume];
+      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
+    }
+  }
 
   // If UART TX FIFO is empty and no pending data, send directly
   if ((tx_consume == tx_produce) && (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP)) {
diff --git a/hw/bsp/ch58x/family.c b/hw/bsp/ch58x/family.c
index 8e5f2826b..64ae4a903 100644
--- a/hw/bsp/ch58x/family.c
+++ b/hw/bsp/ch58x/family.c
@@ -163,9 +163,19 @@ uint32_t board_button_read(void) {
 #endif
 }
 
-// Note: CH58x exposes no memory-mapped unique-ID register (unlike ch32v10x/v20x at
-// 0x1FFFF7E8), and the SDK's GET_UNIQUE_ID() is a BootROM stub not present in
-// libISP583.a. So board_get_unique_id() falls back to the fixed default in board.c.
+// CH58x has no memory-mapped unique-ID register (unlike ch32v10x/v20x at 0x1FFFF7E8), but the
+// factory programs a unique 6-byte MAC address into FlashROM (it is a BLE part). GetMACAddress()
+// reads it via the ISP ROM command FLASH_EEPROM_CMD, which is provided by libISP583.a.
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  // FLASH_EEPROM_CMD writes word-granular and requires a 4-byte-aligned buffer (CH58x_flash.c);
+  // size 8 matches the SDK's GET_UNIQUE_ID buffer (6 MAC bytes + 2 it pads), so the read can't
+  // run past the end whether it returns 6 or a full 8.
+  TU_ATTR_ALIGNED(4) uint8_t mac[8];
+  GetMACAddress(mac);
+  size_t len = TU_MIN(max_len, (size_t) 6); // the 6-byte MAC is the unique part
+  memcpy(id, mac, len);
+  return len;
+}
 
 int board_uart_read(uint8_t* buf, int len) {
   (void) buf;
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
index ccdaa7268..ac0443659 100644
--- a/hw/bsp/ch58x/family.mk
+++ b/hw/bsp/ch58x/family.mk
@@ -28,7 +28,7 @@ CFLAGS += \
 
 LDFLAGS += \
 	-nostartfiles \
-	--specs=nosys.specs --specs=nano.specs \
+	--specs=nosys.specs --specs=nano.specs
 
 LIBS += $(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/libISP583.a
 
@@ -40,7 +40,7 @@ SRC_C += \
 	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_sys.c \
 	$(FAMILY_PATH)/debug_uart.c \
 	$(FAMILY_PATH)/ch58x_it.c \
-	$(FAMILY_PATH)/system_ch58x.c \
+	$(FAMILY_PATH)/system_ch58x.c
 
 SRC_S += \
 	$(SDK_SRC_DIR)/Startup/startup_CH583.S
diff --git a/hw/bsp/ch58x/wch-riscv.cfg b/hw/bsp/ch58x/wch-riscv.cfg
index 5913a2465..64d595d8e 100644
--- a/hw/bsp/ch58x/wch-riscv.cfg
+++ b/hw/bsp/ch58x/wch-riscv.cfg
@@ -9,7 +9,7 @@ sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
 set _TARGETNAME $_CHIPNAME.cpu
 
 target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
-$_TARGETNAME.0 configure  -work-area-phys 0x80000000 -work-area-size 10000 -work-area-backup 1
+$_TARGETNAME.0 configure  -work-area-phys 0x20000000 -work-area-size 0x8000 -work-area-backup 1
 set _FLASHNAME $_CHIPNAME.flash
 
 flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
diff --git a/test/hil/tinyusb.json b/test/hil/tinyusb.json
index ccf81c582..71d92aae1 100644
--- a/test/hil/tinyusb.json
+++ b/test/hil/tinyusb.json
@@ -496,7 +496,7 @@
         },
         {
             "name": "ch582m_evt",
-            "uid": "0123456789ABCDEF",
+            "uid": "D443627B5450",
             "toolchain": "riscv-gcc",
             "tests": {
                 "device": true,
-- 
cgit v1.3.1


From eda704ca1acef9691b51e17026765f497b1fffbe Mon Sep 17 00:00:00 2001
From: hathach <thach@tinyusb.org>
Date: Mon, 22 Jun 2026 15:23:08 +0700
Subject: hw/bsp+wch: rename the CH58x family to ch583 and OPT_MCU_CH58X to
 OPT_MCU_CH583

The BSP family and MCU option were named "ch58x"/"CH58X", but the supported part is
the CH583/CH582 (and the SDK repo is openwch/ch583); CH585 is a separate MCU family,
so the CH58x umbrella was misleading. Rename to the specific family:

- hw/bsp/ch58x -> hw/bsp/ch583 (dir), and the BSP-local files ch58x_it.* ->
  ch583_it.*, system_ch58x.* -> system_ch583.* (include guards/refs updated). The
  vendor SDK files (CH58x_common.h, CH58x_*.c in hw/mcu/wch/ch583) keep their names.
- OPT_MCU_CH58X -> OPT_MCU_CH583 in tusb_option.h, tusb_mcu.h, and the shared WCH
  USBFS driver (ch32_usbfs_reg.h, dcd_ch32_usbfs.c). OPT_MCU_CH582 is kept as an
  alias (same value), so either name selects the same code.
- FAMILY_MCUS CH58X -> CH583, CFG_TUSB_MCU=OPT_MCU_CH583, mcu:CH58X -> mcu:CH583 in
  the example skip lists, the CI build matrix (ci_set_matrix.py), the get_deps family
  tag, and docs/reference/boards.rst.

Board names (ch582m_evt, yd-ch582m) are unchanged. Verified: make + cmake build for
ch582m_evt, and ci.lan HIL (all device examples pass).

Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>
---
 .github/workflows/ci_set_matrix.py                 |   2 +-
 docs/reference/boards.rst                          |   2 +-
 examples/device/audio_4_channel_mic/skip.txt       |   2 +-
 .../device/audio_4_channel_mic_freertos/skip.txt   |   2 +-
 examples/device/audio_test/skip.txt                |   2 +-
 examples/device/audio_test_freertos/skip.txt       |   2 +-
 examples/device/audio_test_multi_rate/skip.txt     |   2 +-
 examples/device/cdc_msc_freertos/skip.txt          |   2 +-
 examples/device/cdc_uac2/skip.txt                  |   2 +-
 examples/device/dfu_runtime/skip.txt               |   1 +
 examples/device/hid_boot_interface/skip.txt        |   1 +
 examples/device/hid_composite/skip.txt             |   1 +
 examples/device/hid_composite_freertos/skip.txt    |   2 +-
 examples/device/hid_generic_inout/skip.txt         |   1 +
 examples/device/hid_multiple_interface/skip.txt    |   1 +
 examples/device/midi_test/skip.txt                 |   1 +
 examples/device/midi_test_freertos/skip.txt        |   2 +-
 examples/device/uac2_headset/skip.txt              |   2 +-
 examples/device/uac2_speaker_fb/skip.txt           |   2 +-
 examples/device/video_capture/skip.txt             |   2 +-
 examples/device/video_capture_2ch/skip.txt         |   2 +-
 examples/device/webusb_serial/skip.txt             |   1 +
 hw/bsp/ch583/boards/ch582m_evt/board.cmake         |   5 +
 hw/bsp/ch583/boards/ch582m_evt/board.h             |  61 +++++++
 hw/bsp/ch583/boards/ch582m_evt/board.mk            |   3 +
 hw/bsp/ch583/boards/yd-ch582m/board.cmake          |   5 +
 hw/bsp/ch583/boards/yd-ch582m/board.h              |  61 +++++++
 hw/bsp/ch583/boards/yd-ch582m/board.mk             |   3 +
 hw/bsp/ch583/ch583_it.c                            |  37 ++++
 hw/bsp/ch583/ch583_it.h                            |  46 +++++
 hw/bsp/ch583/debug_uart.c                          |  86 +++++++++
 hw/bsp/ch583/debug_uart.h                          |  44 +++++
 hw/bsp/ch583/family.c                              | 194 +++++++++++++++++++++
 hw/bsp/ch583/family.cmake                          | 108 ++++++++++++
 hw/bsp/ch583/family.mk                             |  59 +++++++
 hw/bsp/ch583/linker/ch582.ld                       | 167 ++++++++++++++++++
 hw/bsp/ch583/system_ch583.c                        |  39 +++++
 hw/bsp/ch583/system_ch583.h                        |  43 +++++
 hw/bsp/ch583/wch-riscv.cfg                         |  17 ++
 hw/bsp/ch58x/boards/ch582m_evt/board.cmake         |   5 -
 hw/bsp/ch58x/boards/ch582m_evt/board.h             |  61 -------
 hw/bsp/ch58x/boards/ch582m_evt/board.mk            |   3 -
 hw/bsp/ch58x/boards/yd-ch582m/board.cmake          |   5 -
 hw/bsp/ch58x/boards/yd-ch582m/board.h              |  61 -------
 hw/bsp/ch58x/boards/yd-ch582m/board.mk             |   3 -
 hw/bsp/ch58x/ch58x_it.c                            |  37 ----
 hw/bsp/ch58x/ch58x_it.h                            |  46 -----
 hw/bsp/ch58x/debug_uart.c                          |  86 ---------
 hw/bsp/ch58x/debug_uart.h                          |  44 -----
 hw/bsp/ch58x/family.c                              | 194 ---------------------
 hw/bsp/ch58x/family.cmake                          | 108 ------------
 hw/bsp/ch58x/family.mk                             |  59 -------
 hw/bsp/ch58x/linker/ch582.ld                       | 167 ------------------
 hw/bsp/ch58x/system_ch58x.c                        |  39 -----
 hw/bsp/ch58x/system_ch58x.h                        |  43 -----
 hw/bsp/ch58x/wch-riscv.cfg                         |  17 --
 src/common/tusb_mcu.h                              |   2 +-
 src/portable/wch/ch32_usbfs_reg.h                  |   2 +-
 src/portable/wch/dcd_ch32_usbfs.c                  |  16 +-
 src/tusb_option.h                                  |   2 +-
 tools/get_deps.py                                  |   2 +-
 61 files changed, 1012 insertions(+), 1005 deletions(-)
 create mode 100644 examples/device/dfu_runtime/skip.txt
 create mode 100644 examples/device/hid_boot_interface/skip.txt
 create mode 100644 examples/device/hid_composite/skip.txt
 create mode 100644 examples/device/hid_generic_inout/skip.txt
 create mode 100644 examples/device/hid_multiple_interface/skip.txt
 create mode 100644 examples/device/midi_test/skip.txt
 create mode 100644 examples/device/webusb_serial/skip.txt
 create mode 100644 hw/bsp/ch583/boards/ch582m_evt/board.cmake
 create mode 100644 hw/bsp/ch583/boards/ch582m_evt/board.h
 create mode 100644 hw/bsp/ch583/boards/ch582m_evt/board.mk
 create mode 100644 hw/bsp/ch583/boards/yd-ch582m/board.cmake
 create mode 100644 hw/bsp/ch583/boards/yd-ch582m/board.h
 create mode 100644 hw/bsp/ch583/boards/yd-ch582m/board.mk
 create mode 100644 hw/bsp/ch583/ch583_it.c
 create mode 100644 hw/bsp/ch583/ch583_it.h
 create mode 100644 hw/bsp/ch583/debug_uart.c
 create mode 100644 hw/bsp/ch583/debug_uart.h
 create mode 100644 hw/bsp/ch583/family.c
 create mode 100644 hw/bsp/ch583/family.cmake
 create mode 100644 hw/bsp/ch583/family.mk
 create mode 100644 hw/bsp/ch583/linker/ch582.ld
 create mode 100644 hw/bsp/ch583/system_ch583.c
 create mode 100644 hw/bsp/ch583/system_ch583.h
 create mode 100644 hw/bsp/ch583/wch-riscv.cfg
 delete mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.cmake
 delete mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.h
 delete mode 100644 hw/bsp/ch58x/boards/ch582m_evt/board.mk
 delete mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.cmake
 delete mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.h
 delete mode 100644 hw/bsp/ch58x/boards/yd-ch582m/board.mk
 delete mode 100644 hw/bsp/ch58x/ch58x_it.c
 delete mode 100644 hw/bsp/ch58x/ch58x_it.h
 delete mode 100644 hw/bsp/ch58x/debug_uart.c
 delete mode 100644 hw/bsp/ch58x/debug_uart.h
 delete mode 100644 hw/bsp/ch58x/family.c
 delete mode 100644 hw/bsp/ch58x/family.cmake
 delete mode 100644 hw/bsp/ch58x/family.mk
 delete mode 100644 hw/bsp/ch58x/linker/ch582.ld
 delete mode 100644 hw/bsp/ch58x/system_ch58x.c
 delete mode 100644 hw/bsp/ch58x/system_ch58x.h
 delete mode 100644 hw/bsp/ch58x/wch-riscv.cfg

(limited to 'hw')

diff --git a/.github/workflows/ci_set_matrix.py b/.github/workflows/ci_set_matrix.py
index 400f319d3..dc0d3871f 100755
--- a/.github/workflows/ci_set_matrix.py
+++ b/.github/workflows/ci_set_matrix.py
@@ -30,7 +30,7 @@ family_list = {
     "ch32v10x": ["riscv-gcc"],
     "ch32v20x": ["riscv-gcc"],
     "ch32v30x": ["riscv-gcc"],
-    "ch58x": ["riscv-gcc"],
+    "ch583": ["riscv-gcc"],
     "da1469x": ["arm-gcc"],
     "fomu": ["riscv-gcc"],
     "ft9xx": ["ft9xx-gcc"],
diff --git a/docs/reference/boards.rst b/docs/reference/boards.rst
index 7ea9c228b..8a83496a4 100644
--- a/docs/reference/boards.rst
+++ b/docs/reference/boards.rst
@@ -370,5 +370,5 @@ ch32v203g_r0_1v0  CH32V203G-R0-1v0  ch32v20x  https://github.com/openwch/ch32v20
 nanoch32v203      nanoCH32V203      ch32v20x  https://github.com/wuxx/nanoCH32V203
 ch32v307v_r1_1v0  CH32V307V-R1-1v0  ch32v30x  https://github.com/openwch/ch32v307/tree/main/SCHPCB/CH32V307V-R1-1v0
 nanoch32v305      nanoCH32V305      ch32v30x  https://github.com/wuxx/nanoCH32V305
-yd-ch582m         yd-ch582m         ch58x     http://vcc-gnd.com
+yd-ch582m         yd-ch582m         ch583     http://vcc-gnd.com
 ================  ================  ========  =====================================================================  ======
diff --git a/examples/device/audio_4_channel_mic/skip.txt b/examples/device/audio_4_channel_mic/skip.txt
index 8c64832f7..3ca433c08 100644
--- a/examples/device/audio_4_channel_mic/skip.txt
+++ b/examples/device/audio_4_channel_mic/skip.txt
@@ -3,4 +3,4 @@ mcu:SAME5X
 mcu:SAMG
 family:broadcom_64bit
 family:espressif
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/audio_4_channel_mic_freertos/skip.txt b/examples/device/audio_4_channel_mic_freertos/skip.txt
index dae0a5428..1fd6b4b8a 100644
--- a/examples/device/audio_4_channel_mic_freertos/skip.txt
+++ b/examples/device/audio_4_channel_mic_freertos/skip.txt
@@ -2,7 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/audio_test/skip.txt b/examples/device/audio_test/skip.txt
index 6e3082a54..42394bb11 100644
--- a/examples/device/audio_test/skip.txt
+++ b/examples/device/audio_test/skip.txt
@@ -2,4 +2,4 @@ mcu:SAMD11
 mcu:SAME5X
 mcu:SAMG
 family:espressif
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/audio_test_freertos/skip.txt b/examples/device/audio_test_freertos/skip.txt
index 20deaca28..660bacd25 100644
--- a/examples/device/audio_test_freertos/skip.txt
+++ b/examples/device/audio_test_freertos/skip.txt
@@ -2,7 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/audio_test_multi_rate/skip.txt b/examples/device/audio_test_multi_rate/skip.txt
index 6e3082a54..42394bb11 100644
--- a/examples/device/audio_test_multi_rate/skip.txt
+++ b/examples/device/audio_test_multi_rate/skip.txt
@@ -2,4 +2,4 @@ mcu:SAMD11
 mcu:SAME5X
 mcu:SAMG
 family:espressif
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/cdc_msc_freertos/skip.txt b/examples/device/cdc_msc_freertos/skip.txt
index 197060eeb..48781de84 100644
--- a/examples/device/cdc_msc_freertos/skip.txt
+++ b/examples/device/cdc_msc_freertos/skip.txt
@@ -2,7 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/cdc_uac2/skip.txt b/examples/device/cdc_uac2/skip.txt
index 4222d08c6..db1d5b80b 100644
--- a/examples/device/cdc_uac2/skip.txt
+++ b/examples/device/cdc_uac2/skip.txt
@@ -6,4 +6,4 @@ mcu:SAME5X
 mcu:SAMG
 board:stm32l052dap52
 family:espressif
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/dfu_runtime/skip.txt b/examples/device/dfu_runtime/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/dfu_runtime/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/hid_boot_interface/skip.txt b/examples/device/hid_boot_interface/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/hid_boot_interface/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/hid_composite/skip.txt b/examples/device/hid_composite/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/hid_composite/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/hid_composite_freertos/skip.txt b/examples/device/hid_composite_freertos/skip.txt
index fccddabcd..97d8e168b 100644
--- a/examples/device/hid_composite_freertos/skip.txt
+++ b/examples/device/hid_composite_freertos/skip.txt
@@ -2,7 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/hid_generic_inout/skip.txt b/examples/device/hid_generic_inout/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/hid_generic_inout/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/hid_multiple_interface/skip.txt b/examples/device/hid_multiple_interface/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/hid_multiple_interface/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/midi_test/skip.txt b/examples/device/midi_test/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/midi_test/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/examples/device/midi_test_freertos/skip.txt b/examples/device/midi_test_freertos/skip.txt
index fccddabcd..97d8e168b 100644
--- a/examples/device/midi_test_freertos/skip.txt
+++ b/examples/device/midi_test_freertos/skip.txt
@@ -2,7 +2,7 @@ mcu:CH32F20X
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:CXD56
 mcu:F1C100S
 mcu:GD32VF103
diff --git a/examples/device/uac2_headset/skip.txt b/examples/device/uac2_headset/skip.txt
index 4222d08c6..db1d5b80b 100644
--- a/examples/device/uac2_headset/skip.txt
+++ b/examples/device/uac2_headset/skip.txt
@@ -6,4 +6,4 @@ mcu:SAME5X
 mcu:SAMG
 board:stm32l052dap52
 family:espressif
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/uac2_speaker_fb/skip.txt b/examples/device/uac2_speaker_fb/skip.txt
index 48a484f96..0c7339c65 100644
--- a/examples/device/uac2_speaker_fb/skip.txt
+++ b/examples/device/uac2_speaker_fb/skip.txt
@@ -6,4 +6,4 @@ mcu:SAME5X
 mcu:SAMG
 board:stm32l052dap52
 family:broadcom_64bit
-mcu:CH58X
+mcu:CH583
diff --git a/examples/device/video_capture/skip.txt b/examples/device/video_capture/skip.txt
index 7f000d472..5a7a1d00e 100644
--- a/examples/device/video_capture/skip.txt
+++ b/examples/device/video_capture/skip.txt
@@ -1,6 +1,6 @@
 mcu:CH32V103
 mcu:CH32V20X
-mcu:CH58X
+mcu:CH583
 mcu:MSP430x5xx
 mcu:NUC121
 mcu:SAMD11
diff --git a/examples/device/video_capture_2ch/skip.txt b/examples/device/video_capture_2ch/skip.txt
index 191edeb39..c37205b8c 100644
--- a/examples/device/video_capture_2ch/skip.txt
+++ b/examples/device/video_capture_2ch/skip.txt
@@ -5,7 +5,7 @@ mcu:GD32VF103
 mcu:CH32V103
 mcu:CH32V20X
 mcu:CH32V307
-mcu:CH58X
+mcu:CH583
 mcu:STM32L0
 family:espressif
 board:curiosity_nano
diff --git a/examples/device/webusb_serial/skip.txt b/examples/device/webusb_serial/skip.txt
new file mode 100644
index 000000000..2c6c2a64c
--- /dev/null
+++ b/examples/device/webusb_serial/skip.txt
@@ -0,0 +1 @@
+family:espressif
diff --git a/hw/bsp/ch583/boards/ch582m_evt/board.cmake b/hw/bsp/ch583/boards/ch582m_evt/board.cmake
new file mode 100644
index 000000000..4129c4550
--- /dev/null
+++ b/hw/bsp/ch583/boards/ch582m_evt/board.cmake
@@ -0,0 +1,5 @@
+set(LD_FLASH_SIZE 448K)
+set(LD_RAM_SIZE 32K)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/ch583/boards/ch582m_evt/board.h b/hw/bsp/ch583/boards/ch582m_evt/board.h
new file mode 100644
index 000000000..c3483bf17
--- /dev/null
+++ b/hw/bsp/ch583/boards/ch582m_evt/board.h
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* metadata:
+   name: CH582M-EVT evaluation board
+   url: https://www.wch-ic.com/products/CH582.html
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED: PB4 on CH582M-EVT
+#define LED_PIN               GPIO_Pin_4
+#define LED_STATE_ON          0
+
+// Directly reuse BOOT pin as user button
+#define BUTTON_PIN            GPIO_Pin_22
+#define BUTTON_STATE_ACTIVE   0
+
+// UART: UART1 TX=PA9, RX=PA8
+#define CFG_BOARD_UART_BAUDRATE   115200
+
+// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
+// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT  0
+#endif
+// #ifndef BOARD_TUH_RHPORT
+// #define BOARD_TUH_RHPORT  1
+// #endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch583/boards/ch582m_evt/board.mk b/hw/bsp/ch583/boards/ch582m_evt/board.mk
new file mode 100644
index 000000000..a13979799
--- /dev/null
+++ b/hw/bsp/ch583/boards/ch582m_evt/board.mk
@@ -0,0 +1,3 @@
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=448K \
+  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch583/boards/yd-ch582m/board.cmake b/hw/bsp/ch583/boards/yd-ch582m/board.cmake
new file mode 100644
index 000000000..4129c4550
--- /dev/null
+++ b/hw/bsp/ch583/boards/yd-ch582m/board.cmake
@@ -0,0 +1,5 @@
+set(LD_FLASH_SIZE 448K)
+set(LD_RAM_SIZE 32K)
+
+function(update_board TARGET)
+endfunction()
diff --git a/hw/bsp/ch583/boards/yd-ch582m/board.h b/hw/bsp/ch583/boards/yd-ch582m/board.h
new file mode 100644
index 000000000..0da5747bc
--- /dev/null
+++ b/hw/bsp/ch583/boards/yd-ch582m/board.h
@@ -0,0 +1,61 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ */
+
+/* metadata:
+   name: yd-ch582m from vcc-gnd studio
+   url: http://vcc-gnd.com/
+*/
+
+#ifndef BOARD_H_
+#define BOARD_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+// LED: PB4 on yd-ch582m board
+#define LED_PIN               GPIO_Pin_4
+#define LED_STATE_ON          0
+
+// Directly reuse BOOT pin as user button
+#define BUTTON_PIN            GPIO_Pin_22
+#define BUTTON_STATE_ACTIVE   0
+
+// UART: UART1 TX=PA9, RX=PA8
+#define CFG_BOARD_UART_BAUDRATE   115200
+
+// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
+// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
+#ifndef BOARD_TUD_RHPORT
+#define BOARD_TUD_RHPORT  0
+#endif
+// #ifndef BOARD_TUH_RHPORT
+// #define BOARD_TUH_RHPORT  1
+// #endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/hw/bsp/ch583/boards/yd-ch582m/board.mk b/hw/bsp/ch583/boards/yd-ch582m/board.mk
new file mode 100644
index 000000000..a13979799
--- /dev/null
+++ b/hw/bsp/ch583/boards/yd-ch582m/board.mk
@@ -0,0 +1,3 @@
+LDFLAGS += \
+  -Wl,--defsym=__FLASH_SIZE=448K \
+  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch583/ch583_it.c b/hw/bsp/ch583/ch583_it.c
new file mode 100644
index 000000000..8479c537a
--- /dev/null
+++ b/hw/bsp/ch583/ch583_it.c
@@ -0,0 +1,37 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "ch583_it.h"
+
+// NMI exception handler
+__INTERRUPT __HIGH_CODE void NMI_Handler(void) {
+  while (1) {}
+}
+
+// Hard Fault exception handler
+__INTERRUPT __HIGH_CODE void HardFault_Handler(void) {
+  while (1) {}
+}
diff --git a/hw/bsp/ch583/ch583_it.h b/hw/bsp/ch583/ch583_it.h
new file mode 100644
index 000000000..29d175403
--- /dev/null
+++ b/hw/bsp/ch583/ch583_it.h
@@ -0,0 +1,46 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef CH583_IT_H_
+#define CH583_IT_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "CH58x_common.h"
+
+void NMI_Handler(void);
+void HardFault_Handler(void);
+void USB_IRQHandler(void);
+// void USB2_IRQHandler(void); // host on USB2 (rhport 1) — re-add together with the host driver
+void SysTick_Handler(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* CH583_IT_H_ */
diff --git a/hw/bsp/ch583/debug_uart.c b/hw/bsp/ch583/debug_uart.c
new file mode 100644
index 000000000..850e40718
--- /dev/null
+++ b/hw/bsp/ch583/debug_uart.c
@@ -0,0 +1,86 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "debug_uart.h"
+#include "CH58x_common.h"
+
+//--------------------------------------------------------------------+
+// Ring buffer based UART TX for non-blocking writes
+//--------------------------------------------------------------------+
+
+#define UART_RINGBUFFER_SIZE_TX  128
+#define UART_RINGBUFFER_MASK_TX  (UART_RINGBUFFER_SIZE_TX - 1)
+
+static char tx_buf[UART_RINGBUFFER_SIZE_TX];
+static uint32_t tx_produce;
+static volatile uint32_t tx_consume;
+
+void uart_write(char c) {
+  uint32_t tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
+
+  // If the ring buffer is full, drain it here as the FIFO frees up: nothing else advances
+  // tx_consume between uart_write() calls, so a plain spin would deadlock on a >buffer-size burst.
+  while (tx_produce_next == tx_consume) {
+    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
+      R8_UART1_THR = tx_buf[tx_consume];
+      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
+    }
+  }
+
+  // If UART TX FIFO is empty and no pending data, send directly
+  if ((tx_consume == tx_produce) && (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP)) {
+    R8_UART1_THR = c;
+  } else {
+    tx_buf[tx_produce] = c;
+    tx_produce = tx_produce_next;
+  }
+}
+
+void uart_sync(void) {
+  // Wait for ring buffer to drain
+  while (tx_consume != tx_produce) {
+    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
+      R8_UART1_THR = tx_buf[tx_consume];
+      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
+    }
+  }
+  // Wait for last byte to finish transmitting
+  while (!(R8_UART1_LSR & RB_LSR_TX_ALL_EMP)) {}
+}
+
+void usart_printf_init(uint32_t baudrate) {
+  tx_produce = 0;
+  tx_consume = 0;
+
+  // Configure UART1 pins: TX=PA9, RX=PA8
+  GPIOA_SetBits(GPIO_Pin_9);
+  GPIOA_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP_5mA);
+  GPIOA_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_PU);
+
+  // Init UART1 with specified baud rate
+  UART1_DefInit();
+  UART1_BaudRateCfg(baudrate);
+}
diff --git a/hw/bsp/ch583/debug_uart.h b/hw/bsp/ch583/debug_uart.h
new file mode 100644
index 000000000..44c3e7948
--- /dev/null
+++ b/hw/bsp/ch583/debug_uart.h
@@ -0,0 +1,44 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef DEBUG_UART_H_
+#define DEBUG_UART_H_
+
+#include <stdint.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+void uart_write(char c);
+void uart_sync(void);
+void usart_printf_init(uint32_t baudrate);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* DEBUG_UART_H_ */
diff --git a/hw/bsp/ch583/family.c b/hw/bsp/ch583/family.c
new file mode 100644
index 000000000..716e2b76b
--- /dev/null
+++ b/hw/bsp/ch583/family.c
@@ -0,0 +1,194 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+/* metadata:
+   manufacturer: WCH
+*/
+
+// WCH SDK's DEBUG macro enables a _write() that conflicts with TinyUSB's.
+// TinyUSB uses UART1 for printf via debug_uart.c, so DEBUG is not needed.
+// If you need a different UART or want to keep SDK's DEBUG, modify
+// debug_uart.c (TinyUSB side) or CH58x_sys.c (SDK side) to remove one _write().
+// If done, remove this #error to continue.
+#ifdef DEBUG
+  #error "Remove the DEBUG macro from preprocessor defines to avoid "  \
+         "duplicate _write() between WCH SDK and TinyUSB. "            \
+         "TinyUSB uses UART1 by default (see debug_uart.c)."
+#endif
+
+#include "debug_uart.h"
+#include "CH58x_common.h"
+#include "ch583_it.h"
+
+#include "bsp/board_api.h"
+#include "board.h"
+
+//--------------------------------------------------------------------+
+// Forward USB interrupt events to TinyUSB IRQ Handler
+//--------------------------------------------------------------------+
+
+// Device only: the shared dcd_ch32_usbfs.c drives USB0 (rhport 0). CH58x's second controller
+// (USB2 / rhport 1) was driven by the now-removed ch58x host driver; its handler is kept
+// commented out below to ease re-adding host support.
+__INTERRUPT __HIGH_CODE void USB_IRQHandler(void) {
+  tusb_int_handler(0, true);
+}
+
+// __INTERRUPT __HIGH_CODE void USB2_IRQHandler(void) {
+//   tusb_int_handler(1, true);
+// }
+
+//--------------------------------------------------------------------+
+// SysTick
+//--------------------------------------------------------------------+
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+volatile uint32_t system_ticks = 0;
+
+__INTERRUPT __HIGH_CODE void SysTick_Handler(void) {
+  SysTick->SR = 0;
+  system_ticks++;
+}
+
+uint32_t tusb_time_millis_api(void) {
+  return system_ticks;
+}
+#endif
+
+//--------------------------------------------------------------------+
+// Board Init
+//--------------------------------------------------------------------+
+
+void board_init(void) {
+  // Disable interrupts during init
+  PFIC_DisableAllIRQ();
+
+  // Set system clock to PLL 60MHz (default for CH582)
+  SetSysClock(CLK_SOURCE_PLL_60MHz);
+
+#if CFG_TUSB_OS == OPT_OS_NONE
+  SysTick_Config(GetSysClock() / 1000);
+#endif
+
+  // UART1 init for debug output
+#ifdef CFG_BOARD_UART_BAUDRATE
+  usart_printf_init(CFG_BOARD_UART_BAUDRATE);
+#endif
+
+  // LED
+#ifdef LED_PORT_IS_A
+  GPIOA_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
+#else
+  GPIOB_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
+#endif
+
+  // Button
+#ifdef BUTTON_PIN
+  #ifdef BUTTON_PORT_IS_A
+    GPIOA_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
+  #else
+    GPIOB_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
+  #endif
+#endif
+
+  // Device only on USB0 (rhport 0): enable analog function for USB1 D+/D- and assert its D+
+  // pull-up. The shared dcd_ch32_usbfs.c drives USB0; CH58x host / USB2 (rhport 1) is unsupported
+  // here — to re-add host, also OR in RB_PIN_USB2_IE below.
+  R16_PIN_ANALOG_IE |= RB_PIN_USB_IE; // | RB_PIN_USB2_IE  (re-add for host on USB2)
+#if CFG_TUD_ENABLED
+  R16_PIN_ANALOG_IE |= RB_PIN_USB_DP_PU;
+#endif
+
+  // Keep USB clock active during sleep
+  R8_SLP_CLK_OFF1 &= ~RB_SLP_CLK_USB;
+
+  // Enable interrupts globally
+  PFIC_EnableAllIRQ();
+
+  board_delay(2);
+}
+
+//--------------------------------------------------------------------+
+// Board porting API
+//--------------------------------------------------------------------+
+
+void board_led_write(bool state) {
+#ifdef LED_PORT_IS_A
+  if (state ^ LED_STATE_ON) {
+    GPIOA_ResetBits(LED_PIN);
+  } else {
+    GPIOA_SetBits(LED_PIN);
+  }
+#else
+  if (state ^ LED_STATE_ON) {
+    GPIOB_ResetBits(LED_PIN);
+  } else {
+    GPIOB_SetBits(LED_PIN);
+  }
+#endif
+}
+
+uint32_t board_button_read(void) {
+#ifdef BUTTON_PIN
+  #ifdef BUTTON_PORT_IS_A
+    return BUTTON_STATE_ACTIVE == (GPIOA_ReadPortPin(BUTTON_PIN) ? 1 : 0);
+  #else
+    return BUTTON_STATE_ACTIVE == (GPIOB_ReadPortPin(BUTTON_PIN) ? 1 : 0);
+  #endif
+#else
+  return 0;
+#endif
+}
+
+// CH58x has no memory-mapped unique-ID register (unlike ch32v10x/v20x at 0x1FFFF7E8), but the
+// factory programs a unique 6-byte MAC address into FlashROM (it is a BLE part). GetMACAddress()
+// reads it via the ISP ROM command FLASH_EEPROM_CMD, which is provided by libISP583.a.
+size_t board_get_unique_id(uint8_t id[], size_t max_len) {
+  // FLASH_EEPROM_CMD writes word-granular and requires a 4-byte-aligned buffer (CH58x_flash.c);
+  // size 8 matches the SDK's GET_UNIQUE_ID buffer (6 MAC bytes + 2 it pads), so the read can't
+  // run past the end whether it returns 6 or a full 8.
+  TU_ATTR_ALIGNED(4) uint8_t mac[8];
+  GetMACAddress(mac);
+  size_t len = TU_MIN(max_len, (size_t) 6); // the 6-byte MAC is the unique part
+  memcpy(id, mac, len);
+  return len;
+}
+
+int board_uart_read(uint8_t* buf, int len) {
+  (void) buf;
+  (void) len;
+  return 0;
+}
+
+int board_uart_write(void const* buf, int len) {
+  int txsize = len;
+  const char* bufc = (const char*) buf;
+  while (txsize--) {
+    uart_write(*bufc++);
+  }
+  uart_sync();
+  return len;
+}
diff --git a/hw/bsp/ch583/family.cmake b/hw/bsp/ch583/family.cmake
new file mode 100644
index 000000000..a379298e5
--- /dev/null
+++ b/hw/bsp/ch583/family.cmake
@@ -0,0 +1,108 @@
+include_guard()
+
+set(SDK_DIR ${TOP}/hw/mcu/wch/ch583)
+set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
+
+# include board specific
+include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
+
+# toolchain set up
+set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor")
+set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
+
+set(FAMILY_MCUS CH583 CACHE INTERNAL "")
+set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
+
+#------------------------------------
+# Startup & Linker script
+#------------------------------------
+if (NOT DEFINED LD_FILE_GNU)
+  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/ch582.ld)
+endif ()
+set(LD_FILE_Clang ${LD_FILE_GNU})
+if (NOT DEFINED STARTUP_FILE_GNU)
+  set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_CH583.S)
+endif ()
+set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
+
+#------------------------------------
+# Board Target
+#------------------------------------
+function(family_add_board BOARD_TARGET)
+  add_library(${BOARD_TARGET} STATIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_gpio.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_clk.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_uart1.c
+    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_sys.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/ch583_it.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_ch583.c
+    )
+  target_include_directories(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/RVMSIS
+    ${SDK_SRC_DIR}/StdPeriphDriver/inc
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    )
+  target_link_libraries(${BOARD_TARGET} PUBLIC
+    ${SDK_SRC_DIR}/StdPeriphDriver/libISP583.a
+    )
+  target_compile_definitions(${BOARD_TARGET} PUBLIC
+    CFG_TUD_WCH_USBIP_USBFS=1
+    FREQ_SYS=60000000
+    DISK_LIB_ENABLE=0
+    INT_SOFT
+    )
+
+  update_board(${BOARD_TARGET})
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_compile_options(${BOARD_TARGET} PUBLIC
+      -flto
+      -msmall-data-limit=16
+      -mno-save-restore
+      -fmessage-length=0
+      -fsigned-char
+      -Wno-error=strict-prototypes
+      )
+  endif ()
+endfunction()
+
+#------------------------------------
+# Functions
+#------------------------------------
+function(family_configure_example TARGET RTOS)
+  family_configure_common(${TARGET} ${RTOS})
+  family_add_tinyusb(${TARGET} OPT_MCU_CH583)
+
+  target_sources(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
+    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
+    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
+    )
+  target_include_directories(${TARGET} PUBLIC
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
+    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
+    )
+
+  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
+    target_link_options(${TARGET} PUBLIC
+      -nostartfiles
+      --specs=nosys.specs --specs=nano.specs
+      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
+      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
+      "LINKER:--script=${LD_FILE_GNU}"
+      )
+  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
+    message(FATAL_ERROR "Clang is not supported for CH58x")
+  endif ()
+
+  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
+    SKIP_LINTING ON
+    COMPILE_OPTIONS -w)
+
+  # Flashing
+  family_add_bin_hex(${TARGET})
+  family_flash_openocd_wch(${TARGET})
+endfunction()
diff --git a/hw/bsp/ch583/family.mk b/hw/bsp/ch583/family.mk
new file mode 100644
index 000000000..98d0f9337
--- /dev/null
+++ b/hw/bsp/ch583/family.mk
@@ -0,0 +1,59 @@
+# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
+#CROSS_COMPILE ?= riscv32-unknown-elf-
+
+# Toolchain from https://nucleisys.com/download.php
+#CROSS_COMPILE ?= riscv-nuclei-elf-
+
+# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
+CROSS_COMPILE ?= riscv-none-elf-
+
+SDK_DIR = hw/mcu/wch/ch583
+SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
+
+include $(TOP)/$(BOARD_PATH)/board.mk
+CPU_CORE ?= rv32imac-ilp32
+
+CFLAGS += \
+	-flto \
+	-msmall-data-limit=16 \
+	-mno-save-restore \
+	-fmessage-length=0 \
+	-fsigned-char \
+	-DCFG_TUSB_MCU=OPT_MCU_CH583 \
+	-DCFG_TUD_WCH_USBIP_USBFS=1 \
+	-DFREQ_SYS=60000000 \
+	-DDISK_LIB_ENABLE=0 \
+	-DINT_SOFT \
+	-Wno-error=strict-prototypes
+
+LDFLAGS += \
+	-nostartfiles \
+	--specs=nosys.specs --specs=nano.specs
+
+LIBS += $(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/libISP583.a
+
+SRC_C += \
+	src/portable/wch/dcd_ch32_usbfs.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_gpio.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_clk.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_uart1.c \
+	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_sys.c \
+	$(FAMILY_PATH)/debug_uart.c \
+	$(FAMILY_PATH)/ch583_it.c \
+	$(FAMILY_PATH)/system_ch583.c
+
+SRC_S += \
+	$(SDK_SRC_DIR)/Startup/startup_CH583.S
+
+INC += \
+	$(TOP)/$(BOARD_PATH) \
+	$(TOP)/$(SDK_SRC_DIR)/RVMSIS \
+	$(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/inc
+
+LD_FILE ?= $(FAMILY_PATH)/linker/ch582.ld
+
+OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
+flash: flash-openocd-wch
+
+# For freeRTOS port source
+FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
diff --git a/hw/bsp/ch583/linker/ch582.ld b/hw/bsp/ch583/linker/ch582.ld
new file mode 100644
index 000000000..821998a49
--- /dev/null
+++ b/hw/bsp/ch583/linker/ch582.ld
@@ -0,0 +1,167 @@
+/* CH582 Linker Script for TinyUSB
+ * Based on WCH CH583 SDK Link.ld
+ * Supports parameterized flash/ram sizes via --defsym
+ */
+
+/* Default sizes if not provided via --defsym */
+__flash_size = DEFINED(__FLASH_SIZE) ? __FLASH_SIZE : 448K;
+__ram_size = DEFINED(__RAM_SIZE) ? __RAM_SIZE : 32K;
+__stack_size = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 2048;
+
+ENTRY( _start )
+
+PROVIDE( _stack_size = __stack_size );
+
+MEMORY
+{
+  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = __flash_size
+  RAM   (xrw) : ORIGIN = 0x20000000, LENGTH = __ram_size
+}
+
+SECTIONS
+{
+  .init :
+  {
+    _sinit = .;
+    . = ALIGN(4);
+    KEEP(*(SORT_NONE(.init)))
+    . = ALIGN(4);
+    _einit = .;
+  } >FLASH AT>FLASH
+
+  .highcodelalign :
+  {
+    . = ALIGN(4);
+    PROVIDE(_highcode_lma = .);
+  } >FLASH AT>FLASH
+
+  .highcode :
+  {
+    . = ALIGN(4);
+    PROVIDE(_highcode_vma_start = .);
+    *(.vector);
+    KEEP(*(SORT_NONE(.vector_handler)))
+    *(.highcode);
+    *(.highcode.*);
+    . = ALIGN(4);
+    PROVIDE(_highcode_vma_end = .);
+  } >RAM AT>FLASH
+
+  .text :
+  {
+    . = ALIGN(4);
+    KEEP(*(SORT_NONE(.handle_reset)))
+    *(.text)
+    *(.text.*)
+    *(.rodata)
+    *(.rodata*)
+    *(.sdata2.*)
+    *(.glue_7)
+    *(.glue_7t)
+    *(.gnu.linkonce.t.*)
+    . = ALIGN(4);
+  } >FLASH AT>FLASH
+
+  .fini :
+  {
+    KEEP(*(SORT_NONE(.fini)))
+    . = ALIGN(4);
+  } >FLASH AT>FLASH
+
+  PROVIDE( _etext = . );
+  PROVIDE( _eitcm = . );
+
+  .preinit_array :
+  {
+    PROVIDE_HIDDEN (__preinit_array_start = .);
+    KEEP (*(.preinit_array))
+    PROVIDE_HIDDEN (__preinit_array_end = .);
+  } >FLASH AT>FLASH
+
+  .init_array :
+  {
+    PROVIDE_HIDDEN (__init_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
+    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
+    PROVIDE_HIDDEN (__init_array_end = .);
+  } >FLASH AT>FLASH
+
+  .fini_array :
+  {
+    PROVIDE_HIDDEN (__fini_array_start = .);
+    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
+    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
+    PROVIDE_HIDDEN (__fini_array_end = .);
+  } >FLASH AT>FLASH
+
+  .ctors :
+  {
+    KEEP (*crtbegin.o(.ctors))
+    KEEP (*crtbegin?.o(.ctors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
+    KEEP (*(SORT(.ctors.*)))
+    KEEP (*(.ctors))
+  } >FLASH AT>FLASH
+
+  .dtors :
+  {
+    KEEP (*crtbegin.o(.dtors))
+    KEEP (*crtbegin?.o(.dtors))
+    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
+    KEEP (*(SORT(.dtors.*)))
+    KEEP (*(.dtors))
+  } >FLASH AT>FLASH
+
+  .dlalign :
+  {
+    . = ALIGN(4);
+    PROVIDE(_data_lma = .);
+  } >FLASH AT>FLASH
+
+  .data :
+  {
+    . = ALIGN(4);
+    PROVIDE(_data_vma = .);
+    *(.gnu.linkonce.r.*)
+    *(.data .data.*)
+    *(.gnu.linkonce.d.*)
+    . = ALIGN(8);
+    PROVIDE( __global_pointer$ = . + 0x800 );
+    *(.sdata .sdata.*)
+    *(.gnu.linkonce.s.*)
+    . = ALIGN(8);
+    *(.srodata.cst16)
+    *(.srodata.cst8)
+    *(.srodata.cst4)
+    *(.srodata.cst2)
+    *(.srodata .srodata.*)
+    . = ALIGN(4);
+    PROVIDE( _edata = .);
+  } >RAM AT>FLASH
+
+  .bss :
+  {
+    . = ALIGN(4);
+    PROVIDE( _sbss = .);
+    *(.sbss*)
+    *(.gnu.linkonce.sb.*)
+    *(.bss*)
+    *(.gnu.linkonce.b.*)
+    *(COMMON*)
+    . = ALIGN(4);
+    PROVIDE( _ebss = .);
+  } >RAM AT>FLASH
+
+  PROVIDE( _end = _ebss);
+  PROVIDE( end = . );
+
+  .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
+  {
+    PROVIDE( _heap_end = . );
+    . = ALIGN(4);
+    PROVIDE(_susrstack = . );
+    . = . + __stack_size;
+    PROVIDE( _eusrstack = .);
+    __freertos_irq_stack_top = .;
+  } >RAM
+}
diff --git a/hw/bsp/ch583/system_ch583.c b/hw/bsp/ch583/system_ch583.c
new file mode 100644
index 000000000..d3724f0ce
--- /dev/null
+++ b/hw/bsp/ch583/system_ch583.c
@@ -0,0 +1,39 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#include "CH58x_common.h"
+#include "system_ch583.h"
+
+uint32_t SystemCoreClock = FREQ_SYS;
+
+void SystemInit(void) {
+  SetSysClock(CLK_SOURCE_PLL_60MHz);
+  SystemCoreClock = GetSysClock();
+}
+
+void SystemCoreClockUpdate(void) {
+  SystemCoreClock = GetSysClock();
+}
diff --git a/hw/bsp/ch583/system_ch583.h b/hw/bsp/ch583/system_ch583.h
new file mode 100644
index 000000000..c174c9f5e
--- /dev/null
+++ b/hw/bsp/ch583/system_ch583.h
@@ -0,0 +1,43 @@
+/*
+ * The MIT License (MIT)
+ *
+ * Copyright (c) 2024 TinyUSB contributors
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a copy
+ * of this software and associated documentation files (the "Software"), to deal
+ * in the Software without restriction, including without limitation the rights
+ * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
+ * copies of the Software, and to permit persons to whom the Software is
+ * furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
+ * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
+ * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
+ * THE SOFTWARE.
+ *
+ * This file is part of the TinyUSB stack.
+ */
+
+#ifndef SYSTEM_CH583_H_
+#define SYSTEM_CH583_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern uint32_t SystemCoreClock;  // System Clock Frequency (Core Clock)
+
+extern void SystemInit(void);
+extern void SystemCoreClockUpdate(void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* SYSTEM_CH583_H_ */
diff --git a/hw/bsp/ch583/wch-riscv.cfg b/hw/bsp/ch583/wch-riscv.cfg
new file mode 100644
index 000000000..64d595d8e
--- /dev/null
+++ b/hw/bsp/ch583/wch-riscv.cfg
@@ -0,0 +1,17 @@
+adapter driver wlinke
+adapter speed 6000
+transport select sdi
+
+wlink_set_address 0x00000000
+set _CHIPNAME wch_riscv
+sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
+
+set _TARGETNAME $_CHIPNAME.cpu
+
+target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
+$_TARGETNAME.0 configure  -work-area-phys 0x20000000 -work-area-size 0x8000 -work-area-backup 1
+set _FLASHNAME $_CHIPNAME.flash
+
+flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
+
+echo "Ready for Remote Connections"
diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.cmake b/hw/bsp/ch58x/boards/ch582m_evt/board.cmake
deleted file mode 100644
index 4129c4550..000000000
--- a/hw/bsp/ch58x/boards/ch582m_evt/board.cmake
+++ /dev/null
@@ -1,5 +0,0 @@
-set(LD_FLASH_SIZE 448K)
-set(LD_RAM_SIZE 32K)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.h b/hw/bsp/ch58x/boards/ch582m_evt/board.h
deleted file mode 100644
index c3483bf17..000000000
--- a/hw/bsp/ch58x/boards/ch582m_evt/board.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-/* metadata:
-   name: CH582M-EVT evaluation board
-   url: https://www.wch-ic.com/products/CH582.html
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// LED: PB4 on CH582M-EVT
-#define LED_PIN               GPIO_Pin_4
-#define LED_STATE_ON          0
-
-// Directly reuse BOOT pin as user button
-#define BUTTON_PIN            GPIO_Pin_22
-#define BUTTON_STATE_ACTIVE   0
-
-// UART: UART1 TX=PA9, RX=PA8
-#define CFG_BOARD_UART_BAUDRATE   115200
-
-// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
-// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
-#ifndef BOARD_TUD_RHPORT
-#define BOARD_TUD_RHPORT  0
-#endif
-// #ifndef BOARD_TUH_RHPORT
-// #define BOARD_TUH_RHPORT  1
-// #endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hw/bsp/ch58x/boards/ch582m_evt/board.mk b/hw/bsp/ch58x/boards/ch582m_evt/board.mk
deleted file mode 100644
index a13979799..000000000
--- a/hw/bsp/ch58x/boards/ch582m_evt/board.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-LDFLAGS += \
-  -Wl,--defsym=__FLASH_SIZE=448K \
-  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.cmake b/hw/bsp/ch58x/boards/yd-ch582m/board.cmake
deleted file mode 100644
index 4129c4550..000000000
--- a/hw/bsp/ch58x/boards/yd-ch582m/board.cmake
+++ /dev/null
@@ -1,5 +0,0 @@
-set(LD_FLASH_SIZE 448K)
-set(LD_RAM_SIZE 32K)
-
-function(update_board TARGET)
-endfunction()
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.h b/hw/bsp/ch58x/boards/yd-ch582m/board.h
deleted file mode 100644
index 0da5747bc..000000000
--- a/hw/bsp/ch58x/boards/yd-ch582m/board.h
+++ /dev/null
@@ -1,61 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- */
-
-/* metadata:
-   name: yd-ch582m from vcc-gnd studio
-   url: http://vcc-gnd.com/
-*/
-
-#ifndef BOARD_H_
-#define BOARD_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-// LED: PB4 on yd-ch582m board
-#define LED_PIN               GPIO_Pin_4
-#define LED_STATE_ON          0
-
-// Directly reuse BOOT pin as user button
-#define BUTTON_PIN            GPIO_Pin_22
-#define BUTTON_STATE_ACTIVE   0
-
-// UART: UART1 TX=PA9, RX=PA8
-#define CFG_BOARD_UART_BAUDRATE   115200
-
-// Device only on USB1 (rhport 0). CH58x host / USB2 is not supported by the shared usbfs dcd;
-// BOARD_TUH_RHPORT is kept commented out to ease re-adding host later.
-#ifndef BOARD_TUD_RHPORT
-#define BOARD_TUD_RHPORT  0
-#endif
-// #ifndef BOARD_TUH_RHPORT
-// #define BOARD_TUH_RHPORT  1
-// #endif
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif
diff --git a/hw/bsp/ch58x/boards/yd-ch582m/board.mk b/hw/bsp/ch58x/boards/yd-ch582m/board.mk
deleted file mode 100644
index a13979799..000000000
--- a/hw/bsp/ch58x/boards/yd-ch582m/board.mk
+++ /dev/null
@@ -1,3 +0,0 @@
-LDFLAGS += \
-  -Wl,--defsym=__FLASH_SIZE=448K \
-  -Wl,--defsym=__RAM_SIZE=32K \
diff --git a/hw/bsp/ch58x/ch58x_it.c b/hw/bsp/ch58x/ch58x_it.c
deleted file mode 100644
index 2211e1eda..000000000
--- a/hw/bsp/ch58x/ch58x_it.c
+++ /dev/null
@@ -1,37 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "ch58x_it.h"
-
-// NMI exception handler
-__INTERRUPT __HIGH_CODE void NMI_Handler(void) {
-  while (1) {}
-}
-
-// Hard Fault exception handler
-__INTERRUPT __HIGH_CODE void HardFault_Handler(void) {
-  while (1) {}
-}
diff --git a/hw/bsp/ch58x/ch58x_it.h b/hw/bsp/ch58x/ch58x_it.h
deleted file mode 100644
index 3e050344d..000000000
--- a/hw/bsp/ch58x/ch58x_it.h
+++ /dev/null
@@ -1,46 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef CH58X_IT_H_
-#define CH58X_IT_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-#include "CH58x_common.h"
-
-void NMI_Handler(void);
-void HardFault_Handler(void);
-void USB_IRQHandler(void);
-// void USB2_IRQHandler(void); // host on USB2 (rhport 1) — re-add together with the host driver
-void SysTick_Handler(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* CH58X_IT_H_ */
diff --git a/hw/bsp/ch58x/debug_uart.c b/hw/bsp/ch58x/debug_uart.c
deleted file mode 100644
index 850e40718..000000000
--- a/hw/bsp/ch58x/debug_uart.c
+++ /dev/null
@@ -1,86 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "debug_uart.h"
-#include "CH58x_common.h"
-
-//--------------------------------------------------------------------+
-// Ring buffer based UART TX for non-blocking writes
-//--------------------------------------------------------------------+
-
-#define UART_RINGBUFFER_SIZE_TX  128
-#define UART_RINGBUFFER_MASK_TX  (UART_RINGBUFFER_SIZE_TX - 1)
-
-static char tx_buf[UART_RINGBUFFER_SIZE_TX];
-static uint32_t tx_produce;
-static volatile uint32_t tx_consume;
-
-void uart_write(char c) {
-  uint32_t tx_produce_next = (tx_produce + 1) & UART_RINGBUFFER_MASK_TX;
-
-  // If the ring buffer is full, drain it here as the FIFO frees up: nothing else advances
-  // tx_consume between uart_write() calls, so a plain spin would deadlock on a >buffer-size burst.
-  while (tx_produce_next == tx_consume) {
-    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
-      R8_UART1_THR = tx_buf[tx_consume];
-      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
-    }
-  }
-
-  // If UART TX FIFO is empty and no pending data, send directly
-  if ((tx_consume == tx_produce) && (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP)) {
-    R8_UART1_THR = c;
-  } else {
-    tx_buf[tx_produce] = c;
-    tx_produce = tx_produce_next;
-  }
-}
-
-void uart_sync(void) {
-  // Wait for ring buffer to drain
-  while (tx_consume != tx_produce) {
-    if (R8_UART1_LSR & RB_LSR_TX_FIFO_EMP) {
-      R8_UART1_THR = tx_buf[tx_consume];
-      tx_consume = (tx_consume + 1) & UART_RINGBUFFER_MASK_TX;
-    }
-  }
-  // Wait for last byte to finish transmitting
-  while (!(R8_UART1_LSR & RB_LSR_TX_ALL_EMP)) {}
-}
-
-void usart_printf_init(uint32_t baudrate) {
-  tx_produce = 0;
-  tx_consume = 0;
-
-  // Configure UART1 pins: TX=PA9, RX=PA8
-  GPIOA_SetBits(GPIO_Pin_9);
-  GPIOA_ModeCfg(GPIO_Pin_9, GPIO_ModeOut_PP_5mA);
-  GPIOA_ModeCfg(GPIO_Pin_8, GPIO_ModeIN_PU);
-
-  // Init UART1 with specified baud rate
-  UART1_DefInit();
-  UART1_BaudRateCfg(baudrate);
-}
diff --git a/hw/bsp/ch58x/debug_uart.h b/hw/bsp/ch58x/debug_uart.h
deleted file mode 100644
index 44c3e7948..000000000
--- a/hw/bsp/ch58x/debug_uart.h
+++ /dev/null
@@ -1,44 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef DEBUG_UART_H_
-#define DEBUG_UART_H_
-
-#include <stdint.h>
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-void uart_write(char c);
-void uart_sync(void);
-void usart_printf_init(uint32_t baudrate);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* DEBUG_UART_H_ */
diff --git a/hw/bsp/ch58x/family.c b/hw/bsp/ch58x/family.c
deleted file mode 100644
index 64ae4a903..000000000
--- a/hw/bsp/ch58x/family.c
+++ /dev/null
@@ -1,194 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-/* metadata:
-   manufacturer: WCH
-*/
-
-// WCH SDK's DEBUG macro enables a _write() that conflicts with TinyUSB's.
-// TinyUSB uses UART1 for printf via debug_uart.c, so DEBUG is not needed.
-// If you need a different UART or want to keep SDK's DEBUG, modify
-// debug_uart.c (TinyUSB side) or CH58x_sys.c (SDK side) to remove one _write().
-// If done, remove this #error to continue.
-#ifdef DEBUG
-  #error "Remove the DEBUG macro from preprocessor defines to avoid "  \
-         "duplicate _write() between WCH SDK and TinyUSB. "            \
-         "TinyUSB uses UART1 by default (see debug_uart.c)."
-#endif
-
-#include "debug_uart.h"
-#include "CH58x_common.h"
-#include "ch58x_it.h"
-
-#include "bsp/board_api.h"
-#include "board.h"
-
-//--------------------------------------------------------------------+
-// Forward USB interrupt events to TinyUSB IRQ Handler
-//--------------------------------------------------------------------+
-
-// Device only: the shared dcd_ch32_usbfs.c drives USB0 (rhport 0). CH58x's second controller
-// (USB2 / rhport 1) was driven by the now-removed ch58x host driver; its handler is kept
-// commented out below to ease re-adding host support.
-__INTERRUPT __HIGH_CODE void USB_IRQHandler(void) {
-  tusb_int_handler(0, true);
-}
-
-// __INTERRUPT __HIGH_CODE void USB2_IRQHandler(void) {
-//   tusb_int_handler(1, true);
-// }
-
-//--------------------------------------------------------------------+
-// SysTick
-//--------------------------------------------------------------------+
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-volatile uint32_t system_ticks = 0;
-
-__INTERRUPT __HIGH_CODE void SysTick_Handler(void) {
-  SysTick->SR = 0;
-  system_ticks++;
-}
-
-uint32_t tusb_time_millis_api(void) {
-  return system_ticks;
-}
-#endif
-
-//--------------------------------------------------------------------+
-// Board Init
-//--------------------------------------------------------------------+
-
-void board_init(void) {
-  // Disable interrupts during init
-  PFIC_DisableAllIRQ();
-
-  // Set system clock to PLL 60MHz (default for CH582)
-  SetSysClock(CLK_SOURCE_PLL_60MHz);
-
-#if CFG_TUSB_OS == OPT_OS_NONE
-  SysTick_Config(GetSysClock() / 1000);
-#endif
-
-  // UART1 init for debug output
-#ifdef CFG_BOARD_UART_BAUDRATE
-  usart_printf_init(CFG_BOARD_UART_BAUDRATE);
-#endif
-
-  // LED
-#ifdef LED_PORT_IS_A
-  GPIOA_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
-#else
-  GPIOB_ModeCfg(LED_PIN, GPIO_ModeOut_PP_5mA);
-#endif
-
-  // Button
-#ifdef BUTTON_PIN
-  #ifdef BUTTON_PORT_IS_A
-    GPIOA_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
-  #else
-    GPIOB_ModeCfg(BUTTON_PIN, GPIO_ModeIN_PU);
-  #endif
-#endif
-
-  // Device only on USB0 (rhport 0): enable analog function for USB1 D+/D- and assert its D+
-  // pull-up. The shared dcd_ch32_usbfs.c drives USB0; CH58x host / USB2 (rhport 1) is unsupported
-  // here — to re-add host, also OR in RB_PIN_USB2_IE below.
-  R16_PIN_ANALOG_IE |= RB_PIN_USB_IE; // | RB_PIN_USB2_IE  (re-add for host on USB2)
-#if CFG_TUD_ENABLED
-  R16_PIN_ANALOG_IE |= RB_PIN_USB_DP_PU;
-#endif
-
-  // Keep USB clock active during sleep
-  R8_SLP_CLK_OFF1 &= ~RB_SLP_CLK_USB;
-
-  // Enable interrupts globally
-  PFIC_EnableAllIRQ();
-
-  board_delay(2);
-}
-
-//--------------------------------------------------------------------+
-// Board porting API
-//--------------------------------------------------------------------+
-
-void board_led_write(bool state) {
-#ifdef LED_PORT_IS_A
-  if (state ^ LED_STATE_ON) {
-    GPIOA_ResetBits(LED_PIN);
-  } else {
-    GPIOA_SetBits(LED_PIN);
-  }
-#else
-  if (state ^ LED_STATE_ON) {
-    GPIOB_ResetBits(LED_PIN);
-  } else {
-    GPIOB_SetBits(LED_PIN);
-  }
-#endif
-}
-
-uint32_t board_button_read(void) {
-#ifdef BUTTON_PIN
-  #ifdef BUTTON_PORT_IS_A
-    return BUTTON_STATE_ACTIVE == (GPIOA_ReadPortPin(BUTTON_PIN) ? 1 : 0);
-  #else
-    return BUTTON_STATE_ACTIVE == (GPIOB_ReadPortPin(BUTTON_PIN) ? 1 : 0);
-  #endif
-#else
-  return 0;
-#endif
-}
-
-// CH58x has no memory-mapped unique-ID register (unlike ch32v10x/v20x at 0x1FFFF7E8), but the
-// factory programs a unique 6-byte MAC address into FlashROM (it is a BLE part). GetMACAddress()
-// reads it via the ISP ROM command FLASH_EEPROM_CMD, which is provided by libISP583.a.
-size_t board_get_unique_id(uint8_t id[], size_t max_len) {
-  // FLASH_EEPROM_CMD writes word-granular and requires a 4-byte-aligned buffer (CH58x_flash.c);
-  // size 8 matches the SDK's GET_UNIQUE_ID buffer (6 MAC bytes + 2 it pads), so the read can't
-  // run past the end whether it returns 6 or a full 8.
-  TU_ATTR_ALIGNED(4) uint8_t mac[8];
-  GetMACAddress(mac);
-  size_t len = TU_MIN(max_len, (size_t) 6); // the 6-byte MAC is the unique part
-  memcpy(id, mac, len);
-  return len;
-}
-
-int board_uart_read(uint8_t* buf, int len) {
-  (void) buf;
-  (void) len;
-  return 0;
-}
-
-int board_uart_write(void const* buf, int len) {
-  int txsize = len;
-  const char* bufc = (const char*) buf;
-  while (txsize--) {
-    uart_write(*bufc++);
-  }
-  uart_sync();
-  return len;
-}
diff --git a/hw/bsp/ch58x/family.cmake b/hw/bsp/ch58x/family.cmake
deleted file mode 100644
index a52309276..000000000
--- a/hw/bsp/ch58x/family.cmake
+++ /dev/null
@@ -1,108 +0,0 @@
-include_guard()
-
-set(SDK_DIR ${TOP}/hw/mcu/wch/ch583)
-set(SDK_SRC_DIR ${SDK_DIR}/EVT/EXAM/SRC)
-
-# include board specific
-include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
-
-# toolchain set up
-set(CMAKE_SYSTEM_CPU rv32imac-ilp32 CACHE INTERNAL "System Processor")
-set(CMAKE_TOOLCHAIN_FILE ${TOP}/examples/build_system/cmake/toolchain/riscv_${TOOLCHAIN}.cmake)
-
-set(FAMILY_MCUS CH58X CACHE INTERNAL "")
-set(OPENOCD_OPTION "-f ${CMAKE_CURRENT_LIST_DIR}/wch-riscv.cfg")
-
-#------------------------------------
-# Startup & Linker script
-#------------------------------------
-if (NOT DEFINED LD_FILE_GNU)
-  set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/linker/ch582.ld)
-endif ()
-set(LD_FILE_Clang ${LD_FILE_GNU})
-if (NOT DEFINED STARTUP_FILE_GNU)
-  set(STARTUP_FILE_GNU ${SDK_SRC_DIR}/Startup/startup_CH583.S)
-endif ()
-set(STARTUP_FILE_Clang ${STARTUP_FILE_GNU})
-
-#------------------------------------
-# Board Target
-#------------------------------------
-function(family_add_board BOARD_TARGET)
-  add_library(${BOARD_TARGET} STATIC
-    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_gpio.c
-    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_clk.c
-    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_uart1.c
-    ${SDK_SRC_DIR}/StdPeriphDriver/CH58x_sys.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/ch58x_it.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/system_ch58x.c
-    )
-  target_include_directories(${BOARD_TARGET} PUBLIC
-    ${SDK_SRC_DIR}/RVMSIS
-    ${SDK_SRC_DIR}/StdPeriphDriver/inc
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    )
-  target_link_libraries(${BOARD_TARGET} PUBLIC
-    ${SDK_SRC_DIR}/StdPeriphDriver/libISP583.a
-    )
-  target_compile_definitions(${BOARD_TARGET} PUBLIC
-    CFG_TUD_WCH_USBIP_USBFS=1
-    FREQ_SYS=60000000
-    DISK_LIB_ENABLE=0
-    INT_SOFT
-    )
-
-  update_board(${BOARD_TARGET})
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_compile_options(${BOARD_TARGET} PUBLIC
-      -flto
-      -msmall-data-limit=16
-      -mno-save-restore
-      -fmessage-length=0
-      -fsigned-char
-      -Wno-error=strict-prototypes
-      )
-  endif ()
-endfunction()
-
-#------------------------------------
-# Functions
-#------------------------------------
-function(family_configure_example TARGET RTOS)
-  family_configure_common(${TARGET} ${RTOS})
-  family_add_tinyusb(${TARGET} OPT_MCU_CH58X)
-
-  target_sources(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/debug_uart.c
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
-    ${TOP}/src/portable/wch/dcd_ch32_usbfs.c
-    ${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
-    )
-  target_include_directories(${TARGET} PUBLIC
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
-    ${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
-    )
-
-  if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
-    target_link_options(${TARGET} PUBLIC
-      -nostartfiles
-      --specs=nosys.specs --specs=nano.specs
-      -Wl,--defsym=__FLASH_SIZE=${LD_FLASH_SIZE}
-      -Wl,--defsym=__RAM_SIZE=${LD_RAM_SIZE}
-      "LINKER:--script=${LD_FILE_GNU}"
-      )
-  elseif (CMAKE_C_COMPILER_ID STREQUAL "Clang")
-    message(FATAL_ERROR "Clang is not supported for CH58x")
-  endif ()
-
-  set_source_files_properties(${STARTUP_FILE_${CMAKE_C_COMPILER_ID}} PROPERTIES
-    SKIP_LINTING ON
-    COMPILE_OPTIONS -w)
-
-  # Flashing
-  family_add_bin_hex(${TARGET})
-  family_flash_openocd_wch(${TARGET})
-endfunction()
diff --git a/hw/bsp/ch58x/family.mk b/hw/bsp/ch58x/family.mk
deleted file mode 100644
index ac0443659..000000000
--- a/hw/bsp/ch58x/family.mk
+++ /dev/null
@@ -1,59 +0,0 @@
-# https://www.embecosm.com/resources/tool-chain-downloads/#riscv-stable
-#CROSS_COMPILE ?= riscv32-unknown-elf-
-
-# Toolchain from https://nucleisys.com/download.php
-#CROSS_COMPILE ?= riscv-nuclei-elf-
-
-# Toolchain from https://github.com/xpack-dev-tools/riscv-none-elf-gcc-xpack
-CROSS_COMPILE ?= riscv-none-elf-
-
-SDK_DIR = hw/mcu/wch/ch583
-SDK_SRC_DIR = $(SDK_DIR)/EVT/EXAM/SRC
-
-include $(TOP)/$(BOARD_PATH)/board.mk
-CPU_CORE ?= rv32imac-ilp32
-
-CFLAGS += \
-	-flto \
-	-msmall-data-limit=16 \
-	-mno-save-restore \
-	-fmessage-length=0 \
-	-fsigned-char \
-	-DCFG_TUSB_MCU=OPT_MCU_CH58X \
-	-DCFG_TUD_WCH_USBIP_USBFS=1 \
-	-DFREQ_SYS=60000000 \
-	-DDISK_LIB_ENABLE=0 \
-	-DINT_SOFT \
-	-Wno-error=strict-prototypes
-
-LDFLAGS += \
-	-nostartfiles \
-	--specs=nosys.specs --specs=nano.specs
-
-LIBS += $(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/libISP583.a
-
-SRC_C += \
-	src/portable/wch/dcd_ch32_usbfs.c \
-	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_gpio.c \
-	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_clk.c \
-	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_uart1.c \
-	$(SDK_SRC_DIR)/StdPeriphDriver/CH58x_sys.c \
-	$(FAMILY_PATH)/debug_uart.c \
-	$(FAMILY_PATH)/ch58x_it.c \
-	$(FAMILY_PATH)/system_ch58x.c
-
-SRC_S += \
-	$(SDK_SRC_DIR)/Startup/startup_CH583.S
-
-INC += \
-	$(TOP)/$(BOARD_PATH) \
-	$(TOP)/$(SDK_SRC_DIR)/RVMSIS \
-	$(TOP)/$(SDK_SRC_DIR)/StdPeriphDriver/inc
-
-LD_FILE ?= $(FAMILY_PATH)/linker/ch582.ld
-
-OPENOCD_WCH_OPTION=-f $(TOP)/$(FAMILY_PATH)/wch-riscv.cfg
-flash: flash-openocd-wch
-
-# For freeRTOS port source
-FREERTOS_PORTABLE_SRC = $(FREERTOS_PORTABLE_PATH)/RISC-V
diff --git a/hw/bsp/ch58x/linker/ch582.ld b/hw/bsp/ch58x/linker/ch582.ld
deleted file mode 100644
index 821998a49..000000000
--- a/hw/bsp/ch58x/linker/ch582.ld
+++ /dev/null
@@ -1,167 +0,0 @@
-/* CH582 Linker Script for TinyUSB
- * Based on WCH CH583 SDK Link.ld
- * Supports parameterized flash/ram sizes via --defsym
- */
-
-/* Default sizes if not provided via --defsym */
-__flash_size = DEFINED(__FLASH_SIZE) ? __FLASH_SIZE : 448K;
-__ram_size = DEFINED(__RAM_SIZE) ? __RAM_SIZE : 32K;
-__stack_size = DEFINED(__STACK_SIZE) ? __STACK_SIZE : 2048;
-
-ENTRY( _start )
-
-PROVIDE( _stack_size = __stack_size );
-
-MEMORY
-{
-  FLASH (rx)  : ORIGIN = 0x00000000, LENGTH = __flash_size
-  RAM   (xrw) : ORIGIN = 0x20000000, LENGTH = __ram_size
-}
-
-SECTIONS
-{
-  .init :
-  {
-    _sinit = .;
-    . = ALIGN(4);
-    KEEP(*(SORT_NONE(.init)))
-    . = ALIGN(4);
-    _einit = .;
-  } >FLASH AT>FLASH
-
-  .highcodelalign :
-  {
-    . = ALIGN(4);
-    PROVIDE(_highcode_lma = .);
-  } >FLASH AT>FLASH
-
-  .highcode :
-  {
-    . = ALIGN(4);
-    PROVIDE(_highcode_vma_start = .);
-    *(.vector);
-    KEEP(*(SORT_NONE(.vector_handler)))
-    *(.highcode);
-    *(.highcode.*);
-    . = ALIGN(4);
-    PROVIDE(_highcode_vma_end = .);
-  } >RAM AT>FLASH
-
-  .text :
-  {
-    . = ALIGN(4);
-    KEEP(*(SORT_NONE(.handle_reset)))
-    *(.text)
-    *(.text.*)
-    *(.rodata)
-    *(.rodata*)
-    *(.sdata2.*)
-    *(.glue_7)
-    *(.glue_7t)
-    *(.gnu.linkonce.t.*)
-    . = ALIGN(4);
-  } >FLASH AT>FLASH
-
-  .fini :
-  {
-    KEEP(*(SORT_NONE(.fini)))
-    . = ALIGN(4);
-  } >FLASH AT>FLASH
-
-  PROVIDE( _etext = . );
-  PROVIDE( _eitcm = . );
-
-  .preinit_array :
-  {
-    PROVIDE_HIDDEN (__preinit_array_start = .);
-    KEEP (*(.preinit_array))
-    PROVIDE_HIDDEN (__preinit_array_end = .);
-  } >FLASH AT>FLASH
-
-  .init_array :
-  {
-    PROVIDE_HIDDEN (__init_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.init_array.*) SORT_BY_INIT_PRIORITY(.ctors.*)))
-    KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors))
-    PROVIDE_HIDDEN (__init_array_end = .);
-  } >FLASH AT>FLASH
-
-  .fini_array :
-  {
-    PROVIDE_HIDDEN (__fini_array_start = .);
-    KEEP (*(SORT_BY_INIT_PRIORITY(.fini_array.*) SORT_BY_INIT_PRIORITY(.dtors.*)))
-    KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors))
-    PROVIDE_HIDDEN (__fini_array_end = .);
-  } >FLASH AT>FLASH
-
-  .ctors :
-  {
-    KEEP (*crtbegin.o(.ctors))
-    KEEP (*crtbegin?.o(.ctors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .ctors))
-    KEEP (*(SORT(.ctors.*)))
-    KEEP (*(.ctors))
-  } >FLASH AT>FLASH
-
-  .dtors :
-  {
-    KEEP (*crtbegin.o(.dtors))
-    KEEP (*crtbegin?.o(.dtors))
-    KEEP (*(EXCLUDE_FILE (*crtend.o *crtend?.o ) .dtors))
-    KEEP (*(SORT(.dtors.*)))
-    KEEP (*(.dtors))
-  } >FLASH AT>FLASH
-
-  .dlalign :
-  {
-    . = ALIGN(4);
-    PROVIDE(_data_lma = .);
-  } >FLASH AT>FLASH
-
-  .data :
-  {
-    . = ALIGN(4);
-    PROVIDE(_data_vma = .);
-    *(.gnu.linkonce.r.*)
-    *(.data .data.*)
-    *(.gnu.linkonce.d.*)
-    . = ALIGN(8);
-    PROVIDE( __global_pointer$ = . + 0x800 );
-    *(.sdata .sdata.*)
-    *(.gnu.linkonce.s.*)
-    . = ALIGN(8);
-    *(.srodata.cst16)
-    *(.srodata.cst8)
-    *(.srodata.cst4)
-    *(.srodata.cst2)
-    *(.srodata .srodata.*)
-    . = ALIGN(4);
-    PROVIDE( _edata = .);
-  } >RAM AT>FLASH
-
-  .bss :
-  {
-    . = ALIGN(4);
-    PROVIDE( _sbss = .);
-    *(.sbss*)
-    *(.gnu.linkonce.sb.*)
-    *(.bss*)
-    *(.gnu.linkonce.b.*)
-    *(COMMON*)
-    . = ALIGN(4);
-    PROVIDE( _ebss = .);
-  } >RAM AT>FLASH
-
-  PROVIDE( _end = _ebss);
-  PROVIDE( end = . );
-
-  .stack ORIGIN(RAM) + LENGTH(RAM) - __stack_size :
-  {
-    PROVIDE( _heap_end = . );
-    . = ALIGN(4);
-    PROVIDE(_susrstack = . );
-    . = . + __stack_size;
-    PROVIDE( _eusrstack = .);
-    __freertos_irq_stack_top = .;
-  } >RAM
-}
diff --git a/hw/bsp/ch58x/system_ch58x.c b/hw/bsp/ch58x/system_ch58x.c
deleted file mode 100644
index 068c1a131..000000000
--- a/hw/bsp/ch58x/system_ch58x.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#include "CH58x_common.h"
-#include "system_ch58x.h"
-
-uint32_t SystemCoreClock = FREQ_SYS;
-
-void SystemInit(void) {
-  SetSysClock(CLK_SOURCE_PLL_60MHz);
-  SystemCoreClock = GetSysClock();
-}
-
-void SystemCoreClockUpdate(void) {
-  SystemCoreClock = GetSysClock();
-}
diff --git a/hw/bsp/ch58x/system_ch58x.h b/hw/bsp/ch58x/system_ch58x.h
deleted file mode 100644
index e96741ee8..000000000
--- a/hw/bsp/ch58x/system_ch58x.h
+++ /dev/null
@@ -1,43 +0,0 @@
-/*
- * The MIT License (MIT)
- *
- * Copyright (c) 2024 TinyUSB contributors
- *
- * Permission is hereby granted, free of charge, to any person obtaining a copy
- * of this software and associated documentation files (the "Software"), to deal
- * in the Software without restriction, including without limitation the rights
- * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
- * copies of the Software, and to permit persons to whom the Software is
- * furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
- * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
- * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
- * THE SOFTWARE.
- *
- * This file is part of the TinyUSB stack.
- */
-
-#ifndef SYSTEM_CH58X_H_
-#define SYSTEM_CH58X_H_
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-
-extern uint32_t SystemCoreClock;  // System Clock Frequency (Core Clock)
-
-extern void SystemInit(void);
-extern void SystemCoreClockUpdate(void);
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* SYSTEM_CH58X_H_ */
diff --git a/hw/bsp/ch58x/wch-riscv.cfg b/hw/bsp/ch58x/wch-riscv.cfg
deleted file mode 100644
index 64d595d8e..000000000
--- a/hw/bsp/ch58x/wch-riscv.cfg
+++ /dev/null
@@ -1,17 +0,0 @@
-adapter driver wlinke
-adapter speed 6000
-transport select sdi
-
-wlink_set_address 0x00000000
-set _CHIPNAME wch_riscv
-sdi newtap $_CHIPNAME cpu -irlen 5 -expected-id 0x00001
-
-set _TARGETNAME $_CHIPNAME.cpu
-
-target create $_TARGETNAME.0 wch_riscv -chain-position $_TARGETNAME
-$_TARGETNAME.0 configure  -work-area-phys 0x20000000 -work-area-size 0x8000 -work-area-backup 1
-set _FLASHNAME $_CHIPNAME.flash
-
-flash bank $_FLASHNAME wch_riscv 0x00000000 0 0 0 $_TARGETNAME.0
-
-echo "Ready for Remote Connections"
diff --git a/src/common/tusb_mcu.h b/src/common/tusb_mcu.h
index f2a2d92a5..b5390a59d 100644
--- a/src/common/tusb_mcu.h
+++ b/src/common/tusb_mcu.h
@@ -659,7 +659,7 @@
     #define TUP_DCD_EDPT_CLOSE_API
   #endif
 
-#elif TU_CHECK_MCU(OPT_MCU_CH58X)
+#elif TU_CHECK_MCU(OPT_MCU_CH583)
   // CH582/583 USBFS: older WCH USBFS IP with a single combined per-endpoint control register
   // (like CH32V103), driven by the shared dcd_ch32_usbfs.c on USB0 (rhport 0). Device only:
   // the shared hcd_ch32_usbfs.c is CH32V20x-specific and does not support CH58x, so host /
diff --git a/src/portable/wch/ch32_usbfs_reg.h b/src/portable/wch/ch32_usbfs_reg.h
index 90a477b79..415a015dc 100644
--- a/src/portable/wch/ch32_usbfs_reg.h
+++ b/src/portable/wch/ch32_usbfs_reg.h
@@ -130,7 +130,7 @@
 #elif CFG_TUSB_MCU == OPT_MCU_CH32V307
   #include <ch32v30x.h>
   #define USBHD_IRQn OTG_FS_IRQn
-#elif CFG_TUSB_MCU == OPT_MCU_CH58X
+#elif CFG_TUSB_MCU == OPT_MCU_CH583
   #include "CH58x_common.h"
   // CH582/583 USBFS device controller: same combined per-endpoint control register as
   // CH32V103 (IN response bits[1:0], OUT response bits[3:2]) but a different register map -
diff --git a/src/portable/wch/dcd_ch32_usbfs.c b/src/portable/wch/dcd_ch32_usbfs.c
index 22c7a43fa..ece9cde07 100644
--- a/src/portable/wch/dcd_ch32_usbfs.c
+++ b/src/portable/wch/dcd_ch32_usbfs.c
@@ -37,7 +37,7 @@
 
   // Struct-based EP register access (uniform layout). CH58X has a different register map and
   // defines EP_DMA/EP_TX_LEN/EP_CTRL itself in ch32_usbfs_reg.h.
-  #if CFG_TUSB_MCU == OPT_MCU_CH58X
+  #if CFG_TUSB_MCU == OPT_MCU_CH583
     // CH58X EP registers split into a low block (EP0-4) and a high block (EP5-7). Walk from each
     // block's first slot by the 4-byte slot stride (pointer arithmetic off slot 0, so the unused
     // ternary branch's index can't trip -Warray-bounds). EP4 has no DMA register of its own (it
@@ -220,7 +220,7 @@ static void update_in(uint8_t rhport, uint8_t ep, bool force) {
   if (xfer->valid) {
     if (force || xfer->len) {
       size_t len = TU_MIN(xfer->max_size, xfer->len);
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
       // Every CH58x endpoint buffer is 64 bytes. Isochronous (which would push max_size up to 1023)
       // is refused in dcd_edpt_iso_alloc(), but some classes (e.g. video) ignore that result, so cap
       // the copy here to guarantee we never write past the buffer into a neighbouring endpoint's.
@@ -256,7 +256,7 @@ static void update_out(uint8_t rhport, uint8_t ep, size_t rx_len) {
   struct usb_xfer *xfer = &data.xfer[ep][TUSB_DIR_OUT];
   if (xfer->valid) {
     size_t len = TU_MIN(xfer->max_size, TU_MIN(xfer->len, rx_len));
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
     len = TU_MIN(len, 64u); // cap to the 64-byte EP buffer (see update_in)
 #endif
     memcpy(xfer->buffer, ep_out_buf(ep), len);
@@ -308,7 +308,7 @@ bool dcd_init(uint8_t rhport, const tusb_rhport_init_t *rh_init) {
   // enable other endpoints but NAK everything
   USBOTG_FS->UEP4_1_MOD = 0xCC;
   USBOTG_FS->UEP2_3_MOD = 0xCC;
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
   // CH58X: a single mode register enables EP5/6/7 RX+TX (different bit layout than CH32).
   USBOTG_FS->UEP567_MOD = RB_UEP5_RX_EN | RB_UEP5_TX_EN | RB_UEP6_RX_EN | RB_UEP6_TX_EN |
                           RB_UEP7_RX_EN | RB_UEP7_TX_EN;
@@ -393,7 +393,7 @@ void dcd_int_handler(uint8_t rhport) {
 
     USBOTG_FS->INT_FG = USBFS_INT_FG_BUS_RST;
   } else if (status & USBFS_INT_FG_SUSPEND) {
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
     // CH58x raises this single interrupt for both suspend and resume; MIS_ST's suspend bit tells
     // them apart (set while suspended, clear once resumed) so tud_resume_cb() actually fires.
     dcd_event_t event = {.rhport = rhport,
@@ -447,7 +447,7 @@ void dcd_edpt0_status_complete(uint8_t rhport, const tusb_control_request_t *req
   (void)rhport;
   if (request->bmRequestType_bit.recipient == TUSB_REQ_RCPT_DEVICE &&
       request->bmRequestType_bit.type == TUSB_REQ_TYPE_STANDARD && request->bRequest == TUSB_REQ_SET_ADDRESS) {
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
     // On CH58x R8_USB_DEV_AD bit 7 is a user general-purpose flag; only bits [6:0] are the address.
     USBOTG_FS->DEV_ADDR = (uint8_t)((USBOTG_FS->DEV_ADDR & 0x80u) | (request->wValue & 0x7Fu));
 #else
@@ -485,7 +485,7 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
   (void)rhport;
   (void)ep_addr;
   (void)largest_packet_size;
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
   // No isochronous support on CH58x: its 8-bit T_LEN caps a packet at 255B and the endpoints use
   // plain 64-byte buffers, so accepting an iso max_size (up to 1023) would let update_in()/
   // update_out() run off the end of the buffer into neighbouring ones. Refuse it outright.
@@ -503,7 +503,7 @@ bool dcd_edpt_iso_alloc(uint8_t rhport, uint8_t ep_addr, uint16_t largest_packet
 bool dcd_edpt_iso_activate(uint8_t rhport, const tusb_desc_endpoint_t *desc_ep) {
   (void)rhport;
   (void)desc_ep;
-#if CFG_TUSB_MCU == OPT_MCU_CH58X
+#if CFG_TUSB_MCU == OPT_MCU_CH583
   return false; // CH58x has no isochronous support (see dcd_edpt_iso_alloc)
 #else
   return true;
diff --git a/src/tusb_option.h b/src/tusb_option.h
index 9170d1205..cb8e3f6bd 100644
--- a/src/tusb_option.h
+++ b/src/tusb_option.h
@@ -195,7 +195,7 @@
 #define OPT_MCU_CH32F20X         2210 ///< WCH CH32F20x
 #define OPT_MCU_CH32V20X         2220 ///< WCH CH32V20X
 #define OPT_MCU_CH32V103         2230 ///< WCH CH32V103
-#define OPT_MCU_CH58X            2240 ///< WCH CH58x
+#define OPT_MCU_CH583            2240 ///< WCH CH583
 #define OPT_MCU_CH582            2240  ///< alias to CH58x series
 #define OPT_MCU_CH583            2240  ///< alias to CH58x series
 
diff --git a/tools/get_deps.py b/tools/get_deps.py
index b31f8a0cb..ebbf9b871 100755
--- a/tools/get_deps.py
+++ b/tools/get_deps.py
@@ -255,7 +255,7 @@ deps_optional = {
                             'ch32f20x'],
     'hw/mcu/wch/ch583': ['https://github.com/openwch/ch583.git',
                          'bd508ad7ceed48377619837051412a651952857f',
-                         'ch58x'],
+                         'ch583'],
     'hw/mcu/artery/at32f403a_407': ['https://github.com/ArteryTek/AT32F403A_407_Firmware_Library.git',
                                     'f2cb360c3d28fada76b374308b8c4c61d37a090b',
                                     'at32f403a_407'],
-- 
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