From fa523a5682d8dc91cc1c7a63475623743e37ac83 Mon Sep 17 00:00:00 2001 From: hathach Date: Thu, 21 Nov 2024 10:15:30 +0700 Subject: make sure usb buffer occupies whole cache line when DCACHE is enabled for msc,cdc,hid HIL enable device DMA for p4 --- src/class/cdc/cdc_device.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) (limited to 'src/class/cdc/cdc_device.c') diff --git a/src/class/cdc/cdc_device.c b/src/class/cdc/cdc_device.c index ebc408f5a..3e856383e 100644 --- a/src/class/cdc/cdc_device.c +++ b/src/class/cdc/cdc_device.c @@ -69,8 +69,14 @@ typedef struct { OSAL_MUTEX_DEF(tx_ff_mutex); // Endpoint Transfer buffer - CFG_TUSB_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE]; - CFG_TUSB_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE]; + union { + CFG_TUD_MEM_ALIGN uint8_t epout_buf[CFG_TUD_CDC_EP_BUFSIZE]; + TUD_DCACHE_PADDING; + }; + union { + CFG_TUD_MEM_ALIGN uint8_t epin_buf[CFG_TUD_CDC_EP_BUFSIZE]; + TUD_DCACHE_PADDING; + }; } cdcd_interface_t; #define ITF_MEM_RESET_SIZE offsetof(cdcd_interface_t, wanted_char) -- cgit v1.3.1